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736b7f406d826e9c30e268e7e84e0350b8e755b3
modular-kbd/firmware/modularkbd/Debug/modularkbd.list
Kymkim 736b7f406d stuff
2025-09-17 12:51:01 -07:00

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838 KiB
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modularkbd.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 000001c4 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 00008a0c 080001c4 080001c4 000011c4 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00000054 08008bd0 08008bd0 00009bd0 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 08008c24 08008c24 0000a138 2**0
CONTENTS, READONLY
4 .ARM 00000008 08008c24 08008c24 00009c24 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 08008c2c 08008c2c 0000a138 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 08008c2c 08008c2c 00009c2c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 08008c30 08008c30 00009c30 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 00000138 20000000 08008c34 0000a000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 00000c54 20000138 08008d6c 0000a138 2**2
ALLOC
10 ._user_heap_stack 00000604 20000d8c 08008d6c 0000ad8c 2**0
ALLOC
11 .ARM.attributes 00000030 00000000 00000000 0000a138 2**0
CONTENTS, READONLY
12 .debug_info 00018ad3 00000000 00000000 0000a168 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 0000363f 00000000 00000000 00022c3b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 00001628 00000000 00000000 00026280 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 0000114d 00000000 00000000 000278a8 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0002535f 00000000 00000000 000289f5 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001b0b4 00000000 00000000 0004dd54 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 000d797e 00000000 00000000 00068e08 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 00140786 2**0
CONTENTS, READONLY
20 .debug_frame 00005ef8 00000000 00000000 001407cc 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000062 00000000 00000000 001466c4 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
080001c4 <__do_global_dtors_aux>:
80001c4: b510 push {r4, lr}
80001c6: 4c05 ldr r4, [pc, #20] @ (80001dc <__do_global_dtors_aux+0x18>)
80001c8: 7823 ldrb r3, [r4, #0]
80001ca: b933 cbnz r3, 80001da <__do_global_dtors_aux+0x16>
80001cc: 4b04 ldr r3, [pc, #16] @ (80001e0 <__do_global_dtors_aux+0x1c>)
80001ce: b113 cbz r3, 80001d6 <__do_global_dtors_aux+0x12>
80001d0: 4804 ldr r0, [pc, #16] @ (80001e4 <__do_global_dtors_aux+0x20>)
80001d2: f3af 8000 nop.w
80001d6: 2301 movs r3, #1
80001d8: 7023 strb r3, [r4, #0]
80001da: bd10 pop {r4, pc}
80001dc: 20000138 .word 0x20000138
80001e0: 00000000 .word 0x00000000
80001e4: 08008bb8 .word 0x08008bb8
080001e8 <frame_dummy>:
80001e8: b508 push {r3, lr}
80001ea: 4b03 ldr r3, [pc, #12] @ (80001f8 <frame_dummy+0x10>)
80001ec: b11b cbz r3, 80001f6 <frame_dummy+0xe>
80001ee: 4903 ldr r1, [pc, #12] @ (80001fc <frame_dummy+0x14>)
80001f0: 4803 ldr r0, [pc, #12] @ (8000200 <frame_dummy+0x18>)
80001f2: f3af 8000 nop.w
80001f6: bd08 pop {r3, pc}
80001f8: 00000000 .word 0x00000000
80001fc: 2000013c .word 0x2000013c
8000200: 08008bb8 .word 0x08008bb8
08000204 <__aeabi_uldivmod>:
8000204: b953 cbnz r3, 800021c <__aeabi_uldivmod+0x18>
8000206: b94a cbnz r2, 800021c <__aeabi_uldivmod+0x18>
8000208: 2900 cmp r1, #0
800020a: bf08 it eq
800020c: 2800 cmpeq r0, #0
800020e: bf1c itt ne
8000210: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff
8000214: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff
8000218: f000 b988 b.w 800052c <__aeabi_idiv0>
800021c: f1ad 0c08 sub.w ip, sp, #8
8000220: e96d ce04 strd ip, lr, [sp, #-16]!
8000224: f000 f806 bl 8000234 <__udivmoddi4>
8000228: f8dd e004 ldr.w lr, [sp, #4]
800022c: e9dd 2302 ldrd r2, r3, [sp, #8]
8000230: b004 add sp, #16
8000232: 4770 bx lr
08000234 <__udivmoddi4>:
8000234: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
8000238: 9d08 ldr r5, [sp, #32]
800023a: 468e mov lr, r1
800023c: 4604 mov r4, r0
800023e: 4688 mov r8, r1
8000240: 2b00 cmp r3, #0
8000242: d14a bne.n 80002da <__udivmoddi4+0xa6>
8000244: 428a cmp r2, r1
8000246: 4617 mov r7, r2
8000248: d962 bls.n 8000310 <__udivmoddi4+0xdc>
800024a: fab2 f682 clz r6, r2
800024e: b14e cbz r6, 8000264 <__udivmoddi4+0x30>
8000250: f1c6 0320 rsb r3, r6, #32
8000254: fa01 f806 lsl.w r8, r1, r6
8000258: fa20 f303 lsr.w r3, r0, r3
800025c: 40b7 lsls r7, r6
800025e: ea43 0808 orr.w r8, r3, r8
8000262: 40b4 lsls r4, r6
8000264: ea4f 4e17 mov.w lr, r7, lsr #16
8000268: fa1f fc87 uxth.w ip, r7
800026c: fbb8 f1fe udiv r1, r8, lr
8000270: 0c23 lsrs r3, r4, #16
8000272: fb0e 8811 mls r8, lr, r1, r8
8000276: ea43 4308 orr.w r3, r3, r8, lsl #16
800027a: fb01 f20c mul.w r2, r1, ip
800027e: 429a cmp r2, r3
8000280: d909 bls.n 8000296 <__udivmoddi4+0x62>
8000282: 18fb adds r3, r7, r3
8000284: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff
8000288: f080 80ea bcs.w 8000460 <__udivmoddi4+0x22c>
800028c: 429a cmp r2, r3
800028e: f240 80e7 bls.w 8000460 <__udivmoddi4+0x22c>
8000292: 3902 subs r1, #2
8000294: 443b add r3, r7
8000296: 1a9a subs r2, r3, r2
8000298: b2a3 uxth r3, r4
800029a: fbb2 f0fe udiv r0, r2, lr
800029e: fb0e 2210 mls r2, lr, r0, r2
80002a2: ea43 4302 orr.w r3, r3, r2, lsl #16
80002a6: fb00 fc0c mul.w ip, r0, ip
80002aa: 459c cmp ip, r3
80002ac: d909 bls.n 80002c2 <__udivmoddi4+0x8e>
80002ae: 18fb adds r3, r7, r3
80002b0: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff
80002b4: f080 80d6 bcs.w 8000464 <__udivmoddi4+0x230>
80002b8: 459c cmp ip, r3
80002ba: f240 80d3 bls.w 8000464 <__udivmoddi4+0x230>
80002be: 443b add r3, r7
80002c0: 3802 subs r0, #2
80002c2: ea40 4001 orr.w r0, r0, r1, lsl #16
80002c6: eba3 030c sub.w r3, r3, ip
80002ca: 2100 movs r1, #0
80002cc: b11d cbz r5, 80002d6 <__udivmoddi4+0xa2>
80002ce: 40f3 lsrs r3, r6
80002d0: 2200 movs r2, #0
80002d2: e9c5 3200 strd r3, r2, [r5]
80002d6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
80002da: 428b cmp r3, r1
80002dc: d905 bls.n 80002ea <__udivmoddi4+0xb6>
80002de: b10d cbz r5, 80002e4 <__udivmoddi4+0xb0>
80002e0: e9c5 0100 strd r0, r1, [r5]
80002e4: 2100 movs r1, #0
80002e6: 4608 mov r0, r1
80002e8: e7f5 b.n 80002d6 <__udivmoddi4+0xa2>
80002ea: fab3 f183 clz r1, r3
80002ee: 2900 cmp r1, #0
80002f0: d146 bne.n 8000380 <__udivmoddi4+0x14c>
80002f2: 4573 cmp r3, lr
80002f4: d302 bcc.n 80002fc <__udivmoddi4+0xc8>
80002f6: 4282 cmp r2, r0
80002f8: f200 8105 bhi.w 8000506 <__udivmoddi4+0x2d2>
80002fc: 1a84 subs r4, r0, r2
80002fe: eb6e 0203 sbc.w r2, lr, r3
8000302: 2001 movs r0, #1
8000304: 4690 mov r8, r2
8000306: 2d00 cmp r5, #0
8000308: d0e5 beq.n 80002d6 <__udivmoddi4+0xa2>
800030a: e9c5 4800 strd r4, r8, [r5]
800030e: e7e2 b.n 80002d6 <__udivmoddi4+0xa2>
8000310: 2a00 cmp r2, #0
8000312: f000 8090 beq.w 8000436 <__udivmoddi4+0x202>
8000316: fab2 f682 clz r6, r2
800031a: 2e00 cmp r6, #0
800031c: f040 80a4 bne.w 8000468 <__udivmoddi4+0x234>
8000320: 1a8a subs r2, r1, r2
8000322: 0c03 lsrs r3, r0, #16
8000324: ea4f 4e17 mov.w lr, r7, lsr #16
8000328: b280 uxth r0, r0
800032a: b2bc uxth r4, r7
800032c: 2101 movs r1, #1
800032e: fbb2 fcfe udiv ip, r2, lr
8000332: fb0e 221c mls r2, lr, ip, r2
8000336: ea43 4302 orr.w r3, r3, r2, lsl #16
800033a: fb04 f20c mul.w r2, r4, ip
800033e: 429a cmp r2, r3
8000340: d907 bls.n 8000352 <__udivmoddi4+0x11e>
8000342: 18fb adds r3, r7, r3
8000344: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff
8000348: d202 bcs.n 8000350 <__udivmoddi4+0x11c>
800034a: 429a cmp r2, r3
800034c: f200 80e0 bhi.w 8000510 <__udivmoddi4+0x2dc>
8000350: 46c4 mov ip, r8
8000352: 1a9b subs r3, r3, r2
8000354: fbb3 f2fe udiv r2, r3, lr
8000358: fb0e 3312 mls r3, lr, r2, r3
800035c: ea40 4303 orr.w r3, r0, r3, lsl #16
8000360: fb02 f404 mul.w r4, r2, r4
8000364: 429c cmp r4, r3
8000366: d907 bls.n 8000378 <__udivmoddi4+0x144>
8000368: 18fb adds r3, r7, r3
800036a: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff
800036e: d202 bcs.n 8000376 <__udivmoddi4+0x142>
8000370: 429c cmp r4, r3
8000372: f200 80ca bhi.w 800050a <__udivmoddi4+0x2d6>
8000376: 4602 mov r2, r0
8000378: 1b1b subs r3, r3, r4
800037a: ea42 400c orr.w r0, r2, ip, lsl #16
800037e: e7a5 b.n 80002cc <__udivmoddi4+0x98>
8000380: f1c1 0620 rsb r6, r1, #32
8000384: 408b lsls r3, r1
8000386: fa22 f706 lsr.w r7, r2, r6
800038a: 431f orrs r7, r3
800038c: fa0e f401 lsl.w r4, lr, r1
8000390: fa20 f306 lsr.w r3, r0, r6
8000394: fa2e fe06 lsr.w lr, lr, r6
8000398: ea4f 4917 mov.w r9, r7, lsr #16
800039c: 4323 orrs r3, r4
800039e: fa00 f801 lsl.w r8, r0, r1
80003a2: fa1f fc87 uxth.w ip, r7
80003a6: fbbe f0f9 udiv r0, lr, r9
80003aa: 0c1c lsrs r4, r3, #16
80003ac: fb09 ee10 mls lr, r9, r0, lr
80003b0: ea44 440e orr.w r4, r4, lr, lsl #16
80003b4: fb00 fe0c mul.w lr, r0, ip
80003b8: 45a6 cmp lr, r4
80003ba: fa02 f201 lsl.w r2, r2, r1
80003be: d909 bls.n 80003d4 <__udivmoddi4+0x1a0>
80003c0: 193c adds r4, r7, r4
80003c2: f100 3aff add.w sl, r0, #4294967295 @ 0xffffffff
80003c6: f080 809c bcs.w 8000502 <__udivmoddi4+0x2ce>
80003ca: 45a6 cmp lr, r4
80003cc: f240 8099 bls.w 8000502 <__udivmoddi4+0x2ce>
80003d0: 3802 subs r0, #2
80003d2: 443c add r4, r7
80003d4: eba4 040e sub.w r4, r4, lr
80003d8: fa1f fe83 uxth.w lr, r3
80003dc: fbb4 f3f9 udiv r3, r4, r9
80003e0: fb09 4413 mls r4, r9, r3, r4
80003e4: ea4e 4404 orr.w r4, lr, r4, lsl #16
80003e8: fb03 fc0c mul.w ip, r3, ip
80003ec: 45a4 cmp ip, r4
80003ee: d908 bls.n 8000402 <__udivmoddi4+0x1ce>
80003f0: 193c adds r4, r7, r4
80003f2: f103 3eff add.w lr, r3, #4294967295 @ 0xffffffff
80003f6: f080 8082 bcs.w 80004fe <__udivmoddi4+0x2ca>
80003fa: 45a4 cmp ip, r4
80003fc: d97f bls.n 80004fe <__udivmoddi4+0x2ca>
80003fe: 3b02 subs r3, #2
8000400: 443c add r4, r7
8000402: ea43 4000 orr.w r0, r3, r0, lsl #16
8000406: eba4 040c sub.w r4, r4, ip
800040a: fba0 ec02 umull lr, ip, r0, r2
800040e: 4564 cmp r4, ip
8000410: 4673 mov r3, lr
8000412: 46e1 mov r9, ip
8000414: d362 bcc.n 80004dc <__udivmoddi4+0x2a8>
8000416: d05f beq.n 80004d8 <__udivmoddi4+0x2a4>
8000418: b15d cbz r5, 8000432 <__udivmoddi4+0x1fe>
800041a: ebb8 0203 subs.w r2, r8, r3
800041e: eb64 0409 sbc.w r4, r4, r9
8000422: fa04 f606 lsl.w r6, r4, r6
8000426: fa22 f301 lsr.w r3, r2, r1
800042a: 431e orrs r6, r3
800042c: 40cc lsrs r4, r1
800042e: e9c5 6400 strd r6, r4, [r5]
8000432: 2100 movs r1, #0
8000434: e74f b.n 80002d6 <__udivmoddi4+0xa2>
8000436: fbb1 fcf2 udiv ip, r1, r2
800043a: 0c01 lsrs r1, r0, #16
800043c: ea41 410e orr.w r1, r1, lr, lsl #16
8000440: b280 uxth r0, r0
8000442: ea40 4201 orr.w r2, r0, r1, lsl #16
8000446: 463b mov r3, r7
8000448: 4638 mov r0, r7
800044a: 463c mov r4, r7
800044c: 46b8 mov r8, r7
800044e: 46be mov lr, r7
8000450: 2620 movs r6, #32
8000452: fbb1 f1f7 udiv r1, r1, r7
8000456: eba2 0208 sub.w r2, r2, r8
800045a: ea41 410c orr.w r1, r1, ip, lsl #16
800045e: e766 b.n 800032e <__udivmoddi4+0xfa>
8000460: 4601 mov r1, r0
8000462: e718 b.n 8000296 <__udivmoddi4+0x62>
8000464: 4610 mov r0, r2
8000466: e72c b.n 80002c2 <__udivmoddi4+0x8e>
8000468: f1c6 0220 rsb r2, r6, #32
800046c: fa2e f302 lsr.w r3, lr, r2
8000470: 40b7 lsls r7, r6
8000472: 40b1 lsls r1, r6
8000474: fa20 f202 lsr.w r2, r0, r2
8000478: ea4f 4e17 mov.w lr, r7, lsr #16
800047c: 430a orrs r2, r1
800047e: fbb3 f8fe udiv r8, r3, lr
8000482: b2bc uxth r4, r7
8000484: fb0e 3318 mls r3, lr, r8, r3
8000488: 0c11 lsrs r1, r2, #16
800048a: ea41 4103 orr.w r1, r1, r3, lsl #16
800048e: fb08 f904 mul.w r9, r8, r4
8000492: 40b0 lsls r0, r6
8000494: 4589 cmp r9, r1
8000496: ea4f 4310 mov.w r3, r0, lsr #16
800049a: b280 uxth r0, r0
800049c: d93e bls.n 800051c <__udivmoddi4+0x2e8>
800049e: 1879 adds r1, r7, r1
80004a0: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff
80004a4: d201 bcs.n 80004aa <__udivmoddi4+0x276>
80004a6: 4589 cmp r9, r1
80004a8: d81f bhi.n 80004ea <__udivmoddi4+0x2b6>
80004aa: eba1 0109 sub.w r1, r1, r9
80004ae: fbb1 f9fe udiv r9, r1, lr
80004b2: fb09 f804 mul.w r8, r9, r4
80004b6: fb0e 1119 mls r1, lr, r9, r1
80004ba: b292 uxth r2, r2
80004bc: ea42 4201 orr.w r2, r2, r1, lsl #16
80004c0: 4542 cmp r2, r8
80004c2: d229 bcs.n 8000518 <__udivmoddi4+0x2e4>
80004c4: 18ba adds r2, r7, r2
80004c6: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff
80004ca: d2c4 bcs.n 8000456 <__udivmoddi4+0x222>
80004cc: 4542 cmp r2, r8
80004ce: d2c2 bcs.n 8000456 <__udivmoddi4+0x222>
80004d0: f1a9 0102 sub.w r1, r9, #2
80004d4: 443a add r2, r7
80004d6: e7be b.n 8000456 <__udivmoddi4+0x222>
80004d8: 45f0 cmp r8, lr
80004da: d29d bcs.n 8000418 <__udivmoddi4+0x1e4>
80004dc: ebbe 0302 subs.w r3, lr, r2
80004e0: eb6c 0c07 sbc.w ip, ip, r7
80004e4: 3801 subs r0, #1
80004e6: 46e1 mov r9, ip
80004e8: e796 b.n 8000418 <__udivmoddi4+0x1e4>
80004ea: eba7 0909 sub.w r9, r7, r9
80004ee: 4449 add r1, r9
80004f0: f1a8 0c02 sub.w ip, r8, #2
80004f4: fbb1 f9fe udiv r9, r1, lr
80004f8: fb09 f804 mul.w r8, r9, r4
80004fc: e7db b.n 80004b6 <__udivmoddi4+0x282>
80004fe: 4673 mov r3, lr
8000500: e77f b.n 8000402 <__udivmoddi4+0x1ce>
8000502: 4650 mov r0, sl
8000504: e766 b.n 80003d4 <__udivmoddi4+0x1a0>
8000506: 4608 mov r0, r1
8000508: e6fd b.n 8000306 <__udivmoddi4+0xd2>
800050a: 443b add r3, r7
800050c: 3a02 subs r2, #2
800050e: e733 b.n 8000378 <__udivmoddi4+0x144>
8000510: f1ac 0c02 sub.w ip, ip, #2
8000514: 443b add r3, r7
8000516: e71c b.n 8000352 <__udivmoddi4+0x11e>
8000518: 4649 mov r1, r9
800051a: e79c b.n 8000456 <__udivmoddi4+0x222>
800051c: eba1 0109 sub.w r1, r1, r9
8000520: 46c4 mov ip, r8
8000522: fbb1 f9fe udiv r9, r1, lr
8000526: fb09 f804 mul.w r8, r9, r4
800052a: e7c4 b.n 80004b6 <__udivmoddi4+0x282>
0800052c <__aeabi_idiv0>:
800052c: 4770 bx lr
800052e: bf00 nop
08000530 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8000530: b580 push {r7, lr}
8000532: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8000534: f000 fe56 bl 80011e4 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8000538: f000 f838 bl 80005ac <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
800053c: f000 fa4e bl 80009dc <MX_GPIO_Init>
MX_TIM2_Init();
8000540: f000 f8ce bl 80006e0 <MX_TIM2_Init>
MX_TIM3_Init();
8000544: f000 f924 bl 8000790 <MX_TIM3_Init>
MX_UART4_Init();
8000548: f000 f976 bl 8000838 <MX_UART4_Init>
MX_UART5_Init();
800054c: f000 f99e bl 800088c <MX_UART5_Init>
MX_USART1_UART_Init();
8000550: f000 f9c6 bl 80008e0 <MX_USART1_UART_Init>
MX_USART2_UART_Init();
8000554: f000 f9ee bl 8000934 <MX_USART2_UART_Init>
MX_I2C1_Init();
8000558: f000 f894 bl 8000684 <MX_I2C1_Init>
MX_USART3_UART_Init();
800055c: f000 fa14 bl 8000988 <MX_USART3_UART_Init>
MX_USB_DEVICE_Init();
8000560: f007 fe50 bl 8008204 <MX_USB_DEVICE_Init>
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
if (MODE != MODE_INACTIVE){
8000564: 4b0e ldr r3, [pc, #56] @ (80005a0 <main+0x70>)
8000566: 781b ldrb r3, [r3, #0]
8000568: b2db uxtb r3, r3
800056a: 2b00 cmp r3, #0
800056c: d010 beq.n 8000590 <main+0x60>
//Reset Report
resetReport();
800056e: f000 fb61 bl 8000c34 <resetReport>
//TODO: Append Child Module Reports
matrixScan();
8000572: f000 fb07 bl 8000b84 <matrixScan>
switch (MODE){
8000576: 4b0a ldr r3, [pc, #40] @ (80005a0 <main+0x70>)
8000578: 781b ldrb r3, [r3, #0]
800057a: b2db uxtb r3, r3
800057c: 2b01 cmp r3, #1
800057e: d001 beq.n 8000584 <main+0x54>
8000580: 2b02 cmp r3, #2
8000582: e005 b.n 8000590 <main+0x60>
//TODO: Check heartbeat signal from parent.
break;
case MODE_MAINBOARD:
//Send to USB
USBD_HID_SendReport(&hUsbDeviceFS, (uint8_t*)&REPORT, sizeof(REPORT));
8000584: 220f movs r2, #15
8000586: 4907 ldr r1, [pc, #28] @ (80005a4 <main+0x74>)
8000588: 4807 ldr r0, [pc, #28] @ (80005a8 <main+0x78>)
800058a: f006 fa5b bl 8006a44 <USBD_HID_SendReport>
break;
800058e: bf00 nop
}
//TODO: Send heartbeat signal to child nodes
}else{ //INACTIVE Mode
//TODO: Request parents
}
HAL_Delay(USBD_HID_GetPollingInterval(&hUsbDeviceFS));
8000590: 4805 ldr r0, [pc, #20] @ (80005a8 <main+0x78>)
8000592: f006 fa87 bl 8006aa4 <USBD_HID_GetPollingInterval>
8000596: 4603 mov r3, r0
8000598: 4618 mov r0, r3
800059a: f000 fe95 bl 80012c8 <HAL_Delay>
if (MODE != MODE_INACTIVE){
800059e: e7e1 b.n 8000564 <main+0x34>
80005a0: 20000024 .word 0x20000024
80005a4: 200003a0 .word 0x200003a0
80005a8: 200003b8 .word 0x200003b8
080005ac <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
80005ac: b580 push {r7, lr}
80005ae: b094 sub sp, #80 @ 0x50
80005b0: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
80005b2: f107 031c add.w r3, r7, #28
80005b6: 2234 movs r2, #52 @ 0x34
80005b8: 2100 movs r1, #0
80005ba: 4618 mov r0, r3
80005bc: f008 fad0 bl 8008b60 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
80005c0: f107 0308 add.w r3, r7, #8
80005c4: 2200 movs r2, #0
80005c6: 601a str r2, [r3, #0]
80005c8: 605a str r2, [r3, #4]
80005ca: 609a str r2, [r3, #8]
80005cc: 60da str r2, [r3, #12]
80005ce: 611a str r2, [r3, #16]
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
80005d0: 2300 movs r3, #0
80005d2: 607b str r3, [r7, #4]
80005d4: 4b29 ldr r3, [pc, #164] @ (800067c <SystemClock_Config+0xd0>)
80005d6: 6c1b ldr r3, [r3, #64] @ 0x40
80005d8: 4a28 ldr r2, [pc, #160] @ (800067c <SystemClock_Config+0xd0>)
80005da: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80005de: 6413 str r3, [r2, #64] @ 0x40
80005e0: 4b26 ldr r3, [pc, #152] @ (800067c <SystemClock_Config+0xd0>)
80005e2: 6c1b ldr r3, [r3, #64] @ 0x40
80005e4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80005e8: 607b str r3, [r7, #4]
80005ea: 687b ldr r3, [r7, #4]
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
80005ec: 2300 movs r3, #0
80005ee: 603b str r3, [r7, #0]
80005f0: 4b23 ldr r3, [pc, #140] @ (8000680 <SystemClock_Config+0xd4>)
80005f2: 681b ldr r3, [r3, #0]
80005f4: f423 4340 bic.w r3, r3, #49152 @ 0xc000
80005f8: 4a21 ldr r2, [pc, #132] @ (8000680 <SystemClock_Config+0xd4>)
80005fa: f443 4380 orr.w r3, r3, #16384 @ 0x4000
80005fe: 6013 str r3, [r2, #0]
8000600: 4b1f ldr r3, [pc, #124] @ (8000680 <SystemClock_Config+0xd4>)
8000602: 681b ldr r3, [r3, #0]
8000604: f403 4340 and.w r3, r3, #49152 @ 0xc000
8000608: 603b str r3, [r7, #0]
800060a: 683b ldr r3, [r7, #0]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
800060c: 2301 movs r3, #1
800060e: 61fb str r3, [r7, #28]
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8000610: f44f 3380 mov.w r3, #65536 @ 0x10000
8000614: 623b str r3, [r7, #32]
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8000616: 2302 movs r3, #2
8000618: 637b str r3, [r7, #52] @ 0x34
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
800061a: f44f 0380 mov.w r3, #4194304 @ 0x400000
800061e: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLM = 4;
8000620: 2304 movs r3, #4
8000622: 63fb str r3, [r7, #60] @ 0x3c
RCC_OscInitStruct.PLL.PLLN = 96;
8000624: 2360 movs r3, #96 @ 0x60
8000626: 643b str r3, [r7, #64] @ 0x40
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
8000628: 2302 movs r3, #2
800062a: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLQ = 4;
800062c: 2304 movs r3, #4
800062e: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLR = 2;
8000630: 2302 movs r3, #2
8000632: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8000634: f107 031c add.w r3, r7, #28
8000638: 4618 mov r0, r3
800063a: f003 fb7f bl 8003d3c <HAL_RCC_OscConfig>
800063e: 4603 mov r3, r0
8000640: 2b00 cmp r3, #0
8000642: d001 beq.n 8000648 <SystemClock_Config+0x9c>
{
Error_Handler();
8000644: f000 fb06 bl 8000c54 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8000648: 230f movs r3, #15
800064a: 60bb str r3, [r7, #8]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
800064c: 2302 movs r3, #2
800064e: 60fb str r3, [r7, #12]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;
8000650: 2380 movs r3, #128 @ 0x80
8000652: 613b str r3, [r7, #16]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
8000654: f44f 5380 mov.w r3, #4096 @ 0x1000
8000658: 617b str r3, [r7, #20]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
800065a: 2300 movs r3, #0
800065c: 61bb str r3, [r7, #24]
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
800065e: f107 0308 add.w r3, r7, #8
8000662: 2101 movs r1, #1
8000664: 4618 mov r0, r3
8000666: f002 fcf5 bl 8003054 <HAL_RCC_ClockConfig>
800066a: 4603 mov r3, r0
800066c: 2b00 cmp r3, #0
800066e: d001 beq.n 8000674 <SystemClock_Config+0xc8>
{
Error_Handler();
8000670: f000 faf0 bl 8000c54 <Error_Handler>
}
}
8000674: bf00 nop
8000676: 3750 adds r7, #80 @ 0x50
8000678: 46bd mov sp, r7
800067a: bd80 pop {r7, pc}
800067c: 40023800 .word 0x40023800
8000680: 40007000 .word 0x40007000
08000684 <MX_I2C1_Init>:
* @brief I2C1 Initialization Function
* @param None
* @retval None
*/
static void MX_I2C1_Init(void)
{
8000684: b580 push {r7, lr}
8000686: af00 add r7, sp, #0
/* USER CODE END I2C1_Init 0 */
/* USER CODE BEGIN I2C1_Init 1 */
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
8000688: 4b12 ldr r3, [pc, #72] @ (80006d4 <MX_I2C1_Init+0x50>)
800068a: 4a13 ldr r2, [pc, #76] @ (80006d8 <MX_I2C1_Init+0x54>)
800068c: 601a str r2, [r3, #0]
hi2c1.Init.ClockSpeed = 100000;
800068e: 4b11 ldr r3, [pc, #68] @ (80006d4 <MX_I2C1_Init+0x50>)
8000690: 4a12 ldr r2, [pc, #72] @ (80006dc <MX_I2C1_Init+0x58>)
8000692: 605a str r2, [r3, #4]
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
8000694: 4b0f ldr r3, [pc, #60] @ (80006d4 <MX_I2C1_Init+0x50>)
8000696: 2200 movs r2, #0
8000698: 609a str r2, [r3, #8]
hi2c1.Init.OwnAddress1 = 0;
800069a: 4b0e ldr r3, [pc, #56] @ (80006d4 <MX_I2C1_Init+0x50>)
800069c: 2200 movs r2, #0
800069e: 60da str r2, [r3, #12]
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
80006a0: 4b0c ldr r3, [pc, #48] @ (80006d4 <MX_I2C1_Init+0x50>)
80006a2: f44f 4280 mov.w r2, #16384 @ 0x4000
80006a6: 611a str r2, [r3, #16]
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
80006a8: 4b0a ldr r3, [pc, #40] @ (80006d4 <MX_I2C1_Init+0x50>)
80006aa: 2200 movs r2, #0
80006ac: 615a str r2, [r3, #20]
hi2c1.Init.OwnAddress2 = 0;
80006ae: 4b09 ldr r3, [pc, #36] @ (80006d4 <MX_I2C1_Init+0x50>)
80006b0: 2200 movs r2, #0
80006b2: 619a str r2, [r3, #24]
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
80006b4: 4b07 ldr r3, [pc, #28] @ (80006d4 <MX_I2C1_Init+0x50>)
80006b6: 2200 movs r2, #0
80006b8: 61da str r2, [r3, #28]
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
80006ba: 4b06 ldr r3, [pc, #24] @ (80006d4 <MX_I2C1_Init+0x50>)
80006bc: 2200 movs r2, #0
80006be: 621a str r2, [r3, #32]
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
80006c0: 4804 ldr r0, [pc, #16] @ (80006d4 <MX_I2C1_Init+0x50>)
80006c2: f001 f8fd bl 80018c0 <HAL_I2C_Init>
80006c6: 4603 mov r3, r0
80006c8: 2b00 cmp r3, #0
80006ca: d001 beq.n 80006d0 <MX_I2C1_Init+0x4c>
{
Error_Handler();
80006cc: f000 fac2 bl 8000c54 <Error_Handler>
}
/* USER CODE BEGIN I2C1_Init 2 */
/* USER CODE END I2C1_Init 2 */
}
80006d0: bf00 nop
80006d2: bd80 pop {r7, pc}
80006d4: 20000154 .word 0x20000154
80006d8: 40005400 .word 0x40005400
80006dc: 000186a0 .word 0x000186a0
080006e0 <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
80006e0: b580 push {r7, lr}
80006e2: b08a sub sp, #40 @ 0x28
80006e4: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_MasterConfigTypeDef sMasterConfig = {0};
80006e6: f107 0320 add.w r3, r7, #32
80006ea: 2200 movs r2, #0
80006ec: 601a str r2, [r3, #0]
80006ee: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
80006f0: 1d3b adds r3, r7, #4
80006f2: 2200 movs r2, #0
80006f4: 601a str r2, [r3, #0]
80006f6: 605a str r2, [r3, #4]
80006f8: 609a str r2, [r3, #8]
80006fa: 60da str r2, [r3, #12]
80006fc: 611a str r2, [r3, #16]
80006fe: 615a str r2, [r3, #20]
8000700: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8000702: 4b22 ldr r3, [pc, #136] @ (800078c <MX_TIM2_Init+0xac>)
8000704: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8000708: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
800070a: 4b20 ldr r3, [pc, #128] @ (800078c <MX_TIM2_Init+0xac>)
800070c: 2200 movs r2, #0
800070e: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
8000710: 4b1e ldr r3, [pc, #120] @ (800078c <MX_TIM2_Init+0xac>)
8000712: 2200 movs r2, #0
8000714: 609a str r2, [r3, #8]
htim2.Init.Period = 4294967295;
8000716: 4b1d ldr r3, [pc, #116] @ (800078c <MX_TIM2_Init+0xac>)
8000718: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
800071c: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
800071e: 4b1b ldr r3, [pc, #108] @ (800078c <MX_TIM2_Init+0xac>)
8000720: 2200 movs r2, #0
8000722: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8000724: 4b19 ldr r3, [pc, #100] @ (800078c <MX_TIM2_Init+0xac>)
8000726: 2200 movs r2, #0
8000728: 619a str r2, [r3, #24]
if (HAL_TIM_OC_Init(&htim2) != HAL_OK)
800072a: 4818 ldr r0, [pc, #96] @ (800078c <MX_TIM2_Init+0xac>)
800072c: f003 fda4 bl 8004278 <HAL_TIM_OC_Init>
8000730: 4603 mov r3, r0
8000732: 2b00 cmp r3, #0
8000734: d001 beq.n 800073a <MX_TIM2_Init+0x5a>
{
Error_Handler();
8000736: f000 fa8d bl 8000c54 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
800073a: 2300 movs r3, #0
800073c: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
800073e: 2300 movs r3, #0
8000740: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
8000742: f107 0320 add.w r3, r7, #32
8000746: 4619 mov r1, r3
8000748: 4810 ldr r0, [pc, #64] @ (800078c <MX_TIM2_Init+0xac>)
800074a: f004 f93d bl 80049c8 <HAL_TIMEx_MasterConfigSynchronization>
800074e: 4603 mov r3, r0
8000750: 2b00 cmp r3, #0
8000752: d001 beq.n 8000758 <MX_TIM2_Init+0x78>
{
Error_Handler();
8000754: f000 fa7e bl 8000c54 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_FORCED_ACTIVE;
8000758: 2350 movs r3, #80 @ 0x50
800075a: 607b str r3, [r7, #4]
sConfigOC.Pulse = 0;
800075c: 2300 movs r3, #0
800075e: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8000760: 2300 movs r3, #0
8000762: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
8000764: 2300 movs r3, #0
8000766: 617b str r3, [r7, #20]
if (HAL_TIM_OC_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8000768: 1d3b adds r3, r7, #4
800076a: 2200 movs r2, #0
800076c: 4619 mov r1, r3
800076e: 4807 ldr r0, [pc, #28] @ (800078c <MX_TIM2_Init+0xac>)
8000770: f003 fe78 bl 8004464 <HAL_TIM_OC_ConfigChannel>
8000774: 4603 mov r3, r0
8000776: 2b00 cmp r3, #0
8000778: d001 beq.n 800077e <MX_TIM2_Init+0x9e>
{
Error_Handler();
800077a: f000 fa6b bl 8000c54 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
800077e: 4803 ldr r0, [pc, #12] @ (800078c <MX_TIM2_Init+0xac>)
8000780: f000 fb46 bl 8000e10 <HAL_TIM_MspPostInit>
}
8000784: bf00 nop
8000786: 3728 adds r7, #40 @ 0x28
8000788: 46bd mov sp, r7
800078a: bd80 pop {r7, pc}
800078c: 200001a8 .word 0x200001a8
08000790 <MX_TIM3_Init>:
* @brief TIM3 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM3_Init(void)
{
8000790: b580 push {r7, lr}
8000792: b08c sub sp, #48 @ 0x30
8000794: af00 add r7, sp, #0
/* USER CODE BEGIN TIM3_Init 0 */
/* USER CODE END TIM3_Init 0 */
TIM_Encoder_InitTypeDef sConfig = {0};
8000796: f107 030c add.w r3, r7, #12
800079a: 2224 movs r2, #36 @ 0x24
800079c: 2100 movs r1, #0
800079e: 4618 mov r0, r3
80007a0: f008 f9de bl 8008b60 <memset>
TIM_MasterConfigTypeDef sMasterConfig = {0};
80007a4: 1d3b adds r3, r7, #4
80007a6: 2200 movs r2, #0
80007a8: 601a str r2, [r3, #0]
80007aa: 605a str r2, [r3, #4]
/* USER CODE BEGIN TIM3_Init 1 */
/* USER CODE END TIM3_Init 1 */
htim3.Instance = TIM3;
80007ac: 4b20 ldr r3, [pc, #128] @ (8000830 <MX_TIM3_Init+0xa0>)
80007ae: 4a21 ldr r2, [pc, #132] @ (8000834 <MX_TIM3_Init+0xa4>)
80007b0: 601a str r2, [r3, #0]
htim3.Init.Prescaler = 0;
80007b2: 4b1f ldr r3, [pc, #124] @ (8000830 <MX_TIM3_Init+0xa0>)
80007b4: 2200 movs r2, #0
80007b6: 605a str r2, [r3, #4]
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
80007b8: 4b1d ldr r3, [pc, #116] @ (8000830 <MX_TIM3_Init+0xa0>)
80007ba: 2200 movs r2, #0
80007bc: 609a str r2, [r3, #8]
htim3.Init.Period = 65535;
80007be: 4b1c ldr r3, [pc, #112] @ (8000830 <MX_TIM3_Init+0xa0>)
80007c0: f64f 72ff movw r2, #65535 @ 0xffff
80007c4: 60da str r2, [r3, #12]
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80007c6: 4b1a ldr r3, [pc, #104] @ (8000830 <MX_TIM3_Init+0xa0>)
80007c8: 2200 movs r2, #0
80007ca: 611a str r2, [r3, #16]
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80007cc: 4b18 ldr r3, [pc, #96] @ (8000830 <MX_TIM3_Init+0xa0>)
80007ce: 2200 movs r2, #0
80007d0: 619a str r2, [r3, #24]
sConfig.EncoderMode = TIM_ENCODERMODE_TI1;
80007d2: 2301 movs r3, #1
80007d4: 60fb str r3, [r7, #12]
sConfig.IC1Polarity = TIM_ICPOLARITY_RISING;
80007d6: 2300 movs r3, #0
80007d8: 613b str r3, [r7, #16]
sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI;
80007da: 2301 movs r3, #1
80007dc: 617b str r3, [r7, #20]
sConfig.IC1Prescaler = TIM_ICPSC_DIV1;
80007de: 2300 movs r3, #0
80007e0: 61bb str r3, [r7, #24]
sConfig.IC1Filter = 0;
80007e2: 2300 movs r3, #0
80007e4: 61fb str r3, [r7, #28]
sConfig.IC2Polarity = TIM_ICPOLARITY_RISING;
80007e6: 2300 movs r3, #0
80007e8: 623b str r3, [r7, #32]
sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI;
80007ea: 2301 movs r3, #1
80007ec: 627b str r3, [r7, #36] @ 0x24
sConfig.IC2Prescaler = TIM_ICPSC_DIV1;
80007ee: 2300 movs r3, #0
80007f0: 62bb str r3, [r7, #40] @ 0x28
sConfig.IC2Filter = 0;
80007f2: 2300 movs r3, #0
80007f4: 62fb str r3, [r7, #44] @ 0x2c
if (HAL_TIM_Encoder_Init(&htim3, &sConfig) != HAL_OK)
80007f6: f107 030c add.w r3, r7, #12
80007fa: 4619 mov r1, r3
80007fc: 480c ldr r0, [pc, #48] @ (8000830 <MX_TIM3_Init+0xa0>)
80007fe: f003 fd8a bl 8004316 <HAL_TIM_Encoder_Init>
8000802: 4603 mov r3, r0
8000804: 2b00 cmp r3, #0
8000806: d001 beq.n 800080c <MX_TIM3_Init+0x7c>
{
Error_Handler();
8000808: f000 fa24 bl 8000c54 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
800080c: 2300 movs r3, #0
800080e: 607b str r3, [r7, #4]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8000810: 2300 movs r3, #0
8000812: 60bb str r3, [r7, #8]
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
8000814: 1d3b adds r3, r7, #4
8000816: 4619 mov r1, r3
8000818: 4805 ldr r0, [pc, #20] @ (8000830 <MX_TIM3_Init+0xa0>)
800081a: f004 f8d5 bl 80049c8 <HAL_TIMEx_MasterConfigSynchronization>
800081e: 4603 mov r3, r0
8000820: 2b00 cmp r3, #0
8000822: d001 beq.n 8000828 <MX_TIM3_Init+0x98>
{
Error_Handler();
8000824: f000 fa16 bl 8000c54 <Error_Handler>
}
/* USER CODE BEGIN TIM3_Init 2 */
/* USER CODE END TIM3_Init 2 */
}
8000828: bf00 nop
800082a: 3730 adds r7, #48 @ 0x30
800082c: 46bd mov sp, r7
800082e: bd80 pop {r7, pc}
8000830: 200001f0 .word 0x200001f0
8000834: 40000400 .word 0x40000400
08000838 <MX_UART4_Init>:
* @brief UART4 Initialization Function
* @param None
* @retval None
*/
static void MX_UART4_Init(void)
{
8000838: b580 push {r7, lr}
800083a: af00 add r7, sp, #0
/* USER CODE END UART4_Init 0 */
/* USER CODE BEGIN UART4_Init 1 */
/* USER CODE END UART4_Init 1 */
huart4.Instance = UART4;
800083c: 4b11 ldr r3, [pc, #68] @ (8000884 <MX_UART4_Init+0x4c>)
800083e: 4a12 ldr r2, [pc, #72] @ (8000888 <MX_UART4_Init+0x50>)
8000840: 601a str r2, [r3, #0]
huart4.Init.BaudRate = 115200;
8000842: 4b10 ldr r3, [pc, #64] @ (8000884 <MX_UART4_Init+0x4c>)
8000844: f44f 32e1 mov.w r2, #115200 @ 0x1c200
8000848: 605a str r2, [r3, #4]
huart4.Init.WordLength = UART_WORDLENGTH_8B;
800084a: 4b0e ldr r3, [pc, #56] @ (8000884 <MX_UART4_Init+0x4c>)
800084c: 2200 movs r2, #0
800084e: 609a str r2, [r3, #8]
huart4.Init.StopBits = UART_STOPBITS_1;
8000850: 4b0c ldr r3, [pc, #48] @ (8000884 <MX_UART4_Init+0x4c>)
8000852: 2200 movs r2, #0
8000854: 60da str r2, [r3, #12]
huart4.Init.Parity = UART_PARITY_NONE;
8000856: 4b0b ldr r3, [pc, #44] @ (8000884 <MX_UART4_Init+0x4c>)
8000858: 2200 movs r2, #0
800085a: 611a str r2, [r3, #16]
huart4.Init.Mode = UART_MODE_TX_RX;
800085c: 4b09 ldr r3, [pc, #36] @ (8000884 <MX_UART4_Init+0x4c>)
800085e: 220c movs r2, #12
8000860: 615a str r2, [r3, #20]
huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8000862: 4b08 ldr r3, [pc, #32] @ (8000884 <MX_UART4_Init+0x4c>)
8000864: 2200 movs r2, #0
8000866: 619a str r2, [r3, #24]
huart4.Init.OverSampling = UART_OVERSAMPLING_16;
8000868: 4b06 ldr r3, [pc, #24] @ (8000884 <MX_UART4_Init+0x4c>)
800086a: 2200 movs r2, #0
800086c: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart4) != HAL_OK)
800086e: 4805 ldr r0, [pc, #20] @ (8000884 <MX_UART4_Init+0x4c>)
8000870: f004 f926 bl 8004ac0 <HAL_UART_Init>
8000874: 4603 mov r3, r0
8000876: 2b00 cmp r3, #0
8000878: d001 beq.n 800087e <MX_UART4_Init+0x46>
{
Error_Handler();
800087a: f000 f9eb bl 8000c54 <Error_Handler>
}
/* USER CODE BEGIN UART4_Init 2 */
/* USER CODE END UART4_Init 2 */
}
800087e: bf00 nop
8000880: bd80 pop {r7, pc}
8000882: bf00 nop
8000884: 20000238 .word 0x20000238
8000888: 40004c00 .word 0x40004c00
0800088c <MX_UART5_Init>:
* @brief UART5 Initialization Function
* @param None
* @retval None
*/
static void MX_UART5_Init(void)
{
800088c: b580 push {r7, lr}
800088e: af00 add r7, sp, #0
/* USER CODE END UART5_Init 0 */
/* USER CODE BEGIN UART5_Init 1 */
/* USER CODE END UART5_Init 1 */
huart5.Instance = UART5;
8000890: 4b11 ldr r3, [pc, #68] @ (80008d8 <MX_UART5_Init+0x4c>)
8000892: 4a12 ldr r2, [pc, #72] @ (80008dc <MX_UART5_Init+0x50>)
8000894: 601a str r2, [r3, #0]
huart5.Init.BaudRate = 115200;
8000896: 4b10 ldr r3, [pc, #64] @ (80008d8 <MX_UART5_Init+0x4c>)
8000898: f44f 32e1 mov.w r2, #115200 @ 0x1c200
800089c: 605a str r2, [r3, #4]
huart5.Init.WordLength = UART_WORDLENGTH_8B;
800089e: 4b0e ldr r3, [pc, #56] @ (80008d8 <MX_UART5_Init+0x4c>)
80008a0: 2200 movs r2, #0
80008a2: 609a str r2, [r3, #8]
huart5.Init.StopBits = UART_STOPBITS_1;
80008a4: 4b0c ldr r3, [pc, #48] @ (80008d8 <MX_UART5_Init+0x4c>)
80008a6: 2200 movs r2, #0
80008a8: 60da str r2, [r3, #12]
huart5.Init.Parity = UART_PARITY_NONE;
80008aa: 4b0b ldr r3, [pc, #44] @ (80008d8 <MX_UART5_Init+0x4c>)
80008ac: 2200 movs r2, #0
80008ae: 611a str r2, [r3, #16]
huart5.Init.Mode = UART_MODE_TX_RX;
80008b0: 4b09 ldr r3, [pc, #36] @ (80008d8 <MX_UART5_Init+0x4c>)
80008b2: 220c movs r2, #12
80008b4: 615a str r2, [r3, #20]
huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE;
80008b6: 4b08 ldr r3, [pc, #32] @ (80008d8 <MX_UART5_Init+0x4c>)
80008b8: 2200 movs r2, #0
80008ba: 619a str r2, [r3, #24]
huart5.Init.OverSampling = UART_OVERSAMPLING_16;
80008bc: 4b06 ldr r3, [pc, #24] @ (80008d8 <MX_UART5_Init+0x4c>)
80008be: 2200 movs r2, #0
80008c0: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart5) != HAL_OK)
80008c2: 4805 ldr r0, [pc, #20] @ (80008d8 <MX_UART5_Init+0x4c>)
80008c4: f004 f8fc bl 8004ac0 <HAL_UART_Init>
80008c8: 4603 mov r3, r0
80008ca: 2b00 cmp r3, #0
80008cc: d001 beq.n 80008d2 <MX_UART5_Init+0x46>
{
Error_Handler();
80008ce: f000 f9c1 bl 8000c54 <Error_Handler>
}
/* USER CODE BEGIN UART5_Init 2 */
/* USER CODE END UART5_Init 2 */
}
80008d2: bf00 nop
80008d4: bd80 pop {r7, pc}
80008d6: bf00 nop
80008d8: 20000280 .word 0x20000280
80008dc: 40005000 .word 0x40005000
080008e0 <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
80008e0: b580 push {r7, lr}
80008e2: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
80008e4: 4b11 ldr r3, [pc, #68] @ (800092c <MX_USART1_UART_Init+0x4c>)
80008e6: 4a12 ldr r2, [pc, #72] @ (8000930 <MX_USART1_UART_Init+0x50>)
80008e8: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
80008ea: 4b10 ldr r3, [pc, #64] @ (800092c <MX_USART1_UART_Init+0x4c>)
80008ec: f44f 32e1 mov.w r2, #115200 @ 0x1c200
80008f0: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
80008f2: 4b0e ldr r3, [pc, #56] @ (800092c <MX_USART1_UART_Init+0x4c>)
80008f4: 2200 movs r2, #0
80008f6: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
80008f8: 4b0c ldr r3, [pc, #48] @ (800092c <MX_USART1_UART_Init+0x4c>)
80008fa: 2200 movs r2, #0
80008fc: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
80008fe: 4b0b ldr r3, [pc, #44] @ (800092c <MX_USART1_UART_Init+0x4c>)
8000900: 2200 movs r2, #0
8000902: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
8000904: 4b09 ldr r3, [pc, #36] @ (800092c <MX_USART1_UART_Init+0x4c>)
8000906: 220c movs r2, #12
8000908: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
800090a: 4b08 ldr r3, [pc, #32] @ (800092c <MX_USART1_UART_Init+0x4c>)
800090c: 2200 movs r2, #0
800090e: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
8000910: 4b06 ldr r3, [pc, #24] @ (800092c <MX_USART1_UART_Init+0x4c>)
8000912: 2200 movs r2, #0
8000914: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK)
8000916: 4805 ldr r0, [pc, #20] @ (800092c <MX_USART1_UART_Init+0x4c>)
8000918: f004 f8d2 bl 8004ac0 <HAL_UART_Init>
800091c: 4603 mov r3, r0
800091e: 2b00 cmp r3, #0
8000920: d001 beq.n 8000926 <MX_USART1_UART_Init+0x46>
{
Error_Handler();
8000922: f000 f997 bl 8000c54 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
8000926: bf00 nop
8000928: bd80 pop {r7, pc}
800092a: bf00 nop
800092c: 200002c8 .word 0x200002c8
8000930: 40011000 .word 0x40011000
08000934 <MX_USART2_UART_Init>:
* @brief USART2 Initialization Function
* @param None
* @retval None
*/
static void MX_USART2_UART_Init(void)
{
8000934: b580 push {r7, lr}
8000936: af00 add r7, sp, #0
/* USER CODE END USART2_Init 0 */
/* USER CODE BEGIN USART2_Init 1 */
/* USER CODE END USART2_Init 1 */
huart2.Instance = USART2;
8000938: 4b11 ldr r3, [pc, #68] @ (8000980 <MX_USART2_UART_Init+0x4c>)
800093a: 4a12 ldr r2, [pc, #72] @ (8000984 <MX_USART2_UART_Init+0x50>)
800093c: 601a str r2, [r3, #0]
huart2.Init.BaudRate = 115200;
800093e: 4b10 ldr r3, [pc, #64] @ (8000980 <MX_USART2_UART_Init+0x4c>)
8000940: f44f 32e1 mov.w r2, #115200 @ 0x1c200
8000944: 605a str r2, [r3, #4]
huart2.Init.WordLength = UART_WORDLENGTH_8B;
8000946: 4b0e ldr r3, [pc, #56] @ (8000980 <MX_USART2_UART_Init+0x4c>)
8000948: 2200 movs r2, #0
800094a: 609a str r2, [r3, #8]
huart2.Init.StopBits = UART_STOPBITS_1;
800094c: 4b0c ldr r3, [pc, #48] @ (8000980 <MX_USART2_UART_Init+0x4c>)
800094e: 2200 movs r2, #0
8000950: 60da str r2, [r3, #12]
huart2.Init.Parity = UART_PARITY_NONE;
8000952: 4b0b ldr r3, [pc, #44] @ (8000980 <MX_USART2_UART_Init+0x4c>)
8000954: 2200 movs r2, #0
8000956: 611a str r2, [r3, #16]
huart2.Init.Mode = UART_MODE_TX_RX;
8000958: 4b09 ldr r3, [pc, #36] @ (8000980 <MX_USART2_UART_Init+0x4c>)
800095a: 220c movs r2, #12
800095c: 615a str r2, [r3, #20]
huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE;
800095e: 4b08 ldr r3, [pc, #32] @ (8000980 <MX_USART2_UART_Init+0x4c>)
8000960: 2200 movs r2, #0
8000962: 619a str r2, [r3, #24]
huart2.Init.OverSampling = UART_OVERSAMPLING_16;
8000964: 4b06 ldr r3, [pc, #24] @ (8000980 <MX_USART2_UART_Init+0x4c>)
8000966: 2200 movs r2, #0
8000968: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart2) != HAL_OK)
800096a: 4805 ldr r0, [pc, #20] @ (8000980 <MX_USART2_UART_Init+0x4c>)
800096c: f004 f8a8 bl 8004ac0 <HAL_UART_Init>
8000970: 4603 mov r3, r0
8000972: 2b00 cmp r3, #0
8000974: d001 beq.n 800097a <MX_USART2_UART_Init+0x46>
{
Error_Handler();
8000976: f000 f96d bl 8000c54 <Error_Handler>
}
/* USER CODE BEGIN USART2_Init 2 */
/* USER CODE END USART2_Init 2 */
}
800097a: bf00 nop
800097c: bd80 pop {r7, pc}
800097e: bf00 nop
8000980: 20000310 .word 0x20000310
8000984: 40004400 .word 0x40004400
08000988 <MX_USART3_UART_Init>:
* @brief USART3 Initialization Function
* @param None
* @retval None
*/
static void MX_USART3_UART_Init(void)
{
8000988: b580 push {r7, lr}
800098a: af00 add r7, sp, #0
/* USER CODE END USART3_Init 0 */
/* USER CODE BEGIN USART3_Init 1 */
/* USER CODE END USART3_Init 1 */
huart3.Instance = USART3;
800098c: 4b11 ldr r3, [pc, #68] @ (80009d4 <MX_USART3_UART_Init+0x4c>)
800098e: 4a12 ldr r2, [pc, #72] @ (80009d8 <MX_USART3_UART_Init+0x50>)
8000990: 601a str r2, [r3, #0]
huart3.Init.BaudRate = 115200;
8000992: 4b10 ldr r3, [pc, #64] @ (80009d4 <MX_USART3_UART_Init+0x4c>)
8000994: f44f 32e1 mov.w r2, #115200 @ 0x1c200
8000998: 605a str r2, [r3, #4]
huart3.Init.WordLength = UART_WORDLENGTH_8B;
800099a: 4b0e ldr r3, [pc, #56] @ (80009d4 <MX_USART3_UART_Init+0x4c>)
800099c: 2200 movs r2, #0
800099e: 609a str r2, [r3, #8]
huart3.Init.StopBits = UART_STOPBITS_1;
80009a0: 4b0c ldr r3, [pc, #48] @ (80009d4 <MX_USART3_UART_Init+0x4c>)
80009a2: 2200 movs r2, #0
80009a4: 60da str r2, [r3, #12]
huart3.Init.Parity = UART_PARITY_NONE;
80009a6: 4b0b ldr r3, [pc, #44] @ (80009d4 <MX_USART3_UART_Init+0x4c>)
80009a8: 2200 movs r2, #0
80009aa: 611a str r2, [r3, #16]
huart3.Init.Mode = UART_MODE_TX_RX;
80009ac: 4b09 ldr r3, [pc, #36] @ (80009d4 <MX_USART3_UART_Init+0x4c>)
80009ae: 220c movs r2, #12
80009b0: 615a str r2, [r3, #20]
huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE;
80009b2: 4b08 ldr r3, [pc, #32] @ (80009d4 <MX_USART3_UART_Init+0x4c>)
80009b4: 2200 movs r2, #0
80009b6: 619a str r2, [r3, #24]
huart3.Init.OverSampling = UART_OVERSAMPLING_16;
80009b8: 4b06 ldr r3, [pc, #24] @ (80009d4 <MX_USART3_UART_Init+0x4c>)
80009ba: 2200 movs r2, #0
80009bc: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart3) != HAL_OK)
80009be: 4805 ldr r0, [pc, #20] @ (80009d4 <MX_USART3_UART_Init+0x4c>)
80009c0: f004 f87e bl 8004ac0 <HAL_UART_Init>
80009c4: 4603 mov r3, r0
80009c6: 2b00 cmp r3, #0
80009c8: d001 beq.n 80009ce <MX_USART3_UART_Init+0x46>
{
Error_Handler();
80009ca: f000 f943 bl 8000c54 <Error_Handler>
}
/* USER CODE BEGIN USART3_Init 2 */
/* USER CODE END USART3_Init 2 */
}
80009ce: bf00 nop
80009d0: bd80 pop {r7, pc}
80009d2: bf00 nop
80009d4: 20000358 .word 0x20000358
80009d8: 40004800 .word 0x40004800
080009dc <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
80009dc: b580 push {r7, lr}
80009de: b08a sub sp, #40 @ 0x28
80009e0: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
80009e2: f107 0314 add.w r3, r7, #20
80009e6: 2200 movs r2, #0
80009e8: 601a str r2, [r3, #0]
80009ea: 605a str r2, [r3, #4]
80009ec: 609a str r2, [r3, #8]
80009ee: 60da str r2, [r3, #12]
80009f0: 611a str r2, [r3, #16]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOH_CLK_ENABLE();
80009f2: 2300 movs r3, #0
80009f4: 613b str r3, [r7, #16]
80009f6: 4b45 ldr r3, [pc, #276] @ (8000b0c <MX_GPIO_Init+0x130>)
80009f8: 6b1b ldr r3, [r3, #48] @ 0x30
80009fa: 4a44 ldr r2, [pc, #272] @ (8000b0c <MX_GPIO_Init+0x130>)
80009fc: f043 0380 orr.w r3, r3, #128 @ 0x80
8000a00: 6313 str r3, [r2, #48] @ 0x30
8000a02: 4b42 ldr r3, [pc, #264] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a04: 6b1b ldr r3, [r3, #48] @ 0x30
8000a06: f003 0380 and.w r3, r3, #128 @ 0x80
8000a0a: 613b str r3, [r7, #16]
8000a0c: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000a0e: 2300 movs r3, #0
8000a10: 60fb str r3, [r7, #12]
8000a12: 4b3e ldr r3, [pc, #248] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a14: 6b1b ldr r3, [r3, #48] @ 0x30
8000a16: 4a3d ldr r2, [pc, #244] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a18: f043 0301 orr.w r3, r3, #1
8000a1c: 6313 str r3, [r2, #48] @ 0x30
8000a1e: 4b3b ldr r3, [pc, #236] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a20: 6b1b ldr r3, [r3, #48] @ 0x30
8000a22: f003 0301 and.w r3, r3, #1
8000a26: 60fb str r3, [r7, #12]
8000a28: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOC_CLK_ENABLE();
8000a2a: 2300 movs r3, #0
8000a2c: 60bb str r3, [r7, #8]
8000a2e: 4b37 ldr r3, [pc, #220] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a30: 6b1b ldr r3, [r3, #48] @ 0x30
8000a32: 4a36 ldr r2, [pc, #216] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a34: f043 0304 orr.w r3, r3, #4
8000a38: 6313 str r3, [r2, #48] @ 0x30
8000a3a: 4b34 ldr r3, [pc, #208] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a3c: 6b1b ldr r3, [r3, #48] @ 0x30
8000a3e: f003 0304 and.w r3, r3, #4
8000a42: 60bb str r3, [r7, #8]
8000a44: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOB_CLK_ENABLE();
8000a46: 2300 movs r3, #0
8000a48: 607b str r3, [r7, #4]
8000a4a: 4b30 ldr r3, [pc, #192] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a4c: 6b1b ldr r3, [r3, #48] @ 0x30
8000a4e: 4a2f ldr r2, [pc, #188] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a50: f043 0302 orr.w r3, r3, #2
8000a54: 6313 str r3, [r2, #48] @ 0x30
8000a56: 4b2d ldr r3, [pc, #180] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a58: 6b1b ldr r3, [r3, #48] @ 0x30
8000a5a: f003 0302 and.w r3, r3, #2
8000a5e: 607b str r3, [r7, #4]
8000a60: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOD_CLK_ENABLE();
8000a62: 2300 movs r3, #0
8000a64: 603b str r3, [r7, #0]
8000a66: 4b29 ldr r3, [pc, #164] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a68: 6b1b ldr r3, [r3, #48] @ 0x30
8000a6a: 4a28 ldr r2, [pc, #160] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a6c: f043 0308 orr.w r3, r3, #8
8000a70: 6313 str r3, [r2, #48] @ 0x30
8000a72: 4b26 ldr r3, [pc, #152] @ (8000b0c <MX_GPIO_Init+0x130>)
8000a74: 6b1b ldr r3, [r3, #48] @ 0x30
8000a76: f003 0308 and.w r3, r3, #8
8000a7a: 603b str r3, [r7, #0]
8000a7c: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9, GPIO_PIN_RESET);
8000a7e: 2200 movs r2, #0
8000a80: f44f 7170 mov.w r1, #960 @ 0x3c0
8000a84: 4822 ldr r0, [pc, #136] @ (8000b10 <MX_GPIO_Init+0x134>)
8000a86: f000 ff01 bl 800188c <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET);
8000a8a: 2200 movs r2, #0
8000a8c: f44f 7180 mov.w r1, #256 @ 0x100
8000a90: 4820 ldr r0, [pc, #128] @ (8000b14 <MX_GPIO_Init+0x138>)
8000a92: f000 fefb bl 800188c <HAL_GPIO_WritePin>
/*Configure GPIO pins : PC4 PC5 */
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
8000a96: 2330 movs r3, #48 @ 0x30
8000a98: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000a9a: 2300 movs r3, #0
8000a9c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
8000a9e: 2302 movs r3, #2
8000aa0: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8000aa2: f107 0314 add.w r3, r7, #20
8000aa6: 4619 mov r1, r3
8000aa8: 4819 ldr r0, [pc, #100] @ (8000b10 <MX_GPIO_Init+0x134>)
8000aaa: f000 fd43 bl 8001534 <HAL_GPIO_Init>
/*Configure GPIO pins : PB0 PB1 PB2 PB10 */
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_10;
8000aae: f240 4307 movw r3, #1031 @ 0x407
8000ab2: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8000ab4: 2300 movs r3, #0
8000ab6: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
8000ab8: 2302 movs r3, #2
8000aba: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000abc: f107 0314 add.w r3, r7, #20
8000ac0: 4619 mov r1, r3
8000ac2: 4815 ldr r0, [pc, #84] @ (8000b18 <MX_GPIO_Init+0x13c>)
8000ac4: f000 fd36 bl 8001534 <HAL_GPIO_Init>
/*Configure GPIO pins : PC6 PC7 PC8 PC9 */
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
8000ac8: f44f 7370 mov.w r3, #960 @ 0x3c0
8000acc: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000ace: 2301 movs r3, #1
8000ad0: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
8000ad2: 2302 movs r3, #2
8000ad4: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000ad6: 2300 movs r3, #0
8000ad8: 623b str r3, [r7, #32]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8000ada: f107 0314 add.w r3, r7, #20
8000ade: 4619 mov r1, r3
8000ae0: 480b ldr r0, [pc, #44] @ (8000b10 <MX_GPIO_Init+0x134>)
8000ae2: f000 fd27 bl 8001534 <HAL_GPIO_Init>
/*Configure GPIO pin : PA8 */
GPIO_InitStruct.Pin = GPIO_PIN_8;
8000ae6: f44f 7380 mov.w r3, #256 @ 0x100
8000aea: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000aec: 2301 movs r3, #1
8000aee: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_PULLDOWN;
8000af0: 2302 movs r3, #2
8000af2: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000af4: 2300 movs r3, #0
8000af6: 623b str r3, [r7, #32]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000af8: f107 0314 add.w r3, r7, #20
8000afc: 4619 mov r1, r3
8000afe: 4805 ldr r0, [pc, #20] @ (8000b14 <MX_GPIO_Init+0x138>)
8000b00: f000 fd18 bl 8001534 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
8000b04: bf00 nop
8000b06: 3728 adds r7, #40 @ 0x28
8000b08: 46bd mov sp, r7
8000b0a: bd80 pop {r7, pc}
8000b0c: 40023800 .word 0x40023800
8000b10: 40020800 .word 0x40020800
8000b14: 40020000 .word 0x40020000
8000b18: 40020400 .word 0x40020400
08000b1c <addUSBReport>:
}
uint8_t Q_Peek(HIDQueue* q){
return 0;
}
void addUSBReport(uint8_t usageID){
8000b1c: b480 push {r7}
8000b1e: b085 sub sp, #20
8000b20: af00 add r7, sp, #0
8000b22: 4603 mov r3, r0
8000b24: 71fb strb r3, [r7, #7]
if(usageID < 0x04 || usageID > 0x73) return; //Usage ID is out of bounds
8000b26: 79fb ldrb r3, [r7, #7]
8000b28: 2b03 cmp r3, #3
8000b2a: d922 bls.n 8000b72 <addUSBReport+0x56>
8000b2c: 79fb ldrb r3, [r7, #7]
8000b2e: 2b73 cmp r3, #115 @ 0x73
8000b30: d81f bhi.n 8000b72 <addUSBReport+0x56>
uint16_t bit_index = usageID - 0x04; //Offset, UsageID starts with 0x04. Gives us the actual value of the bit
8000b32: 79fb ldrb r3, [r7, #7]
8000b34: b29b uxth r3, r3
8000b36: 3b04 subs r3, #4
8000b38: 81fb strh r3, [r7, #14]
uint8_t byte_index = bit_index/8; //Calculates which byte in the REPORT array
8000b3a: 89fb ldrh r3, [r7, #14]
8000b3c: 08db lsrs r3, r3, #3
8000b3e: b29b uxth r3, r3
8000b40: 737b strb r3, [r7, #13]
uint8_t bit_offset = bit_index%8; //Calculates which bits in the REPORT[byte_index] should be set/unset
8000b42: 89fb ldrh r3, [r7, #14]
8000b44: b2db uxtb r3, r3
8000b46: f003 0307 and.w r3, r3, #7
8000b4a: 733b strb r3, [r7, #12]
REPORT.KEYPRESS[byte_index] |= (1 << bit_offset);
8000b4c: 7b7b ldrb r3, [r7, #13]
8000b4e: 4a0c ldr r2, [pc, #48] @ (8000b80 <addUSBReport+0x64>)
8000b50: 4413 add r3, r2
8000b52: 789b ldrb r3, [r3, #2]
8000b54: b25a sxtb r2, r3
8000b56: 7b3b ldrb r3, [r7, #12]
8000b58: 2101 movs r1, #1
8000b5a: fa01 f303 lsl.w r3, r1, r3
8000b5e: b25b sxtb r3, r3
8000b60: 4313 orrs r3, r2
8000b62: b25a sxtb r2, r3
8000b64: 7b7b ldrb r3, [r7, #13]
8000b66: b2d1 uxtb r1, r2
8000b68: 4a05 ldr r2, [pc, #20] @ (8000b80 <addUSBReport+0x64>)
8000b6a: 4413 add r3, r2
8000b6c: 460a mov r2, r1
8000b6e: 709a strb r2, [r3, #2]
8000b70: e000 b.n 8000b74 <addUSBReport+0x58>
if(usageID < 0x04 || usageID > 0x73) return; //Usage ID is out of bounds
8000b72: bf00 nop
}
8000b74: 3714 adds r7, #20
8000b76: 46bd mov sp, r7
8000b78: f85d 7b04 ldr.w r7, [sp], #4
8000b7c: 4770 bx lr
8000b7e: bf00 nop
8000b80: 200003a0 .word 0x200003a0
08000b84 <matrixScan>:
void matrixScan(void){
8000b84: b580 push {r7, lr}
8000b86: b082 sub sp, #8
8000b88: af00 add r7, sp, #0
for (uint8_t col = 0; col < COL; col++){
8000b8a: 2300 movs r3, #0
8000b8c: 71fb strb r3, [r7, #7]
8000b8e: e042 b.n 8000c16 <matrixScan+0x92>
HAL_GPIO_WritePin(COLUMN_PINS[col].GPIOx, COLUMN_PINS[col].PIN, GPIO_PIN_SET);
8000b90: 79fb ldrb r3, [r7, #7]
8000b92: 4a25 ldr r2, [pc, #148] @ (8000c28 <matrixScan+0xa4>)
8000b94: f852 0033 ldr.w r0, [r2, r3, lsl #3]
8000b98: 79fb ldrb r3, [r7, #7]
8000b9a: 4a23 ldr r2, [pc, #140] @ (8000c28 <matrixScan+0xa4>)
8000b9c: 00db lsls r3, r3, #3
8000b9e: 4413 add r3, r2
8000ba0: 889b ldrh r3, [r3, #4]
8000ba2: 2201 movs r2, #1
8000ba4: 4619 mov r1, r3
8000ba6: f000 fe71 bl 800188c <HAL_GPIO_WritePin>
HAL_Delay(1);
8000baa: 2001 movs r0, #1
8000bac: f000 fb8c bl 80012c8 <HAL_Delay>
for(uint8_t row = 0; row < ROW; row++){
8000bb0: 2300 movs r3, #0
8000bb2: 71bb strb r3, [r7, #6]
8000bb4: e01c b.n 8000bf0 <matrixScan+0x6c>
if(HAL_GPIO_ReadPin(ROW_PINS[row].GPIOx, ROW_PINS[row].PIN)){
8000bb6: 79bb ldrb r3, [r7, #6]
8000bb8: 4a1c ldr r2, [pc, #112] @ (8000c2c <matrixScan+0xa8>)
8000bba: f852 2033 ldr.w r2, [r2, r3, lsl #3]
8000bbe: 79bb ldrb r3, [r7, #6]
8000bc0: 491a ldr r1, [pc, #104] @ (8000c2c <matrixScan+0xa8>)
8000bc2: 00db lsls r3, r3, #3
8000bc4: 440b add r3, r1
8000bc6: 889b ldrh r3, [r3, #4]
8000bc8: 4619 mov r1, r3
8000bca: 4610 mov r0, r2
8000bcc: f000 fe46 bl 800185c <HAL_GPIO_ReadPin>
8000bd0: 4603 mov r3, r0
8000bd2: 2b00 cmp r3, #0
8000bd4: d009 beq.n 8000bea <matrixScan+0x66>
addUSBReport(KEYCODES[row][col]);
8000bd6: 79ba ldrb r2, [r7, #6]
8000bd8: 79fb ldrb r3, [r7, #7]
8000bda: 4915 ldr r1, [pc, #84] @ (8000c30 <matrixScan+0xac>)
8000bdc: 0052 lsls r2, r2, #1
8000bde: 440a add r2, r1
8000be0: 4413 add r3, r2
8000be2: 781b ldrb r3, [r3, #0]
8000be4: 4618 mov r0, r3
8000be6: f7ff ff99 bl 8000b1c <addUSBReport>
for(uint8_t row = 0; row < ROW; row++){
8000bea: 79bb ldrb r3, [r7, #6]
8000bec: 3301 adds r3, #1
8000bee: 71bb strb r3, [r7, #6]
8000bf0: 79bb ldrb r3, [r7, #6]
8000bf2: 2b01 cmp r3, #1
8000bf4: d9df bls.n 8000bb6 <matrixScan+0x32>
}
}
HAL_GPIO_WritePin(COLUMN_PINS[col].GPIOx, COLUMN_PINS[col].PIN, GPIO_PIN_RESET);
8000bf6: 79fb ldrb r3, [r7, #7]
8000bf8: 4a0b ldr r2, [pc, #44] @ (8000c28 <matrixScan+0xa4>)
8000bfa: f852 0033 ldr.w r0, [r2, r3, lsl #3]
8000bfe: 79fb ldrb r3, [r7, #7]
8000c00: 4a09 ldr r2, [pc, #36] @ (8000c28 <matrixScan+0xa4>)
8000c02: 00db lsls r3, r3, #3
8000c04: 4413 add r3, r2
8000c06: 889b ldrh r3, [r3, #4]
8000c08: 2200 movs r2, #0
8000c0a: 4619 mov r1, r3
8000c0c: f000 fe3e bl 800188c <HAL_GPIO_WritePin>
for (uint8_t col = 0; col < COL; col++){
8000c10: 79fb ldrb r3, [r7, #7]
8000c12: 3301 adds r3, #1
8000c14: 71fb strb r3, [r7, #7]
8000c16: 79fb ldrb r3, [r7, #7]
8000c18: 2b01 cmp r3, #1
8000c1a: d9b9 bls.n 8000b90 <matrixScan+0xc>
}
}
8000c1c: bf00 nop
8000c1e: bf00 nop
8000c20: 3708 adds r7, #8
8000c22: 46bd mov sp, r7
8000c24: bd80 pop {r7, pc}
8000c26: bf00 nop
8000c28: 20000010 .word 0x20000010
8000c2c: 20000000 .word 0x20000000
8000c30: 20000020 .word 0x20000020
08000c34 <resetReport>:
void resetReport(void){
8000c34: b580 push {r7, lr}
8000c36: af00 add r7, sp, #0
REPORT.MODIFIER = 0;
8000c38: 4b04 ldr r3, [pc, #16] @ (8000c4c <resetReport+0x18>)
8000c3a: 2200 movs r2, #0
8000c3c: 701a strb r2, [r3, #0]
memset(REPORT.KEYPRESS, 0, sizeof(REPORT.KEYPRESS));
8000c3e: 220d movs r2, #13
8000c40: 2100 movs r1, #0
8000c42: 4803 ldr r0, [pc, #12] @ (8000c50 <resetReport+0x1c>)
8000c44: f007 ff8c bl 8008b60 <memset>
}
8000c48: bf00 nop
8000c4a: bd80 pop {r7, pc}
8000c4c: 200003a0 .word 0x200003a0
8000c50: 200003a2 .word 0x200003a2
08000c54 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8000c54: b480 push {r7}
8000c56: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting special-purpose register PRIMASK.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8000c58: b672 cpsid i
}
8000c5a: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
8000c5c: bf00 nop
8000c5e: e7fd b.n 8000c5c <Error_Handler+0x8>
08000c60 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8000c60: b480 push {r7}
8000c62: b083 sub sp, #12
8000c64: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
8000c66: 2300 movs r3, #0
8000c68: 607b str r3, [r7, #4]
8000c6a: 4b10 ldr r3, [pc, #64] @ (8000cac <HAL_MspInit+0x4c>)
8000c6c: 6c5b ldr r3, [r3, #68] @ 0x44
8000c6e: 4a0f ldr r2, [pc, #60] @ (8000cac <HAL_MspInit+0x4c>)
8000c70: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8000c74: 6453 str r3, [r2, #68] @ 0x44
8000c76: 4b0d ldr r3, [pc, #52] @ (8000cac <HAL_MspInit+0x4c>)
8000c78: 6c5b ldr r3, [r3, #68] @ 0x44
8000c7a: f403 4380 and.w r3, r3, #16384 @ 0x4000
8000c7e: 607b str r3, [r7, #4]
8000c80: 687b ldr r3, [r7, #4]
__HAL_RCC_PWR_CLK_ENABLE();
8000c82: 2300 movs r3, #0
8000c84: 603b str r3, [r7, #0]
8000c86: 4b09 ldr r3, [pc, #36] @ (8000cac <HAL_MspInit+0x4c>)
8000c88: 6c1b ldr r3, [r3, #64] @ 0x40
8000c8a: 4a08 ldr r2, [pc, #32] @ (8000cac <HAL_MspInit+0x4c>)
8000c8c: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8000c90: 6413 str r3, [r2, #64] @ 0x40
8000c92: 4b06 ldr r3, [pc, #24] @ (8000cac <HAL_MspInit+0x4c>)
8000c94: 6c1b ldr r3, [r3, #64] @ 0x40
8000c96: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8000c9a: 603b str r3, [r7, #0]
8000c9c: 683b ldr r3, [r7, #0]
/* System interrupt init*/
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8000c9e: bf00 nop
8000ca0: 370c adds r7, #12
8000ca2: 46bd mov sp, r7
8000ca4: f85d 7b04 ldr.w r7, [sp], #4
8000ca8: 4770 bx lr
8000caa: bf00 nop
8000cac: 40023800 .word 0x40023800
08000cb0 <HAL_I2C_MspInit>:
* This function configures the hardware resources used in this example
* @param hi2c: I2C handle pointer
* @retval None
*/
void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
{
8000cb0: b580 push {r7, lr}
8000cb2: b08a sub sp, #40 @ 0x28
8000cb4: af00 add r7, sp, #0
8000cb6: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000cb8: f107 0314 add.w r3, r7, #20
8000cbc: 2200 movs r2, #0
8000cbe: 601a str r2, [r3, #0]
8000cc0: 605a str r2, [r3, #4]
8000cc2: 609a str r2, [r3, #8]
8000cc4: 60da str r2, [r3, #12]
8000cc6: 611a str r2, [r3, #16]
if(hi2c->Instance==I2C1)
8000cc8: 687b ldr r3, [r7, #4]
8000cca: 681b ldr r3, [r3, #0]
8000ccc: 4a19 ldr r2, [pc, #100] @ (8000d34 <HAL_I2C_MspInit+0x84>)
8000cce: 4293 cmp r3, r2
8000cd0: d12b bne.n 8000d2a <HAL_I2C_MspInit+0x7a>
{
/* USER CODE BEGIN I2C1_MspInit 0 */
/* USER CODE END I2C1_MspInit 0 */
__HAL_RCC_GPIOB_CLK_ENABLE();
8000cd2: 2300 movs r3, #0
8000cd4: 613b str r3, [r7, #16]
8000cd6: 4b18 ldr r3, [pc, #96] @ (8000d38 <HAL_I2C_MspInit+0x88>)
8000cd8: 6b1b ldr r3, [r3, #48] @ 0x30
8000cda: 4a17 ldr r2, [pc, #92] @ (8000d38 <HAL_I2C_MspInit+0x88>)
8000cdc: f043 0302 orr.w r3, r3, #2
8000ce0: 6313 str r3, [r2, #48] @ 0x30
8000ce2: 4b15 ldr r3, [pc, #84] @ (8000d38 <HAL_I2C_MspInit+0x88>)
8000ce4: 6b1b ldr r3, [r3, #48] @ 0x30
8000ce6: f003 0302 and.w r3, r3, #2
8000cea: 613b str r3, [r7, #16]
8000cec: 693b ldr r3, [r7, #16]
/**I2C1 GPIO Configuration
PB6 ------> I2C1_SCL
PB7 ------> I2C1_SDA
*/
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
8000cee: 23c0 movs r3, #192 @ 0xc0
8000cf0: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
8000cf2: 2312 movs r3, #18
8000cf4: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000cf6: 2300 movs r3, #0
8000cf8: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000cfa: 2303 movs r3, #3
8000cfc: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
8000cfe: 2304 movs r3, #4
8000d00: 627b str r3, [r7, #36] @ 0x24
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000d02: f107 0314 add.w r3, r7, #20
8000d06: 4619 mov r1, r3
8000d08: 480c ldr r0, [pc, #48] @ (8000d3c <HAL_I2C_MspInit+0x8c>)
8000d0a: f000 fc13 bl 8001534 <HAL_GPIO_Init>
/* Peripheral clock enable */
__HAL_RCC_I2C1_CLK_ENABLE();
8000d0e: 2300 movs r3, #0
8000d10: 60fb str r3, [r7, #12]
8000d12: 4b09 ldr r3, [pc, #36] @ (8000d38 <HAL_I2C_MspInit+0x88>)
8000d14: 6c1b ldr r3, [r3, #64] @ 0x40
8000d16: 4a08 ldr r2, [pc, #32] @ (8000d38 <HAL_I2C_MspInit+0x88>)
8000d18: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
8000d1c: 6413 str r3, [r2, #64] @ 0x40
8000d1e: 4b06 ldr r3, [pc, #24] @ (8000d38 <HAL_I2C_MspInit+0x88>)
8000d20: 6c1b ldr r3, [r3, #64] @ 0x40
8000d22: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8000d26: 60fb str r3, [r7, #12]
8000d28: 68fb ldr r3, [r7, #12]
/* USER CODE END I2C1_MspInit 1 */
}
}
8000d2a: bf00 nop
8000d2c: 3728 adds r7, #40 @ 0x28
8000d2e: 46bd mov sp, r7
8000d30: bd80 pop {r7, pc}
8000d32: bf00 nop
8000d34: 40005400 .word 0x40005400
8000d38: 40023800 .word 0x40023800
8000d3c: 40020400 .word 0x40020400
08000d40 <HAL_TIM_OC_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_oc: TIM_OC handle pointer
* @retval None
*/
void HAL_TIM_OC_MspInit(TIM_HandleTypeDef* htim_oc)
{
8000d40: b480 push {r7}
8000d42: b085 sub sp, #20
8000d44: af00 add r7, sp, #0
8000d46: 6078 str r0, [r7, #4]
if(htim_oc->Instance==TIM2)
8000d48: 687b ldr r3, [r7, #4]
8000d4a: 681b ldr r3, [r3, #0]
8000d4c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8000d50: d10d bne.n 8000d6e <HAL_TIM_OC_MspInit+0x2e>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
8000d52: 2300 movs r3, #0
8000d54: 60fb str r3, [r7, #12]
8000d56: 4b09 ldr r3, [pc, #36] @ (8000d7c <HAL_TIM_OC_MspInit+0x3c>)
8000d58: 6c1b ldr r3, [r3, #64] @ 0x40
8000d5a: 4a08 ldr r2, [pc, #32] @ (8000d7c <HAL_TIM_OC_MspInit+0x3c>)
8000d5c: f043 0301 orr.w r3, r3, #1
8000d60: 6413 str r3, [r2, #64] @ 0x40
8000d62: 4b06 ldr r3, [pc, #24] @ (8000d7c <HAL_TIM_OC_MspInit+0x3c>)
8000d64: 6c1b ldr r3, [r3, #64] @ 0x40
8000d66: f003 0301 and.w r3, r3, #1
8000d6a: 60fb str r3, [r7, #12]
8000d6c: 68fb ldr r3, [r7, #12]
/* USER CODE END TIM2_MspInit 1 */
}
}
8000d6e: bf00 nop
8000d70: 3714 adds r7, #20
8000d72: 46bd mov sp, r7
8000d74: f85d 7b04 ldr.w r7, [sp], #4
8000d78: 4770 bx lr
8000d7a: bf00 nop
8000d7c: 40023800 .word 0x40023800
08000d80 <HAL_TIM_Encoder_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_encoder: TIM_Encoder handle pointer
* @retval None
*/
void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder)
{
8000d80: b580 push {r7, lr}
8000d82: b08a sub sp, #40 @ 0x28
8000d84: af00 add r7, sp, #0
8000d86: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000d88: f107 0314 add.w r3, r7, #20
8000d8c: 2200 movs r2, #0
8000d8e: 601a str r2, [r3, #0]
8000d90: 605a str r2, [r3, #4]
8000d92: 609a str r2, [r3, #8]
8000d94: 60da str r2, [r3, #12]
8000d96: 611a str r2, [r3, #16]
if(htim_encoder->Instance==TIM3)
8000d98: 687b ldr r3, [r7, #4]
8000d9a: 681b ldr r3, [r3, #0]
8000d9c: 4a19 ldr r2, [pc, #100] @ (8000e04 <HAL_TIM_Encoder_MspInit+0x84>)
8000d9e: 4293 cmp r3, r2
8000da0: d12b bne.n 8000dfa <HAL_TIM_Encoder_MspInit+0x7a>
{
/* USER CODE BEGIN TIM3_MspInit 0 */
/* USER CODE END TIM3_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM3_CLK_ENABLE();
8000da2: 2300 movs r3, #0
8000da4: 613b str r3, [r7, #16]
8000da6: 4b18 ldr r3, [pc, #96] @ (8000e08 <HAL_TIM_Encoder_MspInit+0x88>)
8000da8: 6c1b ldr r3, [r3, #64] @ 0x40
8000daa: 4a17 ldr r2, [pc, #92] @ (8000e08 <HAL_TIM_Encoder_MspInit+0x88>)
8000dac: f043 0302 orr.w r3, r3, #2
8000db0: 6413 str r3, [r2, #64] @ 0x40
8000db2: 4b15 ldr r3, [pc, #84] @ (8000e08 <HAL_TIM_Encoder_MspInit+0x88>)
8000db4: 6c1b ldr r3, [r3, #64] @ 0x40
8000db6: f003 0302 and.w r3, r3, #2
8000dba: 613b str r3, [r7, #16]
8000dbc: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000dbe: 2300 movs r3, #0
8000dc0: 60fb str r3, [r7, #12]
8000dc2: 4b11 ldr r3, [pc, #68] @ (8000e08 <HAL_TIM_Encoder_MspInit+0x88>)
8000dc4: 6b1b ldr r3, [r3, #48] @ 0x30
8000dc6: 4a10 ldr r2, [pc, #64] @ (8000e08 <HAL_TIM_Encoder_MspInit+0x88>)
8000dc8: f043 0301 orr.w r3, r3, #1
8000dcc: 6313 str r3, [r2, #48] @ 0x30
8000dce: 4b0e ldr r3, [pc, #56] @ (8000e08 <HAL_TIM_Encoder_MspInit+0x88>)
8000dd0: 6b1b ldr r3, [r3, #48] @ 0x30
8000dd2: f003 0301 and.w r3, r3, #1
8000dd6: 60fb str r3, [r7, #12]
8000dd8: 68fb ldr r3, [r7, #12]
/**TIM3 GPIO Configuration
PA6 ------> TIM3_CH1
PA7 ------> TIM3_CH2
*/
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
8000dda: 23c0 movs r3, #192 @ 0xc0
8000ddc: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000dde: 2302 movs r3, #2
8000de0: 61bb str r3, [r7, #24]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000de2: 2300 movs r3, #0
8000de4: 61fb str r3, [r7, #28]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000de6: 2300 movs r3, #0
8000de8: 623b str r3, [r7, #32]
GPIO_InitStruct.Alternate = GPIO_AF2_TIM3;
8000dea: 2302 movs r3, #2
8000dec: 627b str r3, [r7, #36] @ 0x24
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000dee: f107 0314 add.w r3, r7, #20
8000df2: 4619 mov r1, r3
8000df4: 4805 ldr r0, [pc, #20] @ (8000e0c <HAL_TIM_Encoder_MspInit+0x8c>)
8000df6: f000 fb9d bl 8001534 <HAL_GPIO_Init>
/* USER CODE END TIM3_MspInit 1 */
}
}
8000dfa: bf00 nop
8000dfc: 3728 adds r7, #40 @ 0x28
8000dfe: 46bd mov sp, r7
8000e00: bd80 pop {r7, pc}
8000e02: bf00 nop
8000e04: 40000400 .word 0x40000400
8000e08: 40023800 .word 0x40023800
8000e0c: 40020000 .word 0x40020000
08000e10 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8000e10: b580 push {r7, lr}
8000e12: b088 sub sp, #32
8000e14: af00 add r7, sp, #0
8000e16: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000e18: f107 030c add.w r3, r7, #12
8000e1c: 2200 movs r2, #0
8000e1e: 601a str r2, [r3, #0]
8000e20: 605a str r2, [r3, #4]
8000e22: 609a str r2, [r3, #8]
8000e24: 60da str r2, [r3, #12]
8000e26: 611a str r2, [r3, #16]
if(htim->Instance==TIM2)
8000e28: 687b ldr r3, [r7, #4]
8000e2a: 681b ldr r3, [r3, #0]
8000e2c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8000e30: d11d bne.n 8000e6e <HAL_TIM_MspPostInit+0x5e>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8000e32: 2300 movs r3, #0
8000e34: 60bb str r3, [r7, #8]
8000e36: 4b10 ldr r3, [pc, #64] @ (8000e78 <HAL_TIM_MspPostInit+0x68>)
8000e38: 6b1b ldr r3, [r3, #48] @ 0x30
8000e3a: 4a0f ldr r2, [pc, #60] @ (8000e78 <HAL_TIM_MspPostInit+0x68>)
8000e3c: f043 0301 orr.w r3, r3, #1
8000e40: 6313 str r3, [r2, #48] @ 0x30
8000e42: 4b0d ldr r3, [pc, #52] @ (8000e78 <HAL_TIM_MspPostInit+0x68>)
8000e44: 6b1b ldr r3, [r3, #48] @ 0x30
8000e46: f003 0301 and.w r3, r3, #1
8000e4a: 60bb str r3, [r7, #8]
8000e4c: 68bb ldr r3, [r7, #8]
/**TIM2 GPIO Configuration
PA5 ------> TIM2_CH1
*/
GPIO_InitStruct.Pin = GPIO_PIN_5;
8000e4e: 2320 movs r3, #32
8000e50: 60fb str r3, [r7, #12]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000e52: 2302 movs r3, #2
8000e54: 613b str r3, [r7, #16]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000e56: 2300 movs r3, #0
8000e58: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000e5a: 2300 movs r3, #0
8000e5c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Alternate = GPIO_AF1_TIM2;
8000e5e: 2301 movs r3, #1
8000e60: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000e62: f107 030c add.w r3, r7, #12
8000e66: 4619 mov r1, r3
8000e68: 4804 ldr r0, [pc, #16] @ (8000e7c <HAL_TIM_MspPostInit+0x6c>)
8000e6a: f000 fb63 bl 8001534 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM2_MspPostInit 1 */
/* USER CODE END TIM2_MspPostInit 1 */
}
}
8000e6e: bf00 nop
8000e70: 3720 adds r7, #32
8000e72: 46bd mov sp, r7
8000e74: bd80 pop {r7, pc}
8000e76: bf00 nop
8000e78: 40023800 .word 0x40023800
8000e7c: 40020000 .word 0x40020000
08000e80 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8000e80: b580 push {r7, lr}
8000e82: b092 sub sp, #72 @ 0x48
8000e84: af00 add r7, sp, #0
8000e86: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000e88: f107 0334 add.w r3, r7, #52 @ 0x34
8000e8c: 2200 movs r2, #0
8000e8e: 601a str r2, [r3, #0]
8000e90: 605a str r2, [r3, #4]
8000e92: 609a str r2, [r3, #8]
8000e94: 60da str r2, [r3, #12]
8000e96: 611a str r2, [r3, #16]
if(huart->Instance==UART4)
8000e98: 687b ldr r3, [r7, #4]
8000e9a: 681b ldr r3, [r3, #0]
8000e9c: 4a8d ldr r2, [pc, #564] @ (80010d4 <HAL_UART_MspInit+0x254>)
8000e9e: 4293 cmp r3, r2
8000ea0: d12c bne.n 8000efc <HAL_UART_MspInit+0x7c>
{
/* USER CODE BEGIN UART4_MspInit 0 */
/* USER CODE END UART4_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_UART4_CLK_ENABLE();
8000ea2: 2300 movs r3, #0
8000ea4: 633b str r3, [r7, #48] @ 0x30
8000ea6: 4b8c ldr r3, [pc, #560] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000ea8: 6c1b ldr r3, [r3, #64] @ 0x40
8000eaa: 4a8b ldr r2, [pc, #556] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000eac: f443 2300 orr.w r3, r3, #524288 @ 0x80000
8000eb0: 6413 str r3, [r2, #64] @ 0x40
8000eb2: 4b89 ldr r3, [pc, #548] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000eb4: 6c1b ldr r3, [r3, #64] @ 0x40
8000eb6: f403 2300 and.w r3, r3, #524288 @ 0x80000
8000eba: 633b str r3, [r7, #48] @ 0x30
8000ebc: 6b3b ldr r3, [r7, #48] @ 0x30
__HAL_RCC_GPIOA_CLK_ENABLE();
8000ebe: 2300 movs r3, #0
8000ec0: 62fb str r3, [r7, #44] @ 0x2c
8000ec2: 4b85 ldr r3, [pc, #532] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000ec4: 6b1b ldr r3, [r3, #48] @ 0x30
8000ec6: 4a84 ldr r2, [pc, #528] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000ec8: f043 0301 orr.w r3, r3, #1
8000ecc: 6313 str r3, [r2, #48] @ 0x30
8000ece: 4b82 ldr r3, [pc, #520] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000ed0: 6b1b ldr r3, [r3, #48] @ 0x30
8000ed2: f003 0301 and.w r3, r3, #1
8000ed6: 62fb str r3, [r7, #44] @ 0x2c
8000ed8: 6afb ldr r3, [r7, #44] @ 0x2c
/**UART4 GPIO Configuration
PA0-WKUP ------> UART4_TX
PA1 ------> UART4_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
8000eda: 2303 movs r3, #3
8000edc: 637b str r3, [r7, #52] @ 0x34
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000ede: 2302 movs r3, #2
8000ee0: 63bb str r3, [r7, #56] @ 0x38
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000ee2: 2300 movs r3, #0
8000ee4: 63fb str r3, [r7, #60] @ 0x3c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000ee6: 2303 movs r3, #3
8000ee8: 643b str r3, [r7, #64] @ 0x40
GPIO_InitStruct.Alternate = GPIO_AF8_UART4;
8000eea: 2308 movs r3, #8
8000eec: 647b str r3, [r7, #68] @ 0x44
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000eee: f107 0334 add.w r3, r7, #52 @ 0x34
8000ef2: 4619 mov r1, r3
8000ef4: 4879 ldr r0, [pc, #484] @ (80010dc <HAL_UART_MspInit+0x25c>)
8000ef6: f000 fb1d bl 8001534 <HAL_GPIO_Init>
/* USER CODE BEGIN USART3_MspInit 1 */
/* USER CODE END USART3_MspInit 1 */
}
}
8000efa: e0e7 b.n 80010cc <HAL_UART_MspInit+0x24c>
else if(huart->Instance==UART5)
8000efc: 687b ldr r3, [r7, #4]
8000efe: 681b ldr r3, [r3, #0]
8000f00: 4a77 ldr r2, [pc, #476] @ (80010e0 <HAL_UART_MspInit+0x260>)
8000f02: 4293 cmp r3, r2
8000f04: d14b bne.n 8000f9e <HAL_UART_MspInit+0x11e>
__HAL_RCC_UART5_CLK_ENABLE();
8000f06: 2300 movs r3, #0
8000f08: 62bb str r3, [r7, #40] @ 0x28
8000f0a: 4b73 ldr r3, [pc, #460] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000f0c: 6c1b ldr r3, [r3, #64] @ 0x40
8000f0e: 4a72 ldr r2, [pc, #456] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000f10: f443 1380 orr.w r3, r3, #1048576 @ 0x100000
8000f14: 6413 str r3, [r2, #64] @ 0x40
8000f16: 4b70 ldr r3, [pc, #448] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000f18: 6c1b ldr r3, [r3, #64] @ 0x40
8000f1a: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8000f1e: 62bb str r3, [r7, #40] @ 0x28
8000f20: 6abb ldr r3, [r7, #40] @ 0x28
__HAL_RCC_GPIOC_CLK_ENABLE();
8000f22: 2300 movs r3, #0
8000f24: 627b str r3, [r7, #36] @ 0x24
8000f26: 4b6c ldr r3, [pc, #432] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000f28: 6b1b ldr r3, [r3, #48] @ 0x30
8000f2a: 4a6b ldr r2, [pc, #428] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000f2c: f043 0304 orr.w r3, r3, #4
8000f30: 6313 str r3, [r2, #48] @ 0x30
8000f32: 4b69 ldr r3, [pc, #420] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000f34: 6b1b ldr r3, [r3, #48] @ 0x30
8000f36: f003 0304 and.w r3, r3, #4
8000f3a: 627b str r3, [r7, #36] @ 0x24
8000f3c: 6a7b ldr r3, [r7, #36] @ 0x24
__HAL_RCC_GPIOD_CLK_ENABLE();
8000f3e: 2300 movs r3, #0
8000f40: 623b str r3, [r7, #32]
8000f42: 4b65 ldr r3, [pc, #404] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000f44: 6b1b ldr r3, [r3, #48] @ 0x30
8000f46: 4a64 ldr r2, [pc, #400] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000f48: f043 0308 orr.w r3, r3, #8
8000f4c: 6313 str r3, [r2, #48] @ 0x30
8000f4e: 4b62 ldr r3, [pc, #392] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000f50: 6b1b ldr r3, [r3, #48] @ 0x30
8000f52: f003 0308 and.w r3, r3, #8
8000f56: 623b str r3, [r7, #32]
8000f58: 6a3b ldr r3, [r7, #32]
GPIO_InitStruct.Pin = GPIO_PIN_12;
8000f5a: f44f 5380 mov.w r3, #4096 @ 0x1000
8000f5e: 637b str r3, [r7, #52] @ 0x34
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000f60: 2302 movs r3, #2
8000f62: 63bb str r3, [r7, #56] @ 0x38
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000f64: 2300 movs r3, #0
8000f66: 63fb str r3, [r7, #60] @ 0x3c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000f68: 2303 movs r3, #3
8000f6a: 643b str r3, [r7, #64] @ 0x40
GPIO_InitStruct.Alternate = GPIO_AF8_UART5;
8000f6c: 2308 movs r3, #8
8000f6e: 647b str r3, [r7, #68] @ 0x44
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8000f70: f107 0334 add.w r3, r7, #52 @ 0x34
8000f74: 4619 mov r1, r3
8000f76: 485b ldr r0, [pc, #364] @ (80010e4 <HAL_UART_MspInit+0x264>)
8000f78: f000 fadc bl 8001534 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_2;
8000f7c: 2304 movs r3, #4
8000f7e: 637b str r3, [r7, #52] @ 0x34
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000f80: 2302 movs r3, #2
8000f82: 63bb str r3, [r7, #56] @ 0x38
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000f84: 2300 movs r3, #0
8000f86: 63fb str r3, [r7, #60] @ 0x3c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000f88: 2303 movs r3, #3
8000f8a: 643b str r3, [r7, #64] @ 0x40
GPIO_InitStruct.Alternate = GPIO_AF8_UART5;
8000f8c: 2308 movs r3, #8
8000f8e: 647b str r3, [r7, #68] @ 0x44
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
8000f90: f107 0334 add.w r3, r7, #52 @ 0x34
8000f94: 4619 mov r1, r3
8000f96: 4854 ldr r0, [pc, #336] @ (80010e8 <HAL_UART_MspInit+0x268>)
8000f98: f000 facc bl 8001534 <HAL_GPIO_Init>
}
8000f9c: e096 b.n 80010cc <HAL_UART_MspInit+0x24c>
else if(huart->Instance==USART1)
8000f9e: 687b ldr r3, [r7, #4]
8000fa0: 681b ldr r3, [r3, #0]
8000fa2: 4a52 ldr r2, [pc, #328] @ (80010ec <HAL_UART_MspInit+0x26c>)
8000fa4: 4293 cmp r3, r2
8000fa6: d12d bne.n 8001004 <HAL_UART_MspInit+0x184>
__HAL_RCC_USART1_CLK_ENABLE();
8000fa8: 2300 movs r3, #0
8000faa: 61fb str r3, [r7, #28]
8000fac: 4b4a ldr r3, [pc, #296] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000fae: 6c5b ldr r3, [r3, #68] @ 0x44
8000fb0: 4a49 ldr r2, [pc, #292] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000fb2: f043 0310 orr.w r3, r3, #16
8000fb6: 6453 str r3, [r2, #68] @ 0x44
8000fb8: 4b47 ldr r3, [pc, #284] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000fba: 6c5b ldr r3, [r3, #68] @ 0x44
8000fbc: f003 0310 and.w r3, r3, #16
8000fc0: 61fb str r3, [r7, #28]
8000fc2: 69fb ldr r3, [r7, #28]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000fc4: 2300 movs r3, #0
8000fc6: 61bb str r3, [r7, #24]
8000fc8: 4b43 ldr r3, [pc, #268] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000fca: 6b1b ldr r3, [r3, #48] @ 0x30
8000fcc: 4a42 ldr r2, [pc, #264] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000fce: f043 0301 orr.w r3, r3, #1
8000fd2: 6313 str r3, [r2, #48] @ 0x30
8000fd4: 4b40 ldr r3, [pc, #256] @ (80010d8 <HAL_UART_MspInit+0x258>)
8000fd6: 6b1b ldr r3, [r3, #48] @ 0x30
8000fd8: f003 0301 and.w r3, r3, #1
8000fdc: 61bb str r3, [r7, #24]
8000fde: 69bb ldr r3, [r7, #24]
GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
8000fe0: f44f 63c0 mov.w r3, #1536 @ 0x600
8000fe4: 637b str r3, [r7, #52] @ 0x34
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000fe6: 2302 movs r3, #2
8000fe8: 63bb str r3, [r7, #56] @ 0x38
GPIO_InitStruct.Pull = GPIO_NOPULL;
8000fea: 2300 movs r3, #0
8000fec: 63fb str r3, [r7, #60] @ 0x3c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8000fee: 2303 movs r3, #3
8000ff0: 643b str r3, [r7, #64] @ 0x40
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
8000ff2: 2307 movs r3, #7
8000ff4: 647b str r3, [r7, #68] @ 0x44
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000ff6: f107 0334 add.w r3, r7, #52 @ 0x34
8000ffa: 4619 mov r1, r3
8000ffc: 4837 ldr r0, [pc, #220] @ (80010dc <HAL_UART_MspInit+0x25c>)
8000ffe: f000 fa99 bl 8001534 <HAL_GPIO_Init>
}
8001002: e063 b.n 80010cc <HAL_UART_MspInit+0x24c>
else if(huart->Instance==USART2)
8001004: 687b ldr r3, [r7, #4]
8001006: 681b ldr r3, [r3, #0]
8001008: 4a39 ldr r2, [pc, #228] @ (80010f0 <HAL_UART_MspInit+0x270>)
800100a: 4293 cmp r3, r2
800100c: d12c bne.n 8001068 <HAL_UART_MspInit+0x1e8>
__HAL_RCC_USART2_CLK_ENABLE();
800100e: 2300 movs r3, #0
8001010: 617b str r3, [r7, #20]
8001012: 4b31 ldr r3, [pc, #196] @ (80010d8 <HAL_UART_MspInit+0x258>)
8001014: 6c1b ldr r3, [r3, #64] @ 0x40
8001016: 4a30 ldr r2, [pc, #192] @ (80010d8 <HAL_UART_MspInit+0x258>)
8001018: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800101c: 6413 str r3, [r2, #64] @ 0x40
800101e: 4b2e ldr r3, [pc, #184] @ (80010d8 <HAL_UART_MspInit+0x258>)
8001020: 6c1b ldr r3, [r3, #64] @ 0x40
8001022: f403 3300 and.w r3, r3, #131072 @ 0x20000
8001026: 617b str r3, [r7, #20]
8001028: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
800102a: 2300 movs r3, #0
800102c: 613b str r3, [r7, #16]
800102e: 4b2a ldr r3, [pc, #168] @ (80010d8 <HAL_UART_MspInit+0x258>)
8001030: 6b1b ldr r3, [r3, #48] @ 0x30
8001032: 4a29 ldr r2, [pc, #164] @ (80010d8 <HAL_UART_MspInit+0x258>)
8001034: f043 0301 orr.w r3, r3, #1
8001038: 6313 str r3, [r2, #48] @ 0x30
800103a: 4b27 ldr r3, [pc, #156] @ (80010d8 <HAL_UART_MspInit+0x258>)
800103c: 6b1b ldr r3, [r3, #48] @ 0x30
800103e: f003 0301 and.w r3, r3, #1
8001042: 613b str r3, [r7, #16]
8001044: 693b ldr r3, [r7, #16]
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
8001046: 230c movs r3, #12
8001048: 637b str r3, [r7, #52] @ 0x34
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
800104a: 2302 movs r3, #2
800104c: 63bb str r3, [r7, #56] @ 0x38
GPIO_InitStruct.Pull = GPIO_NOPULL;
800104e: 2300 movs r3, #0
8001050: 63fb str r3, [r7, #60] @ 0x3c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
8001052: 2303 movs r3, #3
8001054: 643b str r3, [r7, #64] @ 0x40
GPIO_InitStruct.Alternate = GPIO_AF7_USART2;
8001056: 2307 movs r3, #7
8001058: 647b str r3, [r7, #68] @ 0x44
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800105a: f107 0334 add.w r3, r7, #52 @ 0x34
800105e: 4619 mov r1, r3
8001060: 481e ldr r0, [pc, #120] @ (80010dc <HAL_UART_MspInit+0x25c>)
8001062: f000 fa67 bl 8001534 <HAL_GPIO_Init>
}
8001066: e031 b.n 80010cc <HAL_UART_MspInit+0x24c>
else if(huart->Instance==USART3)
8001068: 687b ldr r3, [r7, #4]
800106a: 681b ldr r3, [r3, #0]
800106c: 4a21 ldr r2, [pc, #132] @ (80010f4 <HAL_UART_MspInit+0x274>)
800106e: 4293 cmp r3, r2
8001070: d12c bne.n 80010cc <HAL_UART_MspInit+0x24c>
__HAL_RCC_USART3_CLK_ENABLE();
8001072: 2300 movs r3, #0
8001074: 60fb str r3, [r7, #12]
8001076: 4b18 ldr r3, [pc, #96] @ (80010d8 <HAL_UART_MspInit+0x258>)
8001078: 6c1b ldr r3, [r3, #64] @ 0x40
800107a: 4a17 ldr r2, [pc, #92] @ (80010d8 <HAL_UART_MspInit+0x258>)
800107c: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8001080: 6413 str r3, [r2, #64] @ 0x40
8001082: 4b15 ldr r3, [pc, #84] @ (80010d8 <HAL_UART_MspInit+0x258>)
8001084: 6c1b ldr r3, [r3, #64] @ 0x40
8001086: f403 2380 and.w r3, r3, #262144 @ 0x40000
800108a: 60fb str r3, [r7, #12]
800108c: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOC_CLK_ENABLE();
800108e: 2300 movs r3, #0
8001090: 60bb str r3, [r7, #8]
8001092: 4b11 ldr r3, [pc, #68] @ (80010d8 <HAL_UART_MspInit+0x258>)
8001094: 6b1b ldr r3, [r3, #48] @ 0x30
8001096: 4a10 ldr r2, [pc, #64] @ (80010d8 <HAL_UART_MspInit+0x258>)
8001098: f043 0304 orr.w r3, r3, #4
800109c: 6313 str r3, [r2, #48] @ 0x30
800109e: 4b0e ldr r3, [pc, #56] @ (80010d8 <HAL_UART_MspInit+0x258>)
80010a0: 6b1b ldr r3, [r3, #48] @ 0x30
80010a2: f003 0304 and.w r3, r3, #4
80010a6: 60bb str r3, [r7, #8]
80010a8: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
80010aa: f44f 6340 mov.w r3, #3072 @ 0xc00
80010ae: 637b str r3, [r7, #52] @ 0x34
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80010b0: 2302 movs r3, #2
80010b2: 63bb str r3, [r7, #56] @ 0x38
GPIO_InitStruct.Pull = GPIO_NOPULL;
80010b4: 2300 movs r3, #0
80010b6: 63fb str r3, [r7, #60] @ 0x3c
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
80010b8: 2303 movs r3, #3
80010ba: 643b str r3, [r7, #64] @ 0x40
GPIO_InitStruct.Alternate = GPIO_AF7_USART3;
80010bc: 2307 movs r3, #7
80010be: 647b str r3, [r7, #68] @ 0x44
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
80010c0: f107 0334 add.w r3, r7, #52 @ 0x34
80010c4: 4619 mov r1, r3
80010c6: 4807 ldr r0, [pc, #28] @ (80010e4 <HAL_UART_MspInit+0x264>)
80010c8: f000 fa34 bl 8001534 <HAL_GPIO_Init>
}
80010cc: bf00 nop
80010ce: 3748 adds r7, #72 @ 0x48
80010d0: 46bd mov sp, r7
80010d2: bd80 pop {r7, pc}
80010d4: 40004c00 .word 0x40004c00
80010d8: 40023800 .word 0x40023800
80010dc: 40020000 .word 0x40020000
80010e0: 40005000 .word 0x40005000
80010e4: 40020800 .word 0x40020800
80010e8: 40020c00 .word 0x40020c00
80010ec: 40011000 .word 0x40011000
80010f0: 40004400 .word 0x40004400
80010f4: 40004800 .word 0x40004800
080010f8 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
80010f8: b480 push {r7}
80010fa: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
80010fc: bf00 nop
80010fe: e7fd b.n 80010fc <NMI_Handler+0x4>
08001100 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8001100: b480 push {r7}
8001102: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8001104: bf00 nop
8001106: e7fd b.n 8001104 <HardFault_Handler+0x4>
08001108 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8001108: b480 push {r7}
800110a: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
800110c: bf00 nop
800110e: e7fd b.n 800110c <MemManage_Handler+0x4>
08001110 <BusFault_Handler>:
/**
* @brief This function handles Pre-fetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8001110: b480 push {r7}
8001112: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8001114: bf00 nop
8001116: e7fd b.n 8001114 <BusFault_Handler+0x4>
08001118 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8001118: b480 push {r7}
800111a: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
800111c: bf00 nop
800111e: e7fd b.n 800111c <UsageFault_Handler+0x4>
08001120 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8001120: b480 push {r7}
8001122: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8001124: bf00 nop
8001126: 46bd mov sp, r7
8001128: f85d 7b04 ldr.w r7, [sp], #4
800112c: 4770 bx lr
0800112e <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
800112e: b480 push {r7}
8001130: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8001132: bf00 nop
8001134: 46bd mov sp, r7
8001136: f85d 7b04 ldr.w r7, [sp], #4
800113a: 4770 bx lr
0800113c <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
800113c: b480 push {r7}
800113e: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8001140: bf00 nop
8001142: 46bd mov sp, r7
8001144: f85d 7b04 ldr.w r7, [sp], #4
8001148: 4770 bx lr
0800114a <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
800114a: b580 push {r7, lr}
800114c: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
800114e: f000 f89b bl 8001288 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
8001152: bf00 nop
8001154: bd80 pop {r7, pc}
...
08001158 <OTG_FS_IRQHandler>:
/**
* @brief This function handles USB On The Go FS global interrupt.
*/
void OTG_FS_IRQHandler(void)
{
8001158: b580 push {r7, lr}
800115a: af00 add r7, sp, #0
/* USER CODE BEGIN OTG_FS_IRQn 0 */
/* USER CODE END OTG_FS_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS);
800115c: 4802 ldr r0, [pc, #8] @ (8001168 <OTG_FS_IRQHandler+0x10>)
800115e: f000 fe3e bl 8001dde <HAL_PCD_IRQHandler>
/* USER CODE BEGIN OTG_FS_IRQn 1 */
/* USER CODE END OTG_FS_IRQn 1 */
}
8001162: bf00 nop
8001164: bd80 pop {r7, pc}
8001166: bf00 nop
8001168: 20000894 .word 0x20000894
0800116c <SystemInit>:
* configuration.
* @param None
* @retval None
*/
void SystemInit(void)
{
800116c: b480 push {r7}
800116e: af00 add r7, sp, #0
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
8001170: 4b06 ldr r3, [pc, #24] @ (800118c <SystemInit+0x20>)
8001172: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
8001176: 4a05 ldr r2, [pc, #20] @ (800118c <SystemInit+0x20>)
8001178: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000
800117c: f8c2 3088 str.w r3, [r2, #136] @ 0x88
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
}
8001180: bf00 nop
8001182: 46bd mov sp, r7
8001184: f85d 7b04 ldr.w r7, [sp], #4
8001188: 4770 bx lr
800118a: bf00 nop
800118c: e000ed00 .word 0xe000ed00
08001190 <Reset_Handler>:
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr sp, =_estack /* set stack pointer */
8001190: f8df d034 ldr.w sp, [pc, #52] @ 80011c8 <LoopFillZerobss+0xe>
/* Call the clock system initialization function.*/
bl SystemInit
8001194: f7ff ffea bl 800116c <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8001198: 480c ldr r0, [pc, #48] @ (80011cc <LoopFillZerobss+0x12>)
ldr r1, =_edata
800119a: 490d ldr r1, [pc, #52] @ (80011d0 <LoopFillZerobss+0x16>)
ldr r2, =_sidata
800119c: 4a0d ldr r2, [pc, #52] @ (80011d4 <LoopFillZerobss+0x1a>)
movs r3, #0
800119e: 2300 movs r3, #0
b LoopCopyDataInit
80011a0: e002 b.n 80011a8 <LoopCopyDataInit>
080011a2 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
80011a2: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
80011a4: 50c4 str r4, [r0, r3]
adds r3, r3, #4
80011a6: 3304 adds r3, #4
080011a8 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
80011a8: 18c4 adds r4, r0, r3
cmp r4, r1
80011aa: 428c cmp r4, r1
bcc CopyDataInit
80011ac: d3f9 bcc.n 80011a2 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
80011ae: 4a0a ldr r2, [pc, #40] @ (80011d8 <LoopFillZerobss+0x1e>)
ldr r4, =_ebss
80011b0: 4c0a ldr r4, [pc, #40] @ (80011dc <LoopFillZerobss+0x22>)
movs r3, #0
80011b2: 2300 movs r3, #0
b LoopFillZerobss
80011b4: e001 b.n 80011ba <LoopFillZerobss>
080011b6 <FillZerobss>:
FillZerobss:
str r3, [r2]
80011b6: 6013 str r3, [r2, #0]
adds r2, r2, #4
80011b8: 3204 adds r2, #4
080011ba <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
80011ba: 42a2 cmp r2, r4
bcc FillZerobss
80011bc: d3fb bcc.n 80011b6 <FillZerobss>
/* Call static constructors */
bl __libc_init_array
80011be: f007 fcd7 bl 8008b70 <__libc_init_array>
/* Call the application's entry point.*/
bl main
80011c2: f7ff f9b5 bl 8000530 <main>
bx lr
80011c6: 4770 bx lr
ldr sp, =_estack /* set stack pointer */
80011c8: 20020000 .word 0x20020000
ldr r0, =_sdata
80011cc: 20000000 .word 0x20000000
ldr r1, =_edata
80011d0: 20000138 .word 0x20000138
ldr r2, =_sidata
80011d4: 08008c34 .word 0x08008c34
ldr r2, =_sbss
80011d8: 20000138 .word 0x20000138
ldr r4, =_ebss
80011dc: 20000d8c .word 0x20000d8c
080011e0 <ADC_IRQHandler>:
* @retval None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
80011e0: e7fe b.n 80011e0 <ADC_IRQHandler>
...
080011e4 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
80011e4: b580 push {r7, lr}
80011e6: af00 add r7, sp, #0
/* Configure Flash prefetch, Instruction cache, Data cache */
#if (INSTRUCTION_CACHE_ENABLE != 0U)
__HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
80011e8: 4b0e ldr r3, [pc, #56] @ (8001224 <HAL_Init+0x40>)
80011ea: 681b ldr r3, [r3, #0]
80011ec: 4a0d ldr r2, [pc, #52] @ (8001224 <HAL_Init+0x40>)
80011ee: f443 7300 orr.w r3, r3, #512 @ 0x200
80011f2: 6013 str r3, [r2, #0]
#endif /* INSTRUCTION_CACHE_ENABLE */
#if (DATA_CACHE_ENABLE != 0U)
__HAL_FLASH_DATA_CACHE_ENABLE();
80011f4: 4b0b ldr r3, [pc, #44] @ (8001224 <HAL_Init+0x40>)
80011f6: 681b ldr r3, [r3, #0]
80011f8: 4a0a ldr r2, [pc, #40] @ (8001224 <HAL_Init+0x40>)
80011fa: f443 6380 orr.w r3, r3, #1024 @ 0x400
80011fe: 6013 str r3, [r2, #0]
#endif /* DATA_CACHE_ENABLE */
#if (PREFETCH_ENABLE != 0U)
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8001200: 4b08 ldr r3, [pc, #32] @ (8001224 <HAL_Init+0x40>)
8001202: 681b ldr r3, [r3, #0]
8001204: 4a07 ldr r2, [pc, #28] @ (8001224 <HAL_Init+0x40>)
8001206: f443 7380 orr.w r3, r3, #256 @ 0x100
800120a: 6013 str r3, [r2, #0]
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
800120c: 2003 movs r0, #3
800120e: f000 f94f bl 80014b0 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8001212: 200f movs r0, #15
8001214: f000 f808 bl 8001228 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8001218: f7ff fd22 bl 8000c60 <HAL_MspInit>
/* Return function status */
return HAL_OK;
800121c: 2300 movs r3, #0
}
800121e: 4618 mov r0, r3
8001220: bd80 pop {r7, pc}
8001222: bf00 nop
8001224: 40023c00 .word 0x40023c00
08001228 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8001228: b580 push {r7, lr}
800122a: b082 sub sp, #8
800122c: af00 add r7, sp, #0
800122e: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8001230: 4b12 ldr r3, [pc, #72] @ (800127c <HAL_InitTick+0x54>)
8001232: 681a ldr r2, [r3, #0]
8001234: 4b12 ldr r3, [pc, #72] @ (8001280 <HAL_InitTick+0x58>)
8001236: 781b ldrb r3, [r3, #0]
8001238: 4619 mov r1, r3
800123a: f44f 737a mov.w r3, #1000 @ 0x3e8
800123e: fbb3 f3f1 udiv r3, r3, r1
8001242: fbb2 f3f3 udiv r3, r2, r3
8001246: 4618 mov r0, r3
8001248: f000 f967 bl 800151a <HAL_SYSTICK_Config>
800124c: 4603 mov r3, r0
800124e: 2b00 cmp r3, #0
8001250: d001 beq.n 8001256 <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8001252: 2301 movs r3, #1
8001254: e00e b.n 8001274 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8001256: 687b ldr r3, [r7, #4]
8001258: 2b0f cmp r3, #15
800125a: d80a bhi.n 8001272 <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
800125c: 2200 movs r2, #0
800125e: 6879 ldr r1, [r7, #4]
8001260: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
8001264: f000 f92f bl 80014c6 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8001268: 4a06 ldr r2, [pc, #24] @ (8001284 <HAL_InitTick+0x5c>)
800126a: 687b ldr r3, [r7, #4]
800126c: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
800126e: 2300 movs r3, #0
8001270: e000 b.n 8001274 <HAL_InitTick+0x4c>
return HAL_ERROR;
8001272: 2301 movs r3, #1
}
8001274: 4618 mov r0, r3
8001276: 3708 adds r7, #8
8001278: 46bd mov sp, r7
800127a: bd80 pop {r7, pc}
800127c: 20000028 .word 0x20000028
8001280: 20000030 .word 0x20000030
8001284: 2000002c .word 0x2000002c
08001288 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8001288: b480 push {r7}
800128a: af00 add r7, sp, #0
uwTick += uwTickFreq;
800128c: 4b06 ldr r3, [pc, #24] @ (80012a8 <HAL_IncTick+0x20>)
800128e: 781b ldrb r3, [r3, #0]
8001290: 461a mov r2, r3
8001292: 4b06 ldr r3, [pc, #24] @ (80012ac <HAL_IncTick+0x24>)
8001294: 681b ldr r3, [r3, #0]
8001296: 4413 add r3, r2
8001298: 4a04 ldr r2, [pc, #16] @ (80012ac <HAL_IncTick+0x24>)
800129a: 6013 str r3, [r2, #0]
}
800129c: bf00 nop
800129e: 46bd mov sp, r7
80012a0: f85d 7b04 ldr.w r7, [sp], #4
80012a4: 4770 bx lr
80012a6: bf00 nop
80012a8: 20000030 .word 0x20000030
80012ac: 200003b0 .word 0x200003b0
080012b0 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
80012b0: b480 push {r7}
80012b2: af00 add r7, sp, #0
return uwTick;
80012b4: 4b03 ldr r3, [pc, #12] @ (80012c4 <HAL_GetTick+0x14>)
80012b6: 681b ldr r3, [r3, #0]
}
80012b8: 4618 mov r0, r3
80012ba: 46bd mov sp, r7
80012bc: f85d 7b04 ldr.w r7, [sp], #4
80012c0: 4770 bx lr
80012c2: bf00 nop
80012c4: 200003b0 .word 0x200003b0
080012c8 <HAL_Delay>:
* implementations in user file.
* @param Delay specifies the delay time length, in milliseconds.
* @retval None
*/
__weak void HAL_Delay(uint32_t Delay)
{
80012c8: b580 push {r7, lr}
80012ca: b084 sub sp, #16
80012cc: af00 add r7, sp, #0
80012ce: 6078 str r0, [r7, #4]
uint32_t tickstart = HAL_GetTick();
80012d0: f7ff ffee bl 80012b0 <HAL_GetTick>
80012d4: 60b8 str r0, [r7, #8]
uint32_t wait = Delay;
80012d6: 687b ldr r3, [r7, #4]
80012d8: 60fb str r3, [r7, #12]
/* Add a freq to guarantee minimum wait */
if (wait < HAL_MAX_DELAY)
80012da: 68fb ldr r3, [r7, #12]
80012dc: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff
80012e0: d005 beq.n 80012ee <HAL_Delay+0x26>
{
wait += (uint32_t)(uwTickFreq);
80012e2: 4b0a ldr r3, [pc, #40] @ (800130c <HAL_Delay+0x44>)
80012e4: 781b ldrb r3, [r3, #0]
80012e6: 461a mov r2, r3
80012e8: 68fb ldr r3, [r7, #12]
80012ea: 4413 add r3, r2
80012ec: 60fb str r3, [r7, #12]
}
while((HAL_GetTick() - tickstart) < wait)
80012ee: bf00 nop
80012f0: f7ff ffde bl 80012b0 <HAL_GetTick>
80012f4: 4602 mov r2, r0
80012f6: 68bb ldr r3, [r7, #8]
80012f8: 1ad3 subs r3, r2, r3
80012fa: 68fa ldr r2, [r7, #12]
80012fc: 429a cmp r2, r3
80012fe: d8f7 bhi.n 80012f0 <HAL_Delay+0x28>
{
}
}
8001300: bf00 nop
8001302: bf00 nop
8001304: 3710 adds r7, #16
8001306: 46bd mov sp, r7
8001308: bd80 pop {r7, pc}
800130a: bf00 nop
800130c: 20000030 .word 0x20000030
08001310 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8001310: b480 push {r7}
8001312: b085 sub sp, #20
8001314: af00 add r7, sp, #0
8001316: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8001318: 687b ldr r3, [r7, #4]
800131a: f003 0307 and.w r3, r3, #7
800131e: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8001320: 4b0c ldr r3, [pc, #48] @ (8001354 <__NVIC_SetPriorityGrouping+0x44>)
8001322: 68db ldr r3, [r3, #12]
8001324: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8001326: 68ba ldr r2, [r7, #8]
8001328: f64f 03ff movw r3, #63743 @ 0xf8ff
800132c: 4013 ands r3, r2
800132e: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8001330: 68fb ldr r3, [r7, #12]
8001332: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8001334: 68bb ldr r3, [r7, #8]
8001336: 4313 orrs r3, r2
reg_value = (reg_value |
8001338: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
800133c: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8001340: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8001342: 4a04 ldr r2, [pc, #16] @ (8001354 <__NVIC_SetPriorityGrouping+0x44>)
8001344: 68bb ldr r3, [r7, #8]
8001346: 60d3 str r3, [r2, #12]
}
8001348: bf00 nop
800134a: 3714 adds r7, #20
800134c: 46bd mov sp, r7
800134e: f85d 7b04 ldr.w r7, [sp], #4
8001352: 4770 bx lr
8001354: e000ed00 .word 0xe000ed00
08001358 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8001358: b480 push {r7}
800135a: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
800135c: 4b04 ldr r3, [pc, #16] @ (8001370 <__NVIC_GetPriorityGrouping+0x18>)
800135e: 68db ldr r3, [r3, #12]
8001360: 0a1b lsrs r3, r3, #8
8001362: f003 0307 and.w r3, r3, #7
}
8001366: 4618 mov r0, r3
8001368: 46bd mov sp, r7
800136a: f85d 7b04 ldr.w r7, [sp], #4
800136e: 4770 bx lr
8001370: e000ed00 .word 0xe000ed00
08001374 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8001374: b480 push {r7}
8001376: b083 sub sp, #12
8001378: af00 add r7, sp, #0
800137a: 4603 mov r3, r0
800137c: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
800137e: f997 3007 ldrsb.w r3, [r7, #7]
8001382: 2b00 cmp r3, #0
8001384: db0b blt.n 800139e <__NVIC_EnableIRQ+0x2a>
{
__COMPILER_BARRIER();
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8001386: 79fb ldrb r3, [r7, #7]
8001388: f003 021f and.w r2, r3, #31
800138c: 4907 ldr r1, [pc, #28] @ (80013ac <__NVIC_EnableIRQ+0x38>)
800138e: f997 3007 ldrsb.w r3, [r7, #7]
8001392: 095b lsrs r3, r3, #5
8001394: 2001 movs r0, #1
8001396: fa00 f202 lsl.w r2, r0, r2
800139a: f841 2023 str.w r2, [r1, r3, lsl #2]
__COMPILER_BARRIER();
}
}
800139e: bf00 nop
80013a0: 370c adds r7, #12
80013a2: 46bd mov sp, r7
80013a4: f85d 7b04 ldr.w r7, [sp], #4
80013a8: 4770 bx lr
80013aa: bf00 nop
80013ac: e000e100 .word 0xe000e100
080013b0 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
80013b0: b480 push {r7}
80013b2: b083 sub sp, #12
80013b4: af00 add r7, sp, #0
80013b6: 4603 mov r3, r0
80013b8: 6039 str r1, [r7, #0]
80013ba: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80013bc: f997 3007 ldrsb.w r3, [r7, #7]
80013c0: 2b00 cmp r3, #0
80013c2: db0a blt.n 80013da <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80013c4: 683b ldr r3, [r7, #0]
80013c6: b2da uxtb r2, r3
80013c8: 490c ldr r1, [pc, #48] @ (80013fc <__NVIC_SetPriority+0x4c>)
80013ca: f997 3007 ldrsb.w r3, [r7, #7]
80013ce: 0112 lsls r2, r2, #4
80013d0: b2d2 uxtb r2, r2
80013d2: 440b add r3, r1
80013d4: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
80013d8: e00a b.n 80013f0 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80013da: 683b ldr r3, [r7, #0]
80013dc: b2da uxtb r2, r3
80013de: 4908 ldr r1, [pc, #32] @ (8001400 <__NVIC_SetPriority+0x50>)
80013e0: 79fb ldrb r3, [r7, #7]
80013e2: f003 030f and.w r3, r3, #15
80013e6: 3b04 subs r3, #4
80013e8: 0112 lsls r2, r2, #4
80013ea: b2d2 uxtb r2, r2
80013ec: 440b add r3, r1
80013ee: 761a strb r2, [r3, #24]
}
80013f0: bf00 nop
80013f2: 370c adds r7, #12
80013f4: 46bd mov sp, r7
80013f6: f85d 7b04 ldr.w r7, [sp], #4
80013fa: 4770 bx lr
80013fc: e000e100 .word 0xe000e100
8001400: e000ed00 .word 0xe000ed00
08001404 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8001404: b480 push {r7}
8001406: b089 sub sp, #36 @ 0x24
8001408: af00 add r7, sp, #0
800140a: 60f8 str r0, [r7, #12]
800140c: 60b9 str r1, [r7, #8]
800140e: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8001410: 68fb ldr r3, [r7, #12]
8001412: f003 0307 and.w r3, r3, #7
8001416: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8001418: 69fb ldr r3, [r7, #28]
800141a: f1c3 0307 rsb r3, r3, #7
800141e: 2b04 cmp r3, #4
8001420: bf28 it cs
8001422: 2304 movcs r3, #4
8001424: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8001426: 69fb ldr r3, [r7, #28]
8001428: 3304 adds r3, #4
800142a: 2b06 cmp r3, #6
800142c: d902 bls.n 8001434 <NVIC_EncodePriority+0x30>
800142e: 69fb ldr r3, [r7, #28]
8001430: 3b03 subs r3, #3
8001432: e000 b.n 8001436 <NVIC_EncodePriority+0x32>
8001434: 2300 movs r3, #0
8001436: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8001438: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff
800143c: 69bb ldr r3, [r7, #24]
800143e: fa02 f303 lsl.w r3, r2, r3
8001442: 43da mvns r2, r3
8001444: 68bb ldr r3, [r7, #8]
8001446: 401a ands r2, r3
8001448: 697b ldr r3, [r7, #20]
800144a: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
800144c: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff
8001450: 697b ldr r3, [r7, #20]
8001452: fa01 f303 lsl.w r3, r1, r3
8001456: 43d9 mvns r1, r3
8001458: 687b ldr r3, [r7, #4]
800145a: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
800145c: 4313 orrs r3, r2
);
}
800145e: 4618 mov r0, r3
8001460: 3724 adds r7, #36 @ 0x24
8001462: 46bd mov sp, r7
8001464: f85d 7b04 ldr.w r7, [sp], #4
8001468: 4770 bx lr
...
0800146c <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
800146c: b580 push {r7, lr}
800146e: b082 sub sp, #8
8001470: af00 add r7, sp, #0
8001472: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8001474: 687b ldr r3, [r7, #4]
8001476: 3b01 subs r3, #1
8001478: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
800147c: d301 bcc.n 8001482 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
800147e: 2301 movs r3, #1
8001480: e00f b.n 80014a2 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8001482: 4a0a ldr r2, [pc, #40] @ (80014ac <SysTick_Config+0x40>)
8001484: 687b ldr r3, [r7, #4]
8001486: 3b01 subs r3, #1
8001488: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
800148a: 210f movs r1, #15
800148c: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff
8001490: f7ff ff8e bl 80013b0 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8001494: 4b05 ldr r3, [pc, #20] @ (80014ac <SysTick_Config+0x40>)
8001496: 2200 movs r2, #0
8001498: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
800149a: 4b04 ldr r3, [pc, #16] @ (80014ac <SysTick_Config+0x40>)
800149c: 2207 movs r2, #7
800149e: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
80014a0: 2300 movs r3, #0
}
80014a2: 4618 mov r0, r3
80014a4: 3708 adds r7, #8
80014a6: 46bd mov sp, r7
80014a8: bd80 pop {r7, pc}
80014aa: bf00 nop
80014ac: e000e010 .word 0xe000e010
080014b0 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80014b0: b580 push {r7, lr}
80014b2: b082 sub sp, #8
80014b4: af00 add r7, sp, #0
80014b6: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
80014b8: 6878 ldr r0, [r7, #4]
80014ba: f7ff ff29 bl 8001310 <__NVIC_SetPriorityGrouping>
}
80014be: bf00 nop
80014c0: 3708 adds r7, #8
80014c2: 46bd mov sp, r7
80014c4: bd80 pop {r7, pc}
080014c6 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
80014c6: b580 push {r7, lr}
80014c8: b086 sub sp, #24
80014ca: af00 add r7, sp, #0
80014cc: 4603 mov r3, r0
80014ce: 60b9 str r1, [r7, #8]
80014d0: 607a str r2, [r7, #4]
80014d2: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
80014d4: 2300 movs r3, #0
80014d6: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
80014d8: f7ff ff3e bl 8001358 <__NVIC_GetPriorityGrouping>
80014dc: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
80014de: 687a ldr r2, [r7, #4]
80014e0: 68b9 ldr r1, [r7, #8]
80014e2: 6978 ldr r0, [r7, #20]
80014e4: f7ff ff8e bl 8001404 <NVIC_EncodePriority>
80014e8: 4602 mov r2, r0
80014ea: f997 300f ldrsb.w r3, [r7, #15]
80014ee: 4611 mov r1, r2
80014f0: 4618 mov r0, r3
80014f2: f7ff ff5d bl 80013b0 <__NVIC_SetPriority>
}
80014f6: bf00 nop
80014f8: 3718 adds r7, #24
80014fa: 46bd mov sp, r7
80014fc: bd80 pop {r7, pc}
080014fe <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
80014fe: b580 push {r7, lr}
8001500: b082 sub sp, #8
8001502: af00 add r7, sp, #0
8001504: 4603 mov r3, r0
8001506: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8001508: f997 3007 ldrsb.w r3, [r7, #7]
800150c: 4618 mov r0, r3
800150e: f7ff ff31 bl 8001374 <__NVIC_EnableIRQ>
}
8001512: bf00 nop
8001514: 3708 adds r7, #8
8001516: 46bd mov sp, r7
8001518: bd80 pop {r7, pc}
0800151a <HAL_SYSTICK_Config>:
* @param TicksNumb Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
800151a: b580 push {r7, lr}
800151c: b082 sub sp, #8
800151e: af00 add r7, sp, #0
8001520: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8001522: 6878 ldr r0, [r7, #4]
8001524: f7ff ffa2 bl 800146c <SysTick_Config>
8001528: 4603 mov r3, r0
}
800152a: 4618 mov r0, r3
800152c: 3708 adds r7, #8
800152e: 46bd mov sp, r7
8001530: bd80 pop {r7, pc}
...
08001534 <HAL_GPIO_Init>:
* @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8001534: b480 push {r7}
8001536: b089 sub sp, #36 @ 0x24
8001538: af00 add r7, sp, #0
800153a: 6078 str r0, [r7, #4]
800153c: 6039 str r1, [r7, #0]
uint32_t position;
uint32_t ioposition = 0x00U;
800153e: 2300 movs r3, #0
8001540: 617b str r3, [r7, #20]
uint32_t iocurrent = 0x00U;
8001542: 2300 movs r3, #0
8001544: 613b str r3, [r7, #16]
uint32_t temp = 0x00U;
8001546: 2300 movs r3, #0
8001548: 61bb str r3, [r7, #24]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
for(position = 0U; position < GPIO_NUMBER; position++)
800154a: 2300 movs r3, #0
800154c: 61fb str r3, [r7, #28]
800154e: e165 b.n 800181c <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = 0x01U << position;
8001550: 2201 movs r2, #1
8001552: 69fb ldr r3, [r7, #28]
8001554: fa02 f303 lsl.w r3, r2, r3
8001558: 617b str r3, [r7, #20]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
800155a: 683b ldr r3, [r7, #0]
800155c: 681b ldr r3, [r3, #0]
800155e: 697a ldr r2, [r7, #20]
8001560: 4013 ands r3, r2
8001562: 613b str r3, [r7, #16]
if(iocurrent == ioposition)
8001564: 693a ldr r2, [r7, #16]
8001566: 697b ldr r3, [r7, #20]
8001568: 429a cmp r2, r3
800156a: f040 8154 bne.w 8001816 <HAL_GPIO_Init+0x2e2>
{
/*--------------------- GPIO Mode Configuration ------------------------*/
/* In case of Output or Alternate function mode selection */
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
800156e: 683b ldr r3, [r7, #0]
8001570: 685b ldr r3, [r3, #4]
8001572: f003 0303 and.w r3, r3, #3
8001576: 2b01 cmp r3, #1
8001578: d005 beq.n 8001586 <HAL_GPIO_Init+0x52>
(GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
800157a: 683b ldr r3, [r7, #0]
800157c: 685b ldr r3, [r3, #4]
800157e: f003 0303 and.w r3, r3, #3
if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \
8001582: 2b02 cmp r3, #2
8001584: d130 bne.n 80015e8 <HAL_GPIO_Init+0xb4>
{
/* Check the Speed parameter */
assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
/* Configure the IO Speed */
temp = GPIOx->OSPEEDR;
8001586: 687b ldr r3, [r7, #4]
8001588: 689b ldr r3, [r3, #8]
800158a: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
800158c: 69fb ldr r3, [r7, #28]
800158e: 005b lsls r3, r3, #1
8001590: 2203 movs r2, #3
8001592: fa02 f303 lsl.w r3, r2, r3
8001596: 43db mvns r3, r3
8001598: 69ba ldr r2, [r7, #24]
800159a: 4013 ands r3, r2
800159c: 61bb str r3, [r7, #24]
temp |= (GPIO_Init->Speed << (position * 2U));
800159e: 683b ldr r3, [r7, #0]
80015a0: 68da ldr r2, [r3, #12]
80015a2: 69fb ldr r3, [r7, #28]
80015a4: 005b lsls r3, r3, #1
80015a6: fa02 f303 lsl.w r3, r2, r3
80015aa: 69ba ldr r2, [r7, #24]
80015ac: 4313 orrs r3, r2
80015ae: 61bb str r3, [r7, #24]
GPIOx->OSPEEDR = temp;
80015b0: 687b ldr r3, [r7, #4]
80015b2: 69ba ldr r2, [r7, #24]
80015b4: 609a str r2, [r3, #8]
/* Configure the IO Output Type */
temp = GPIOx->OTYPER;
80015b6: 687b ldr r3, [r7, #4]
80015b8: 685b ldr r3, [r3, #4]
80015ba: 61bb str r3, [r7, #24]
temp &= ~(GPIO_OTYPER_OT_0 << position) ;
80015bc: 2201 movs r2, #1
80015be: 69fb ldr r3, [r7, #28]
80015c0: fa02 f303 lsl.w r3, r2, r3
80015c4: 43db mvns r3, r3
80015c6: 69ba ldr r2, [r7, #24]
80015c8: 4013 ands r3, r2
80015ca: 61bb str r3, [r7, #24]
temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
80015cc: 683b ldr r3, [r7, #0]
80015ce: 685b ldr r3, [r3, #4]
80015d0: 091b lsrs r3, r3, #4
80015d2: f003 0201 and.w r2, r3, #1
80015d6: 69fb ldr r3, [r7, #28]
80015d8: fa02 f303 lsl.w r3, r2, r3
80015dc: 69ba ldr r2, [r7, #24]
80015de: 4313 orrs r3, r2
80015e0: 61bb str r3, [r7, #24]
GPIOx->OTYPER = temp;
80015e2: 687b ldr r3, [r7, #4]
80015e4: 69ba ldr r2, [r7, #24]
80015e6: 605a str r2, [r3, #4]
}
if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
80015e8: 683b ldr r3, [r7, #0]
80015ea: 685b ldr r3, [r3, #4]
80015ec: f003 0303 and.w r3, r3, #3
80015f0: 2b03 cmp r3, #3
80015f2: d017 beq.n 8001624 <HAL_GPIO_Init+0xf0>
{
/* Check the parameters */
assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
/* Activate the Pull-up or Pull down resistor for the current IO */
temp = GPIOx->PUPDR;
80015f4: 687b ldr r3, [r7, #4]
80015f6: 68db ldr r3, [r3, #12]
80015f8: 61bb str r3, [r7, #24]
temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
80015fa: 69fb ldr r3, [r7, #28]
80015fc: 005b lsls r3, r3, #1
80015fe: 2203 movs r2, #3
8001600: fa02 f303 lsl.w r3, r2, r3
8001604: 43db mvns r3, r3
8001606: 69ba ldr r2, [r7, #24]
8001608: 4013 ands r3, r2
800160a: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Pull) << (position * 2U));
800160c: 683b ldr r3, [r7, #0]
800160e: 689a ldr r2, [r3, #8]
8001610: 69fb ldr r3, [r7, #28]
8001612: 005b lsls r3, r3, #1
8001614: fa02 f303 lsl.w r3, r2, r3
8001618: 69ba ldr r2, [r7, #24]
800161a: 4313 orrs r3, r2
800161c: 61bb str r3, [r7, #24]
GPIOx->PUPDR = temp;
800161e: 687b ldr r3, [r7, #4]
8001620: 69ba ldr r2, [r7, #24]
8001622: 60da str r2, [r3, #12]
}
/* In case of Alternate function mode selection */
if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
8001624: 683b ldr r3, [r7, #0]
8001626: 685b ldr r3, [r3, #4]
8001628: f003 0303 and.w r3, r3, #3
800162c: 2b02 cmp r3, #2
800162e: d123 bne.n 8001678 <HAL_GPIO_Init+0x144>
{
/* Check the Alternate function parameter */
assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
/* Configure Alternate function mapped with the current IO */
temp = GPIOx->AFR[position >> 3U];
8001630: 69fb ldr r3, [r7, #28]
8001632: 08da lsrs r2, r3, #3
8001634: 687b ldr r3, [r7, #4]
8001636: 3208 adds r2, #8
8001638: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800163c: 61bb str r3, [r7, #24]
temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
800163e: 69fb ldr r3, [r7, #28]
8001640: f003 0307 and.w r3, r3, #7
8001644: 009b lsls r3, r3, #2
8001646: 220f movs r2, #15
8001648: fa02 f303 lsl.w r3, r2, r3
800164c: 43db mvns r3, r3
800164e: 69ba ldr r2, [r7, #24]
8001650: 4013 ands r3, r2
8001652: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
8001654: 683b ldr r3, [r7, #0]
8001656: 691a ldr r2, [r3, #16]
8001658: 69fb ldr r3, [r7, #28]
800165a: f003 0307 and.w r3, r3, #7
800165e: 009b lsls r3, r3, #2
8001660: fa02 f303 lsl.w r3, r2, r3
8001664: 69ba ldr r2, [r7, #24]
8001666: 4313 orrs r3, r2
8001668: 61bb str r3, [r7, #24]
GPIOx->AFR[position >> 3U] = temp;
800166a: 69fb ldr r3, [r7, #28]
800166c: 08da lsrs r2, r3, #3
800166e: 687b ldr r3, [r7, #4]
8001670: 3208 adds r2, #8
8001672: 69b9 ldr r1, [r7, #24]
8001674: f843 1022 str.w r1, [r3, r2, lsl #2]
}
/* Configure IO Direction mode (Input, Output, Alternate or Analog) */
temp = GPIOx->MODER;
8001678: 687b ldr r3, [r7, #4]
800167a: 681b ldr r3, [r3, #0]
800167c: 61bb str r3, [r7, #24]
temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
800167e: 69fb ldr r3, [r7, #28]
8001680: 005b lsls r3, r3, #1
8001682: 2203 movs r2, #3
8001684: fa02 f303 lsl.w r3, r2, r3
8001688: 43db mvns r3, r3
800168a: 69ba ldr r2, [r7, #24]
800168c: 4013 ands r3, r2
800168e: 61bb str r3, [r7, #24]
temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
8001690: 683b ldr r3, [r7, #0]
8001692: 685b ldr r3, [r3, #4]
8001694: f003 0203 and.w r2, r3, #3
8001698: 69fb ldr r3, [r7, #28]
800169a: 005b lsls r3, r3, #1
800169c: fa02 f303 lsl.w r3, r2, r3
80016a0: 69ba ldr r2, [r7, #24]
80016a2: 4313 orrs r3, r2
80016a4: 61bb str r3, [r7, #24]
GPIOx->MODER = temp;
80016a6: 687b ldr r3, [r7, #4]
80016a8: 69ba ldr r2, [r7, #24]
80016aa: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
80016ac: 683b ldr r3, [r7, #0]
80016ae: 685b ldr r3, [r3, #4]
80016b0: f403 3340 and.w r3, r3, #196608 @ 0x30000
80016b4: 2b00 cmp r3, #0
80016b6: f000 80ae beq.w 8001816 <HAL_GPIO_Init+0x2e2>
{
/* Enable SYSCFG Clock */
__HAL_RCC_SYSCFG_CLK_ENABLE();
80016ba: 2300 movs r3, #0
80016bc: 60fb str r3, [r7, #12]
80016be: 4b5d ldr r3, [pc, #372] @ (8001834 <HAL_GPIO_Init+0x300>)
80016c0: 6c5b ldr r3, [r3, #68] @ 0x44
80016c2: 4a5c ldr r2, [pc, #368] @ (8001834 <HAL_GPIO_Init+0x300>)
80016c4: f443 4380 orr.w r3, r3, #16384 @ 0x4000
80016c8: 6453 str r3, [r2, #68] @ 0x44
80016ca: 4b5a ldr r3, [pc, #360] @ (8001834 <HAL_GPIO_Init+0x300>)
80016cc: 6c5b ldr r3, [r3, #68] @ 0x44
80016ce: f403 4380 and.w r3, r3, #16384 @ 0x4000
80016d2: 60fb str r3, [r7, #12]
80016d4: 68fb ldr r3, [r7, #12]
temp = SYSCFG->EXTICR[position >> 2U];
80016d6: 4a58 ldr r2, [pc, #352] @ (8001838 <HAL_GPIO_Init+0x304>)
80016d8: 69fb ldr r3, [r7, #28]
80016da: 089b lsrs r3, r3, #2
80016dc: 3302 adds r3, #2
80016de: f852 3023 ldr.w r3, [r2, r3, lsl #2]
80016e2: 61bb str r3, [r7, #24]
temp &= ~(0x0FU << (4U * (position & 0x03U)));
80016e4: 69fb ldr r3, [r7, #28]
80016e6: f003 0303 and.w r3, r3, #3
80016ea: 009b lsls r3, r3, #2
80016ec: 220f movs r2, #15
80016ee: fa02 f303 lsl.w r3, r2, r3
80016f2: 43db mvns r3, r3
80016f4: 69ba ldr r2, [r7, #24]
80016f6: 4013 ands r3, r2
80016f8: 61bb str r3, [r7, #24]
temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
80016fa: 687b ldr r3, [r7, #4]
80016fc: 4a4f ldr r2, [pc, #316] @ (800183c <HAL_GPIO_Init+0x308>)
80016fe: 4293 cmp r3, r2
8001700: d025 beq.n 800174e <HAL_GPIO_Init+0x21a>
8001702: 687b ldr r3, [r7, #4]
8001704: 4a4e ldr r2, [pc, #312] @ (8001840 <HAL_GPIO_Init+0x30c>)
8001706: 4293 cmp r3, r2
8001708: d01f beq.n 800174a <HAL_GPIO_Init+0x216>
800170a: 687b ldr r3, [r7, #4]
800170c: 4a4d ldr r2, [pc, #308] @ (8001844 <HAL_GPIO_Init+0x310>)
800170e: 4293 cmp r3, r2
8001710: d019 beq.n 8001746 <HAL_GPIO_Init+0x212>
8001712: 687b ldr r3, [r7, #4]
8001714: 4a4c ldr r2, [pc, #304] @ (8001848 <HAL_GPIO_Init+0x314>)
8001716: 4293 cmp r3, r2
8001718: d013 beq.n 8001742 <HAL_GPIO_Init+0x20e>
800171a: 687b ldr r3, [r7, #4]
800171c: 4a4b ldr r2, [pc, #300] @ (800184c <HAL_GPIO_Init+0x318>)
800171e: 4293 cmp r3, r2
8001720: d00d beq.n 800173e <HAL_GPIO_Init+0x20a>
8001722: 687b ldr r3, [r7, #4]
8001724: 4a4a ldr r2, [pc, #296] @ (8001850 <HAL_GPIO_Init+0x31c>)
8001726: 4293 cmp r3, r2
8001728: d007 beq.n 800173a <HAL_GPIO_Init+0x206>
800172a: 687b ldr r3, [r7, #4]
800172c: 4a49 ldr r2, [pc, #292] @ (8001854 <HAL_GPIO_Init+0x320>)
800172e: 4293 cmp r3, r2
8001730: d101 bne.n 8001736 <HAL_GPIO_Init+0x202>
8001732: 2306 movs r3, #6
8001734: e00c b.n 8001750 <HAL_GPIO_Init+0x21c>
8001736: 2307 movs r3, #7
8001738: e00a b.n 8001750 <HAL_GPIO_Init+0x21c>
800173a: 2305 movs r3, #5
800173c: e008 b.n 8001750 <HAL_GPIO_Init+0x21c>
800173e: 2304 movs r3, #4
8001740: e006 b.n 8001750 <HAL_GPIO_Init+0x21c>
8001742: 2303 movs r3, #3
8001744: e004 b.n 8001750 <HAL_GPIO_Init+0x21c>
8001746: 2302 movs r3, #2
8001748: e002 b.n 8001750 <HAL_GPIO_Init+0x21c>
800174a: 2301 movs r3, #1
800174c: e000 b.n 8001750 <HAL_GPIO_Init+0x21c>
800174e: 2300 movs r3, #0
8001750: 69fa ldr r2, [r7, #28]
8001752: f002 0203 and.w r2, r2, #3
8001756: 0092 lsls r2, r2, #2
8001758: 4093 lsls r3, r2
800175a: 69ba ldr r2, [r7, #24]
800175c: 4313 orrs r3, r2
800175e: 61bb str r3, [r7, #24]
SYSCFG->EXTICR[position >> 2U] = temp;
8001760: 4935 ldr r1, [pc, #212] @ (8001838 <HAL_GPIO_Init+0x304>)
8001762: 69fb ldr r3, [r7, #28]
8001764: 089b lsrs r3, r3, #2
8001766: 3302 adds r3, #2
8001768: 69ba ldr r2, [r7, #24]
800176a: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Clear Rising Falling edge configuration */
temp = EXTI->RTSR;
800176e: 4b3a ldr r3, [pc, #232] @ (8001858 <HAL_GPIO_Init+0x324>)
8001770: 689b ldr r3, [r3, #8]
8001772: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
8001774: 693b ldr r3, [r7, #16]
8001776: 43db mvns r3, r3
8001778: 69ba ldr r2, [r7, #24]
800177a: 4013 ands r3, r2
800177c: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
800177e: 683b ldr r3, [r7, #0]
8001780: 685b ldr r3, [r3, #4]
8001782: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8001786: 2b00 cmp r3, #0
8001788: d003 beq.n 8001792 <HAL_GPIO_Init+0x25e>
{
temp |= iocurrent;
800178a: 69ba ldr r2, [r7, #24]
800178c: 693b ldr r3, [r7, #16]
800178e: 4313 orrs r3, r2
8001790: 61bb str r3, [r7, #24]
}
EXTI->RTSR = temp;
8001792: 4a31 ldr r2, [pc, #196] @ (8001858 <HAL_GPIO_Init+0x324>)
8001794: 69bb ldr r3, [r7, #24]
8001796: 6093 str r3, [r2, #8]
temp = EXTI->FTSR;
8001798: 4b2f ldr r3, [pc, #188] @ (8001858 <HAL_GPIO_Init+0x324>)
800179a: 68db ldr r3, [r3, #12]
800179c: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
800179e: 693b ldr r3, [r7, #16]
80017a0: 43db mvns r3, r3
80017a2: 69ba ldr r2, [r7, #24]
80017a4: 4013 ands r3, r2
80017a6: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
80017a8: 683b ldr r3, [r7, #0]
80017aa: 685b ldr r3, [r3, #4]
80017ac: f403 1300 and.w r3, r3, #2097152 @ 0x200000
80017b0: 2b00 cmp r3, #0
80017b2: d003 beq.n 80017bc <HAL_GPIO_Init+0x288>
{
temp |= iocurrent;
80017b4: 69ba ldr r2, [r7, #24]
80017b6: 693b ldr r3, [r7, #16]
80017b8: 4313 orrs r3, r2
80017ba: 61bb str r3, [r7, #24]
}
EXTI->FTSR = temp;
80017bc: 4a26 ldr r2, [pc, #152] @ (8001858 <HAL_GPIO_Init+0x324>)
80017be: 69bb ldr r3, [r7, #24]
80017c0: 60d3 str r3, [r2, #12]
temp = EXTI->EMR;
80017c2: 4b25 ldr r3, [pc, #148] @ (8001858 <HAL_GPIO_Init+0x324>)
80017c4: 685b ldr r3, [r3, #4]
80017c6: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
80017c8: 693b ldr r3, [r7, #16]
80017ca: 43db mvns r3, r3
80017cc: 69ba ldr r2, [r7, #24]
80017ce: 4013 ands r3, r2
80017d0: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
80017d2: 683b ldr r3, [r7, #0]
80017d4: 685b ldr r3, [r3, #4]
80017d6: f403 3300 and.w r3, r3, #131072 @ 0x20000
80017da: 2b00 cmp r3, #0
80017dc: d003 beq.n 80017e6 <HAL_GPIO_Init+0x2b2>
{
temp |= iocurrent;
80017de: 69ba ldr r2, [r7, #24]
80017e0: 693b ldr r3, [r7, #16]
80017e2: 4313 orrs r3, r2
80017e4: 61bb str r3, [r7, #24]
}
EXTI->EMR = temp;
80017e6: 4a1c ldr r2, [pc, #112] @ (8001858 <HAL_GPIO_Init+0x324>)
80017e8: 69bb ldr r3, [r7, #24]
80017ea: 6053 str r3, [r2, #4]
/* Clear EXTI line configuration */
temp = EXTI->IMR;
80017ec: 4b1a ldr r3, [pc, #104] @ (8001858 <HAL_GPIO_Init+0x324>)
80017ee: 681b ldr r3, [r3, #0]
80017f0: 61bb str r3, [r7, #24]
temp &= ~((uint32_t)iocurrent);
80017f2: 693b ldr r3, [r7, #16]
80017f4: 43db mvns r3, r3
80017f6: 69ba ldr r2, [r7, #24]
80017f8: 4013 ands r3, r2
80017fa: 61bb str r3, [r7, #24]
if((GPIO_Init->Mode & EXTI_IT) != 0x00U)
80017fc: 683b ldr r3, [r7, #0]
80017fe: 685b ldr r3, [r3, #4]
8001800: f403 3380 and.w r3, r3, #65536 @ 0x10000
8001804: 2b00 cmp r3, #0
8001806: d003 beq.n 8001810 <HAL_GPIO_Init+0x2dc>
{
temp |= iocurrent;
8001808: 69ba ldr r2, [r7, #24]
800180a: 693b ldr r3, [r7, #16]
800180c: 4313 orrs r3, r2
800180e: 61bb str r3, [r7, #24]
}
EXTI->IMR = temp;
8001810: 4a11 ldr r2, [pc, #68] @ (8001858 <HAL_GPIO_Init+0x324>)
8001812: 69bb ldr r3, [r7, #24]
8001814: 6013 str r3, [r2, #0]
for(position = 0U; position < GPIO_NUMBER; position++)
8001816: 69fb ldr r3, [r7, #28]
8001818: 3301 adds r3, #1
800181a: 61fb str r3, [r7, #28]
800181c: 69fb ldr r3, [r7, #28]
800181e: 2b0f cmp r3, #15
8001820: f67f ae96 bls.w 8001550 <HAL_GPIO_Init+0x1c>
}
}
}
}
8001824: bf00 nop
8001826: bf00 nop
8001828: 3724 adds r7, #36 @ 0x24
800182a: 46bd mov sp, r7
800182c: f85d 7b04 ldr.w r7, [sp], #4
8001830: 4770 bx lr
8001832: bf00 nop
8001834: 40023800 .word 0x40023800
8001838: 40013800 .word 0x40013800
800183c: 40020000 .word 0x40020000
8001840: 40020400 .word 0x40020400
8001844: 40020800 .word 0x40020800
8001848: 40020c00 .word 0x40020c00
800184c: 40021000 .word 0x40021000
8001850: 40021400 .word 0x40021400
8001854: 40021800 .word 0x40021800
8001858: 40013c00 .word 0x40013c00
0800185c <HAL_GPIO_ReadPin>:
* @param GPIO_Pin specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
{
800185c: b480 push {r7}
800185e: b085 sub sp, #20
8001860: af00 add r7, sp, #0
8001862: 6078 str r0, [r7, #4]
8001864: 460b mov r3, r1
8001866: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8001868: 687b ldr r3, [r7, #4]
800186a: 691a ldr r2, [r3, #16]
800186c: 887b ldrh r3, [r7, #2]
800186e: 4013 ands r3, r2
8001870: 2b00 cmp r3, #0
8001872: d002 beq.n 800187a <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
8001874: 2301 movs r3, #1
8001876: 73fb strb r3, [r7, #15]
8001878: e001 b.n 800187e <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
800187a: 2300 movs r3, #0
800187c: 73fb strb r3, [r7, #15]
}
return bitstatus;
800187e: 7bfb ldrb r3, [r7, #15]
}
8001880: 4618 mov r0, r3
8001882: 3714 adds r7, #20
8001884: 46bd mov sp, r7
8001886: f85d 7b04 ldr.w r7, [sp], #4
800188a: 4770 bx lr
0800188c <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
800188c: b480 push {r7}
800188e: b083 sub sp, #12
8001890: af00 add r7, sp, #0
8001892: 6078 str r0, [r7, #4]
8001894: 460b mov r3, r1
8001896: 807b strh r3, [r7, #2]
8001898: 4613 mov r3, r2
800189a: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if(PinState != GPIO_PIN_RESET)
800189c: 787b ldrb r3, [r7, #1]
800189e: 2b00 cmp r3, #0
80018a0: d003 beq.n 80018aa <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
80018a2: 887a ldrh r2, [r7, #2]
80018a4: 687b ldr r3, [r7, #4]
80018a6: 619a str r2, [r3, #24]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
}
}
80018a8: e003 b.n 80018b2 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
80018aa: 887b ldrh r3, [r7, #2]
80018ac: 041a lsls r2, r3, #16
80018ae: 687b ldr r3, [r7, #4]
80018b0: 619a str r2, [r3, #24]
}
80018b2: bf00 nop
80018b4: 370c adds r7, #12
80018b6: 46bd mov sp, r7
80018b8: f85d 7b04 ldr.w r7, [sp], #4
80018bc: 4770 bx lr
...
080018c0 <HAL_I2C_Init>:
* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
* the configuration information for the specified I2C.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
{
80018c0: b580 push {r7, lr}
80018c2: b084 sub sp, #16
80018c4: af00 add r7, sp, #0
80018c6: 6078 str r0, [r7, #4]
uint32_t freqrange;
uint32_t pclk1;
/* Check the I2C handle allocation */
if (hi2c == NULL)
80018c8: 687b ldr r3, [r7, #4]
80018ca: 2b00 cmp r3, #0
80018cc: d101 bne.n 80018d2 <HAL_I2C_Init+0x12>
{
return HAL_ERROR;
80018ce: 2301 movs r3, #1
80018d0: e12b b.n 8001b2a <HAL_I2C_Init+0x26a>
assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
if (hi2c->State == HAL_I2C_STATE_RESET)
80018d2: 687b ldr r3, [r7, #4]
80018d4: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
80018d8: b2db uxtb r3, r3
80018da: 2b00 cmp r3, #0
80018dc: d106 bne.n 80018ec <HAL_I2C_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hi2c->Lock = HAL_UNLOCKED;
80018de: 687b ldr r3, [r7, #4]
80018e0: 2200 movs r2, #0
80018e2: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Init the low level hardware : GPIO, CLOCK, NVIC */
hi2c->MspInitCallback(hi2c);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_I2C_MspInit(hi2c);
80018e6: 6878 ldr r0, [r7, #4]
80018e8: f7ff f9e2 bl 8000cb0 <HAL_I2C_MspInit>
#endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
}
hi2c->State = HAL_I2C_STATE_BUSY;
80018ec: 687b ldr r3, [r7, #4]
80018ee: 2224 movs r2, #36 @ 0x24
80018f0: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Disable the selected I2C peripheral */
__HAL_I2C_DISABLE(hi2c);
80018f4: 687b ldr r3, [r7, #4]
80018f6: 681b ldr r3, [r3, #0]
80018f8: 681a ldr r2, [r3, #0]
80018fa: 687b ldr r3, [r7, #4]
80018fc: 681b ldr r3, [r3, #0]
80018fe: f022 0201 bic.w r2, r2, #1
8001902: 601a str r2, [r3, #0]
/*Reset I2C*/
hi2c->Instance->CR1 |= I2C_CR1_SWRST;
8001904: 687b ldr r3, [r7, #4]
8001906: 681b ldr r3, [r3, #0]
8001908: 681a ldr r2, [r3, #0]
800190a: 687b ldr r3, [r7, #4]
800190c: 681b ldr r3, [r3, #0]
800190e: f442 4200 orr.w r2, r2, #32768 @ 0x8000
8001912: 601a str r2, [r3, #0]
hi2c->Instance->CR1 &= ~I2C_CR1_SWRST;
8001914: 687b ldr r3, [r7, #4]
8001916: 681b ldr r3, [r3, #0]
8001918: 681a ldr r2, [r3, #0]
800191a: 687b ldr r3, [r7, #4]
800191c: 681b ldr r3, [r3, #0]
800191e: f422 4200 bic.w r2, r2, #32768 @ 0x8000
8001922: 601a str r2, [r3, #0]
/* Get PCLK1 frequency */
pclk1 = HAL_RCC_GetPCLK1Freq();
8001924: f001 fc88 bl 8003238 <HAL_RCC_GetPCLK1Freq>
8001928: 60f8 str r0, [r7, #12]
/* Check the minimum allowed PCLK1 frequency */
if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U)
800192a: 687b ldr r3, [r7, #4]
800192c: 685b ldr r3, [r3, #4]
800192e: 4a81 ldr r2, [pc, #516] @ (8001b34 <HAL_I2C_Init+0x274>)
8001930: 4293 cmp r3, r2
8001932: d807 bhi.n 8001944 <HAL_I2C_Init+0x84>
8001934: 68fb ldr r3, [r7, #12]
8001936: 4a80 ldr r2, [pc, #512] @ (8001b38 <HAL_I2C_Init+0x278>)
8001938: 4293 cmp r3, r2
800193a: bf94 ite ls
800193c: 2301 movls r3, #1
800193e: 2300 movhi r3, #0
8001940: b2db uxtb r3, r3
8001942: e006 b.n 8001952 <HAL_I2C_Init+0x92>
8001944: 68fb ldr r3, [r7, #12]
8001946: 4a7d ldr r2, [pc, #500] @ (8001b3c <HAL_I2C_Init+0x27c>)
8001948: 4293 cmp r3, r2
800194a: bf94 ite ls
800194c: 2301 movls r3, #1
800194e: 2300 movhi r3, #0
8001950: b2db uxtb r3, r3
8001952: 2b00 cmp r3, #0
8001954: d001 beq.n 800195a <HAL_I2C_Init+0x9a>
{
return HAL_ERROR;
8001956: 2301 movs r3, #1
8001958: e0e7 b.n 8001b2a <HAL_I2C_Init+0x26a>
}
/* Calculate frequency range */
freqrange = I2C_FREQRANGE(pclk1);
800195a: 68fb ldr r3, [r7, #12]
800195c: 4a78 ldr r2, [pc, #480] @ (8001b40 <HAL_I2C_Init+0x280>)
800195e: fba2 2303 umull r2, r3, r2, r3
8001962: 0c9b lsrs r3, r3, #18
8001964: 60bb str r3, [r7, #8]
/*---------------------------- I2Cx CR2 Configuration ----------------------*/
/* Configure I2Cx: Frequency range */
MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange);
8001966: 687b ldr r3, [r7, #4]
8001968: 681b ldr r3, [r3, #0]
800196a: 685b ldr r3, [r3, #4]
800196c: f023 013f bic.w r1, r3, #63 @ 0x3f
8001970: 687b ldr r3, [r7, #4]
8001972: 681b ldr r3, [r3, #0]
8001974: 68ba ldr r2, [r7, #8]
8001976: 430a orrs r2, r1
8001978: 605a str r2, [r3, #4]
/*---------------------------- I2Cx TRISE Configuration --------------------*/
/* Configure I2Cx: Rise Time */
MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed));
800197a: 687b ldr r3, [r7, #4]
800197c: 681b ldr r3, [r3, #0]
800197e: 6a1b ldr r3, [r3, #32]
8001980: f023 013f bic.w r1, r3, #63 @ 0x3f
8001984: 687b ldr r3, [r7, #4]
8001986: 685b ldr r3, [r3, #4]
8001988: 4a6a ldr r2, [pc, #424] @ (8001b34 <HAL_I2C_Init+0x274>)
800198a: 4293 cmp r3, r2
800198c: d802 bhi.n 8001994 <HAL_I2C_Init+0xd4>
800198e: 68bb ldr r3, [r7, #8]
8001990: 3301 adds r3, #1
8001992: e009 b.n 80019a8 <HAL_I2C_Init+0xe8>
8001994: 68bb ldr r3, [r7, #8]
8001996: f44f 7296 mov.w r2, #300 @ 0x12c
800199a: fb02 f303 mul.w r3, r2, r3
800199e: 4a69 ldr r2, [pc, #420] @ (8001b44 <HAL_I2C_Init+0x284>)
80019a0: fba2 2303 umull r2, r3, r2, r3
80019a4: 099b lsrs r3, r3, #6
80019a6: 3301 adds r3, #1
80019a8: 687a ldr r2, [r7, #4]
80019aa: 6812 ldr r2, [r2, #0]
80019ac: 430b orrs r3, r1
80019ae: 6213 str r3, [r2, #32]
/*---------------------------- I2Cx CCR Configuration ----------------------*/
/* Configure I2Cx: Speed */
MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle));
80019b0: 687b ldr r3, [r7, #4]
80019b2: 681b ldr r3, [r3, #0]
80019b4: 69db ldr r3, [r3, #28]
80019b6: f423 424f bic.w r2, r3, #52992 @ 0xcf00
80019ba: f022 02ff bic.w r2, r2, #255 @ 0xff
80019be: 687b ldr r3, [r7, #4]
80019c0: 685b ldr r3, [r3, #4]
80019c2: 495c ldr r1, [pc, #368] @ (8001b34 <HAL_I2C_Init+0x274>)
80019c4: 428b cmp r3, r1
80019c6: d819 bhi.n 80019fc <HAL_I2C_Init+0x13c>
80019c8: 68fb ldr r3, [r7, #12]
80019ca: 1e59 subs r1, r3, #1
80019cc: 687b ldr r3, [r7, #4]
80019ce: 685b ldr r3, [r3, #4]
80019d0: 005b lsls r3, r3, #1
80019d2: fbb1 f3f3 udiv r3, r1, r3
80019d6: 1c59 adds r1, r3, #1
80019d8: f640 73fc movw r3, #4092 @ 0xffc
80019dc: 400b ands r3, r1
80019de: 2b00 cmp r3, #0
80019e0: d00a beq.n 80019f8 <HAL_I2C_Init+0x138>
80019e2: 68fb ldr r3, [r7, #12]
80019e4: 1e59 subs r1, r3, #1
80019e6: 687b ldr r3, [r7, #4]
80019e8: 685b ldr r3, [r3, #4]
80019ea: 005b lsls r3, r3, #1
80019ec: fbb1 f3f3 udiv r3, r1, r3
80019f0: 3301 adds r3, #1
80019f2: f3c3 030b ubfx r3, r3, #0, #12
80019f6: e051 b.n 8001a9c <HAL_I2C_Init+0x1dc>
80019f8: 2304 movs r3, #4
80019fa: e04f b.n 8001a9c <HAL_I2C_Init+0x1dc>
80019fc: 687b ldr r3, [r7, #4]
80019fe: 689b ldr r3, [r3, #8]
8001a00: 2b00 cmp r3, #0
8001a02: d111 bne.n 8001a28 <HAL_I2C_Init+0x168>
8001a04: 68fb ldr r3, [r7, #12]
8001a06: 1e58 subs r0, r3, #1
8001a08: 687b ldr r3, [r7, #4]
8001a0a: 6859 ldr r1, [r3, #4]
8001a0c: 460b mov r3, r1
8001a0e: 005b lsls r3, r3, #1
8001a10: 440b add r3, r1
8001a12: fbb0 f3f3 udiv r3, r0, r3
8001a16: 3301 adds r3, #1
8001a18: f3c3 030b ubfx r3, r3, #0, #12
8001a1c: 2b00 cmp r3, #0
8001a1e: bf0c ite eq
8001a20: 2301 moveq r3, #1
8001a22: 2300 movne r3, #0
8001a24: b2db uxtb r3, r3
8001a26: e012 b.n 8001a4e <HAL_I2C_Init+0x18e>
8001a28: 68fb ldr r3, [r7, #12]
8001a2a: 1e58 subs r0, r3, #1
8001a2c: 687b ldr r3, [r7, #4]
8001a2e: 6859 ldr r1, [r3, #4]
8001a30: 460b mov r3, r1
8001a32: 009b lsls r3, r3, #2
8001a34: 440b add r3, r1
8001a36: 0099 lsls r1, r3, #2
8001a38: 440b add r3, r1
8001a3a: fbb0 f3f3 udiv r3, r0, r3
8001a3e: 3301 adds r3, #1
8001a40: f3c3 030b ubfx r3, r3, #0, #12
8001a44: 2b00 cmp r3, #0
8001a46: bf0c ite eq
8001a48: 2301 moveq r3, #1
8001a4a: 2300 movne r3, #0
8001a4c: b2db uxtb r3, r3
8001a4e: 2b00 cmp r3, #0
8001a50: d001 beq.n 8001a56 <HAL_I2C_Init+0x196>
8001a52: 2301 movs r3, #1
8001a54: e022 b.n 8001a9c <HAL_I2C_Init+0x1dc>
8001a56: 687b ldr r3, [r7, #4]
8001a58: 689b ldr r3, [r3, #8]
8001a5a: 2b00 cmp r3, #0
8001a5c: d10e bne.n 8001a7c <HAL_I2C_Init+0x1bc>
8001a5e: 68fb ldr r3, [r7, #12]
8001a60: 1e58 subs r0, r3, #1
8001a62: 687b ldr r3, [r7, #4]
8001a64: 6859 ldr r1, [r3, #4]
8001a66: 460b mov r3, r1
8001a68: 005b lsls r3, r3, #1
8001a6a: 440b add r3, r1
8001a6c: fbb0 f3f3 udiv r3, r0, r3
8001a70: 3301 adds r3, #1
8001a72: f3c3 030b ubfx r3, r3, #0, #12
8001a76: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8001a7a: e00f b.n 8001a9c <HAL_I2C_Init+0x1dc>
8001a7c: 68fb ldr r3, [r7, #12]
8001a7e: 1e58 subs r0, r3, #1
8001a80: 687b ldr r3, [r7, #4]
8001a82: 6859 ldr r1, [r3, #4]
8001a84: 460b mov r3, r1
8001a86: 009b lsls r3, r3, #2
8001a88: 440b add r3, r1
8001a8a: 0099 lsls r1, r3, #2
8001a8c: 440b add r3, r1
8001a8e: fbb0 f3f3 udiv r3, r0, r3
8001a92: 3301 adds r3, #1
8001a94: f3c3 030b ubfx r3, r3, #0, #12
8001a98: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8001a9c: 6879 ldr r1, [r7, #4]
8001a9e: 6809 ldr r1, [r1, #0]
8001aa0: 4313 orrs r3, r2
8001aa2: 61cb str r3, [r1, #28]
/*---------------------------- I2Cx CR1 Configuration ----------------------*/
/* Configure I2Cx: Generalcall and NoStretch mode */
MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode));
8001aa4: 687b ldr r3, [r7, #4]
8001aa6: 681b ldr r3, [r3, #0]
8001aa8: 681b ldr r3, [r3, #0]
8001aaa: f023 01c0 bic.w r1, r3, #192 @ 0xc0
8001aae: 687b ldr r3, [r7, #4]
8001ab0: 69da ldr r2, [r3, #28]
8001ab2: 687b ldr r3, [r7, #4]
8001ab4: 6a1b ldr r3, [r3, #32]
8001ab6: 431a orrs r2, r3
8001ab8: 687b ldr r3, [r7, #4]
8001aba: 681b ldr r3, [r3, #0]
8001abc: 430a orrs r2, r1
8001abe: 601a str r2, [r3, #0]
/*---------------------------- I2Cx OAR1 Configuration ---------------------*/
/* Configure I2Cx: Own Address1 and addressing mode */
MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1));
8001ac0: 687b ldr r3, [r7, #4]
8001ac2: 681b ldr r3, [r3, #0]
8001ac4: 689b ldr r3, [r3, #8]
8001ac6: f423 4303 bic.w r3, r3, #33536 @ 0x8300
8001aca: f023 03ff bic.w r3, r3, #255 @ 0xff
8001ace: 687a ldr r2, [r7, #4]
8001ad0: 6911 ldr r1, [r2, #16]
8001ad2: 687a ldr r2, [r7, #4]
8001ad4: 68d2 ldr r2, [r2, #12]
8001ad6: 4311 orrs r1, r2
8001ad8: 687a ldr r2, [r7, #4]
8001ada: 6812 ldr r2, [r2, #0]
8001adc: 430b orrs r3, r1
8001ade: 6093 str r3, [r2, #8]
/*---------------------------- I2Cx OAR2 Configuration ---------------------*/
/* Configure I2Cx: Dual mode and Own Address2 */
MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2));
8001ae0: 687b ldr r3, [r7, #4]
8001ae2: 681b ldr r3, [r3, #0]
8001ae4: 68db ldr r3, [r3, #12]
8001ae6: f023 01ff bic.w r1, r3, #255 @ 0xff
8001aea: 687b ldr r3, [r7, #4]
8001aec: 695a ldr r2, [r3, #20]
8001aee: 687b ldr r3, [r7, #4]
8001af0: 699b ldr r3, [r3, #24]
8001af2: 431a orrs r2, r3
8001af4: 687b ldr r3, [r7, #4]
8001af6: 681b ldr r3, [r3, #0]
8001af8: 430a orrs r2, r1
8001afa: 60da str r2, [r3, #12]
/* Enable the selected I2C peripheral */
__HAL_I2C_ENABLE(hi2c);
8001afc: 687b ldr r3, [r7, #4]
8001afe: 681b ldr r3, [r3, #0]
8001b00: 681a ldr r2, [r3, #0]
8001b02: 687b ldr r3, [r7, #4]
8001b04: 681b ldr r3, [r3, #0]
8001b06: f042 0201 orr.w r2, r2, #1
8001b0a: 601a str r2, [r3, #0]
hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
8001b0c: 687b ldr r3, [r7, #4]
8001b0e: 2200 movs r2, #0
8001b10: 641a str r2, [r3, #64] @ 0x40
hi2c->State = HAL_I2C_STATE_READY;
8001b12: 687b ldr r3, [r7, #4]
8001b14: 2220 movs r2, #32
8001b16: f883 203d strb.w r2, [r3, #61] @ 0x3d
hi2c->PreviousState = I2C_STATE_NONE;
8001b1a: 687b ldr r3, [r7, #4]
8001b1c: 2200 movs r2, #0
8001b1e: 631a str r2, [r3, #48] @ 0x30
hi2c->Mode = HAL_I2C_MODE_NONE;
8001b20: 687b ldr r3, [r7, #4]
8001b22: 2200 movs r2, #0
8001b24: f883 203e strb.w r2, [r3, #62] @ 0x3e
return HAL_OK;
8001b28: 2300 movs r3, #0
}
8001b2a: 4618 mov r0, r3
8001b2c: 3710 adds r7, #16
8001b2e: 46bd mov sp, r7
8001b30: bd80 pop {r7, pc}
8001b32: bf00 nop
8001b34: 000186a0 .word 0x000186a0
8001b38: 001e847f .word 0x001e847f
8001b3c: 003d08ff .word 0x003d08ff
8001b40: 431bde83 .word 0x431bde83
8001b44: 10624dd3 .word 0x10624dd3
08001b48 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8001b48: b580 push {r7, lr}
8001b4a: b086 sub sp, #24
8001b4c: af02 add r7, sp, #8
8001b4e: 6078 str r0, [r7, #4]
const USB_OTG_GlobalTypeDef *USBx;
#endif /* defined (USB_OTG_FS) */
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8001b50: 687b ldr r3, [r7, #4]
8001b52: 2b00 cmp r3, #0
8001b54: d101 bne.n 8001b5a <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8001b56: 2301 movs r3, #1
8001b58: e108 b.n 8001d6c <HAL_PCD_Init+0x224>
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
#if defined (USB_OTG_FS)
USBx = hpcd->Instance;
8001b5a: 687b ldr r3, [r7, #4]
8001b5c: 681b ldr r3, [r3, #0]
8001b5e: 60bb str r3, [r7, #8]
#endif /* defined (USB_OTG_FS) */
if (hpcd->State == HAL_PCD_STATE_RESET)
8001b60: 687b ldr r3, [r7, #4]
8001b62: f893 3495 ldrb.w r3, [r3, #1173] @ 0x495
8001b66: b2db uxtb r3, r3
8001b68: 2b00 cmp r3, #0
8001b6a: d106 bne.n 8001b7a <HAL_PCD_Init+0x32>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8001b6c: 687b ldr r3, [r7, #4]
8001b6e: 2200 movs r2, #0
8001b70: f883 2494 strb.w r2, [r3, #1172] @ 0x494
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8001b74: 6878 ldr r0, [r7, #4]
8001b76: f006 fc8d bl 8008494 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8001b7a: 687b ldr r3, [r7, #4]
8001b7c: 2203 movs r2, #3
8001b7e: f883 2495 strb.w r2, [r3, #1173] @ 0x495
#if defined (USB_OTG_FS)
/* Disable DMA mode for FS instance */
if (USBx == USB_OTG_FS)
8001b82: 68bb ldr r3, [r7, #8]
8001b84: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
8001b88: d102 bne.n 8001b90 <HAL_PCD_Init+0x48>
{
hpcd->Init.dma_enable = 0U;
8001b8a: 687b ldr r3, [r7, #4]
8001b8c: 2200 movs r2, #0
8001b8e: 719a strb r2, [r3, #6]
}
#endif /* defined (USB_OTG_FS) */
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8001b90: 687b ldr r3, [r7, #4]
8001b92: 681b ldr r3, [r3, #0]
8001b94: 4618 mov r0, r3
8001b96: f003 fb6e bl 8005276 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8001b9a: 687b ldr r3, [r7, #4]
8001b9c: 6818 ldr r0, [r3, #0]
8001b9e: 687b ldr r3, [r7, #4]
8001ba0: 7c1a ldrb r2, [r3, #16]
8001ba2: f88d 2000 strb.w r2, [sp]
8001ba6: 3304 adds r3, #4
8001ba8: cb0e ldmia r3, {r1, r2, r3}
8001baa: f003 fa4d bl 8005048 <USB_CoreInit>
8001bae: 4603 mov r3, r0
8001bb0: 2b00 cmp r3, #0
8001bb2: d005 beq.n 8001bc0 <HAL_PCD_Init+0x78>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8001bb4: 687b ldr r3, [r7, #4]
8001bb6: 2202 movs r2, #2
8001bb8: f883 2495 strb.w r2, [r3, #1173] @ 0x495
return HAL_ERROR;
8001bbc: 2301 movs r3, #1
8001bbe: e0d5 b.n 8001d6c <HAL_PCD_Init+0x224>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
8001bc0: 687b ldr r3, [r7, #4]
8001bc2: 681b ldr r3, [r3, #0]
8001bc4: 2100 movs r1, #0
8001bc6: 4618 mov r0, r3
8001bc8: f003 fb66 bl 8005298 <USB_SetCurrentMode>
8001bcc: 4603 mov r3, r0
8001bce: 2b00 cmp r3, #0
8001bd0: d005 beq.n 8001bde <HAL_PCD_Init+0x96>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8001bd2: 687b ldr r3, [r7, #4]
8001bd4: 2202 movs r2, #2
8001bd6: f883 2495 strb.w r2, [r3, #1173] @ 0x495
return HAL_ERROR;
8001bda: 2301 movs r3, #1
8001bdc: e0c6 b.n 8001d6c <HAL_PCD_Init+0x224>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001bde: 2300 movs r3, #0
8001be0: 73fb strb r3, [r7, #15]
8001be2: e04a b.n 8001c7a <HAL_PCD_Init+0x132>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
8001be4: 7bfa ldrb r2, [r7, #15]
8001be6: 6879 ldr r1, [r7, #4]
8001be8: 4613 mov r3, r2
8001bea: 00db lsls r3, r3, #3
8001bec: 4413 add r3, r2
8001bee: 009b lsls r3, r3, #2
8001bf0: 440b add r3, r1
8001bf2: 3315 adds r3, #21
8001bf4: 2201 movs r2, #1
8001bf6: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8001bf8: 7bfa ldrb r2, [r7, #15]
8001bfa: 6879 ldr r1, [r7, #4]
8001bfc: 4613 mov r3, r2
8001bfe: 00db lsls r3, r3, #3
8001c00: 4413 add r3, r2
8001c02: 009b lsls r3, r3, #2
8001c04: 440b add r3, r1
8001c06: 3314 adds r3, #20
8001c08: 7bfa ldrb r2, [r7, #15]
8001c0a: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].tx_fifo_num = i;
8001c0c: 7bfa ldrb r2, [r7, #15]
8001c0e: 7bfb ldrb r3, [r7, #15]
8001c10: b298 uxth r0, r3
8001c12: 6879 ldr r1, [r7, #4]
8001c14: 4613 mov r3, r2
8001c16: 00db lsls r3, r3, #3
8001c18: 4413 add r3, r2
8001c1a: 009b lsls r3, r3, #2
8001c1c: 440b add r3, r1
8001c1e: 332e adds r3, #46 @ 0x2e
8001c20: 4602 mov r2, r0
8001c22: 801a strh r2, [r3, #0]
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
8001c24: 7bfa ldrb r2, [r7, #15]
8001c26: 6879 ldr r1, [r7, #4]
8001c28: 4613 mov r3, r2
8001c2a: 00db lsls r3, r3, #3
8001c2c: 4413 add r3, r2
8001c2e: 009b lsls r3, r3, #2
8001c30: 440b add r3, r1
8001c32: 3318 adds r3, #24
8001c34: 2200 movs r2, #0
8001c36: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
8001c38: 7bfa ldrb r2, [r7, #15]
8001c3a: 6879 ldr r1, [r7, #4]
8001c3c: 4613 mov r3, r2
8001c3e: 00db lsls r3, r3, #3
8001c40: 4413 add r3, r2
8001c42: 009b lsls r3, r3, #2
8001c44: 440b add r3, r1
8001c46: 331c adds r3, #28
8001c48: 2200 movs r2, #0
8001c4a: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8001c4c: 7bfa ldrb r2, [r7, #15]
8001c4e: 6879 ldr r1, [r7, #4]
8001c50: 4613 mov r3, r2
8001c52: 00db lsls r3, r3, #3
8001c54: 4413 add r3, r2
8001c56: 009b lsls r3, r3, #2
8001c58: 440b add r3, r1
8001c5a: 3320 adds r3, #32
8001c5c: 2200 movs r2, #0
8001c5e: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
8001c60: 7bfa ldrb r2, [r7, #15]
8001c62: 6879 ldr r1, [r7, #4]
8001c64: 4613 mov r3, r2
8001c66: 00db lsls r3, r3, #3
8001c68: 4413 add r3, r2
8001c6a: 009b lsls r3, r3, #2
8001c6c: 440b add r3, r1
8001c6e: 3324 adds r3, #36 @ 0x24
8001c70: 2200 movs r2, #0
8001c72: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001c74: 7bfb ldrb r3, [r7, #15]
8001c76: 3301 adds r3, #1
8001c78: 73fb strb r3, [r7, #15]
8001c7a: 687b ldr r3, [r7, #4]
8001c7c: 791b ldrb r3, [r3, #4]
8001c7e: 7bfa ldrb r2, [r7, #15]
8001c80: 429a cmp r2, r3
8001c82: d3af bcc.n 8001be4 <HAL_PCD_Init+0x9c>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001c84: 2300 movs r3, #0
8001c86: 73fb strb r3, [r7, #15]
8001c88: e044 b.n 8001d14 <HAL_PCD_Init+0x1cc>
{
hpcd->OUT_ep[i].is_in = 0U;
8001c8a: 7bfa ldrb r2, [r7, #15]
8001c8c: 6879 ldr r1, [r7, #4]
8001c8e: 4613 mov r3, r2
8001c90: 00db lsls r3, r3, #3
8001c92: 4413 add r3, r2
8001c94: 009b lsls r3, r3, #2
8001c96: 440b add r3, r1
8001c98: f203 2355 addw r3, r3, #597 @ 0x255
8001c9c: 2200 movs r2, #0
8001c9e: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
8001ca0: 7bfa ldrb r2, [r7, #15]
8001ca2: 6879 ldr r1, [r7, #4]
8001ca4: 4613 mov r3, r2
8001ca6: 00db lsls r3, r3, #3
8001ca8: 4413 add r3, r2
8001caa: 009b lsls r3, r3, #2
8001cac: 440b add r3, r1
8001cae: f503 7315 add.w r3, r3, #596 @ 0x254
8001cb2: 7bfa ldrb r2, [r7, #15]
8001cb4: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8001cb6: 7bfa ldrb r2, [r7, #15]
8001cb8: 6879 ldr r1, [r7, #4]
8001cba: 4613 mov r3, r2
8001cbc: 00db lsls r3, r3, #3
8001cbe: 4413 add r3, r2
8001cc0: 009b lsls r3, r3, #2
8001cc2: 440b add r3, r1
8001cc4: f503 7316 add.w r3, r3, #600 @ 0x258
8001cc8: 2200 movs r2, #0
8001cca: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
8001ccc: 7bfa ldrb r2, [r7, #15]
8001cce: 6879 ldr r1, [r7, #4]
8001cd0: 4613 mov r3, r2
8001cd2: 00db lsls r3, r3, #3
8001cd4: 4413 add r3, r2
8001cd6: 009b lsls r3, r3, #2
8001cd8: 440b add r3, r1
8001cda: f503 7317 add.w r3, r3, #604 @ 0x25c
8001cde: 2200 movs r2, #0
8001ce0: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
8001ce2: 7bfa ldrb r2, [r7, #15]
8001ce4: 6879 ldr r1, [r7, #4]
8001ce6: 4613 mov r3, r2
8001ce8: 00db lsls r3, r3, #3
8001cea: 4413 add r3, r2
8001cec: 009b lsls r3, r3, #2
8001cee: 440b add r3, r1
8001cf0: f503 7318 add.w r3, r3, #608 @ 0x260
8001cf4: 2200 movs r2, #0
8001cf6: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
8001cf8: 7bfa ldrb r2, [r7, #15]
8001cfa: 6879 ldr r1, [r7, #4]
8001cfc: 4613 mov r3, r2
8001cfe: 00db lsls r3, r3, #3
8001d00: 4413 add r3, r2
8001d02: 009b lsls r3, r3, #2
8001d04: 440b add r3, r1
8001d06: f503 7319 add.w r3, r3, #612 @ 0x264
8001d0a: 2200 movs r2, #0
8001d0c: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001d0e: 7bfb ldrb r3, [r7, #15]
8001d10: 3301 adds r3, #1
8001d12: 73fb strb r3, [r7, #15]
8001d14: 687b ldr r3, [r7, #4]
8001d16: 791b ldrb r3, [r3, #4]
8001d18: 7bfa ldrb r2, [r7, #15]
8001d1a: 429a cmp r2, r3
8001d1c: d3b5 bcc.n 8001c8a <HAL_PCD_Init+0x142>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8001d1e: 687b ldr r3, [r7, #4]
8001d20: 6818 ldr r0, [r3, #0]
8001d22: 687b ldr r3, [r7, #4]
8001d24: 7c1a ldrb r2, [r3, #16]
8001d26: f88d 2000 strb.w r2, [sp]
8001d2a: 3304 adds r3, #4
8001d2c: cb0e ldmia r3, {r1, r2, r3}
8001d2e: f003 faff bl 8005330 <USB_DevInit>
8001d32: 4603 mov r3, r0
8001d34: 2b00 cmp r3, #0
8001d36: d005 beq.n 8001d44 <HAL_PCD_Init+0x1fc>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8001d38: 687b ldr r3, [r7, #4]
8001d3a: 2202 movs r2, #2
8001d3c: f883 2495 strb.w r2, [r3, #1173] @ 0x495
return HAL_ERROR;
8001d40: 2301 movs r3, #1
8001d42: e013 b.n 8001d6c <HAL_PCD_Init+0x224>
}
hpcd->USB_Address = 0U;
8001d44: 687b ldr r3, [r7, #4]
8001d46: 2200 movs r2, #0
8001d48: 745a strb r2, [r3, #17]
hpcd->State = HAL_PCD_STATE_READY;
8001d4a: 687b ldr r3, [r7, #4]
8001d4c: 2201 movs r2, #1
8001d4e: f883 2495 strb.w r2, [r3, #1173] @ 0x495
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \
|| defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \
|| defined(STM32F423xx)
/* Activate LPM */
if (hpcd->Init.lpm_enable == 1U)
8001d52: 687b ldr r3, [r7, #4]
8001d54: 7b1b ldrb r3, [r3, #12]
8001d56: 2b01 cmp r3, #1
8001d58: d102 bne.n 8001d60 <HAL_PCD_Init+0x218>
{
(void)HAL_PCDEx_ActivateLPM(hpcd);
8001d5a: 6878 ldr r0, [r7, #4]
8001d5c: f001 f956 bl 800300c <HAL_PCDEx_ActivateLPM>
}
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||
defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||
defined(STM32F423xx) */
(void)USB_DevDisconnect(hpcd->Instance);
8001d60: 687b ldr r3, [r7, #4]
8001d62: 681b ldr r3, [r3, #0]
8001d64: 4618 mov r0, r3
8001d66: f004 fb3c bl 80063e2 <USB_DevDisconnect>
return HAL_OK;
8001d6a: 2300 movs r3, #0
}
8001d6c: 4618 mov r0, r3
8001d6e: 3710 adds r7, #16
8001d70: 46bd mov sp, r7
8001d72: bd80 pop {r7, pc}
08001d74 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
8001d74: b580 push {r7, lr}
8001d76: b084 sub sp, #16
8001d78: af00 add r7, sp, #0
8001d7a: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
8001d7c: 687b ldr r3, [r7, #4]
8001d7e: 681b ldr r3, [r3, #0]
8001d80: 60fb str r3, [r7, #12]
__HAL_LOCK(hpcd);
8001d82: 687b ldr r3, [r7, #4]
8001d84: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
8001d88: 2b01 cmp r3, #1
8001d8a: d101 bne.n 8001d90 <HAL_PCD_Start+0x1c>
8001d8c: 2302 movs r3, #2
8001d8e: e022 b.n 8001dd6 <HAL_PCD_Start+0x62>
8001d90: 687b ldr r3, [r7, #4]
8001d92: 2201 movs r2, #1
8001d94: f883 2494 strb.w r2, [r3, #1172] @ 0x494
if (((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) != 0U) &&
8001d98: 68fb ldr r3, [r7, #12]
8001d9a: 68db ldr r3, [r3, #12]
8001d9c: f003 0340 and.w r3, r3, #64 @ 0x40
8001da0: 2b00 cmp r3, #0
8001da2: d009 beq.n 8001db8 <HAL_PCD_Start+0x44>
(hpcd->Init.battery_charging_enable == 1U))
8001da4: 687b ldr r3, [r7, #4]
8001da6: 7b5b ldrb r3, [r3, #13]
if (((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) != 0U) &&
8001da8: 2b01 cmp r3, #1
8001daa: d105 bne.n 8001db8 <HAL_PCD_Start+0x44>
{
/* Enable USB Transceiver */
USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN;
8001dac: 68fb ldr r3, [r7, #12]
8001dae: 6b9b ldr r3, [r3, #56] @ 0x38
8001db0: f443 3280 orr.w r2, r3, #65536 @ 0x10000
8001db4: 68fb ldr r3, [r7, #12]
8001db6: 639a str r2, [r3, #56] @ 0x38
}
__HAL_PCD_ENABLE(hpcd);
8001db8: 687b ldr r3, [r7, #4]
8001dba: 681b ldr r3, [r3, #0]
8001dbc: 4618 mov r0, r3
8001dbe: f003 fa49 bl 8005254 <USB_EnableGlobalInt>
(void)USB_DevConnect(hpcd->Instance);
8001dc2: 687b ldr r3, [r7, #4]
8001dc4: 681b ldr r3, [r3, #0]
8001dc6: 4618 mov r0, r3
8001dc8: f004 faea bl 80063a0 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8001dcc: 687b ldr r3, [r7, #4]
8001dce: 2200 movs r2, #0
8001dd0: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
8001dd4: 2300 movs r3, #0
}
8001dd6: 4618 mov r0, r3
8001dd8: 3710 adds r7, #16
8001dda: 46bd mov sp, r7
8001ddc: bd80 pop {r7, pc}
08001dde <HAL_PCD_IRQHandler>:
* @brief Handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8001dde: b590 push {r4, r7, lr}
8001de0: b08d sub sp, #52 @ 0x34
8001de2: af00 add r7, sp, #0
8001de4: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
8001de6: 687b ldr r3, [r7, #4]
8001de8: 681b ldr r3, [r3, #0]
8001dea: 623b str r3, [r7, #32]
uint32_t USBx_BASE = (uint32_t)USBx;
8001dec: 6a3b ldr r3, [r7, #32]
8001dee: 61fb str r3, [r7, #28]
uint32_t epnum;
uint32_t fifoemptymsk;
uint32_t RegVal;
/* ensure that we are in device mode */
if (USB_GetMode(hpcd->Instance) == USB_OTG_MODE_DEVICE)
8001df0: 687b ldr r3, [r7, #4]
8001df2: 681b ldr r3, [r3, #0]
8001df4: 4618 mov r0, r3
8001df6: f004 fba8 bl 800654a <USB_GetMode>
8001dfa: 4603 mov r3, r0
8001dfc: 2b00 cmp r3, #0
8001dfe: f040 84b9 bne.w 8002774 <HAL_PCD_IRQHandler+0x996>
{
/* avoid spurious interrupt */
if (__HAL_PCD_IS_INVALID_INTERRUPT(hpcd))
8001e02: 687b ldr r3, [r7, #4]
8001e04: 681b ldr r3, [r3, #0]
8001e06: 4618 mov r0, r3
8001e08: f004 fb0c bl 8006424 <USB_ReadInterrupts>
8001e0c: 4603 mov r3, r0
8001e0e: 2b00 cmp r3, #0
8001e10: f000 84af beq.w 8002772 <HAL_PCD_IRQHandler+0x994>
{
return;
}
/* store current frame number */
hpcd->FrameNumber = (USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF_Msk) >> USB_OTG_DSTS_FNSOF_Pos;
8001e14: 69fb ldr r3, [r7, #28]
8001e16: f503 6300 add.w r3, r3, #2048 @ 0x800
8001e1a: 689b ldr r3, [r3, #8]
8001e1c: 0a1b lsrs r3, r3, #8
8001e1e: f3c3 020d ubfx r2, r3, #0, #14
8001e22: 687b ldr r3, [r7, #4]
8001e24: f8c3 24d4 str.w r2, [r3, #1236] @ 0x4d4
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_MMIS))
8001e28: 687b ldr r3, [r7, #4]
8001e2a: 681b ldr r3, [r3, #0]
8001e2c: 4618 mov r0, r3
8001e2e: f004 faf9 bl 8006424 <USB_ReadInterrupts>
8001e32: 4603 mov r3, r0
8001e34: f003 0302 and.w r3, r3, #2
8001e38: 2b02 cmp r3, #2
8001e3a: d107 bne.n 8001e4c <HAL_PCD_IRQHandler+0x6e>
{
/* incorrect mode, acknowledge the interrupt */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS);
8001e3c: 687b ldr r3, [r7, #4]
8001e3e: 681b ldr r3, [r3, #0]
8001e40: 695a ldr r2, [r3, #20]
8001e42: 687b ldr r3, [r7, #4]
8001e44: 681b ldr r3, [r3, #0]
8001e46: f002 0202 and.w r2, r2, #2
8001e4a: 615a str r2, [r3, #20]
}
/* Handle RxQLevel Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL))
8001e4c: 687b ldr r3, [r7, #4]
8001e4e: 681b ldr r3, [r3, #0]
8001e50: 4618 mov r0, r3
8001e52: f004 fae7 bl 8006424 <USB_ReadInterrupts>
8001e56: 4603 mov r3, r0
8001e58: f003 0310 and.w r3, r3, #16
8001e5c: 2b10 cmp r3, #16
8001e5e: d161 bne.n 8001f24 <HAL_PCD_IRQHandler+0x146>
{
USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
8001e60: 687b ldr r3, [r7, #4]
8001e62: 681b ldr r3, [r3, #0]
8001e64: 699a ldr r2, [r3, #24]
8001e66: 687b ldr r3, [r7, #4]
8001e68: 681b ldr r3, [r3, #0]
8001e6a: f022 0210 bic.w r2, r2, #16
8001e6e: 619a str r2, [r3, #24]
RegVal = USBx->GRXSTSP;
8001e70: 6a3b ldr r3, [r7, #32]
8001e72: 6a1b ldr r3, [r3, #32]
8001e74: 61bb str r3, [r7, #24]
ep = &hpcd->OUT_ep[RegVal & USB_OTG_GRXSTSP_EPNUM];
8001e76: 69bb ldr r3, [r7, #24]
8001e78: f003 020f and.w r2, r3, #15
8001e7c: 4613 mov r3, r2
8001e7e: 00db lsls r3, r3, #3
8001e80: 4413 add r3, r2
8001e82: 009b lsls r3, r3, #2
8001e84: f503 7314 add.w r3, r3, #592 @ 0x250
8001e88: 687a ldr r2, [r7, #4]
8001e8a: 4413 add r3, r2
8001e8c: 3304 adds r3, #4
8001e8e: 617b str r3, [r7, #20]
if (((RegVal & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT)
8001e90: 69bb ldr r3, [r7, #24]
8001e92: f403 13f0 and.w r3, r3, #1966080 @ 0x1e0000
8001e96: f5b3 2f80 cmp.w r3, #262144 @ 0x40000
8001e9a: d124 bne.n 8001ee6 <HAL_PCD_IRQHandler+0x108>
{
if ((RegVal & USB_OTG_GRXSTSP_BCNT) != 0U)
8001e9c: 69ba ldr r2, [r7, #24]
8001e9e: f647 73f0 movw r3, #32752 @ 0x7ff0
8001ea2: 4013 ands r3, r2
8001ea4: 2b00 cmp r3, #0
8001ea6: d035 beq.n 8001f14 <HAL_PCD_IRQHandler+0x136>
{
(void)USB_ReadPacket(USBx, ep->xfer_buff,
8001ea8: 697b ldr r3, [r7, #20]
8001eaa: 68d9 ldr r1, [r3, #12]
(uint16_t)((RegVal & USB_OTG_GRXSTSP_BCNT) >> 4));
8001eac: 69bb ldr r3, [r7, #24]
8001eae: 091b lsrs r3, r3, #4
8001eb0: b29b uxth r3, r3
(void)USB_ReadPacket(USBx, ep->xfer_buff,
8001eb2: f3c3 030a ubfx r3, r3, #0, #11
8001eb6: b29b uxth r3, r3
8001eb8: 461a mov r2, r3
8001eba: 6a38 ldr r0, [r7, #32]
8001ebc: f004 f91e bl 80060fc <USB_ReadPacket>
ep->xfer_buff += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4;
8001ec0: 697b ldr r3, [r7, #20]
8001ec2: 68da ldr r2, [r3, #12]
8001ec4: 69bb ldr r3, [r7, #24]
8001ec6: 091b lsrs r3, r3, #4
8001ec8: f3c3 030a ubfx r3, r3, #0, #11
8001ecc: 441a add r2, r3
8001ece: 697b ldr r3, [r7, #20]
8001ed0: 60da str r2, [r3, #12]
ep->xfer_count += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4;
8001ed2: 697b ldr r3, [r7, #20]
8001ed4: 695a ldr r2, [r3, #20]
8001ed6: 69bb ldr r3, [r7, #24]
8001ed8: 091b lsrs r3, r3, #4
8001eda: f3c3 030a ubfx r3, r3, #0, #11
8001ede: 441a add r2, r3
8001ee0: 697b ldr r3, [r7, #20]
8001ee2: 615a str r2, [r3, #20]
8001ee4: e016 b.n 8001f14 <HAL_PCD_IRQHandler+0x136>
}
}
else if (((RegVal & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT)
8001ee6: 69bb ldr r3, [r7, #24]
8001ee8: f403 13f0 and.w r3, r3, #1966080 @ 0x1e0000
8001eec: f5b3 2f40 cmp.w r3, #786432 @ 0xc0000
8001ef0: d110 bne.n 8001f14 <HAL_PCD_IRQHandler+0x136>
{
(void)USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U);
8001ef2: 687b ldr r3, [r7, #4]
8001ef4: f203 439c addw r3, r3, #1180 @ 0x49c
8001ef8: 2208 movs r2, #8
8001efa: 4619 mov r1, r3
8001efc: 6a38 ldr r0, [r7, #32]
8001efe: f004 f8fd bl 80060fc <USB_ReadPacket>
ep->xfer_count += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4;
8001f02: 697b ldr r3, [r7, #20]
8001f04: 695a ldr r2, [r3, #20]
8001f06: 69bb ldr r3, [r7, #24]
8001f08: 091b lsrs r3, r3, #4
8001f0a: f3c3 030a ubfx r3, r3, #0, #11
8001f0e: 441a add r2, r3
8001f10: 697b ldr r3, [r7, #20]
8001f12: 615a str r2, [r3, #20]
else
{
/* ... */
}
USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL);
8001f14: 687b ldr r3, [r7, #4]
8001f16: 681b ldr r3, [r3, #0]
8001f18: 699a ldr r2, [r3, #24]
8001f1a: 687b ldr r3, [r7, #4]
8001f1c: 681b ldr r3, [r3, #0]
8001f1e: f042 0210 orr.w r2, r2, #16
8001f22: 619a str r2, [r3, #24]
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OEPINT))
8001f24: 687b ldr r3, [r7, #4]
8001f26: 681b ldr r3, [r3, #0]
8001f28: 4618 mov r0, r3
8001f2a: f004 fa7b bl 8006424 <USB_ReadInterrupts>
8001f2e: 4603 mov r3, r0
8001f30: f403 2300 and.w r3, r3, #524288 @ 0x80000
8001f34: f5b3 2f00 cmp.w r3, #524288 @ 0x80000
8001f38: f040 80a7 bne.w 800208a <HAL_PCD_IRQHandler+0x2ac>
{
epnum = 0U;
8001f3c: 2300 movs r3, #0
8001f3e: 627b str r3, [r7, #36] @ 0x24
/* Read in the device interrupt bits */
ep_intr = USB_ReadDevAllOutEpInterrupt(hpcd->Instance);
8001f40: 687b ldr r3, [r7, #4]
8001f42: 681b ldr r3, [r3, #0]
8001f44: 4618 mov r0, r3
8001f46: f004 fa80 bl 800644a <USB_ReadDevAllOutEpInterrupt>
8001f4a: 62b8 str r0, [r7, #40] @ 0x28
while (ep_intr != 0U)
8001f4c: e099 b.n 8002082 <HAL_PCD_IRQHandler+0x2a4>
{
if ((ep_intr & 0x1U) != 0U)
8001f4e: 6abb ldr r3, [r7, #40] @ 0x28
8001f50: f003 0301 and.w r3, r3, #1
8001f54: 2b00 cmp r3, #0
8001f56: f000 808e beq.w 8002076 <HAL_PCD_IRQHandler+0x298>
{
epint = USB_ReadDevOutEPInterrupt(hpcd->Instance, (uint8_t)epnum);
8001f5a: 687b ldr r3, [r7, #4]
8001f5c: 681b ldr r3, [r3, #0]
8001f5e: 6a7a ldr r2, [r7, #36] @ 0x24
8001f60: b2d2 uxtb r2, r2
8001f62: 4611 mov r1, r2
8001f64: 4618 mov r0, r3
8001f66: f004 faa4 bl 80064b2 <USB_ReadDevOutEPInterrupt>
8001f6a: 6138 str r0, [r7, #16]
if ((epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC)
8001f6c: 693b ldr r3, [r7, #16]
8001f6e: f003 0301 and.w r3, r3, #1
8001f72: 2b00 cmp r3, #0
8001f74: d00c beq.n 8001f90 <HAL_PCD_IRQHandler+0x1b2>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_XFRC);
8001f76: 6a7b ldr r3, [r7, #36] @ 0x24
8001f78: 015a lsls r2, r3, #5
8001f7a: 69fb ldr r3, [r7, #28]
8001f7c: 4413 add r3, r2
8001f7e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8001f82: 461a mov r2, r3
8001f84: 2301 movs r3, #1
8001f86: 6093 str r3, [r2, #8]
(void)PCD_EP_OutXfrComplete_int(hpcd, epnum);
8001f88: 6a79 ldr r1, [r7, #36] @ 0x24
8001f8a: 6878 ldr r0, [r7, #4]
8001f8c: f000 feb8 bl 8002d00 <PCD_EP_OutXfrComplete_int>
}
if ((epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP)
8001f90: 693b ldr r3, [r7, #16]
8001f92: f003 0308 and.w r3, r3, #8
8001f96: 2b00 cmp r3, #0
8001f98: d00c beq.n 8001fb4 <HAL_PCD_IRQHandler+0x1d6>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP);
8001f9a: 6a7b ldr r3, [r7, #36] @ 0x24
8001f9c: 015a lsls r2, r3, #5
8001f9e: 69fb ldr r3, [r7, #28]
8001fa0: 4413 add r3, r2
8001fa2: f503 6330 add.w r3, r3, #2816 @ 0xb00
8001fa6: 461a mov r2, r3
8001fa8: 2308 movs r3, #8
8001faa: 6093 str r3, [r2, #8]
/* Class B setup phase done for previous decoded setup */
(void)PCD_EP_OutSetupPacket_int(hpcd, epnum);
8001fac: 6a79 ldr r1, [r7, #36] @ 0x24
8001fae: 6878 ldr r0, [r7, #4]
8001fb0: f000 ff8e bl 8002ed0 <PCD_EP_OutSetupPacket_int>
}
if ((epint & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS)
8001fb4: 693b ldr r3, [r7, #16]
8001fb6: f003 0310 and.w r3, r3, #16
8001fba: 2b00 cmp r3, #0
8001fbc: d008 beq.n 8001fd0 <HAL_PCD_IRQHandler+0x1f2>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPDIS);
8001fbe: 6a7b ldr r3, [r7, #36] @ 0x24
8001fc0: 015a lsls r2, r3, #5
8001fc2: 69fb ldr r3, [r7, #28]
8001fc4: 4413 add r3, r2
8001fc6: f503 6330 add.w r3, r3, #2816 @ 0xb00
8001fca: 461a mov r2, r3
8001fcc: 2310 movs r3, #16
8001fce: 6093 str r3, [r2, #8]
}
/* Clear OUT Endpoint disable interrupt */
if ((epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD)
8001fd0: 693b ldr r3, [r7, #16]
8001fd2: f003 0302 and.w r3, r3, #2
8001fd6: 2b00 cmp r3, #0
8001fd8: d030 beq.n 800203c <HAL_PCD_IRQHandler+0x25e>
{
if ((USBx->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF) == USB_OTG_GINTSTS_BOUTNAKEFF)
8001fda: 6a3b ldr r3, [r7, #32]
8001fdc: 695b ldr r3, [r3, #20]
8001fde: f003 0380 and.w r3, r3, #128 @ 0x80
8001fe2: 2b80 cmp r3, #128 @ 0x80
8001fe4: d109 bne.n 8001ffa <HAL_PCD_IRQHandler+0x21c>
{
USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK;
8001fe6: 69fb ldr r3, [r7, #28]
8001fe8: f503 6300 add.w r3, r3, #2048 @ 0x800
8001fec: 685b ldr r3, [r3, #4]
8001fee: 69fa ldr r2, [r7, #28]
8001ff0: f502 6200 add.w r2, r2, #2048 @ 0x800
8001ff4: f443 6380 orr.w r3, r3, #1024 @ 0x400
8001ff8: 6053 str r3, [r2, #4]
}
ep = &hpcd->OUT_ep[epnum];
8001ffa: 6a7a ldr r2, [r7, #36] @ 0x24
8001ffc: 4613 mov r3, r2
8001ffe: 00db lsls r3, r3, #3
8002000: 4413 add r3, r2
8002002: 009b lsls r3, r3, #2
8002004: f503 7314 add.w r3, r3, #592 @ 0x250
8002008: 687a ldr r2, [r7, #4]
800200a: 4413 add r3, r2
800200c: 3304 adds r3, #4
800200e: 617b str r3, [r7, #20]
if (ep->is_iso_incomplete == 1U)
8002010: 697b ldr r3, [r7, #20]
8002012: 78db ldrb r3, [r3, #3]
8002014: 2b01 cmp r3, #1
8002016: d108 bne.n 800202a <HAL_PCD_IRQHandler+0x24c>
{
ep->is_iso_incomplete = 0U;
8002018: 697b ldr r3, [r7, #20]
800201a: 2200 movs r2, #0
800201c: 70da strb r2, [r3, #3]
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum);
800201e: 6a7b ldr r3, [r7, #36] @ 0x24
8002020: b2db uxtb r3, r3
8002022: 4619 mov r1, r3
8002024: 6878 ldr r0, [r7, #4]
8002026: f006 fb51 bl 80086cc <HAL_PCD_ISOOUTIncompleteCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD);
800202a: 6a7b ldr r3, [r7, #36] @ 0x24
800202c: 015a lsls r2, r3, #5
800202e: 69fb ldr r3, [r7, #28]
8002030: 4413 add r3, r2
8002032: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002036: 461a mov r2, r3
8002038: 2302 movs r3, #2
800203a: 6093 str r3, [r2, #8]
}
/* Clear Status Phase Received interrupt */
if ((epint & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR)
800203c: 693b ldr r3, [r7, #16]
800203e: f003 0320 and.w r3, r3, #32
8002042: 2b00 cmp r3, #0
8002044: d008 beq.n 8002058 <HAL_PCD_IRQHandler+0x27a>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR);
8002046: 6a7b ldr r3, [r7, #36] @ 0x24
8002048: 015a lsls r2, r3, #5
800204a: 69fb ldr r3, [r7, #28]
800204c: 4413 add r3, r2
800204e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002052: 461a mov r2, r3
8002054: 2320 movs r3, #32
8002056: 6093 str r3, [r2, #8]
}
/* Clear OUT NAK interrupt */
if ((epint & USB_OTG_DOEPINT_NAK) == USB_OTG_DOEPINT_NAK)
8002058: 693b ldr r3, [r7, #16]
800205a: f403 5300 and.w r3, r3, #8192 @ 0x2000
800205e: 2b00 cmp r3, #0
8002060: d009 beq.n 8002076 <HAL_PCD_IRQHandler+0x298>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_NAK);
8002062: 6a7b ldr r3, [r7, #36] @ 0x24
8002064: 015a lsls r2, r3, #5
8002066: 69fb ldr r3, [r7, #28]
8002068: 4413 add r3, r2
800206a: f503 6330 add.w r3, r3, #2816 @ 0xb00
800206e: 461a mov r2, r3
8002070: f44f 5300 mov.w r3, #8192 @ 0x2000
8002074: 6093 str r3, [r2, #8]
}
}
epnum++;
8002076: 6a7b ldr r3, [r7, #36] @ 0x24
8002078: 3301 adds r3, #1
800207a: 627b str r3, [r7, #36] @ 0x24
ep_intr >>= 1U;
800207c: 6abb ldr r3, [r7, #40] @ 0x28
800207e: 085b lsrs r3, r3, #1
8002080: 62bb str r3, [r7, #40] @ 0x28
while (ep_intr != 0U)
8002082: 6abb ldr r3, [r7, #40] @ 0x28
8002084: 2b00 cmp r3, #0
8002086: f47f af62 bne.w 8001f4e <HAL_PCD_IRQHandler+0x170>
}
}
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IEPINT))
800208a: 687b ldr r3, [r7, #4]
800208c: 681b ldr r3, [r3, #0]
800208e: 4618 mov r0, r3
8002090: f004 f9c8 bl 8006424 <USB_ReadInterrupts>
8002094: 4603 mov r3, r0
8002096: f403 2380 and.w r3, r3, #262144 @ 0x40000
800209a: f5b3 2f80 cmp.w r3, #262144 @ 0x40000
800209e: f040 80db bne.w 8002258 <HAL_PCD_IRQHandler+0x47a>
{
/* Read in the device interrupt bits */
ep_intr = USB_ReadDevAllInEpInterrupt(hpcd->Instance);
80020a2: 687b ldr r3, [r7, #4]
80020a4: 681b ldr r3, [r3, #0]
80020a6: 4618 mov r0, r3
80020a8: f004 f9e9 bl 800647e <USB_ReadDevAllInEpInterrupt>
80020ac: 62b8 str r0, [r7, #40] @ 0x28
epnum = 0U;
80020ae: 2300 movs r3, #0
80020b0: 627b str r3, [r7, #36] @ 0x24
while (ep_intr != 0U)
80020b2: e0cd b.n 8002250 <HAL_PCD_IRQHandler+0x472>
{
if ((ep_intr & 0x1U) != 0U) /* In ITR */
80020b4: 6abb ldr r3, [r7, #40] @ 0x28
80020b6: f003 0301 and.w r3, r3, #1
80020ba: 2b00 cmp r3, #0
80020bc: f000 80c2 beq.w 8002244 <HAL_PCD_IRQHandler+0x466>
{
epint = USB_ReadDevInEPInterrupt(hpcd->Instance, (uint8_t)epnum);
80020c0: 687b ldr r3, [r7, #4]
80020c2: 681b ldr r3, [r3, #0]
80020c4: 6a7a ldr r2, [r7, #36] @ 0x24
80020c6: b2d2 uxtb r2, r2
80020c8: 4611 mov r1, r2
80020ca: 4618 mov r0, r3
80020cc: f004 fa0f bl 80064ee <USB_ReadDevInEPInterrupt>
80020d0: 6138 str r0, [r7, #16]
if ((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC)
80020d2: 693b ldr r3, [r7, #16]
80020d4: f003 0301 and.w r3, r3, #1
80020d8: 2b00 cmp r3, #0
80020da: d057 beq.n 800218c <HAL_PCD_IRQHandler+0x3ae>
{
fifoemptymsk = (uint32_t)(0x1UL << (epnum & EP_ADDR_MSK));
80020dc: 6a7b ldr r3, [r7, #36] @ 0x24
80020de: f003 030f and.w r3, r3, #15
80020e2: 2201 movs r2, #1
80020e4: fa02 f303 lsl.w r3, r2, r3
80020e8: 60fb str r3, [r7, #12]
USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk;
80020ea: 69fb ldr r3, [r7, #28]
80020ec: f503 6300 add.w r3, r3, #2048 @ 0x800
80020f0: 6b5a ldr r2, [r3, #52] @ 0x34
80020f2: 68fb ldr r3, [r7, #12]
80020f4: 43db mvns r3, r3
80020f6: 69f9 ldr r1, [r7, #28]
80020f8: f501 6100 add.w r1, r1, #2048 @ 0x800
80020fc: 4013 ands r3, r2
80020fe: 634b str r3, [r1, #52] @ 0x34
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC);
8002100: 6a7b ldr r3, [r7, #36] @ 0x24
8002102: 015a lsls r2, r3, #5
8002104: 69fb ldr r3, [r7, #28]
8002106: 4413 add r3, r2
8002108: f503 6310 add.w r3, r3, #2304 @ 0x900
800210c: 461a mov r2, r3
800210e: 2301 movs r3, #1
8002110: 6093 str r3, [r2, #8]
if (hpcd->Init.dma_enable == 1U)
8002112: 687b ldr r3, [r7, #4]
8002114: 799b ldrb r3, [r3, #6]
8002116: 2b01 cmp r3, #1
8002118: d132 bne.n 8002180 <HAL_PCD_IRQHandler+0x3a2>
{
hpcd->IN_ep[epnum].xfer_buff += hpcd->IN_ep[epnum].maxpacket;
800211a: 6879 ldr r1, [r7, #4]
800211c: 6a7a ldr r2, [r7, #36] @ 0x24
800211e: 4613 mov r3, r2
8002120: 00db lsls r3, r3, #3
8002122: 4413 add r3, r2
8002124: 009b lsls r3, r3, #2
8002126: 440b add r3, r1
8002128: 3320 adds r3, #32
800212a: 6819 ldr r1, [r3, #0]
800212c: 6878 ldr r0, [r7, #4]
800212e: 6a7a ldr r2, [r7, #36] @ 0x24
8002130: 4613 mov r3, r2
8002132: 00db lsls r3, r3, #3
8002134: 4413 add r3, r2
8002136: 009b lsls r3, r3, #2
8002138: 4403 add r3, r0
800213a: 331c adds r3, #28
800213c: 681b ldr r3, [r3, #0]
800213e: 4419 add r1, r3
8002140: 6878 ldr r0, [r7, #4]
8002142: 6a7a ldr r2, [r7, #36] @ 0x24
8002144: 4613 mov r3, r2
8002146: 00db lsls r3, r3, #3
8002148: 4413 add r3, r2
800214a: 009b lsls r3, r3, #2
800214c: 4403 add r3, r0
800214e: 3320 adds r3, #32
8002150: 6019 str r1, [r3, #0]
/* this is ZLP, so prepare EP0 for next setup */
if ((epnum == 0U) && (hpcd->IN_ep[epnum].xfer_len == 0U))
8002152: 6a7b ldr r3, [r7, #36] @ 0x24
8002154: 2b00 cmp r3, #0
8002156: d113 bne.n 8002180 <HAL_PCD_IRQHandler+0x3a2>
8002158: 6879 ldr r1, [r7, #4]
800215a: 6a7a ldr r2, [r7, #36] @ 0x24
800215c: 4613 mov r3, r2
800215e: 00db lsls r3, r3, #3
8002160: 4413 add r3, r2
8002162: 009b lsls r3, r3, #2
8002164: 440b add r3, r1
8002166: 3324 adds r3, #36 @ 0x24
8002168: 681b ldr r3, [r3, #0]
800216a: 2b00 cmp r3, #0
800216c: d108 bne.n 8002180 <HAL_PCD_IRQHandler+0x3a2>
{
/* prepare to rx more setup packets */
(void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup);
800216e: 687b ldr r3, [r7, #4]
8002170: 6818 ldr r0, [r3, #0]
8002172: 687b ldr r3, [r7, #4]
8002174: f203 439c addw r3, r3, #1180 @ 0x49c
8002178: 461a mov r2, r3
800217a: 2101 movs r1, #1
800217c: f004 fa16 bl 80065ac <USB_EP0_OutStart>
}
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_DataInStageCallback(hpcd, (uint8_t)epnum);
8002180: 6a7b ldr r3, [r7, #36] @ 0x24
8002182: b2db uxtb r3, r3
8002184: 4619 mov r1, r3
8002186: 6878 ldr r0, [r7, #4]
8002188: f006 fa1b bl 80085c2 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
if ((epint & USB_OTG_DIEPINT_TOC) == USB_OTG_DIEPINT_TOC)
800218c: 693b ldr r3, [r7, #16]
800218e: f003 0308 and.w r3, r3, #8
8002192: 2b00 cmp r3, #0
8002194: d008 beq.n 80021a8 <HAL_PCD_IRQHandler+0x3ca>
{
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_TOC);
8002196: 6a7b ldr r3, [r7, #36] @ 0x24
8002198: 015a lsls r2, r3, #5
800219a: 69fb ldr r3, [r7, #28]
800219c: 4413 add r3, r2
800219e: f503 6310 add.w r3, r3, #2304 @ 0x900
80021a2: 461a mov r2, r3
80021a4: 2308 movs r3, #8
80021a6: 6093 str r3, [r2, #8]
}
if ((epint & USB_OTG_DIEPINT_ITTXFE) == USB_OTG_DIEPINT_ITTXFE)
80021a8: 693b ldr r3, [r7, #16]
80021aa: f003 0310 and.w r3, r3, #16
80021ae: 2b00 cmp r3, #0
80021b0: d008 beq.n 80021c4 <HAL_PCD_IRQHandler+0x3e6>
{
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_ITTXFE);
80021b2: 6a7b ldr r3, [r7, #36] @ 0x24
80021b4: 015a lsls r2, r3, #5
80021b6: 69fb ldr r3, [r7, #28]
80021b8: 4413 add r3, r2
80021ba: f503 6310 add.w r3, r3, #2304 @ 0x900
80021be: 461a mov r2, r3
80021c0: 2310 movs r3, #16
80021c2: 6093 str r3, [r2, #8]
}
if ((epint & USB_OTG_DIEPINT_INEPNE) == USB_OTG_DIEPINT_INEPNE)
80021c4: 693b ldr r3, [r7, #16]
80021c6: f003 0340 and.w r3, r3, #64 @ 0x40
80021ca: 2b00 cmp r3, #0
80021cc: d008 beq.n 80021e0 <HAL_PCD_IRQHandler+0x402>
{
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_INEPNE);
80021ce: 6a7b ldr r3, [r7, #36] @ 0x24
80021d0: 015a lsls r2, r3, #5
80021d2: 69fb ldr r3, [r7, #28]
80021d4: 4413 add r3, r2
80021d6: f503 6310 add.w r3, r3, #2304 @ 0x900
80021da: 461a mov r2, r3
80021dc: 2340 movs r3, #64 @ 0x40
80021de: 6093 str r3, [r2, #8]
}
if ((epint & USB_OTG_DIEPINT_EPDISD) == USB_OTG_DIEPINT_EPDISD)
80021e0: 693b ldr r3, [r7, #16]
80021e2: f003 0302 and.w r3, r3, #2
80021e6: 2b00 cmp r3, #0
80021e8: d023 beq.n 8002232 <HAL_PCD_IRQHandler+0x454>
{
(void)USB_FlushTxFifo(USBx, epnum);
80021ea: 6a79 ldr r1, [r7, #36] @ 0x24
80021ec: 6a38 ldr r0, [r7, #32]
80021ee: f003 f9fd bl 80055ec <USB_FlushTxFifo>
ep = &hpcd->IN_ep[epnum];
80021f2: 6a7a ldr r2, [r7, #36] @ 0x24
80021f4: 4613 mov r3, r2
80021f6: 00db lsls r3, r3, #3
80021f8: 4413 add r3, r2
80021fa: 009b lsls r3, r3, #2
80021fc: 3310 adds r3, #16
80021fe: 687a ldr r2, [r7, #4]
8002200: 4413 add r3, r2
8002202: 3304 adds r3, #4
8002204: 617b str r3, [r7, #20]
if (ep->is_iso_incomplete == 1U)
8002206: 697b ldr r3, [r7, #20]
8002208: 78db ldrb r3, [r3, #3]
800220a: 2b01 cmp r3, #1
800220c: d108 bne.n 8002220 <HAL_PCD_IRQHandler+0x442>
{
ep->is_iso_incomplete = 0U;
800220e: 697b ldr r3, [r7, #20]
8002210: 2200 movs r2, #0
8002212: 70da strb r2, [r3, #3]
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ISOINIncompleteCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_ISOINIncompleteCallback(hpcd, (uint8_t)epnum);
8002214: 6a7b ldr r3, [r7, #36] @ 0x24
8002216: b2db uxtb r3, r3
8002218: 4619 mov r1, r3
800221a: 6878 ldr r0, [r7, #4]
800221c: f006 fa68 bl 80086f0 <HAL_PCD_ISOINIncompleteCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_EPDISD);
8002220: 6a7b ldr r3, [r7, #36] @ 0x24
8002222: 015a lsls r2, r3, #5
8002224: 69fb ldr r3, [r7, #28]
8002226: 4413 add r3, r2
8002228: f503 6310 add.w r3, r3, #2304 @ 0x900
800222c: 461a mov r2, r3
800222e: 2302 movs r3, #2
8002230: 6093 str r3, [r2, #8]
}
if ((epint & USB_OTG_DIEPINT_TXFE) == USB_OTG_DIEPINT_TXFE)
8002232: 693b ldr r3, [r7, #16]
8002234: f003 0380 and.w r3, r3, #128 @ 0x80
8002238: 2b00 cmp r3, #0
800223a: d003 beq.n 8002244 <HAL_PCD_IRQHandler+0x466>
{
(void)PCD_WriteEmptyTxFifo(hpcd, epnum);
800223c: 6a79 ldr r1, [r7, #36] @ 0x24
800223e: 6878 ldr r0, [r7, #4]
8002240: f000 fcd2 bl 8002be8 <PCD_WriteEmptyTxFifo>
}
}
epnum++;
8002244: 6a7b ldr r3, [r7, #36] @ 0x24
8002246: 3301 adds r3, #1
8002248: 627b str r3, [r7, #36] @ 0x24
ep_intr >>= 1U;
800224a: 6abb ldr r3, [r7, #40] @ 0x28
800224c: 085b lsrs r3, r3, #1
800224e: 62bb str r3, [r7, #40] @ 0x28
while (ep_intr != 0U)
8002250: 6abb ldr r3, [r7, #40] @ 0x28
8002252: 2b00 cmp r3, #0
8002254: f47f af2e bne.w 80020b4 <HAL_PCD_IRQHandler+0x2d6>
}
}
/* Handle Resume Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT))
8002258: 687b ldr r3, [r7, #4]
800225a: 681b ldr r3, [r3, #0]
800225c: 4618 mov r0, r3
800225e: f004 f8e1 bl 8006424 <USB_ReadInterrupts>
8002262: 4603 mov r3, r0
8002264: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8002268: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
800226c: d122 bne.n 80022b4 <HAL_PCD_IRQHandler+0x4d6>
{
/* Clear the Remote Wake-up Signaling */
USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG;
800226e: 69fb ldr r3, [r7, #28]
8002270: f503 6300 add.w r3, r3, #2048 @ 0x800
8002274: 685b ldr r3, [r3, #4]
8002276: 69fa ldr r2, [r7, #28]
8002278: f502 6200 add.w r2, r2, #2048 @ 0x800
800227c: f023 0301 bic.w r3, r3, #1
8002280: 6053 str r3, [r2, #4]
if (hpcd->LPM_State == LPM_L1)
8002282: 687b ldr r3, [r7, #4]
8002284: f893 34cc ldrb.w r3, [r3, #1228] @ 0x4cc
8002288: 2b01 cmp r3, #1
800228a: d108 bne.n 800229e <HAL_PCD_IRQHandler+0x4c0>
{
hpcd->LPM_State = LPM_L0;
800228c: 687b ldr r3, [r7, #4]
800228e: 2200 movs r2, #0
8002290: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->LPMCallback(hpcd, PCD_LPM_L0_ACTIVE);
#else
HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE);
8002294: 2100 movs r1, #0
8002296: 6878 ldr r0, [r7, #4]
8002298: f006 fbd0 bl 8008a3c <HAL_PCDEx_LPM_Callback>
800229c: e002 b.n 80022a4 <HAL_PCD_IRQHandler+0x4c6>
else
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
800229e: 6878 ldr r0, [r7, #4]
80022a0: f006 fa06 bl 80086b0 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT);
80022a4: 687b ldr r3, [r7, #4]
80022a6: 681b ldr r3, [r3, #0]
80022a8: 695a ldr r2, [r3, #20]
80022aa: 687b ldr r3, [r7, #4]
80022ac: 681b ldr r3, [r3, #0]
80022ae: f002 4200 and.w r2, r2, #2147483648 @ 0x80000000
80022b2: 615a str r2, [r3, #20]
}
/* Handle Suspend Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP))
80022b4: 687b ldr r3, [r7, #4]
80022b6: 681b ldr r3, [r3, #0]
80022b8: 4618 mov r0, r3
80022ba: f004 f8b3 bl 8006424 <USB_ReadInterrupts>
80022be: 4603 mov r3, r0
80022c0: f403 6300 and.w r3, r3, #2048 @ 0x800
80022c4: f5b3 6f00 cmp.w r3, #2048 @ 0x800
80022c8: d112 bne.n 80022f0 <HAL_PCD_IRQHandler+0x512>
{
if ((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS)
80022ca: 69fb ldr r3, [r7, #28]
80022cc: f503 6300 add.w r3, r3, #2048 @ 0x800
80022d0: 689b ldr r3, [r3, #8]
80022d2: f003 0301 and.w r3, r3, #1
80022d6: 2b01 cmp r3, #1
80022d8: d102 bne.n 80022e0 <HAL_PCD_IRQHandler+0x502>
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
80022da: 6878 ldr r0, [r7, #4]
80022dc: f006 f9c2 bl 8008664 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP);
80022e0: 687b ldr r3, [r7, #4]
80022e2: 681b ldr r3, [r3, #0]
80022e4: 695a ldr r2, [r3, #20]
80022e6: 687b ldr r3, [r7, #4]
80022e8: 681b ldr r3, [r3, #0]
80022ea: f402 6200 and.w r2, r2, #2048 @ 0x800
80022ee: 615a str r2, [r3, #20]
}
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \
|| defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \
|| defined(STM32F423xx)
/* Handle LPM Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT))
80022f0: 687b ldr r3, [r7, #4]
80022f2: 681b ldr r3, [r3, #0]
80022f4: 4618 mov r0, r3
80022f6: f004 f895 bl 8006424 <USB_ReadInterrupts>
80022fa: 4603 mov r3, r0
80022fc: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
8002300: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
8002304: d121 bne.n 800234a <HAL_PCD_IRQHandler+0x56c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT);
8002306: 687b ldr r3, [r7, #4]
8002308: 681b ldr r3, [r3, #0]
800230a: 695a ldr r2, [r3, #20]
800230c: 687b ldr r3, [r7, #4]
800230e: 681b ldr r3, [r3, #0]
8002310: f002 6200 and.w r2, r2, #134217728 @ 0x8000000
8002314: 615a str r2, [r3, #20]
if (hpcd->LPM_State == LPM_L0)
8002316: 687b ldr r3, [r7, #4]
8002318: f893 34cc ldrb.w r3, [r3, #1228] @ 0x4cc
800231c: 2b00 cmp r3, #0
800231e: d111 bne.n 8002344 <HAL_PCD_IRQHandler+0x566>
{
hpcd->LPM_State = LPM_L1;
8002320: 687b ldr r3, [r7, #4]
8002322: 2201 movs r2, #1
8002324: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc
hpcd->BESL = (hpcd->Instance->GLPMCFG & USB_OTG_GLPMCFG_BESL) >> 2U;
8002328: 687b ldr r3, [r7, #4]
800232a: 681b ldr r3, [r3, #0]
800232c: 6d5b ldr r3, [r3, #84] @ 0x54
800232e: 089b lsrs r3, r3, #2
8002330: f003 020f and.w r2, r3, #15
8002334: 687b ldr r3, [r7, #4]
8002336: f8c3 24d0 str.w r2, [r3, #1232] @ 0x4d0
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->LPMCallback(hpcd, PCD_LPM_L1_ACTIVE);
#else
HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE);
800233a: 2101 movs r1, #1
800233c: 6878 ldr r0, [r7, #4]
800233e: f006 fb7d bl 8008a3c <HAL_PCDEx_LPM_Callback>
8002342: e002 b.n 800234a <HAL_PCD_IRQHandler+0x56c>
else
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8002344: 6878 ldr r0, [r7, #4]
8002346: f006 f98d bl 8008664 <HAL_PCD_SuspendCallback>
}
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||
defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||
defined(STM32F423xx) */
/* Handle Reset Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBRST))
800234a: 687b ldr r3, [r7, #4]
800234c: 681b ldr r3, [r3, #0]
800234e: 4618 mov r0, r3
8002350: f004 f868 bl 8006424 <USB_ReadInterrupts>
8002354: 4603 mov r3, r0
8002356: f403 5380 and.w r3, r3, #4096 @ 0x1000
800235a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800235e: f040 80b7 bne.w 80024d0 <HAL_PCD_IRQHandler+0x6f2>
{
USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG;
8002362: 69fb ldr r3, [r7, #28]
8002364: f503 6300 add.w r3, r3, #2048 @ 0x800
8002368: 685b ldr r3, [r3, #4]
800236a: 69fa ldr r2, [r7, #28]
800236c: f502 6200 add.w r2, r2, #2048 @ 0x800
8002370: f023 0301 bic.w r3, r3, #1
8002374: 6053 str r3, [r2, #4]
(void)USB_FlushTxFifo(hpcd->Instance, 0x10U);
8002376: 687b ldr r3, [r7, #4]
8002378: 681b ldr r3, [r3, #0]
800237a: 2110 movs r1, #16
800237c: 4618 mov r0, r3
800237e: f003 f935 bl 80055ec <USB_FlushTxFifo>
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8002382: 2300 movs r3, #0
8002384: 62fb str r3, [r7, #44] @ 0x2c
8002386: e046 b.n 8002416 <HAL_PCD_IRQHandler+0x638>
{
USBx_INEP(i)->DIEPINT = 0xFB7FU;
8002388: 6afb ldr r3, [r7, #44] @ 0x2c
800238a: 015a lsls r2, r3, #5
800238c: 69fb ldr r3, [r7, #28]
800238e: 4413 add r3, r2
8002390: f503 6310 add.w r3, r3, #2304 @ 0x900
8002394: 461a mov r2, r3
8002396: f64f 337f movw r3, #64383 @ 0xfb7f
800239a: 6093 str r3, [r2, #8]
USBx_INEP(i)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
800239c: 6afb ldr r3, [r7, #44] @ 0x2c
800239e: 015a lsls r2, r3, #5
80023a0: 69fb ldr r3, [r7, #28]
80023a2: 4413 add r3, r2
80023a4: f503 6310 add.w r3, r3, #2304 @ 0x900
80023a8: 681b ldr r3, [r3, #0]
80023aa: 6afa ldr r2, [r7, #44] @ 0x2c
80023ac: 0151 lsls r1, r2, #5
80023ae: 69fa ldr r2, [r7, #28]
80023b0: 440a add r2, r1
80023b2: f502 6210 add.w r2, r2, #2304 @ 0x900
80023b6: f423 1300 bic.w r3, r3, #2097152 @ 0x200000
80023ba: 6013 str r3, [r2, #0]
USBx_OUTEP(i)->DOEPINT = 0xFB7FU;
80023bc: 6afb ldr r3, [r7, #44] @ 0x2c
80023be: 015a lsls r2, r3, #5
80023c0: 69fb ldr r3, [r7, #28]
80023c2: 4413 add r3, r2
80023c4: f503 6330 add.w r3, r3, #2816 @ 0xb00
80023c8: 461a mov r2, r3
80023ca: f64f 337f movw r3, #64383 @ 0xfb7f
80023ce: 6093 str r3, [r2, #8]
USBx_OUTEP(i)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
80023d0: 6afb ldr r3, [r7, #44] @ 0x2c
80023d2: 015a lsls r2, r3, #5
80023d4: 69fb ldr r3, [r7, #28]
80023d6: 4413 add r3, r2
80023d8: f503 6330 add.w r3, r3, #2816 @ 0xb00
80023dc: 681b ldr r3, [r3, #0]
80023de: 6afa ldr r2, [r7, #44] @ 0x2c
80023e0: 0151 lsls r1, r2, #5
80023e2: 69fa ldr r2, [r7, #28]
80023e4: 440a add r2, r1
80023e6: f502 6230 add.w r2, r2, #2816 @ 0xb00
80023ea: f423 1300 bic.w r3, r3, #2097152 @ 0x200000
80023ee: 6013 str r3, [r2, #0]
USBx_OUTEP(i)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
80023f0: 6afb ldr r3, [r7, #44] @ 0x2c
80023f2: 015a lsls r2, r3, #5
80023f4: 69fb ldr r3, [r7, #28]
80023f6: 4413 add r3, r2
80023f8: f503 6330 add.w r3, r3, #2816 @ 0xb00
80023fc: 681b ldr r3, [r3, #0]
80023fe: 6afa ldr r2, [r7, #44] @ 0x2c
8002400: 0151 lsls r1, r2, #5
8002402: 69fa ldr r2, [r7, #28]
8002404: 440a add r2, r1
8002406: f502 6230 add.w r2, r2, #2816 @ 0xb00
800240a: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000
800240e: 6013 str r3, [r2, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8002410: 6afb ldr r3, [r7, #44] @ 0x2c
8002412: 3301 adds r3, #1
8002414: 62fb str r3, [r7, #44] @ 0x2c
8002416: 687b ldr r3, [r7, #4]
8002418: 791b ldrb r3, [r3, #4]
800241a: 461a mov r2, r3
800241c: 6afb ldr r3, [r7, #44] @ 0x2c
800241e: 4293 cmp r3, r2
8002420: d3b2 bcc.n 8002388 <HAL_PCD_IRQHandler+0x5aa>
}
USBx_DEVICE->DAINTMSK |= 0x10001U;
8002422: 69fb ldr r3, [r7, #28]
8002424: f503 6300 add.w r3, r3, #2048 @ 0x800
8002428: 69db ldr r3, [r3, #28]
800242a: 69fa ldr r2, [r7, #28]
800242c: f502 6200 add.w r2, r2, #2048 @ 0x800
8002430: f043 1301 orr.w r3, r3, #65537 @ 0x10001
8002434: 61d3 str r3, [r2, #28]
if (hpcd->Init.use_dedicated_ep1 != 0U)
8002436: 687b ldr r3, [r7, #4]
8002438: 7bdb ldrb r3, [r3, #15]
800243a: 2b00 cmp r3, #0
800243c: d016 beq.n 800246c <HAL_PCD_IRQHandler+0x68e>
{
USBx_DEVICE->DOUTEP1MSK |= USB_OTG_DOEPMSK_STUPM |
800243e: 69fb ldr r3, [r7, #28]
8002440: f503 6300 add.w r3, r3, #2048 @ 0x800
8002444: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
8002448: 69fa ldr r2, [r7, #28]
800244a: f502 6200 add.w r2, r2, #2048 @ 0x800
800244e: f043 030b orr.w r3, r3, #11
8002452: f8c2 3084 str.w r3, [r2, #132] @ 0x84
USB_OTG_DOEPMSK_XFRCM |
USB_OTG_DOEPMSK_EPDM;
USBx_DEVICE->DINEP1MSK |= USB_OTG_DIEPMSK_TOM |
8002456: 69fb ldr r3, [r7, #28]
8002458: f503 6300 add.w r3, r3, #2048 @ 0x800
800245c: 6c5b ldr r3, [r3, #68] @ 0x44
800245e: 69fa ldr r2, [r7, #28]
8002460: f502 6200 add.w r2, r2, #2048 @ 0x800
8002464: f043 030b orr.w r3, r3, #11
8002468: 6453 str r3, [r2, #68] @ 0x44
800246a: e015 b.n 8002498 <HAL_PCD_IRQHandler+0x6ba>
USB_OTG_DIEPMSK_XFRCM |
USB_OTG_DIEPMSK_EPDM;
}
else
{
USBx_DEVICE->DOEPMSK |= USB_OTG_DOEPMSK_STUPM |
800246c: 69fb ldr r3, [r7, #28]
800246e: f503 6300 add.w r3, r3, #2048 @ 0x800
8002472: 695b ldr r3, [r3, #20]
8002474: 69fa ldr r2, [r7, #28]
8002476: f502 6200 add.w r2, r2, #2048 @ 0x800
800247a: f443 5300 orr.w r3, r3, #8192 @ 0x2000
800247e: f043 032b orr.w r3, r3, #43 @ 0x2b
8002482: 6153 str r3, [r2, #20]
USB_OTG_DOEPMSK_XFRCM |
USB_OTG_DOEPMSK_EPDM |
USB_OTG_DOEPMSK_OTEPSPRM |
USB_OTG_DOEPMSK_NAKM;
USBx_DEVICE->DIEPMSK |= USB_OTG_DIEPMSK_TOM |
8002484: 69fb ldr r3, [r7, #28]
8002486: f503 6300 add.w r3, r3, #2048 @ 0x800
800248a: 691b ldr r3, [r3, #16]
800248c: 69fa ldr r2, [r7, #28]
800248e: f502 6200 add.w r2, r2, #2048 @ 0x800
8002492: f043 030b orr.w r3, r3, #11
8002496: 6113 str r3, [r2, #16]
USB_OTG_DIEPMSK_XFRCM |
USB_OTG_DIEPMSK_EPDM;
}
/* Set Default Address to 0 */
USBx_DEVICE->DCFG &= ~USB_OTG_DCFG_DAD;
8002498: 69fb ldr r3, [r7, #28]
800249a: f503 6300 add.w r3, r3, #2048 @ 0x800
800249e: 681b ldr r3, [r3, #0]
80024a0: 69fa ldr r2, [r7, #28]
80024a2: f502 6200 add.w r2, r2, #2048 @ 0x800
80024a6: f423 63fe bic.w r3, r3, #2032 @ 0x7f0
80024aa: 6013 str r3, [r2, #0]
/* setup EP0 to receive SETUP packets */
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable,
80024ac: 687b ldr r3, [r7, #4]
80024ae: 6818 ldr r0, [r3, #0]
80024b0: 687b ldr r3, [r7, #4]
80024b2: 7999 ldrb r1, [r3, #6]
(uint8_t *)hpcd->Setup);
80024b4: 687b ldr r3, [r7, #4]
80024b6: f203 439c addw r3, r3, #1180 @ 0x49c
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable,
80024ba: 461a mov r2, r3
80024bc: f004 f876 bl 80065ac <USB_EP0_OutStart>
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBRST);
80024c0: 687b ldr r3, [r7, #4]
80024c2: 681b ldr r3, [r3, #0]
80024c4: 695a ldr r2, [r3, #20]
80024c6: 687b ldr r3, [r7, #4]
80024c8: 681b ldr r3, [r3, #0]
80024ca: f402 5280 and.w r2, r2, #4096 @ 0x1000
80024ce: 615a str r2, [r3, #20]
}
/* Handle Enumeration done Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE))
80024d0: 687b ldr r3, [r7, #4]
80024d2: 681b ldr r3, [r3, #0]
80024d4: 4618 mov r0, r3
80024d6: f003 ffa5 bl 8006424 <USB_ReadInterrupts>
80024da: 4603 mov r3, r0
80024dc: f403 5300 and.w r3, r3, #8192 @ 0x2000
80024e0: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
80024e4: d123 bne.n 800252e <HAL_PCD_IRQHandler+0x750>
{
(void)USB_ActivateSetup(hpcd->Instance);
80024e6: 687b ldr r3, [r7, #4]
80024e8: 681b ldr r3, [r3, #0]
80024ea: 4618 mov r0, r3
80024ec: f004 f83b bl 8006566 <USB_ActivateSetup>
hpcd->Init.speed = USB_GetDevSpeed(hpcd->Instance);
80024f0: 687b ldr r3, [r7, #4]
80024f2: 681b ldr r3, [r3, #0]
80024f4: 4618 mov r0, r3
80024f6: f003 f8f2 bl 80056de <USB_GetDevSpeed>
80024fa: 4603 mov r3, r0
80024fc: 461a mov r2, r3
80024fe: 687b ldr r3, [r7, #4]
8002500: 71da strb r2, [r3, #7]
/* Set USB Turnaround time */
(void)USB_SetTurnaroundTime(hpcd->Instance,
8002502: 687b ldr r3, [r7, #4]
8002504: 681c ldr r4, [r3, #0]
8002506: f000 fe8b bl 8003220 <HAL_RCC_GetHCLKFreq>
800250a: 4601 mov r1, r0
HAL_RCC_GetHCLKFreq(),
(uint8_t)hpcd->Init.speed);
800250c: 687b ldr r3, [r7, #4]
800250e: 79db ldrb r3, [r3, #7]
(void)USB_SetTurnaroundTime(hpcd->Instance,
8002510: 461a mov r2, r3
8002512: 4620 mov r0, r4
8002514: f002 fdfc bl 8005110 <USB_SetTurnaroundTime>
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8002518: 6878 ldr r0, [r7, #4]
800251a: f006 f87a bl 8008612 <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE);
800251e: 687b ldr r3, [r7, #4]
8002520: 681b ldr r3, [r3, #0]
8002522: 695a ldr r2, [r3, #20]
8002524: 687b ldr r3, [r7, #4]
8002526: 681b ldr r3, [r3, #0]
8002528: f402 5200 and.w r2, r2, #8192 @ 0x2000
800252c: 615a str r2, [r3, #20]
}
/* Handle SOF Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SOF))
800252e: 687b ldr r3, [r7, #4]
8002530: 681b ldr r3, [r3, #0]
8002532: 4618 mov r0, r3
8002534: f003 ff76 bl 8006424 <USB_ReadInterrupts>
8002538: 4603 mov r3, r0
800253a: f003 0308 and.w r3, r3, #8
800253e: 2b08 cmp r3, #8
8002540: d10a bne.n 8002558 <HAL_PCD_IRQHandler+0x77a>
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8002542: 6878 ldr r0, [r7, #4]
8002544: f006 f857 bl 80085f6 <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SOF);
8002548: 687b ldr r3, [r7, #4]
800254a: 681b ldr r3, [r3, #0]
800254c: 695a ldr r2, [r3, #20]
800254e: 687b ldr r3, [r7, #4]
8002550: 681b ldr r3, [r3, #0]
8002552: f002 0208 and.w r2, r2, #8
8002556: 615a str r2, [r3, #20]
}
/* Handle Global OUT NAK effective Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_BOUTNAKEFF))
8002558: 687b ldr r3, [r7, #4]
800255a: 681b ldr r3, [r3, #0]
800255c: 4618 mov r0, r3
800255e: f003 ff61 bl 8006424 <USB_ReadInterrupts>
8002562: 4603 mov r3, r0
8002564: f003 0380 and.w r3, r3, #128 @ 0x80
8002568: 2b80 cmp r3, #128 @ 0x80
800256a: d123 bne.n 80025b4 <HAL_PCD_IRQHandler+0x7d6>
{
USBx->GINTMSK &= ~USB_OTG_GINTMSK_GONAKEFFM;
800256c: 6a3b ldr r3, [r7, #32]
800256e: 699b ldr r3, [r3, #24]
8002570: f023 0280 bic.w r2, r3, #128 @ 0x80
8002574: 6a3b ldr r3, [r7, #32]
8002576: 619a str r2, [r3, #24]
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
8002578: 2301 movs r3, #1
800257a: 627b str r3, [r7, #36] @ 0x24
800257c: e014 b.n 80025a8 <HAL_PCD_IRQHandler+0x7ca>
{
if (hpcd->OUT_ep[epnum].is_iso_incomplete == 1U)
800257e: 6879 ldr r1, [r7, #4]
8002580: 6a7a ldr r2, [r7, #36] @ 0x24
8002582: 4613 mov r3, r2
8002584: 00db lsls r3, r3, #3
8002586: 4413 add r3, r2
8002588: 009b lsls r3, r3, #2
800258a: 440b add r3, r1
800258c: f203 2357 addw r3, r3, #599 @ 0x257
8002590: 781b ldrb r3, [r3, #0]
8002592: 2b01 cmp r3, #1
8002594: d105 bne.n 80025a2 <HAL_PCD_IRQHandler+0x7c4>
{
/* Abort current transaction and disable the EP */
(void)HAL_PCD_EP_Abort(hpcd, (uint8_t)epnum);
8002596: 6a7b ldr r3, [r7, #36] @ 0x24
8002598: b2db uxtb r3, r3
800259a: 4619 mov r1, r3
800259c: 6878 ldr r0, [r7, #4]
800259e: f000 faf2 bl 8002b86 <HAL_PCD_EP_Abort>
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
80025a2: 6a7b ldr r3, [r7, #36] @ 0x24
80025a4: 3301 adds r3, #1
80025a6: 627b str r3, [r7, #36] @ 0x24
80025a8: 687b ldr r3, [r7, #4]
80025aa: 791b ldrb r3, [r3, #4]
80025ac: 461a mov r2, r3
80025ae: 6a7b ldr r3, [r7, #36] @ 0x24
80025b0: 4293 cmp r3, r2
80025b2: d3e4 bcc.n 800257e <HAL_PCD_IRQHandler+0x7a0>
}
}
}
/* Handle Incomplete ISO IN Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR))
80025b4: 687b ldr r3, [r7, #4]
80025b6: 681b ldr r3, [r3, #0]
80025b8: 4618 mov r0, r3
80025ba: f003 ff33 bl 8006424 <USB_ReadInterrupts>
80025be: 4603 mov r3, r0
80025c0: f403 1380 and.w r3, r3, #1048576 @ 0x100000
80025c4: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
80025c8: d13c bne.n 8002644 <HAL_PCD_IRQHandler+0x866>
{
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
80025ca: 2301 movs r3, #1
80025cc: 627b str r3, [r7, #36] @ 0x24
80025ce: e02b b.n 8002628 <HAL_PCD_IRQHandler+0x84a>
{
RegVal = USBx_INEP(epnum)->DIEPCTL;
80025d0: 6a7b ldr r3, [r7, #36] @ 0x24
80025d2: 015a lsls r2, r3, #5
80025d4: 69fb ldr r3, [r7, #28]
80025d6: 4413 add r3, r2
80025d8: f503 6310 add.w r3, r3, #2304 @ 0x900
80025dc: 681b ldr r3, [r3, #0]
80025de: 61bb str r3, [r7, #24]
if ((hpcd->IN_ep[epnum].type == EP_TYPE_ISOC) &&
80025e0: 6879 ldr r1, [r7, #4]
80025e2: 6a7a ldr r2, [r7, #36] @ 0x24
80025e4: 4613 mov r3, r2
80025e6: 00db lsls r3, r3, #3
80025e8: 4413 add r3, r2
80025ea: 009b lsls r3, r3, #2
80025ec: 440b add r3, r1
80025ee: 3318 adds r3, #24
80025f0: 781b ldrb r3, [r3, #0]
80025f2: 2b01 cmp r3, #1
80025f4: d115 bne.n 8002622 <HAL_PCD_IRQHandler+0x844>
((RegVal & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA))
80025f6: 69bb ldr r3, [r7, #24]
if ((hpcd->IN_ep[epnum].type == EP_TYPE_ISOC) &&
80025f8: 2b00 cmp r3, #0
80025fa: da12 bge.n 8002622 <HAL_PCD_IRQHandler+0x844>
{
hpcd->IN_ep[epnum].is_iso_incomplete = 1U;
80025fc: 6879 ldr r1, [r7, #4]
80025fe: 6a7a ldr r2, [r7, #36] @ 0x24
8002600: 4613 mov r3, r2
8002602: 00db lsls r3, r3, #3
8002604: 4413 add r3, r2
8002606: 009b lsls r3, r3, #2
8002608: 440b add r3, r1
800260a: 3317 adds r3, #23
800260c: 2201 movs r2, #1
800260e: 701a strb r2, [r3, #0]
/* Abort current transaction and disable the EP */
(void)HAL_PCD_EP_Abort(hpcd, (uint8_t)(epnum | 0x80U));
8002610: 6a7b ldr r3, [r7, #36] @ 0x24
8002612: b2db uxtb r3, r3
8002614: f063 037f orn r3, r3, #127 @ 0x7f
8002618: b2db uxtb r3, r3
800261a: 4619 mov r1, r3
800261c: 6878 ldr r0, [r7, #4]
800261e: f000 fab2 bl 8002b86 <HAL_PCD_EP_Abort>
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
8002622: 6a7b ldr r3, [r7, #36] @ 0x24
8002624: 3301 adds r3, #1
8002626: 627b str r3, [r7, #36] @ 0x24
8002628: 687b ldr r3, [r7, #4]
800262a: 791b ldrb r3, [r3, #4]
800262c: 461a mov r2, r3
800262e: 6a7b ldr r3, [r7, #36] @ 0x24
8002630: 4293 cmp r3, r2
8002632: d3cd bcc.n 80025d0 <HAL_PCD_IRQHandler+0x7f2>
}
}
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR);
8002634: 687b ldr r3, [r7, #4]
8002636: 681b ldr r3, [r3, #0]
8002638: 695a ldr r2, [r3, #20]
800263a: 687b ldr r3, [r7, #4]
800263c: 681b ldr r3, [r3, #0]
800263e: f402 1280 and.w r2, r2, #1048576 @ 0x100000
8002642: 615a str r2, [r3, #20]
}
/* Handle Incomplete ISO OUT Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT))
8002644: 687b ldr r3, [r7, #4]
8002646: 681b ldr r3, [r3, #0]
8002648: 4618 mov r0, r3
800264a: f003 feeb bl 8006424 <USB_ReadInterrupts>
800264e: 4603 mov r3, r0
8002650: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8002654: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000
8002658: d156 bne.n 8002708 <HAL_PCD_IRQHandler+0x92a>
{
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
800265a: 2301 movs r3, #1
800265c: 627b str r3, [r7, #36] @ 0x24
800265e: e045 b.n 80026ec <HAL_PCD_IRQHandler+0x90e>
{
RegVal = USBx_OUTEP(epnum)->DOEPCTL;
8002660: 6a7b ldr r3, [r7, #36] @ 0x24
8002662: 015a lsls r2, r3, #5
8002664: 69fb ldr r3, [r7, #28]
8002666: 4413 add r3, r2
8002668: f503 6330 add.w r3, r3, #2816 @ 0xb00
800266c: 681b ldr r3, [r3, #0]
800266e: 61bb str r3, [r7, #24]
if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) &&
8002670: 6879 ldr r1, [r7, #4]
8002672: 6a7a ldr r2, [r7, #36] @ 0x24
8002674: 4613 mov r3, r2
8002676: 00db lsls r3, r3, #3
8002678: 4413 add r3, r2
800267a: 009b lsls r3, r3, #2
800267c: 440b add r3, r1
800267e: f503 7316 add.w r3, r3, #600 @ 0x258
8002682: 781b ldrb r3, [r3, #0]
8002684: 2b01 cmp r3, #1
8002686: d12e bne.n 80026e6 <HAL_PCD_IRQHandler+0x908>
((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) &&
8002688: 69bb ldr r3, [r7, #24]
if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) &&
800268a: 2b00 cmp r3, #0
800268c: da2b bge.n 80026e6 <HAL_PCD_IRQHandler+0x908>
(((RegVal & (0x1U << 16)) >> 16U) == (hpcd->FrameNumber & 0x1U)))
800268e: 69bb ldr r3, [r7, #24]
8002690: 0c1a lsrs r2, r3, #16
8002692: 687b ldr r3, [r7, #4]
8002694: f8d3 34d4 ldr.w r3, [r3, #1236] @ 0x4d4
8002698: 4053 eors r3, r2
800269a: f003 0301 and.w r3, r3, #1
((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) &&
800269e: 2b00 cmp r3, #0
80026a0: d121 bne.n 80026e6 <HAL_PCD_IRQHandler+0x908>
{
hpcd->OUT_ep[epnum].is_iso_incomplete = 1U;
80026a2: 6879 ldr r1, [r7, #4]
80026a4: 6a7a ldr r2, [r7, #36] @ 0x24
80026a6: 4613 mov r3, r2
80026a8: 00db lsls r3, r3, #3
80026aa: 4413 add r3, r2
80026ac: 009b lsls r3, r3, #2
80026ae: 440b add r3, r1
80026b0: f203 2357 addw r3, r3, #599 @ 0x257
80026b4: 2201 movs r2, #1
80026b6: 701a strb r2, [r3, #0]
USBx->GINTMSK |= USB_OTG_GINTMSK_GONAKEFFM;
80026b8: 6a3b ldr r3, [r7, #32]
80026ba: 699b ldr r3, [r3, #24]
80026bc: f043 0280 orr.w r2, r3, #128 @ 0x80
80026c0: 6a3b ldr r3, [r7, #32]
80026c2: 619a str r2, [r3, #24]
if ((USBx->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF) == 0U)
80026c4: 6a3b ldr r3, [r7, #32]
80026c6: 695b ldr r3, [r3, #20]
80026c8: f003 0380 and.w r3, r3, #128 @ 0x80
80026cc: 2b00 cmp r3, #0
80026ce: d10a bne.n 80026e6 <HAL_PCD_IRQHandler+0x908>
{
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK;
80026d0: 69fb ldr r3, [r7, #28]
80026d2: f503 6300 add.w r3, r3, #2048 @ 0x800
80026d6: 685b ldr r3, [r3, #4]
80026d8: 69fa ldr r2, [r7, #28]
80026da: f502 6200 add.w r2, r2, #2048 @ 0x800
80026de: f443 7300 orr.w r3, r3, #512 @ 0x200
80026e2: 6053 str r3, [r2, #4]
break;
80026e4: e008 b.n 80026f8 <HAL_PCD_IRQHandler+0x91a>
for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++)
80026e6: 6a7b ldr r3, [r7, #36] @ 0x24
80026e8: 3301 adds r3, #1
80026ea: 627b str r3, [r7, #36] @ 0x24
80026ec: 687b ldr r3, [r7, #4]
80026ee: 791b ldrb r3, [r3, #4]
80026f0: 461a mov r2, r3
80026f2: 6a7b ldr r3, [r7, #36] @ 0x24
80026f4: 4293 cmp r3, r2
80026f6: d3b3 bcc.n 8002660 <HAL_PCD_IRQHandler+0x882>
}
}
}
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT);
80026f8: 687b ldr r3, [r7, #4]
80026fa: 681b ldr r3, [r3, #0]
80026fc: 695a ldr r2, [r3, #20]
80026fe: 687b ldr r3, [r7, #4]
8002700: 681b ldr r3, [r3, #0]
8002702: f402 1200 and.w r2, r2, #2097152 @ 0x200000
8002706: 615a str r2, [r3, #20]
}
/* Handle Connection event Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT))
8002708: 687b ldr r3, [r7, #4]
800270a: 681b ldr r3, [r3, #0]
800270c: 4618 mov r0, r3
800270e: f003 fe89 bl 8006424 <USB_ReadInterrupts>
8002712: 4603 mov r3, r0
8002714: f003 4380 and.w r3, r3, #1073741824 @ 0x40000000
8002718: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800271c: d10a bne.n 8002734 <HAL_PCD_IRQHandler+0x956>
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ConnectCallback(hpcd);
#else
HAL_PCD_ConnectCallback(hpcd);
800271e: 6878 ldr r0, [r7, #4]
8002720: f005 fff8 bl 8008714 <HAL_PCD_ConnectCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT);
8002724: 687b ldr r3, [r7, #4]
8002726: 681b ldr r3, [r3, #0]
8002728: 695a ldr r2, [r3, #20]
800272a: 687b ldr r3, [r7, #4]
800272c: 681b ldr r3, [r3, #0]
800272e: f002 4280 and.w r2, r2, #1073741824 @ 0x40000000
8002732: 615a str r2, [r3, #20]
}
/* Handle Disconnection event Interrupt */
if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OTGINT))
8002734: 687b ldr r3, [r7, #4]
8002736: 681b ldr r3, [r3, #0]
8002738: 4618 mov r0, r3
800273a: f003 fe73 bl 8006424 <USB_ReadInterrupts>
800273e: 4603 mov r3, r0
8002740: f003 0304 and.w r3, r3, #4
8002744: 2b04 cmp r3, #4
8002746: d115 bne.n 8002774 <HAL_PCD_IRQHandler+0x996>
{
RegVal = hpcd->Instance->GOTGINT;
8002748: 687b ldr r3, [r7, #4]
800274a: 681b ldr r3, [r3, #0]
800274c: 685b ldr r3, [r3, #4]
800274e: 61bb str r3, [r7, #24]
if ((RegVal & USB_OTG_GOTGINT_SEDET) == USB_OTG_GOTGINT_SEDET)
8002750: 69bb ldr r3, [r7, #24]
8002752: f003 0304 and.w r3, r3, #4
8002756: 2b00 cmp r3, #0
8002758: d002 beq.n 8002760 <HAL_PCD_IRQHandler+0x982>
{
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DisconnectCallback(hpcd);
#else
HAL_PCD_DisconnectCallback(hpcd);
800275a: 6878 ldr r0, [r7, #4]
800275c: f005 ffe8 bl 8008730 <HAL_PCD_DisconnectCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
hpcd->Instance->GOTGINT |= RegVal;
8002760: 687b ldr r3, [r7, #4]
8002762: 681b ldr r3, [r3, #0]
8002764: 6859 ldr r1, [r3, #4]
8002766: 687b ldr r3, [r7, #4]
8002768: 681b ldr r3, [r3, #0]
800276a: 69ba ldr r2, [r7, #24]
800276c: 430a orrs r2, r1
800276e: 605a str r2, [r3, #4]
8002770: e000 b.n 8002774 <HAL_PCD_IRQHandler+0x996>
return;
8002772: bf00 nop
}
}
}
8002774: 3734 adds r7, #52 @ 0x34
8002776: 46bd mov sp, r7
8002778: bd90 pop {r4, r7, pc}
0800277a <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
800277a: b580 push {r7, lr}
800277c: b082 sub sp, #8
800277e: af00 add r7, sp, #0
8002780: 6078 str r0, [r7, #4]
8002782: 460b mov r3, r1
8002784: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8002786: 687b ldr r3, [r7, #4]
8002788: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
800278c: 2b01 cmp r3, #1
800278e: d101 bne.n 8002794 <HAL_PCD_SetAddress+0x1a>
8002790: 2302 movs r3, #2
8002792: e012 b.n 80027ba <HAL_PCD_SetAddress+0x40>
8002794: 687b ldr r3, [r7, #4]
8002796: 2201 movs r2, #1
8002798: f883 2494 strb.w r2, [r3, #1172] @ 0x494
hpcd->USB_Address = address;
800279c: 687b ldr r3, [r7, #4]
800279e: 78fa ldrb r2, [r7, #3]
80027a0: 745a strb r2, [r3, #17]
(void)USB_SetDevAddress(hpcd->Instance, address);
80027a2: 687b ldr r3, [r7, #4]
80027a4: 681b ldr r3, [r3, #0]
80027a6: 78fa ldrb r2, [r7, #3]
80027a8: 4611 mov r1, r2
80027aa: 4618 mov r0, r3
80027ac: f003 fdd2 bl 8006354 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
80027b0: 687b ldr r3, [r7, #4]
80027b2: 2200 movs r2, #0
80027b4: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
80027b8: 2300 movs r3, #0
}
80027ba: 4618 mov r0, r3
80027bc: 3708 adds r7, #8
80027be: 46bd mov sp, r7
80027c0: bd80 pop {r7, pc}
080027c2 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
80027c2: b580 push {r7, lr}
80027c4: b084 sub sp, #16
80027c6: af00 add r7, sp, #0
80027c8: 6078 str r0, [r7, #4]
80027ca: 4608 mov r0, r1
80027cc: 4611 mov r1, r2
80027ce: 461a mov r2, r3
80027d0: 4603 mov r3, r0
80027d2: 70fb strb r3, [r7, #3]
80027d4: 460b mov r3, r1
80027d6: 803b strh r3, [r7, #0]
80027d8: 4613 mov r3, r2
80027da: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
80027dc: 2300 movs r3, #0
80027de: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
80027e0: f997 3003 ldrsb.w r3, [r7, #3]
80027e4: 2b00 cmp r3, #0
80027e6: da0f bge.n 8002808 <HAL_PCD_EP_Open+0x46>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80027e8: 78fb ldrb r3, [r7, #3]
80027ea: f003 020f and.w r2, r3, #15
80027ee: 4613 mov r3, r2
80027f0: 00db lsls r3, r3, #3
80027f2: 4413 add r3, r2
80027f4: 009b lsls r3, r3, #2
80027f6: 3310 adds r3, #16
80027f8: 687a ldr r2, [r7, #4]
80027fa: 4413 add r3, r2
80027fc: 3304 adds r3, #4
80027fe: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8002800: 68fb ldr r3, [r7, #12]
8002802: 2201 movs r2, #1
8002804: 705a strb r2, [r3, #1]
8002806: e00f b.n 8002828 <HAL_PCD_EP_Open+0x66>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8002808: 78fb ldrb r3, [r7, #3]
800280a: f003 020f and.w r2, r3, #15
800280e: 4613 mov r3, r2
8002810: 00db lsls r3, r3, #3
8002812: 4413 add r3, r2
8002814: 009b lsls r3, r3, #2
8002816: f503 7314 add.w r3, r3, #592 @ 0x250
800281a: 687a ldr r2, [r7, #4]
800281c: 4413 add r3, r2
800281e: 3304 adds r3, #4
8002820: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8002822: 68fb ldr r3, [r7, #12]
8002824: 2200 movs r2, #0
8002826: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8002828: 78fb ldrb r3, [r7, #3]
800282a: f003 030f and.w r3, r3, #15
800282e: b2da uxtb r2, r3
8002830: 68fb ldr r3, [r7, #12]
8002832: 701a strb r2, [r3, #0]
ep->maxpacket = (uint32_t)ep_mps & 0x7FFU;
8002834: 883b ldrh r3, [r7, #0]
8002836: f3c3 020a ubfx r2, r3, #0, #11
800283a: 68fb ldr r3, [r7, #12]
800283c: 609a str r2, [r3, #8]
ep->type = ep_type;
800283e: 68fb ldr r3, [r7, #12]
8002840: 78ba ldrb r2, [r7, #2]
8002842: 711a strb r2, [r3, #4]
if (ep->is_in != 0U)
8002844: 68fb ldr r3, [r7, #12]
8002846: 785b ldrb r3, [r3, #1]
8002848: 2b00 cmp r3, #0
800284a: d004 beq.n 8002856 <HAL_PCD_EP_Open+0x94>
{
/* Assign a Tx FIFO */
ep->tx_fifo_num = ep->num;
800284c: 68fb ldr r3, [r7, #12]
800284e: 781b ldrb r3, [r3, #0]
8002850: 461a mov r2, r3
8002852: 68fb ldr r3, [r7, #12]
8002854: 835a strh r2, [r3, #26]
}
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8002856: 78bb ldrb r3, [r7, #2]
8002858: 2b02 cmp r3, #2
800285a: d102 bne.n 8002862 <HAL_PCD_EP_Open+0xa0>
{
ep->data_pid_start = 0U;
800285c: 68fb ldr r3, [r7, #12]
800285e: 2200 movs r2, #0
8002860: 715a strb r2, [r3, #5]
}
__HAL_LOCK(hpcd);
8002862: 687b ldr r3, [r7, #4]
8002864: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
8002868: 2b01 cmp r3, #1
800286a: d101 bne.n 8002870 <HAL_PCD_EP_Open+0xae>
800286c: 2302 movs r3, #2
800286e: e00e b.n 800288e <HAL_PCD_EP_Open+0xcc>
8002870: 687b ldr r3, [r7, #4]
8002872: 2201 movs r2, #1
8002874: f883 2494 strb.w r2, [r3, #1172] @ 0x494
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8002878: 687b ldr r3, [r7, #4]
800287a: 681b ldr r3, [r3, #0]
800287c: 68f9 ldr r1, [r7, #12]
800287e: 4618 mov r0, r3
8002880: f002 ff52 bl 8005728 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8002884: 687b ldr r3, [r7, #4]
8002886: 2200 movs r2, #0
8002888: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return ret;
800288c: 7afb ldrb r3, [r7, #11]
}
800288e: 4618 mov r0, r3
8002890: 3710 adds r7, #16
8002892: 46bd mov sp, r7
8002894: bd80 pop {r7, pc}
08002896 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8002896: b580 push {r7, lr}
8002898: b084 sub sp, #16
800289a: af00 add r7, sp, #0
800289c: 6078 str r0, [r7, #4]
800289e: 460b mov r3, r1
80028a0: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
80028a2: f997 3003 ldrsb.w r3, [r7, #3]
80028a6: 2b00 cmp r3, #0
80028a8: da0f bge.n 80028ca <HAL_PCD_EP_Close+0x34>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80028aa: 78fb ldrb r3, [r7, #3]
80028ac: f003 020f and.w r2, r3, #15
80028b0: 4613 mov r3, r2
80028b2: 00db lsls r3, r3, #3
80028b4: 4413 add r3, r2
80028b6: 009b lsls r3, r3, #2
80028b8: 3310 adds r3, #16
80028ba: 687a ldr r2, [r7, #4]
80028bc: 4413 add r3, r2
80028be: 3304 adds r3, #4
80028c0: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80028c2: 68fb ldr r3, [r7, #12]
80028c4: 2201 movs r2, #1
80028c6: 705a strb r2, [r3, #1]
80028c8: e00f b.n 80028ea <HAL_PCD_EP_Close+0x54>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80028ca: 78fb ldrb r3, [r7, #3]
80028cc: f003 020f and.w r2, r3, #15
80028d0: 4613 mov r3, r2
80028d2: 00db lsls r3, r3, #3
80028d4: 4413 add r3, r2
80028d6: 009b lsls r3, r3, #2
80028d8: f503 7314 add.w r3, r3, #592 @ 0x250
80028dc: 687a ldr r2, [r7, #4]
80028de: 4413 add r3, r2
80028e0: 3304 adds r3, #4
80028e2: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80028e4: 68fb ldr r3, [r7, #12]
80028e6: 2200 movs r2, #0
80028e8: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
80028ea: 78fb ldrb r3, [r7, #3]
80028ec: f003 030f and.w r3, r3, #15
80028f0: b2da uxtb r2, r3
80028f2: 68fb ldr r3, [r7, #12]
80028f4: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
80028f6: 687b ldr r3, [r7, #4]
80028f8: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
80028fc: 2b01 cmp r3, #1
80028fe: d101 bne.n 8002904 <HAL_PCD_EP_Close+0x6e>
8002900: 2302 movs r3, #2
8002902: e00e b.n 8002922 <HAL_PCD_EP_Close+0x8c>
8002904: 687b ldr r3, [r7, #4]
8002906: 2201 movs r2, #1
8002908: f883 2494 strb.w r2, [r3, #1172] @ 0x494
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
800290c: 687b ldr r3, [r7, #4]
800290e: 681b ldr r3, [r3, #0]
8002910: 68f9 ldr r1, [r7, #12]
8002912: 4618 mov r0, r3
8002914: f002 ff90 bl 8005838 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
8002918: 687b ldr r3, [r7, #4]
800291a: 2200 movs r2, #0
800291c: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
8002920: 2300 movs r3, #0
}
8002922: 4618 mov r0, r3
8002924: 3710 adds r7, #16
8002926: 46bd mov sp, r7
8002928: bd80 pop {r7, pc}
0800292a <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
800292a: b580 push {r7, lr}
800292c: b086 sub sp, #24
800292e: af00 add r7, sp, #0
8002930: 60f8 str r0, [r7, #12]
8002932: 607a str r2, [r7, #4]
8002934: 603b str r3, [r7, #0]
8002936: 460b mov r3, r1
8002938: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
800293a: 7afb ldrb r3, [r7, #11]
800293c: f003 020f and.w r2, r3, #15
8002940: 4613 mov r3, r2
8002942: 00db lsls r3, r3, #3
8002944: 4413 add r3, r2
8002946: 009b lsls r3, r3, #2
8002948: f503 7314 add.w r3, r3, #592 @ 0x250
800294c: 68fa ldr r2, [r7, #12]
800294e: 4413 add r3, r2
8002950: 3304 adds r3, #4
8002952: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8002954: 697b ldr r3, [r7, #20]
8002956: 687a ldr r2, [r7, #4]
8002958: 60da str r2, [r3, #12]
ep->xfer_len = len;
800295a: 697b ldr r3, [r7, #20]
800295c: 683a ldr r2, [r7, #0]
800295e: 611a str r2, [r3, #16]
ep->xfer_count = 0U;
8002960: 697b ldr r3, [r7, #20]
8002962: 2200 movs r2, #0
8002964: 615a str r2, [r3, #20]
ep->is_in = 0U;
8002966: 697b ldr r3, [r7, #20]
8002968: 2200 movs r2, #0
800296a: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
800296c: 7afb ldrb r3, [r7, #11]
800296e: f003 030f and.w r3, r3, #15
8002972: b2da uxtb r2, r3
8002974: 697b ldr r3, [r7, #20]
8002976: 701a strb r2, [r3, #0]
if (hpcd->Init.dma_enable == 1U)
8002978: 68fb ldr r3, [r7, #12]
800297a: 799b ldrb r3, [r3, #6]
800297c: 2b01 cmp r3, #1
800297e: d102 bne.n 8002986 <HAL_PCD_EP_Receive+0x5c>
{
ep->dma_addr = (uint32_t)pBuf;
8002980: 687a ldr r2, [r7, #4]
8002982: 697b ldr r3, [r7, #20]
8002984: 61da str r2, [r3, #28]
}
(void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable);
8002986: 68fb ldr r3, [r7, #12]
8002988: 6818 ldr r0, [r3, #0]
800298a: 68fb ldr r3, [r7, #12]
800298c: 799b ldrb r3, [r3, #6]
800298e: 461a mov r2, r3
8002990: 6979 ldr r1, [r7, #20]
8002992: f003 f82d bl 80059f0 <USB_EPStartXfer>
return HAL_OK;
8002996: 2300 movs r3, #0
}
8002998: 4618 mov r0, r3
800299a: 3718 adds r7, #24
800299c: 46bd mov sp, r7
800299e: bd80 pop {r7, pc}
080029a0 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
80029a0: b580 push {r7, lr}
80029a2: b086 sub sp, #24
80029a4: af00 add r7, sp, #0
80029a6: 60f8 str r0, [r7, #12]
80029a8: 607a str r2, [r7, #4]
80029aa: 603b str r3, [r7, #0]
80029ac: 460b mov r3, r1
80029ae: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80029b0: 7afb ldrb r3, [r7, #11]
80029b2: f003 020f and.w r2, r3, #15
80029b6: 4613 mov r3, r2
80029b8: 00db lsls r3, r3, #3
80029ba: 4413 add r3, r2
80029bc: 009b lsls r3, r3, #2
80029be: 3310 adds r3, #16
80029c0: 68fa ldr r2, [r7, #12]
80029c2: 4413 add r3, r2
80029c4: 3304 adds r3, #4
80029c6: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
80029c8: 697b ldr r3, [r7, #20]
80029ca: 687a ldr r2, [r7, #4]
80029cc: 60da str r2, [r3, #12]
ep->xfer_len = len;
80029ce: 697b ldr r3, [r7, #20]
80029d0: 683a ldr r2, [r7, #0]
80029d2: 611a str r2, [r3, #16]
ep->xfer_count = 0U;
80029d4: 697b ldr r3, [r7, #20]
80029d6: 2200 movs r2, #0
80029d8: 615a str r2, [r3, #20]
ep->is_in = 1U;
80029da: 697b ldr r3, [r7, #20]
80029dc: 2201 movs r2, #1
80029de: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
80029e0: 7afb ldrb r3, [r7, #11]
80029e2: f003 030f and.w r3, r3, #15
80029e6: b2da uxtb r2, r3
80029e8: 697b ldr r3, [r7, #20]
80029ea: 701a strb r2, [r3, #0]
if (hpcd->Init.dma_enable == 1U)
80029ec: 68fb ldr r3, [r7, #12]
80029ee: 799b ldrb r3, [r3, #6]
80029f0: 2b01 cmp r3, #1
80029f2: d102 bne.n 80029fa <HAL_PCD_EP_Transmit+0x5a>
{
ep->dma_addr = (uint32_t)pBuf;
80029f4: 687a ldr r2, [r7, #4]
80029f6: 697b ldr r3, [r7, #20]
80029f8: 61da str r2, [r3, #28]
}
(void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable);
80029fa: 68fb ldr r3, [r7, #12]
80029fc: 6818 ldr r0, [r3, #0]
80029fe: 68fb ldr r3, [r7, #12]
8002a00: 799b ldrb r3, [r3, #6]
8002a02: 461a mov r2, r3
8002a04: 6979 ldr r1, [r7, #20]
8002a06: f002 fff3 bl 80059f0 <USB_EPStartXfer>
return HAL_OK;
8002a0a: 2300 movs r3, #0
}
8002a0c: 4618 mov r0, r3
8002a0e: 3718 adds r7, #24
8002a10: 46bd mov sp, r7
8002a12: bd80 pop {r7, pc}
08002a14 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8002a14: b580 push {r7, lr}
8002a16: b084 sub sp, #16
8002a18: af00 add r7, sp, #0
8002a1a: 6078 str r0, [r7, #4]
8002a1c: 460b mov r3, r1
8002a1e: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8002a20: 78fb ldrb r3, [r7, #3]
8002a22: f003 030f and.w r3, r3, #15
8002a26: 687a ldr r2, [r7, #4]
8002a28: 7912 ldrb r2, [r2, #4]
8002a2a: 4293 cmp r3, r2
8002a2c: d901 bls.n 8002a32 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8002a2e: 2301 movs r3, #1
8002a30: e04f b.n 8002ad2 <HAL_PCD_EP_SetStall+0xbe>
}
if ((0x80U & ep_addr) == 0x80U)
8002a32: f997 3003 ldrsb.w r3, [r7, #3]
8002a36: 2b00 cmp r3, #0
8002a38: da0f bge.n 8002a5a <HAL_PCD_EP_SetStall+0x46>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8002a3a: 78fb ldrb r3, [r7, #3]
8002a3c: f003 020f and.w r2, r3, #15
8002a40: 4613 mov r3, r2
8002a42: 00db lsls r3, r3, #3
8002a44: 4413 add r3, r2
8002a46: 009b lsls r3, r3, #2
8002a48: 3310 adds r3, #16
8002a4a: 687a ldr r2, [r7, #4]
8002a4c: 4413 add r3, r2
8002a4e: 3304 adds r3, #4
8002a50: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8002a52: 68fb ldr r3, [r7, #12]
8002a54: 2201 movs r2, #1
8002a56: 705a strb r2, [r3, #1]
8002a58: e00d b.n 8002a76 <HAL_PCD_EP_SetStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8002a5a: 78fa ldrb r2, [r7, #3]
8002a5c: 4613 mov r3, r2
8002a5e: 00db lsls r3, r3, #3
8002a60: 4413 add r3, r2
8002a62: 009b lsls r3, r3, #2
8002a64: f503 7314 add.w r3, r3, #592 @ 0x250
8002a68: 687a ldr r2, [r7, #4]
8002a6a: 4413 add r3, r2
8002a6c: 3304 adds r3, #4
8002a6e: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8002a70: 68fb ldr r3, [r7, #12]
8002a72: 2200 movs r2, #0
8002a74: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8002a76: 68fb ldr r3, [r7, #12]
8002a78: 2201 movs r2, #1
8002a7a: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8002a7c: 78fb ldrb r3, [r7, #3]
8002a7e: f003 030f and.w r3, r3, #15
8002a82: b2da uxtb r2, r3
8002a84: 68fb ldr r3, [r7, #12]
8002a86: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8002a88: 687b ldr r3, [r7, #4]
8002a8a: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
8002a8e: 2b01 cmp r3, #1
8002a90: d101 bne.n 8002a96 <HAL_PCD_EP_SetStall+0x82>
8002a92: 2302 movs r3, #2
8002a94: e01d b.n 8002ad2 <HAL_PCD_EP_SetStall+0xbe>
8002a96: 687b ldr r3, [r7, #4]
8002a98: 2201 movs r2, #1
8002a9a: f883 2494 strb.w r2, [r3, #1172] @ 0x494
(void)USB_EPSetStall(hpcd->Instance, ep);
8002a9e: 687b ldr r3, [r7, #4]
8002aa0: 681b ldr r3, [r3, #0]
8002aa2: 68f9 ldr r1, [r7, #12]
8002aa4: 4618 mov r0, r3
8002aa6: f003 fb81 bl 80061ac <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8002aaa: 78fb ldrb r3, [r7, #3]
8002aac: f003 030f and.w r3, r3, #15
8002ab0: 2b00 cmp r3, #0
8002ab2: d109 bne.n 8002ac8 <HAL_PCD_EP_SetStall+0xb4>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup);
8002ab4: 687b ldr r3, [r7, #4]
8002ab6: 6818 ldr r0, [r3, #0]
8002ab8: 687b ldr r3, [r7, #4]
8002aba: 7999 ldrb r1, [r3, #6]
8002abc: 687b ldr r3, [r7, #4]
8002abe: f203 439c addw r3, r3, #1180 @ 0x49c
8002ac2: 461a mov r2, r3
8002ac4: f003 fd72 bl 80065ac <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8002ac8: 687b ldr r3, [r7, #4]
8002aca: 2200 movs r2, #0
8002acc: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
8002ad0: 2300 movs r3, #0
}
8002ad2: 4618 mov r0, r3
8002ad4: 3710 adds r7, #16
8002ad6: 46bd mov sp, r7
8002ad8: bd80 pop {r7, pc}
08002ada <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8002ada: b580 push {r7, lr}
8002adc: b084 sub sp, #16
8002ade: af00 add r7, sp, #0
8002ae0: 6078 str r0, [r7, #4]
8002ae2: 460b mov r3, r1
8002ae4: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8002ae6: 78fb ldrb r3, [r7, #3]
8002ae8: f003 030f and.w r3, r3, #15
8002aec: 687a ldr r2, [r7, #4]
8002aee: 7912 ldrb r2, [r2, #4]
8002af0: 4293 cmp r3, r2
8002af2: d901 bls.n 8002af8 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8002af4: 2301 movs r3, #1
8002af6: e042 b.n 8002b7e <HAL_PCD_EP_ClrStall+0xa4>
}
if ((0x80U & ep_addr) == 0x80U)
8002af8: f997 3003 ldrsb.w r3, [r7, #3]
8002afc: 2b00 cmp r3, #0
8002afe: da0f bge.n 8002b20 <HAL_PCD_EP_ClrStall+0x46>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8002b00: 78fb ldrb r3, [r7, #3]
8002b02: f003 020f and.w r2, r3, #15
8002b06: 4613 mov r3, r2
8002b08: 00db lsls r3, r3, #3
8002b0a: 4413 add r3, r2
8002b0c: 009b lsls r3, r3, #2
8002b0e: 3310 adds r3, #16
8002b10: 687a ldr r2, [r7, #4]
8002b12: 4413 add r3, r2
8002b14: 3304 adds r3, #4
8002b16: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8002b18: 68fb ldr r3, [r7, #12]
8002b1a: 2201 movs r2, #1
8002b1c: 705a strb r2, [r3, #1]
8002b1e: e00f b.n 8002b40 <HAL_PCD_EP_ClrStall+0x66>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8002b20: 78fb ldrb r3, [r7, #3]
8002b22: f003 020f and.w r2, r3, #15
8002b26: 4613 mov r3, r2
8002b28: 00db lsls r3, r3, #3
8002b2a: 4413 add r3, r2
8002b2c: 009b lsls r3, r3, #2
8002b2e: f503 7314 add.w r3, r3, #592 @ 0x250
8002b32: 687a ldr r2, [r7, #4]
8002b34: 4413 add r3, r2
8002b36: 3304 adds r3, #4
8002b38: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8002b3a: 68fb ldr r3, [r7, #12]
8002b3c: 2200 movs r2, #0
8002b3e: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8002b40: 68fb ldr r3, [r7, #12]
8002b42: 2200 movs r2, #0
8002b44: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8002b46: 78fb ldrb r3, [r7, #3]
8002b48: f003 030f and.w r3, r3, #15
8002b4c: b2da uxtb r2, r3
8002b4e: 68fb ldr r3, [r7, #12]
8002b50: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8002b52: 687b ldr r3, [r7, #4]
8002b54: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494
8002b58: 2b01 cmp r3, #1
8002b5a: d101 bne.n 8002b60 <HAL_PCD_EP_ClrStall+0x86>
8002b5c: 2302 movs r3, #2
8002b5e: e00e b.n 8002b7e <HAL_PCD_EP_ClrStall+0xa4>
8002b60: 687b ldr r3, [r7, #4]
8002b62: 2201 movs r2, #1
8002b64: f883 2494 strb.w r2, [r3, #1172] @ 0x494
(void)USB_EPClearStall(hpcd->Instance, ep);
8002b68: 687b ldr r3, [r7, #4]
8002b6a: 681b ldr r3, [r3, #0]
8002b6c: 68f9 ldr r1, [r7, #12]
8002b6e: 4618 mov r0, r3
8002b70: f003 fb8a bl 8006288 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
8002b74: 687b ldr r3, [r7, #4]
8002b76: 2200 movs r2, #0
8002b78: f883 2494 strb.w r2, [r3, #1172] @ 0x494
return HAL_OK;
8002b7c: 2300 movs r3, #0
}
8002b7e: 4618 mov r0, r3
8002b80: 3710 adds r7, #16
8002b82: 46bd mov sp, r7
8002b84: bd80 pop {r7, pc}
08002b86 <HAL_PCD_EP_Abort>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8002b86: b580 push {r7, lr}
8002b88: b084 sub sp, #16
8002b8a: af00 add r7, sp, #0
8002b8c: 6078 str r0, [r7, #4]
8002b8e: 460b mov r3, r1
8002b90: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef ret;
PCD_EPTypeDef *ep;
if ((0x80U & ep_addr) == 0x80U)
8002b92: f997 3003 ldrsb.w r3, [r7, #3]
8002b96: 2b00 cmp r3, #0
8002b98: da0c bge.n 8002bb4 <HAL_PCD_EP_Abort+0x2e>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8002b9a: 78fb ldrb r3, [r7, #3]
8002b9c: f003 020f and.w r2, r3, #15
8002ba0: 4613 mov r3, r2
8002ba2: 00db lsls r3, r3, #3
8002ba4: 4413 add r3, r2
8002ba6: 009b lsls r3, r3, #2
8002ba8: 3310 adds r3, #16
8002baa: 687a ldr r2, [r7, #4]
8002bac: 4413 add r3, r2
8002bae: 3304 adds r3, #4
8002bb0: 60fb str r3, [r7, #12]
8002bb2: e00c b.n 8002bce <HAL_PCD_EP_Abort+0x48>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8002bb4: 78fb ldrb r3, [r7, #3]
8002bb6: f003 020f and.w r2, r3, #15
8002bba: 4613 mov r3, r2
8002bbc: 00db lsls r3, r3, #3
8002bbe: 4413 add r3, r2
8002bc0: 009b lsls r3, r3, #2
8002bc2: f503 7314 add.w r3, r3, #592 @ 0x250
8002bc6: 687a ldr r2, [r7, #4]
8002bc8: 4413 add r3, r2
8002bca: 3304 adds r3, #4
8002bcc: 60fb str r3, [r7, #12]
}
/* Stop Xfer */
ret = USB_EPStopXfer(hpcd->Instance, ep);
8002bce: 687b ldr r3, [r7, #4]
8002bd0: 681b ldr r3, [r3, #0]
8002bd2: 68f9 ldr r1, [r7, #12]
8002bd4: 4618 mov r0, r3
8002bd6: f003 f9a9 bl 8005f2c <USB_EPStopXfer>
8002bda: 4603 mov r3, r0
8002bdc: 72fb strb r3, [r7, #11]
return ret;
8002bde: 7afb ldrb r3, [r7, #11]
}
8002be0: 4618 mov r0, r3
8002be2: 3710 adds r7, #16
8002be4: 46bd mov sp, r7
8002be6: bd80 pop {r7, pc}
08002be8 <PCD_WriteEmptyTxFifo>:
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum)
{
8002be8: b580 push {r7, lr}
8002bea: b08a sub sp, #40 @ 0x28
8002bec: af02 add r7, sp, #8
8002bee: 6078 str r0, [r7, #4]
8002bf0: 6039 str r1, [r7, #0]
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
8002bf2: 687b ldr r3, [r7, #4]
8002bf4: 681b ldr r3, [r3, #0]
8002bf6: 617b str r3, [r7, #20]
uint32_t USBx_BASE = (uint32_t)USBx;
8002bf8: 697b ldr r3, [r7, #20]
8002bfa: 613b str r3, [r7, #16]
USB_OTG_EPTypeDef *ep;
uint32_t len;
uint32_t len32b;
uint32_t fifoemptymsk;
ep = &hpcd->IN_ep[epnum];
8002bfc: 683a ldr r2, [r7, #0]
8002bfe: 4613 mov r3, r2
8002c00: 00db lsls r3, r3, #3
8002c02: 4413 add r3, r2
8002c04: 009b lsls r3, r3, #2
8002c06: 3310 adds r3, #16
8002c08: 687a ldr r2, [r7, #4]
8002c0a: 4413 add r3, r2
8002c0c: 3304 adds r3, #4
8002c0e: 60fb str r3, [r7, #12]
if (ep->xfer_count > ep->xfer_len)
8002c10: 68fb ldr r3, [r7, #12]
8002c12: 695a ldr r2, [r3, #20]
8002c14: 68fb ldr r3, [r7, #12]
8002c16: 691b ldr r3, [r3, #16]
8002c18: 429a cmp r2, r3
8002c1a: d901 bls.n 8002c20 <PCD_WriteEmptyTxFifo+0x38>
{
return HAL_ERROR;
8002c1c: 2301 movs r3, #1
8002c1e: e06b b.n 8002cf8 <PCD_WriteEmptyTxFifo+0x110>
}
len = ep->xfer_len - ep->xfer_count;
8002c20: 68fb ldr r3, [r7, #12]
8002c22: 691a ldr r2, [r3, #16]
8002c24: 68fb ldr r3, [r7, #12]
8002c26: 695b ldr r3, [r3, #20]
8002c28: 1ad3 subs r3, r2, r3
8002c2a: 61fb str r3, [r7, #28]
if (len > ep->maxpacket)
8002c2c: 68fb ldr r3, [r7, #12]
8002c2e: 689b ldr r3, [r3, #8]
8002c30: 69fa ldr r2, [r7, #28]
8002c32: 429a cmp r2, r3
8002c34: d902 bls.n 8002c3c <PCD_WriteEmptyTxFifo+0x54>
{
len = ep->maxpacket;
8002c36: 68fb ldr r3, [r7, #12]
8002c38: 689b ldr r3, [r3, #8]
8002c3a: 61fb str r3, [r7, #28]
}
len32b = (len + 3U) / 4U;
8002c3c: 69fb ldr r3, [r7, #28]
8002c3e: 3303 adds r3, #3
8002c40: 089b lsrs r3, r3, #2
8002c42: 61bb str r3, [r7, #24]
while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) &&
8002c44: e02a b.n 8002c9c <PCD_WriteEmptyTxFifo+0xb4>
(ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U))
{
/* Write the FIFO */
len = ep->xfer_len - ep->xfer_count;
8002c46: 68fb ldr r3, [r7, #12]
8002c48: 691a ldr r2, [r3, #16]
8002c4a: 68fb ldr r3, [r7, #12]
8002c4c: 695b ldr r3, [r3, #20]
8002c4e: 1ad3 subs r3, r2, r3
8002c50: 61fb str r3, [r7, #28]
if (len > ep->maxpacket)
8002c52: 68fb ldr r3, [r7, #12]
8002c54: 689b ldr r3, [r3, #8]
8002c56: 69fa ldr r2, [r7, #28]
8002c58: 429a cmp r2, r3
8002c5a: d902 bls.n 8002c62 <PCD_WriteEmptyTxFifo+0x7a>
{
len = ep->maxpacket;
8002c5c: 68fb ldr r3, [r7, #12]
8002c5e: 689b ldr r3, [r3, #8]
8002c60: 61fb str r3, [r7, #28]
}
len32b = (len + 3U) / 4U;
8002c62: 69fb ldr r3, [r7, #28]
8002c64: 3303 adds r3, #3
8002c66: 089b lsrs r3, r3, #2
8002c68: 61bb str r3, [r7, #24]
(void)USB_WritePacket(USBx, ep->xfer_buff, (uint8_t)epnum, (uint16_t)len,
8002c6a: 68fb ldr r3, [r7, #12]
8002c6c: 68d9 ldr r1, [r3, #12]
8002c6e: 683b ldr r3, [r7, #0]
8002c70: b2da uxtb r2, r3
8002c72: 69fb ldr r3, [r7, #28]
8002c74: b298 uxth r0, r3
(uint8_t)hpcd->Init.dma_enable);
8002c76: 687b ldr r3, [r7, #4]
8002c78: 799b ldrb r3, [r3, #6]
(void)USB_WritePacket(USBx, ep->xfer_buff, (uint8_t)epnum, (uint16_t)len,
8002c7a: 9300 str r3, [sp, #0]
8002c7c: 4603 mov r3, r0
8002c7e: 6978 ldr r0, [r7, #20]
8002c80: f003 f9fe bl 8006080 <USB_WritePacket>
ep->xfer_buff += len;
8002c84: 68fb ldr r3, [r7, #12]
8002c86: 68da ldr r2, [r3, #12]
8002c88: 69fb ldr r3, [r7, #28]
8002c8a: 441a add r2, r3
8002c8c: 68fb ldr r3, [r7, #12]
8002c8e: 60da str r2, [r3, #12]
ep->xfer_count += len;
8002c90: 68fb ldr r3, [r7, #12]
8002c92: 695a ldr r2, [r3, #20]
8002c94: 69fb ldr r3, [r7, #28]
8002c96: 441a add r2, r3
8002c98: 68fb ldr r3, [r7, #12]
8002c9a: 615a str r2, [r3, #20]
while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) &&
8002c9c: 683b ldr r3, [r7, #0]
8002c9e: 015a lsls r2, r3, #5
8002ca0: 693b ldr r3, [r7, #16]
8002ca2: 4413 add r3, r2
8002ca4: f503 6310 add.w r3, r3, #2304 @ 0x900
8002ca8: 699b ldr r3, [r3, #24]
8002caa: b29b uxth r3, r3
(ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U))
8002cac: 69ba ldr r2, [r7, #24]
8002cae: 429a cmp r2, r3
8002cb0: d809 bhi.n 8002cc6 <PCD_WriteEmptyTxFifo+0xde>
8002cb2: 68fb ldr r3, [r7, #12]
8002cb4: 695a ldr r2, [r3, #20]
8002cb6: 68fb ldr r3, [r7, #12]
8002cb8: 691b ldr r3, [r3, #16]
while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) &&
8002cba: 429a cmp r2, r3
8002cbc: d203 bcs.n 8002cc6 <PCD_WriteEmptyTxFifo+0xde>
(ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U))
8002cbe: 68fb ldr r3, [r7, #12]
8002cc0: 691b ldr r3, [r3, #16]
8002cc2: 2b00 cmp r3, #0
8002cc4: d1bf bne.n 8002c46 <PCD_WriteEmptyTxFifo+0x5e>
}
if (ep->xfer_len <= ep->xfer_count)
8002cc6: 68fb ldr r3, [r7, #12]
8002cc8: 691a ldr r2, [r3, #16]
8002cca: 68fb ldr r3, [r7, #12]
8002ccc: 695b ldr r3, [r3, #20]
8002cce: 429a cmp r2, r3
8002cd0: d811 bhi.n 8002cf6 <PCD_WriteEmptyTxFifo+0x10e>
{
fifoemptymsk = (uint32_t)(0x1UL << (epnum & EP_ADDR_MSK));
8002cd2: 683b ldr r3, [r7, #0]
8002cd4: f003 030f and.w r3, r3, #15
8002cd8: 2201 movs r2, #1
8002cda: fa02 f303 lsl.w r3, r2, r3
8002cde: 60bb str r3, [r7, #8]
USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk;
8002ce0: 693b ldr r3, [r7, #16]
8002ce2: f503 6300 add.w r3, r3, #2048 @ 0x800
8002ce6: 6b5a ldr r2, [r3, #52] @ 0x34
8002ce8: 68bb ldr r3, [r7, #8]
8002cea: 43db mvns r3, r3
8002cec: 6939 ldr r1, [r7, #16]
8002cee: f501 6100 add.w r1, r1, #2048 @ 0x800
8002cf2: 4013 ands r3, r2
8002cf4: 634b str r3, [r1, #52] @ 0x34
}
return HAL_OK;
8002cf6: 2300 movs r3, #0
}
8002cf8: 4618 mov r0, r3
8002cfa: 3720 adds r7, #32
8002cfc: 46bd mov sp, r7
8002cfe: bd80 pop {r7, pc}
08002d00 <PCD_EP_OutXfrComplete_int>:
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_OutXfrComplete_int(PCD_HandleTypeDef *hpcd, uint32_t epnum)
{
8002d00: b580 push {r7, lr}
8002d02: b088 sub sp, #32
8002d04: af00 add r7, sp, #0
8002d06: 6078 str r0, [r7, #4]
8002d08: 6039 str r1, [r7, #0]
USB_OTG_EPTypeDef *ep;
const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
8002d0a: 687b ldr r3, [r7, #4]
8002d0c: 681b ldr r3, [r3, #0]
8002d0e: 61fb str r3, [r7, #28]
uint32_t USBx_BASE = (uint32_t)USBx;
8002d10: 69fb ldr r3, [r7, #28]
8002d12: 61bb str r3, [r7, #24]
uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
8002d14: 69fb ldr r3, [r7, #28]
8002d16: 333c adds r3, #60 @ 0x3c
8002d18: 3304 adds r3, #4
8002d1a: 681b ldr r3, [r3, #0]
8002d1c: 617b str r3, [r7, #20]
uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT;
8002d1e: 683b ldr r3, [r7, #0]
8002d20: 015a lsls r2, r3, #5
8002d22: 69bb ldr r3, [r7, #24]
8002d24: 4413 add r3, r2
8002d26: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002d2a: 689b ldr r3, [r3, #8]
8002d2c: 613b str r3, [r7, #16]
if (hpcd->Init.dma_enable == 1U)
8002d2e: 687b ldr r3, [r7, #4]
8002d30: 799b ldrb r3, [r3, #6]
8002d32: 2b01 cmp r3, #1
8002d34: d17b bne.n 8002e2e <PCD_EP_OutXfrComplete_int+0x12e>
{
if ((DoepintReg & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) /* Class C */
8002d36: 693b ldr r3, [r7, #16]
8002d38: f003 0308 and.w r3, r3, #8
8002d3c: 2b00 cmp r3, #0
8002d3e: d015 beq.n 8002d6c <PCD_EP_OutXfrComplete_int+0x6c>
{
/* StupPktRcvd = 1 this is a setup packet */
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
8002d40: 697b ldr r3, [r7, #20]
8002d42: 4a61 ldr r2, [pc, #388] @ (8002ec8 <PCD_EP_OutXfrComplete_int+0x1c8>)
8002d44: 4293 cmp r3, r2
8002d46: f240 80b9 bls.w 8002ebc <PCD_EP_OutXfrComplete_int+0x1bc>
((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX))
8002d4a: 693b ldr r3, [r7, #16]
8002d4c: f403 4300 and.w r3, r3, #32768 @ 0x8000
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
8002d50: 2b00 cmp r3, #0
8002d52: f000 80b3 beq.w 8002ebc <PCD_EP_OutXfrComplete_int+0x1bc>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX);
8002d56: 683b ldr r3, [r7, #0]
8002d58: 015a lsls r2, r3, #5
8002d5a: 69bb ldr r3, [r7, #24]
8002d5c: 4413 add r3, r2
8002d5e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002d62: 461a mov r2, r3
8002d64: f44f 4300 mov.w r3, #32768 @ 0x8000
8002d68: 6093 str r3, [r2, #8]
8002d6a: e0a7 b.n 8002ebc <PCD_EP_OutXfrComplete_int+0x1bc>
}
}
else if ((DoepintReg & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR) /* Class E */
8002d6c: 693b ldr r3, [r7, #16]
8002d6e: f003 0320 and.w r3, r3, #32
8002d72: 2b00 cmp r3, #0
8002d74: d009 beq.n 8002d8a <PCD_EP_OutXfrComplete_int+0x8a>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR);
8002d76: 683b ldr r3, [r7, #0]
8002d78: 015a lsls r2, r3, #5
8002d7a: 69bb ldr r3, [r7, #24]
8002d7c: 4413 add r3, r2
8002d7e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002d82: 461a mov r2, r3
8002d84: 2320 movs r3, #32
8002d86: 6093 str r3, [r2, #8]
8002d88: e098 b.n 8002ebc <PCD_EP_OutXfrComplete_int+0x1bc>
}
else if ((DoepintReg & (USB_OTG_DOEPINT_STUP | USB_OTG_DOEPINT_OTEPSPR)) == 0U)
8002d8a: 693b ldr r3, [r7, #16]
8002d8c: f003 0328 and.w r3, r3, #40 @ 0x28
8002d90: 2b00 cmp r3, #0
8002d92: f040 8093 bne.w 8002ebc <PCD_EP_OutXfrComplete_int+0x1bc>
{
/* StupPktRcvd = 1 this is a setup packet */
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
8002d96: 697b ldr r3, [r7, #20]
8002d98: 4a4b ldr r2, [pc, #300] @ (8002ec8 <PCD_EP_OutXfrComplete_int+0x1c8>)
8002d9a: 4293 cmp r3, r2
8002d9c: d90f bls.n 8002dbe <PCD_EP_OutXfrComplete_int+0xbe>
((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX))
8002d9e: 693b ldr r3, [r7, #16]
8002da0: f403 4300 and.w r3, r3, #32768 @ 0x8000
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
8002da4: 2b00 cmp r3, #0
8002da6: d00a beq.n 8002dbe <PCD_EP_OutXfrComplete_int+0xbe>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX);
8002da8: 683b ldr r3, [r7, #0]
8002daa: 015a lsls r2, r3, #5
8002dac: 69bb ldr r3, [r7, #24]
8002dae: 4413 add r3, r2
8002db0: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002db4: 461a mov r2, r3
8002db6: f44f 4300 mov.w r3, #32768 @ 0x8000
8002dba: 6093 str r3, [r2, #8]
8002dbc: e07e b.n 8002ebc <PCD_EP_OutXfrComplete_int+0x1bc>
}
else
{
ep = &hpcd->OUT_ep[epnum];
8002dbe: 683a ldr r2, [r7, #0]
8002dc0: 4613 mov r3, r2
8002dc2: 00db lsls r3, r3, #3
8002dc4: 4413 add r3, r2
8002dc6: 009b lsls r3, r3, #2
8002dc8: f503 7314 add.w r3, r3, #592 @ 0x250
8002dcc: 687a ldr r2, [r7, #4]
8002dce: 4413 add r3, r2
8002dd0: 3304 adds r3, #4
8002dd2: 60fb str r3, [r7, #12]
/* out data packet received over EP */
ep->xfer_count = ep->xfer_size - (USBx_OUTEP(epnum)->DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ);
8002dd4: 68fb ldr r3, [r7, #12]
8002dd6: 6a1a ldr r2, [r3, #32]
8002dd8: 683b ldr r3, [r7, #0]
8002dda: 0159 lsls r1, r3, #5
8002ddc: 69bb ldr r3, [r7, #24]
8002dde: 440b add r3, r1
8002de0: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002de4: 691b ldr r3, [r3, #16]
8002de6: f3c3 0312 ubfx r3, r3, #0, #19
8002dea: 1ad2 subs r2, r2, r3
8002dec: 68fb ldr r3, [r7, #12]
8002dee: 615a str r2, [r3, #20]
if (epnum == 0U)
8002df0: 683b ldr r3, [r7, #0]
8002df2: 2b00 cmp r3, #0
8002df4: d114 bne.n 8002e20 <PCD_EP_OutXfrComplete_int+0x120>
{
if (ep->xfer_len == 0U)
8002df6: 68fb ldr r3, [r7, #12]
8002df8: 691b ldr r3, [r3, #16]
8002dfa: 2b00 cmp r3, #0
8002dfc: d109 bne.n 8002e12 <PCD_EP_OutXfrComplete_int+0x112>
{
/* this is ZLP, so prepare EP0 for next setup */
(void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup);
8002dfe: 687b ldr r3, [r7, #4]
8002e00: 6818 ldr r0, [r3, #0]
8002e02: 687b ldr r3, [r7, #4]
8002e04: f203 439c addw r3, r3, #1180 @ 0x49c
8002e08: 461a mov r2, r3
8002e0a: 2101 movs r1, #1
8002e0c: f003 fbce bl 80065ac <USB_EP0_OutStart>
8002e10: e006 b.n 8002e20 <PCD_EP_OutXfrComplete_int+0x120>
}
else
{
ep->xfer_buff += ep->xfer_count;
8002e12: 68fb ldr r3, [r7, #12]
8002e14: 68da ldr r2, [r3, #12]
8002e16: 68fb ldr r3, [r7, #12]
8002e18: 695b ldr r3, [r3, #20]
8002e1a: 441a add r2, r3
8002e1c: 68fb ldr r3, [r7, #12]
8002e1e: 60da str r2, [r3, #12]
}
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum);
8002e20: 683b ldr r3, [r7, #0]
8002e22: b2db uxtb r3, r3
8002e24: 4619 mov r1, r3
8002e26: 6878 ldr r0, [r7, #4]
8002e28: f005 fbb0 bl 800858c <HAL_PCD_DataOutStageCallback>
8002e2c: e046 b.n 8002ebc <PCD_EP_OutXfrComplete_int+0x1bc>
/* ... */
}
}
else
{
if (gSNPSiD == USB_OTG_CORE_ID_310A)
8002e2e: 697b ldr r3, [r7, #20]
8002e30: 4a26 ldr r2, [pc, #152] @ (8002ecc <PCD_EP_OutXfrComplete_int+0x1cc>)
8002e32: 4293 cmp r3, r2
8002e34: d124 bne.n 8002e80 <PCD_EP_OutXfrComplete_int+0x180>
{
/* StupPktRcvd = 1 this is a setup packet */
if ((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX)
8002e36: 693b ldr r3, [r7, #16]
8002e38: f403 4300 and.w r3, r3, #32768 @ 0x8000
8002e3c: 2b00 cmp r3, #0
8002e3e: d00a beq.n 8002e56 <PCD_EP_OutXfrComplete_int+0x156>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX);
8002e40: 683b ldr r3, [r7, #0]
8002e42: 015a lsls r2, r3, #5
8002e44: 69bb ldr r3, [r7, #24]
8002e46: 4413 add r3, r2
8002e48: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002e4c: 461a mov r2, r3
8002e4e: f44f 4300 mov.w r3, #32768 @ 0x8000
8002e52: 6093 str r3, [r2, #8]
8002e54: e032 b.n 8002ebc <PCD_EP_OutXfrComplete_int+0x1bc>
}
else
{
if ((DoepintReg & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR)
8002e56: 693b ldr r3, [r7, #16]
8002e58: f003 0320 and.w r3, r3, #32
8002e5c: 2b00 cmp r3, #0
8002e5e: d008 beq.n 8002e72 <PCD_EP_OutXfrComplete_int+0x172>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR);
8002e60: 683b ldr r3, [r7, #0]
8002e62: 015a lsls r2, r3, #5
8002e64: 69bb ldr r3, [r7, #24]
8002e66: 4413 add r3, r2
8002e68: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002e6c: 461a mov r2, r3
8002e6e: 2320 movs r3, #32
8002e70: 6093 str r3, [r2, #8]
}
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum);
8002e72: 683b ldr r3, [r7, #0]
8002e74: b2db uxtb r3, r3
8002e76: 4619 mov r1, r3
8002e78: 6878 ldr r0, [r7, #4]
8002e7a: f005 fb87 bl 800858c <HAL_PCD_DataOutStageCallback>
8002e7e: e01d b.n 8002ebc <PCD_EP_OutXfrComplete_int+0x1bc>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
}
else
{
if ((epnum == 0U) && (hpcd->OUT_ep[epnum].xfer_len == 0U))
8002e80: 683b ldr r3, [r7, #0]
8002e82: 2b00 cmp r3, #0
8002e84: d114 bne.n 8002eb0 <PCD_EP_OutXfrComplete_int+0x1b0>
8002e86: 6879 ldr r1, [r7, #4]
8002e88: 683a ldr r2, [r7, #0]
8002e8a: 4613 mov r3, r2
8002e8c: 00db lsls r3, r3, #3
8002e8e: 4413 add r3, r2
8002e90: 009b lsls r3, r3, #2
8002e92: 440b add r3, r1
8002e94: f503 7319 add.w r3, r3, #612 @ 0x264
8002e98: 681b ldr r3, [r3, #0]
8002e9a: 2b00 cmp r3, #0
8002e9c: d108 bne.n 8002eb0 <PCD_EP_OutXfrComplete_int+0x1b0>
{
/* this is ZLP, so prepare EP0 for next setup */
(void)USB_EP0_OutStart(hpcd->Instance, 0U, (uint8_t *)hpcd->Setup);
8002e9e: 687b ldr r3, [r7, #4]
8002ea0: 6818 ldr r0, [r3, #0]
8002ea2: 687b ldr r3, [r7, #4]
8002ea4: f203 439c addw r3, r3, #1180 @ 0x49c
8002ea8: 461a mov r2, r3
8002eaa: 2100 movs r1, #0
8002eac: f003 fb7e bl 80065ac <USB_EP0_OutStart>
}
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum);
#else
HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum);
8002eb0: 683b ldr r3, [r7, #0]
8002eb2: b2db uxtb r3, r3
8002eb4: 4619 mov r1, r3
8002eb6: 6878 ldr r0, [r7, #4]
8002eb8: f005 fb68 bl 800858c <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
}
return HAL_OK;
8002ebc: 2300 movs r3, #0
}
8002ebe: 4618 mov r0, r3
8002ec0: 3720 adds r7, #32
8002ec2: 46bd mov sp, r7
8002ec4: bd80 pop {r7, pc}
8002ec6: bf00 nop
8002ec8: 4f54300a .word 0x4f54300a
8002ecc: 4f54310a .word 0x4f54310a
08002ed0 <PCD_EP_OutSetupPacket_int>:
* @param hpcd PCD handle
* @param epnum endpoint number
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint32_t epnum)
{
8002ed0: b580 push {r7, lr}
8002ed2: b086 sub sp, #24
8002ed4: af00 add r7, sp, #0
8002ed6: 6078 str r0, [r7, #4]
8002ed8: 6039 str r1, [r7, #0]
const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
8002eda: 687b ldr r3, [r7, #4]
8002edc: 681b ldr r3, [r3, #0]
8002ede: 617b str r3, [r7, #20]
uint32_t USBx_BASE = (uint32_t)USBx;
8002ee0: 697b ldr r3, [r7, #20]
8002ee2: 613b str r3, [r7, #16]
uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
8002ee4: 697b ldr r3, [r7, #20]
8002ee6: 333c adds r3, #60 @ 0x3c
8002ee8: 3304 adds r3, #4
8002eea: 681b ldr r3, [r3, #0]
8002eec: 60fb str r3, [r7, #12]
uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT;
8002eee: 683b ldr r3, [r7, #0]
8002ef0: 015a lsls r2, r3, #5
8002ef2: 693b ldr r3, [r7, #16]
8002ef4: 4413 add r3, r2
8002ef6: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002efa: 689b ldr r3, [r3, #8]
8002efc: 60bb str r3, [r7, #8]
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
8002efe: 68fb ldr r3, [r7, #12]
8002f00: 4a15 ldr r2, [pc, #84] @ (8002f58 <PCD_EP_OutSetupPacket_int+0x88>)
8002f02: 4293 cmp r3, r2
8002f04: d90e bls.n 8002f24 <PCD_EP_OutSetupPacket_int+0x54>
((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX))
8002f06: 68bb ldr r3, [r7, #8]
8002f08: f403 4300 and.w r3, r3, #32768 @ 0x8000
if ((gSNPSiD > USB_OTG_CORE_ID_300A) &&
8002f0c: 2b00 cmp r3, #0
8002f0e: d009 beq.n 8002f24 <PCD_EP_OutSetupPacket_int+0x54>
{
CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX);
8002f10: 683b ldr r3, [r7, #0]
8002f12: 015a lsls r2, r3, #5
8002f14: 693b ldr r3, [r7, #16]
8002f16: 4413 add r3, r2
8002f18: f503 6330 add.w r3, r3, #2816 @ 0xb00
8002f1c: 461a mov r2, r3
8002f1e: f44f 4300 mov.w r3, #32768 @ 0x8000
8002f22: 6093 str r3, [r2, #8]
/* Inform the upper layer that a setup packet is available */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
8002f24: 6878 ldr r0, [r7, #4]
8002f26: f005 fb1f bl 8008568 <HAL_PCD_SetupStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((gSNPSiD > USB_OTG_CORE_ID_300A) && (hpcd->Init.dma_enable == 1U))
8002f2a: 68fb ldr r3, [r7, #12]
8002f2c: 4a0a ldr r2, [pc, #40] @ (8002f58 <PCD_EP_OutSetupPacket_int+0x88>)
8002f2e: 4293 cmp r3, r2
8002f30: d90c bls.n 8002f4c <PCD_EP_OutSetupPacket_int+0x7c>
8002f32: 687b ldr r3, [r7, #4]
8002f34: 799b ldrb r3, [r3, #6]
8002f36: 2b01 cmp r3, #1
8002f38: d108 bne.n 8002f4c <PCD_EP_OutSetupPacket_int+0x7c>
{
(void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup);
8002f3a: 687b ldr r3, [r7, #4]
8002f3c: 6818 ldr r0, [r3, #0]
8002f3e: 687b ldr r3, [r7, #4]
8002f40: f203 439c addw r3, r3, #1180 @ 0x49c
8002f44: 461a mov r2, r3
8002f46: 2101 movs r1, #1
8002f48: f003 fb30 bl 80065ac <USB_EP0_OutStart>
}
return HAL_OK;
8002f4c: 2300 movs r3, #0
}
8002f4e: 4618 mov r0, r3
8002f50: 3718 adds r7, #24
8002f52: 46bd mov sp, r7
8002f54: bd80 pop {r7, pc}
8002f56: bf00 nop
8002f58: 4f54300a .word 0x4f54300a
08002f5c <HAL_PCDEx_SetTxFiFo>:
* @param fifo The number of Tx fifo
* @param size Fifo size
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size)
{
8002f5c: b480 push {r7}
8002f5e: b085 sub sp, #20
8002f60: af00 add r7, sp, #0
8002f62: 6078 str r0, [r7, #4]
8002f64: 460b mov r3, r1
8002f66: 70fb strb r3, [r7, #3]
8002f68: 4613 mov r3, r2
8002f6a: 803b strh r3, [r7, #0]
--> Txn should be configured with the minimum space of 16 words
The FIFO is used optimally when used TxFIFOs are allocated in the top
of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */
Tx_Offset = hpcd->Instance->GRXFSIZ;
8002f6c: 687b ldr r3, [r7, #4]
8002f6e: 681b ldr r3, [r3, #0]
8002f70: 6a5b ldr r3, [r3, #36] @ 0x24
8002f72: 60bb str r3, [r7, #8]
if (fifo == 0U)
8002f74: 78fb ldrb r3, [r7, #3]
8002f76: 2b00 cmp r3, #0
8002f78: d107 bne.n 8002f8a <HAL_PCDEx_SetTxFiFo+0x2e>
{
hpcd->Instance->DIEPTXF0_HNPTXFSIZ = ((uint32_t)size << 16) | Tx_Offset;
8002f7a: 883b ldrh r3, [r7, #0]
8002f7c: 0419 lsls r1, r3, #16
8002f7e: 687b ldr r3, [r7, #4]
8002f80: 681b ldr r3, [r3, #0]
8002f82: 68ba ldr r2, [r7, #8]
8002f84: 430a orrs r2, r1
8002f86: 629a str r2, [r3, #40] @ 0x28
8002f88: e028 b.n 8002fdc <HAL_PCDEx_SetTxFiFo+0x80>
}
else
{
Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16;
8002f8a: 687b ldr r3, [r7, #4]
8002f8c: 681b ldr r3, [r3, #0]
8002f8e: 6a9b ldr r3, [r3, #40] @ 0x28
8002f90: 0c1b lsrs r3, r3, #16
8002f92: 68ba ldr r2, [r7, #8]
8002f94: 4413 add r3, r2
8002f96: 60bb str r3, [r7, #8]
for (i = 0U; i < (fifo - 1U); i++)
8002f98: 2300 movs r3, #0
8002f9a: 73fb strb r3, [r7, #15]
8002f9c: e00d b.n 8002fba <HAL_PCDEx_SetTxFiFo+0x5e>
{
Tx_Offset += (hpcd->Instance->DIEPTXF[i] >> 16);
8002f9e: 687b ldr r3, [r7, #4]
8002fa0: 681a ldr r2, [r3, #0]
8002fa2: 7bfb ldrb r3, [r7, #15]
8002fa4: 3340 adds r3, #64 @ 0x40
8002fa6: 009b lsls r3, r3, #2
8002fa8: 4413 add r3, r2
8002faa: 685b ldr r3, [r3, #4]
8002fac: 0c1b lsrs r3, r3, #16
8002fae: 68ba ldr r2, [r7, #8]
8002fb0: 4413 add r3, r2
8002fb2: 60bb str r3, [r7, #8]
for (i = 0U; i < (fifo - 1U); i++)
8002fb4: 7bfb ldrb r3, [r7, #15]
8002fb6: 3301 adds r3, #1
8002fb8: 73fb strb r3, [r7, #15]
8002fba: 7bfa ldrb r2, [r7, #15]
8002fbc: 78fb ldrb r3, [r7, #3]
8002fbe: 3b01 subs r3, #1
8002fc0: 429a cmp r2, r3
8002fc2: d3ec bcc.n 8002f9e <HAL_PCDEx_SetTxFiFo+0x42>
}
/* Multiply Tx_Size by 2 to get higher performance */
hpcd->Instance->DIEPTXF[fifo - 1U] = ((uint32_t)size << 16) | Tx_Offset;
8002fc4: 883b ldrh r3, [r7, #0]
8002fc6: 0418 lsls r0, r3, #16
8002fc8: 687b ldr r3, [r7, #4]
8002fca: 6819 ldr r1, [r3, #0]
8002fcc: 78fb ldrb r3, [r7, #3]
8002fce: 3b01 subs r3, #1
8002fd0: 68ba ldr r2, [r7, #8]
8002fd2: 4302 orrs r2, r0
8002fd4: 3340 adds r3, #64 @ 0x40
8002fd6: 009b lsls r3, r3, #2
8002fd8: 440b add r3, r1
8002fda: 605a str r2, [r3, #4]
}
return HAL_OK;
8002fdc: 2300 movs r3, #0
}
8002fde: 4618 mov r0, r3
8002fe0: 3714 adds r7, #20
8002fe2: 46bd mov sp, r7
8002fe4: f85d 7b04 ldr.w r7, [sp], #4
8002fe8: 4770 bx lr
08002fea <HAL_PCDEx_SetRxFiFo>:
* @param hpcd PCD handle
* @param size Size of Rx fifo
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size)
{
8002fea: b480 push {r7}
8002fec: b083 sub sp, #12
8002fee: af00 add r7, sp, #0
8002ff0: 6078 str r0, [r7, #4]
8002ff2: 460b mov r3, r1
8002ff4: 807b strh r3, [r7, #2]
hpcd->Instance->GRXFSIZ = size;
8002ff6: 687b ldr r3, [r7, #4]
8002ff8: 681b ldr r3, [r3, #0]
8002ffa: 887a ldrh r2, [r7, #2]
8002ffc: 625a str r2, [r3, #36] @ 0x24
return HAL_OK;
8002ffe: 2300 movs r3, #0
}
8003000: 4618 mov r0, r3
8003002: 370c adds r7, #12
8003004: 46bd mov sp, r7
8003006: f85d 7b04 ldr.w r7, [sp], #4
800300a: 4770 bx lr
0800300c <HAL_PCDEx_ActivateLPM>:
* @brief Activate LPM feature.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd)
{
800300c: b480 push {r7}
800300e: b085 sub sp, #20
8003010: af00 add r7, sp, #0
8003012: 6078 str r0, [r7, #4]
USB_OTG_GlobalTypeDef *USBx = hpcd->Instance;
8003014: 687b ldr r3, [r7, #4]
8003016: 681b ldr r3, [r3, #0]
8003018: 60fb str r3, [r7, #12]
hpcd->lpm_active = 1U;
800301a: 687b ldr r3, [r7, #4]
800301c: 2201 movs r2, #1
800301e: f8c3 24d8 str.w r2, [r3, #1240] @ 0x4d8
hpcd->LPM_State = LPM_L0;
8003022: 687b ldr r3, [r7, #4]
8003024: 2200 movs r2, #0
8003026: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc
USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM;
800302a: 68fb ldr r3, [r7, #12]
800302c: 699b ldr r3, [r3, #24]
800302e: f043 6200 orr.w r2, r3, #134217728 @ 0x8000000
8003032: 68fb ldr r3, [r7, #12]
8003034: 619a str r2, [r3, #24]
USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL);
8003036: 68fb ldr r3, [r7, #12]
8003038: 6d5b ldr r3, [r3, #84] @ 0x54
800303a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
800303e: f043 0303 orr.w r3, r3, #3
8003042: 68fa ldr r2, [r7, #12]
8003044: 6553 str r3, [r2, #84] @ 0x54
return HAL_OK;
8003046: 2300 movs r3, #0
}
8003048: 4618 mov r0, r3
800304a: 3714 adds r7, #20
800304c: 46bd mov sp, r7
800304e: f85d 7b04 ldr.w r7, [sp], #4
8003052: 4770 bx lr
08003054 <HAL_RCC_ClockConfig>:
* HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
* (for more details refer to section above "Initialization/de-initialization functions")
* @retval None
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8003054: b580 push {r7, lr}
8003056: b084 sub sp, #16
8003058: af00 add r7, sp, #0
800305a: 6078 str r0, [r7, #4]
800305c: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
800305e: 687b ldr r3, [r7, #4]
8003060: 2b00 cmp r3, #0
8003062: d101 bne.n 8003068 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8003064: 2301 movs r3, #1
8003066: e0cc b.n 8003202 <HAL_RCC_ClockConfig+0x1ae>
/* To correctly read data from FLASH memory, the number of wait states (LATENCY)
must be correctly programmed according to the frequency of the CPU clock
(HCLK) and the supply voltage of the device. */
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8003068: 4b68 ldr r3, [pc, #416] @ (800320c <HAL_RCC_ClockConfig+0x1b8>)
800306a: 681b ldr r3, [r3, #0]
800306c: f003 030f and.w r3, r3, #15
8003070: 683a ldr r2, [r7, #0]
8003072: 429a cmp r2, r3
8003074: d90c bls.n 8003090 <HAL_RCC_ClockConfig+0x3c>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8003076: 4b65 ldr r3, [pc, #404] @ (800320c <HAL_RCC_ClockConfig+0x1b8>)
8003078: 683a ldr r2, [r7, #0]
800307a: b2d2 uxtb r2, r2
800307c: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
800307e: 4b63 ldr r3, [pc, #396] @ (800320c <HAL_RCC_ClockConfig+0x1b8>)
8003080: 681b ldr r3, [r3, #0]
8003082: f003 030f and.w r3, r3, #15
8003086: 683a ldr r2, [r7, #0]
8003088: 429a cmp r2, r3
800308a: d001 beq.n 8003090 <HAL_RCC_ClockConfig+0x3c>
{
return HAL_ERROR;
800308c: 2301 movs r3, #1
800308e: e0b8 b.n 8003202 <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8003090: 687b ldr r3, [r7, #4]
8003092: 681b ldr r3, [r3, #0]
8003094: f003 0302 and.w r3, r3, #2
8003098: 2b00 cmp r3, #0
800309a: d020 beq.n 80030de <HAL_RCC_ClockConfig+0x8a>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
800309c: 687b ldr r3, [r7, #4]
800309e: 681b ldr r3, [r3, #0]
80030a0: f003 0304 and.w r3, r3, #4
80030a4: 2b00 cmp r3, #0
80030a6: d005 beq.n 80030b4 <HAL_RCC_ClockConfig+0x60>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
80030a8: 4b59 ldr r3, [pc, #356] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80030aa: 689b ldr r3, [r3, #8]
80030ac: 4a58 ldr r2, [pc, #352] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80030ae: f443 53e0 orr.w r3, r3, #7168 @ 0x1c00
80030b2: 6093 str r3, [r2, #8]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80030b4: 687b ldr r3, [r7, #4]
80030b6: 681b ldr r3, [r3, #0]
80030b8: f003 0308 and.w r3, r3, #8
80030bc: 2b00 cmp r3, #0
80030be: d005 beq.n 80030cc <HAL_RCC_ClockConfig+0x78>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
80030c0: 4b53 ldr r3, [pc, #332] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80030c2: 689b ldr r3, [r3, #8]
80030c4: 4a52 ldr r2, [pc, #328] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80030c6: f443 4360 orr.w r3, r3, #57344 @ 0xe000
80030ca: 6093 str r3, [r2, #8]
}
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
80030cc: 4b50 ldr r3, [pc, #320] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80030ce: 689b ldr r3, [r3, #8]
80030d0: f023 02f0 bic.w r2, r3, #240 @ 0xf0
80030d4: 687b ldr r3, [r7, #4]
80030d6: 689b ldr r3, [r3, #8]
80030d8: 494d ldr r1, [pc, #308] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80030da: 4313 orrs r3, r2
80030dc: 608b str r3, [r1, #8]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
80030de: 687b ldr r3, [r7, #4]
80030e0: 681b ldr r3, [r3, #0]
80030e2: f003 0301 and.w r3, r3, #1
80030e6: 2b00 cmp r3, #0
80030e8: d044 beq.n 8003174 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
80030ea: 687b ldr r3, [r7, #4]
80030ec: 685b ldr r3, [r3, #4]
80030ee: 2b01 cmp r3, #1
80030f0: d107 bne.n 8003102 <HAL_RCC_ClockConfig+0xae>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
80030f2: 4b47 ldr r3, [pc, #284] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80030f4: 681b ldr r3, [r3, #0]
80030f6: f403 3300 and.w r3, r3, #131072 @ 0x20000
80030fa: 2b00 cmp r3, #0
80030fc: d119 bne.n 8003132 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80030fe: 2301 movs r3, #1
8003100: e07f b.n 8003202 <HAL_RCC_ClockConfig+0x1ae>
}
}
/* PLL is selected as System Clock Source */
else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
8003102: 687b ldr r3, [r7, #4]
8003104: 685b ldr r3, [r3, #4]
8003106: 2b02 cmp r3, #2
8003108: d003 beq.n 8003112 <HAL_RCC_ClockConfig+0xbe>
(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK))
800310a: 687b ldr r3, [r7, #4]
800310c: 685b ldr r3, [r3, #4]
else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) ||
800310e: 2b03 cmp r3, #3
8003110: d107 bne.n 8003122 <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8003112: 4b3f ldr r3, [pc, #252] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
8003114: 681b ldr r3, [r3, #0]
8003116: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800311a: 2b00 cmp r3, #0
800311c: d109 bne.n 8003132 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800311e: 2301 movs r3, #1
8003120: e06f b.n 8003202 <HAL_RCC_ClockConfig+0x1ae>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003122: 4b3b ldr r3, [pc, #236] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
8003124: 681b ldr r3, [r3, #0]
8003126: f003 0302 and.w r3, r3, #2
800312a: 2b00 cmp r3, #0
800312c: d101 bne.n 8003132 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800312e: 2301 movs r3, #1
8003130: e067 b.n 8003202 <HAL_RCC_ClockConfig+0x1ae>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8003132: 4b37 ldr r3, [pc, #220] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
8003134: 689b ldr r3, [r3, #8]
8003136: f023 0203 bic.w r2, r3, #3
800313a: 687b ldr r3, [r7, #4]
800313c: 685b ldr r3, [r3, #4]
800313e: 4934 ldr r1, [pc, #208] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
8003140: 4313 orrs r3, r2
8003142: 608b str r3, [r1, #8]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003144: f7fe f8b4 bl 80012b0 <HAL_GetTick>
8003148: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800314a: e00a b.n 8003162 <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
800314c: f7fe f8b0 bl 80012b0 <HAL_GetTick>
8003150: 4602 mov r2, r0
8003152: 68fb ldr r3, [r7, #12]
8003154: 1ad3 subs r3, r2, r3
8003156: f241 3288 movw r2, #5000 @ 0x1388
800315a: 4293 cmp r3, r2
800315c: d901 bls.n 8003162 <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
800315e: 2303 movs r3, #3
8003160: e04f b.n 8003202 <HAL_RCC_ClockConfig+0x1ae>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8003162: 4b2b ldr r3, [pc, #172] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
8003164: 689b ldr r3, [r3, #8]
8003166: f003 020c and.w r2, r3, #12
800316a: 687b ldr r3, [r7, #4]
800316c: 685b ldr r3, [r3, #4]
800316e: 009b lsls r3, r3, #2
8003170: 429a cmp r2, r3
8003172: d1eb bne.n 800314c <HAL_RCC_ClockConfig+0xf8>
}
}
}
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
8003174: 4b25 ldr r3, [pc, #148] @ (800320c <HAL_RCC_ClockConfig+0x1b8>)
8003176: 681b ldr r3, [r3, #0]
8003178: f003 030f and.w r3, r3, #15
800317c: 683a ldr r2, [r7, #0]
800317e: 429a cmp r2, r3
8003180: d20c bcs.n 800319c <HAL_RCC_ClockConfig+0x148>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8003182: 4b22 ldr r3, [pc, #136] @ (800320c <HAL_RCC_ClockConfig+0x1b8>)
8003184: 683a ldr r2, [r7, #0]
8003186: b2d2 uxtb r2, r2
8003188: 701a strb r2, [r3, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
800318a: 4b20 ldr r3, [pc, #128] @ (800320c <HAL_RCC_ClockConfig+0x1b8>)
800318c: 681b ldr r3, [r3, #0]
800318e: f003 030f and.w r3, r3, #15
8003192: 683a ldr r2, [r7, #0]
8003194: 429a cmp r2, r3
8003196: d001 beq.n 800319c <HAL_RCC_ClockConfig+0x148>
{
return HAL_ERROR;
8003198: 2301 movs r3, #1
800319a: e032 b.n 8003202 <HAL_RCC_ClockConfig+0x1ae>
}
}
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
800319c: 687b ldr r3, [r7, #4]
800319e: 681b ldr r3, [r3, #0]
80031a0: f003 0304 and.w r3, r3, #4
80031a4: 2b00 cmp r3, #0
80031a6: d008 beq.n 80031ba <HAL_RCC_ClockConfig+0x166>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
80031a8: 4b19 ldr r3, [pc, #100] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80031aa: 689b ldr r3, [r3, #8]
80031ac: f423 52e0 bic.w r2, r3, #7168 @ 0x1c00
80031b0: 687b ldr r3, [r7, #4]
80031b2: 68db ldr r3, [r3, #12]
80031b4: 4916 ldr r1, [pc, #88] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80031b6: 4313 orrs r3, r2
80031b8: 608b str r3, [r1, #8]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80031ba: 687b ldr r3, [r7, #4]
80031bc: 681b ldr r3, [r3, #0]
80031be: f003 0308 and.w r3, r3, #8
80031c2: 2b00 cmp r3, #0
80031c4: d009 beq.n 80031da <HAL_RCC_ClockConfig+0x186>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U));
80031c6: 4b12 ldr r3, [pc, #72] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80031c8: 689b ldr r3, [r3, #8]
80031ca: f423 4260 bic.w r2, r3, #57344 @ 0xe000
80031ce: 687b ldr r3, [r7, #4]
80031d0: 691b ldr r3, [r3, #16]
80031d2: 00db lsls r3, r3, #3
80031d4: 490e ldr r1, [pc, #56] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80031d6: 4313 orrs r3, r2
80031d8: 608b str r3, [r1, #8]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
80031da: f000 fb7f bl 80038dc <HAL_RCC_GetSysClockFreq>
80031de: 4602 mov r2, r0
80031e0: 4b0b ldr r3, [pc, #44] @ (8003210 <HAL_RCC_ClockConfig+0x1bc>)
80031e2: 689b ldr r3, [r3, #8]
80031e4: 091b lsrs r3, r3, #4
80031e6: f003 030f and.w r3, r3, #15
80031ea: 490a ldr r1, [pc, #40] @ (8003214 <HAL_RCC_ClockConfig+0x1c0>)
80031ec: 5ccb ldrb r3, [r1, r3]
80031ee: fa22 f303 lsr.w r3, r2, r3
80031f2: 4a09 ldr r2, [pc, #36] @ (8003218 <HAL_RCC_ClockConfig+0x1c4>)
80031f4: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings */
HAL_InitTick(uwTickPrio);
80031f6: 4b09 ldr r3, [pc, #36] @ (800321c <HAL_RCC_ClockConfig+0x1c8>)
80031f8: 681b ldr r3, [r3, #0]
80031fa: 4618 mov r0, r3
80031fc: f7fe f814 bl 8001228 <HAL_InitTick>
return HAL_OK;
8003200: 2300 movs r3, #0
}
8003202: 4618 mov r0, r3
8003204: 3710 adds r7, #16
8003206: 46bd mov sp, r7
8003208: bd80 pop {r7, pc}
800320a: bf00 nop
800320c: 40023c00 .word 0x40023c00
8003210: 40023800 .word 0x40023800
8003214: 08008c0c .word 0x08008c0c
8003218: 20000028 .word 0x20000028
800321c: 2000002c .word 0x2000002c
08003220 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
8003220: b480 push {r7}
8003222: af00 add r7, sp, #0
return SystemCoreClock;
8003224: 4b03 ldr r3, [pc, #12] @ (8003234 <HAL_RCC_GetHCLKFreq+0x14>)
8003226: 681b ldr r3, [r3, #0]
}
8003228: 4618 mov r0, r3
800322a: 46bd mov sp, r7
800322c: f85d 7b04 ldr.w r7, [sp], #4
8003230: 4770 bx lr
8003232: bf00 nop
8003234: 20000028 .word 0x20000028
08003238 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8003238: b580 push {r7, lr}
800323a: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
800323c: f7ff fff0 bl 8003220 <HAL_RCC_GetHCLKFreq>
8003240: 4602 mov r2, r0
8003242: 4b05 ldr r3, [pc, #20] @ (8003258 <HAL_RCC_GetPCLK1Freq+0x20>)
8003244: 689b ldr r3, [r3, #8]
8003246: 0a9b lsrs r3, r3, #10
8003248: f003 0307 and.w r3, r3, #7
800324c: 4903 ldr r1, [pc, #12] @ (800325c <HAL_RCC_GetPCLK1Freq+0x24>)
800324e: 5ccb ldrb r3, [r1, r3]
8003250: fa22 f303 lsr.w r3, r2, r3
}
8003254: 4618 mov r0, r3
8003256: bd80 pop {r7, pc}
8003258: 40023800 .word 0x40023800
800325c: 08008c1c .word 0x08008c1c
08003260 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8003260: b580 push {r7, lr}
8003262: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
8003264: f7ff ffdc bl 8003220 <HAL_RCC_GetHCLKFreq>
8003268: 4602 mov r2, r0
800326a: 4b05 ldr r3, [pc, #20] @ (8003280 <HAL_RCC_GetPCLK2Freq+0x20>)
800326c: 689b ldr r3, [r3, #8]
800326e: 0b5b lsrs r3, r3, #13
8003270: f003 0307 and.w r3, r3, #7
8003274: 4903 ldr r1, [pc, #12] @ (8003284 <HAL_RCC_GetPCLK2Freq+0x24>)
8003276: 5ccb ldrb r3, [r1, r3]
8003278: fa22 f303 lsr.w r3, r2, r3
}
800327c: 4618 mov r0, r3
800327e: bd80 pop {r7, pc}
8003280: 40023800 .word 0x40023800
8003284: 08008c1c .word 0x08008c1c
08003288 <HAL_RCCEx_PeriphCLKConfig>:
* the backup registers) and RCC_BDCR register are set to their reset values.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8003288: b580 push {r7, lr}
800328a: b08c sub sp, #48 @ 0x30
800328c: af00 add r7, sp, #0
800328e: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8003290: 2300 movs r3, #0
8003292: 627b str r3, [r7, #36] @ 0x24
uint32_t tmpreg1 = 0U;
8003294: 2300 movs r3, #0
8003296: 623b str r3, [r7, #32]
uint32_t plli2sp = 0U;
8003298: 2300 movs r3, #0
800329a: 61fb str r3, [r7, #28]
uint32_t plli2sq = 0U;
800329c: 2300 movs r3, #0
800329e: 61bb str r3, [r7, #24]
uint32_t plli2sr = 0U;
80032a0: 2300 movs r3, #0
80032a2: 617b str r3, [r7, #20]
uint32_t pllsaip = 0U;
80032a4: 2300 movs r3, #0
80032a6: 613b str r3, [r7, #16]
uint32_t pllsaiq = 0U;
80032a8: 2300 movs r3, #0
80032aa: 60fb str r3, [r7, #12]
uint32_t plli2sused = 0U;
80032ac: 2300 movs r3, #0
80032ae: 62fb str r3, [r7, #44] @ 0x2c
uint32_t pllsaiused = 0U;
80032b0: 2300 movs r3, #0
80032b2: 62bb str r3, [r7, #40] @ 0x28
/* Check the peripheral clock selection parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------ I2S APB1 configuration --------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == (RCC_PERIPHCLK_I2S_APB1))
80032b4: 687b ldr r3, [r7, #4]
80032b6: 681b ldr r3, [r3, #0]
80032b8: f003 0301 and.w r3, r3, #1
80032bc: 2b00 cmp r3, #0
80032be: d010 beq.n 80032e2 <HAL_RCCEx_PeriphCLKConfig+0x5a>
{
/* Check the parameters */
assert_param(IS_RCC_I2SAPB1CLKSOURCE(PeriphClkInit->I2sApb1ClockSelection));
/* Configure I2S Clock source */
__HAL_RCC_I2S_APB1_CONFIG(PeriphClkInit->I2sApb1ClockSelection);
80032c0: 4b6f ldr r3, [pc, #444] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
80032c2: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
80032c6: f023 62c0 bic.w r2, r3, #100663296 @ 0x6000000
80032ca: 687b ldr r3, [r7, #4]
80032cc: 6b9b ldr r3, [r3, #56] @ 0x38
80032ce: 496c ldr r1, [pc, #432] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
80032d0: 4313 orrs r3, r2
80032d2: f8c1 308c str.w r3, [r1, #140] @ 0x8c
/* Enable the PLLI2S when it's used as clock source for I2S */
if (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)
80032d6: 687b ldr r3, [r7, #4]
80032d8: 6b9b ldr r3, [r3, #56] @ 0x38
80032da: 2b00 cmp r3, #0
80032dc: d101 bne.n 80032e2 <HAL_RCCEx_PeriphCLKConfig+0x5a>
{
plli2sused = 1U;
80032de: 2301 movs r3, #1
80032e0: 62fb str r3, [r7, #44] @ 0x2c
}
}
/*--------------------------------------------------------------------------*/
/*---------------------------- I2S APB2 configuration ----------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == (RCC_PERIPHCLK_I2S_APB2))
80032e2: 687b ldr r3, [r7, #4]
80032e4: 681b ldr r3, [r3, #0]
80032e6: f003 0302 and.w r3, r3, #2
80032ea: 2b00 cmp r3, #0
80032ec: d010 beq.n 8003310 <HAL_RCCEx_PeriphCLKConfig+0x88>
{
/* Check the parameters */
assert_param(IS_RCC_I2SAPB2CLKSOURCE(PeriphClkInit->I2sApb2ClockSelection));
/* Configure I2S Clock source */
__HAL_RCC_I2S_APB2_CONFIG(PeriphClkInit->I2sApb2ClockSelection);
80032ee: 4b64 ldr r3, [pc, #400] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
80032f0: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
80032f4: f023 52c0 bic.w r2, r3, #402653184 @ 0x18000000
80032f8: 687b ldr r3, [r7, #4]
80032fa: 6bdb ldr r3, [r3, #60] @ 0x3c
80032fc: 4960 ldr r1, [pc, #384] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
80032fe: 4313 orrs r3, r2
8003300: f8c1 308c str.w r3, [r1, #140] @ 0x8c
/* Enable the PLLI2S when it's used as clock source for I2S */
if (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)
8003304: 687b ldr r3, [r7, #4]
8003306: 6bdb ldr r3, [r3, #60] @ 0x3c
8003308: 2b00 cmp r3, #0
800330a: d101 bne.n 8003310 <HAL_RCCEx_PeriphCLKConfig+0x88>
{
plli2sused = 1U;
800330c: 2301 movs r3, #1
800330e: 62fb str r3, [r7, #44] @ 0x2c
}
}
/*--------------------------------------------------------------------------*/
/*--------------------------- SAI1 configuration ---------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1))
8003310: 687b ldr r3, [r7, #4]
8003312: 681b ldr r3, [r3, #0]
8003314: f003 0304 and.w r3, r3, #4
8003318: 2b00 cmp r3, #0
800331a: d017 beq.n 800334c <HAL_RCCEx_PeriphCLKConfig+0xc4>
{
/* Check the parameters */
assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
/* Configure SAI1 Clock source */
__HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
800331c: 4b58 ldr r3, [pc, #352] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
800331e: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
8003322: f423 1240 bic.w r2, r3, #3145728 @ 0x300000
8003326: 687b ldr r3, [r7, #4]
8003328: 6b1b ldr r3, [r3, #48] @ 0x30
800332a: 4955 ldr r1, [pc, #340] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
800332c: 4313 orrs r3, r2
800332e: f8c1 308c str.w r3, [r1, #140] @ 0x8c
/* Enable the PLLI2S when it's used as clock source for SAI */
if (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)
8003332: 687b ldr r3, [r7, #4]
8003334: 6b1b ldr r3, [r3, #48] @ 0x30
8003336: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
800333a: d101 bne.n 8003340 <HAL_RCCEx_PeriphCLKConfig+0xb8>
{
plli2sused = 1U;
800333c: 2301 movs r3, #1
800333e: 62fb str r3, [r7, #44] @ 0x2c
}
/* Enable the PLLSAI when it's used as clock source for SAI */
if (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)
8003340: 687b ldr r3, [r7, #4]
8003342: 6b1b ldr r3, [r3, #48] @ 0x30
8003344: 2b00 cmp r3, #0
8003346: d101 bne.n 800334c <HAL_RCCEx_PeriphCLKConfig+0xc4>
{
pllsaiused = 1U;
8003348: 2301 movs r3, #1
800334a: 62bb str r3, [r7, #40] @ 0x28
}
}
/*--------------------------------------------------------------------------*/
/*-------------------------- SAI2 configuration ----------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2))
800334c: 687b ldr r3, [r7, #4]
800334e: 681b ldr r3, [r3, #0]
8003350: f003 0308 and.w r3, r3, #8
8003354: 2b00 cmp r3, #0
8003356: d017 beq.n 8003388 <HAL_RCCEx_PeriphCLKConfig+0x100>
{
/* Check the parameters */
assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection));
/* Configure SAI2 Clock source */
__HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection);
8003358: 4b49 ldr r3, [pc, #292] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
800335a: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
800335e: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000
8003362: 687b ldr r3, [r7, #4]
8003364: 6b5b ldr r3, [r3, #52] @ 0x34
8003366: 4946 ldr r1, [pc, #280] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
8003368: 4313 orrs r3, r2
800336a: f8c1 308c str.w r3, [r1, #140] @ 0x8c
/* Enable the PLLI2S when it's used as clock source for SAI */
if (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)
800336e: 687b ldr r3, [r7, #4]
8003370: 6b5b ldr r3, [r3, #52] @ 0x34
8003372: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
8003376: d101 bne.n 800337c <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
plli2sused = 1U;
8003378: 2301 movs r3, #1
800337a: 62fb str r3, [r7, #44] @ 0x2c
}
/* Enable the PLLSAI when it's used as clock source for SAI */
if (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)
800337c: 687b ldr r3, [r7, #4]
800337e: 6b5b ldr r3, [r3, #52] @ 0x34
8003380: 2b00 cmp r3, #0
8003382: d101 bne.n 8003388 <HAL_RCCEx_PeriphCLKConfig+0x100>
{
pllsaiused = 1U;
8003384: 2301 movs r3, #1
8003386: 62bb str r3, [r7, #40] @ 0x28
}
}
/*--------------------------------------------------------------------------*/
/*----------------------------- RTC configuration --------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
8003388: 687b ldr r3, [r7, #4]
800338a: 681b ldr r3, [r3, #0]
800338c: f003 0320 and.w r3, r3, #32
8003390: 2b00 cmp r3, #0
8003392: f000 808a beq.w 80034aa <HAL_RCCEx_PeriphCLKConfig+0x222>
{
/* Check for RTC Parameters used to output RTCCLK */
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* Enable Power Clock*/
__HAL_RCC_PWR_CLK_ENABLE();
8003396: 2300 movs r3, #0
8003398: 60bb str r3, [r7, #8]
800339a: 4b39 ldr r3, [pc, #228] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
800339c: 6c1b ldr r3, [r3, #64] @ 0x40
800339e: 4a38 ldr r2, [pc, #224] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
80033a0: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80033a4: 6413 str r3, [r2, #64] @ 0x40
80033a6: 4b36 ldr r3, [pc, #216] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
80033a8: 6c1b ldr r3, [r3, #64] @ 0x40
80033aa: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80033ae: 60bb str r3, [r7, #8]
80033b0: 68bb ldr r3, [r7, #8]
/* Enable write access to Backup domain */
PWR->CR |= PWR_CR_DBP;
80033b2: 4b34 ldr r3, [pc, #208] @ (8003484 <HAL_RCCEx_PeriphCLKConfig+0x1fc>)
80033b4: 681b ldr r3, [r3, #0]
80033b6: 4a33 ldr r2, [pc, #204] @ (8003484 <HAL_RCCEx_PeriphCLKConfig+0x1fc>)
80033b8: f443 7380 orr.w r3, r3, #256 @ 0x100
80033bc: 6013 str r3, [r2, #0]
/* Get tick */
tickstart = HAL_GetTick();
80033be: f7fd ff77 bl 80012b0 <HAL_GetTick>
80033c2: 6278 str r0, [r7, #36] @ 0x24
while ((PWR->CR & PWR_CR_DBP) == RESET)
80033c4: e008 b.n 80033d8 <HAL_RCCEx_PeriphCLKConfig+0x150>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
80033c6: f7fd ff73 bl 80012b0 <HAL_GetTick>
80033ca: 4602 mov r2, r0
80033cc: 6a7b ldr r3, [r7, #36] @ 0x24
80033ce: 1ad3 subs r3, r2, r3
80033d0: 2b02 cmp r3, #2
80033d2: d901 bls.n 80033d8 <HAL_RCCEx_PeriphCLKConfig+0x150>
{
return HAL_TIMEOUT;
80033d4: 2303 movs r3, #3
80033d6: e278 b.n 80038ca <HAL_RCCEx_PeriphCLKConfig+0x642>
while ((PWR->CR & PWR_CR_DBP) == RESET)
80033d8: 4b2a ldr r3, [pc, #168] @ (8003484 <HAL_RCCEx_PeriphCLKConfig+0x1fc>)
80033da: 681b ldr r3, [r3, #0]
80033dc: f403 7380 and.w r3, r3, #256 @ 0x100
80033e0: 2b00 cmp r3, #0
80033e2: d0f0 beq.n 80033c6 <HAL_RCCEx_PeriphCLKConfig+0x13e>
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
80033e4: 4b26 ldr r3, [pc, #152] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
80033e6: 6f1b ldr r3, [r3, #112] @ 0x70
80033e8: f403 7340 and.w r3, r3, #768 @ 0x300
80033ec: 623b str r3, [r7, #32]
if ((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
80033ee: 6a3b ldr r3, [r7, #32]
80033f0: 2b00 cmp r3, #0
80033f2: d02f beq.n 8003454 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
80033f4: 687b ldr r3, [r7, #4]
80033f6: 6c1b ldr r3, [r3, #64] @ 0x40
80033f8: f403 7340 and.w r3, r3, #768 @ 0x300
80033fc: 6a3a ldr r2, [r7, #32]
80033fe: 429a cmp r2, r3
8003400: d028 beq.n 8003454 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
{
/* Store the content of BDCR register before the reset of Backup Domain */
tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8003402: 4b1f ldr r3, [pc, #124] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
8003404: 6f1b ldr r3, [r3, #112] @ 0x70
8003406: f423 7340 bic.w r3, r3, #768 @ 0x300
800340a: 623b str r3, [r7, #32]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
800340c: 4b1e ldr r3, [pc, #120] @ (8003488 <HAL_RCCEx_PeriphCLKConfig+0x200>)
800340e: 2201 movs r2, #1
8003410: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8003412: 4b1d ldr r3, [pc, #116] @ (8003488 <HAL_RCCEx_PeriphCLKConfig+0x200>)
8003414: 2200 movs r2, #0
8003416: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = tmpreg1;
8003418: 4a19 ldr r2, [pc, #100] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
800341a: 6a3b ldr r3, [r7, #32]
800341c: 6713 str r3, [r2, #112] @ 0x70
/* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
800341e: 4b18 ldr r3, [pc, #96] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
8003420: 6f1b ldr r3, [r3, #112] @ 0x70
8003422: f003 0301 and.w r3, r3, #1
8003426: 2b01 cmp r3, #1
8003428: d114 bne.n 8003454 <HAL_RCCEx_PeriphCLKConfig+0x1cc>
{
/* Get tick */
tickstart = HAL_GetTick();
800342a: f7fd ff41 bl 80012b0 <HAL_GetTick>
800342e: 6278 str r0, [r7, #36] @ 0x24
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003430: e00a b.n 8003448 <HAL_RCCEx_PeriphCLKConfig+0x1c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8003432: f7fd ff3d bl 80012b0 <HAL_GetTick>
8003436: 4602 mov r2, r0
8003438: 6a7b ldr r3, [r7, #36] @ 0x24
800343a: 1ad3 subs r3, r2, r3
800343c: f241 3288 movw r2, #5000 @ 0x1388
8003440: 4293 cmp r3, r2
8003442: d901 bls.n 8003448 <HAL_RCCEx_PeriphCLKConfig+0x1c0>
{
return HAL_TIMEOUT;
8003444: 2303 movs r3, #3
8003446: e240 b.n 80038ca <HAL_RCCEx_PeriphCLKConfig+0x642>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003448: 4b0d ldr r3, [pc, #52] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
800344a: 6f1b ldr r3, [r3, #112] @ 0x70
800344c: f003 0302 and.w r3, r3, #2
8003450: 2b00 cmp r3, #0
8003452: d0ee beq.n 8003432 <HAL_RCCEx_PeriphCLKConfig+0x1aa>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8003454: 687b ldr r3, [r7, #4]
8003456: 6c1b ldr r3, [r3, #64] @ 0x40
8003458: f403 7340 and.w r3, r3, #768 @ 0x300
800345c: f5b3 7f40 cmp.w r3, #768 @ 0x300
8003460: d114 bne.n 800348c <HAL_RCCEx_PeriphCLKConfig+0x204>
8003462: 4b07 ldr r3, [pc, #28] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
8003464: 689b ldr r3, [r3, #8]
8003466: f423 12f8 bic.w r2, r3, #2031616 @ 0x1f0000
800346a: 687b ldr r3, [r7, #4]
800346c: 6c1b ldr r3, [r3, #64] @ 0x40
800346e: f023 4370 bic.w r3, r3, #4026531840 @ 0xf0000000
8003472: f423 7340 bic.w r3, r3, #768 @ 0x300
8003476: 4902 ldr r1, [pc, #8] @ (8003480 <HAL_RCCEx_PeriphCLKConfig+0x1f8>)
8003478: 4313 orrs r3, r2
800347a: 608b str r3, [r1, #8]
800347c: e00c b.n 8003498 <HAL_RCCEx_PeriphCLKConfig+0x210>
800347e: bf00 nop
8003480: 40023800 .word 0x40023800
8003484: 40007000 .word 0x40007000
8003488: 42470e40 .word 0x42470e40
800348c: 4b4a ldr r3, [pc, #296] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
800348e: 689b ldr r3, [r3, #8]
8003490: 4a49 ldr r2, [pc, #292] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
8003492: f423 13f8 bic.w r3, r3, #2031616 @ 0x1f0000
8003496: 6093 str r3, [r2, #8]
8003498: 4b47 ldr r3, [pc, #284] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
800349a: 6f1a ldr r2, [r3, #112] @ 0x70
800349c: 687b ldr r3, [r7, #4]
800349e: 6c1b ldr r3, [r3, #64] @ 0x40
80034a0: f3c3 030b ubfx r3, r3, #0, #12
80034a4: 4944 ldr r1, [pc, #272] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
80034a6: 4313 orrs r3, r2
80034a8: 670b str r3, [r1, #112] @ 0x70
}
/*--------------------------------------------------------------------------*/
/*---------------------------- TIM configuration ---------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM))
80034aa: 687b ldr r3, [r7, #4]
80034ac: 681b ldr r3, [r3, #0]
80034ae: f003 0310 and.w r3, r3, #16
80034b2: 2b00 cmp r3, #0
80034b4: d004 beq.n 80034c0 <HAL_RCCEx_PeriphCLKConfig+0x238>
{
/* Configure Timer Prescaler */
__HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection);
80034b6: 687b ldr r3, [r7, #4]
80034b8: f893 2058 ldrb.w r2, [r3, #88] @ 0x58
80034bc: 4b3f ldr r3, [pc, #252] @ (80035bc <HAL_RCCEx_PeriphCLKConfig+0x334>)
80034be: 601a str r2, [r3, #0]
}
/*--------------------------------------------------------------------------*/
/*---------------------------- FMPI2C1 Configuration -----------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMPI2C1) == RCC_PERIPHCLK_FMPI2C1)
80034c0: 687b ldr r3, [r7, #4]
80034c2: 681b ldr r3, [r3, #0]
80034c4: f003 0380 and.w r3, r3, #128 @ 0x80
80034c8: 2b00 cmp r3, #0
80034ca: d00a beq.n 80034e2 <HAL_RCCEx_PeriphCLKConfig+0x25a>
{
/* Check the parameters */
assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection));
/* Configure the FMPI2C1 clock source */
__HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection);
80034cc: 4b3a ldr r3, [pc, #232] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
80034ce: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
80034d2: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000
80034d6: 687b ldr r3, [r7, #4]
80034d8: 6cdb ldr r3, [r3, #76] @ 0x4c
80034da: 4937 ldr r1, [pc, #220] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
80034dc: 4313 orrs r3, r2
80034de: f8c1 3094 str.w r3, [r1, #148] @ 0x94
}
/*--------------------------------------------------------------------------*/
/*------------------------------ CEC Configuration -------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
80034e2: 687b ldr r3, [r7, #4]
80034e4: 681b ldr r3, [r3, #0]
80034e6: f003 0340 and.w r3, r3, #64 @ 0x40
80034ea: 2b00 cmp r3, #0
80034ec: d00a beq.n 8003504 <HAL_RCCEx_PeriphCLKConfig+0x27c>
{
/* Check the parameters */
assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
/* Configure the CEC clock source */
__HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
80034ee: 4b32 ldr r3, [pc, #200] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
80034f0: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
80034f4: f023 6280 bic.w r2, r3, #67108864 @ 0x4000000
80034f8: 687b ldr r3, [r7, #4]
80034fa: 6c9b ldr r3, [r3, #72] @ 0x48
80034fc: 492e ldr r1, [pc, #184] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
80034fe: 4313 orrs r3, r2
8003500: f8c1 3094 str.w r3, [r1, #148] @ 0x94
}
/*--------------------------------------------------------------------------*/
/*----------------------------- CLK48 Configuration ------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
8003504: 687b ldr r3, [r7, #4]
8003506: 681b ldr r3, [r3, #0]
8003508: f403 7380 and.w r3, r3, #256 @ 0x100
800350c: 2b00 cmp r3, #0
800350e: d011 beq.n 8003534 <HAL_RCCEx_PeriphCLKConfig+0x2ac>
{
/* Check the parameters */
assert_param(IS_RCC_CLK48CLKSOURCE(PeriphClkInit->Clk48ClockSelection));
/* Configure the CLK48 clock source */
__HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection);
8003510: 4b29 ldr r3, [pc, #164] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
8003512: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
8003516: f023 6200 bic.w r2, r3, #134217728 @ 0x8000000
800351a: 687b ldr r3, [r7, #4]
800351c: 6d5b ldr r3, [r3, #84] @ 0x54
800351e: 4926 ldr r1, [pc, #152] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
8003520: 4313 orrs r3, r2
8003522: f8c1 3094 str.w r3, [r1, #148] @ 0x94
/* Enable the PLLSAI when it's used as clock source for CLK48 */
if (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP)
8003526: 687b ldr r3, [r7, #4]
8003528: 6d5b ldr r3, [r3, #84] @ 0x54
800352a: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
800352e: d101 bne.n 8003534 <HAL_RCCEx_PeriphCLKConfig+0x2ac>
{
pllsaiused = 1U;
8003530: 2301 movs r3, #1
8003532: 62bb str r3, [r7, #40] @ 0x28
}
}
/*--------------------------------------------------------------------------*/
/*----------------------------- SDIO Configuration -------------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO)
8003534: 687b ldr r3, [r7, #4]
8003536: 681b ldr r3, [r3, #0]
8003538: f403 7300 and.w r3, r3, #512 @ 0x200
800353c: 2b00 cmp r3, #0
800353e: d00a beq.n 8003556 <HAL_RCCEx_PeriphCLKConfig+0x2ce>
{
/* Check the parameters */
assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection));
/* Configure the SDIO clock source */
__HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection);
8003540: 4b1d ldr r3, [pc, #116] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
8003542: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
8003546: f023 5280 bic.w r2, r3, #268435456 @ 0x10000000
800354a: 687b ldr r3, [r7, #4]
800354c: 6c5b ldr r3, [r3, #68] @ 0x44
800354e: 491a ldr r1, [pc, #104] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
8003550: 4313 orrs r3, r2
8003552: f8c1 3094 str.w r3, [r1, #148] @ 0x94
}
/*--------------------------------------------------------------------------*/
/*------------------------------ SPDIFRX Configuration ---------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
8003556: 687b ldr r3, [r7, #4]
8003558: 681b ldr r3, [r3, #0]
800355a: f403 6380 and.w r3, r3, #1024 @ 0x400
800355e: 2b00 cmp r3, #0
8003560: d011 beq.n 8003586 <HAL_RCCEx_PeriphCLKConfig+0x2fe>
{
/* Check the parameters */
assert_param(IS_RCC_SPDIFRXCLKSOURCE(PeriphClkInit->SpdifClockSelection));
/* Configure the SPDIFRX clock source */
__HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifClockSelection);
8003562: 4b15 ldr r3, [pc, #84] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
8003564: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94
8003568: f023 5200 bic.w r2, r3, #536870912 @ 0x20000000
800356c: 687b ldr r3, [r7, #4]
800356e: 6d1b ldr r3, [r3, #80] @ 0x50
8003570: 4911 ldr r1, [pc, #68] @ (80035b8 <HAL_RCCEx_PeriphCLKConfig+0x330>)
8003572: 4313 orrs r3, r2
8003574: f8c1 3094 str.w r3, [r1, #148] @ 0x94
/* Enable the PLLI2S when it's used as clock source for SPDIFRX */
if (PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP)
8003578: 687b ldr r3, [r7, #4]
800357a: 6d1b ldr r3, [r3, #80] @ 0x50
800357c: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
8003580: d101 bne.n 8003586 <HAL_RCCEx_PeriphCLKConfig+0x2fe>
{
plli2sused = 1U;
8003582: 2301 movs r3, #1
8003584: 62fb str r3, [r7, #44] @ 0x2c
/*--------------------------------------------------------------------------*/
/*---------------------------- PLLI2S Configuration ------------------------*/
/* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S on APB1,
I2S on APB2 or SPDIFRX */
if ((plli2sused == 1U) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
8003586: 6afb ldr r3, [r7, #44] @ 0x2c
8003588: 2b01 cmp r3, #1
800358a: d005 beq.n 8003598 <HAL_RCCEx_PeriphCLKConfig+0x310>
800358c: 687b ldr r3, [r7, #4]
800358e: 681b ldr r3, [r3, #0]
8003590: f5b3 6f00 cmp.w r3, #2048 @ 0x800
8003594: f040 80ff bne.w 8003796 <HAL_RCCEx_PeriphCLKConfig+0x50e>
{
/* Disable the PLLI2S */
__HAL_RCC_PLLI2S_DISABLE();
8003598: 4b09 ldr r3, [pc, #36] @ (80035c0 <HAL_RCCEx_PeriphCLKConfig+0x338>)
800359a: 2200 movs r2, #0
800359c: 601a str r2, [r3, #0]
/* Get tick */
tickstart = HAL_GetTick();
800359e: f7fd fe87 bl 80012b0 <HAL_GetTick>
80035a2: 6278 str r0, [r7, #36] @ 0x24
/* Wait till PLLI2S is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
80035a4: e00e b.n 80035c4 <HAL_RCCEx_PeriphCLKConfig+0x33c>
{
if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
80035a6: f7fd fe83 bl 80012b0 <HAL_GetTick>
80035aa: 4602 mov r2, r0
80035ac: 6a7b ldr r3, [r7, #36] @ 0x24
80035ae: 1ad3 subs r3, r2, r3
80035b0: 2b02 cmp r3, #2
80035b2: d907 bls.n 80035c4 <HAL_RCCEx_PeriphCLKConfig+0x33c>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
80035b4: 2303 movs r3, #3
80035b6: e188 b.n 80038ca <HAL_RCCEx_PeriphCLKConfig+0x642>
80035b8: 40023800 .word 0x40023800
80035bc: 424711e0 .word 0x424711e0
80035c0: 42470068 .word 0x42470068
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
80035c4: 4b7e ldr r3, [pc, #504] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
80035c6: 681b ldr r3, [r3, #0]
80035c8: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
80035cc: 2b00 cmp r3, #0
80035ce: d1ea bne.n 80035a6 <HAL_RCCEx_PeriphCLKConfig+0x31e>
/* check for common PLLI2S Parameters */
assert_param(IS_RCC_PLLI2SM_VALUE(PeriphClkInit->PLLI2S.PLLI2SM));
assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
/*------ In Case of PLLI2S is selected as source clock for I2S -----------*/
if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == RCC_PERIPHCLK_I2S_APB1)
80035d0: 687b ldr r3, [r7, #4]
80035d2: 681b ldr r3, [r3, #0]
80035d4: f003 0301 and.w r3, r3, #1
80035d8: 2b00 cmp r3, #0
80035da: d003 beq.n 80035e4 <HAL_RCCEx_PeriphCLKConfig+0x35c>
&& (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) ||
80035dc: 687b ldr r3, [r7, #4]
80035de: 6b9b ldr r3, [r3, #56] @ 0x38
80035e0: 2b00 cmp r3, #0
80035e2: d009 beq.n 80035f8 <HAL_RCCEx_PeriphCLKConfig+0x370>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)))
80035e4: 687b ldr r3, [r7, #4]
80035e6: 681b ldr r3, [r3, #0]
80035e8: f003 0302 and.w r3, r3, #2
&& (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) ||
80035ec: 2b00 cmp r3, #0
80035ee: d028 beq.n 8003642 <HAL_RCCEx_PeriphCLKConfig+0x3ba>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S)))
80035f0: 687b ldr r3, [r7, #4]
80035f2: 6bdb ldr r3, [r3, #60] @ 0x3c
80035f4: 2b00 cmp r3, #0
80035f6: d124 bne.n 8003642 <HAL_RCCEx_PeriphCLKConfig+0x3ba>
{
/* check for Parameters */
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
/* Read PLLI2SP/PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */
plli2sp = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U);
80035f8: 4b71 ldr r3, [pc, #452] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
80035fa: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
80035fe: 0c1b lsrs r3, r3, #16
8003600: f003 0303 and.w r3, r3, #3
8003604: 3301 adds r3, #1
8003606: 005b lsls r3, r3, #1
8003608: 61fb str r3, [r7, #28]
plli2sq = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos);
800360a: 4b6d ldr r3, [pc, #436] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
800360c: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
8003610: 0e1b lsrs r3, r3, #24
8003612: f003 030f and.w r3, r3, #15
8003616: 61bb str r3, [r7, #24]
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */
/* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, plli2sp, plli2sq,
8003618: 687b ldr r3, [r7, #4]
800361a: 685a ldr r2, [r3, #4]
800361c: 687b ldr r3, [r7, #4]
800361e: 689b ldr r3, [r3, #8]
8003620: 019b lsls r3, r3, #6
8003622: 431a orrs r2, r3
8003624: 69fb ldr r3, [r7, #28]
8003626: 085b lsrs r3, r3, #1
8003628: 3b01 subs r3, #1
800362a: 041b lsls r3, r3, #16
800362c: 431a orrs r2, r3
800362e: 69bb ldr r3, [r7, #24]
8003630: 061b lsls r3, r3, #24
8003632: 431a orrs r2, r3
8003634: 687b ldr r3, [r7, #4]
8003636: 695b ldr r3, [r3, #20]
8003638: 071b lsls r3, r3, #28
800363a: 4961 ldr r1, [pc, #388] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
800363c: 4313 orrs r3, r2
800363e: f8c1 3084 str.w r3, [r1, #132] @ 0x84
PeriphClkInit->PLLI2S.PLLI2SR);
}
/*------- In Case of PLLI2S is selected as source clock for SAI ----------*/
if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)
8003642: 687b ldr r3, [r7, #4]
8003644: 681b ldr r3, [r3, #0]
8003646: f003 0304 and.w r3, r3, #4
800364a: 2b00 cmp r3, #0
800364c: d004 beq.n 8003658 <HAL_RCCEx_PeriphCLKConfig+0x3d0>
&& (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
800364e: 687b ldr r3, [r7, #4]
8003650: 6b1b ldr r3, [r3, #48] @ 0x30
8003652: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000
8003656: d00a beq.n 800366e <HAL_RCCEx_PeriphCLKConfig+0x3e6>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
8003658: 687b ldr r3, [r7, #4]
800365a: 681b ldr r3, [r3, #0]
800365c: f003 0308 and.w r3, r3, #8
&& (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) ||
8003660: 2b00 cmp r3, #0
8003662: d035 beq.n 80036d0 <HAL_RCCEx_PeriphCLKConfig+0x448>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S)))
8003664: 687b ldr r3, [r7, #4]
8003666: 6b5b ldr r3, [r3, #52] @ 0x34
8003668: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
800366c: d130 bne.n 80036d0 <HAL_RCCEx_PeriphCLKConfig+0x448>
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
/* Check for PLLI2S/DIVQ parameters */
assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ));
/* Read PLLI2SP/PLLI2SR value from PLLI2SCFGR register (this value is not needed for SAI configuration) */
plli2sp = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U);
800366e: 4b54 ldr r3, [pc, #336] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
8003670: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
8003674: 0c1b lsrs r3, r3, #16
8003676: f003 0303 and.w r3, r3, #3
800367a: 3301 adds r3, #1
800367c: 005b lsls r3, r3, #1
800367e: 61fb str r3, [r7, #28]
plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
8003680: 4b4f ldr r3, [pc, #316] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
8003682: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
8003686: 0f1b lsrs r3, r3, #28
8003688: f003 0307 and.w r3, r3, #7
800368c: 617b str r3, [r7, #20]
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */
/* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */
/* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, plli2sp,
800368e: 687b ldr r3, [r7, #4]
8003690: 685a ldr r2, [r3, #4]
8003692: 687b ldr r3, [r7, #4]
8003694: 689b ldr r3, [r3, #8]
8003696: 019b lsls r3, r3, #6
8003698: 431a orrs r2, r3
800369a: 69fb ldr r3, [r7, #28]
800369c: 085b lsrs r3, r3, #1
800369e: 3b01 subs r3, #1
80036a0: 041b lsls r3, r3, #16
80036a2: 431a orrs r2, r3
80036a4: 687b ldr r3, [r7, #4]
80036a6: 691b ldr r3, [r3, #16]
80036a8: 061b lsls r3, r3, #24
80036aa: 431a orrs r2, r3
80036ac: 697b ldr r3, [r7, #20]
80036ae: 071b lsls r3, r3, #28
80036b0: 4943 ldr r1, [pc, #268] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
80036b2: 4313 orrs r3, r2
80036b4: f8c1 3084 str.w r3, [r1, #132] @ 0x84
PeriphClkInit->PLLI2S.PLLI2SQ, plli2sr);
/* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */
__HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ);
80036b8: 4b41 ldr r3, [pc, #260] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
80036ba: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
80036be: f023 021f bic.w r2, r3, #31
80036c2: 687b ldr r3, [r7, #4]
80036c4: 6a9b ldr r3, [r3, #40] @ 0x28
80036c6: 3b01 subs r3, #1
80036c8: 493d ldr r1, [pc, #244] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
80036ca: 4313 orrs r3, r2
80036cc: f8c1 308c str.w r3, [r1, #140] @ 0x8c
}
/*------ In Case of PLLI2S is selected as source clock for SPDIFRX -------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX)
80036d0: 687b ldr r3, [r7, #4]
80036d2: 681b ldr r3, [r3, #0]
80036d4: f403 6380 and.w r3, r3, #1024 @ 0x400
80036d8: 2b00 cmp r3, #0
80036da: d029 beq.n 8003730 <HAL_RCCEx_PeriphCLKConfig+0x4a8>
&& (PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP))
80036dc: 687b ldr r3, [r7, #4]
80036de: 6d1b ldr r3, [r3, #80] @ 0x50
80036e0: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
80036e4: d124 bne.n 8003730 <HAL_RCCEx_PeriphCLKConfig+0x4a8>
{
/* check for Parameters */
assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP));
/* Read PLLI2SR value from PLLI2SCFGR register (this value is not need for SAI configuration) */
plli2sq = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U);
80036e6: 4b36 ldr r3, [pc, #216] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
80036e8: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
80036ec: 0c1b lsrs r3, r3, #16
80036ee: f003 0303 and.w r3, r3, #3
80036f2: 3301 adds r3, #1
80036f4: 005b lsls r3, r3, #1
80036f6: 61bb str r3, [r7, #24]
plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos);
80036f8: 4b31 ldr r3, [pc, #196] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
80036fa: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84
80036fe: 0f1b lsrs r3, r3, #28
8003700: f003 0307 and.w r3, r3, #7
8003704: 617b str r3, [r7, #20]
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */
/* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SP,
8003706: 687b ldr r3, [r7, #4]
8003708: 685a ldr r2, [r3, #4]
800370a: 687b ldr r3, [r7, #4]
800370c: 689b ldr r3, [r3, #8]
800370e: 019b lsls r3, r3, #6
8003710: 431a orrs r2, r3
8003712: 687b ldr r3, [r7, #4]
8003714: 68db ldr r3, [r3, #12]
8003716: 085b lsrs r3, r3, #1
8003718: 3b01 subs r3, #1
800371a: 041b lsls r3, r3, #16
800371c: 431a orrs r2, r3
800371e: 69bb ldr r3, [r7, #24]
8003720: 061b lsls r3, r3, #24
8003722: 431a orrs r2, r3
8003724: 697b ldr r3, [r7, #20]
8003726: 071b lsls r3, r3, #28
8003728: 4925 ldr r1, [pc, #148] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
800372a: 4313 orrs r3, r2
800372c: f8c1 3084 str.w r3, [r1, #132] @ 0x84
plli2sq, plli2sr);
}
/*----------------- In Case of PLLI2S is just selected -----------------*/
if ((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)
8003730: 687b ldr r3, [r7, #4]
8003732: 681b ldr r3, [r3, #0]
8003734: f403 6300 and.w r3, r3, #2048 @ 0x800
8003738: 2b00 cmp r3, #0
800373a: d016 beq.n 800376a <HAL_RCCEx_PeriphCLKConfig+0x4e2>
assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ));
/* Configure the PLLI2S division factors */
/* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */
__HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SP,
800373c: 687b ldr r3, [r7, #4]
800373e: 685a ldr r2, [r3, #4]
8003740: 687b ldr r3, [r7, #4]
8003742: 689b ldr r3, [r3, #8]
8003744: 019b lsls r3, r3, #6
8003746: 431a orrs r2, r3
8003748: 687b ldr r3, [r7, #4]
800374a: 68db ldr r3, [r3, #12]
800374c: 085b lsrs r3, r3, #1
800374e: 3b01 subs r3, #1
8003750: 041b lsls r3, r3, #16
8003752: 431a orrs r2, r3
8003754: 687b ldr r3, [r7, #4]
8003756: 691b ldr r3, [r3, #16]
8003758: 061b lsls r3, r3, #24
800375a: 431a orrs r2, r3
800375c: 687b ldr r3, [r7, #4]
800375e: 695b ldr r3, [r3, #20]
8003760: 071b lsls r3, r3, #28
8003762: 4917 ldr r1, [pc, #92] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
8003764: 4313 orrs r3, r2
8003766: f8c1 3084 str.w r3, [r1, #132] @ 0x84
PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR);
}
/* Enable the PLLI2S */
__HAL_RCC_PLLI2S_ENABLE();
800376a: 4b16 ldr r3, [pc, #88] @ (80037c4 <HAL_RCCEx_PeriphCLKConfig+0x53c>)
800376c: 2201 movs r2, #1
800376e: 601a str r2, [r3, #0]
/* Get tick */
tickstart = HAL_GetTick();
8003770: f7fd fd9e bl 80012b0 <HAL_GetTick>
8003774: 6278 str r0, [r7, #36] @ 0x24
/* Wait till PLLI2S is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
8003776: e008 b.n 800378a <HAL_RCCEx_PeriphCLKConfig+0x502>
{
if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
8003778: f7fd fd9a bl 80012b0 <HAL_GetTick>
800377c: 4602 mov r2, r0
800377e: 6a7b ldr r3, [r7, #36] @ 0x24
8003780: 1ad3 subs r3, r2, r3
8003782: 2b02 cmp r3, #2
8003784: d901 bls.n 800378a <HAL_RCCEx_PeriphCLKConfig+0x502>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
8003786: 2303 movs r3, #3
8003788: e09f b.n 80038ca <HAL_RCCEx_PeriphCLKConfig+0x642>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
800378a: 4b0d ldr r3, [pc, #52] @ (80037c0 <HAL_RCCEx_PeriphCLKConfig+0x538>)
800378c: 681b ldr r3, [r3, #0]
800378e: f003 6300 and.w r3, r3, #134217728 @ 0x8000000
8003792: 2b00 cmp r3, #0
8003794: d0f0 beq.n 8003778 <HAL_RCCEx_PeriphCLKConfig+0x4f0>
}
/*--------------------------------------------------------------------------*/
/*----------------------------- PLLSAI Configuration -----------------------*/
/* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, CLK48 or SDIO */
if (pllsaiused == 1U)
8003796: 6abb ldr r3, [r7, #40] @ 0x28
8003798: 2b01 cmp r3, #1
800379a: f040 8095 bne.w 80038c8 <HAL_RCCEx_PeriphCLKConfig+0x640>
{
/* Disable PLLSAI Clock */
__HAL_RCC_PLLSAI_DISABLE();
800379e: 4b0a ldr r3, [pc, #40] @ (80037c8 <HAL_RCCEx_PeriphCLKConfig+0x540>)
80037a0: 2200 movs r2, #0
80037a2: 601a str r2, [r3, #0]
/* Get tick */
tickstart = HAL_GetTick();
80037a4: f7fd fd84 bl 80012b0 <HAL_GetTick>
80037a8: 6278 str r0, [r7, #36] @ 0x24
/* Wait till PLLSAI is disabled */
while (__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
80037aa: e00f b.n 80037cc <HAL_RCCEx_PeriphCLKConfig+0x544>
{
if ((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
80037ac: f7fd fd80 bl 80012b0 <HAL_GetTick>
80037b0: 4602 mov r2, r0
80037b2: 6a7b ldr r3, [r7, #36] @ 0x24
80037b4: 1ad3 subs r3, r2, r3
80037b6: 2b02 cmp r3, #2
80037b8: d908 bls.n 80037cc <HAL_RCCEx_PeriphCLKConfig+0x544>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
80037ba: 2303 movs r3, #3
80037bc: e085 b.n 80038ca <HAL_RCCEx_PeriphCLKConfig+0x642>
80037be: bf00 nop
80037c0: 40023800 .word 0x40023800
80037c4: 42470068 .word 0x42470068
80037c8: 42470070 .word 0x42470070
while (__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
80037cc: 4b41 ldr r3, [pc, #260] @ (80038d4 <HAL_RCCEx_PeriphCLKConfig+0x64c>)
80037ce: 681b ldr r3, [r3, #0]
80037d0: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
80037d4: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
80037d8: d0e8 beq.n 80037ac <HAL_RCCEx_PeriphCLKConfig+0x524>
/* Check the PLLSAI division factors */
assert_param(IS_RCC_PLLSAIM_VALUE(PeriphClkInit->PLLSAI.PLLSAIM));
assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN));
/*------ In Case of PLLSAI is selected as source clock for SAI -----------*/
if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)
80037da: 687b ldr r3, [r7, #4]
80037dc: 681b ldr r3, [r3, #0]
80037de: f003 0304 and.w r3, r3, #4
80037e2: 2b00 cmp r3, #0
80037e4: d003 beq.n 80037ee <HAL_RCCEx_PeriphCLKConfig+0x566>
&& (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||
80037e6: 687b ldr r3, [r7, #4]
80037e8: 6b1b ldr r3, [r3, #48] @ 0x30
80037ea: 2b00 cmp r3, #0
80037ec: d009 beq.n 8003802 <HAL_RCCEx_PeriphCLKConfig+0x57a>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
80037ee: 687b ldr r3, [r7, #4]
80037f0: 681b ldr r3, [r3, #0]
80037f2: f003 0308 and.w r3, r3, #8
&& (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||
80037f6: 2b00 cmp r3, #0
80037f8: d02b beq.n 8003852 <HAL_RCCEx_PeriphCLKConfig+0x5ca>
((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI)))
80037fa: 687b ldr r3, [r7, #4]
80037fc: 6b5b ldr r3, [r3, #52] @ 0x34
80037fe: 2b00 cmp r3, #0
8003800: d127 bne.n 8003852 <HAL_RCCEx_PeriphCLKConfig+0x5ca>
assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ));
/* check for PLLSAI/DIVQ Parameter */
assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ));
/* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */
pllsaip = ((((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U) << 1U);
8003802: 4b34 ldr r3, [pc, #208] @ (80038d4 <HAL_RCCEx_PeriphCLKConfig+0x64c>)
8003804: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
8003808: 0c1b lsrs r3, r3, #16
800380a: f003 0303 and.w r3, r3, #3
800380e: 3301 adds r3, #1
8003810: 005b lsls r3, r3, #1
8003812: 613b str r3, [r7, #16]
/* PLLSAI_VCO Input = PLL_SOURCE/PLLM */
/* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */
/* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */
__HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN, pllsaip,
8003814: 687b ldr r3, [r7, #4]
8003816: 699a ldr r2, [r3, #24]
8003818: 687b ldr r3, [r7, #4]
800381a: 69db ldr r3, [r3, #28]
800381c: 019b lsls r3, r3, #6
800381e: 431a orrs r2, r3
8003820: 693b ldr r3, [r7, #16]
8003822: 085b lsrs r3, r3, #1
8003824: 3b01 subs r3, #1
8003826: 041b lsls r3, r3, #16
8003828: 431a orrs r2, r3
800382a: 687b ldr r3, [r7, #4]
800382c: 6a5b ldr r3, [r3, #36] @ 0x24
800382e: 061b lsls r3, r3, #24
8003830: 4928 ldr r1, [pc, #160] @ (80038d4 <HAL_RCCEx_PeriphCLKConfig+0x64c>)
8003832: 4313 orrs r3, r2
8003834: f8c1 3088 str.w r3, [r1, #136] @ 0x88
PeriphClkInit->PLLSAI.PLLSAIQ, 0U);
/* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
__HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ);
8003838: 4b26 ldr r3, [pc, #152] @ (80038d4 <HAL_RCCEx_PeriphCLKConfig+0x64c>)
800383a: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c
800383e: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00
8003842: 687b ldr r3, [r7, #4]
8003844: 6adb ldr r3, [r3, #44] @ 0x2c
8003846: 3b01 subs r3, #1
8003848: 021b lsls r3, r3, #8
800384a: 4922 ldr r1, [pc, #136] @ (80038d4 <HAL_RCCEx_PeriphCLKConfig+0x64c>)
800384c: 4313 orrs r3, r2
800384e: f8c1 308c str.w r3, [r1, #140] @ 0x8c
}
/*------ In Case of PLLSAI is selected as source clock for CLK48 ---------*/
/* In Case of PLLI2S is selected as source clock for CLK48 */
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48)
8003852: 687b ldr r3, [r7, #4]
8003854: 681b ldr r3, [r3, #0]
8003856: f403 7380 and.w r3, r3, #256 @ 0x100
800385a: 2b00 cmp r3, #0
800385c: d01d beq.n 800389a <HAL_RCCEx_PeriphCLKConfig+0x612>
&& (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP))
800385e: 687b ldr r3, [r7, #4]
8003860: 6d5b ldr r3, [r3, #84] @ 0x54
8003862: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000
8003866: d118 bne.n 800389a <HAL_RCCEx_PeriphCLKConfig+0x612>
{
/* check for Parameters */
assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP));
/* Read PLLSAIQ value from PLLI2SCFGR register (this value is not need for SAI configuration) */
pllsaiq = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
8003868: 4b1a ldr r3, [pc, #104] @ (80038d4 <HAL_RCCEx_PeriphCLKConfig+0x64c>)
800386a: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88
800386e: 0e1b lsrs r3, r3, #24
8003870: f003 030f and.w r3, r3, #15
8003874: 60fb str r3, [r7, #12]
/* Configure the PLLSAI division factors */
/* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) * (PLLI2SN/PLLSAIM) */
/* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */
__HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN, PeriphClkInit->PLLSAI.PLLSAIP,
8003876: 687b ldr r3, [r7, #4]
8003878: 699a ldr r2, [r3, #24]
800387a: 687b ldr r3, [r7, #4]
800387c: 69db ldr r3, [r3, #28]
800387e: 019b lsls r3, r3, #6
8003880: 431a orrs r2, r3
8003882: 687b ldr r3, [r7, #4]
8003884: 6a1b ldr r3, [r3, #32]
8003886: 085b lsrs r3, r3, #1
8003888: 3b01 subs r3, #1
800388a: 041b lsls r3, r3, #16
800388c: 431a orrs r2, r3
800388e: 68fb ldr r3, [r7, #12]
8003890: 061b lsls r3, r3, #24
8003892: 4910 ldr r1, [pc, #64] @ (80038d4 <HAL_RCCEx_PeriphCLKConfig+0x64c>)
8003894: 4313 orrs r3, r2
8003896: f8c1 3088 str.w r3, [r1, #136] @ 0x88
pllsaiq, 0U);
}
/* Enable PLLSAI Clock */
__HAL_RCC_PLLSAI_ENABLE();
800389a: 4b0f ldr r3, [pc, #60] @ (80038d8 <HAL_RCCEx_PeriphCLKConfig+0x650>)
800389c: 2201 movs r2, #1
800389e: 601a str r2, [r3, #0]
/* Get tick */
tickstart = HAL_GetTick();
80038a0: f7fd fd06 bl 80012b0 <HAL_GetTick>
80038a4: 6278 str r0, [r7, #36] @ 0x24
/* Wait till PLLSAI is ready */
while (__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
80038a6: e008 b.n 80038ba <HAL_RCCEx_PeriphCLKConfig+0x632>
{
if ((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE)
80038a8: f7fd fd02 bl 80012b0 <HAL_GetTick>
80038ac: 4602 mov r2, r0
80038ae: 6a7b ldr r3, [r7, #36] @ 0x24
80038b0: 1ad3 subs r3, r2, r3
80038b2: 2b02 cmp r3, #2
80038b4: d901 bls.n 80038ba <HAL_RCCEx_PeriphCLKConfig+0x632>
{
/* return in case of Timeout detected */
return HAL_TIMEOUT;
80038b6: 2303 movs r3, #3
80038b8: e007 b.n 80038ca <HAL_RCCEx_PeriphCLKConfig+0x642>
while (__HAL_RCC_PLLSAI_GET_FLAG() == RESET)
80038ba: 4b06 ldr r3, [pc, #24] @ (80038d4 <HAL_RCCEx_PeriphCLKConfig+0x64c>)
80038bc: 681b ldr r3, [r3, #0]
80038be: f003 5300 and.w r3, r3, #536870912 @ 0x20000000
80038c2: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000
80038c6: d1ef bne.n 80038a8 <HAL_RCCEx_PeriphCLKConfig+0x620>
}
}
}
return HAL_OK;
80038c8: 2300 movs r3, #0
}
80038ca: 4618 mov r0, r3
80038cc: 3730 adds r7, #48 @ 0x30
80038ce: 46bd mov sp, r7
80038d0: bd80 pop {r7, pc}
80038d2: bf00 nop
80038d4: 40023800 .word 0x40023800
80038d8: 42470070 .word 0x42470070
080038dc <HAL_RCC_GetSysClockFreq>:
*
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
80038dc: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
80038e0: b0ae sub sp, #184 @ 0xb8
80038e2: af00 add r7, sp, #0
uint32_t pllm = 0U;
80038e4: 2300 movs r3, #0
80038e6: f8c7 30ac str.w r3, [r7, #172] @ 0xac
uint32_t pllvco = 0U;
80038ea: 2300 movs r3, #0
80038ec: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
uint32_t pllp = 0U;
80038f0: 2300 movs r3, #0
80038f2: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
uint32_t pllr = 0U;
80038f6: 2300 movs r3, #0
80038f8: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
uint32_t sysclockfreq = 0U;
80038fc: 2300 movs r3, #0
80038fe: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
/* Get SYSCLK source -------------------------------------------------------*/
switch (RCC->CFGR & RCC_CFGR_SWS)
8003902: 4bcb ldr r3, [pc, #812] @ (8003c30 <HAL_RCC_GetSysClockFreq+0x354>)
8003904: 689b ldr r3, [r3, #8]
8003906: f003 030c and.w r3, r3, #12
800390a: 2b0c cmp r3, #12
800390c: f200 8206 bhi.w 8003d1c <HAL_RCC_GetSysClockFreq+0x440>
8003910: a201 add r2, pc, #4 @ (adr r2, 8003918 <HAL_RCC_GetSysClockFreq+0x3c>)
8003912: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003916: bf00 nop
8003918: 0800394d .word 0x0800394d
800391c: 08003d1d .word 0x08003d1d
8003920: 08003d1d .word 0x08003d1d
8003924: 08003d1d .word 0x08003d1d
8003928: 08003955 .word 0x08003955
800392c: 08003d1d .word 0x08003d1d
8003930: 08003d1d .word 0x08003d1d
8003934: 08003d1d .word 0x08003d1d
8003938: 0800395d .word 0x0800395d
800393c: 08003d1d .word 0x08003d1d
8003940: 08003d1d .word 0x08003d1d
8003944: 08003d1d .word 0x08003d1d
8003948: 08003b4d .word 0x08003b4d
{
case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */
{
sysclockfreq = HSI_VALUE;
800394c: 4bb9 ldr r3, [pc, #740] @ (8003c34 <HAL_RCC_GetSysClockFreq+0x358>)
800394e: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
break;
8003952: e1e7 b.n 8003d24 <HAL_RCC_GetSysClockFreq+0x448>
}
case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */
{
sysclockfreq = HSE_VALUE;
8003954: 4bb8 ldr r3, [pc, #736] @ (8003c38 <HAL_RCC_GetSysClockFreq+0x35c>)
8003956: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
break;
800395a: e1e3 b.n 8003d24 <HAL_RCC_GetSysClockFreq+0x448>
}
case RCC_CFGR_SWS_PLL: /* PLL/PLLP used as system clock source */
{
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLP */
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
800395c: 4bb4 ldr r3, [pc, #720] @ (8003c30 <HAL_RCC_GetSysClockFreq+0x354>)
800395e: 685b ldr r3, [r3, #4]
8003960: f003 033f and.w r3, r3, #63 @ 0x3f
8003964: f8c7 30ac str.w r3, [r7, #172] @ 0xac
if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
8003968: 4bb1 ldr r3, [pc, #708] @ (8003c30 <HAL_RCC_GetSysClockFreq+0x354>)
800396a: 685b ldr r3, [r3, #4]
800396c: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8003970: 2b00 cmp r3, #0
8003972: d071 beq.n 8003a58 <HAL_RCC_GetSysClockFreq+0x17c>
{
/* HSE used as PLL clock source */
pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8003974: 4bae ldr r3, [pc, #696] @ (8003c30 <HAL_RCC_GetSysClockFreq+0x354>)
8003976: 685b ldr r3, [r3, #4]
8003978: 099b lsrs r3, r3, #6
800397a: 2200 movs r2, #0
800397c: f8c7 3098 str.w r3, [r7, #152] @ 0x98
8003980: f8c7 209c str.w r2, [r7, #156] @ 0x9c
8003984: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8003988: f3c3 0308 ubfx r3, r3, #0, #9
800398c: f8c7 3090 str.w r3, [r7, #144] @ 0x90
8003990: 2300 movs r3, #0
8003992: f8c7 3094 str.w r3, [r7, #148] @ 0x94
8003996: e9d7 4524 ldrd r4, r5, [r7, #144] @ 0x90
800399a: 4622 mov r2, r4
800399c: 462b mov r3, r5
800399e: f04f 0000 mov.w r0, #0
80039a2: f04f 0100 mov.w r1, #0
80039a6: 0159 lsls r1, r3, #5
80039a8: ea41 61d2 orr.w r1, r1, r2, lsr #27
80039ac: 0150 lsls r0, r2, #5
80039ae: 4602 mov r2, r0
80039b0: 460b mov r3, r1
80039b2: 4621 mov r1, r4
80039b4: 1a51 subs r1, r2, r1
80039b6: 6439 str r1, [r7, #64] @ 0x40
80039b8: 4629 mov r1, r5
80039ba: eb63 0301 sbc.w r3, r3, r1
80039be: 647b str r3, [r7, #68] @ 0x44
80039c0: f04f 0200 mov.w r2, #0
80039c4: f04f 0300 mov.w r3, #0
80039c8: e9d7 8910 ldrd r8, r9, [r7, #64] @ 0x40
80039cc: 4649 mov r1, r9
80039ce: 018b lsls r3, r1, #6
80039d0: 4641 mov r1, r8
80039d2: ea43 6391 orr.w r3, r3, r1, lsr #26
80039d6: 4641 mov r1, r8
80039d8: 018a lsls r2, r1, #6
80039da: 4641 mov r1, r8
80039dc: 1a51 subs r1, r2, r1
80039de: 63b9 str r1, [r7, #56] @ 0x38
80039e0: 4649 mov r1, r9
80039e2: eb63 0301 sbc.w r3, r3, r1
80039e6: 63fb str r3, [r7, #60] @ 0x3c
80039e8: f04f 0200 mov.w r2, #0
80039ec: f04f 0300 mov.w r3, #0
80039f0: e9d7 890e ldrd r8, r9, [r7, #56] @ 0x38
80039f4: 4649 mov r1, r9
80039f6: 00cb lsls r3, r1, #3
80039f8: 4641 mov r1, r8
80039fa: ea43 7351 orr.w r3, r3, r1, lsr #29
80039fe: 4641 mov r1, r8
8003a00: 00ca lsls r2, r1, #3
8003a02: 4610 mov r0, r2
8003a04: 4619 mov r1, r3
8003a06: 4603 mov r3, r0
8003a08: 4622 mov r2, r4
8003a0a: 189b adds r3, r3, r2
8003a0c: 633b str r3, [r7, #48] @ 0x30
8003a0e: 462b mov r3, r5
8003a10: 460a mov r2, r1
8003a12: eb42 0303 adc.w r3, r2, r3
8003a16: 637b str r3, [r7, #52] @ 0x34
8003a18: f04f 0200 mov.w r2, #0
8003a1c: f04f 0300 mov.w r3, #0
8003a20: e9d7 450c ldrd r4, r5, [r7, #48] @ 0x30
8003a24: 4629 mov r1, r5
8003a26: 024b lsls r3, r1, #9
8003a28: 4621 mov r1, r4
8003a2a: ea43 53d1 orr.w r3, r3, r1, lsr #23
8003a2e: 4621 mov r1, r4
8003a30: 024a lsls r2, r1, #9
8003a32: 4610 mov r0, r2
8003a34: 4619 mov r1, r3
8003a36: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8003a3a: 2200 movs r2, #0
8003a3c: f8c7 3088 str.w r3, [r7, #136] @ 0x88
8003a40: f8c7 208c str.w r2, [r7, #140] @ 0x8c
8003a44: e9d7 2322 ldrd r2, r3, [r7, #136] @ 0x88
8003a48: f7fc fbdc bl 8000204 <__aeabi_uldivmod>
8003a4c: 4602 mov r2, r0
8003a4e: 460b mov r3, r1
8003a50: 4613 mov r3, r2
8003a52: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8003a56: e067 b.n 8003b28 <HAL_RCC_GetSysClockFreq+0x24c>
}
else
{
/* HSI used as PLL clock source */
pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8003a58: 4b75 ldr r3, [pc, #468] @ (8003c30 <HAL_RCC_GetSysClockFreq+0x354>)
8003a5a: 685b ldr r3, [r3, #4]
8003a5c: 099b lsrs r3, r3, #6
8003a5e: 2200 movs r2, #0
8003a60: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8003a64: f8c7 2084 str.w r2, [r7, #132] @ 0x84
8003a68: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8003a6c: f3c3 0308 ubfx r3, r3, #0, #9
8003a70: 67bb str r3, [r7, #120] @ 0x78
8003a72: 2300 movs r3, #0
8003a74: 67fb str r3, [r7, #124] @ 0x7c
8003a76: e9d7 451e ldrd r4, r5, [r7, #120] @ 0x78
8003a7a: 4622 mov r2, r4
8003a7c: 462b mov r3, r5
8003a7e: f04f 0000 mov.w r0, #0
8003a82: f04f 0100 mov.w r1, #0
8003a86: 0159 lsls r1, r3, #5
8003a88: ea41 61d2 orr.w r1, r1, r2, lsr #27
8003a8c: 0150 lsls r0, r2, #5
8003a8e: 4602 mov r2, r0
8003a90: 460b mov r3, r1
8003a92: 4621 mov r1, r4
8003a94: 1a51 subs r1, r2, r1
8003a96: 62b9 str r1, [r7, #40] @ 0x28
8003a98: 4629 mov r1, r5
8003a9a: eb63 0301 sbc.w r3, r3, r1
8003a9e: 62fb str r3, [r7, #44] @ 0x2c
8003aa0: f04f 0200 mov.w r2, #0
8003aa4: f04f 0300 mov.w r3, #0
8003aa8: e9d7 890a ldrd r8, r9, [r7, #40] @ 0x28
8003aac: 4649 mov r1, r9
8003aae: 018b lsls r3, r1, #6
8003ab0: 4641 mov r1, r8
8003ab2: ea43 6391 orr.w r3, r3, r1, lsr #26
8003ab6: 4641 mov r1, r8
8003ab8: 018a lsls r2, r1, #6
8003aba: 4641 mov r1, r8
8003abc: ebb2 0a01 subs.w sl, r2, r1
8003ac0: 4649 mov r1, r9
8003ac2: eb63 0b01 sbc.w fp, r3, r1
8003ac6: f04f 0200 mov.w r2, #0
8003aca: f04f 0300 mov.w r3, #0
8003ace: ea4f 03cb mov.w r3, fp, lsl #3
8003ad2: ea43 735a orr.w r3, r3, sl, lsr #29
8003ad6: ea4f 02ca mov.w r2, sl, lsl #3
8003ada: 4692 mov sl, r2
8003adc: 469b mov fp, r3
8003ade: 4623 mov r3, r4
8003ae0: eb1a 0303 adds.w r3, sl, r3
8003ae4: 623b str r3, [r7, #32]
8003ae6: 462b mov r3, r5
8003ae8: eb4b 0303 adc.w r3, fp, r3
8003aec: 627b str r3, [r7, #36] @ 0x24
8003aee: f04f 0200 mov.w r2, #0
8003af2: f04f 0300 mov.w r3, #0
8003af6: e9d7 4508 ldrd r4, r5, [r7, #32]
8003afa: 4629 mov r1, r5
8003afc: 028b lsls r3, r1, #10
8003afe: 4621 mov r1, r4
8003b00: ea43 5391 orr.w r3, r3, r1, lsr #22
8003b04: 4621 mov r1, r4
8003b06: 028a lsls r2, r1, #10
8003b08: 4610 mov r0, r2
8003b0a: 4619 mov r1, r3
8003b0c: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8003b10: 2200 movs r2, #0
8003b12: 673b str r3, [r7, #112] @ 0x70
8003b14: 677a str r2, [r7, #116] @ 0x74
8003b16: e9d7 231c ldrd r2, r3, [r7, #112] @ 0x70
8003b1a: f7fc fb73 bl 8000204 <__aeabi_uldivmod>
8003b1e: 4602 mov r2, r0
8003b20: 460b mov r3, r1
8003b22: 4613 mov r3, r2
8003b24: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
}
pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U);
8003b28: 4b41 ldr r3, [pc, #260] @ (8003c30 <HAL_RCC_GetSysClockFreq+0x354>)
8003b2a: 685b ldr r3, [r3, #4]
8003b2c: 0c1b lsrs r3, r3, #16
8003b2e: f003 0303 and.w r3, r3, #3
8003b32: 3301 adds r3, #1
8003b34: 005b lsls r3, r3, #1
8003b36: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
sysclockfreq = pllvco / pllp;
8003b3a: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4
8003b3e: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8003b42: fbb2 f3f3 udiv r3, r2, r3
8003b46: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
break;
8003b4a: e0eb b.n 8003d24 <HAL_RCC_GetSysClockFreq+0x448>
}
case RCC_CFGR_SWS_PLLR: /* PLL/PLLR used as system clock source */
{
/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
SYSCLK = PLL_VCO / PLLR */
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
8003b4c: 4b38 ldr r3, [pc, #224] @ (8003c30 <HAL_RCC_GetSysClockFreq+0x354>)
8003b4e: 685b ldr r3, [r3, #4]
8003b50: f003 033f and.w r3, r3, #63 @ 0x3f
8003b54: f8c7 30ac str.w r3, [r7, #172] @ 0xac
if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
8003b58: 4b35 ldr r3, [pc, #212] @ (8003c30 <HAL_RCC_GetSysClockFreq+0x354>)
8003b5a: 685b ldr r3, [r3, #4]
8003b5c: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8003b60: 2b00 cmp r3, #0
8003b62: d06b beq.n 8003c3c <HAL_RCC_GetSysClockFreq+0x360>
{
/* HSE used as PLL clock source */
pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8003b64: 4b32 ldr r3, [pc, #200] @ (8003c30 <HAL_RCC_GetSysClockFreq+0x354>)
8003b66: 685b ldr r3, [r3, #4]
8003b68: 099b lsrs r3, r3, #6
8003b6a: 2200 movs r2, #0
8003b6c: 66bb str r3, [r7, #104] @ 0x68
8003b6e: 66fa str r2, [r7, #108] @ 0x6c
8003b70: 6ebb ldr r3, [r7, #104] @ 0x68
8003b72: f3c3 0308 ubfx r3, r3, #0, #9
8003b76: 663b str r3, [r7, #96] @ 0x60
8003b78: 2300 movs r3, #0
8003b7a: 667b str r3, [r7, #100] @ 0x64
8003b7c: e9d7 4518 ldrd r4, r5, [r7, #96] @ 0x60
8003b80: 4622 mov r2, r4
8003b82: 462b mov r3, r5
8003b84: f04f 0000 mov.w r0, #0
8003b88: f04f 0100 mov.w r1, #0
8003b8c: 0159 lsls r1, r3, #5
8003b8e: ea41 61d2 orr.w r1, r1, r2, lsr #27
8003b92: 0150 lsls r0, r2, #5
8003b94: 4602 mov r2, r0
8003b96: 460b mov r3, r1
8003b98: 4621 mov r1, r4
8003b9a: 1a51 subs r1, r2, r1
8003b9c: 61b9 str r1, [r7, #24]
8003b9e: 4629 mov r1, r5
8003ba0: eb63 0301 sbc.w r3, r3, r1
8003ba4: 61fb str r3, [r7, #28]
8003ba6: f04f 0200 mov.w r2, #0
8003baa: f04f 0300 mov.w r3, #0
8003bae: e9d7 ab06 ldrd sl, fp, [r7, #24]
8003bb2: 4659 mov r1, fp
8003bb4: 018b lsls r3, r1, #6
8003bb6: 4651 mov r1, sl
8003bb8: ea43 6391 orr.w r3, r3, r1, lsr #26
8003bbc: 4651 mov r1, sl
8003bbe: 018a lsls r2, r1, #6
8003bc0: 4651 mov r1, sl
8003bc2: ebb2 0801 subs.w r8, r2, r1
8003bc6: 4659 mov r1, fp
8003bc8: eb63 0901 sbc.w r9, r3, r1
8003bcc: f04f 0200 mov.w r2, #0
8003bd0: f04f 0300 mov.w r3, #0
8003bd4: ea4f 03c9 mov.w r3, r9, lsl #3
8003bd8: ea43 7358 orr.w r3, r3, r8, lsr #29
8003bdc: ea4f 02c8 mov.w r2, r8, lsl #3
8003be0: 4690 mov r8, r2
8003be2: 4699 mov r9, r3
8003be4: 4623 mov r3, r4
8003be6: eb18 0303 adds.w r3, r8, r3
8003bea: 613b str r3, [r7, #16]
8003bec: 462b mov r3, r5
8003bee: eb49 0303 adc.w r3, r9, r3
8003bf2: 617b str r3, [r7, #20]
8003bf4: f04f 0200 mov.w r2, #0
8003bf8: f04f 0300 mov.w r3, #0
8003bfc: e9d7 4504 ldrd r4, r5, [r7, #16]
8003c00: 4629 mov r1, r5
8003c02: 024b lsls r3, r1, #9
8003c04: 4621 mov r1, r4
8003c06: ea43 53d1 orr.w r3, r3, r1, lsr #23
8003c0a: 4621 mov r1, r4
8003c0c: 024a lsls r2, r1, #9
8003c0e: 4610 mov r0, r2
8003c10: 4619 mov r1, r3
8003c12: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8003c16: 2200 movs r2, #0
8003c18: 65bb str r3, [r7, #88] @ 0x58
8003c1a: 65fa str r2, [r7, #92] @ 0x5c
8003c1c: e9d7 2316 ldrd r2, r3, [r7, #88] @ 0x58
8003c20: f7fc faf0 bl 8000204 <__aeabi_uldivmod>
8003c24: 4602 mov r2, r0
8003c26: 460b mov r3, r1
8003c28: 4613 mov r3, r2
8003c2a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8003c2e: e065 b.n 8003cfc <HAL_RCC_GetSysClockFreq+0x420>
8003c30: 40023800 .word 0x40023800
8003c34: 00f42400 .word 0x00f42400
8003c38: 007a1200 .word 0x007a1200
}
else
{
/* HSI used as PLL clock source */
pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm);
8003c3c: 4b3d ldr r3, [pc, #244] @ (8003d34 <HAL_RCC_GetSysClockFreq+0x458>)
8003c3e: 685b ldr r3, [r3, #4]
8003c40: 099b lsrs r3, r3, #6
8003c42: 2200 movs r2, #0
8003c44: 4618 mov r0, r3
8003c46: 4611 mov r1, r2
8003c48: f3c0 0308 ubfx r3, r0, #0, #9
8003c4c: 653b str r3, [r7, #80] @ 0x50
8003c4e: 2300 movs r3, #0
8003c50: 657b str r3, [r7, #84] @ 0x54
8003c52: e9d7 8914 ldrd r8, r9, [r7, #80] @ 0x50
8003c56: 4642 mov r2, r8
8003c58: 464b mov r3, r9
8003c5a: f04f 0000 mov.w r0, #0
8003c5e: f04f 0100 mov.w r1, #0
8003c62: 0159 lsls r1, r3, #5
8003c64: ea41 61d2 orr.w r1, r1, r2, lsr #27
8003c68: 0150 lsls r0, r2, #5
8003c6a: 4602 mov r2, r0
8003c6c: 460b mov r3, r1
8003c6e: 4641 mov r1, r8
8003c70: 1a51 subs r1, r2, r1
8003c72: 60b9 str r1, [r7, #8]
8003c74: 4649 mov r1, r9
8003c76: eb63 0301 sbc.w r3, r3, r1
8003c7a: 60fb str r3, [r7, #12]
8003c7c: f04f 0200 mov.w r2, #0
8003c80: f04f 0300 mov.w r3, #0
8003c84: e9d7 ab02 ldrd sl, fp, [r7, #8]
8003c88: 4659 mov r1, fp
8003c8a: 018b lsls r3, r1, #6
8003c8c: 4651 mov r1, sl
8003c8e: ea43 6391 orr.w r3, r3, r1, lsr #26
8003c92: 4651 mov r1, sl
8003c94: 018a lsls r2, r1, #6
8003c96: 4651 mov r1, sl
8003c98: 1a54 subs r4, r2, r1
8003c9a: 4659 mov r1, fp
8003c9c: eb63 0501 sbc.w r5, r3, r1
8003ca0: f04f 0200 mov.w r2, #0
8003ca4: f04f 0300 mov.w r3, #0
8003ca8: 00eb lsls r3, r5, #3
8003caa: ea43 7354 orr.w r3, r3, r4, lsr #29
8003cae: 00e2 lsls r2, r4, #3
8003cb0: 4614 mov r4, r2
8003cb2: 461d mov r5, r3
8003cb4: 4643 mov r3, r8
8003cb6: 18e3 adds r3, r4, r3
8003cb8: 603b str r3, [r7, #0]
8003cba: 464b mov r3, r9
8003cbc: eb45 0303 adc.w r3, r5, r3
8003cc0: 607b str r3, [r7, #4]
8003cc2: f04f 0200 mov.w r2, #0
8003cc6: f04f 0300 mov.w r3, #0
8003cca: e9d7 4500 ldrd r4, r5, [r7]
8003cce: 4629 mov r1, r5
8003cd0: 028b lsls r3, r1, #10
8003cd2: 4621 mov r1, r4
8003cd4: ea43 5391 orr.w r3, r3, r1, lsr #22
8003cd8: 4621 mov r1, r4
8003cda: 028a lsls r2, r1, #10
8003cdc: 4610 mov r0, r2
8003cde: 4619 mov r1, r3
8003ce0: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8003ce4: 2200 movs r2, #0
8003ce6: 64bb str r3, [r7, #72] @ 0x48
8003ce8: 64fa str r2, [r7, #76] @ 0x4c
8003cea: e9d7 2312 ldrd r2, r3, [r7, #72] @ 0x48
8003cee: f7fc fa89 bl 8000204 <__aeabi_uldivmod>
8003cf2: 4602 mov r2, r0
8003cf4: 460b mov r3, r1
8003cf6: 4613 mov r3, r2
8003cf8: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
}
pllr = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos);
8003cfc: 4b0d ldr r3, [pc, #52] @ (8003d34 <HAL_RCC_GetSysClockFreq+0x458>)
8003cfe: 685b ldr r3, [r3, #4]
8003d00: 0f1b lsrs r3, r3, #28
8003d02: f003 0307 and.w r3, r3, #7
8003d06: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
sysclockfreq = pllvco / pllr;
8003d0a: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4
8003d0e: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8003d12: fbb2 f3f3 udiv r3, r2, r3
8003d16: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
break;
8003d1a: e003 b.n 8003d24 <HAL_RCC_GetSysClockFreq+0x448>
}
default:
{
sysclockfreq = HSI_VALUE;
8003d1c: 4b06 ldr r3, [pc, #24] @ (8003d38 <HAL_RCC_GetSysClockFreq+0x45c>)
8003d1e: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
break;
8003d22: bf00 nop
}
}
return sysclockfreq;
8003d24: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
}
8003d28: 4618 mov r0, r3
8003d2a: 37b8 adds r7, #184 @ 0xb8
8003d2c: 46bd mov sp, r7
8003d2e: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
8003d32: bf00 nop
8003d34: 40023800 .word 0x40023800
8003d38: 00f42400 .word 0x00f42400
08003d3c <HAL_RCC_OscConfig>:
* @note This function add the PLL/PLLR factor management during PLL configuration this feature
* is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8003d3c: b580 push {r7, lr}
8003d3e: b086 sub sp, #24
8003d40: af00 add r7, sp, #0
8003d42: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
8003d44: 687b ldr r3, [r7, #4]
8003d46: 2b00 cmp r3, #0
8003d48: d101 bne.n 8003d4e <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8003d4a: 2301 movs r3, #1
8003d4c: e28d b.n 800426a <HAL_RCC_OscConfig+0x52e>
}
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8003d4e: 687b ldr r3, [r7, #4]
8003d50: 681b ldr r3, [r3, #0]
8003d52: f003 0301 and.w r3, r3, #1
8003d56: 2b00 cmp r3, #0
8003d58: f000 8083 beq.w 8003e62 <HAL_RCC_OscConfig+0x126>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */
#if defined(STM32F446xx)
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE)
8003d5c: 4b94 ldr r3, [pc, #592] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003d5e: 689b ldr r3, [r3, #8]
8003d60: f003 030c and.w r3, r3, #12
8003d64: 2b04 cmp r3, #4
8003d66: d019 beq.n 8003d9c <HAL_RCC_OscConfig+0x60>
|| \
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) || \
8003d68: 4b91 ldr r3, [pc, #580] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003d6a: 689b ldr r3, [r3, #8]
8003d6c: f003 030c and.w r3, r3, #12
|| \
8003d70: 2b08 cmp r3, #8
8003d72: d106 bne.n 8003d82 <HAL_RCC_OscConfig+0x46>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) || \
8003d74: 4b8e ldr r3, [pc, #568] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003d76: 685b ldr r3, [r3, #4]
8003d78: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8003d7c: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
8003d80: d00c beq.n 8003d9c <HAL_RCC_OscConfig+0x60>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
8003d82: 4b8b ldr r3, [pc, #556] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003d84: 689b ldr r3, [r3, #8]
8003d86: f003 030c and.w r3, r3, #12
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) || \
8003d8a: 2b0c cmp r3, #12
8003d8c: d112 bne.n 8003db4 <HAL_RCC_OscConfig+0x78>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
8003d8e: 4b88 ldr r3, [pc, #544] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003d90: 685b ldr r3, [r3, #4]
8003d92: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8003d96: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000
8003d9a: d10b bne.n 8003db4 <HAL_RCC_OscConfig+0x78>
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE)
|| \
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)))
#endif /* STM32F446xx */
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8003d9c: 4b84 ldr r3, [pc, #528] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003d9e: 681b ldr r3, [r3, #0]
8003da0: f403 3300 and.w r3, r3, #131072 @ 0x20000
8003da4: 2b00 cmp r3, #0
8003da6: d05b beq.n 8003e60 <HAL_RCC_OscConfig+0x124>
8003da8: 687b ldr r3, [r7, #4]
8003daa: 685b ldr r3, [r3, #4]
8003dac: 2b00 cmp r3, #0
8003dae: d157 bne.n 8003e60 <HAL_RCC_OscConfig+0x124>
{
return HAL_ERROR;
8003db0: 2301 movs r3, #1
8003db2: e25a b.n 800426a <HAL_RCC_OscConfig+0x52e>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8003db4: 687b ldr r3, [r7, #4]
8003db6: 685b ldr r3, [r3, #4]
8003db8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8003dbc: d106 bne.n 8003dcc <HAL_RCC_OscConfig+0x90>
8003dbe: 4b7c ldr r3, [pc, #496] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003dc0: 681b ldr r3, [r3, #0]
8003dc2: 4a7b ldr r2, [pc, #492] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003dc4: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8003dc8: 6013 str r3, [r2, #0]
8003dca: e01d b.n 8003e08 <HAL_RCC_OscConfig+0xcc>
8003dcc: 687b ldr r3, [r7, #4]
8003dce: 685b ldr r3, [r3, #4]
8003dd0: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
8003dd4: d10c bne.n 8003df0 <HAL_RCC_OscConfig+0xb4>
8003dd6: 4b76 ldr r3, [pc, #472] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003dd8: 681b ldr r3, [r3, #0]
8003dda: 4a75 ldr r2, [pc, #468] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003ddc: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8003de0: 6013 str r3, [r2, #0]
8003de2: 4b73 ldr r3, [pc, #460] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003de4: 681b ldr r3, [r3, #0]
8003de6: 4a72 ldr r2, [pc, #456] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003de8: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8003dec: 6013 str r3, [r2, #0]
8003dee: e00b b.n 8003e08 <HAL_RCC_OscConfig+0xcc>
8003df0: 4b6f ldr r3, [pc, #444] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003df2: 681b ldr r3, [r3, #0]
8003df4: 4a6e ldr r2, [pc, #440] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003df6: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8003dfa: 6013 str r3, [r2, #0]
8003dfc: 4b6c ldr r3, [pc, #432] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003dfe: 681b ldr r3, [r3, #0]
8003e00: 4a6b ldr r2, [pc, #428] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003e02: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8003e06: 6013 str r3, [r2, #0]
/* Check the HSE State */
if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF)
8003e08: 687b ldr r3, [r7, #4]
8003e0a: 685b ldr r3, [r3, #4]
8003e0c: 2b00 cmp r3, #0
8003e0e: d013 beq.n 8003e38 <HAL_RCC_OscConfig+0xfc>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
8003e10: f7fd fa4e bl 80012b0 <HAL_GetTick>
8003e14: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8003e16: e008 b.n 8003e2a <HAL_RCC_OscConfig+0xee>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8003e18: f7fd fa4a bl 80012b0 <HAL_GetTick>
8003e1c: 4602 mov r2, r0
8003e1e: 693b ldr r3, [r7, #16]
8003e20: 1ad3 subs r3, r2, r3
8003e22: 2b64 cmp r3, #100 @ 0x64
8003e24: d901 bls.n 8003e2a <HAL_RCC_OscConfig+0xee>
{
return HAL_TIMEOUT;
8003e26: 2303 movs r3, #3
8003e28: e21f b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8003e2a: 4b61 ldr r3, [pc, #388] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003e2c: 681b ldr r3, [r3, #0]
8003e2e: f403 3300 and.w r3, r3, #131072 @ 0x20000
8003e32: 2b00 cmp r3, #0
8003e34: d0f0 beq.n 8003e18 <HAL_RCC_OscConfig+0xdc>
8003e36: e014 b.n 8003e62 <HAL_RCC_OscConfig+0x126>
}
}
else
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
8003e38: f7fd fa3a bl 80012b0 <HAL_GetTick>
8003e3c: 6138 str r0, [r7, #16]
/* Wait till HSE is bypassed or disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8003e3e: e008 b.n 8003e52 <HAL_RCC_OscConfig+0x116>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8003e40: f7fd fa36 bl 80012b0 <HAL_GetTick>
8003e44: 4602 mov r2, r0
8003e46: 693b ldr r3, [r7, #16]
8003e48: 1ad3 subs r3, r2, r3
8003e4a: 2b64 cmp r3, #100 @ 0x64
8003e4c: d901 bls.n 8003e52 <HAL_RCC_OscConfig+0x116>
{
return HAL_TIMEOUT;
8003e4e: 2303 movs r3, #3
8003e50: e20b b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8003e52: 4b57 ldr r3, [pc, #348] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003e54: 681b ldr r3, [r3, #0]
8003e56: f403 3300 and.w r3, r3, #131072 @ 0x20000
8003e5a: 2b00 cmp r3, #0
8003e5c: d1f0 bne.n 8003e40 <HAL_RCC_OscConfig+0x104>
8003e5e: e000 b.n 8003e62 <HAL_RCC_OscConfig+0x126>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8003e60: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8003e62: 687b ldr r3, [r7, #4]
8003e64: 681b ldr r3, [r3, #0]
8003e66: f003 0302 and.w r3, r3, #2
8003e6a: 2b00 cmp r3, #0
8003e6c: d06f beq.n 8003f4e <HAL_RCC_OscConfig+0x212>
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
#if defined(STM32F446xx)
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI)
8003e6e: 4b50 ldr r3, [pc, #320] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003e70: 689b ldr r3, [r3, #8]
8003e72: f003 030c and.w r3, r3, #12
8003e76: 2b00 cmp r3, #0
8003e78: d017 beq.n 8003eaa <HAL_RCC_OscConfig+0x16e>
|| \
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) || \
8003e7a: 4b4d ldr r3, [pc, #308] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003e7c: 689b ldr r3, [r3, #8]
8003e7e: f003 030c and.w r3, r3, #12
|| \
8003e82: 2b08 cmp r3, #8
8003e84: d105 bne.n 8003e92 <HAL_RCC_OscConfig+0x156>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) || \
8003e86: 4b4a ldr r3, [pc, #296] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003e88: 685b ldr r3, [r3, #4]
8003e8a: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8003e8e: 2b00 cmp r3, #0
8003e90: d00b beq.n 8003eaa <HAL_RCC_OscConfig+0x16e>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
8003e92: 4b47 ldr r3, [pc, #284] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003e94: 689b ldr r3, [r3, #8]
8003e96: f003 030c and.w r3, r3, #12
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) || \
8003e9a: 2b0c cmp r3, #12
8003e9c: d11c bne.n 8003ed8 <HAL_RCC_OscConfig+0x19c>
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
8003e9e: 4b44 ldr r3, [pc, #272] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003ea0: 685b ldr r3, [r3, #4]
8003ea2: f403 0380 and.w r3, r3, #4194304 @ 0x400000
8003ea6: 2b00 cmp r3, #0
8003ea8: d116 bne.n 8003ed8 <HAL_RCC_OscConfig+0x19c>
|| \
((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)))
#endif /* STM32F446xx */
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8003eaa: 4b41 ldr r3, [pc, #260] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003eac: 681b ldr r3, [r3, #0]
8003eae: f003 0302 and.w r3, r3, #2
8003eb2: 2b00 cmp r3, #0
8003eb4: d005 beq.n 8003ec2 <HAL_RCC_OscConfig+0x186>
8003eb6: 687b ldr r3, [r7, #4]
8003eb8: 68db ldr r3, [r3, #12]
8003eba: 2b01 cmp r3, #1
8003ebc: d001 beq.n 8003ec2 <HAL_RCC_OscConfig+0x186>
{
return HAL_ERROR;
8003ebe: 2301 movs r3, #1
8003ec0: e1d3 b.n 800426a <HAL_RCC_OscConfig+0x52e>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8003ec2: 4b3b ldr r3, [pc, #236] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003ec4: 681b ldr r3, [r3, #0]
8003ec6: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8003eca: 687b ldr r3, [r7, #4]
8003ecc: 691b ldr r3, [r3, #16]
8003ece: 00db lsls r3, r3, #3
8003ed0: 4937 ldr r1, [pc, #220] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003ed2: 4313 orrs r3, r2
8003ed4: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8003ed6: e03a b.n 8003f4e <HAL_RCC_OscConfig+0x212>
}
}
else
{
/* Check the HSI State */
if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF)
8003ed8: 687b ldr r3, [r7, #4]
8003eda: 68db ldr r3, [r3, #12]
8003edc: 2b00 cmp r3, #0
8003ede: d020 beq.n 8003f22 <HAL_RCC_OscConfig+0x1e6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8003ee0: 4b34 ldr r3, [pc, #208] @ (8003fb4 <HAL_RCC_OscConfig+0x278>)
8003ee2: 2201 movs r2, #1
8003ee4: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8003ee6: f7fd f9e3 bl 80012b0 <HAL_GetTick>
8003eea: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003eec: e008 b.n 8003f00 <HAL_RCC_OscConfig+0x1c4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8003eee: f7fd f9df bl 80012b0 <HAL_GetTick>
8003ef2: 4602 mov r2, r0
8003ef4: 693b ldr r3, [r7, #16]
8003ef6: 1ad3 subs r3, r2, r3
8003ef8: 2b02 cmp r3, #2
8003efa: d901 bls.n 8003f00 <HAL_RCC_OscConfig+0x1c4>
{
return HAL_TIMEOUT;
8003efc: 2303 movs r3, #3
8003efe: e1b4 b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003f00: 4b2b ldr r3, [pc, #172] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003f02: 681b ldr r3, [r3, #0]
8003f04: f003 0302 and.w r3, r3, #2
8003f08: 2b00 cmp r3, #0
8003f0a: d0f0 beq.n 8003eee <HAL_RCC_OscConfig+0x1b2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8003f0c: 4b28 ldr r3, [pc, #160] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003f0e: 681b ldr r3, [r3, #0]
8003f10: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8003f14: 687b ldr r3, [r7, #4]
8003f16: 691b ldr r3, [r3, #16]
8003f18: 00db lsls r3, r3, #3
8003f1a: 4925 ldr r1, [pc, #148] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003f1c: 4313 orrs r3, r2
8003f1e: 600b str r3, [r1, #0]
8003f20: e015 b.n 8003f4e <HAL_RCC_OscConfig+0x212>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8003f22: 4b24 ldr r3, [pc, #144] @ (8003fb4 <HAL_RCC_OscConfig+0x278>)
8003f24: 2200 movs r2, #0
8003f26: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8003f28: f7fd f9c2 bl 80012b0 <HAL_GetTick>
8003f2c: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8003f2e: e008 b.n 8003f42 <HAL_RCC_OscConfig+0x206>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8003f30: f7fd f9be bl 80012b0 <HAL_GetTick>
8003f34: 4602 mov r2, r0
8003f36: 693b ldr r3, [r7, #16]
8003f38: 1ad3 subs r3, r2, r3
8003f3a: 2b02 cmp r3, #2
8003f3c: d901 bls.n 8003f42 <HAL_RCC_OscConfig+0x206>
{
return HAL_TIMEOUT;
8003f3e: 2303 movs r3, #3
8003f40: e193 b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8003f42: 4b1b ldr r3, [pc, #108] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003f44: 681b ldr r3, [r3, #0]
8003f46: f003 0302 and.w r3, r3, #2
8003f4a: 2b00 cmp r3, #0
8003f4c: d1f0 bne.n 8003f30 <HAL_RCC_OscConfig+0x1f4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8003f4e: 687b ldr r3, [r7, #4]
8003f50: 681b ldr r3, [r3, #0]
8003f52: f003 0308 and.w r3, r3, #8
8003f56: 2b00 cmp r3, #0
8003f58: d036 beq.n 8003fc8 <HAL_RCC_OscConfig+0x28c>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF)
8003f5a: 687b ldr r3, [r7, #4]
8003f5c: 695b ldr r3, [r3, #20]
8003f5e: 2b00 cmp r3, #0
8003f60: d016 beq.n 8003f90 <HAL_RCC_OscConfig+0x254>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8003f62: 4b15 ldr r3, [pc, #84] @ (8003fb8 <HAL_RCC_OscConfig+0x27c>)
8003f64: 2201 movs r2, #1
8003f66: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8003f68: f7fd f9a2 bl 80012b0 <HAL_GetTick>
8003f6c: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8003f6e: e008 b.n 8003f82 <HAL_RCC_OscConfig+0x246>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8003f70: f7fd f99e bl 80012b0 <HAL_GetTick>
8003f74: 4602 mov r2, r0
8003f76: 693b ldr r3, [r7, #16]
8003f78: 1ad3 subs r3, r2, r3
8003f7a: 2b02 cmp r3, #2
8003f7c: d901 bls.n 8003f82 <HAL_RCC_OscConfig+0x246>
{
return HAL_TIMEOUT;
8003f7e: 2303 movs r3, #3
8003f80: e173 b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8003f82: 4b0b ldr r3, [pc, #44] @ (8003fb0 <HAL_RCC_OscConfig+0x274>)
8003f84: 6f5b ldr r3, [r3, #116] @ 0x74
8003f86: f003 0302 and.w r3, r3, #2
8003f8a: 2b00 cmp r3, #0
8003f8c: d0f0 beq.n 8003f70 <HAL_RCC_OscConfig+0x234>
8003f8e: e01b b.n 8003fc8 <HAL_RCC_OscConfig+0x28c>
}
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8003f90: 4b09 ldr r3, [pc, #36] @ (8003fb8 <HAL_RCC_OscConfig+0x27c>)
8003f92: 2200 movs r2, #0
8003f94: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8003f96: f7fd f98b bl 80012b0 <HAL_GetTick>
8003f9a: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8003f9c: e00e b.n 8003fbc <HAL_RCC_OscConfig+0x280>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8003f9e: f7fd f987 bl 80012b0 <HAL_GetTick>
8003fa2: 4602 mov r2, r0
8003fa4: 693b ldr r3, [r7, #16]
8003fa6: 1ad3 subs r3, r2, r3
8003fa8: 2b02 cmp r3, #2
8003faa: d907 bls.n 8003fbc <HAL_RCC_OscConfig+0x280>
{
return HAL_TIMEOUT;
8003fac: 2303 movs r3, #3
8003fae: e15c b.n 800426a <HAL_RCC_OscConfig+0x52e>
8003fb0: 40023800 .word 0x40023800
8003fb4: 42470000 .word 0x42470000
8003fb8: 42470e80 .word 0x42470e80
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8003fbc: 4b8a ldr r3, [pc, #552] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8003fbe: 6f5b ldr r3, [r3, #116] @ 0x74
8003fc0: f003 0302 and.w r3, r3, #2
8003fc4: 2b00 cmp r3, #0
8003fc6: d1ea bne.n 8003f9e <HAL_RCC_OscConfig+0x262>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8003fc8: 687b ldr r3, [r7, #4]
8003fca: 681b ldr r3, [r3, #0]
8003fcc: f003 0304 and.w r3, r3, #4
8003fd0: 2b00 cmp r3, #0
8003fd2: f000 8097 beq.w 8004104 <HAL_RCC_OscConfig+0x3c8>
{
FlagStatus pwrclkchanged = RESET;
8003fd6: 2300 movs r3, #0
8003fd8: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8003fda: 4b83 ldr r3, [pc, #524] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8003fdc: 6c1b ldr r3, [r3, #64] @ 0x40
8003fde: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8003fe2: 2b00 cmp r3, #0
8003fe4: d10f bne.n 8004006 <HAL_RCC_OscConfig+0x2ca>
{
__HAL_RCC_PWR_CLK_ENABLE();
8003fe6: 2300 movs r3, #0
8003fe8: 60bb str r3, [r7, #8]
8003fea: 4b7f ldr r3, [pc, #508] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8003fec: 6c1b ldr r3, [r3, #64] @ 0x40
8003fee: 4a7e ldr r2, [pc, #504] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8003ff0: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8003ff4: 6413 str r3, [r2, #64] @ 0x40
8003ff6: 4b7c ldr r3, [pc, #496] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8003ff8: 6c1b ldr r3, [r3, #64] @ 0x40
8003ffa: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8003ffe: 60bb str r3, [r7, #8]
8004000: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8004002: 2301 movs r3, #1
8004004: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004006: 4b79 ldr r3, [pc, #484] @ (80041ec <HAL_RCC_OscConfig+0x4b0>)
8004008: 681b ldr r3, [r3, #0]
800400a: f403 7380 and.w r3, r3, #256 @ 0x100
800400e: 2b00 cmp r3, #0
8004010: d118 bne.n 8004044 <HAL_RCC_OscConfig+0x308>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8004012: 4b76 ldr r3, [pc, #472] @ (80041ec <HAL_RCC_OscConfig+0x4b0>)
8004014: 681b ldr r3, [r3, #0]
8004016: 4a75 ldr r2, [pc, #468] @ (80041ec <HAL_RCC_OscConfig+0x4b0>)
8004018: f443 7380 orr.w r3, r3, #256 @ 0x100
800401c: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800401e: f7fd f947 bl 80012b0 <HAL_GetTick>
8004022: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004024: e008 b.n 8004038 <HAL_RCC_OscConfig+0x2fc>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8004026: f7fd f943 bl 80012b0 <HAL_GetTick>
800402a: 4602 mov r2, r0
800402c: 693b ldr r3, [r7, #16]
800402e: 1ad3 subs r3, r2, r3
8004030: 2b02 cmp r3, #2
8004032: d901 bls.n 8004038 <HAL_RCC_OscConfig+0x2fc>
{
return HAL_TIMEOUT;
8004034: 2303 movs r3, #3
8004036: e118 b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004038: 4b6c ldr r3, [pc, #432] @ (80041ec <HAL_RCC_OscConfig+0x4b0>)
800403a: 681b ldr r3, [r3, #0]
800403c: f403 7380 and.w r3, r3, #256 @ 0x100
8004040: 2b00 cmp r3, #0
8004042: d0f0 beq.n 8004026 <HAL_RCC_OscConfig+0x2ea>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8004044: 687b ldr r3, [r7, #4]
8004046: 689b ldr r3, [r3, #8]
8004048: 2b01 cmp r3, #1
800404a: d106 bne.n 800405a <HAL_RCC_OscConfig+0x31e>
800404c: 4b66 ldr r3, [pc, #408] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
800404e: 6f1b ldr r3, [r3, #112] @ 0x70
8004050: 4a65 ldr r2, [pc, #404] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8004052: f043 0301 orr.w r3, r3, #1
8004056: 6713 str r3, [r2, #112] @ 0x70
8004058: e01c b.n 8004094 <HAL_RCC_OscConfig+0x358>
800405a: 687b ldr r3, [r7, #4]
800405c: 689b ldr r3, [r3, #8]
800405e: 2b05 cmp r3, #5
8004060: d10c bne.n 800407c <HAL_RCC_OscConfig+0x340>
8004062: 4b61 ldr r3, [pc, #388] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8004064: 6f1b ldr r3, [r3, #112] @ 0x70
8004066: 4a60 ldr r2, [pc, #384] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8004068: f043 0304 orr.w r3, r3, #4
800406c: 6713 str r3, [r2, #112] @ 0x70
800406e: 4b5e ldr r3, [pc, #376] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8004070: 6f1b ldr r3, [r3, #112] @ 0x70
8004072: 4a5d ldr r2, [pc, #372] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8004074: f043 0301 orr.w r3, r3, #1
8004078: 6713 str r3, [r2, #112] @ 0x70
800407a: e00b b.n 8004094 <HAL_RCC_OscConfig+0x358>
800407c: 4b5a ldr r3, [pc, #360] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
800407e: 6f1b ldr r3, [r3, #112] @ 0x70
8004080: 4a59 ldr r2, [pc, #356] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8004082: f023 0301 bic.w r3, r3, #1
8004086: 6713 str r3, [r2, #112] @ 0x70
8004088: 4b57 ldr r3, [pc, #348] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
800408a: 6f1b ldr r3, [r3, #112] @ 0x70
800408c: 4a56 ldr r2, [pc, #344] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
800408e: f023 0304 bic.w r3, r3, #4
8004092: 6713 str r3, [r2, #112] @ 0x70
/* Check the LSE State */
if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF)
8004094: 687b ldr r3, [r7, #4]
8004096: 689b ldr r3, [r3, #8]
8004098: 2b00 cmp r3, #0
800409a: d015 beq.n 80040c8 <HAL_RCC_OscConfig+0x38c>
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
800409c: f7fd f908 bl 80012b0 <HAL_GetTick>
80040a0: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80040a2: e00a b.n 80040ba <HAL_RCC_OscConfig+0x37e>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
80040a4: f7fd f904 bl 80012b0 <HAL_GetTick>
80040a8: 4602 mov r2, r0
80040aa: 693b ldr r3, [r7, #16]
80040ac: 1ad3 subs r3, r2, r3
80040ae: f241 3288 movw r2, #5000 @ 0x1388
80040b2: 4293 cmp r3, r2
80040b4: d901 bls.n 80040ba <HAL_RCC_OscConfig+0x37e>
{
return HAL_TIMEOUT;
80040b6: 2303 movs r3, #3
80040b8: e0d7 b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80040ba: 4b4b ldr r3, [pc, #300] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
80040bc: 6f1b ldr r3, [r3, #112] @ 0x70
80040be: f003 0302 and.w r3, r3, #2
80040c2: 2b00 cmp r3, #0
80040c4: d0ee beq.n 80040a4 <HAL_RCC_OscConfig+0x368>
80040c6: e014 b.n 80040f2 <HAL_RCC_OscConfig+0x3b6>
}
}
else
{
/* Get Start Tick*/
tickstart = HAL_GetTick();
80040c8: f7fd f8f2 bl 80012b0 <HAL_GetTick>
80040cc: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
80040ce: e00a b.n 80040e6 <HAL_RCC_OscConfig+0x3aa>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
80040d0: f7fd f8ee bl 80012b0 <HAL_GetTick>
80040d4: 4602 mov r2, r0
80040d6: 693b ldr r3, [r7, #16]
80040d8: 1ad3 subs r3, r2, r3
80040da: f241 3288 movw r2, #5000 @ 0x1388
80040de: 4293 cmp r3, r2
80040e0: d901 bls.n 80040e6 <HAL_RCC_OscConfig+0x3aa>
{
return HAL_TIMEOUT;
80040e2: 2303 movs r3, #3
80040e4: e0c1 b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
80040e6: 4b40 ldr r3, [pc, #256] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
80040e8: 6f1b ldr r3, [r3, #112] @ 0x70
80040ea: f003 0302 and.w r3, r3, #2
80040ee: 2b00 cmp r3, #0
80040f0: d1ee bne.n 80040d0 <HAL_RCC_OscConfig+0x394>
}
}
}
/* Restore clock configuration if changed */
if (pwrclkchanged == SET)
80040f2: 7dfb ldrb r3, [r7, #23]
80040f4: 2b01 cmp r3, #1
80040f6: d105 bne.n 8004104 <HAL_RCC_OscConfig+0x3c8>
{
__HAL_RCC_PWR_CLK_DISABLE();
80040f8: 4b3b ldr r3, [pc, #236] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
80040fa: 6c1b ldr r3, [r3, #64] @ 0x40
80040fc: 4a3a ldr r2, [pc, #232] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
80040fe: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8004102: 6413 str r3, [r2, #64] @ 0x40
}
}
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8004104: 687b ldr r3, [r7, #4]
8004106: 699b ldr r3, [r3, #24]
8004108: 2b00 cmp r3, #0
800410a: f000 80ad beq.w 8004268 <HAL_RCC_OscConfig+0x52c>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL)
800410e: 4b36 ldr r3, [pc, #216] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8004110: 689b ldr r3, [r3, #8]
8004112: f003 030c and.w r3, r3, #12
8004116: 2b08 cmp r3, #8
8004118: d060 beq.n 80041dc <HAL_RCC_OscConfig+0x4a0>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
800411a: 687b ldr r3, [r7, #4]
800411c: 699b ldr r3, [r3, #24]
800411e: 2b02 cmp r3, #2
8004120: d145 bne.n 80041ae <HAL_RCC_OscConfig+0x472>
assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP));
assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ));
assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8004122: 4b33 ldr r3, [pc, #204] @ (80041f0 <HAL_RCC_OscConfig+0x4b4>)
8004124: 2200 movs r2, #0
8004126: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8004128: f7fd f8c2 bl 80012b0 <HAL_GetTick>
800412c: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800412e: e008 b.n 8004142 <HAL_RCC_OscConfig+0x406>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8004130: f7fd f8be bl 80012b0 <HAL_GetTick>
8004134: 4602 mov r2, r0
8004136: 693b ldr r3, [r7, #16]
8004138: 1ad3 subs r3, r2, r3
800413a: 2b02 cmp r3, #2
800413c: d901 bls.n 8004142 <HAL_RCC_OscConfig+0x406>
{
return HAL_TIMEOUT;
800413e: 2303 movs r3, #3
8004140: e093 b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004142: 4b29 ldr r3, [pc, #164] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
8004144: 681b ldr r3, [r3, #0]
8004146: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800414a: 2b00 cmp r3, #0
800414c: d1f0 bne.n 8004130 <HAL_RCC_OscConfig+0x3f4>
}
}
/* Configure the main PLL clock source, multiplication and division factors. */
WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \
800414e: 687b ldr r3, [r7, #4]
8004150: 69da ldr r2, [r3, #28]
8004152: 687b ldr r3, [r7, #4]
8004154: 6a1b ldr r3, [r3, #32]
8004156: 431a orrs r2, r3
8004158: 687b ldr r3, [r7, #4]
800415a: 6a5b ldr r3, [r3, #36] @ 0x24
800415c: 019b lsls r3, r3, #6
800415e: 431a orrs r2, r3
8004160: 687b ldr r3, [r7, #4]
8004162: 6a9b ldr r3, [r3, #40] @ 0x28
8004164: 085b lsrs r3, r3, #1
8004166: 3b01 subs r3, #1
8004168: 041b lsls r3, r3, #16
800416a: 431a orrs r2, r3
800416c: 687b ldr r3, [r7, #4]
800416e: 6adb ldr r3, [r3, #44] @ 0x2c
8004170: 061b lsls r3, r3, #24
8004172: 431a orrs r2, r3
8004174: 687b ldr r3, [r7, #4]
8004176: 6b1b ldr r3, [r3, #48] @ 0x30
8004178: 071b lsls r3, r3, #28
800417a: 491b ldr r1, [pc, #108] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
800417c: 4313 orrs r3, r2
800417e: 604b str r3, [r1, #4]
(RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \
(((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \
(RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos) | \
(RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)));
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8004180: 4b1b ldr r3, [pc, #108] @ (80041f0 <HAL_RCC_OscConfig+0x4b4>)
8004182: 2201 movs r2, #1
8004184: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
8004186: f7fd f893 bl 80012b0 <HAL_GetTick>
800418a: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800418c: e008 b.n 80041a0 <HAL_RCC_OscConfig+0x464>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800418e: f7fd f88f bl 80012b0 <HAL_GetTick>
8004192: 4602 mov r2, r0
8004194: 693b ldr r3, [r7, #16]
8004196: 1ad3 subs r3, r2, r3
8004198: 2b02 cmp r3, #2
800419a: d901 bls.n 80041a0 <HAL_RCC_OscConfig+0x464>
{
return HAL_TIMEOUT;
800419c: 2303 movs r3, #3
800419e: e064 b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80041a0: 4b11 ldr r3, [pc, #68] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
80041a2: 681b ldr r3, [r3, #0]
80041a4: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80041a8: 2b00 cmp r3, #0
80041aa: d0f0 beq.n 800418e <HAL_RCC_OscConfig+0x452>
80041ac: e05c b.n 8004268 <HAL_RCC_OscConfig+0x52c>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80041ae: 4b10 ldr r3, [pc, #64] @ (80041f0 <HAL_RCC_OscConfig+0x4b4>)
80041b0: 2200 movs r2, #0
80041b2: 601a str r2, [r3, #0]
/* Get Start Tick*/
tickstart = HAL_GetTick();
80041b4: f7fd f87c bl 80012b0 <HAL_GetTick>
80041b8: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80041ba: e008 b.n 80041ce <HAL_RCC_OscConfig+0x492>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80041bc: f7fd f878 bl 80012b0 <HAL_GetTick>
80041c0: 4602 mov r2, r0
80041c2: 693b ldr r3, [r7, #16]
80041c4: 1ad3 subs r3, r2, r3
80041c6: 2b02 cmp r3, #2
80041c8: d901 bls.n 80041ce <HAL_RCC_OscConfig+0x492>
{
return HAL_TIMEOUT;
80041ca: 2303 movs r3, #3
80041cc: e04d b.n 800426a <HAL_RCC_OscConfig+0x52e>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80041ce: 4b06 ldr r3, [pc, #24] @ (80041e8 <HAL_RCC_OscConfig+0x4ac>)
80041d0: 681b ldr r3, [r3, #0]
80041d2: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80041d6: 2b00 cmp r3, #0
80041d8: d1f0 bne.n 80041bc <HAL_RCC_OscConfig+0x480>
80041da: e045 b.n 8004268 <HAL_RCC_OscConfig+0x52c>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
80041dc: 687b ldr r3, [r7, #4]
80041de: 699b ldr r3, [r3, #24]
80041e0: 2b01 cmp r3, #1
80041e2: d107 bne.n 80041f4 <HAL_RCC_OscConfig+0x4b8>
{
return HAL_ERROR;
80041e4: 2301 movs r3, #1
80041e6: e040 b.n 800426a <HAL_RCC_OscConfig+0x52e>
80041e8: 40023800 .word 0x40023800
80041ec: 40007000 .word 0x40007000
80041f0: 42470060 .word 0x42470060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->PLLCFGR;
80041f4: 4b1f ldr r3, [pc, #124] @ (8004274 <HAL_RCC_OscConfig+0x538>)
80041f6: 685b ldr r3, [r3, #4]
80041f8: 60fb str r3, [r7, #12]
#if defined (RCC_PLLCFGR_PLLR)
if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
80041fa: 687b ldr r3, [r7, #4]
80041fc: 699b ldr r3, [r3, #24]
80041fe: 2b01 cmp r3, #1
8004200: d030 beq.n 8004264 <HAL_RCC_OscConfig+0x528>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8004202: 68fb ldr r3, [r7, #12]
8004204: f403 0280 and.w r2, r3, #4194304 @ 0x400000
8004208: 687b ldr r3, [r7, #4]
800420a: 69db ldr r3, [r3, #28]
if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
800420c: 429a cmp r2, r3
800420e: d129 bne.n 8004264 <HAL_RCC_OscConfig+0x528>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
8004210: 68fb ldr r3, [r7, #12]
8004212: f003 023f and.w r2, r3, #63 @ 0x3f
8004216: 687b ldr r3, [r7, #4]
8004218: 6a1b ldr r3, [r3, #32]
(READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800421a: 429a cmp r2, r3
800421c: d122 bne.n 8004264 <HAL_RCC_OscConfig+0x528>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
800421e: 68fa ldr r2, [r7, #12]
8004220: f647 73c0 movw r3, #32704 @ 0x7fc0
8004224: 4013 ands r3, r2
8004226: 687a ldr r2, [r7, #4]
8004228: 6a52 ldr r2, [r2, #36] @ 0x24
800422a: 0192 lsls r2, r2, #6
(READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) ||
800422c: 4293 cmp r3, r2
800422e: d119 bne.n 8004264 <HAL_RCC_OscConfig+0x528>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
8004230: 68fb ldr r3, [r7, #12]
8004232: f403 3240 and.w r2, r3, #196608 @ 0x30000
8004236: 687b ldr r3, [r7, #4]
8004238: 6a9b ldr r3, [r3, #40] @ 0x28
800423a: 085b lsrs r3, r3, #1
800423c: 3b01 subs r3, #1
800423e: 041b lsls r3, r3, #16
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
8004240: 429a cmp r2, r3
8004242: d10f bne.n 8004264 <HAL_RCC_OscConfig+0x528>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) ||
8004244: 68fb ldr r3, [r7, #12]
8004246: f003 6270 and.w r2, r3, #251658240 @ 0xf000000
800424a: 687b ldr r3, [r7, #4]
800424c: 6adb ldr r3, [r3, #44] @ 0x2c
800424e: 061b lsls r3, r3, #24
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
8004250: 429a cmp r2, r3
8004252: d107 bne.n 8004264 <HAL_RCC_OscConfig+0x528>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos)))
8004254: 68fb ldr r3, [r7, #12]
8004256: f003 42e0 and.w r2, r3, #1879048192 @ 0x70000000
800425a: 687b ldr r3, [r7, #4]
800425c: 6b1b ldr r3, [r3, #48] @ 0x30
800425e: 071b lsls r3, r3, #28
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) ||
8004260: 429a cmp r2, r3
8004262: d001 beq.n 8004268 <HAL_RCC_OscConfig+0x52c>
(READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) ||
(READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) ||
(READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)))
#endif /* RCC_PLLCFGR_PLLR */
{
return HAL_ERROR;
8004264: 2301 movs r3, #1
8004266: e000 b.n 800426a <HAL_RCC_OscConfig+0x52e>
}
}
}
}
return HAL_OK;
8004268: 2300 movs r3, #0
}
800426a: 4618 mov r0, r3
800426c: 3718 adds r7, #24
800426e: 46bd mov sp, r7
8004270: bd80 pop {r7, pc}
8004272: bf00 nop
8004274: 40023800 .word 0x40023800
08004278 <HAL_TIM_OC_Init>:
* Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init()
* @param htim TIM Output Compare handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim)
{
8004278: b580 push {r7, lr}
800427a: b082 sub sp, #8
800427c: af00 add r7, sp, #0
800427e: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8004280: 687b ldr r3, [r7, #4]
8004282: 2b00 cmp r3, #0
8004284: d101 bne.n 800428a <HAL_TIM_OC_Init+0x12>
{
return HAL_ERROR;
8004286: 2301 movs r3, #1
8004288: e041 b.n 800430e <HAL_TIM_OC_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
800428a: 687b ldr r3, [r7, #4]
800428c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8004290: b2db uxtb r3, r3
8004292: 2b00 cmp r3, #0
8004294: d106 bne.n 80042a4 <HAL_TIM_OC_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8004296: 687b ldr r3, [r7, #4]
8004298: 2200 movs r2, #0
800429a: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->OC_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_OC_MspInit(htim);
800429e: 6878 ldr r0, [r7, #4]
80042a0: f7fc fd4e bl 8000d40 <HAL_TIM_OC_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
80042a4: 687b ldr r3, [r7, #4]
80042a6: 2202 movs r2, #2
80042a8: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the Output Compare */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
80042ac: 687b ldr r3, [r7, #4]
80042ae: 681a ldr r2, [r3, #0]
80042b0: 687b ldr r3, [r7, #4]
80042b2: 3304 adds r3, #4
80042b4: 4619 mov r1, r3
80042b6: 4610 mov r0, r2
80042b8: f000 f930 bl 800451c <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
80042bc: 687b ldr r3, [r7, #4]
80042be: 2201 movs r2, #1
80042c0: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
80042c4: 687b ldr r3, [r7, #4]
80042c6: 2201 movs r2, #1
80042c8: f883 203e strb.w r2, [r3, #62] @ 0x3e
80042cc: 687b ldr r3, [r7, #4]
80042ce: 2201 movs r2, #1
80042d0: f883 203f strb.w r2, [r3, #63] @ 0x3f
80042d4: 687b ldr r3, [r7, #4]
80042d6: 2201 movs r2, #1
80042d8: f883 2040 strb.w r2, [r3, #64] @ 0x40
80042dc: 687b ldr r3, [r7, #4]
80042de: 2201 movs r2, #1
80042e0: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
80042e4: 687b ldr r3, [r7, #4]
80042e6: 2201 movs r2, #1
80042e8: f883 2042 strb.w r2, [r3, #66] @ 0x42
80042ec: 687b ldr r3, [r7, #4]
80042ee: 2201 movs r2, #1
80042f0: f883 2043 strb.w r2, [r3, #67] @ 0x43
80042f4: 687b ldr r3, [r7, #4]
80042f6: 2201 movs r2, #1
80042f8: f883 2044 strb.w r2, [r3, #68] @ 0x44
80042fc: 687b ldr r3, [r7, #4]
80042fe: 2201 movs r2, #1
8004300: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8004304: 687b ldr r3, [r7, #4]
8004306: 2201 movs r2, #1
8004308: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
800430c: 2300 movs r3, #0
}
800430e: 4618 mov r0, r3
8004310: 3708 adds r7, #8
8004312: 46bd mov sp, r7
8004314: bd80 pop {r7, pc}
08004316 <HAL_TIM_Encoder_Init>:
* @param htim TIM Encoder Interface handle
* @param sConfig TIM Encoder Interface configuration structure
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig)
{
8004316: b580 push {r7, lr}
8004318: b086 sub sp, #24
800431a: af00 add r7, sp, #0
800431c: 6078 str r0, [r7, #4]
800431e: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Check the TIM handle allocation */
if (htim == NULL)
8004320: 687b ldr r3, [r7, #4]
8004322: 2b00 cmp r3, #0
8004324: d101 bne.n 800432a <HAL_TIM_Encoder_Init+0x14>
{
return HAL_ERROR;
8004326: 2301 movs r3, #1
8004328: e097 b.n 800445a <HAL_TIM_Encoder_Init+0x144>
assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter));
assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
if (htim->State == HAL_TIM_STATE_RESET)
800432a: 687b ldr r3, [r7, #4]
800432c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8004330: b2db uxtb r3, r3
8004332: 2b00 cmp r3, #0
8004334: d106 bne.n 8004344 <HAL_TIM_Encoder_Init+0x2e>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8004336: 687b ldr r3, [r7, #4]
8004338: 2200 movs r2, #0
800433a: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Encoder_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_Encoder_MspInit(htim);
800433e: 6878 ldr r0, [r7, #4]
8004340: f7fc fd1e bl 8000d80 <HAL_TIM_Encoder_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8004344: 687b ldr r3, [r7, #4]
8004346: 2202 movs r2, #2
8004348: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Reset the SMS and ECE bits */
htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE);
800434c: 687b ldr r3, [r7, #4]
800434e: 681b ldr r3, [r3, #0]
8004350: 689b ldr r3, [r3, #8]
8004352: 687a ldr r2, [r7, #4]
8004354: 6812 ldr r2, [r2, #0]
8004356: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800435a: f023 0307 bic.w r3, r3, #7
800435e: 6093 str r3, [r2, #8]
/* Configure the Time base in the Encoder Mode */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8004360: 687b ldr r3, [r7, #4]
8004362: 681a ldr r2, [r3, #0]
8004364: 687b ldr r3, [r7, #4]
8004366: 3304 adds r3, #4
8004368: 4619 mov r1, r3
800436a: 4610 mov r0, r2
800436c: f000 f8d6 bl 800451c <TIM_Base_SetConfig>
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8004370: 687b ldr r3, [r7, #4]
8004372: 681b ldr r3, [r3, #0]
8004374: 689b ldr r3, [r3, #8]
8004376: 617b str r3, [r7, #20]
/* Get the TIMx CCMR1 register value */
tmpccmr1 = htim->Instance->CCMR1;
8004378: 687b ldr r3, [r7, #4]
800437a: 681b ldr r3, [r3, #0]
800437c: 699b ldr r3, [r3, #24]
800437e: 613b str r3, [r7, #16]
/* Get the TIMx CCER register value */
tmpccer = htim->Instance->CCER;
8004380: 687b ldr r3, [r7, #4]
8004382: 681b ldr r3, [r3, #0]
8004384: 6a1b ldr r3, [r3, #32]
8004386: 60fb str r3, [r7, #12]
/* Set the encoder Mode */
tmpsmcr |= sConfig->EncoderMode;
8004388: 683b ldr r3, [r7, #0]
800438a: 681b ldr r3, [r3, #0]
800438c: 697a ldr r2, [r7, #20]
800438e: 4313 orrs r3, r2
8004390: 617b str r3, [r7, #20]
/* Select the Capture Compare 1 and the Capture Compare 2 as input */
tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S);
8004392: 693b ldr r3, [r7, #16]
8004394: f423 7340 bic.w r3, r3, #768 @ 0x300
8004398: f023 0303 bic.w r3, r3, #3
800439c: 613b str r3, [r7, #16]
tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U));
800439e: 683b ldr r3, [r7, #0]
80043a0: 689a ldr r2, [r3, #8]
80043a2: 683b ldr r3, [r7, #0]
80043a4: 699b ldr r3, [r3, #24]
80043a6: 021b lsls r3, r3, #8
80043a8: 4313 orrs r3, r2
80043aa: 693a ldr r2, [r7, #16]
80043ac: 4313 orrs r3, r2
80043ae: 613b str r3, [r7, #16]
/* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */
tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC);
80043b0: 693b ldr r3, [r7, #16]
80043b2: f423 6340 bic.w r3, r3, #3072 @ 0xc00
80043b6: f023 030c bic.w r3, r3, #12
80043ba: 613b str r3, [r7, #16]
tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F);
80043bc: 693b ldr r3, [r7, #16]
80043be: f423 4370 bic.w r3, r3, #61440 @ 0xf000
80043c2: f023 03f0 bic.w r3, r3, #240 @ 0xf0
80043c6: 613b str r3, [r7, #16]
tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U);
80043c8: 683b ldr r3, [r7, #0]
80043ca: 68da ldr r2, [r3, #12]
80043cc: 683b ldr r3, [r7, #0]
80043ce: 69db ldr r3, [r3, #28]
80043d0: 021b lsls r3, r3, #8
80043d2: 4313 orrs r3, r2
80043d4: 693a ldr r2, [r7, #16]
80043d6: 4313 orrs r3, r2
80043d8: 613b str r3, [r7, #16]
tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U);
80043da: 683b ldr r3, [r7, #0]
80043dc: 691b ldr r3, [r3, #16]
80043de: 011a lsls r2, r3, #4
80043e0: 683b ldr r3, [r7, #0]
80043e2: 6a1b ldr r3, [r3, #32]
80043e4: 031b lsls r3, r3, #12
80043e6: 4313 orrs r3, r2
80043e8: 693a ldr r2, [r7, #16]
80043ea: 4313 orrs r3, r2
80043ec: 613b str r3, [r7, #16]
/* Set the TI1 and the TI2 Polarities */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P);
80043ee: 68fb ldr r3, [r7, #12]
80043f0: f023 0322 bic.w r3, r3, #34 @ 0x22
80043f4: 60fb str r3, [r7, #12]
tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP);
80043f6: 68fb ldr r3, [r7, #12]
80043f8: f023 0388 bic.w r3, r3, #136 @ 0x88
80043fc: 60fb str r3, [r7, #12]
tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U);
80043fe: 683b ldr r3, [r7, #0]
8004400: 685a ldr r2, [r3, #4]
8004402: 683b ldr r3, [r7, #0]
8004404: 695b ldr r3, [r3, #20]
8004406: 011b lsls r3, r3, #4
8004408: 4313 orrs r3, r2
800440a: 68fa ldr r2, [r7, #12]
800440c: 4313 orrs r3, r2
800440e: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8004410: 687b ldr r3, [r7, #4]
8004412: 681b ldr r3, [r3, #0]
8004414: 697a ldr r2, [r7, #20]
8004416: 609a str r2, [r3, #8]
/* Write to TIMx CCMR1 */
htim->Instance->CCMR1 = tmpccmr1;
8004418: 687b ldr r3, [r7, #4]
800441a: 681b ldr r3, [r3, #0]
800441c: 693a ldr r2, [r7, #16]
800441e: 619a str r2, [r3, #24]
/* Write to TIMx CCER */
htim->Instance->CCER = tmpccer;
8004420: 687b ldr r3, [r7, #4]
8004422: 681b ldr r3, [r3, #0]
8004424: 68fa ldr r2, [r7, #12]
8004426: 621a str r2, [r3, #32]
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8004428: 687b ldr r3, [r7, #4]
800442a: 2201 movs r2, #1
800442c: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Set the TIM channels state */
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
8004430: 687b ldr r3, [r7, #4]
8004432: 2201 movs r2, #1
8004434: f883 203e strb.w r2, [r3, #62] @ 0x3e
TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
8004438: 687b ldr r3, [r7, #4]
800443a: 2201 movs r2, #1
800443c: f883 203f strb.w r2, [r3, #63] @ 0x3f
TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
8004440: 687b ldr r3, [r7, #4]
8004442: 2201 movs r2, #1
8004444: f883 2042 strb.w r2, [r3, #66] @ 0x42
TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
8004448: 687b ldr r3, [r7, #4]
800444a: 2201 movs r2, #1
800444c: f883 2043 strb.w r2, [r3, #67] @ 0x43
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8004450: 687b ldr r3, [r7, #4]
8004452: 2201 movs r2, #1
8004454: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8004458: 2300 movs r3, #0
}
800445a: 4618 mov r0, r3
800445c: 3718 adds r7, #24
800445e: 46bd mov sp, r7
8004460: bd80 pop {r7, pc}
...
08004464 <HAL_TIM_OC_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8004464: b580 push {r7, lr}
8004466: b086 sub sp, #24
8004468: af00 add r7, sp, #0
800446a: 60f8 str r0, [r7, #12]
800446c: 60b9 str r1, [r7, #8]
800446e: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8004470: 2300 movs r3, #0
8004472: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_CHANNELS(Channel));
assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
/* Process Locked */
__HAL_LOCK(htim);
8004474: 68fb ldr r3, [r7, #12]
8004476: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
800447a: 2b01 cmp r3, #1
800447c: d101 bne.n 8004482 <HAL_TIM_OC_ConfigChannel+0x1e>
800447e: 2302 movs r3, #2
8004480: e048 b.n 8004514 <HAL_TIM_OC_ConfigChannel+0xb0>
8004482: 68fb ldr r3, [r7, #12]
8004484: 2201 movs r2, #1
8004486: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
800448a: 687b ldr r3, [r7, #4]
800448c: 2b0c cmp r3, #12
800448e: d839 bhi.n 8004504 <HAL_TIM_OC_ConfigChannel+0xa0>
8004490: a201 add r2, pc, #4 @ (adr r2, 8004498 <HAL_TIM_OC_ConfigChannel+0x34>)
8004492: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004496: bf00 nop
8004498: 080044cd .word 0x080044cd
800449c: 08004505 .word 0x08004505
80044a0: 08004505 .word 0x08004505
80044a4: 08004505 .word 0x08004505
80044a8: 080044db .word 0x080044db
80044ac: 08004505 .word 0x08004505
80044b0: 08004505 .word 0x08004505
80044b4: 08004505 .word 0x08004505
80044b8: 080044e9 .word 0x080044e9
80044bc: 08004505 .word 0x08004505
80044c0: 08004505 .word 0x08004505
80044c4: 08004505 .word 0x08004505
80044c8: 080044f7 .word 0x080044f7
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the TIM Channel 1 in Output Compare */
TIM_OC1_SetConfig(htim->Instance, sConfig);
80044cc: 68fb ldr r3, [r7, #12]
80044ce: 681b ldr r3, [r3, #0]
80044d0: 68b9 ldr r1, [r7, #8]
80044d2: 4618 mov r0, r3
80044d4: f000 f8c8 bl 8004668 <TIM_OC1_SetConfig>
break;
80044d8: e017 b.n 800450a <HAL_TIM_OC_ConfigChannel+0xa6>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the TIM Channel 2 in Output Compare */
TIM_OC2_SetConfig(htim->Instance, sConfig);
80044da: 68fb ldr r3, [r7, #12]
80044dc: 681b ldr r3, [r3, #0]
80044de: 68b9 ldr r1, [r7, #8]
80044e0: 4618 mov r0, r3
80044e2: f000 f931 bl 8004748 <TIM_OC2_SetConfig>
break;
80044e6: e010 b.n 800450a <HAL_TIM_OC_ConfigChannel+0xa6>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the TIM Channel 3 in Output Compare */
TIM_OC3_SetConfig(htim->Instance, sConfig);
80044e8: 68fb ldr r3, [r7, #12]
80044ea: 681b ldr r3, [r3, #0]
80044ec: 68b9 ldr r1, [r7, #8]
80044ee: 4618 mov r0, r3
80044f0: f000 f9a0 bl 8004834 <TIM_OC3_SetConfig>
break;
80044f4: e009 b.n 800450a <HAL_TIM_OC_ConfigChannel+0xa6>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the TIM Channel 4 in Output Compare */
TIM_OC4_SetConfig(htim->Instance, sConfig);
80044f6: 68fb ldr r3, [r7, #12]
80044f8: 681b ldr r3, [r3, #0]
80044fa: 68b9 ldr r1, [r7, #8]
80044fc: 4618 mov r0, r3
80044fe: f000 fa0d bl 800491c <TIM_OC4_SetConfig>
break;
8004502: e002 b.n 800450a <HAL_TIM_OC_ConfigChannel+0xa6>
}
default:
status = HAL_ERROR;
8004504: 2301 movs r3, #1
8004506: 75fb strb r3, [r7, #23]
break;
8004508: bf00 nop
}
__HAL_UNLOCK(htim);
800450a: 68fb ldr r3, [r7, #12]
800450c: 2200 movs r2, #0
800450e: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8004512: 7dfb ldrb r3, [r7, #23]
}
8004514: 4618 mov r0, r3
8004516: 3718 adds r7, #24
8004518: 46bd mov sp, r7
800451a: bd80 pop {r7, pc}
0800451c <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
800451c: b480 push {r7}
800451e: b085 sub sp, #20
8004520: af00 add r7, sp, #0
8004522: 6078 str r0, [r7, #4]
8004524: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8004526: 687b ldr r3, [r7, #4]
8004528: 681b ldr r3, [r3, #0]
800452a: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
800452c: 687b ldr r3, [r7, #4]
800452e: 4a43 ldr r2, [pc, #268] @ (800463c <TIM_Base_SetConfig+0x120>)
8004530: 4293 cmp r3, r2
8004532: d013 beq.n 800455c <TIM_Base_SetConfig+0x40>
8004534: 687b ldr r3, [r7, #4]
8004536: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800453a: d00f beq.n 800455c <TIM_Base_SetConfig+0x40>
800453c: 687b ldr r3, [r7, #4]
800453e: 4a40 ldr r2, [pc, #256] @ (8004640 <TIM_Base_SetConfig+0x124>)
8004540: 4293 cmp r3, r2
8004542: d00b beq.n 800455c <TIM_Base_SetConfig+0x40>
8004544: 687b ldr r3, [r7, #4]
8004546: 4a3f ldr r2, [pc, #252] @ (8004644 <TIM_Base_SetConfig+0x128>)
8004548: 4293 cmp r3, r2
800454a: d007 beq.n 800455c <TIM_Base_SetConfig+0x40>
800454c: 687b ldr r3, [r7, #4]
800454e: 4a3e ldr r2, [pc, #248] @ (8004648 <TIM_Base_SetConfig+0x12c>)
8004550: 4293 cmp r3, r2
8004552: d003 beq.n 800455c <TIM_Base_SetConfig+0x40>
8004554: 687b ldr r3, [r7, #4]
8004556: 4a3d ldr r2, [pc, #244] @ (800464c <TIM_Base_SetConfig+0x130>)
8004558: 4293 cmp r3, r2
800455a: d108 bne.n 800456e <TIM_Base_SetConfig+0x52>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
800455c: 68fb ldr r3, [r7, #12]
800455e: f023 0370 bic.w r3, r3, #112 @ 0x70
8004562: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8004564: 683b ldr r3, [r7, #0]
8004566: 685b ldr r3, [r3, #4]
8004568: 68fa ldr r2, [r7, #12]
800456a: 4313 orrs r3, r2
800456c: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
800456e: 687b ldr r3, [r7, #4]
8004570: 4a32 ldr r2, [pc, #200] @ (800463c <TIM_Base_SetConfig+0x120>)
8004572: 4293 cmp r3, r2
8004574: d02b beq.n 80045ce <TIM_Base_SetConfig+0xb2>
8004576: 687b ldr r3, [r7, #4]
8004578: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800457c: d027 beq.n 80045ce <TIM_Base_SetConfig+0xb2>
800457e: 687b ldr r3, [r7, #4]
8004580: 4a2f ldr r2, [pc, #188] @ (8004640 <TIM_Base_SetConfig+0x124>)
8004582: 4293 cmp r3, r2
8004584: d023 beq.n 80045ce <TIM_Base_SetConfig+0xb2>
8004586: 687b ldr r3, [r7, #4]
8004588: 4a2e ldr r2, [pc, #184] @ (8004644 <TIM_Base_SetConfig+0x128>)
800458a: 4293 cmp r3, r2
800458c: d01f beq.n 80045ce <TIM_Base_SetConfig+0xb2>
800458e: 687b ldr r3, [r7, #4]
8004590: 4a2d ldr r2, [pc, #180] @ (8004648 <TIM_Base_SetConfig+0x12c>)
8004592: 4293 cmp r3, r2
8004594: d01b beq.n 80045ce <TIM_Base_SetConfig+0xb2>
8004596: 687b ldr r3, [r7, #4]
8004598: 4a2c ldr r2, [pc, #176] @ (800464c <TIM_Base_SetConfig+0x130>)
800459a: 4293 cmp r3, r2
800459c: d017 beq.n 80045ce <TIM_Base_SetConfig+0xb2>
800459e: 687b ldr r3, [r7, #4]
80045a0: 4a2b ldr r2, [pc, #172] @ (8004650 <TIM_Base_SetConfig+0x134>)
80045a2: 4293 cmp r3, r2
80045a4: d013 beq.n 80045ce <TIM_Base_SetConfig+0xb2>
80045a6: 687b ldr r3, [r7, #4]
80045a8: 4a2a ldr r2, [pc, #168] @ (8004654 <TIM_Base_SetConfig+0x138>)
80045aa: 4293 cmp r3, r2
80045ac: d00f beq.n 80045ce <TIM_Base_SetConfig+0xb2>
80045ae: 687b ldr r3, [r7, #4]
80045b0: 4a29 ldr r2, [pc, #164] @ (8004658 <TIM_Base_SetConfig+0x13c>)
80045b2: 4293 cmp r3, r2
80045b4: d00b beq.n 80045ce <TIM_Base_SetConfig+0xb2>
80045b6: 687b ldr r3, [r7, #4]
80045b8: 4a28 ldr r2, [pc, #160] @ (800465c <TIM_Base_SetConfig+0x140>)
80045ba: 4293 cmp r3, r2
80045bc: d007 beq.n 80045ce <TIM_Base_SetConfig+0xb2>
80045be: 687b ldr r3, [r7, #4]
80045c0: 4a27 ldr r2, [pc, #156] @ (8004660 <TIM_Base_SetConfig+0x144>)
80045c2: 4293 cmp r3, r2
80045c4: d003 beq.n 80045ce <TIM_Base_SetConfig+0xb2>
80045c6: 687b ldr r3, [r7, #4]
80045c8: 4a26 ldr r2, [pc, #152] @ (8004664 <TIM_Base_SetConfig+0x148>)
80045ca: 4293 cmp r3, r2
80045cc: d108 bne.n 80045e0 <TIM_Base_SetConfig+0xc4>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
80045ce: 68fb ldr r3, [r7, #12]
80045d0: f423 7340 bic.w r3, r3, #768 @ 0x300
80045d4: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
80045d6: 683b ldr r3, [r7, #0]
80045d8: 68db ldr r3, [r3, #12]
80045da: 68fa ldr r2, [r7, #12]
80045dc: 4313 orrs r3, r2
80045de: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
80045e0: 68fb ldr r3, [r7, #12]
80045e2: f023 0280 bic.w r2, r3, #128 @ 0x80
80045e6: 683b ldr r3, [r7, #0]
80045e8: 695b ldr r3, [r3, #20]
80045ea: 4313 orrs r3, r2
80045ec: 60fb str r3, [r7, #12]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
80045ee: 683b ldr r3, [r7, #0]
80045f0: 689a ldr r2, [r3, #8]
80045f2: 687b ldr r3, [r7, #4]
80045f4: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
80045f6: 683b ldr r3, [r7, #0]
80045f8: 681a ldr r2, [r3, #0]
80045fa: 687b ldr r3, [r7, #4]
80045fc: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
80045fe: 687b ldr r3, [r7, #4]
8004600: 4a0e ldr r2, [pc, #56] @ (800463c <TIM_Base_SetConfig+0x120>)
8004602: 4293 cmp r3, r2
8004604: d003 beq.n 800460e <TIM_Base_SetConfig+0xf2>
8004606: 687b ldr r3, [r7, #4]
8004608: 4a10 ldr r2, [pc, #64] @ (800464c <TIM_Base_SetConfig+0x130>)
800460a: 4293 cmp r3, r2
800460c: d103 bne.n 8004616 <TIM_Base_SetConfig+0xfa>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
800460e: 683b ldr r3, [r7, #0]
8004610: 691a ldr r2, [r3, #16]
8004612: 687b ldr r3, [r7, #4]
8004614: 631a str r2, [r3, #48] @ 0x30
}
/* Disable Update Event (UEV) with Update Generation (UG)
by changing Update Request Source (URS) to avoid Update flag (UIF) */
SET_BIT(TIMx->CR1, TIM_CR1_URS);
8004616: 687b ldr r3, [r7, #4]
8004618: 681b ldr r3, [r3, #0]
800461a: f043 0204 orr.w r2, r3, #4
800461e: 687b ldr r3, [r7, #4]
8004620: 601a str r2, [r3, #0]
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8004622: 687b ldr r3, [r7, #4]
8004624: 2201 movs r2, #1
8004626: 615a str r2, [r3, #20]
TIMx->CR1 = tmpcr1;
8004628: 687b ldr r3, [r7, #4]
800462a: 68fa ldr r2, [r7, #12]
800462c: 601a str r2, [r3, #0]
}
800462e: bf00 nop
8004630: 3714 adds r7, #20
8004632: 46bd mov sp, r7
8004634: f85d 7b04 ldr.w r7, [sp], #4
8004638: 4770 bx lr
800463a: bf00 nop
800463c: 40010000 .word 0x40010000
8004640: 40000400 .word 0x40000400
8004644: 40000800 .word 0x40000800
8004648: 40000c00 .word 0x40000c00
800464c: 40010400 .word 0x40010400
8004650: 40014000 .word 0x40014000
8004654: 40014400 .word 0x40014400
8004658: 40014800 .word 0x40014800
800465c: 40001800 .word 0x40001800
8004660: 40001c00 .word 0x40001c00
8004664: 40002000 .word 0x40002000
08004668 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8004668: b480 push {r7}
800466a: b087 sub sp, #28
800466c: af00 add r7, sp, #0
800466e: 6078 str r0, [r7, #4]
8004670: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8004672: 687b ldr r3, [r7, #4]
8004674: 6a1b ldr r3, [r3, #32]
8004676: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
8004678: 687b ldr r3, [r7, #4]
800467a: 6a1b ldr r3, [r3, #32]
800467c: f023 0201 bic.w r2, r3, #1
8004680: 687b ldr r3, [r7, #4]
8004682: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8004684: 687b ldr r3, [r7, #4]
8004686: 685b ldr r3, [r3, #4]
8004688: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
800468a: 687b ldr r3, [r7, #4]
800468c: 699b ldr r3, [r3, #24]
800468e: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
8004690: 68fb ldr r3, [r7, #12]
8004692: f023 0370 bic.w r3, r3, #112 @ 0x70
8004696: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
8004698: 68fb ldr r3, [r7, #12]
800469a: f023 0303 bic.w r3, r3, #3
800469e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
80046a0: 683b ldr r3, [r7, #0]
80046a2: 681b ldr r3, [r3, #0]
80046a4: 68fa ldr r2, [r7, #12]
80046a6: 4313 orrs r3, r2
80046a8: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
80046aa: 697b ldr r3, [r7, #20]
80046ac: f023 0302 bic.w r3, r3, #2
80046b0: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
80046b2: 683b ldr r3, [r7, #0]
80046b4: 689b ldr r3, [r3, #8]
80046b6: 697a ldr r2, [r7, #20]
80046b8: 4313 orrs r3, r2
80046ba: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
80046bc: 687b ldr r3, [r7, #4]
80046be: 4a20 ldr r2, [pc, #128] @ (8004740 <TIM_OC1_SetConfig+0xd8>)
80046c0: 4293 cmp r3, r2
80046c2: d003 beq.n 80046cc <TIM_OC1_SetConfig+0x64>
80046c4: 687b ldr r3, [r7, #4]
80046c6: 4a1f ldr r2, [pc, #124] @ (8004744 <TIM_OC1_SetConfig+0xdc>)
80046c8: 4293 cmp r3, r2
80046ca: d10c bne.n 80046e6 <TIM_OC1_SetConfig+0x7e>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
80046cc: 697b ldr r3, [r7, #20]
80046ce: f023 0308 bic.w r3, r3, #8
80046d2: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
80046d4: 683b ldr r3, [r7, #0]
80046d6: 68db ldr r3, [r3, #12]
80046d8: 697a ldr r2, [r7, #20]
80046da: 4313 orrs r3, r2
80046dc: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
80046de: 697b ldr r3, [r7, #20]
80046e0: f023 0304 bic.w r3, r3, #4
80046e4: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80046e6: 687b ldr r3, [r7, #4]
80046e8: 4a15 ldr r2, [pc, #84] @ (8004740 <TIM_OC1_SetConfig+0xd8>)
80046ea: 4293 cmp r3, r2
80046ec: d003 beq.n 80046f6 <TIM_OC1_SetConfig+0x8e>
80046ee: 687b ldr r3, [r7, #4]
80046f0: 4a14 ldr r2, [pc, #80] @ (8004744 <TIM_OC1_SetConfig+0xdc>)
80046f2: 4293 cmp r3, r2
80046f4: d111 bne.n 800471a <TIM_OC1_SetConfig+0xb2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
80046f6: 693b ldr r3, [r7, #16]
80046f8: f423 7380 bic.w r3, r3, #256 @ 0x100
80046fc: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
80046fe: 693b ldr r3, [r7, #16]
8004700: f423 7300 bic.w r3, r3, #512 @ 0x200
8004704: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
8004706: 683b ldr r3, [r7, #0]
8004708: 695b ldr r3, [r3, #20]
800470a: 693a ldr r2, [r7, #16]
800470c: 4313 orrs r3, r2
800470e: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
8004710: 683b ldr r3, [r7, #0]
8004712: 699b ldr r3, [r3, #24]
8004714: 693a ldr r2, [r7, #16]
8004716: 4313 orrs r3, r2
8004718: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800471a: 687b ldr r3, [r7, #4]
800471c: 693a ldr r2, [r7, #16]
800471e: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8004720: 687b ldr r3, [r7, #4]
8004722: 68fa ldr r2, [r7, #12]
8004724: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
8004726: 683b ldr r3, [r7, #0]
8004728: 685a ldr r2, [r3, #4]
800472a: 687b ldr r3, [r7, #4]
800472c: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
800472e: 687b ldr r3, [r7, #4]
8004730: 697a ldr r2, [r7, #20]
8004732: 621a str r2, [r3, #32]
}
8004734: bf00 nop
8004736: 371c adds r7, #28
8004738: 46bd mov sp, r7
800473a: f85d 7b04 ldr.w r7, [sp], #4
800473e: 4770 bx lr
8004740: 40010000 .word 0x40010000
8004744: 40010400 .word 0x40010400
08004748 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8004748: b480 push {r7}
800474a: b087 sub sp, #28
800474c: af00 add r7, sp, #0
800474e: 6078 str r0, [r7, #4]
8004750: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8004752: 687b ldr r3, [r7, #4]
8004754: 6a1b ldr r3, [r3, #32]
8004756: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
8004758: 687b ldr r3, [r7, #4]
800475a: 6a1b ldr r3, [r3, #32]
800475c: f023 0210 bic.w r2, r3, #16
8004760: 687b ldr r3, [r7, #4]
8004762: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8004764: 687b ldr r3, [r7, #4]
8004766: 685b ldr r3, [r3, #4]
8004768: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
800476a: 687b ldr r3, [r7, #4]
800476c: 699b ldr r3, [r3, #24]
800476e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
8004770: 68fb ldr r3, [r7, #12]
8004772: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004776: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
8004778: 68fb ldr r3, [r7, #12]
800477a: f423 7340 bic.w r3, r3, #768 @ 0x300
800477e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8004780: 683b ldr r3, [r7, #0]
8004782: 681b ldr r3, [r3, #0]
8004784: 021b lsls r3, r3, #8
8004786: 68fa ldr r2, [r7, #12]
8004788: 4313 orrs r3, r2
800478a: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
800478c: 697b ldr r3, [r7, #20]
800478e: f023 0320 bic.w r3, r3, #32
8004792: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
8004794: 683b ldr r3, [r7, #0]
8004796: 689b ldr r3, [r3, #8]
8004798: 011b lsls r3, r3, #4
800479a: 697a ldr r2, [r7, #20]
800479c: 4313 orrs r3, r2
800479e: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
80047a0: 687b ldr r3, [r7, #4]
80047a2: 4a22 ldr r2, [pc, #136] @ (800482c <TIM_OC2_SetConfig+0xe4>)
80047a4: 4293 cmp r3, r2
80047a6: d003 beq.n 80047b0 <TIM_OC2_SetConfig+0x68>
80047a8: 687b ldr r3, [r7, #4]
80047aa: 4a21 ldr r2, [pc, #132] @ (8004830 <TIM_OC2_SetConfig+0xe8>)
80047ac: 4293 cmp r3, r2
80047ae: d10d bne.n 80047cc <TIM_OC2_SetConfig+0x84>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
80047b0: 697b ldr r3, [r7, #20]
80047b2: f023 0380 bic.w r3, r3, #128 @ 0x80
80047b6: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
80047b8: 683b ldr r3, [r7, #0]
80047ba: 68db ldr r3, [r3, #12]
80047bc: 011b lsls r3, r3, #4
80047be: 697a ldr r2, [r7, #20]
80047c0: 4313 orrs r3, r2
80047c2: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
80047c4: 697b ldr r3, [r7, #20]
80047c6: f023 0340 bic.w r3, r3, #64 @ 0x40
80047ca: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80047cc: 687b ldr r3, [r7, #4]
80047ce: 4a17 ldr r2, [pc, #92] @ (800482c <TIM_OC2_SetConfig+0xe4>)
80047d0: 4293 cmp r3, r2
80047d2: d003 beq.n 80047dc <TIM_OC2_SetConfig+0x94>
80047d4: 687b ldr r3, [r7, #4]
80047d6: 4a16 ldr r2, [pc, #88] @ (8004830 <TIM_OC2_SetConfig+0xe8>)
80047d8: 4293 cmp r3, r2
80047da: d113 bne.n 8004804 <TIM_OC2_SetConfig+0xbc>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
80047dc: 693b ldr r3, [r7, #16]
80047de: f423 6380 bic.w r3, r3, #1024 @ 0x400
80047e2: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
80047e4: 693b ldr r3, [r7, #16]
80047e6: f423 6300 bic.w r3, r3, #2048 @ 0x800
80047ea: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
80047ec: 683b ldr r3, [r7, #0]
80047ee: 695b ldr r3, [r3, #20]
80047f0: 009b lsls r3, r3, #2
80047f2: 693a ldr r2, [r7, #16]
80047f4: 4313 orrs r3, r2
80047f6: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
80047f8: 683b ldr r3, [r7, #0]
80047fa: 699b ldr r3, [r3, #24]
80047fc: 009b lsls r3, r3, #2
80047fe: 693a ldr r2, [r7, #16]
8004800: 4313 orrs r3, r2
8004802: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8004804: 687b ldr r3, [r7, #4]
8004806: 693a ldr r2, [r7, #16]
8004808: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
800480a: 687b ldr r3, [r7, #4]
800480c: 68fa ldr r2, [r7, #12]
800480e: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
8004810: 683b ldr r3, [r7, #0]
8004812: 685a ldr r2, [r3, #4]
8004814: 687b ldr r3, [r7, #4]
8004816: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8004818: 687b ldr r3, [r7, #4]
800481a: 697a ldr r2, [r7, #20]
800481c: 621a str r2, [r3, #32]
}
800481e: bf00 nop
8004820: 371c adds r7, #28
8004822: 46bd mov sp, r7
8004824: f85d 7b04 ldr.w r7, [sp], #4
8004828: 4770 bx lr
800482a: bf00 nop
800482c: 40010000 .word 0x40010000
8004830: 40010400 .word 0x40010400
08004834 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8004834: b480 push {r7}
8004836: b087 sub sp, #28
8004838: af00 add r7, sp, #0
800483a: 6078 str r0, [r7, #4]
800483c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800483e: 687b ldr r3, [r7, #4]
8004840: 6a1b ldr r3, [r3, #32]
8004842: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8004844: 687b ldr r3, [r7, #4]
8004846: 6a1b ldr r3, [r3, #32]
8004848: f423 7280 bic.w r2, r3, #256 @ 0x100
800484c: 687b ldr r3, [r7, #4]
800484e: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8004850: 687b ldr r3, [r7, #4]
8004852: 685b ldr r3, [r3, #4]
8004854: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8004856: 687b ldr r3, [r7, #4]
8004858: 69db ldr r3, [r3, #28]
800485a: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
800485c: 68fb ldr r3, [r7, #12]
800485e: f023 0370 bic.w r3, r3, #112 @ 0x70
8004862: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
8004864: 68fb ldr r3, [r7, #12]
8004866: f023 0303 bic.w r3, r3, #3
800486a: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
800486c: 683b ldr r3, [r7, #0]
800486e: 681b ldr r3, [r3, #0]
8004870: 68fa ldr r2, [r7, #12]
8004872: 4313 orrs r3, r2
8004874: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
8004876: 697b ldr r3, [r7, #20]
8004878: f423 7300 bic.w r3, r3, #512 @ 0x200
800487c: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
800487e: 683b ldr r3, [r7, #0]
8004880: 689b ldr r3, [r3, #8]
8004882: 021b lsls r3, r3, #8
8004884: 697a ldr r2, [r7, #20]
8004886: 4313 orrs r3, r2
8004888: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
800488a: 687b ldr r3, [r7, #4]
800488c: 4a21 ldr r2, [pc, #132] @ (8004914 <TIM_OC3_SetConfig+0xe0>)
800488e: 4293 cmp r3, r2
8004890: d003 beq.n 800489a <TIM_OC3_SetConfig+0x66>
8004892: 687b ldr r3, [r7, #4]
8004894: 4a20 ldr r2, [pc, #128] @ (8004918 <TIM_OC3_SetConfig+0xe4>)
8004896: 4293 cmp r3, r2
8004898: d10d bne.n 80048b6 <TIM_OC3_SetConfig+0x82>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
800489a: 697b ldr r3, [r7, #20]
800489c: f423 6300 bic.w r3, r3, #2048 @ 0x800
80048a0: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
80048a2: 683b ldr r3, [r7, #0]
80048a4: 68db ldr r3, [r3, #12]
80048a6: 021b lsls r3, r3, #8
80048a8: 697a ldr r2, [r7, #20]
80048aa: 4313 orrs r3, r2
80048ac: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
80048ae: 697b ldr r3, [r7, #20]
80048b0: f423 6380 bic.w r3, r3, #1024 @ 0x400
80048b4: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80048b6: 687b ldr r3, [r7, #4]
80048b8: 4a16 ldr r2, [pc, #88] @ (8004914 <TIM_OC3_SetConfig+0xe0>)
80048ba: 4293 cmp r3, r2
80048bc: d003 beq.n 80048c6 <TIM_OC3_SetConfig+0x92>
80048be: 687b ldr r3, [r7, #4]
80048c0: 4a15 ldr r2, [pc, #84] @ (8004918 <TIM_OC3_SetConfig+0xe4>)
80048c2: 4293 cmp r3, r2
80048c4: d113 bne.n 80048ee <TIM_OC3_SetConfig+0xba>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
80048c6: 693b ldr r3, [r7, #16]
80048c8: f423 5380 bic.w r3, r3, #4096 @ 0x1000
80048cc: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
80048ce: 693b ldr r3, [r7, #16]
80048d0: f423 5300 bic.w r3, r3, #8192 @ 0x2000
80048d4: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
80048d6: 683b ldr r3, [r7, #0]
80048d8: 695b ldr r3, [r3, #20]
80048da: 011b lsls r3, r3, #4
80048dc: 693a ldr r2, [r7, #16]
80048de: 4313 orrs r3, r2
80048e0: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
80048e2: 683b ldr r3, [r7, #0]
80048e4: 699b ldr r3, [r3, #24]
80048e6: 011b lsls r3, r3, #4
80048e8: 693a ldr r2, [r7, #16]
80048ea: 4313 orrs r3, r2
80048ec: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80048ee: 687b ldr r3, [r7, #4]
80048f0: 693a ldr r2, [r7, #16]
80048f2: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
80048f4: 687b ldr r3, [r7, #4]
80048f6: 68fa ldr r2, [r7, #12]
80048f8: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
80048fa: 683b ldr r3, [r7, #0]
80048fc: 685a ldr r2, [r3, #4]
80048fe: 687b ldr r3, [r7, #4]
8004900: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8004902: 687b ldr r3, [r7, #4]
8004904: 697a ldr r2, [r7, #20]
8004906: 621a str r2, [r3, #32]
}
8004908: bf00 nop
800490a: 371c adds r7, #28
800490c: 46bd mov sp, r7
800490e: f85d 7b04 ldr.w r7, [sp], #4
8004912: 4770 bx lr
8004914: 40010000 .word 0x40010000
8004918: 40010400 .word 0x40010400
0800491c <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
800491c: b480 push {r7}
800491e: b087 sub sp, #28
8004920: af00 add r7, sp, #0
8004922: 6078 str r0, [r7, #4]
8004924: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8004926: 687b ldr r3, [r7, #4]
8004928: 6a1b ldr r3, [r3, #32]
800492a: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
800492c: 687b ldr r3, [r7, #4]
800492e: 6a1b ldr r3, [r3, #32]
8004930: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8004934: 687b ldr r3, [r7, #4]
8004936: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8004938: 687b ldr r3, [r7, #4]
800493a: 685b ldr r3, [r3, #4]
800493c: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
800493e: 687b ldr r3, [r7, #4]
8004940: 69db ldr r3, [r3, #28]
8004942: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
8004944: 68fb ldr r3, [r7, #12]
8004946: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800494a: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
800494c: 68fb ldr r3, [r7, #12]
800494e: f423 7340 bic.w r3, r3, #768 @ 0x300
8004952: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8004954: 683b ldr r3, [r7, #0]
8004956: 681b ldr r3, [r3, #0]
8004958: 021b lsls r3, r3, #8
800495a: 68fa ldr r2, [r7, #12]
800495c: 4313 orrs r3, r2
800495e: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
8004960: 693b ldr r3, [r7, #16]
8004962: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8004966: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8004968: 683b ldr r3, [r7, #0]
800496a: 689b ldr r3, [r3, #8]
800496c: 031b lsls r3, r3, #12
800496e: 693a ldr r2, [r7, #16]
8004970: 4313 orrs r3, r2
8004972: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
8004974: 687b ldr r3, [r7, #4]
8004976: 4a12 ldr r2, [pc, #72] @ (80049c0 <TIM_OC4_SetConfig+0xa4>)
8004978: 4293 cmp r3, r2
800497a: d003 beq.n 8004984 <TIM_OC4_SetConfig+0x68>
800497c: 687b ldr r3, [r7, #4]
800497e: 4a11 ldr r2, [pc, #68] @ (80049c4 <TIM_OC4_SetConfig+0xa8>)
8004980: 4293 cmp r3, r2
8004982: d109 bne.n 8004998 <TIM_OC4_SetConfig+0x7c>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
8004984: 697b ldr r3, [r7, #20]
8004986: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800498a: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
800498c: 683b ldr r3, [r7, #0]
800498e: 695b ldr r3, [r3, #20]
8004990: 019b lsls r3, r3, #6
8004992: 697a ldr r2, [r7, #20]
8004994: 4313 orrs r3, r2
8004996: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8004998: 687b ldr r3, [r7, #4]
800499a: 697a ldr r2, [r7, #20]
800499c: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
800499e: 687b ldr r3, [r7, #4]
80049a0: 68fa ldr r2, [r7, #12]
80049a2: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
80049a4: 683b ldr r3, [r7, #0]
80049a6: 685a ldr r2, [r3, #4]
80049a8: 687b ldr r3, [r7, #4]
80049aa: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80049ac: 687b ldr r3, [r7, #4]
80049ae: 693a ldr r2, [r7, #16]
80049b0: 621a str r2, [r3, #32]
}
80049b2: bf00 nop
80049b4: 371c adds r7, #28
80049b6: 46bd mov sp, r7
80049b8: f85d 7b04 ldr.w r7, [sp], #4
80049bc: 4770 bx lr
80049be: bf00 nop
80049c0: 40010000 .word 0x40010000
80049c4: 40010400 .word 0x40010400
080049c8 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
80049c8: b480 push {r7}
80049ca: b085 sub sp, #20
80049cc: af00 add r7, sp, #0
80049ce: 6078 str r0, [r7, #4]
80049d0: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
80049d2: 687b ldr r3, [r7, #4]
80049d4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
80049d8: 2b01 cmp r3, #1
80049da: d101 bne.n 80049e0 <HAL_TIMEx_MasterConfigSynchronization+0x18>
80049dc: 2302 movs r3, #2
80049de: e05a b.n 8004a96 <HAL_TIMEx_MasterConfigSynchronization+0xce>
80049e0: 687b ldr r3, [r7, #4]
80049e2: 2201 movs r2, #1
80049e4: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
80049e8: 687b ldr r3, [r7, #4]
80049ea: 2202 movs r2, #2
80049ec: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
80049f0: 687b ldr r3, [r7, #4]
80049f2: 681b ldr r3, [r3, #0]
80049f4: 685b ldr r3, [r3, #4]
80049f6: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
80049f8: 687b ldr r3, [r7, #4]
80049fa: 681b ldr r3, [r3, #0]
80049fc: 689b ldr r3, [r3, #8]
80049fe: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8004a00: 68fb ldr r3, [r7, #12]
8004a02: f023 0370 bic.w r3, r3, #112 @ 0x70
8004a06: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8004a08: 683b ldr r3, [r7, #0]
8004a0a: 681b ldr r3, [r3, #0]
8004a0c: 68fa ldr r2, [r7, #12]
8004a0e: 4313 orrs r3, r2
8004a10: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8004a12: 687b ldr r3, [r7, #4]
8004a14: 681b ldr r3, [r3, #0]
8004a16: 68fa ldr r2, [r7, #12]
8004a18: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8004a1a: 687b ldr r3, [r7, #4]
8004a1c: 681b ldr r3, [r3, #0]
8004a1e: 4a21 ldr r2, [pc, #132] @ (8004aa4 <HAL_TIMEx_MasterConfigSynchronization+0xdc>)
8004a20: 4293 cmp r3, r2
8004a22: d022 beq.n 8004a6a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8004a24: 687b ldr r3, [r7, #4]
8004a26: 681b ldr r3, [r3, #0]
8004a28: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004a2c: d01d beq.n 8004a6a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8004a2e: 687b ldr r3, [r7, #4]
8004a30: 681b ldr r3, [r3, #0]
8004a32: 4a1d ldr r2, [pc, #116] @ (8004aa8 <HAL_TIMEx_MasterConfigSynchronization+0xe0>)
8004a34: 4293 cmp r3, r2
8004a36: d018 beq.n 8004a6a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8004a38: 687b ldr r3, [r7, #4]
8004a3a: 681b ldr r3, [r3, #0]
8004a3c: 4a1b ldr r2, [pc, #108] @ (8004aac <HAL_TIMEx_MasterConfigSynchronization+0xe4>)
8004a3e: 4293 cmp r3, r2
8004a40: d013 beq.n 8004a6a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8004a42: 687b ldr r3, [r7, #4]
8004a44: 681b ldr r3, [r3, #0]
8004a46: 4a1a ldr r2, [pc, #104] @ (8004ab0 <HAL_TIMEx_MasterConfigSynchronization+0xe8>)
8004a48: 4293 cmp r3, r2
8004a4a: d00e beq.n 8004a6a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8004a4c: 687b ldr r3, [r7, #4]
8004a4e: 681b ldr r3, [r3, #0]
8004a50: 4a18 ldr r2, [pc, #96] @ (8004ab4 <HAL_TIMEx_MasterConfigSynchronization+0xec>)
8004a52: 4293 cmp r3, r2
8004a54: d009 beq.n 8004a6a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8004a56: 687b ldr r3, [r7, #4]
8004a58: 681b ldr r3, [r3, #0]
8004a5a: 4a17 ldr r2, [pc, #92] @ (8004ab8 <HAL_TIMEx_MasterConfigSynchronization+0xf0>)
8004a5c: 4293 cmp r3, r2
8004a5e: d004 beq.n 8004a6a <HAL_TIMEx_MasterConfigSynchronization+0xa2>
8004a60: 687b ldr r3, [r7, #4]
8004a62: 681b ldr r3, [r3, #0]
8004a64: 4a15 ldr r2, [pc, #84] @ (8004abc <HAL_TIMEx_MasterConfigSynchronization+0xf4>)
8004a66: 4293 cmp r3, r2
8004a68: d10c bne.n 8004a84 <HAL_TIMEx_MasterConfigSynchronization+0xbc>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
8004a6a: 68bb ldr r3, [r7, #8]
8004a6c: f023 0380 bic.w r3, r3, #128 @ 0x80
8004a70: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8004a72: 683b ldr r3, [r7, #0]
8004a74: 685b ldr r3, [r3, #4]
8004a76: 68ba ldr r2, [r7, #8]
8004a78: 4313 orrs r3, r2
8004a7a: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8004a7c: 687b ldr r3, [r7, #4]
8004a7e: 681b ldr r3, [r3, #0]
8004a80: 68ba ldr r2, [r7, #8]
8004a82: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8004a84: 687b ldr r3, [r7, #4]
8004a86: 2201 movs r2, #1
8004a88: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8004a8c: 687b ldr r3, [r7, #4]
8004a8e: 2200 movs r2, #0
8004a90: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
8004a94: 2300 movs r3, #0
}
8004a96: 4618 mov r0, r3
8004a98: 3714 adds r7, #20
8004a9a: 46bd mov sp, r7
8004a9c: f85d 7b04 ldr.w r7, [sp], #4
8004aa0: 4770 bx lr
8004aa2: bf00 nop
8004aa4: 40010000 .word 0x40010000
8004aa8: 40000400 .word 0x40000400
8004aac: 40000800 .word 0x40000800
8004ab0: 40000c00 .word 0x40000c00
8004ab4: 40010400 .word 0x40010400
8004ab8: 40014000 .word 0x40014000
8004abc: 40001800 .word 0x40001800
08004ac0 <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
8004ac0: b580 push {r7, lr}
8004ac2: b082 sub sp, #8
8004ac4: af00 add r7, sp, #0
8004ac6: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8004ac8: 687b ldr r3, [r7, #4]
8004aca: 2b00 cmp r3, #0
8004acc: d101 bne.n 8004ad2 <HAL_UART_Init+0x12>
{
return HAL_ERROR;
8004ace: 2301 movs r3, #1
8004ad0: e042 b.n 8004b58 <HAL_UART_Init+0x98>
assert_param(IS_UART_INSTANCE(huart->Instance));
}
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
if (huart->gState == HAL_UART_STATE_RESET)
8004ad2: 687b ldr r3, [r7, #4]
8004ad4: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8004ad8: b2db uxtb r3, r3
8004ada: 2b00 cmp r3, #0
8004adc: d106 bne.n 8004aec <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
8004ade: 687b ldr r3, [r7, #4]
8004ae0: 2200 movs r2, #0
8004ae2: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
8004ae6: 6878 ldr r0, [r7, #4]
8004ae8: f7fc f9ca bl 8000e80 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8004aec: 687b ldr r3, [r7, #4]
8004aee: 2224 movs r2, #36 @ 0x24
8004af0: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
8004af4: 687b ldr r3, [r7, #4]
8004af6: 681b ldr r3, [r3, #0]
8004af8: 68da ldr r2, [r3, #12]
8004afa: 687b ldr r3, [r7, #4]
8004afc: 681b ldr r3, [r3, #0]
8004afe: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8004b02: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
8004b04: 6878 ldr r0, [r7, #4]
8004b06: f000 f82b bl 8004b60 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
8004b0a: 687b ldr r3, [r7, #4]
8004b0c: 681b ldr r3, [r3, #0]
8004b0e: 691a ldr r2, [r3, #16]
8004b10: 687b ldr r3, [r7, #4]
8004b12: 681b ldr r3, [r3, #0]
8004b14: f422 4290 bic.w r2, r2, #18432 @ 0x4800
8004b18: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
8004b1a: 687b ldr r3, [r7, #4]
8004b1c: 681b ldr r3, [r3, #0]
8004b1e: 695a ldr r2, [r3, #20]
8004b20: 687b ldr r3, [r7, #4]
8004b22: 681b ldr r3, [r3, #0]
8004b24: f022 022a bic.w r2, r2, #42 @ 0x2a
8004b28: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
8004b2a: 687b ldr r3, [r7, #4]
8004b2c: 681b ldr r3, [r3, #0]
8004b2e: 68da ldr r2, [r3, #12]
8004b30: 687b ldr r3, [r7, #4]
8004b32: 681b ldr r3, [r3, #0]
8004b34: f442 5200 orr.w r2, r2, #8192 @ 0x2000
8004b38: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8004b3a: 687b ldr r3, [r7, #4]
8004b3c: 2200 movs r2, #0
8004b3e: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
8004b40: 687b ldr r3, [r7, #4]
8004b42: 2220 movs r2, #32
8004b44: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
8004b48: 687b ldr r3, [r7, #4]
8004b4a: 2220 movs r2, #32
8004b4c: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
8004b50: 687b ldr r3, [r7, #4]
8004b52: 2200 movs r2, #0
8004b54: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
8004b56: 2300 movs r3, #0
}
8004b58: 4618 mov r0, r3
8004b5a: 3708 adds r7, #8
8004b5c: 46bd mov sp, r7
8004b5e: bd80 pop {r7, pc}
08004b60 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
8004b60: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr}
8004b64: b0c0 sub sp, #256 @ 0x100
8004b66: af00 add r7, sp, #0
8004b68: f8c7 00f4 str.w r0, [r7, #244] @ 0xf4
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8004b6c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004b70: 681b ldr r3, [r3, #0]
8004b72: 691b ldr r3, [r3, #16]
8004b74: f423 5040 bic.w r0, r3, #12288 @ 0x3000
8004b78: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004b7c: 68d9 ldr r1, [r3, #12]
8004b7e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004b82: 681a ldr r2, [r3, #0]
8004b84: ea40 0301 orr.w r3, r0, r1
8004b88: 6113 str r3, [r2, #16]
Set the M bits according to huart->Init.WordLength value
Set PCE and PS bits according to huart->Init.Parity value
Set TE and RE bits according to huart->Init.Mode value
Set OVER8 bit according to huart->Init.OverSampling value */
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
8004b8a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004b8e: 689a ldr r2, [r3, #8]
8004b90: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004b94: 691b ldr r3, [r3, #16]
8004b96: 431a orrs r2, r3
8004b98: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004b9c: 695b ldr r3, [r3, #20]
8004b9e: 431a orrs r2, r3
8004ba0: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004ba4: 69db ldr r3, [r3, #28]
8004ba6: 4313 orrs r3, r2
8004ba8: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
MODIFY_REG(huart->Instance->CR1,
8004bac: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004bb0: 681b ldr r3, [r3, #0]
8004bb2: 68db ldr r3, [r3, #12]
8004bb4: f423 4116 bic.w r1, r3, #38400 @ 0x9600
8004bb8: f021 010c bic.w r1, r1, #12
8004bbc: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004bc0: 681a ldr r2, [r3, #0]
8004bc2: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8004bc6: 430b orrs r3, r1
8004bc8: 60d3 str r3, [r2, #12]
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8004bca: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004bce: 681b ldr r3, [r3, #0]
8004bd0: 695b ldr r3, [r3, #20]
8004bd2: f423 7040 bic.w r0, r3, #768 @ 0x300
8004bd6: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004bda: 6999 ldr r1, [r3, #24]
8004bdc: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004be0: 681a ldr r2, [r3, #0]
8004be2: ea40 0301 orr.w r3, r0, r1
8004be6: 6153 str r3, [r2, #20]
if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10))
{
pclk = HAL_RCC_GetPCLK2Freq();
}
#elif defined(USART6)
if ((huart->Instance == USART1) || (huart->Instance == USART6))
8004be8: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004bec: 681a ldr r2, [r3, #0]
8004bee: 4b8f ldr r3, [pc, #572] @ (8004e2c <UART_SetConfig+0x2cc>)
8004bf0: 429a cmp r2, r3
8004bf2: d005 beq.n 8004c00 <UART_SetConfig+0xa0>
8004bf4: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004bf8: 681a ldr r2, [r3, #0]
8004bfa: 4b8d ldr r3, [pc, #564] @ (8004e30 <UART_SetConfig+0x2d0>)
8004bfc: 429a cmp r2, r3
8004bfe: d104 bne.n 8004c0a <UART_SetConfig+0xaa>
{
pclk = HAL_RCC_GetPCLK2Freq();
8004c00: f7fe fb2e bl 8003260 <HAL_RCC_GetPCLK2Freq>
8004c04: f8c7 00fc str.w r0, [r7, #252] @ 0xfc
8004c08: e003 b.n 8004c12 <UART_SetConfig+0xb2>
pclk = HAL_RCC_GetPCLK2Freq();
}
#endif /* USART6 */
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8004c0a: f7fe fb15 bl 8003238 <HAL_RCC_GetPCLK1Freq>
8004c0e: f8c7 00fc str.w r0, [r7, #252] @ 0xfc
}
/*-------------------------- USART BRR Configuration ---------------------*/
if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
8004c12: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004c16: 69db ldr r3, [r3, #28]
8004c18: f5b3 4f00 cmp.w r3, #32768 @ 0x8000
8004c1c: f040 810c bne.w 8004e38 <UART_SetConfig+0x2d8>
{
huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate);
8004c20: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8004c24: 2200 movs r2, #0
8004c26: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8004c2a: f8c7 20ec str.w r2, [r7, #236] @ 0xec
8004c2e: e9d7 453a ldrd r4, r5, [r7, #232] @ 0xe8
8004c32: 4622 mov r2, r4
8004c34: 462b mov r3, r5
8004c36: 1891 adds r1, r2, r2
8004c38: 65b9 str r1, [r7, #88] @ 0x58
8004c3a: 415b adcs r3, r3
8004c3c: 65fb str r3, [r7, #92] @ 0x5c
8004c3e: e9d7 2316 ldrd r2, r3, [r7, #88] @ 0x58
8004c42: 4621 mov r1, r4
8004c44: eb12 0801 adds.w r8, r2, r1
8004c48: 4629 mov r1, r5
8004c4a: eb43 0901 adc.w r9, r3, r1
8004c4e: f04f 0200 mov.w r2, #0
8004c52: f04f 0300 mov.w r3, #0
8004c56: ea4f 03c9 mov.w r3, r9, lsl #3
8004c5a: ea43 7358 orr.w r3, r3, r8, lsr #29
8004c5e: ea4f 02c8 mov.w r2, r8, lsl #3
8004c62: 4690 mov r8, r2
8004c64: 4699 mov r9, r3
8004c66: 4623 mov r3, r4
8004c68: eb18 0303 adds.w r3, r8, r3
8004c6c: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8004c70: 462b mov r3, r5
8004c72: eb49 0303 adc.w r3, r9, r3
8004c76: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8004c7a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004c7e: 685b ldr r3, [r3, #4]
8004c80: 2200 movs r2, #0
8004c82: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8004c86: f8c7 20dc str.w r2, [r7, #220] @ 0xdc
8004c8a: e9d7 1236 ldrd r1, r2, [r7, #216] @ 0xd8
8004c8e: 460b mov r3, r1
8004c90: 18db adds r3, r3, r3
8004c92: 653b str r3, [r7, #80] @ 0x50
8004c94: 4613 mov r3, r2
8004c96: eb42 0303 adc.w r3, r2, r3
8004c9a: 657b str r3, [r7, #84] @ 0x54
8004c9c: e9d7 2314 ldrd r2, r3, [r7, #80] @ 0x50
8004ca0: e9d7 0138 ldrd r0, r1, [r7, #224] @ 0xe0
8004ca4: f7fb faae bl 8000204 <__aeabi_uldivmod>
8004ca8: 4602 mov r2, r0
8004caa: 460b mov r3, r1
8004cac: 4b61 ldr r3, [pc, #388] @ (8004e34 <UART_SetConfig+0x2d4>)
8004cae: fba3 2302 umull r2, r3, r3, r2
8004cb2: 095b lsrs r3, r3, #5
8004cb4: 011c lsls r4, r3, #4
8004cb6: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8004cba: 2200 movs r2, #0
8004cbc: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
8004cc0: f8c7 20d4 str.w r2, [r7, #212] @ 0xd4
8004cc4: e9d7 8934 ldrd r8, r9, [r7, #208] @ 0xd0
8004cc8: 4642 mov r2, r8
8004cca: 464b mov r3, r9
8004ccc: 1891 adds r1, r2, r2
8004cce: 64b9 str r1, [r7, #72] @ 0x48
8004cd0: 415b adcs r3, r3
8004cd2: 64fb str r3, [r7, #76] @ 0x4c
8004cd4: e9d7 2312 ldrd r2, r3, [r7, #72] @ 0x48
8004cd8: 4641 mov r1, r8
8004cda: eb12 0a01 adds.w sl, r2, r1
8004cde: 4649 mov r1, r9
8004ce0: eb43 0b01 adc.w fp, r3, r1
8004ce4: f04f 0200 mov.w r2, #0
8004ce8: f04f 0300 mov.w r3, #0
8004cec: ea4f 03cb mov.w r3, fp, lsl #3
8004cf0: ea43 735a orr.w r3, r3, sl, lsr #29
8004cf4: ea4f 02ca mov.w r2, sl, lsl #3
8004cf8: 4692 mov sl, r2
8004cfa: 469b mov fp, r3
8004cfc: 4643 mov r3, r8
8004cfe: eb1a 0303 adds.w r3, sl, r3
8004d02: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
8004d06: 464b mov r3, r9
8004d08: eb4b 0303 adc.w r3, fp, r3
8004d0c: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
8004d10: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004d14: 685b ldr r3, [r3, #4]
8004d16: 2200 movs r2, #0
8004d18: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
8004d1c: f8c7 20c4 str.w r2, [r7, #196] @ 0xc4
8004d20: e9d7 1230 ldrd r1, r2, [r7, #192] @ 0xc0
8004d24: 460b mov r3, r1
8004d26: 18db adds r3, r3, r3
8004d28: 643b str r3, [r7, #64] @ 0x40
8004d2a: 4613 mov r3, r2
8004d2c: eb42 0303 adc.w r3, r2, r3
8004d30: 647b str r3, [r7, #68] @ 0x44
8004d32: e9d7 2310 ldrd r2, r3, [r7, #64] @ 0x40
8004d36: e9d7 0132 ldrd r0, r1, [r7, #200] @ 0xc8
8004d3a: f7fb fa63 bl 8000204 <__aeabi_uldivmod>
8004d3e: 4602 mov r2, r0
8004d40: 460b mov r3, r1
8004d42: 4611 mov r1, r2
8004d44: 4b3b ldr r3, [pc, #236] @ (8004e34 <UART_SetConfig+0x2d4>)
8004d46: fba3 2301 umull r2, r3, r3, r1
8004d4a: 095b lsrs r3, r3, #5
8004d4c: 2264 movs r2, #100 @ 0x64
8004d4e: fb02 f303 mul.w r3, r2, r3
8004d52: 1acb subs r3, r1, r3
8004d54: 00db lsls r3, r3, #3
8004d56: f103 0232 add.w r2, r3, #50 @ 0x32
8004d5a: 4b36 ldr r3, [pc, #216] @ (8004e34 <UART_SetConfig+0x2d4>)
8004d5c: fba3 2302 umull r2, r3, r3, r2
8004d60: 095b lsrs r3, r3, #5
8004d62: 005b lsls r3, r3, #1
8004d64: f403 73f8 and.w r3, r3, #496 @ 0x1f0
8004d68: 441c add r4, r3
8004d6a: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8004d6e: 2200 movs r2, #0
8004d70: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
8004d74: f8c7 20bc str.w r2, [r7, #188] @ 0xbc
8004d78: e9d7 892e ldrd r8, r9, [r7, #184] @ 0xb8
8004d7c: 4642 mov r2, r8
8004d7e: 464b mov r3, r9
8004d80: 1891 adds r1, r2, r2
8004d82: 63b9 str r1, [r7, #56] @ 0x38
8004d84: 415b adcs r3, r3
8004d86: 63fb str r3, [r7, #60] @ 0x3c
8004d88: e9d7 230e ldrd r2, r3, [r7, #56] @ 0x38
8004d8c: 4641 mov r1, r8
8004d8e: 1851 adds r1, r2, r1
8004d90: 6339 str r1, [r7, #48] @ 0x30
8004d92: 4649 mov r1, r9
8004d94: 414b adcs r3, r1
8004d96: 637b str r3, [r7, #52] @ 0x34
8004d98: f04f 0200 mov.w r2, #0
8004d9c: f04f 0300 mov.w r3, #0
8004da0: e9d7 ab0c ldrd sl, fp, [r7, #48] @ 0x30
8004da4: 4659 mov r1, fp
8004da6: 00cb lsls r3, r1, #3
8004da8: 4651 mov r1, sl
8004daa: ea43 7351 orr.w r3, r3, r1, lsr #29
8004dae: 4651 mov r1, sl
8004db0: 00ca lsls r2, r1, #3
8004db2: 4610 mov r0, r2
8004db4: 4619 mov r1, r3
8004db6: 4603 mov r3, r0
8004db8: 4642 mov r2, r8
8004dba: 189b adds r3, r3, r2
8004dbc: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
8004dc0: 464b mov r3, r9
8004dc2: 460a mov r2, r1
8004dc4: eb42 0303 adc.w r3, r2, r3
8004dc8: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8004dcc: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004dd0: 685b ldr r3, [r3, #4]
8004dd2: 2200 movs r2, #0
8004dd4: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
8004dd8: f8c7 20ac str.w r2, [r7, #172] @ 0xac
8004ddc: e9d7 122a ldrd r1, r2, [r7, #168] @ 0xa8
8004de0: 460b mov r3, r1
8004de2: 18db adds r3, r3, r3
8004de4: 62bb str r3, [r7, #40] @ 0x28
8004de6: 4613 mov r3, r2
8004de8: eb42 0303 adc.w r3, r2, r3
8004dec: 62fb str r3, [r7, #44] @ 0x2c
8004dee: e9d7 230a ldrd r2, r3, [r7, #40] @ 0x28
8004df2: e9d7 012c ldrd r0, r1, [r7, #176] @ 0xb0
8004df6: f7fb fa05 bl 8000204 <__aeabi_uldivmod>
8004dfa: 4602 mov r2, r0
8004dfc: 460b mov r3, r1
8004dfe: 4b0d ldr r3, [pc, #52] @ (8004e34 <UART_SetConfig+0x2d4>)
8004e00: fba3 1302 umull r1, r3, r3, r2
8004e04: 095b lsrs r3, r3, #5
8004e06: 2164 movs r1, #100 @ 0x64
8004e08: fb01 f303 mul.w r3, r1, r3
8004e0c: 1ad3 subs r3, r2, r3
8004e0e: 00db lsls r3, r3, #3
8004e10: 3332 adds r3, #50 @ 0x32
8004e12: 4a08 ldr r2, [pc, #32] @ (8004e34 <UART_SetConfig+0x2d4>)
8004e14: fba2 2303 umull r2, r3, r2, r3
8004e18: 095b lsrs r3, r3, #5
8004e1a: f003 0207 and.w r2, r3, #7
8004e1e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004e22: 681b ldr r3, [r3, #0]
8004e24: 4422 add r2, r4
8004e26: 609a str r2, [r3, #8]
}
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
}
8004e28: e106 b.n 8005038 <UART_SetConfig+0x4d8>
8004e2a: bf00 nop
8004e2c: 40011000 .word 0x40011000
8004e30: 40011400 .word 0x40011400
8004e34: 51eb851f .word 0x51eb851f
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8004e38: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8004e3c: 2200 movs r2, #0
8004e3e: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
8004e42: f8c7 20a4 str.w r2, [r7, #164] @ 0xa4
8004e46: e9d7 8928 ldrd r8, r9, [r7, #160] @ 0xa0
8004e4a: 4642 mov r2, r8
8004e4c: 464b mov r3, r9
8004e4e: 1891 adds r1, r2, r2
8004e50: 6239 str r1, [r7, #32]
8004e52: 415b adcs r3, r3
8004e54: 627b str r3, [r7, #36] @ 0x24
8004e56: e9d7 2308 ldrd r2, r3, [r7, #32]
8004e5a: 4641 mov r1, r8
8004e5c: 1854 adds r4, r2, r1
8004e5e: 4649 mov r1, r9
8004e60: eb43 0501 adc.w r5, r3, r1
8004e64: f04f 0200 mov.w r2, #0
8004e68: f04f 0300 mov.w r3, #0
8004e6c: 00eb lsls r3, r5, #3
8004e6e: ea43 7354 orr.w r3, r3, r4, lsr #29
8004e72: 00e2 lsls r2, r4, #3
8004e74: 4614 mov r4, r2
8004e76: 461d mov r5, r3
8004e78: 4643 mov r3, r8
8004e7a: 18e3 adds r3, r4, r3
8004e7c: f8c7 3098 str.w r3, [r7, #152] @ 0x98
8004e80: 464b mov r3, r9
8004e82: eb45 0303 adc.w r3, r5, r3
8004e86: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8004e8a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004e8e: 685b ldr r3, [r3, #4]
8004e90: 2200 movs r2, #0
8004e92: f8c7 3090 str.w r3, [r7, #144] @ 0x90
8004e96: f8c7 2094 str.w r2, [r7, #148] @ 0x94
8004e9a: f04f 0200 mov.w r2, #0
8004e9e: f04f 0300 mov.w r3, #0
8004ea2: e9d7 4524 ldrd r4, r5, [r7, #144] @ 0x90
8004ea6: 4629 mov r1, r5
8004ea8: 008b lsls r3, r1, #2
8004eaa: 4621 mov r1, r4
8004eac: ea43 7391 orr.w r3, r3, r1, lsr #30
8004eb0: 4621 mov r1, r4
8004eb2: 008a lsls r2, r1, #2
8004eb4: e9d7 0126 ldrd r0, r1, [r7, #152] @ 0x98
8004eb8: f7fb f9a4 bl 8000204 <__aeabi_uldivmod>
8004ebc: 4602 mov r2, r0
8004ebe: 460b mov r3, r1
8004ec0: 4b60 ldr r3, [pc, #384] @ (8005044 <UART_SetConfig+0x4e4>)
8004ec2: fba3 2302 umull r2, r3, r3, r2
8004ec6: 095b lsrs r3, r3, #5
8004ec8: 011c lsls r4, r3, #4
8004eca: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8004ece: 2200 movs r2, #0
8004ed0: f8c7 3088 str.w r3, [r7, #136] @ 0x88
8004ed4: f8c7 208c str.w r2, [r7, #140] @ 0x8c
8004ed8: e9d7 8922 ldrd r8, r9, [r7, #136] @ 0x88
8004edc: 4642 mov r2, r8
8004ede: 464b mov r3, r9
8004ee0: 1891 adds r1, r2, r2
8004ee2: 61b9 str r1, [r7, #24]
8004ee4: 415b adcs r3, r3
8004ee6: 61fb str r3, [r7, #28]
8004ee8: e9d7 2306 ldrd r2, r3, [r7, #24]
8004eec: 4641 mov r1, r8
8004eee: 1851 adds r1, r2, r1
8004ef0: 6139 str r1, [r7, #16]
8004ef2: 4649 mov r1, r9
8004ef4: 414b adcs r3, r1
8004ef6: 617b str r3, [r7, #20]
8004ef8: f04f 0200 mov.w r2, #0
8004efc: f04f 0300 mov.w r3, #0
8004f00: e9d7 ab04 ldrd sl, fp, [r7, #16]
8004f04: 4659 mov r1, fp
8004f06: 00cb lsls r3, r1, #3
8004f08: 4651 mov r1, sl
8004f0a: ea43 7351 orr.w r3, r3, r1, lsr #29
8004f0e: 4651 mov r1, sl
8004f10: 00ca lsls r2, r1, #3
8004f12: 4610 mov r0, r2
8004f14: 4619 mov r1, r3
8004f16: 4603 mov r3, r0
8004f18: 4642 mov r2, r8
8004f1a: 189b adds r3, r3, r2
8004f1c: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8004f20: 464b mov r3, r9
8004f22: 460a mov r2, r1
8004f24: eb42 0303 adc.w r3, r2, r3
8004f28: f8c7 3084 str.w r3, [r7, #132] @ 0x84
8004f2c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004f30: 685b ldr r3, [r3, #4]
8004f32: 2200 movs r2, #0
8004f34: 67bb str r3, [r7, #120] @ 0x78
8004f36: 67fa str r2, [r7, #124] @ 0x7c
8004f38: f04f 0200 mov.w r2, #0
8004f3c: f04f 0300 mov.w r3, #0
8004f40: e9d7 891e ldrd r8, r9, [r7, #120] @ 0x78
8004f44: 4649 mov r1, r9
8004f46: 008b lsls r3, r1, #2
8004f48: 4641 mov r1, r8
8004f4a: ea43 7391 orr.w r3, r3, r1, lsr #30
8004f4e: 4641 mov r1, r8
8004f50: 008a lsls r2, r1, #2
8004f52: e9d7 0120 ldrd r0, r1, [r7, #128] @ 0x80
8004f56: f7fb f955 bl 8000204 <__aeabi_uldivmod>
8004f5a: 4602 mov r2, r0
8004f5c: 460b mov r3, r1
8004f5e: 4611 mov r1, r2
8004f60: 4b38 ldr r3, [pc, #224] @ (8005044 <UART_SetConfig+0x4e4>)
8004f62: fba3 2301 umull r2, r3, r3, r1
8004f66: 095b lsrs r3, r3, #5
8004f68: 2264 movs r2, #100 @ 0x64
8004f6a: fb02 f303 mul.w r3, r2, r3
8004f6e: 1acb subs r3, r1, r3
8004f70: 011b lsls r3, r3, #4
8004f72: 3332 adds r3, #50 @ 0x32
8004f74: 4a33 ldr r2, [pc, #204] @ (8005044 <UART_SetConfig+0x4e4>)
8004f76: fba2 2303 umull r2, r3, r2, r3
8004f7a: 095b lsrs r3, r3, #5
8004f7c: f003 03f0 and.w r3, r3, #240 @ 0xf0
8004f80: 441c add r4, r3
8004f82: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8004f86: 2200 movs r2, #0
8004f88: 673b str r3, [r7, #112] @ 0x70
8004f8a: 677a str r2, [r7, #116] @ 0x74
8004f8c: e9d7 891c ldrd r8, r9, [r7, #112] @ 0x70
8004f90: 4642 mov r2, r8
8004f92: 464b mov r3, r9
8004f94: 1891 adds r1, r2, r2
8004f96: 60b9 str r1, [r7, #8]
8004f98: 415b adcs r3, r3
8004f9a: 60fb str r3, [r7, #12]
8004f9c: e9d7 2302 ldrd r2, r3, [r7, #8]
8004fa0: 4641 mov r1, r8
8004fa2: 1851 adds r1, r2, r1
8004fa4: 6039 str r1, [r7, #0]
8004fa6: 4649 mov r1, r9
8004fa8: 414b adcs r3, r1
8004faa: 607b str r3, [r7, #4]
8004fac: f04f 0200 mov.w r2, #0
8004fb0: f04f 0300 mov.w r3, #0
8004fb4: e9d7 ab00 ldrd sl, fp, [r7]
8004fb8: 4659 mov r1, fp
8004fba: 00cb lsls r3, r1, #3
8004fbc: 4651 mov r1, sl
8004fbe: ea43 7351 orr.w r3, r3, r1, lsr #29
8004fc2: 4651 mov r1, sl
8004fc4: 00ca lsls r2, r1, #3
8004fc6: 4610 mov r0, r2
8004fc8: 4619 mov r1, r3
8004fca: 4603 mov r3, r0
8004fcc: 4642 mov r2, r8
8004fce: 189b adds r3, r3, r2
8004fd0: 66bb str r3, [r7, #104] @ 0x68
8004fd2: 464b mov r3, r9
8004fd4: 460a mov r2, r1
8004fd6: eb42 0303 adc.w r3, r2, r3
8004fda: 66fb str r3, [r7, #108] @ 0x6c
8004fdc: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8004fe0: 685b ldr r3, [r3, #4]
8004fe2: 2200 movs r2, #0
8004fe4: 663b str r3, [r7, #96] @ 0x60
8004fe6: 667a str r2, [r7, #100] @ 0x64
8004fe8: f04f 0200 mov.w r2, #0
8004fec: f04f 0300 mov.w r3, #0
8004ff0: e9d7 8918 ldrd r8, r9, [r7, #96] @ 0x60
8004ff4: 4649 mov r1, r9
8004ff6: 008b lsls r3, r1, #2
8004ff8: 4641 mov r1, r8
8004ffa: ea43 7391 orr.w r3, r3, r1, lsr #30
8004ffe: 4641 mov r1, r8
8005000: 008a lsls r2, r1, #2
8005002: e9d7 011a ldrd r0, r1, [r7, #104] @ 0x68
8005006: f7fb f8fd bl 8000204 <__aeabi_uldivmod>
800500a: 4602 mov r2, r0
800500c: 460b mov r3, r1
800500e: 4b0d ldr r3, [pc, #52] @ (8005044 <UART_SetConfig+0x4e4>)
8005010: fba3 1302 umull r1, r3, r3, r2
8005014: 095b lsrs r3, r3, #5
8005016: 2164 movs r1, #100 @ 0x64
8005018: fb01 f303 mul.w r3, r1, r3
800501c: 1ad3 subs r3, r2, r3
800501e: 011b lsls r3, r3, #4
8005020: 3332 adds r3, #50 @ 0x32
8005022: 4a08 ldr r2, [pc, #32] @ (8005044 <UART_SetConfig+0x4e4>)
8005024: fba2 2303 umull r2, r3, r2, r3
8005028: 095b lsrs r3, r3, #5
800502a: f003 020f and.w r2, r3, #15
800502e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8005032: 681b ldr r3, [r3, #0]
8005034: 4422 add r2, r4
8005036: 609a str r2, [r3, #8]
}
8005038: bf00 nop
800503a: f507 7780 add.w r7, r7, #256 @ 0x100
800503e: 46bd mov sp, r7
8005040: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc}
8005044: 51eb851f .word 0x51eb851f
08005048 <USB_CoreInit>:
* @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
{
8005048: b084 sub sp, #16
800504a: b580 push {r7, lr}
800504c: b084 sub sp, #16
800504e: af00 add r7, sp, #0
8005050: 6078 str r0, [r7, #4]
8005052: f107 001c add.w r0, r7, #28
8005056: e880 000e stmia.w r0, {r1, r2, r3}
HAL_StatusTypeDef ret;
if (cfg.phy_itface == USB_OTG_ULPI_PHY)
800505a: f897 3021 ldrb.w r3, [r7, #33] @ 0x21
800505e: 2b01 cmp r3, #1
8005060: d123 bne.n 80050aa <USB_CoreInit+0x62>
{
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
8005062: 687b ldr r3, [r7, #4]
8005064: 6b9b ldr r3, [r3, #56] @ 0x38
8005066: f423 3280 bic.w r2, r3, #65536 @ 0x10000
800506a: 687b ldr r3, [r7, #4]
800506c: 639a str r2, [r3, #56] @ 0x38
/* Init The ULPI Interface */
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL);
800506e: 687b ldr r3, [r7, #4]
8005070: 68db ldr r3, [r3, #12]
8005072: f423 0384 bic.w r3, r3, #4325376 @ 0x420000
8005076: f023 0340 bic.w r3, r3, #64 @ 0x40
800507a: 687a ldr r2, [r7, #4]
800507c: 60d3 str r3, [r2, #12]
/* Select vbus source */
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI);
800507e: 687b ldr r3, [r7, #4]
8005080: 68db ldr r3, [r3, #12]
8005082: f423 1240 bic.w r2, r3, #3145728 @ 0x300000
8005086: 687b ldr r3, [r7, #4]
8005088: 60da str r2, [r3, #12]
if (cfg.use_external_vbus == 1U)
800508a: f897 3028 ldrb.w r3, [r7, #40] @ 0x28
800508e: 2b01 cmp r3, #1
8005090: d105 bne.n 800509e <USB_CoreInit+0x56>
{
USBx->GUSBCFG |= USB_OTG_GUSBCFG_ULPIEVBUSD;
8005092: 687b ldr r3, [r7, #4]
8005094: 68db ldr r3, [r3, #12]
8005096: f443 1280 orr.w r2, r3, #1048576 @ 0x100000
800509a: 687b ldr r3, [r7, #4]
800509c: 60da str r2, [r3, #12]
}
/* Reset after a PHY select */
ret = USB_CoreReset(USBx);
800509e: 6878 ldr r0, [r7, #4]
80050a0: f001 fae2 bl 8006668 <USB_CoreReset>
80050a4: 4603 mov r3, r0
80050a6: 73fb strb r3, [r7, #15]
80050a8: e01b b.n 80050e2 <USB_CoreInit+0x9a>
}
else /* FS interface (embedded Phy) */
{
/* Select FS Embedded PHY */
USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
80050aa: 687b ldr r3, [r7, #4]
80050ac: 68db ldr r3, [r3, #12]
80050ae: f043 0240 orr.w r2, r3, #64 @ 0x40
80050b2: 687b ldr r3, [r7, #4]
80050b4: 60da str r2, [r3, #12]
/* Reset after a PHY select */
ret = USB_CoreReset(USBx);
80050b6: 6878 ldr r0, [r7, #4]
80050b8: f001 fad6 bl 8006668 <USB_CoreReset>
80050bc: 4603 mov r3, r0
80050be: 73fb strb r3, [r7, #15]
if (cfg.battery_charging_enable == 0U)
80050c0: f897 3025 ldrb.w r3, [r7, #37] @ 0x25
80050c4: 2b00 cmp r3, #0
80050c6: d106 bne.n 80050d6 <USB_CoreInit+0x8e>
{
/* Activate the USB Transceiver */
USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN;
80050c8: 687b ldr r3, [r7, #4]
80050ca: 6b9b ldr r3, [r3, #56] @ 0x38
80050cc: f443 3280 orr.w r2, r3, #65536 @ 0x10000
80050d0: 687b ldr r3, [r7, #4]
80050d2: 639a str r2, [r3, #56] @ 0x38
80050d4: e005 b.n 80050e2 <USB_CoreInit+0x9a>
}
else
{
/* Deactivate the USB Transceiver */
USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN);
80050d6: 687b ldr r3, [r7, #4]
80050d8: 6b9b ldr r3, [r3, #56] @ 0x38
80050da: f423 3280 bic.w r2, r3, #65536 @ 0x10000
80050de: 687b ldr r3, [r7, #4]
80050e0: 639a str r2, [r3, #56] @ 0x38
}
}
if (cfg.dma_enable == 1U)
80050e2: 7fbb ldrb r3, [r7, #30]
80050e4: 2b01 cmp r3, #1
80050e6: d10b bne.n 8005100 <USB_CoreInit+0xb8>
{
USBx->GAHBCFG |= USB_OTG_GAHBCFG_HBSTLEN_2;
80050e8: 687b ldr r3, [r7, #4]
80050ea: 689b ldr r3, [r3, #8]
80050ec: f043 0206 orr.w r2, r3, #6
80050f0: 687b ldr r3, [r7, #4]
80050f2: 609a str r2, [r3, #8]
USBx->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN;
80050f4: 687b ldr r3, [r7, #4]
80050f6: 689b ldr r3, [r3, #8]
80050f8: f043 0220 orr.w r2, r3, #32
80050fc: 687b ldr r3, [r7, #4]
80050fe: 609a str r2, [r3, #8]
}
return ret;
8005100: 7bfb ldrb r3, [r7, #15]
}
8005102: 4618 mov r0, r3
8005104: 3710 adds r7, #16
8005106: 46bd mov sp, r7
8005108: e8bd 4080 ldmia.w sp!, {r7, lr}
800510c: b004 add sp, #16
800510e: 4770 bx lr
08005110 <USB_SetTurnaroundTime>:
* @param hclk: AHB clock frequency
* @retval USB turnaround time In PHY Clocks number
*/
HAL_StatusTypeDef USB_SetTurnaroundTime(USB_OTG_GlobalTypeDef *USBx,
uint32_t hclk, uint8_t speed)
{
8005110: b480 push {r7}
8005112: b087 sub sp, #28
8005114: af00 add r7, sp, #0
8005116: 60f8 str r0, [r7, #12]
8005118: 60b9 str r1, [r7, #8]
800511a: 4613 mov r3, r2
800511c: 71fb strb r3, [r7, #7]
/* The USBTRD is configured according to the tables below, depending on AHB frequency
used by application. In the low AHB frequency range it is used to stretch enough the USB response
time to IN tokens, the USB turnaround time, so to compensate for the longer AHB read access
latency to the Data FIFO */
if (speed == USBD_FS_SPEED)
800511e: 79fb ldrb r3, [r7, #7]
8005120: 2b02 cmp r3, #2
8005122: d165 bne.n 80051f0 <USB_SetTurnaroundTime+0xe0>
{
if ((hclk >= 14200000U) && (hclk < 15000000U))
8005124: 68bb ldr r3, [r7, #8]
8005126: 4a41 ldr r2, [pc, #260] @ (800522c <USB_SetTurnaroundTime+0x11c>)
8005128: 4293 cmp r3, r2
800512a: d906 bls.n 800513a <USB_SetTurnaroundTime+0x2a>
800512c: 68bb ldr r3, [r7, #8]
800512e: 4a40 ldr r2, [pc, #256] @ (8005230 <USB_SetTurnaroundTime+0x120>)
8005130: 4293 cmp r3, r2
8005132: d202 bcs.n 800513a <USB_SetTurnaroundTime+0x2a>
{
/* hclk Clock Range between 14.2-15 MHz */
UsbTrd = 0xFU;
8005134: 230f movs r3, #15
8005136: 617b str r3, [r7, #20]
8005138: e062 b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 15000000U) && (hclk < 16000000U))
800513a: 68bb ldr r3, [r7, #8]
800513c: 4a3c ldr r2, [pc, #240] @ (8005230 <USB_SetTurnaroundTime+0x120>)
800513e: 4293 cmp r3, r2
8005140: d306 bcc.n 8005150 <USB_SetTurnaroundTime+0x40>
8005142: 68bb ldr r3, [r7, #8]
8005144: 4a3b ldr r2, [pc, #236] @ (8005234 <USB_SetTurnaroundTime+0x124>)
8005146: 4293 cmp r3, r2
8005148: d202 bcs.n 8005150 <USB_SetTurnaroundTime+0x40>
{
/* hclk Clock Range between 15-16 MHz */
UsbTrd = 0xEU;
800514a: 230e movs r3, #14
800514c: 617b str r3, [r7, #20]
800514e: e057 b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 16000000U) && (hclk < 17200000U))
8005150: 68bb ldr r3, [r7, #8]
8005152: 4a38 ldr r2, [pc, #224] @ (8005234 <USB_SetTurnaroundTime+0x124>)
8005154: 4293 cmp r3, r2
8005156: d306 bcc.n 8005166 <USB_SetTurnaroundTime+0x56>
8005158: 68bb ldr r3, [r7, #8]
800515a: 4a37 ldr r2, [pc, #220] @ (8005238 <USB_SetTurnaroundTime+0x128>)
800515c: 4293 cmp r3, r2
800515e: d202 bcs.n 8005166 <USB_SetTurnaroundTime+0x56>
{
/* hclk Clock Range between 16-17.2 MHz */
UsbTrd = 0xDU;
8005160: 230d movs r3, #13
8005162: 617b str r3, [r7, #20]
8005164: e04c b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 17200000U) && (hclk < 18500000U))
8005166: 68bb ldr r3, [r7, #8]
8005168: 4a33 ldr r2, [pc, #204] @ (8005238 <USB_SetTurnaroundTime+0x128>)
800516a: 4293 cmp r3, r2
800516c: d306 bcc.n 800517c <USB_SetTurnaroundTime+0x6c>
800516e: 68bb ldr r3, [r7, #8]
8005170: 4a32 ldr r2, [pc, #200] @ (800523c <USB_SetTurnaroundTime+0x12c>)
8005172: 4293 cmp r3, r2
8005174: d802 bhi.n 800517c <USB_SetTurnaroundTime+0x6c>
{
/* hclk Clock Range between 17.2-18.5 MHz */
UsbTrd = 0xCU;
8005176: 230c movs r3, #12
8005178: 617b str r3, [r7, #20]
800517a: e041 b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 18500000U) && (hclk < 20000000U))
800517c: 68bb ldr r3, [r7, #8]
800517e: 4a2f ldr r2, [pc, #188] @ (800523c <USB_SetTurnaroundTime+0x12c>)
8005180: 4293 cmp r3, r2
8005182: d906 bls.n 8005192 <USB_SetTurnaroundTime+0x82>
8005184: 68bb ldr r3, [r7, #8]
8005186: 4a2e ldr r2, [pc, #184] @ (8005240 <USB_SetTurnaroundTime+0x130>)
8005188: 4293 cmp r3, r2
800518a: d802 bhi.n 8005192 <USB_SetTurnaroundTime+0x82>
{
/* hclk Clock Range between 18.5-20 MHz */
UsbTrd = 0xBU;
800518c: 230b movs r3, #11
800518e: 617b str r3, [r7, #20]
8005190: e036 b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 20000000U) && (hclk < 21800000U))
8005192: 68bb ldr r3, [r7, #8]
8005194: 4a2a ldr r2, [pc, #168] @ (8005240 <USB_SetTurnaroundTime+0x130>)
8005196: 4293 cmp r3, r2
8005198: d906 bls.n 80051a8 <USB_SetTurnaroundTime+0x98>
800519a: 68bb ldr r3, [r7, #8]
800519c: 4a29 ldr r2, [pc, #164] @ (8005244 <USB_SetTurnaroundTime+0x134>)
800519e: 4293 cmp r3, r2
80051a0: d802 bhi.n 80051a8 <USB_SetTurnaroundTime+0x98>
{
/* hclk Clock Range between 20-21.8 MHz */
UsbTrd = 0xAU;
80051a2: 230a movs r3, #10
80051a4: 617b str r3, [r7, #20]
80051a6: e02b b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 21800000U) && (hclk < 24000000U))
80051a8: 68bb ldr r3, [r7, #8]
80051aa: 4a26 ldr r2, [pc, #152] @ (8005244 <USB_SetTurnaroundTime+0x134>)
80051ac: 4293 cmp r3, r2
80051ae: d906 bls.n 80051be <USB_SetTurnaroundTime+0xae>
80051b0: 68bb ldr r3, [r7, #8]
80051b2: 4a25 ldr r2, [pc, #148] @ (8005248 <USB_SetTurnaroundTime+0x138>)
80051b4: 4293 cmp r3, r2
80051b6: d202 bcs.n 80051be <USB_SetTurnaroundTime+0xae>
{
/* hclk Clock Range between 21.8-24 MHz */
UsbTrd = 0x9U;
80051b8: 2309 movs r3, #9
80051ba: 617b str r3, [r7, #20]
80051bc: e020 b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 24000000U) && (hclk < 27700000U))
80051be: 68bb ldr r3, [r7, #8]
80051c0: 4a21 ldr r2, [pc, #132] @ (8005248 <USB_SetTurnaroundTime+0x138>)
80051c2: 4293 cmp r3, r2
80051c4: d306 bcc.n 80051d4 <USB_SetTurnaroundTime+0xc4>
80051c6: 68bb ldr r3, [r7, #8]
80051c8: 4a20 ldr r2, [pc, #128] @ (800524c <USB_SetTurnaroundTime+0x13c>)
80051ca: 4293 cmp r3, r2
80051cc: d802 bhi.n 80051d4 <USB_SetTurnaroundTime+0xc4>
{
/* hclk Clock Range between 24-27.7 MHz */
UsbTrd = 0x8U;
80051ce: 2308 movs r3, #8
80051d0: 617b str r3, [r7, #20]
80051d2: e015 b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
else if ((hclk >= 27700000U) && (hclk < 32000000U))
80051d4: 68bb ldr r3, [r7, #8]
80051d6: 4a1d ldr r2, [pc, #116] @ (800524c <USB_SetTurnaroundTime+0x13c>)
80051d8: 4293 cmp r3, r2
80051da: d906 bls.n 80051ea <USB_SetTurnaroundTime+0xda>
80051dc: 68bb ldr r3, [r7, #8]
80051de: 4a1c ldr r2, [pc, #112] @ (8005250 <USB_SetTurnaroundTime+0x140>)
80051e0: 4293 cmp r3, r2
80051e2: d202 bcs.n 80051ea <USB_SetTurnaroundTime+0xda>
{
/* hclk Clock Range between 27.7-32 MHz */
UsbTrd = 0x7U;
80051e4: 2307 movs r3, #7
80051e6: 617b str r3, [r7, #20]
80051e8: e00a b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
else /* if(hclk >= 32000000) */
{
/* hclk Clock Range between 32-200 MHz */
UsbTrd = 0x6U;
80051ea: 2306 movs r3, #6
80051ec: 617b str r3, [r7, #20]
80051ee: e007 b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
}
else if (speed == USBD_HS_SPEED)
80051f0: 79fb ldrb r3, [r7, #7]
80051f2: 2b00 cmp r3, #0
80051f4: d102 bne.n 80051fc <USB_SetTurnaroundTime+0xec>
{
UsbTrd = USBD_HS_TRDT_VALUE;
80051f6: 2309 movs r3, #9
80051f8: 617b str r3, [r7, #20]
80051fa: e001 b.n 8005200 <USB_SetTurnaroundTime+0xf0>
}
else
{
UsbTrd = USBD_DEFAULT_TRDT_VALUE;
80051fc: 2309 movs r3, #9
80051fe: 617b str r3, [r7, #20]
}
USBx->GUSBCFG &= ~USB_OTG_GUSBCFG_TRDT;
8005200: 68fb ldr r3, [r7, #12]
8005202: 68db ldr r3, [r3, #12]
8005204: f423 5270 bic.w r2, r3, #15360 @ 0x3c00
8005208: 68fb ldr r3, [r7, #12]
800520a: 60da str r2, [r3, #12]
USBx->GUSBCFG |= (uint32_t)((UsbTrd << 10) & USB_OTG_GUSBCFG_TRDT);
800520c: 68fb ldr r3, [r7, #12]
800520e: 68da ldr r2, [r3, #12]
8005210: 697b ldr r3, [r7, #20]
8005212: 029b lsls r3, r3, #10
8005214: f403 5370 and.w r3, r3, #15360 @ 0x3c00
8005218: 431a orrs r2, r3
800521a: 68fb ldr r3, [r7, #12]
800521c: 60da str r2, [r3, #12]
return HAL_OK;
800521e: 2300 movs r3, #0
}
8005220: 4618 mov r0, r3
8005222: 371c adds r7, #28
8005224: 46bd mov sp, r7
8005226: f85d 7b04 ldr.w r7, [sp], #4
800522a: 4770 bx lr
800522c: 00d8acbf .word 0x00d8acbf
8005230: 00e4e1c0 .word 0x00e4e1c0
8005234: 00f42400 .word 0x00f42400
8005238: 01067380 .word 0x01067380
800523c: 011a499f .word 0x011a499f
8005240: 01312cff .word 0x01312cff
8005244: 014ca43f .word 0x014ca43f
8005248: 016e3600 .word 0x016e3600
800524c: 01a6ab1f .word 0x01a6ab1f
8005250: 01e84800 .word 0x01e84800
08005254 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
{
8005254: b480 push {r7}
8005256: b083 sub sp, #12
8005258: af00 add r7, sp, #0
800525a: 6078 str r0, [r7, #4]
USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT;
800525c: 687b ldr r3, [r7, #4]
800525e: 689b ldr r3, [r3, #8]
8005260: f043 0201 orr.w r2, r3, #1
8005264: 687b ldr r3, [r7, #4]
8005266: 609a str r2, [r3, #8]
return HAL_OK;
8005268: 2300 movs r3, #0
}
800526a: 4618 mov r0, r3
800526c: 370c adds r7, #12
800526e: 46bd mov sp, r7
8005270: f85d 7b04 ldr.w r7, [sp], #4
8005274: 4770 bx lr
08005276 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
{
8005276: b480 push {r7}
8005278: b083 sub sp, #12
800527a: af00 add r7, sp, #0
800527c: 6078 str r0, [r7, #4]
USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
800527e: 687b ldr r3, [r7, #4]
8005280: 689b ldr r3, [r3, #8]
8005282: f023 0201 bic.w r2, r3, #1
8005286: 687b ldr r3, [r7, #4]
8005288: 609a str r2, [r3, #8]
return HAL_OK;
800528a: 2300 movs r3, #0
}
800528c: 4618 mov r0, r3
800528e: 370c adds r7, #12
8005290: 46bd mov sp, r7
8005292: f85d 7b04 ldr.w r7, [sp], #4
8005296: 4770 bx lr
08005298 <USB_SetCurrentMode>:
* @arg USB_DEVICE_MODE Peripheral mode
* @arg USB_HOST_MODE Host mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode)
{
8005298: b580 push {r7, lr}
800529a: b084 sub sp, #16
800529c: af00 add r7, sp, #0
800529e: 6078 str r0, [r7, #4]
80052a0: 460b mov r3, r1
80052a2: 70fb strb r3, [r7, #3]
uint32_t ms = 0U;
80052a4: 2300 movs r3, #0
80052a6: 60fb str r3, [r7, #12]
USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD);
80052a8: 687b ldr r3, [r7, #4]
80052aa: 68db ldr r3, [r3, #12]
80052ac: f023 42c0 bic.w r2, r3, #1610612736 @ 0x60000000
80052b0: 687b ldr r3, [r7, #4]
80052b2: 60da str r2, [r3, #12]
if (mode == USB_HOST_MODE)
80052b4: 78fb ldrb r3, [r7, #3]
80052b6: 2b01 cmp r3, #1
80052b8: d115 bne.n 80052e6 <USB_SetCurrentMode+0x4e>
{
USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD;
80052ba: 687b ldr r3, [r7, #4]
80052bc: 68db ldr r3, [r3, #12]
80052be: f043 5200 orr.w r2, r3, #536870912 @ 0x20000000
80052c2: 687b ldr r3, [r7, #4]
80052c4: 60da str r2, [r3, #12]
do
{
HAL_Delay(10U);
80052c6: 200a movs r0, #10
80052c8: f7fb fffe bl 80012c8 <HAL_Delay>
ms += 10U;
80052cc: 68fb ldr r3, [r7, #12]
80052ce: 330a adds r3, #10
80052d0: 60fb str r3, [r7, #12]
} while ((USB_GetMode(USBx) != (uint32_t)USB_HOST_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS));
80052d2: 6878 ldr r0, [r7, #4]
80052d4: f001 f939 bl 800654a <USB_GetMode>
80052d8: 4603 mov r3, r0
80052da: 2b01 cmp r3, #1
80052dc: d01e beq.n 800531c <USB_SetCurrentMode+0x84>
80052de: 68fb ldr r3, [r7, #12]
80052e0: 2bc7 cmp r3, #199 @ 0xc7
80052e2: d9f0 bls.n 80052c6 <USB_SetCurrentMode+0x2e>
80052e4: e01a b.n 800531c <USB_SetCurrentMode+0x84>
}
else if (mode == USB_DEVICE_MODE)
80052e6: 78fb ldrb r3, [r7, #3]
80052e8: 2b00 cmp r3, #0
80052ea: d115 bne.n 8005318 <USB_SetCurrentMode+0x80>
{
USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
80052ec: 687b ldr r3, [r7, #4]
80052ee: 68db ldr r3, [r3, #12]
80052f0: f043 4280 orr.w r2, r3, #1073741824 @ 0x40000000
80052f4: 687b ldr r3, [r7, #4]
80052f6: 60da str r2, [r3, #12]
do
{
HAL_Delay(10U);
80052f8: 200a movs r0, #10
80052fa: f7fb ffe5 bl 80012c8 <HAL_Delay>
ms += 10U;
80052fe: 68fb ldr r3, [r7, #12]
8005300: 330a adds r3, #10
8005302: 60fb str r3, [r7, #12]
} while ((USB_GetMode(USBx) != (uint32_t)USB_DEVICE_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS));
8005304: 6878 ldr r0, [r7, #4]
8005306: f001 f920 bl 800654a <USB_GetMode>
800530a: 4603 mov r3, r0
800530c: 2b00 cmp r3, #0
800530e: d005 beq.n 800531c <USB_SetCurrentMode+0x84>
8005310: 68fb ldr r3, [r7, #12]
8005312: 2bc7 cmp r3, #199 @ 0xc7
8005314: d9f0 bls.n 80052f8 <USB_SetCurrentMode+0x60>
8005316: e001 b.n 800531c <USB_SetCurrentMode+0x84>
}
else
{
return HAL_ERROR;
8005318: 2301 movs r3, #1
800531a: e005 b.n 8005328 <USB_SetCurrentMode+0x90>
}
if (ms == HAL_USB_CURRENT_MODE_MAX_DELAY_MS)
800531c: 68fb ldr r3, [r7, #12]
800531e: 2bc8 cmp r3, #200 @ 0xc8
8005320: d101 bne.n 8005326 <USB_SetCurrentMode+0x8e>
{
return HAL_ERROR;
8005322: 2301 movs r3, #1
8005324: e000 b.n 8005328 <USB_SetCurrentMode+0x90>
}
return HAL_OK;
8005326: 2300 movs r3, #0
}
8005328: 4618 mov r0, r3
800532a: 3710 adds r7, #16
800532c: 46bd mov sp, r7
800532e: bd80 pop {r7, pc}
08005330 <USB_DevInit>:
* @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
{
8005330: b084 sub sp, #16
8005332: b580 push {r7, lr}
8005334: b086 sub sp, #24
8005336: af00 add r7, sp, #0
8005338: 6078 str r0, [r7, #4]
800533a: f107 0024 add.w r0, r7, #36 @ 0x24
800533e: e880 000e stmia.w r0, {r1, r2, r3}
HAL_StatusTypeDef ret = HAL_OK;
8005342: 2300 movs r3, #0
8005344: 75fb strb r3, [r7, #23]
uint32_t USBx_BASE = (uint32_t)USBx;
8005346: 687b ldr r3, [r7, #4]
8005348: 60fb str r3, [r7, #12]
uint32_t i;
for (i = 0U; i < 15U; i++)
800534a: 2300 movs r3, #0
800534c: 613b str r3, [r7, #16]
800534e: e009 b.n 8005364 <USB_DevInit+0x34>
{
USBx->DIEPTXF[i] = 0U;
8005350: 687a ldr r2, [r7, #4]
8005352: 693b ldr r3, [r7, #16]
8005354: 3340 adds r3, #64 @ 0x40
8005356: 009b lsls r3, r3, #2
8005358: 4413 add r3, r2
800535a: 2200 movs r2, #0
800535c: 605a str r2, [r3, #4]
for (i = 0U; i < 15U; i++)
800535e: 693b ldr r3, [r7, #16]
8005360: 3301 adds r3, #1
8005362: 613b str r3, [r7, #16]
8005364: 693b ldr r3, [r7, #16]
8005366: 2b0e cmp r3, #14
8005368: d9f2 bls.n 8005350 <USB_DevInit+0x20>
#if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \
|| defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \
|| defined(STM32F423xx)
/* VBUS Sensing setup */
if (cfg.vbus_sensing_enable == 0U)
800536a: f897 302e ldrb.w r3, [r7, #46] @ 0x2e
800536e: 2b00 cmp r3, #0
8005370: d11c bne.n 80053ac <USB_DevInit+0x7c>
{
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS;
8005372: 68fb ldr r3, [r7, #12]
8005374: f503 6300 add.w r3, r3, #2048 @ 0x800
8005378: 685b ldr r3, [r3, #4]
800537a: 68fa ldr r2, [r7, #12]
800537c: f502 6200 add.w r2, r2, #2048 @ 0x800
8005380: f043 0302 orr.w r3, r3, #2
8005384: 6053 str r3, [r2, #4]
/* Deactivate VBUS Sensing B */
USBx->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
8005386: 687b ldr r3, [r7, #4]
8005388: 6b9b ldr r3, [r3, #56] @ 0x38
800538a: f423 1200 bic.w r2, r3, #2097152 @ 0x200000
800538e: 687b ldr r3, [r7, #4]
8005390: 639a str r2, [r3, #56] @ 0x38
/* B-peripheral session valid override enable */
USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
8005392: 687b ldr r3, [r7, #4]
8005394: 681b ldr r3, [r3, #0]
8005396: f043 0240 orr.w r2, r3, #64 @ 0x40
800539a: 687b ldr r3, [r7, #4]
800539c: 601a str r2, [r3, #0]
USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
800539e: 687b ldr r3, [r7, #4]
80053a0: 681b ldr r3, [r3, #0]
80053a2: f043 0280 orr.w r2, r3, #128 @ 0x80
80053a6: 687b ldr r3, [r7, #4]
80053a8: 601a str r2, [r3, #0]
80053aa: e005 b.n 80053b8 <USB_DevInit+0x88>
}
else
{
/* Enable HW VBUS sensing */
USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
80053ac: 687b ldr r3, [r7, #4]
80053ae: 6b9b ldr r3, [r3, #56] @ 0x38
80053b0: f443 1200 orr.w r2, r3, #2097152 @ 0x200000
80053b4: 687b ldr r3, [r7, #4]
80053b6: 639a str r2, [r3, #56] @ 0x38
#endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) ||
defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) ||
defined(STM32F423xx) */
/* Restart the Phy Clock */
USBx_PCGCCTL = 0U;
80053b8: 68fb ldr r3, [r7, #12]
80053ba: f503 6360 add.w r3, r3, #3584 @ 0xe00
80053be: 461a mov r2, r3
80053c0: 2300 movs r3, #0
80053c2: 6013 str r3, [r2, #0]
if (cfg.phy_itface == USB_OTG_ULPI_PHY)
80053c4: f897 3029 ldrb.w r3, [r7, #41] @ 0x29
80053c8: 2b01 cmp r3, #1
80053ca: d10d bne.n 80053e8 <USB_DevInit+0xb8>
{
if (cfg.speed == USBD_HS_SPEED)
80053cc: f897 3027 ldrb.w r3, [r7, #39] @ 0x27
80053d0: 2b00 cmp r3, #0
80053d2: d104 bne.n 80053de <USB_DevInit+0xae>
{
/* Set Core speed to High speed mode */
(void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_HIGH);
80053d4: 2100 movs r1, #0
80053d6: 6878 ldr r0, [r7, #4]
80053d8: f000 f968 bl 80056ac <USB_SetDevSpeed>
80053dc: e008 b.n 80053f0 <USB_DevInit+0xc0>
}
else
{
/* Set Core speed to Full speed mode */
(void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_HIGH_IN_FULL);
80053de: 2101 movs r1, #1
80053e0: 6878 ldr r0, [r7, #4]
80053e2: f000 f963 bl 80056ac <USB_SetDevSpeed>
80053e6: e003 b.n 80053f0 <USB_DevInit+0xc0>
}
}
else
{
/* Set Core speed to Full speed mode */
(void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_FULL);
80053e8: 2103 movs r1, #3
80053ea: 6878 ldr r0, [r7, #4]
80053ec: f000 f95e bl 80056ac <USB_SetDevSpeed>
}
/* Flush the FIFOs */
if (USB_FlushTxFifo(USBx, 0x10U) != HAL_OK) /* all Tx FIFOs */
80053f0: 2110 movs r1, #16
80053f2: 6878 ldr r0, [r7, #4]
80053f4: f000 f8fa bl 80055ec <USB_FlushTxFifo>
80053f8: 4603 mov r3, r0
80053fa: 2b00 cmp r3, #0
80053fc: d001 beq.n 8005402 <USB_DevInit+0xd2>
{
ret = HAL_ERROR;
80053fe: 2301 movs r3, #1
8005400: 75fb strb r3, [r7, #23]
}
if (USB_FlushRxFifo(USBx) != HAL_OK)
8005402: 6878 ldr r0, [r7, #4]
8005404: f000 f924 bl 8005650 <USB_FlushRxFifo>
8005408: 4603 mov r3, r0
800540a: 2b00 cmp r3, #0
800540c: d001 beq.n 8005412 <USB_DevInit+0xe2>
{
ret = HAL_ERROR;
800540e: 2301 movs r3, #1
8005410: 75fb strb r3, [r7, #23]
}
/* Clear all pending Device Interrupts */
USBx_DEVICE->DIEPMSK = 0U;
8005412: 68fb ldr r3, [r7, #12]
8005414: f503 6300 add.w r3, r3, #2048 @ 0x800
8005418: 461a mov r2, r3
800541a: 2300 movs r3, #0
800541c: 6113 str r3, [r2, #16]
USBx_DEVICE->DOEPMSK = 0U;
800541e: 68fb ldr r3, [r7, #12]
8005420: f503 6300 add.w r3, r3, #2048 @ 0x800
8005424: 461a mov r2, r3
8005426: 2300 movs r3, #0
8005428: 6153 str r3, [r2, #20]
USBx_DEVICE->DAINTMSK = 0U;
800542a: 68fb ldr r3, [r7, #12]
800542c: f503 6300 add.w r3, r3, #2048 @ 0x800
8005430: 461a mov r2, r3
8005432: 2300 movs r3, #0
8005434: 61d3 str r3, [r2, #28]
for (i = 0U; i < cfg.dev_endpoints; i++)
8005436: 2300 movs r3, #0
8005438: 613b str r3, [r7, #16]
800543a: e043 b.n 80054c4 <USB_DevInit+0x194>
{
if ((USBx_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
800543c: 693b ldr r3, [r7, #16]
800543e: 015a lsls r2, r3, #5
8005440: 68fb ldr r3, [r7, #12]
8005442: 4413 add r3, r2
8005444: f503 6310 add.w r3, r3, #2304 @ 0x900
8005448: 681b ldr r3, [r3, #0]
800544a: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
800544e: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8005452: d118 bne.n 8005486 <USB_DevInit+0x156>
{
if (i == 0U)
8005454: 693b ldr r3, [r7, #16]
8005456: 2b00 cmp r3, #0
8005458: d10a bne.n 8005470 <USB_DevInit+0x140>
{
USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_SNAK;
800545a: 693b ldr r3, [r7, #16]
800545c: 015a lsls r2, r3, #5
800545e: 68fb ldr r3, [r7, #12]
8005460: 4413 add r3, r2
8005462: f503 6310 add.w r3, r3, #2304 @ 0x900
8005466: 461a mov r2, r3
8005468: f04f 6300 mov.w r3, #134217728 @ 0x8000000
800546c: 6013 str r3, [r2, #0]
800546e: e013 b.n 8005498 <USB_DevInit+0x168>
}
else
{
USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK;
8005470: 693b ldr r3, [r7, #16]
8005472: 015a lsls r2, r3, #5
8005474: 68fb ldr r3, [r7, #12]
8005476: 4413 add r3, r2
8005478: f503 6310 add.w r3, r3, #2304 @ 0x900
800547c: 461a mov r2, r3
800547e: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
8005482: 6013 str r3, [r2, #0]
8005484: e008 b.n 8005498 <USB_DevInit+0x168>
}
}
else
{
USBx_INEP(i)->DIEPCTL = 0U;
8005486: 693b ldr r3, [r7, #16]
8005488: 015a lsls r2, r3, #5
800548a: 68fb ldr r3, [r7, #12]
800548c: 4413 add r3, r2
800548e: f503 6310 add.w r3, r3, #2304 @ 0x900
8005492: 461a mov r2, r3
8005494: 2300 movs r3, #0
8005496: 6013 str r3, [r2, #0]
}
USBx_INEP(i)->DIEPTSIZ = 0U;
8005498: 693b ldr r3, [r7, #16]
800549a: 015a lsls r2, r3, #5
800549c: 68fb ldr r3, [r7, #12]
800549e: 4413 add r3, r2
80054a0: f503 6310 add.w r3, r3, #2304 @ 0x900
80054a4: 461a mov r2, r3
80054a6: 2300 movs r3, #0
80054a8: 6113 str r3, [r2, #16]
USBx_INEP(i)->DIEPINT = 0xFB7FU;
80054aa: 693b ldr r3, [r7, #16]
80054ac: 015a lsls r2, r3, #5
80054ae: 68fb ldr r3, [r7, #12]
80054b0: 4413 add r3, r2
80054b2: f503 6310 add.w r3, r3, #2304 @ 0x900
80054b6: 461a mov r2, r3
80054b8: f64f 337f movw r3, #64383 @ 0xfb7f
80054bc: 6093 str r3, [r2, #8]
for (i = 0U; i < cfg.dev_endpoints; i++)
80054be: 693b ldr r3, [r7, #16]
80054c0: 3301 adds r3, #1
80054c2: 613b str r3, [r7, #16]
80054c4: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
80054c8: 461a mov r2, r3
80054ca: 693b ldr r3, [r7, #16]
80054cc: 4293 cmp r3, r2
80054ce: d3b5 bcc.n 800543c <USB_DevInit+0x10c>
}
for (i = 0U; i < cfg.dev_endpoints; i++)
80054d0: 2300 movs r3, #0
80054d2: 613b str r3, [r7, #16]
80054d4: e043 b.n 800555e <USB_DevInit+0x22e>
{
if ((USBx_OUTEP(i)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
80054d6: 693b ldr r3, [r7, #16]
80054d8: 015a lsls r2, r3, #5
80054da: 68fb ldr r3, [r7, #12]
80054dc: 4413 add r3, r2
80054de: f503 6330 add.w r3, r3, #2816 @ 0xb00
80054e2: 681b ldr r3, [r3, #0]
80054e4: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
80054e8: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
80054ec: d118 bne.n 8005520 <USB_DevInit+0x1f0>
{
if (i == 0U)
80054ee: 693b ldr r3, [r7, #16]
80054f0: 2b00 cmp r3, #0
80054f2: d10a bne.n 800550a <USB_DevInit+0x1da>
{
USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_SNAK;
80054f4: 693b ldr r3, [r7, #16]
80054f6: 015a lsls r2, r3, #5
80054f8: 68fb ldr r3, [r7, #12]
80054fa: 4413 add r3, r2
80054fc: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005500: 461a mov r2, r3
8005502: f04f 6300 mov.w r3, #134217728 @ 0x8000000
8005506: 6013 str r3, [r2, #0]
8005508: e013 b.n 8005532 <USB_DevInit+0x202>
}
else
{
USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK;
800550a: 693b ldr r3, [r7, #16]
800550c: 015a lsls r2, r3, #5
800550e: 68fb ldr r3, [r7, #12]
8005510: 4413 add r3, r2
8005512: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005516: 461a mov r2, r3
8005518: f04f 4390 mov.w r3, #1207959552 @ 0x48000000
800551c: 6013 str r3, [r2, #0]
800551e: e008 b.n 8005532 <USB_DevInit+0x202>
}
}
else
{
USBx_OUTEP(i)->DOEPCTL = 0U;
8005520: 693b ldr r3, [r7, #16]
8005522: 015a lsls r2, r3, #5
8005524: 68fb ldr r3, [r7, #12]
8005526: 4413 add r3, r2
8005528: f503 6330 add.w r3, r3, #2816 @ 0xb00
800552c: 461a mov r2, r3
800552e: 2300 movs r3, #0
8005530: 6013 str r3, [r2, #0]
}
USBx_OUTEP(i)->DOEPTSIZ = 0U;
8005532: 693b ldr r3, [r7, #16]
8005534: 015a lsls r2, r3, #5
8005536: 68fb ldr r3, [r7, #12]
8005538: 4413 add r3, r2
800553a: f503 6330 add.w r3, r3, #2816 @ 0xb00
800553e: 461a mov r2, r3
8005540: 2300 movs r3, #0
8005542: 6113 str r3, [r2, #16]
USBx_OUTEP(i)->DOEPINT = 0xFB7FU;
8005544: 693b ldr r3, [r7, #16]
8005546: 015a lsls r2, r3, #5
8005548: 68fb ldr r3, [r7, #12]
800554a: 4413 add r3, r2
800554c: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005550: 461a mov r2, r3
8005552: f64f 337f movw r3, #64383 @ 0xfb7f
8005556: 6093 str r3, [r2, #8]
for (i = 0U; i < cfg.dev_endpoints; i++)
8005558: 693b ldr r3, [r7, #16]
800555a: 3301 adds r3, #1
800555c: 613b str r3, [r7, #16]
800555e: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
8005562: 461a mov r2, r3
8005564: 693b ldr r3, [r7, #16]
8005566: 4293 cmp r3, r2
8005568: d3b5 bcc.n 80054d6 <USB_DevInit+0x1a6>
}
USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM);
800556a: 68fb ldr r3, [r7, #12]
800556c: f503 6300 add.w r3, r3, #2048 @ 0x800
8005570: 691b ldr r3, [r3, #16]
8005572: 68fa ldr r2, [r7, #12]
8005574: f502 6200 add.w r2, r2, #2048 @ 0x800
8005578: f423 7380 bic.w r3, r3, #256 @ 0x100
800557c: 6113 str r3, [r2, #16]
/* Disable all interrupts. */
USBx->GINTMSK = 0U;
800557e: 687b ldr r3, [r7, #4]
8005580: 2200 movs r2, #0
8005582: 619a str r2, [r3, #24]
/* Clear any pending interrupts */
USBx->GINTSTS = 0xBFFFFFFFU;
8005584: 687b ldr r3, [r7, #4]
8005586: f06f 4280 mvn.w r2, #1073741824 @ 0x40000000
800558a: 615a str r2, [r3, #20]
/* Enable the common interrupts */
if (cfg.dma_enable == 0U)
800558c: f897 3026 ldrb.w r3, [r7, #38] @ 0x26
8005590: 2b00 cmp r3, #0
8005592: d105 bne.n 80055a0 <USB_DevInit+0x270>
{
USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM;
8005594: 687b ldr r3, [r7, #4]
8005596: 699b ldr r3, [r3, #24]
8005598: f043 0210 orr.w r2, r3, #16
800559c: 687b ldr r3, [r7, #4]
800559e: 619a str r2, [r3, #24]
}
/* Enable interrupts matching to the Device mode ONLY */
USBx->GINTMSK |= USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST |
80055a0: 687b ldr r3, [r7, #4]
80055a2: 699a ldr r2, [r3, #24]
80055a4: 4b10 ldr r3, [pc, #64] @ (80055e8 <USB_DevInit+0x2b8>)
80055a6: 4313 orrs r3, r2
80055a8: 687a ldr r2, [r7, #4]
80055aa: 6193 str r3, [r2, #24]
USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT |
USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM |
USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM;
if (cfg.Sof_enable != 0U)
80055ac: f897 302a ldrb.w r3, [r7, #42] @ 0x2a
80055b0: 2b00 cmp r3, #0
80055b2: d005 beq.n 80055c0 <USB_DevInit+0x290>
{
USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM;
80055b4: 687b ldr r3, [r7, #4]
80055b6: 699b ldr r3, [r3, #24]
80055b8: f043 0208 orr.w r2, r3, #8
80055bc: 687b ldr r3, [r7, #4]
80055be: 619a str r2, [r3, #24]
}
if (cfg.vbus_sensing_enable == 1U)
80055c0: f897 302e ldrb.w r3, [r7, #46] @ 0x2e
80055c4: 2b01 cmp r3, #1
80055c6: d107 bne.n 80055d8 <USB_DevInit+0x2a8>
{
USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT);
80055c8: 687b ldr r3, [r7, #4]
80055ca: 699b ldr r3, [r3, #24]
80055cc: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
80055d0: f043 0304 orr.w r3, r3, #4
80055d4: 687a ldr r2, [r7, #4]
80055d6: 6193 str r3, [r2, #24]
}
return ret;
80055d8: 7dfb ldrb r3, [r7, #23]
}
80055da: 4618 mov r0, r3
80055dc: 3718 adds r7, #24
80055de: 46bd mov sp, r7
80055e0: e8bd 4080 ldmia.w sp!, {r7, lr}
80055e4: b004 add sp, #16
80055e6: 4770 bx lr
80055e8: 803c3800 .word 0x803c3800
080055ec <USB_FlushTxFifo>:
* This parameter can be a value from 1 to 15
15 means Flush all Tx FIFOs
* @retval HAL status
*/
HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num)
{
80055ec: b480 push {r7}
80055ee: b085 sub sp, #20
80055f0: af00 add r7, sp, #0
80055f2: 6078 str r0, [r7, #4]
80055f4: 6039 str r1, [r7, #0]
__IO uint32_t count = 0U;
80055f6: 2300 movs r3, #0
80055f8: 60fb str r3, [r7, #12]
/* Wait for AHB master IDLE state. */
do
{
count++;
80055fa: 68fb ldr r3, [r7, #12]
80055fc: 3301 adds r3, #1
80055fe: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
8005600: 68fb ldr r3, [r7, #12]
8005602: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
8005606: d901 bls.n 800560c <USB_FlushTxFifo+0x20>
{
return HAL_TIMEOUT;
8005608: 2303 movs r3, #3
800560a: e01b b.n 8005644 <USB_FlushTxFifo+0x58>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
800560c: 687b ldr r3, [r7, #4]
800560e: 691b ldr r3, [r3, #16]
8005610: 2b00 cmp r3, #0
8005612: daf2 bge.n 80055fa <USB_FlushTxFifo+0xe>
/* Flush TX Fifo */
count = 0U;
8005614: 2300 movs r3, #0
8005616: 60fb str r3, [r7, #12]
USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6));
8005618: 683b ldr r3, [r7, #0]
800561a: 019b lsls r3, r3, #6
800561c: f043 0220 orr.w r2, r3, #32
8005620: 687b ldr r3, [r7, #4]
8005622: 611a str r2, [r3, #16]
do
{
count++;
8005624: 68fb ldr r3, [r7, #12]
8005626: 3301 adds r3, #1
8005628: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
800562a: 68fb ldr r3, [r7, #12]
800562c: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
8005630: d901 bls.n 8005636 <USB_FlushTxFifo+0x4a>
{
return HAL_TIMEOUT;
8005632: 2303 movs r3, #3
8005634: e006 b.n 8005644 <USB_FlushTxFifo+0x58>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
8005636: 687b ldr r3, [r7, #4]
8005638: 691b ldr r3, [r3, #16]
800563a: f003 0320 and.w r3, r3, #32
800563e: 2b20 cmp r3, #32
8005640: d0f0 beq.n 8005624 <USB_FlushTxFifo+0x38>
return HAL_OK;
8005642: 2300 movs r3, #0
}
8005644: 4618 mov r0, r3
8005646: 3714 adds r7, #20
8005648: 46bd mov sp, r7
800564a: f85d 7b04 ldr.w r7, [sp], #4
800564e: 4770 bx lr
08005650 <USB_FlushRxFifo>:
* @brief USB_FlushRxFifo Flush Rx FIFO
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
{
8005650: b480 push {r7}
8005652: b085 sub sp, #20
8005654: af00 add r7, sp, #0
8005656: 6078 str r0, [r7, #4]
__IO uint32_t count = 0U;
8005658: 2300 movs r3, #0
800565a: 60fb str r3, [r7, #12]
/* Wait for AHB master IDLE state. */
do
{
count++;
800565c: 68fb ldr r3, [r7, #12]
800565e: 3301 adds r3, #1
8005660: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
8005662: 68fb ldr r3, [r7, #12]
8005664: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
8005668: d901 bls.n 800566e <USB_FlushRxFifo+0x1e>
{
return HAL_TIMEOUT;
800566a: 2303 movs r3, #3
800566c: e018 b.n 80056a0 <USB_FlushRxFifo+0x50>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
800566e: 687b ldr r3, [r7, #4]
8005670: 691b ldr r3, [r3, #16]
8005672: 2b00 cmp r3, #0
8005674: daf2 bge.n 800565c <USB_FlushRxFifo+0xc>
/* Flush RX Fifo */
count = 0U;
8005676: 2300 movs r3, #0
8005678: 60fb str r3, [r7, #12]
USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
800567a: 687b ldr r3, [r7, #4]
800567c: 2210 movs r2, #16
800567e: 611a str r2, [r3, #16]
do
{
count++;
8005680: 68fb ldr r3, [r7, #12]
8005682: 3301 adds r3, #1
8005684: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
8005686: 68fb ldr r3, [r7, #12]
8005688: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
800568c: d901 bls.n 8005692 <USB_FlushRxFifo+0x42>
{
return HAL_TIMEOUT;
800568e: 2303 movs r3, #3
8005690: e006 b.n 80056a0 <USB_FlushRxFifo+0x50>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
8005692: 687b ldr r3, [r7, #4]
8005694: 691b ldr r3, [r3, #16]
8005696: f003 0310 and.w r3, r3, #16
800569a: 2b10 cmp r3, #16
800569c: d0f0 beq.n 8005680 <USB_FlushRxFifo+0x30>
return HAL_OK;
800569e: 2300 movs r3, #0
}
80056a0: 4618 mov r0, r3
80056a2: 3714 adds r7, #20
80056a4: 46bd mov sp, r7
80056a6: f85d 7b04 ldr.w r7, [sp], #4
80056aa: 4770 bx lr
080056ac <USB_SetDevSpeed>:
* @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode
* @arg USB_OTG_SPEED_FULL: Full speed mode
* @retval Hal status
*/
HAL_StatusTypeDef USB_SetDevSpeed(const USB_OTG_GlobalTypeDef *USBx, uint8_t speed)
{
80056ac: b480 push {r7}
80056ae: b085 sub sp, #20
80056b0: af00 add r7, sp, #0
80056b2: 6078 str r0, [r7, #4]
80056b4: 460b mov r3, r1
80056b6: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
80056b8: 687b ldr r3, [r7, #4]
80056ba: 60fb str r3, [r7, #12]
USBx_DEVICE->DCFG |= speed;
80056bc: 68fb ldr r3, [r7, #12]
80056be: f503 6300 add.w r3, r3, #2048 @ 0x800
80056c2: 681a ldr r2, [r3, #0]
80056c4: 78fb ldrb r3, [r7, #3]
80056c6: 68f9 ldr r1, [r7, #12]
80056c8: f501 6100 add.w r1, r1, #2048 @ 0x800
80056cc: 4313 orrs r3, r2
80056ce: 600b str r3, [r1, #0]
return HAL_OK;
80056d0: 2300 movs r3, #0
}
80056d2: 4618 mov r0, r3
80056d4: 3714 adds r7, #20
80056d6: 46bd mov sp, r7
80056d8: f85d 7b04 ldr.w r7, [sp], #4
80056dc: 4770 bx lr
080056de <USB_GetDevSpeed>:
* This parameter can be one of these values:
* @arg USBD_HS_SPEED: High speed mode
* @arg USBD_FS_SPEED: Full speed mode
*/
uint8_t USB_GetDevSpeed(const USB_OTG_GlobalTypeDef *USBx)
{
80056de: b480 push {r7}
80056e0: b087 sub sp, #28
80056e2: af00 add r7, sp, #0
80056e4: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
80056e6: 687b ldr r3, [r7, #4]
80056e8: 613b str r3, [r7, #16]
uint8_t speed;
uint32_t DevEnumSpeed = USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD;
80056ea: 693b ldr r3, [r7, #16]
80056ec: f503 6300 add.w r3, r3, #2048 @ 0x800
80056f0: 689b ldr r3, [r3, #8]
80056f2: f003 0306 and.w r3, r3, #6
80056f6: 60fb str r3, [r7, #12]
if (DevEnumSpeed == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ)
80056f8: 68fb ldr r3, [r7, #12]
80056fa: 2b00 cmp r3, #0
80056fc: d102 bne.n 8005704 <USB_GetDevSpeed+0x26>
{
speed = USBD_HS_SPEED;
80056fe: 2300 movs r3, #0
8005700: 75fb strb r3, [r7, #23]
8005702: e00a b.n 800571a <USB_GetDevSpeed+0x3c>
}
else if ((DevEnumSpeed == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ) ||
8005704: 68fb ldr r3, [r7, #12]
8005706: 2b02 cmp r3, #2
8005708: d002 beq.n 8005710 <USB_GetDevSpeed+0x32>
800570a: 68fb ldr r3, [r7, #12]
800570c: 2b06 cmp r3, #6
800570e: d102 bne.n 8005716 <USB_GetDevSpeed+0x38>
(DevEnumSpeed == DSTS_ENUMSPD_FS_PHY_48MHZ))
{
speed = USBD_FS_SPEED;
8005710: 2302 movs r3, #2
8005712: 75fb strb r3, [r7, #23]
8005714: e001 b.n 800571a <USB_GetDevSpeed+0x3c>
}
else
{
speed = 0xFU;
8005716: 230f movs r3, #15
8005718: 75fb strb r3, [r7, #23]
}
return speed;
800571a: 7dfb ldrb r3, [r7, #23]
}
800571c: 4618 mov r0, r3
800571e: 371c adds r7, #28
8005720: 46bd mov sp, r7
8005722: f85d 7b04 ldr.w r7, [sp], #4
8005726: 4770 bx lr
08005728 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
8005728: b480 push {r7}
800572a: b085 sub sp, #20
800572c: af00 add r7, sp, #0
800572e: 6078 str r0, [r7, #4]
8005730: 6039 str r1, [r7, #0]
uint32_t USBx_BASE = (uint32_t)USBx;
8005732: 687b ldr r3, [r7, #4]
8005734: 60fb str r3, [r7, #12]
uint32_t epnum = (uint32_t)ep->num;
8005736: 683b ldr r3, [r7, #0]
8005738: 781b ldrb r3, [r3, #0]
800573a: 60bb str r3, [r7, #8]
if (ep->is_in == 1U)
800573c: 683b ldr r3, [r7, #0]
800573e: 785b ldrb r3, [r3, #1]
8005740: 2b01 cmp r3, #1
8005742: d13a bne.n 80057ba <USB_ActivateEndpoint+0x92>
{
USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK));
8005744: 68fb ldr r3, [r7, #12]
8005746: f503 6300 add.w r3, r3, #2048 @ 0x800
800574a: 69da ldr r2, [r3, #28]
800574c: 683b ldr r3, [r7, #0]
800574e: 781b ldrb r3, [r3, #0]
8005750: f003 030f and.w r3, r3, #15
8005754: 2101 movs r1, #1
8005756: fa01 f303 lsl.w r3, r1, r3
800575a: b29b uxth r3, r3
800575c: 68f9 ldr r1, [r7, #12]
800575e: f501 6100 add.w r1, r1, #2048 @ 0x800
8005762: 4313 orrs r3, r2
8005764: 61cb str r3, [r1, #28]
if ((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_USBAEP) == 0U)
8005766: 68bb ldr r3, [r7, #8]
8005768: 015a lsls r2, r3, #5
800576a: 68fb ldr r3, [r7, #12]
800576c: 4413 add r3, r2
800576e: f503 6310 add.w r3, r3, #2304 @ 0x900
8005772: 681b ldr r3, [r3, #0]
8005774: f403 4300 and.w r3, r3, #32768 @ 0x8000
8005778: 2b00 cmp r3, #0
800577a: d155 bne.n 8005828 <USB_ActivateEndpoint+0x100>
{
USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) |
800577c: 68bb ldr r3, [r7, #8]
800577e: 015a lsls r2, r3, #5
8005780: 68fb ldr r3, [r7, #12]
8005782: 4413 add r3, r2
8005784: f503 6310 add.w r3, r3, #2304 @ 0x900
8005788: 681a ldr r2, [r3, #0]
800578a: 683b ldr r3, [r7, #0]
800578c: 689b ldr r3, [r3, #8]
800578e: f3c3 010a ubfx r1, r3, #0, #11
((uint32_t)ep->type << 18) | (epnum << 22) |
8005792: 683b ldr r3, [r7, #0]
8005794: 791b ldrb r3, [r3, #4]
8005796: 049b lsls r3, r3, #18
USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) |
8005798: 4319 orrs r1, r3
((uint32_t)ep->type << 18) | (epnum << 22) |
800579a: 68bb ldr r3, [r7, #8]
800579c: 059b lsls r3, r3, #22
800579e: 430b orrs r3, r1
USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) |
80057a0: 4313 orrs r3, r2
80057a2: 68ba ldr r2, [r7, #8]
80057a4: 0151 lsls r1, r2, #5
80057a6: 68fa ldr r2, [r7, #12]
80057a8: 440a add r2, r1
80057aa: f502 6210 add.w r2, r2, #2304 @ 0x900
80057ae: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80057b2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80057b6: 6013 str r3, [r2, #0]
80057b8: e036 b.n 8005828 <USB_ActivateEndpoint+0x100>
USB_OTG_DIEPCTL_USBAEP;
}
}
else
{
USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16);
80057ba: 68fb ldr r3, [r7, #12]
80057bc: f503 6300 add.w r3, r3, #2048 @ 0x800
80057c0: 69da ldr r2, [r3, #28]
80057c2: 683b ldr r3, [r7, #0]
80057c4: 781b ldrb r3, [r3, #0]
80057c6: f003 030f and.w r3, r3, #15
80057ca: 2101 movs r1, #1
80057cc: fa01 f303 lsl.w r3, r1, r3
80057d0: 041b lsls r3, r3, #16
80057d2: 68f9 ldr r1, [r7, #12]
80057d4: f501 6100 add.w r1, r1, #2048 @ 0x800
80057d8: 4313 orrs r3, r2
80057da: 61cb str r3, [r1, #28]
if (((USBx_OUTEP(epnum)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U)
80057dc: 68bb ldr r3, [r7, #8]
80057de: 015a lsls r2, r3, #5
80057e0: 68fb ldr r3, [r7, #12]
80057e2: 4413 add r3, r2
80057e4: f503 6330 add.w r3, r3, #2816 @ 0xb00
80057e8: 681b ldr r3, [r3, #0]
80057ea: f403 4300 and.w r3, r3, #32768 @ 0x8000
80057ee: 2b00 cmp r3, #0
80057f0: d11a bne.n 8005828 <USB_ActivateEndpoint+0x100>
{
USBx_OUTEP(epnum)->DOEPCTL |= (ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ) |
80057f2: 68bb ldr r3, [r7, #8]
80057f4: 015a lsls r2, r3, #5
80057f6: 68fb ldr r3, [r7, #12]
80057f8: 4413 add r3, r2
80057fa: f503 6330 add.w r3, r3, #2816 @ 0xb00
80057fe: 681a ldr r2, [r3, #0]
8005800: 683b ldr r3, [r7, #0]
8005802: 689b ldr r3, [r3, #8]
8005804: f3c3 010a ubfx r1, r3, #0, #11
((uint32_t)ep->type << 18) |
8005808: 683b ldr r3, [r7, #0]
800580a: 791b ldrb r3, [r3, #4]
800580c: 049b lsls r3, r3, #18
USBx_OUTEP(epnum)->DOEPCTL |= (ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ) |
800580e: 430b orrs r3, r1
8005810: 4313 orrs r3, r2
8005812: 68ba ldr r2, [r7, #8]
8005814: 0151 lsls r1, r2, #5
8005816: 68fa ldr r2, [r7, #12]
8005818: 440a add r2, r1
800581a: f502 6230 add.w r2, r2, #2816 @ 0xb00
800581e: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8005822: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005826: 6013 str r3, [r2, #0]
USB_OTG_DIEPCTL_SD0PID_SEVNFRM |
USB_OTG_DOEPCTL_USBAEP;
}
}
return HAL_OK;
8005828: 2300 movs r3, #0
}
800582a: 4618 mov r0, r3
800582c: 3714 adds r7, #20
800582e: 46bd mov sp, r7
8005830: f85d 7b04 ldr.w r7, [sp], #4
8005834: 4770 bx lr
...
08005838 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
8005838: b480 push {r7}
800583a: b085 sub sp, #20
800583c: af00 add r7, sp, #0
800583e: 6078 str r0, [r7, #4]
8005840: 6039 str r1, [r7, #0]
uint32_t USBx_BASE = (uint32_t)USBx;
8005842: 687b ldr r3, [r7, #4]
8005844: 60fb str r3, [r7, #12]
uint32_t epnum = (uint32_t)ep->num;
8005846: 683b ldr r3, [r7, #0]
8005848: 781b ldrb r3, [r3, #0]
800584a: 60bb str r3, [r7, #8]
/* Read DEPCTLn register */
if (ep->is_in == 1U)
800584c: 683b ldr r3, [r7, #0]
800584e: 785b ldrb r3, [r3, #1]
8005850: 2b01 cmp r3, #1
8005852: d161 bne.n 8005918 <USB_DeactivateEndpoint+0xe0>
{
if ((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
8005854: 68bb ldr r3, [r7, #8]
8005856: 015a lsls r2, r3, #5
8005858: 68fb ldr r3, [r7, #12]
800585a: 4413 add r3, r2
800585c: f503 6310 add.w r3, r3, #2304 @ 0x900
8005860: 681b ldr r3, [r3, #0]
8005862: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8005866: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
800586a: d11f bne.n 80058ac <USB_DeactivateEndpoint+0x74>
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK;
800586c: 68bb ldr r3, [r7, #8]
800586e: 015a lsls r2, r3, #5
8005870: 68fb ldr r3, [r7, #12]
8005872: 4413 add r3, r2
8005874: f503 6310 add.w r3, r3, #2304 @ 0x900
8005878: 681b ldr r3, [r3, #0]
800587a: 68ba ldr r2, [r7, #8]
800587c: 0151 lsls r1, r2, #5
800587e: 68fa ldr r2, [r7, #12]
8005880: 440a add r2, r1
8005882: f502 6210 add.w r2, r2, #2304 @ 0x900
8005886: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000
800588a: 6013 str r3, [r2, #0]
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS;
800588c: 68bb ldr r3, [r7, #8]
800588e: 015a lsls r2, r3, #5
8005890: 68fb ldr r3, [r7, #12]
8005892: 4413 add r3, r2
8005894: f503 6310 add.w r3, r3, #2304 @ 0x900
8005898: 681b ldr r3, [r3, #0]
800589a: 68ba ldr r2, [r7, #8]
800589c: 0151 lsls r1, r2, #5
800589e: 68fa ldr r2, [r7, #12]
80058a0: 440a add r2, r1
80058a2: f502 6210 add.w r2, r2, #2304 @ 0x900
80058a6: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
80058aa: 6013 str r3, [r2, #0]
}
USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK)));
80058ac: 68fb ldr r3, [r7, #12]
80058ae: f503 6300 add.w r3, r3, #2048 @ 0x800
80058b2: 6bda ldr r2, [r3, #60] @ 0x3c
80058b4: 683b ldr r3, [r7, #0]
80058b6: 781b ldrb r3, [r3, #0]
80058b8: f003 030f and.w r3, r3, #15
80058bc: 2101 movs r1, #1
80058be: fa01 f303 lsl.w r3, r1, r3
80058c2: b29b uxth r3, r3
80058c4: 43db mvns r3, r3
80058c6: 68f9 ldr r1, [r7, #12]
80058c8: f501 6100 add.w r1, r1, #2048 @ 0x800
80058cc: 4013 ands r3, r2
80058ce: 63cb str r3, [r1, #60] @ 0x3c
USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK)));
80058d0: 68fb ldr r3, [r7, #12]
80058d2: f503 6300 add.w r3, r3, #2048 @ 0x800
80058d6: 69da ldr r2, [r3, #28]
80058d8: 683b ldr r3, [r7, #0]
80058da: 781b ldrb r3, [r3, #0]
80058dc: f003 030f and.w r3, r3, #15
80058e0: 2101 movs r1, #1
80058e2: fa01 f303 lsl.w r3, r1, r3
80058e6: b29b uxth r3, r3
80058e8: 43db mvns r3, r3
80058ea: 68f9 ldr r1, [r7, #12]
80058ec: f501 6100 add.w r1, r1, #2048 @ 0x800
80058f0: 4013 ands r3, r2
80058f2: 61cb str r3, [r1, #28]
USBx_INEP(epnum)->DIEPCTL &= ~(USB_OTG_DIEPCTL_USBAEP |
80058f4: 68bb ldr r3, [r7, #8]
80058f6: 015a lsls r2, r3, #5
80058f8: 68fb ldr r3, [r7, #12]
80058fa: 4413 add r3, r2
80058fc: f503 6310 add.w r3, r3, #2304 @ 0x900
8005900: 681a ldr r2, [r3, #0]
8005902: 68bb ldr r3, [r7, #8]
8005904: 0159 lsls r1, r3, #5
8005906: 68fb ldr r3, [r7, #12]
8005908: 440b add r3, r1
800590a: f503 6310 add.w r3, r3, #2304 @ 0x900
800590e: 4619 mov r1, r3
8005910: 4b35 ldr r3, [pc, #212] @ (80059e8 <USB_DeactivateEndpoint+0x1b0>)
8005912: 4013 ands r3, r2
8005914: 600b str r3, [r1, #0]
8005916: e060 b.n 80059da <USB_DeactivateEndpoint+0x1a2>
USB_OTG_DIEPCTL_SD0PID_SEVNFRM |
USB_OTG_DIEPCTL_EPTYP);
}
else
{
if ((USBx_OUTEP(epnum)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
8005918: 68bb ldr r3, [r7, #8]
800591a: 015a lsls r2, r3, #5
800591c: 68fb ldr r3, [r7, #12]
800591e: 4413 add r3, r2
8005920: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005924: 681b ldr r3, [r3, #0]
8005926: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
800592a: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
800592e: d11f bne.n 8005970 <USB_DeactivateEndpoint+0x138>
{
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK;
8005930: 68bb ldr r3, [r7, #8]
8005932: 015a lsls r2, r3, #5
8005934: 68fb ldr r3, [r7, #12]
8005936: 4413 add r3, r2
8005938: f503 6330 add.w r3, r3, #2816 @ 0xb00
800593c: 681b ldr r3, [r3, #0]
800593e: 68ba ldr r2, [r7, #8]
8005940: 0151 lsls r1, r2, #5
8005942: 68fa ldr r2, [r7, #12]
8005944: 440a add r2, r1
8005946: f502 6230 add.w r2, r2, #2816 @ 0xb00
800594a: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000
800594e: 6013 str r3, [r2, #0]
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS;
8005950: 68bb ldr r3, [r7, #8]
8005952: 015a lsls r2, r3, #5
8005954: 68fb ldr r3, [r7, #12]
8005956: 4413 add r3, r2
8005958: f503 6330 add.w r3, r3, #2816 @ 0xb00
800595c: 681b ldr r3, [r3, #0]
800595e: 68ba ldr r2, [r7, #8]
8005960: 0151 lsls r1, r2, #5
8005962: 68fa ldr r2, [r7, #12]
8005964: 440a add r2, r1
8005966: f502 6230 add.w r2, r2, #2816 @ 0xb00
800596a: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
800596e: 6013 str r3, [r2, #0]
}
USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16));
8005970: 68fb ldr r3, [r7, #12]
8005972: f503 6300 add.w r3, r3, #2048 @ 0x800
8005976: 6bda ldr r2, [r3, #60] @ 0x3c
8005978: 683b ldr r3, [r7, #0]
800597a: 781b ldrb r3, [r3, #0]
800597c: f003 030f and.w r3, r3, #15
8005980: 2101 movs r1, #1
8005982: fa01 f303 lsl.w r3, r1, r3
8005986: 041b lsls r3, r3, #16
8005988: 43db mvns r3, r3
800598a: 68f9 ldr r1, [r7, #12]
800598c: f501 6100 add.w r1, r1, #2048 @ 0x800
8005990: 4013 ands r3, r2
8005992: 63cb str r3, [r1, #60] @ 0x3c
USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16));
8005994: 68fb ldr r3, [r7, #12]
8005996: f503 6300 add.w r3, r3, #2048 @ 0x800
800599a: 69da ldr r2, [r3, #28]
800599c: 683b ldr r3, [r7, #0]
800599e: 781b ldrb r3, [r3, #0]
80059a0: f003 030f and.w r3, r3, #15
80059a4: 2101 movs r1, #1
80059a6: fa01 f303 lsl.w r3, r1, r3
80059aa: 041b lsls r3, r3, #16
80059ac: 43db mvns r3, r3
80059ae: 68f9 ldr r1, [r7, #12]
80059b0: f501 6100 add.w r1, r1, #2048 @ 0x800
80059b4: 4013 ands r3, r2
80059b6: 61cb str r3, [r1, #28]
USBx_OUTEP(epnum)->DOEPCTL &= ~(USB_OTG_DOEPCTL_USBAEP |
80059b8: 68bb ldr r3, [r7, #8]
80059ba: 015a lsls r2, r3, #5
80059bc: 68fb ldr r3, [r7, #12]
80059be: 4413 add r3, r2
80059c0: f503 6330 add.w r3, r3, #2816 @ 0xb00
80059c4: 681a ldr r2, [r3, #0]
80059c6: 68bb ldr r3, [r7, #8]
80059c8: 0159 lsls r1, r3, #5
80059ca: 68fb ldr r3, [r7, #12]
80059cc: 440b add r3, r1
80059ce: f503 6330 add.w r3, r3, #2816 @ 0xb00
80059d2: 4619 mov r1, r3
80059d4: 4b05 ldr r3, [pc, #20] @ (80059ec <USB_DeactivateEndpoint+0x1b4>)
80059d6: 4013 ands r3, r2
80059d8: 600b str r3, [r1, #0]
USB_OTG_DOEPCTL_MPSIZ |
USB_OTG_DOEPCTL_SD0PID_SEVNFRM |
USB_OTG_DOEPCTL_EPTYP);
}
return HAL_OK;
80059da: 2300 movs r3, #0
}
80059dc: 4618 mov r0, r3
80059de: 3714 adds r7, #20
80059e0: 46bd mov sp, r7
80059e2: f85d 7b04 ldr.w r7, [sp], #4
80059e6: 4770 bx lr
80059e8: ec337800 .word 0xec337800
80059ec: eff37800 .word 0xeff37800
080059f0 <USB_EPStartXfer>:
* 0 : DMA feature not used
* 1 : DMA feature used
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma)
{
80059f0: b580 push {r7, lr}
80059f2: b08a sub sp, #40 @ 0x28
80059f4: af02 add r7, sp, #8
80059f6: 60f8 str r0, [r7, #12]
80059f8: 60b9 str r1, [r7, #8]
80059fa: 4613 mov r3, r2
80059fc: 71fb strb r3, [r7, #7]
uint32_t USBx_BASE = (uint32_t)USBx;
80059fe: 68fb ldr r3, [r7, #12]
8005a00: 61fb str r3, [r7, #28]
uint32_t epnum = (uint32_t)ep->num;
8005a02: 68bb ldr r3, [r7, #8]
8005a04: 781b ldrb r3, [r3, #0]
8005a06: 61bb str r3, [r7, #24]
uint16_t pktcnt;
/* IN endpoint */
if (ep->is_in == 1U)
8005a08: 68bb ldr r3, [r7, #8]
8005a0a: 785b ldrb r3, [r3, #1]
8005a0c: 2b01 cmp r3, #1
8005a0e: f040 817f bne.w 8005d10 <USB_EPStartXfer+0x320>
{
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8005a12: 68bb ldr r3, [r7, #8]
8005a14: 691b ldr r3, [r3, #16]
8005a16: 2b00 cmp r3, #0
8005a18: d132 bne.n 8005a80 <USB_EPStartXfer+0x90>
{
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
8005a1a: 69bb ldr r3, [r7, #24]
8005a1c: 015a lsls r2, r3, #5
8005a1e: 69fb ldr r3, [r7, #28]
8005a20: 4413 add r3, r2
8005a22: f503 6310 add.w r3, r3, #2304 @ 0x900
8005a26: 691b ldr r3, [r3, #16]
8005a28: 69ba ldr r2, [r7, #24]
8005a2a: 0151 lsls r1, r2, #5
8005a2c: 69fa ldr r2, [r7, #28]
8005a2e: 440a add r2, r1
8005a30: f502 6210 add.w r2, r2, #2304 @ 0x900
8005a34: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000
8005a38: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000
8005a3c: 6113 str r3, [r2, #16]
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19));
8005a3e: 69bb ldr r3, [r7, #24]
8005a40: 015a lsls r2, r3, #5
8005a42: 69fb ldr r3, [r7, #28]
8005a44: 4413 add r3, r2
8005a46: f503 6310 add.w r3, r3, #2304 @ 0x900
8005a4a: 691b ldr r3, [r3, #16]
8005a4c: 69ba ldr r2, [r7, #24]
8005a4e: 0151 lsls r1, r2, #5
8005a50: 69fa ldr r2, [r7, #28]
8005a52: 440a add r2, r1
8005a54: f502 6210 add.w r2, r2, #2304 @ 0x900
8005a58: f443 2300 orr.w r3, r3, #524288 @ 0x80000
8005a5c: 6113 str r3, [r2, #16]
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
8005a5e: 69bb ldr r3, [r7, #24]
8005a60: 015a lsls r2, r3, #5
8005a62: 69fb ldr r3, [r7, #28]
8005a64: 4413 add r3, r2
8005a66: f503 6310 add.w r3, r3, #2304 @ 0x900
8005a6a: 691b ldr r3, [r3, #16]
8005a6c: 69ba ldr r2, [r7, #24]
8005a6e: 0151 lsls r1, r2, #5
8005a70: 69fa ldr r2, [r7, #28]
8005a72: 440a add r2, r1
8005a74: f502 6210 add.w r2, r2, #2304 @ 0x900
8005a78: 0cdb lsrs r3, r3, #19
8005a7a: 04db lsls r3, r3, #19
8005a7c: 6113 str r3, [r2, #16]
8005a7e: e097 b.n 8005bb0 <USB_EPStartXfer+0x1c0>
/* Program the transfer size and packet count
* as follows: xfersize = N * maxpacket +
* short_packet pktcnt = N + (short_packet
* exist ? 1 : 0)
*/
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
8005a80: 69bb ldr r3, [r7, #24]
8005a82: 015a lsls r2, r3, #5
8005a84: 69fb ldr r3, [r7, #28]
8005a86: 4413 add r3, r2
8005a88: f503 6310 add.w r3, r3, #2304 @ 0x900
8005a8c: 691b ldr r3, [r3, #16]
8005a8e: 69ba ldr r2, [r7, #24]
8005a90: 0151 lsls r1, r2, #5
8005a92: 69fa ldr r2, [r7, #28]
8005a94: 440a add r2, r1
8005a96: f502 6210 add.w r2, r2, #2304 @ 0x900
8005a9a: 0cdb lsrs r3, r3, #19
8005a9c: 04db lsls r3, r3, #19
8005a9e: 6113 str r3, [r2, #16]
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
8005aa0: 69bb ldr r3, [r7, #24]
8005aa2: 015a lsls r2, r3, #5
8005aa4: 69fb ldr r3, [r7, #28]
8005aa6: 4413 add r3, r2
8005aa8: f503 6310 add.w r3, r3, #2304 @ 0x900
8005aac: 691b ldr r3, [r3, #16]
8005aae: 69ba ldr r2, [r7, #24]
8005ab0: 0151 lsls r1, r2, #5
8005ab2: 69fa ldr r2, [r7, #28]
8005ab4: 440a add r2, r1
8005ab6: f502 6210 add.w r2, r2, #2304 @ 0x900
8005aba: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000
8005abe: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000
8005ac2: 6113 str r3, [r2, #16]
if (epnum == 0U)
8005ac4: 69bb ldr r3, [r7, #24]
8005ac6: 2b00 cmp r3, #0
8005ac8: d11a bne.n 8005b00 <USB_EPStartXfer+0x110>
{
if (ep->xfer_len > ep->maxpacket)
8005aca: 68bb ldr r3, [r7, #8]
8005acc: 691a ldr r2, [r3, #16]
8005ace: 68bb ldr r3, [r7, #8]
8005ad0: 689b ldr r3, [r3, #8]
8005ad2: 429a cmp r2, r3
8005ad4: d903 bls.n 8005ade <USB_EPStartXfer+0xee>
{
ep->xfer_len = ep->maxpacket;
8005ad6: 68bb ldr r3, [r7, #8]
8005ad8: 689a ldr r2, [r3, #8]
8005ada: 68bb ldr r3, [r7, #8]
8005adc: 611a str r2, [r3, #16]
}
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19));
8005ade: 69bb ldr r3, [r7, #24]
8005ae0: 015a lsls r2, r3, #5
8005ae2: 69fb ldr r3, [r7, #28]
8005ae4: 4413 add r3, r2
8005ae6: f503 6310 add.w r3, r3, #2304 @ 0x900
8005aea: 691b ldr r3, [r3, #16]
8005aec: 69ba ldr r2, [r7, #24]
8005aee: 0151 lsls r1, r2, #5
8005af0: 69fa ldr r2, [r7, #28]
8005af2: 440a add r2, r1
8005af4: f502 6210 add.w r2, r2, #2304 @ 0x900
8005af8: f443 2300 orr.w r3, r3, #524288 @ 0x80000
8005afc: 6113 str r3, [r2, #16]
8005afe: e044 b.n 8005b8a <USB_EPStartXfer+0x19a>
}
else
{
pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket);
8005b00: 68bb ldr r3, [r7, #8]
8005b02: 691a ldr r2, [r3, #16]
8005b04: 68bb ldr r3, [r7, #8]
8005b06: 689b ldr r3, [r3, #8]
8005b08: 4413 add r3, r2
8005b0a: 1e5a subs r2, r3, #1
8005b0c: 68bb ldr r3, [r7, #8]
8005b0e: 689b ldr r3, [r3, #8]
8005b10: fbb2 f3f3 udiv r3, r2, r3
8005b14: 82fb strh r3, [r7, #22]
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19));
8005b16: 69bb ldr r3, [r7, #24]
8005b18: 015a lsls r2, r3, #5
8005b1a: 69fb ldr r3, [r7, #28]
8005b1c: 4413 add r3, r2
8005b1e: f503 6310 add.w r3, r3, #2304 @ 0x900
8005b22: 691a ldr r2, [r3, #16]
8005b24: 8afb ldrh r3, [r7, #22]
8005b26: 04d9 lsls r1, r3, #19
8005b28: 4ba4 ldr r3, [pc, #656] @ (8005dbc <USB_EPStartXfer+0x3cc>)
8005b2a: 400b ands r3, r1
8005b2c: 69b9 ldr r1, [r7, #24]
8005b2e: 0148 lsls r0, r1, #5
8005b30: 69f9 ldr r1, [r7, #28]
8005b32: 4401 add r1, r0
8005b34: f501 6110 add.w r1, r1, #2304 @ 0x900
8005b38: 4313 orrs r3, r2
8005b3a: 610b str r3, [r1, #16]
if (ep->type == EP_TYPE_ISOC)
8005b3c: 68bb ldr r3, [r7, #8]
8005b3e: 791b ldrb r3, [r3, #4]
8005b40: 2b01 cmp r3, #1
8005b42: d122 bne.n 8005b8a <USB_EPStartXfer+0x19a>
{
USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT);
8005b44: 69bb ldr r3, [r7, #24]
8005b46: 015a lsls r2, r3, #5
8005b48: 69fb ldr r3, [r7, #28]
8005b4a: 4413 add r3, r2
8005b4c: f503 6310 add.w r3, r3, #2304 @ 0x900
8005b50: 691b ldr r3, [r3, #16]
8005b52: 69ba ldr r2, [r7, #24]
8005b54: 0151 lsls r1, r2, #5
8005b56: 69fa ldr r2, [r7, #28]
8005b58: 440a add r2, r1
8005b5a: f502 6210 add.w r2, r2, #2304 @ 0x900
8005b5e: f023 43c0 bic.w r3, r3, #1610612736 @ 0x60000000
8005b62: 6113 str r3, [r2, #16]
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & ((uint32_t)pktcnt << 29));
8005b64: 69bb ldr r3, [r7, #24]
8005b66: 015a lsls r2, r3, #5
8005b68: 69fb ldr r3, [r7, #28]
8005b6a: 4413 add r3, r2
8005b6c: f503 6310 add.w r3, r3, #2304 @ 0x900
8005b70: 691a ldr r2, [r3, #16]
8005b72: 8afb ldrh r3, [r7, #22]
8005b74: 075b lsls r3, r3, #29
8005b76: f003 43c0 and.w r3, r3, #1610612736 @ 0x60000000
8005b7a: 69b9 ldr r1, [r7, #24]
8005b7c: 0148 lsls r0, r1, #5
8005b7e: 69f9 ldr r1, [r7, #28]
8005b80: 4401 add r1, r0
8005b82: f501 6110 add.w r1, r1, #2304 @ 0x900
8005b86: 4313 orrs r3, r2
8005b88: 610b str r3, [r1, #16]
}
}
USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
8005b8a: 69bb ldr r3, [r7, #24]
8005b8c: 015a lsls r2, r3, #5
8005b8e: 69fb ldr r3, [r7, #28]
8005b90: 4413 add r3, r2
8005b92: f503 6310 add.w r3, r3, #2304 @ 0x900
8005b96: 691a ldr r2, [r3, #16]
8005b98: 68bb ldr r3, [r7, #8]
8005b9a: 691b ldr r3, [r3, #16]
8005b9c: f3c3 0312 ubfx r3, r3, #0, #19
8005ba0: 69b9 ldr r1, [r7, #24]
8005ba2: 0148 lsls r0, r1, #5
8005ba4: 69f9 ldr r1, [r7, #28]
8005ba6: 4401 add r1, r0
8005ba8: f501 6110 add.w r1, r1, #2304 @ 0x900
8005bac: 4313 orrs r3, r2
8005bae: 610b str r3, [r1, #16]
}
if (dma == 1U)
8005bb0: 79fb ldrb r3, [r7, #7]
8005bb2: 2b01 cmp r3, #1
8005bb4: d14b bne.n 8005c4e <USB_EPStartXfer+0x25e>
{
if ((uint32_t)ep->dma_addr != 0U)
8005bb6: 68bb ldr r3, [r7, #8]
8005bb8: 69db ldr r3, [r3, #28]
8005bba: 2b00 cmp r3, #0
8005bbc: d009 beq.n 8005bd2 <USB_EPStartXfer+0x1e2>
{
USBx_INEP(epnum)->DIEPDMA = (uint32_t)(ep->dma_addr);
8005bbe: 69bb ldr r3, [r7, #24]
8005bc0: 015a lsls r2, r3, #5
8005bc2: 69fb ldr r3, [r7, #28]
8005bc4: 4413 add r3, r2
8005bc6: f503 6310 add.w r3, r3, #2304 @ 0x900
8005bca: 461a mov r2, r3
8005bcc: 68bb ldr r3, [r7, #8]
8005bce: 69db ldr r3, [r3, #28]
8005bd0: 6153 str r3, [r2, #20]
}
if (ep->type == EP_TYPE_ISOC)
8005bd2: 68bb ldr r3, [r7, #8]
8005bd4: 791b ldrb r3, [r3, #4]
8005bd6: 2b01 cmp r3, #1
8005bd8: d128 bne.n 8005c2c <USB_EPStartXfer+0x23c>
{
if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U)
8005bda: 69fb ldr r3, [r7, #28]
8005bdc: f503 6300 add.w r3, r3, #2048 @ 0x800
8005be0: 689b ldr r3, [r3, #8]
8005be2: f403 7380 and.w r3, r3, #256 @ 0x100
8005be6: 2b00 cmp r3, #0
8005be8: d110 bne.n 8005c0c <USB_EPStartXfer+0x21c>
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM;
8005bea: 69bb ldr r3, [r7, #24]
8005bec: 015a lsls r2, r3, #5
8005bee: 69fb ldr r3, [r7, #28]
8005bf0: 4413 add r3, r2
8005bf2: f503 6310 add.w r3, r3, #2304 @ 0x900
8005bf6: 681b ldr r3, [r3, #0]
8005bf8: 69ba ldr r2, [r7, #24]
8005bfa: 0151 lsls r1, r2, #5
8005bfc: 69fa ldr r2, [r7, #28]
8005bfe: 440a add r2, r1
8005c00: f502 6210 add.w r2, r2, #2304 @ 0x900
8005c04: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000
8005c08: 6013 str r3, [r2, #0]
8005c0a: e00f b.n 8005c2c <USB_EPStartXfer+0x23c>
}
else
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
8005c0c: 69bb ldr r3, [r7, #24]
8005c0e: 015a lsls r2, r3, #5
8005c10: 69fb ldr r3, [r7, #28]
8005c12: 4413 add r3, r2
8005c14: f503 6310 add.w r3, r3, #2304 @ 0x900
8005c18: 681b ldr r3, [r3, #0]
8005c1a: 69ba ldr r2, [r7, #24]
8005c1c: 0151 lsls r1, r2, #5
8005c1e: 69fa ldr r2, [r7, #28]
8005c20: 440a add r2, r1
8005c22: f502 6210 add.w r2, r2, #2304 @ 0x900
8005c26: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8005c2a: 6013 str r3, [r2, #0]
}
}
/* EP enable, IN data in FIFO */
USBx_INEP(epnum)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
8005c2c: 69bb ldr r3, [r7, #24]
8005c2e: 015a lsls r2, r3, #5
8005c30: 69fb ldr r3, [r7, #28]
8005c32: 4413 add r3, r2
8005c34: f503 6310 add.w r3, r3, #2304 @ 0x900
8005c38: 681b ldr r3, [r3, #0]
8005c3a: 69ba ldr r2, [r7, #24]
8005c3c: 0151 lsls r1, r2, #5
8005c3e: 69fa ldr r2, [r7, #28]
8005c40: 440a add r2, r1
8005c42: f502 6210 add.w r2, r2, #2304 @ 0x900
8005c46: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000
8005c4a: 6013 str r3, [r2, #0]
8005c4c: e166 b.n 8005f1c <USB_EPStartXfer+0x52c>
}
else
{
/* EP enable, IN data in FIFO */
USBx_INEP(epnum)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA);
8005c4e: 69bb ldr r3, [r7, #24]
8005c50: 015a lsls r2, r3, #5
8005c52: 69fb ldr r3, [r7, #28]
8005c54: 4413 add r3, r2
8005c56: f503 6310 add.w r3, r3, #2304 @ 0x900
8005c5a: 681b ldr r3, [r3, #0]
8005c5c: 69ba ldr r2, [r7, #24]
8005c5e: 0151 lsls r1, r2, #5
8005c60: 69fa ldr r2, [r7, #28]
8005c62: 440a add r2, r1
8005c64: f502 6210 add.w r2, r2, #2304 @ 0x900
8005c68: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000
8005c6c: 6013 str r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8005c6e: 68bb ldr r3, [r7, #8]
8005c70: 791b ldrb r3, [r3, #4]
8005c72: 2b01 cmp r3, #1
8005c74: d015 beq.n 8005ca2 <USB_EPStartXfer+0x2b2>
{
/* Enable the Tx FIFO Empty Interrupt for this EP */
if (ep->xfer_len > 0U)
8005c76: 68bb ldr r3, [r7, #8]
8005c78: 691b ldr r3, [r3, #16]
8005c7a: 2b00 cmp r3, #0
8005c7c: f000 814e beq.w 8005f1c <USB_EPStartXfer+0x52c>
{
USBx_DEVICE->DIEPEMPMSK |= 1UL << (ep->num & EP_ADDR_MSK);
8005c80: 69fb ldr r3, [r7, #28]
8005c82: f503 6300 add.w r3, r3, #2048 @ 0x800
8005c86: 6b5a ldr r2, [r3, #52] @ 0x34
8005c88: 68bb ldr r3, [r7, #8]
8005c8a: 781b ldrb r3, [r3, #0]
8005c8c: f003 030f and.w r3, r3, #15
8005c90: 2101 movs r1, #1
8005c92: fa01 f303 lsl.w r3, r1, r3
8005c96: 69f9 ldr r1, [r7, #28]
8005c98: f501 6100 add.w r1, r1, #2048 @ 0x800
8005c9c: 4313 orrs r3, r2
8005c9e: 634b str r3, [r1, #52] @ 0x34
8005ca0: e13c b.n 8005f1c <USB_EPStartXfer+0x52c>
}
}
else
{
if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U)
8005ca2: 69fb ldr r3, [r7, #28]
8005ca4: f503 6300 add.w r3, r3, #2048 @ 0x800
8005ca8: 689b ldr r3, [r3, #8]
8005caa: f403 7380 and.w r3, r3, #256 @ 0x100
8005cae: 2b00 cmp r3, #0
8005cb0: d110 bne.n 8005cd4 <USB_EPStartXfer+0x2e4>
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM;
8005cb2: 69bb ldr r3, [r7, #24]
8005cb4: 015a lsls r2, r3, #5
8005cb6: 69fb ldr r3, [r7, #28]
8005cb8: 4413 add r3, r2
8005cba: f503 6310 add.w r3, r3, #2304 @ 0x900
8005cbe: 681b ldr r3, [r3, #0]
8005cc0: 69ba ldr r2, [r7, #24]
8005cc2: 0151 lsls r1, r2, #5
8005cc4: 69fa ldr r2, [r7, #28]
8005cc6: 440a add r2, r1
8005cc8: f502 6210 add.w r2, r2, #2304 @ 0x900
8005ccc: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000
8005cd0: 6013 str r3, [r2, #0]
8005cd2: e00f b.n 8005cf4 <USB_EPStartXfer+0x304>
}
else
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
8005cd4: 69bb ldr r3, [r7, #24]
8005cd6: 015a lsls r2, r3, #5
8005cd8: 69fb ldr r3, [r7, #28]
8005cda: 4413 add r3, r2
8005cdc: f503 6310 add.w r3, r3, #2304 @ 0x900
8005ce0: 681b ldr r3, [r3, #0]
8005ce2: 69ba ldr r2, [r7, #24]
8005ce4: 0151 lsls r1, r2, #5
8005ce6: 69fa ldr r2, [r7, #28]
8005ce8: 440a add r2, r1
8005cea: f502 6210 add.w r2, r2, #2304 @ 0x900
8005cee: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8005cf2: 6013 str r3, [r2, #0]
}
(void)USB_WritePacket(USBx, ep->xfer_buff, ep->num, (uint16_t)ep->xfer_len, dma);
8005cf4: 68bb ldr r3, [r7, #8]
8005cf6: 68d9 ldr r1, [r3, #12]
8005cf8: 68bb ldr r3, [r7, #8]
8005cfa: 781a ldrb r2, [r3, #0]
8005cfc: 68bb ldr r3, [r7, #8]
8005cfe: 691b ldr r3, [r3, #16]
8005d00: b298 uxth r0, r3
8005d02: 79fb ldrb r3, [r7, #7]
8005d04: 9300 str r3, [sp, #0]
8005d06: 4603 mov r3, r0
8005d08: 68f8 ldr r0, [r7, #12]
8005d0a: f000 f9b9 bl 8006080 <USB_WritePacket>
8005d0e: e105 b.n 8005f1c <USB_EPStartXfer+0x52c>
{
/* Program the transfer size and packet count as follows:
* pktcnt = N
* xfersize = N * maxpacket
*/
USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
8005d10: 69bb ldr r3, [r7, #24]
8005d12: 015a lsls r2, r3, #5
8005d14: 69fb ldr r3, [r7, #28]
8005d16: 4413 add r3, r2
8005d18: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005d1c: 691b ldr r3, [r3, #16]
8005d1e: 69ba ldr r2, [r7, #24]
8005d20: 0151 lsls r1, r2, #5
8005d22: 69fa ldr r2, [r7, #28]
8005d24: 440a add r2, r1
8005d26: f502 6230 add.w r2, r2, #2816 @ 0xb00
8005d2a: 0cdb lsrs r3, r3, #19
8005d2c: 04db lsls r3, r3, #19
8005d2e: 6113 str r3, [r2, #16]
USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
8005d30: 69bb ldr r3, [r7, #24]
8005d32: 015a lsls r2, r3, #5
8005d34: 69fb ldr r3, [r7, #28]
8005d36: 4413 add r3, r2
8005d38: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005d3c: 691b ldr r3, [r3, #16]
8005d3e: 69ba ldr r2, [r7, #24]
8005d40: 0151 lsls r1, r2, #5
8005d42: 69fa ldr r2, [r7, #28]
8005d44: 440a add r2, r1
8005d46: f502 6230 add.w r2, r2, #2816 @ 0xb00
8005d4a: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000
8005d4e: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000
8005d52: 6113 str r3, [r2, #16]
if (epnum == 0U)
8005d54: 69bb ldr r3, [r7, #24]
8005d56: 2b00 cmp r3, #0
8005d58: d132 bne.n 8005dc0 <USB_EPStartXfer+0x3d0>
{
if (ep->xfer_len > 0U)
8005d5a: 68bb ldr r3, [r7, #8]
8005d5c: 691b ldr r3, [r3, #16]
8005d5e: 2b00 cmp r3, #0
8005d60: d003 beq.n 8005d6a <USB_EPStartXfer+0x37a>
{
ep->xfer_len = ep->maxpacket;
8005d62: 68bb ldr r3, [r7, #8]
8005d64: 689a ldr r2, [r3, #8]
8005d66: 68bb ldr r3, [r7, #8]
8005d68: 611a str r2, [r3, #16]
}
/* Store transfer size, for EP0 this is equal to endpoint max packet size */
ep->xfer_size = ep->maxpacket;
8005d6a: 68bb ldr r3, [r7, #8]
8005d6c: 689a ldr r2, [r3, #8]
8005d6e: 68bb ldr r3, [r7, #8]
8005d70: 621a str r2, [r3, #32]
USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size);
8005d72: 69bb ldr r3, [r7, #24]
8005d74: 015a lsls r2, r3, #5
8005d76: 69fb ldr r3, [r7, #28]
8005d78: 4413 add r3, r2
8005d7a: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005d7e: 691a ldr r2, [r3, #16]
8005d80: 68bb ldr r3, [r7, #8]
8005d82: 6a1b ldr r3, [r3, #32]
8005d84: f3c3 0312 ubfx r3, r3, #0, #19
8005d88: 69b9 ldr r1, [r7, #24]
8005d8a: 0148 lsls r0, r1, #5
8005d8c: 69f9 ldr r1, [r7, #28]
8005d8e: 4401 add r1, r0
8005d90: f501 6130 add.w r1, r1, #2816 @ 0xb00
8005d94: 4313 orrs r3, r2
8005d96: 610b str r3, [r1, #16]
USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19));
8005d98: 69bb ldr r3, [r7, #24]
8005d9a: 015a lsls r2, r3, #5
8005d9c: 69fb ldr r3, [r7, #28]
8005d9e: 4413 add r3, r2
8005da0: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005da4: 691b ldr r3, [r3, #16]
8005da6: 69ba ldr r2, [r7, #24]
8005da8: 0151 lsls r1, r2, #5
8005daa: 69fa ldr r2, [r7, #28]
8005dac: 440a add r2, r1
8005dae: f502 6230 add.w r2, r2, #2816 @ 0xb00
8005db2: f443 2300 orr.w r3, r3, #524288 @ 0x80000
8005db6: 6113 str r3, [r2, #16]
8005db8: e062 b.n 8005e80 <USB_EPStartXfer+0x490>
8005dba: bf00 nop
8005dbc: 1ff80000 .word 0x1ff80000
}
else
{
if (ep->xfer_len == 0U)
8005dc0: 68bb ldr r3, [r7, #8]
8005dc2: 691b ldr r3, [r3, #16]
8005dc4: 2b00 cmp r3, #0
8005dc6: d123 bne.n 8005e10 <USB_EPStartXfer+0x420>
{
USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
8005dc8: 69bb ldr r3, [r7, #24]
8005dca: 015a lsls r2, r3, #5
8005dcc: 69fb ldr r3, [r7, #28]
8005dce: 4413 add r3, r2
8005dd0: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005dd4: 691a ldr r2, [r3, #16]
8005dd6: 68bb ldr r3, [r7, #8]
8005dd8: 689b ldr r3, [r3, #8]
8005dda: f3c3 0312 ubfx r3, r3, #0, #19
8005dde: 69b9 ldr r1, [r7, #24]
8005de0: 0148 lsls r0, r1, #5
8005de2: 69f9 ldr r1, [r7, #28]
8005de4: 4401 add r1, r0
8005de6: f501 6130 add.w r1, r1, #2816 @ 0xb00
8005dea: 4313 orrs r3, r2
8005dec: 610b str r3, [r1, #16]
USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19));
8005dee: 69bb ldr r3, [r7, #24]
8005df0: 015a lsls r2, r3, #5
8005df2: 69fb ldr r3, [r7, #28]
8005df4: 4413 add r3, r2
8005df6: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005dfa: 691b ldr r3, [r3, #16]
8005dfc: 69ba ldr r2, [r7, #24]
8005dfe: 0151 lsls r1, r2, #5
8005e00: 69fa ldr r2, [r7, #28]
8005e02: 440a add r2, r1
8005e04: f502 6230 add.w r2, r2, #2816 @ 0xb00
8005e08: f443 2300 orr.w r3, r3, #524288 @ 0x80000
8005e0c: 6113 str r3, [r2, #16]
8005e0e: e037 b.n 8005e80 <USB_EPStartXfer+0x490>
}
else
{
pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket);
8005e10: 68bb ldr r3, [r7, #8]
8005e12: 691a ldr r2, [r3, #16]
8005e14: 68bb ldr r3, [r7, #8]
8005e16: 689b ldr r3, [r3, #8]
8005e18: 4413 add r3, r2
8005e1a: 1e5a subs r2, r3, #1
8005e1c: 68bb ldr r3, [r7, #8]
8005e1e: 689b ldr r3, [r3, #8]
8005e20: fbb2 f3f3 udiv r3, r2, r3
8005e24: 82fb strh r3, [r7, #22]
ep->xfer_size = ep->maxpacket * pktcnt;
8005e26: 68bb ldr r3, [r7, #8]
8005e28: 689b ldr r3, [r3, #8]
8005e2a: 8afa ldrh r2, [r7, #22]
8005e2c: fb03 f202 mul.w r2, r3, r2
8005e30: 68bb ldr r3, [r7, #8]
8005e32: 621a str r2, [r3, #32]
USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19);
8005e34: 69bb ldr r3, [r7, #24]
8005e36: 015a lsls r2, r3, #5
8005e38: 69fb ldr r3, [r7, #28]
8005e3a: 4413 add r3, r2
8005e3c: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005e40: 691a ldr r2, [r3, #16]
8005e42: 8afb ldrh r3, [r7, #22]
8005e44: 04d9 lsls r1, r3, #19
8005e46: 4b38 ldr r3, [pc, #224] @ (8005f28 <USB_EPStartXfer+0x538>)
8005e48: 400b ands r3, r1
8005e4a: 69b9 ldr r1, [r7, #24]
8005e4c: 0148 lsls r0, r1, #5
8005e4e: 69f9 ldr r1, [r7, #28]
8005e50: 4401 add r1, r0
8005e52: f501 6130 add.w r1, r1, #2816 @ 0xb00
8005e56: 4313 orrs r3, r2
8005e58: 610b str r3, [r1, #16]
USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size;
8005e5a: 69bb ldr r3, [r7, #24]
8005e5c: 015a lsls r2, r3, #5
8005e5e: 69fb ldr r3, [r7, #28]
8005e60: 4413 add r3, r2
8005e62: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005e66: 691a ldr r2, [r3, #16]
8005e68: 68bb ldr r3, [r7, #8]
8005e6a: 6a1b ldr r3, [r3, #32]
8005e6c: f3c3 0312 ubfx r3, r3, #0, #19
8005e70: 69b9 ldr r1, [r7, #24]
8005e72: 0148 lsls r0, r1, #5
8005e74: 69f9 ldr r1, [r7, #28]
8005e76: 4401 add r1, r0
8005e78: f501 6130 add.w r1, r1, #2816 @ 0xb00
8005e7c: 4313 orrs r3, r2
8005e7e: 610b str r3, [r1, #16]
}
}
if (dma == 1U)
8005e80: 79fb ldrb r3, [r7, #7]
8005e82: 2b01 cmp r3, #1
8005e84: d10d bne.n 8005ea2 <USB_EPStartXfer+0x4b2>
{
if ((uint32_t)ep->xfer_buff != 0U)
8005e86: 68bb ldr r3, [r7, #8]
8005e88: 68db ldr r3, [r3, #12]
8005e8a: 2b00 cmp r3, #0
8005e8c: d009 beq.n 8005ea2 <USB_EPStartXfer+0x4b2>
{
USBx_OUTEP(epnum)->DOEPDMA = (uint32_t)(ep->xfer_buff);
8005e8e: 68bb ldr r3, [r7, #8]
8005e90: 68d9 ldr r1, [r3, #12]
8005e92: 69bb ldr r3, [r7, #24]
8005e94: 015a lsls r2, r3, #5
8005e96: 69fb ldr r3, [r7, #28]
8005e98: 4413 add r3, r2
8005e9a: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005e9e: 460a mov r2, r1
8005ea0: 615a str r2, [r3, #20]
}
}
if (ep->type == EP_TYPE_ISOC)
8005ea2: 68bb ldr r3, [r7, #8]
8005ea4: 791b ldrb r3, [r3, #4]
8005ea6: 2b01 cmp r3, #1
8005ea8: d128 bne.n 8005efc <USB_EPStartXfer+0x50c>
{
if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U)
8005eaa: 69fb ldr r3, [r7, #28]
8005eac: f503 6300 add.w r3, r3, #2048 @ 0x800
8005eb0: 689b ldr r3, [r3, #8]
8005eb2: f403 7380 and.w r3, r3, #256 @ 0x100
8005eb6: 2b00 cmp r3, #0
8005eb8: d110 bne.n 8005edc <USB_EPStartXfer+0x4ec>
{
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM;
8005eba: 69bb ldr r3, [r7, #24]
8005ebc: 015a lsls r2, r3, #5
8005ebe: 69fb ldr r3, [r7, #28]
8005ec0: 4413 add r3, r2
8005ec2: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005ec6: 681b ldr r3, [r3, #0]
8005ec8: 69ba ldr r2, [r7, #24]
8005eca: 0151 lsls r1, r2, #5
8005ecc: 69fa ldr r2, [r7, #28]
8005ece: 440a add r2, r1
8005ed0: f502 6230 add.w r2, r2, #2816 @ 0xb00
8005ed4: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000
8005ed8: 6013 str r3, [r2, #0]
8005eda: e00f b.n 8005efc <USB_EPStartXfer+0x50c>
}
else
{
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM;
8005edc: 69bb ldr r3, [r7, #24]
8005ede: 015a lsls r2, r3, #5
8005ee0: 69fb ldr r3, [r7, #28]
8005ee2: 4413 add r3, r2
8005ee4: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005ee8: 681b ldr r3, [r3, #0]
8005eea: 69ba ldr r2, [r7, #24]
8005eec: 0151 lsls r1, r2, #5
8005eee: 69fa ldr r2, [r7, #28]
8005ef0: 440a add r2, r1
8005ef2: f502 6230 add.w r2, r2, #2816 @ 0xb00
8005ef6: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8005efa: 6013 str r3, [r2, #0]
}
}
/* EP enable */
USBx_OUTEP(epnum)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA);
8005efc: 69bb ldr r3, [r7, #24]
8005efe: 015a lsls r2, r3, #5
8005f00: 69fb ldr r3, [r7, #28]
8005f02: 4413 add r3, r2
8005f04: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005f08: 681b ldr r3, [r3, #0]
8005f0a: 69ba ldr r2, [r7, #24]
8005f0c: 0151 lsls r1, r2, #5
8005f0e: 69fa ldr r2, [r7, #28]
8005f10: 440a add r2, r1
8005f12: f502 6230 add.w r2, r2, #2816 @ 0xb00
8005f16: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000
8005f1a: 6013 str r3, [r2, #0]
}
return HAL_OK;
8005f1c: 2300 movs r3, #0
}
8005f1e: 4618 mov r0, r3
8005f20: 3720 adds r7, #32
8005f22: 46bd mov sp, r7
8005f24: bd80 pop {r7, pc}
8005f26: bf00 nop
8005f28: 1ff80000 .word 0x1ff80000
08005f2c <USB_EPStopXfer>:
* @param USBx usb device instance
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStopXfer(const USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep)
{
8005f2c: b480 push {r7}
8005f2e: b087 sub sp, #28
8005f30: af00 add r7, sp, #0
8005f32: 6078 str r0, [r7, #4]
8005f34: 6039 str r1, [r7, #0]
__IO uint32_t count = 0U;
8005f36: 2300 movs r3, #0
8005f38: 60fb str r3, [r7, #12]
HAL_StatusTypeDef ret = HAL_OK;
8005f3a: 2300 movs r3, #0
8005f3c: 75fb strb r3, [r7, #23]
uint32_t USBx_BASE = (uint32_t)USBx;
8005f3e: 687b ldr r3, [r7, #4]
8005f40: 613b str r3, [r7, #16]
/* IN endpoint */
if (ep->is_in == 1U)
8005f42: 683b ldr r3, [r7, #0]
8005f44: 785b ldrb r3, [r3, #1]
8005f46: 2b01 cmp r3, #1
8005f48: d14a bne.n 8005fe0 <USB_EPStopXfer+0xb4>
{
/* EP enable, IN data in FIFO */
if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
8005f4a: 683b ldr r3, [r7, #0]
8005f4c: 781b ldrb r3, [r3, #0]
8005f4e: 015a lsls r2, r3, #5
8005f50: 693b ldr r3, [r7, #16]
8005f52: 4413 add r3, r2
8005f54: f503 6310 add.w r3, r3, #2304 @ 0x900
8005f58: 681b ldr r3, [r3, #0]
8005f5a: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8005f5e: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8005f62: f040 8086 bne.w 8006072 <USB_EPStopXfer+0x146>
{
USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_SNAK);
8005f66: 683b ldr r3, [r7, #0]
8005f68: 781b ldrb r3, [r3, #0]
8005f6a: 015a lsls r2, r3, #5
8005f6c: 693b ldr r3, [r7, #16]
8005f6e: 4413 add r3, r2
8005f70: f503 6310 add.w r3, r3, #2304 @ 0x900
8005f74: 681b ldr r3, [r3, #0]
8005f76: 683a ldr r2, [r7, #0]
8005f78: 7812 ldrb r2, [r2, #0]
8005f7a: 0151 lsls r1, r2, #5
8005f7c: 693a ldr r2, [r7, #16]
8005f7e: 440a add r2, r1
8005f80: f502 6210 add.w r2, r2, #2304 @ 0x900
8005f84: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000
8005f88: 6013 str r3, [r2, #0]
USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS);
8005f8a: 683b ldr r3, [r7, #0]
8005f8c: 781b ldrb r3, [r3, #0]
8005f8e: 015a lsls r2, r3, #5
8005f90: 693b ldr r3, [r7, #16]
8005f92: 4413 add r3, r2
8005f94: f503 6310 add.w r3, r3, #2304 @ 0x900
8005f98: 681b ldr r3, [r3, #0]
8005f9a: 683a ldr r2, [r7, #0]
8005f9c: 7812 ldrb r2, [r2, #0]
8005f9e: 0151 lsls r1, r2, #5
8005fa0: 693a ldr r2, [r7, #16]
8005fa2: 440a add r2, r1
8005fa4: f502 6210 add.w r2, r2, #2304 @ 0x900
8005fa8: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
8005fac: 6013 str r3, [r2, #0]
do
{
count++;
8005fae: 68fb ldr r3, [r7, #12]
8005fb0: 3301 adds r3, #1
8005fb2: 60fb str r3, [r7, #12]
if (count > 10000U)
8005fb4: 68fb ldr r3, [r7, #12]
8005fb6: f242 7210 movw r2, #10000 @ 0x2710
8005fba: 4293 cmp r3, r2
8005fbc: d902 bls.n 8005fc4 <USB_EPStopXfer+0x98>
{
ret = HAL_ERROR;
8005fbe: 2301 movs r3, #1
8005fc0: 75fb strb r3, [r7, #23]
break;
8005fc2: e056 b.n 8006072 <USB_EPStopXfer+0x146>
}
} while (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA);
8005fc4: 683b ldr r3, [r7, #0]
8005fc6: 781b ldrb r3, [r3, #0]
8005fc8: 015a lsls r2, r3, #5
8005fca: 693b ldr r3, [r7, #16]
8005fcc: 4413 add r3, r2
8005fce: f503 6310 add.w r3, r3, #2304 @ 0x900
8005fd2: 681b ldr r3, [r3, #0]
8005fd4: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8005fd8: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8005fdc: d0e7 beq.n 8005fae <USB_EPStopXfer+0x82>
8005fde: e048 b.n 8006072 <USB_EPStopXfer+0x146>
}
}
else /* OUT endpoint */
{
if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
8005fe0: 683b ldr r3, [r7, #0]
8005fe2: 781b ldrb r3, [r3, #0]
8005fe4: 015a lsls r2, r3, #5
8005fe6: 693b ldr r3, [r7, #16]
8005fe8: 4413 add r3, r2
8005fea: f503 6330 add.w r3, r3, #2816 @ 0xb00
8005fee: 681b ldr r3, [r3, #0]
8005ff0: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
8005ff4: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8005ff8: d13b bne.n 8006072 <USB_EPStopXfer+0x146>
{
USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_SNAK);
8005ffa: 683b ldr r3, [r7, #0]
8005ffc: 781b ldrb r3, [r3, #0]
8005ffe: 015a lsls r2, r3, #5
8006000: 693b ldr r3, [r7, #16]
8006002: 4413 add r3, r2
8006004: f503 6330 add.w r3, r3, #2816 @ 0xb00
8006008: 681b ldr r3, [r3, #0]
800600a: 683a ldr r2, [r7, #0]
800600c: 7812 ldrb r2, [r2, #0]
800600e: 0151 lsls r1, r2, #5
8006010: 693a ldr r2, [r7, #16]
8006012: 440a add r2, r1
8006014: f502 6230 add.w r2, r2, #2816 @ 0xb00
8006018: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000
800601c: 6013 str r3, [r2, #0]
USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS);
800601e: 683b ldr r3, [r7, #0]
8006020: 781b ldrb r3, [r3, #0]
8006022: 015a lsls r2, r3, #5
8006024: 693b ldr r3, [r7, #16]
8006026: 4413 add r3, r2
8006028: f503 6330 add.w r3, r3, #2816 @ 0xb00
800602c: 681b ldr r3, [r3, #0]
800602e: 683a ldr r2, [r7, #0]
8006030: 7812 ldrb r2, [r2, #0]
8006032: 0151 lsls r1, r2, #5
8006034: 693a ldr r2, [r7, #16]
8006036: 440a add r2, r1
8006038: f502 6230 add.w r2, r2, #2816 @ 0xb00
800603c: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000
8006040: 6013 str r3, [r2, #0]
do
{
count++;
8006042: 68fb ldr r3, [r7, #12]
8006044: 3301 adds r3, #1
8006046: 60fb str r3, [r7, #12]
if (count > 10000U)
8006048: 68fb ldr r3, [r7, #12]
800604a: f242 7210 movw r2, #10000 @ 0x2710
800604e: 4293 cmp r3, r2
8006050: d902 bls.n 8006058 <USB_EPStopXfer+0x12c>
{
ret = HAL_ERROR;
8006052: 2301 movs r3, #1
8006054: 75fb strb r3, [r7, #23]
break;
8006056: e00c b.n 8006072 <USB_EPStopXfer+0x146>
}
} while (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA);
8006058: 683b ldr r3, [r7, #0]
800605a: 781b ldrb r3, [r3, #0]
800605c: 015a lsls r2, r3, #5
800605e: 693b ldr r3, [r7, #16]
8006060: 4413 add r3, r2
8006062: f503 6330 add.w r3, r3, #2816 @ 0xb00
8006066: 681b ldr r3, [r3, #0]
8006068: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
800606c: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
8006070: d0e7 beq.n 8006042 <USB_EPStopXfer+0x116>
}
}
return ret;
8006072: 7dfb ldrb r3, [r7, #23]
}
8006074: 4618 mov r0, r3
8006076: 371c adds r7, #28
8006078: 46bd mov sp, r7
800607a: f85d 7b04 ldr.w r7, [sp], #4
800607e: 4770 bx lr
08006080 <USB_WritePacket>:
* 1 : DMA feature used
* @retval HAL status
*/
HAL_StatusTypeDef USB_WritePacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *src,
uint8_t ch_ep_num, uint16_t len, uint8_t dma)
{
8006080: b480 push {r7}
8006082: b089 sub sp, #36 @ 0x24
8006084: af00 add r7, sp, #0
8006086: 60f8 str r0, [r7, #12]
8006088: 60b9 str r1, [r7, #8]
800608a: 4611 mov r1, r2
800608c: 461a mov r2, r3
800608e: 460b mov r3, r1
8006090: 71fb strb r3, [r7, #7]
8006092: 4613 mov r3, r2
8006094: 80bb strh r3, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8006096: 68fb ldr r3, [r7, #12]
8006098: 617b str r3, [r7, #20]
uint8_t *pSrc = src;
800609a: 68bb ldr r3, [r7, #8]
800609c: 61fb str r3, [r7, #28]
uint32_t count32b;
uint32_t i;
if (dma == 0U)
800609e: f897 3028 ldrb.w r3, [r7, #40] @ 0x28
80060a2: 2b00 cmp r3, #0
80060a4: d123 bne.n 80060ee <USB_WritePacket+0x6e>
{
count32b = ((uint32_t)len + 3U) / 4U;
80060a6: 88bb ldrh r3, [r7, #4]
80060a8: 3303 adds r3, #3
80060aa: 089b lsrs r3, r3, #2
80060ac: 613b str r3, [r7, #16]
for (i = 0U; i < count32b; i++)
80060ae: 2300 movs r3, #0
80060b0: 61bb str r3, [r7, #24]
80060b2: e018 b.n 80060e6 <USB_WritePacket+0x66>
{
USBx_DFIFO((uint32_t)ch_ep_num) = __UNALIGNED_UINT32_READ(pSrc);
80060b4: 79fb ldrb r3, [r7, #7]
80060b6: 031a lsls r2, r3, #12
80060b8: 697b ldr r3, [r7, #20]
80060ba: 4413 add r3, r2
80060bc: f503 5380 add.w r3, r3, #4096 @ 0x1000
80060c0: 461a mov r2, r3
80060c2: 69fb ldr r3, [r7, #28]
80060c4: 681b ldr r3, [r3, #0]
80060c6: 6013 str r3, [r2, #0]
pSrc++;
80060c8: 69fb ldr r3, [r7, #28]
80060ca: 3301 adds r3, #1
80060cc: 61fb str r3, [r7, #28]
pSrc++;
80060ce: 69fb ldr r3, [r7, #28]
80060d0: 3301 adds r3, #1
80060d2: 61fb str r3, [r7, #28]
pSrc++;
80060d4: 69fb ldr r3, [r7, #28]
80060d6: 3301 adds r3, #1
80060d8: 61fb str r3, [r7, #28]
pSrc++;
80060da: 69fb ldr r3, [r7, #28]
80060dc: 3301 adds r3, #1
80060de: 61fb str r3, [r7, #28]
for (i = 0U; i < count32b; i++)
80060e0: 69bb ldr r3, [r7, #24]
80060e2: 3301 adds r3, #1
80060e4: 61bb str r3, [r7, #24]
80060e6: 69ba ldr r2, [r7, #24]
80060e8: 693b ldr r3, [r7, #16]
80060ea: 429a cmp r2, r3
80060ec: d3e2 bcc.n 80060b4 <USB_WritePacket+0x34>
}
}
return HAL_OK;
80060ee: 2300 movs r3, #0
}
80060f0: 4618 mov r0, r3
80060f2: 3724 adds r7, #36 @ 0x24
80060f4: 46bd mov sp, r7
80060f6: f85d 7b04 ldr.w r7, [sp], #4
80060fa: 4770 bx lr
080060fc <USB_ReadPacket>:
* @param dest source pointer
* @param len Number of bytes to read
* @retval pointer to destination buffer
*/
void *USB_ReadPacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len)
{
80060fc: b480 push {r7}
80060fe: b08b sub sp, #44 @ 0x2c
8006100: af00 add r7, sp, #0
8006102: 60f8 str r0, [r7, #12]
8006104: 60b9 str r1, [r7, #8]
8006106: 4613 mov r3, r2
8006108: 80fb strh r3, [r7, #6]
uint32_t USBx_BASE = (uint32_t)USBx;
800610a: 68fb ldr r3, [r7, #12]
800610c: 61bb str r3, [r7, #24]
uint8_t *pDest = dest;
800610e: 68bb ldr r3, [r7, #8]
8006110: 627b str r3, [r7, #36] @ 0x24
uint32_t pData;
uint32_t i;
uint32_t count32b = (uint32_t)len >> 2U;
8006112: 88fb ldrh r3, [r7, #6]
8006114: 089b lsrs r3, r3, #2
8006116: b29b uxth r3, r3
8006118: 617b str r3, [r7, #20]
uint16_t remaining_bytes = len % 4U;
800611a: 88fb ldrh r3, [r7, #6]
800611c: f003 0303 and.w r3, r3, #3
8006120: 83fb strh r3, [r7, #30]
for (i = 0U; i < count32b; i++)
8006122: 2300 movs r3, #0
8006124: 623b str r3, [r7, #32]
8006126: e014 b.n 8006152 <USB_ReadPacket+0x56>
{
__UNALIGNED_UINT32_WRITE(pDest, USBx_DFIFO(0U));
8006128: 69bb ldr r3, [r7, #24]
800612a: f503 5380 add.w r3, r3, #4096 @ 0x1000
800612e: 681a ldr r2, [r3, #0]
8006130: 6a7b ldr r3, [r7, #36] @ 0x24
8006132: 601a str r2, [r3, #0]
pDest++;
8006134: 6a7b ldr r3, [r7, #36] @ 0x24
8006136: 3301 adds r3, #1
8006138: 627b str r3, [r7, #36] @ 0x24
pDest++;
800613a: 6a7b ldr r3, [r7, #36] @ 0x24
800613c: 3301 adds r3, #1
800613e: 627b str r3, [r7, #36] @ 0x24
pDest++;
8006140: 6a7b ldr r3, [r7, #36] @ 0x24
8006142: 3301 adds r3, #1
8006144: 627b str r3, [r7, #36] @ 0x24
pDest++;
8006146: 6a7b ldr r3, [r7, #36] @ 0x24
8006148: 3301 adds r3, #1
800614a: 627b str r3, [r7, #36] @ 0x24
for (i = 0U; i < count32b; i++)
800614c: 6a3b ldr r3, [r7, #32]
800614e: 3301 adds r3, #1
8006150: 623b str r3, [r7, #32]
8006152: 6a3a ldr r2, [r7, #32]
8006154: 697b ldr r3, [r7, #20]
8006156: 429a cmp r2, r3
8006158: d3e6 bcc.n 8006128 <USB_ReadPacket+0x2c>
}
/* When Number of data is not word aligned, read the remaining byte */
if (remaining_bytes != 0U)
800615a: 8bfb ldrh r3, [r7, #30]
800615c: 2b00 cmp r3, #0
800615e: d01e beq.n 800619e <USB_ReadPacket+0xa2>
{
i = 0U;
8006160: 2300 movs r3, #0
8006162: 623b str r3, [r7, #32]
__UNALIGNED_UINT32_WRITE(&pData, USBx_DFIFO(0U));
8006164: 69bb ldr r3, [r7, #24]
8006166: f503 5380 add.w r3, r3, #4096 @ 0x1000
800616a: 461a mov r2, r3
800616c: f107 0310 add.w r3, r7, #16
8006170: 6812 ldr r2, [r2, #0]
8006172: 601a str r2, [r3, #0]
do
{
*(uint8_t *)pDest = (uint8_t)(pData >> (8U * (uint8_t)(i)));
8006174: 693a ldr r2, [r7, #16]
8006176: 6a3b ldr r3, [r7, #32]
8006178: b2db uxtb r3, r3
800617a: 00db lsls r3, r3, #3
800617c: fa22 f303 lsr.w r3, r2, r3
8006180: b2da uxtb r2, r3
8006182: 6a7b ldr r3, [r7, #36] @ 0x24
8006184: 701a strb r2, [r3, #0]
i++;
8006186: 6a3b ldr r3, [r7, #32]
8006188: 3301 adds r3, #1
800618a: 623b str r3, [r7, #32]
pDest++;
800618c: 6a7b ldr r3, [r7, #36] @ 0x24
800618e: 3301 adds r3, #1
8006190: 627b str r3, [r7, #36] @ 0x24
remaining_bytes--;
8006192: 8bfb ldrh r3, [r7, #30]
8006194: 3b01 subs r3, #1
8006196: 83fb strh r3, [r7, #30]
} while (remaining_bytes != 0U);
8006198: 8bfb ldrh r3, [r7, #30]
800619a: 2b00 cmp r3, #0
800619c: d1ea bne.n 8006174 <USB_ReadPacket+0x78>
}
return ((void *)pDest);
800619e: 6a7b ldr r3, [r7, #36] @ 0x24
}
80061a0: 4618 mov r0, r3
80061a2: 372c adds r7, #44 @ 0x2c
80061a4: 46bd mov sp, r7
80061a6: f85d 7b04 ldr.w r7, [sp], #4
80061aa: 4770 bx lr
080061ac <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
80061ac: b480 push {r7}
80061ae: b085 sub sp, #20
80061b0: af00 add r7, sp, #0
80061b2: 6078 str r0, [r7, #4]
80061b4: 6039 str r1, [r7, #0]
uint32_t USBx_BASE = (uint32_t)USBx;
80061b6: 687b ldr r3, [r7, #4]
80061b8: 60fb str r3, [r7, #12]
uint32_t epnum = (uint32_t)ep->num;
80061ba: 683b ldr r3, [r7, #0]
80061bc: 781b ldrb r3, [r3, #0]
80061be: 60bb str r3, [r7, #8]
if (ep->is_in == 1U)
80061c0: 683b ldr r3, [r7, #0]
80061c2: 785b ldrb r3, [r3, #1]
80061c4: 2b01 cmp r3, #1
80061c6: d12c bne.n 8006222 <USB_EPSetStall+0x76>
{
if (((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == 0U) && (epnum != 0U))
80061c8: 68bb ldr r3, [r7, #8]
80061ca: 015a lsls r2, r3, #5
80061cc: 68fb ldr r3, [r7, #12]
80061ce: 4413 add r3, r2
80061d0: f503 6310 add.w r3, r3, #2304 @ 0x900
80061d4: 681b ldr r3, [r3, #0]
80061d6: 2b00 cmp r3, #0
80061d8: db12 blt.n 8006200 <USB_EPSetStall+0x54>
80061da: 68bb ldr r3, [r7, #8]
80061dc: 2b00 cmp r3, #0
80061de: d00f beq.n 8006200 <USB_EPSetStall+0x54>
{
USBx_INEP(epnum)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS);
80061e0: 68bb ldr r3, [r7, #8]
80061e2: 015a lsls r2, r3, #5
80061e4: 68fb ldr r3, [r7, #12]
80061e6: 4413 add r3, r2
80061e8: f503 6310 add.w r3, r3, #2304 @ 0x900
80061ec: 681b ldr r3, [r3, #0]
80061ee: 68ba ldr r2, [r7, #8]
80061f0: 0151 lsls r1, r2, #5
80061f2: 68fa ldr r2, [r7, #12]
80061f4: 440a add r2, r1
80061f6: f502 6210 add.w r2, r2, #2304 @ 0x900
80061fa: f023 4380 bic.w r3, r3, #1073741824 @ 0x40000000
80061fe: 6013 str r3, [r2, #0]
}
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_STALL;
8006200: 68bb ldr r3, [r7, #8]
8006202: 015a lsls r2, r3, #5
8006204: 68fb ldr r3, [r7, #12]
8006206: 4413 add r3, r2
8006208: f503 6310 add.w r3, r3, #2304 @ 0x900
800620c: 681b ldr r3, [r3, #0]
800620e: 68ba ldr r2, [r7, #8]
8006210: 0151 lsls r1, r2, #5
8006212: 68fa ldr r2, [r7, #12]
8006214: 440a add r2, r1
8006216: f502 6210 add.w r2, r2, #2304 @ 0x900
800621a: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
800621e: 6013 str r3, [r2, #0]
8006220: e02b b.n 800627a <USB_EPSetStall+0xce>
}
else
{
if (((USBx_OUTEP(epnum)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == 0U) && (epnum != 0U))
8006222: 68bb ldr r3, [r7, #8]
8006224: 015a lsls r2, r3, #5
8006226: 68fb ldr r3, [r7, #12]
8006228: 4413 add r3, r2
800622a: f503 6330 add.w r3, r3, #2816 @ 0xb00
800622e: 681b ldr r3, [r3, #0]
8006230: 2b00 cmp r3, #0
8006232: db12 blt.n 800625a <USB_EPSetStall+0xae>
8006234: 68bb ldr r3, [r7, #8]
8006236: 2b00 cmp r3, #0
8006238: d00f beq.n 800625a <USB_EPSetStall+0xae>
{
USBx_OUTEP(epnum)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS);
800623a: 68bb ldr r3, [r7, #8]
800623c: 015a lsls r2, r3, #5
800623e: 68fb ldr r3, [r7, #12]
8006240: 4413 add r3, r2
8006242: f503 6330 add.w r3, r3, #2816 @ 0xb00
8006246: 681b ldr r3, [r3, #0]
8006248: 68ba ldr r2, [r7, #8]
800624a: 0151 lsls r1, r2, #5
800624c: 68fa ldr r2, [r7, #12]
800624e: 440a add r2, r1
8006250: f502 6230 add.w r2, r2, #2816 @ 0xb00
8006254: f023 4380 bic.w r3, r3, #1073741824 @ 0x40000000
8006258: 6013 str r3, [r2, #0]
}
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_STALL;
800625a: 68bb ldr r3, [r7, #8]
800625c: 015a lsls r2, r3, #5
800625e: 68fb ldr r3, [r7, #12]
8006260: 4413 add r3, r2
8006262: f503 6330 add.w r3, r3, #2816 @ 0xb00
8006266: 681b ldr r3, [r3, #0]
8006268: 68ba ldr r2, [r7, #8]
800626a: 0151 lsls r1, r2, #5
800626c: 68fa ldr r2, [r7, #12]
800626e: 440a add r2, r1
8006270: f502 6230 add.w r2, r2, #2816 @ 0xb00
8006274: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
8006278: 6013 str r3, [r2, #0]
}
return HAL_OK;
800627a: 2300 movs r3, #0
}
800627c: 4618 mov r0, r3
800627e: 3714 adds r7, #20
8006280: 46bd mov sp, r7
8006282: f85d 7b04 ldr.w r7, [sp], #4
8006286: 4770 bx lr
08006288 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep)
{
8006288: b480 push {r7}
800628a: b085 sub sp, #20
800628c: af00 add r7, sp, #0
800628e: 6078 str r0, [r7, #4]
8006290: 6039 str r1, [r7, #0]
uint32_t USBx_BASE = (uint32_t)USBx;
8006292: 687b ldr r3, [r7, #4]
8006294: 60fb str r3, [r7, #12]
uint32_t epnum = (uint32_t)ep->num;
8006296: 683b ldr r3, [r7, #0]
8006298: 781b ldrb r3, [r3, #0]
800629a: 60bb str r3, [r7, #8]
if (ep->is_in == 1U)
800629c: 683b ldr r3, [r7, #0]
800629e: 785b ldrb r3, [r3, #1]
80062a0: 2b01 cmp r3, #1
80062a2: d128 bne.n 80062f6 <USB_EPClearStall+0x6e>
{
USBx_INEP(epnum)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
80062a4: 68bb ldr r3, [r7, #8]
80062a6: 015a lsls r2, r3, #5
80062a8: 68fb ldr r3, [r7, #12]
80062aa: 4413 add r3, r2
80062ac: f503 6310 add.w r3, r3, #2304 @ 0x900
80062b0: 681b ldr r3, [r3, #0]
80062b2: 68ba ldr r2, [r7, #8]
80062b4: 0151 lsls r1, r2, #5
80062b6: 68fa ldr r2, [r7, #12]
80062b8: 440a add r2, r1
80062ba: f502 6210 add.w r2, r2, #2304 @ 0x900
80062be: f423 1300 bic.w r3, r3, #2097152 @ 0x200000
80062c2: 6013 str r3, [r2, #0]
if ((ep->type == EP_TYPE_INTR) || (ep->type == EP_TYPE_BULK))
80062c4: 683b ldr r3, [r7, #0]
80062c6: 791b ldrb r3, [r3, #4]
80062c8: 2b03 cmp r3, #3
80062ca: d003 beq.n 80062d4 <USB_EPClearStall+0x4c>
80062cc: 683b ldr r3, [r7, #0]
80062ce: 791b ldrb r3, [r3, #4]
80062d0: 2b02 cmp r3, #2
80062d2: d138 bne.n 8006346 <USB_EPClearStall+0xbe>
{
USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */
80062d4: 68bb ldr r3, [r7, #8]
80062d6: 015a lsls r2, r3, #5
80062d8: 68fb ldr r3, [r7, #12]
80062da: 4413 add r3, r2
80062dc: f503 6310 add.w r3, r3, #2304 @ 0x900
80062e0: 681b ldr r3, [r3, #0]
80062e2: 68ba ldr r2, [r7, #8]
80062e4: 0151 lsls r1, r2, #5
80062e6: 68fa ldr r2, [r7, #12]
80062e8: 440a add r2, r1
80062ea: f502 6210 add.w r2, r2, #2304 @ 0x900
80062ee: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80062f2: 6013 str r3, [r2, #0]
80062f4: e027 b.n 8006346 <USB_EPClearStall+0xbe>
}
}
else
{
USBx_OUTEP(epnum)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
80062f6: 68bb ldr r3, [r7, #8]
80062f8: 015a lsls r2, r3, #5
80062fa: 68fb ldr r3, [r7, #12]
80062fc: 4413 add r3, r2
80062fe: f503 6330 add.w r3, r3, #2816 @ 0xb00
8006302: 681b ldr r3, [r3, #0]
8006304: 68ba ldr r2, [r7, #8]
8006306: 0151 lsls r1, r2, #5
8006308: 68fa ldr r2, [r7, #12]
800630a: 440a add r2, r1
800630c: f502 6230 add.w r2, r2, #2816 @ 0xb00
8006310: f423 1300 bic.w r3, r3, #2097152 @ 0x200000
8006314: 6013 str r3, [r2, #0]
if ((ep->type == EP_TYPE_INTR) || (ep->type == EP_TYPE_BULK))
8006316: 683b ldr r3, [r7, #0]
8006318: 791b ldrb r3, [r3, #4]
800631a: 2b03 cmp r3, #3
800631c: d003 beq.n 8006326 <USB_EPClearStall+0x9e>
800631e: 683b ldr r3, [r7, #0]
8006320: 791b ldrb r3, [r3, #4]
8006322: 2b02 cmp r3, #2
8006324: d10f bne.n 8006346 <USB_EPClearStall+0xbe>
{
USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */
8006326: 68bb ldr r3, [r7, #8]
8006328: 015a lsls r2, r3, #5
800632a: 68fb ldr r3, [r7, #12]
800632c: 4413 add r3, r2
800632e: f503 6330 add.w r3, r3, #2816 @ 0xb00
8006332: 681b ldr r3, [r3, #0]
8006334: 68ba ldr r2, [r7, #8]
8006336: 0151 lsls r1, r2, #5
8006338: 68fa ldr r2, [r7, #12]
800633a: 440a add r2, r1
800633c: f502 6230 add.w r2, r2, #2816 @ 0xb00
8006340: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8006344: 6013 str r3, [r2, #0]
}
}
return HAL_OK;
8006346: 2300 movs r3, #0
}
8006348: 4618 mov r0, r3
800634a: 3714 adds r7, #20
800634c: 46bd mov sp, r7
800634e: f85d 7b04 ldr.w r7, [sp], #4
8006352: 4770 bx lr
08006354 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(const USB_OTG_GlobalTypeDef *USBx, uint8_t address)
{
8006354: b480 push {r7}
8006356: b085 sub sp, #20
8006358: af00 add r7, sp, #0
800635a: 6078 str r0, [r7, #4]
800635c: 460b mov r3, r1
800635e: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
8006360: 687b ldr r3, [r7, #4]
8006362: 60fb str r3, [r7, #12]
USBx_DEVICE->DCFG &= ~(USB_OTG_DCFG_DAD);
8006364: 68fb ldr r3, [r7, #12]
8006366: f503 6300 add.w r3, r3, #2048 @ 0x800
800636a: 681b ldr r3, [r3, #0]
800636c: 68fa ldr r2, [r7, #12]
800636e: f502 6200 add.w r2, r2, #2048 @ 0x800
8006372: f423 63fe bic.w r3, r3, #2032 @ 0x7f0
8006376: 6013 str r3, [r2, #0]
USBx_DEVICE->DCFG |= ((uint32_t)address << 4) & USB_OTG_DCFG_DAD;
8006378: 68fb ldr r3, [r7, #12]
800637a: f503 6300 add.w r3, r3, #2048 @ 0x800
800637e: 681a ldr r2, [r3, #0]
8006380: 78fb ldrb r3, [r7, #3]
8006382: 011b lsls r3, r3, #4
8006384: f403 63fe and.w r3, r3, #2032 @ 0x7f0
8006388: 68f9 ldr r1, [r7, #12]
800638a: f501 6100 add.w r1, r1, #2048 @ 0x800
800638e: 4313 orrs r3, r2
8006390: 600b str r3, [r1, #0]
return HAL_OK;
8006392: 2300 movs r3, #0
}
8006394: 4618 mov r0, r3
8006396: 3714 adds r7, #20
8006398: 46bd mov sp, r7
800639a: f85d 7b04 ldr.w r7, [sp], #4
800639e: 4770 bx lr
080063a0 <USB_DevConnect>:
* @brief USB_DevConnect : Connect the USB device by enabling Rpu
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(const USB_OTG_GlobalTypeDef *USBx)
{
80063a0: b480 push {r7}
80063a2: b085 sub sp, #20
80063a4: af00 add r7, sp, #0
80063a6: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
80063a8: 687b ldr r3, [r7, #4]
80063aa: 60fb str r3, [r7, #12]
/* In case phy is stopped, ensure to ungate and restore the phy CLK */
USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK);
80063ac: 68fb ldr r3, [r7, #12]
80063ae: f503 6360 add.w r3, r3, #3584 @ 0xe00
80063b2: 681b ldr r3, [r3, #0]
80063b4: 68fa ldr r2, [r7, #12]
80063b6: f502 6260 add.w r2, r2, #3584 @ 0xe00
80063ba: f023 0303 bic.w r3, r3, #3
80063be: 6013 str r3, [r2, #0]
USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS;
80063c0: 68fb ldr r3, [r7, #12]
80063c2: f503 6300 add.w r3, r3, #2048 @ 0x800
80063c6: 685b ldr r3, [r3, #4]
80063c8: 68fa ldr r2, [r7, #12]
80063ca: f502 6200 add.w r2, r2, #2048 @ 0x800
80063ce: f023 0302 bic.w r3, r3, #2
80063d2: 6053 str r3, [r2, #4]
return HAL_OK;
80063d4: 2300 movs r3, #0
}
80063d6: 4618 mov r0, r3
80063d8: 3714 adds r7, #20
80063da: 46bd mov sp, r7
80063dc: f85d 7b04 ldr.w r7, [sp], #4
80063e0: 4770 bx lr
080063e2 <USB_DevDisconnect>:
* @brief USB_DevDisconnect : Disconnect the USB device by disabling Rpu
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(const USB_OTG_GlobalTypeDef *USBx)
{
80063e2: b480 push {r7}
80063e4: b085 sub sp, #20
80063e6: af00 add r7, sp, #0
80063e8: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
80063ea: 687b ldr r3, [r7, #4]
80063ec: 60fb str r3, [r7, #12]
/* In case phy is stopped, ensure to ungate and restore the phy CLK */
USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK);
80063ee: 68fb ldr r3, [r7, #12]
80063f0: f503 6360 add.w r3, r3, #3584 @ 0xe00
80063f4: 681b ldr r3, [r3, #0]
80063f6: 68fa ldr r2, [r7, #12]
80063f8: f502 6260 add.w r2, r2, #3584 @ 0xe00
80063fc: f023 0303 bic.w r3, r3, #3
8006400: 6013 str r3, [r2, #0]
USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS;
8006402: 68fb ldr r3, [r7, #12]
8006404: f503 6300 add.w r3, r3, #2048 @ 0x800
8006408: 685b ldr r3, [r3, #4]
800640a: 68fa ldr r2, [r7, #12]
800640c: f502 6200 add.w r2, r2, #2048 @ 0x800
8006410: f043 0302 orr.w r3, r3, #2
8006414: 6053 str r3, [r2, #4]
return HAL_OK;
8006416: 2300 movs r3, #0
}
8006418: 4618 mov r0, r3
800641a: 3714 adds r7, #20
800641c: 46bd mov sp, r7
800641e: f85d 7b04 ldr.w r7, [sp], #4
8006422: 4770 bx lr
08006424 <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts: return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef const *USBx)
{
8006424: b480 push {r7}
8006426: b085 sub sp, #20
8006428: af00 add r7, sp, #0
800642a: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->GINTSTS;
800642c: 687b ldr r3, [r7, #4]
800642e: 695b ldr r3, [r3, #20]
8006430: 60fb str r3, [r7, #12]
tmpreg &= USBx->GINTMSK;
8006432: 687b ldr r3, [r7, #4]
8006434: 699b ldr r3, [r3, #24]
8006436: 68fa ldr r2, [r7, #12]
8006438: 4013 ands r3, r2
800643a: 60fb str r3, [r7, #12]
return tmpreg;
800643c: 68fb ldr r3, [r7, #12]
}
800643e: 4618 mov r0, r3
8006440: 3714 adds r7, #20
8006442: 46bd mov sp, r7
8006444: f85d 7b04 ldr.w r7, [sp], #4
8006448: 4770 bx lr
0800644a <USB_ReadDevAllOutEpInterrupt>:
* @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
* @param USBx Selected device
* @retval USB Device OUT EP interrupt status
*/
uint32_t USB_ReadDevAllOutEpInterrupt(const USB_OTG_GlobalTypeDef *USBx)
{
800644a: b480 push {r7}
800644c: b085 sub sp, #20
800644e: af00 add r7, sp, #0
8006450: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8006452: 687b ldr r3, [r7, #4]
8006454: 60fb str r3, [r7, #12]
uint32_t tmpreg;
tmpreg = USBx_DEVICE->DAINT;
8006456: 68fb ldr r3, [r7, #12]
8006458: f503 6300 add.w r3, r3, #2048 @ 0x800
800645c: 699b ldr r3, [r3, #24]
800645e: 60bb str r3, [r7, #8]
tmpreg &= USBx_DEVICE->DAINTMSK;
8006460: 68fb ldr r3, [r7, #12]
8006462: f503 6300 add.w r3, r3, #2048 @ 0x800
8006466: 69db ldr r3, [r3, #28]
8006468: 68ba ldr r2, [r7, #8]
800646a: 4013 ands r3, r2
800646c: 60bb str r3, [r7, #8]
return ((tmpreg & 0xffff0000U) >> 16);
800646e: 68bb ldr r3, [r7, #8]
8006470: 0c1b lsrs r3, r3, #16
}
8006472: 4618 mov r0, r3
8006474: 3714 adds r7, #20
8006476: 46bd mov sp, r7
8006478: f85d 7b04 ldr.w r7, [sp], #4
800647c: 4770 bx lr
0800647e <USB_ReadDevAllInEpInterrupt>:
* @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
* @param USBx Selected device
* @retval USB Device IN EP interrupt status
*/
uint32_t USB_ReadDevAllInEpInterrupt(const USB_OTG_GlobalTypeDef *USBx)
{
800647e: b480 push {r7}
8006480: b085 sub sp, #20
8006482: af00 add r7, sp, #0
8006484: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
8006486: 687b ldr r3, [r7, #4]
8006488: 60fb str r3, [r7, #12]
uint32_t tmpreg;
tmpreg = USBx_DEVICE->DAINT;
800648a: 68fb ldr r3, [r7, #12]
800648c: f503 6300 add.w r3, r3, #2048 @ 0x800
8006490: 699b ldr r3, [r3, #24]
8006492: 60bb str r3, [r7, #8]
tmpreg &= USBx_DEVICE->DAINTMSK;
8006494: 68fb ldr r3, [r7, #12]
8006496: f503 6300 add.w r3, r3, #2048 @ 0x800
800649a: 69db ldr r3, [r3, #28]
800649c: 68ba ldr r2, [r7, #8]
800649e: 4013 ands r3, r2
80064a0: 60bb str r3, [r7, #8]
return ((tmpreg & 0xFFFFU));
80064a2: 68bb ldr r3, [r7, #8]
80064a4: b29b uxth r3, r3
}
80064a6: 4618 mov r0, r3
80064a8: 3714 adds r7, #20
80064aa: 46bd mov sp, r7
80064ac: f85d 7b04 ldr.w r7, [sp], #4
80064b0: 4770 bx lr
080064b2 <USB_ReadDevOutEPInterrupt>:
* @param epnum endpoint number
* This parameter can be a value from 0 to 15
* @retval Device OUT EP Interrupt register
*/
uint32_t USB_ReadDevOutEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
{
80064b2: b480 push {r7}
80064b4: b085 sub sp, #20
80064b6: af00 add r7, sp, #0
80064b8: 6078 str r0, [r7, #4]
80064ba: 460b mov r3, r1
80064bc: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
80064be: 687b ldr r3, [r7, #4]
80064c0: 60fb str r3, [r7, #12]
uint32_t tmpreg;
tmpreg = USBx_OUTEP((uint32_t)epnum)->DOEPINT;
80064c2: 78fb ldrb r3, [r7, #3]
80064c4: 015a lsls r2, r3, #5
80064c6: 68fb ldr r3, [r7, #12]
80064c8: 4413 add r3, r2
80064ca: f503 6330 add.w r3, r3, #2816 @ 0xb00
80064ce: 689b ldr r3, [r3, #8]
80064d0: 60bb str r3, [r7, #8]
tmpreg &= USBx_DEVICE->DOEPMSK;
80064d2: 68fb ldr r3, [r7, #12]
80064d4: f503 6300 add.w r3, r3, #2048 @ 0x800
80064d8: 695b ldr r3, [r3, #20]
80064da: 68ba ldr r2, [r7, #8]
80064dc: 4013 ands r3, r2
80064de: 60bb str r3, [r7, #8]
return tmpreg;
80064e0: 68bb ldr r3, [r7, #8]
}
80064e2: 4618 mov r0, r3
80064e4: 3714 adds r7, #20
80064e6: 46bd mov sp, r7
80064e8: f85d 7b04 ldr.w r7, [sp], #4
80064ec: 4770 bx lr
080064ee <USB_ReadDevInEPInterrupt>:
* @param epnum endpoint number
* This parameter can be a value from 0 to 15
* @retval Device IN EP Interrupt register
*/
uint32_t USB_ReadDevInEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum)
{
80064ee: b480 push {r7}
80064f0: b087 sub sp, #28
80064f2: af00 add r7, sp, #0
80064f4: 6078 str r0, [r7, #4]
80064f6: 460b mov r3, r1
80064f8: 70fb strb r3, [r7, #3]
uint32_t USBx_BASE = (uint32_t)USBx;
80064fa: 687b ldr r3, [r7, #4]
80064fc: 617b str r3, [r7, #20]
uint32_t tmpreg;
uint32_t msk;
uint32_t emp;
msk = USBx_DEVICE->DIEPMSK;
80064fe: 697b ldr r3, [r7, #20]
8006500: f503 6300 add.w r3, r3, #2048 @ 0x800
8006504: 691b ldr r3, [r3, #16]
8006506: 613b str r3, [r7, #16]
emp = USBx_DEVICE->DIEPEMPMSK;
8006508: 697b ldr r3, [r7, #20]
800650a: f503 6300 add.w r3, r3, #2048 @ 0x800
800650e: 6b5b ldr r3, [r3, #52] @ 0x34
8006510: 60fb str r3, [r7, #12]
msk |= ((emp >> (epnum & EP_ADDR_MSK)) & 0x1U) << 7;
8006512: 78fb ldrb r3, [r7, #3]
8006514: f003 030f and.w r3, r3, #15
8006518: 68fa ldr r2, [r7, #12]
800651a: fa22 f303 lsr.w r3, r2, r3
800651e: 01db lsls r3, r3, #7
8006520: b2db uxtb r3, r3
8006522: 693a ldr r2, [r7, #16]
8006524: 4313 orrs r3, r2
8006526: 613b str r3, [r7, #16]
tmpreg = USBx_INEP((uint32_t)epnum)->DIEPINT & msk;
8006528: 78fb ldrb r3, [r7, #3]
800652a: 015a lsls r2, r3, #5
800652c: 697b ldr r3, [r7, #20]
800652e: 4413 add r3, r2
8006530: f503 6310 add.w r3, r3, #2304 @ 0x900
8006534: 689b ldr r3, [r3, #8]
8006536: 693a ldr r2, [r7, #16]
8006538: 4013 ands r3, r2
800653a: 60bb str r3, [r7, #8]
return tmpreg;
800653c: 68bb ldr r3, [r7, #8]
}
800653e: 4618 mov r0, r3
8006540: 371c adds r7, #28
8006542: 46bd mov sp, r7
8006544: f85d 7b04 ldr.w r7, [sp], #4
8006548: 4770 bx lr
0800654a <USB_GetMode>:
* This parameter can be one of these values:
* 1 : Host
* 0 : Device
*/
uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx)
{
800654a: b480 push {r7}
800654c: b083 sub sp, #12
800654e: af00 add r7, sp, #0
8006550: 6078 str r0, [r7, #4]
return ((USBx->GINTSTS) & 0x1U);
8006552: 687b ldr r3, [r7, #4]
8006554: 695b ldr r3, [r3, #20]
8006556: f003 0301 and.w r3, r3, #1
}
800655a: 4618 mov r0, r3
800655c: 370c adds r7, #12
800655e: 46bd mov sp, r7
8006560: f85d 7b04 ldr.w r7, [sp], #4
8006564: 4770 bx lr
08006566 <USB_ActivateSetup>:
* @brief Activate EP0 for Setup transactions
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateSetup(const USB_OTG_GlobalTypeDef *USBx)
{
8006566: b480 push {r7}
8006568: b085 sub sp, #20
800656a: af00 add r7, sp, #0
800656c: 6078 str r0, [r7, #4]
uint32_t USBx_BASE = (uint32_t)USBx;
800656e: 687b ldr r3, [r7, #4]
8006570: 60fb str r3, [r7, #12]
/* Set the MPS of the IN EP0 to 64 bytes */
USBx_INEP(0U)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;
8006572: 68fb ldr r3, [r7, #12]
8006574: f503 6310 add.w r3, r3, #2304 @ 0x900
8006578: 681b ldr r3, [r3, #0]
800657a: 68fa ldr r2, [r7, #12]
800657c: f502 6210 add.w r2, r2, #2304 @ 0x900
8006580: f423 63ff bic.w r3, r3, #2040 @ 0x7f8
8006584: f023 0307 bic.w r3, r3, #7
8006588: 6013 str r3, [r2, #0]
USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK;
800658a: 68fb ldr r3, [r7, #12]
800658c: f503 6300 add.w r3, r3, #2048 @ 0x800
8006590: 685b ldr r3, [r3, #4]
8006592: 68fa ldr r2, [r7, #12]
8006594: f502 6200 add.w r2, r2, #2048 @ 0x800
8006598: f443 7380 orr.w r3, r3, #256 @ 0x100
800659c: 6053 str r3, [r2, #4]
return HAL_OK;
800659e: 2300 movs r3, #0
}
80065a0: 4618 mov r0, r3
80065a2: 3714 adds r7, #20
80065a4: 46bd mov sp, r7
80065a6: f85d 7b04 ldr.w r7, [sp], #4
80065aa: 4770 bx lr
080065ac <USB_EP0_OutStart>:
* 1 : DMA feature used
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(const USB_OTG_GlobalTypeDef *USBx, uint8_t dma, const uint8_t *psetup)
{
80065ac: b480 push {r7}
80065ae: b087 sub sp, #28
80065b0: af00 add r7, sp, #0
80065b2: 60f8 str r0, [r7, #12]
80065b4: 460b mov r3, r1
80065b6: 607a str r2, [r7, #4]
80065b8: 72fb strb r3, [r7, #11]
uint32_t USBx_BASE = (uint32_t)USBx;
80065ba: 68fb ldr r3, [r7, #12]
80065bc: 617b str r3, [r7, #20]
uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U);
80065be: 68fb ldr r3, [r7, #12]
80065c0: 333c adds r3, #60 @ 0x3c
80065c2: 3304 adds r3, #4
80065c4: 681b ldr r3, [r3, #0]
80065c6: 613b str r3, [r7, #16]
if (gSNPSiD > USB_OTG_CORE_ID_300A)
80065c8: 693b ldr r3, [r7, #16]
80065ca: 4a26 ldr r2, [pc, #152] @ (8006664 <USB_EP0_OutStart+0xb8>)
80065cc: 4293 cmp r3, r2
80065ce: d90a bls.n 80065e6 <USB_EP0_OutStart+0x3a>
{
if ((USBx_OUTEP(0U)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
80065d0: 697b ldr r3, [r7, #20]
80065d2: f503 6330 add.w r3, r3, #2816 @ 0xb00
80065d6: 681b ldr r3, [r3, #0]
80065d8: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000
80065dc: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000
80065e0: d101 bne.n 80065e6 <USB_EP0_OutStart+0x3a>
{
return HAL_OK;
80065e2: 2300 movs r3, #0
80065e4: e037 b.n 8006656 <USB_EP0_OutStart+0xaa>
}
}
USBx_OUTEP(0U)->DOEPTSIZ = 0U;
80065e6: 697b ldr r3, [r7, #20]
80065e8: f503 6330 add.w r3, r3, #2816 @ 0xb00
80065ec: 461a mov r2, r3
80065ee: 2300 movs r3, #0
80065f0: 6113 str r3, [r2, #16]
USBx_OUTEP(0U)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19));
80065f2: 697b ldr r3, [r7, #20]
80065f4: f503 6330 add.w r3, r3, #2816 @ 0xb00
80065f8: 691b ldr r3, [r3, #16]
80065fa: 697a ldr r2, [r7, #20]
80065fc: f502 6230 add.w r2, r2, #2816 @ 0xb00
8006600: f443 2300 orr.w r3, r3, #524288 @ 0x80000
8006604: 6113 str r3, [r2, #16]
USBx_OUTEP(0U)->DOEPTSIZ |= (3U * 8U);
8006606: 697b ldr r3, [r7, #20]
8006608: f503 6330 add.w r3, r3, #2816 @ 0xb00
800660c: 691b ldr r3, [r3, #16]
800660e: 697a ldr r2, [r7, #20]
8006610: f502 6230 add.w r2, r2, #2816 @ 0xb00
8006614: f043 0318 orr.w r3, r3, #24
8006618: 6113 str r3, [r2, #16]
USBx_OUTEP(0U)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT;
800661a: 697b ldr r3, [r7, #20]
800661c: f503 6330 add.w r3, r3, #2816 @ 0xb00
8006620: 691b ldr r3, [r3, #16]
8006622: 697a ldr r2, [r7, #20]
8006624: f502 6230 add.w r2, r2, #2816 @ 0xb00
8006628: f043 43c0 orr.w r3, r3, #1610612736 @ 0x60000000
800662c: 6113 str r3, [r2, #16]
if (dma == 1U)
800662e: 7afb ldrb r3, [r7, #11]
8006630: 2b01 cmp r3, #1
8006632: d10f bne.n 8006654 <USB_EP0_OutStart+0xa8>
{
USBx_OUTEP(0U)->DOEPDMA = (uint32_t)psetup;
8006634: 697b ldr r3, [r7, #20]
8006636: f503 6330 add.w r3, r3, #2816 @ 0xb00
800663a: 461a mov r2, r3
800663c: 687b ldr r3, [r7, #4]
800663e: 6153 str r3, [r2, #20]
/* EP enable */
USBx_OUTEP(0U)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_USBAEP;
8006640: 697b ldr r3, [r7, #20]
8006642: f503 6330 add.w r3, r3, #2816 @ 0xb00
8006646: 681b ldr r3, [r3, #0]
8006648: 697a ldr r2, [r7, #20]
800664a: f502 6230 add.w r2, r2, #2816 @ 0xb00
800664e: f043 2380 orr.w r3, r3, #2147516416 @ 0x80008000
8006652: 6013 str r3, [r2, #0]
}
return HAL_OK;
8006654: 2300 movs r3, #0
}
8006656: 4618 mov r0, r3
8006658: 371c adds r7, #28
800665a: 46bd mov sp, r7
800665c: f85d 7b04 ldr.w r7, [sp], #4
8006660: 4770 bx lr
8006662: bf00 nop
8006664: 4f54300a .word 0x4f54300a
08006668 <USB_CoreReset>:
* @brief Reset the USB Core (needed after USB clock settings change)
* @param USBx Selected device
* @retval HAL status
*/
static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
{
8006668: b480 push {r7}
800666a: b085 sub sp, #20
800666c: af00 add r7, sp, #0
800666e: 6078 str r0, [r7, #4]
__IO uint32_t count = 0U;
8006670: 2300 movs r3, #0
8006672: 60fb str r3, [r7, #12]
/* Wait for AHB master IDLE state. */
do
{
count++;
8006674: 68fb ldr r3, [r7, #12]
8006676: 3301 adds r3, #1
8006678: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
800667a: 68fb ldr r3, [r7, #12]
800667c: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
8006680: d901 bls.n 8006686 <USB_CoreReset+0x1e>
{
return HAL_TIMEOUT;
8006682: 2303 movs r3, #3
8006684: e022 b.n 80066cc <USB_CoreReset+0x64>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U);
8006686: 687b ldr r3, [r7, #4]
8006688: 691b ldr r3, [r3, #16]
800668a: 2b00 cmp r3, #0
800668c: daf2 bge.n 8006674 <USB_CoreReset+0xc>
count = 10U;
800668e: 230a movs r3, #10
8006690: 60fb str r3, [r7, #12]
/* few cycles before setting core reset */
while (count > 0U)
8006692: e002 b.n 800669a <USB_CoreReset+0x32>
{
count--;
8006694: 68fb ldr r3, [r7, #12]
8006696: 3b01 subs r3, #1
8006698: 60fb str r3, [r7, #12]
while (count > 0U)
800669a: 68fb ldr r3, [r7, #12]
800669c: 2b00 cmp r3, #0
800669e: d1f9 bne.n 8006694 <USB_CoreReset+0x2c>
}
/* Core Soft Reset */
USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST;
80066a0: 687b ldr r3, [r7, #4]
80066a2: 691b ldr r3, [r3, #16]
80066a4: f043 0201 orr.w r2, r3, #1
80066a8: 687b ldr r3, [r7, #4]
80066aa: 611a str r2, [r3, #16]
do
{
count++;
80066ac: 68fb ldr r3, [r7, #12]
80066ae: 3301 adds r3, #1
80066b0: 60fb str r3, [r7, #12]
if (count > HAL_USB_TIMEOUT)
80066b2: 68fb ldr r3, [r7, #12]
80066b4: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000
80066b8: d901 bls.n 80066be <USB_CoreReset+0x56>
{
return HAL_TIMEOUT;
80066ba: 2303 movs r3, #3
80066bc: e006 b.n 80066cc <USB_CoreReset+0x64>
}
} while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
80066be: 687b ldr r3, [r7, #4]
80066c0: 691b ldr r3, [r3, #16]
80066c2: f003 0301 and.w r3, r3, #1
80066c6: 2b01 cmp r3, #1
80066c8: d0f0 beq.n 80066ac <USB_CoreReset+0x44>
return HAL_OK;
80066ca: 2300 movs r3, #0
}
80066cc: 4618 mov r0, r3
80066ce: 3714 adds r7, #20
80066d0: 46bd mov sp, r7
80066d2: f85d 7b04 ldr.w r7, [sp], #4
80066d6: 4770 bx lr
080066d8 <USBD_HID_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_HID_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
80066d8: b580 push {r7, lr}
80066da: b084 sub sp, #16
80066dc: af00 add r7, sp, #0
80066de: 6078 str r0, [r7, #4]
80066e0: 460b mov r3, r1
80066e2: 70fb strb r3, [r7, #3]
UNUSED(cfgidx);
USBD_HID_HandleTypeDef *hhid;
hhid = (USBD_HID_HandleTypeDef *)USBD_malloc(sizeof(USBD_HID_HandleTypeDef));
80066e4: 2010 movs r0, #16
80066e6: f002 f9f7 bl 8008ad8 <USBD_static_malloc>
80066ea: 60f8 str r0, [r7, #12]
if (hhid == NULL)
80066ec: 68fb ldr r3, [r7, #12]
80066ee: 2b00 cmp r3, #0
80066f0: d109 bne.n 8006706 <USBD_HID_Init+0x2e>
{
pdev->pClassDataCmsit[pdev->classId] = NULL;
80066f2: 687b ldr r3, [r7, #4]
80066f4: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
80066f8: 687b ldr r3, [r7, #4]
80066fa: 32b0 adds r2, #176 @ 0xb0
80066fc: 2100 movs r1, #0
80066fe: f843 1022 str.w r1, [r3, r2, lsl #2]
return (uint8_t)USBD_EMEM;
8006702: 2302 movs r3, #2
8006704: e048 b.n 8006798 <USBD_HID_Init+0xc0>
}
pdev->pClassDataCmsit[pdev->classId] = (void *)hhid;
8006706: 687b ldr r3, [r7, #4]
8006708: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800670c: 687b ldr r3, [r7, #4]
800670e: 32b0 adds r2, #176 @ 0xb0
8006710: 68f9 ldr r1, [r7, #12]
8006712: f843 1022 str.w r1, [r3, r2, lsl #2]
pdev->pClassData = pdev->pClassDataCmsit[pdev->classId];
8006716: 687b ldr r3, [r7, #4]
8006718: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800671c: 687b ldr r3, [r7, #4]
800671e: 32b0 adds r2, #176 @ 0xb0
8006720: f853 2022 ldr.w r2, [r3, r2, lsl #2]
8006724: 687b ldr r3, [r7, #4]
8006726: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
#ifdef USE_USBD_COMPOSITE
/* Get the Endpoints addresses allocated for this class instance */
HIDInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_INTR, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
if (pdev->dev_speed == USBD_SPEED_HIGH)
800672a: 687b ldr r3, [r7, #4]
800672c: 7c1b ldrb r3, [r3, #16]
800672e: 2b00 cmp r3, #0
8006730: d10d bne.n 800674e <USBD_HID_Init+0x76>
{
pdev->ep_in[HIDInEpAdd & 0xFU].bInterval = HID_HS_BINTERVAL;
8006732: 4b1b ldr r3, [pc, #108] @ (80067a0 <USBD_HID_Init+0xc8>)
8006734: 781b ldrb r3, [r3, #0]
8006736: f003 020f and.w r2, r3, #15
800673a: 6879 ldr r1, [r7, #4]
800673c: 4613 mov r3, r2
800673e: 009b lsls r3, r3, #2
8006740: 4413 add r3, r2
8006742: 009b lsls r3, r3, #2
8006744: 440b add r3, r1
8006746: 331c adds r3, #28
8006748: 2207 movs r2, #7
800674a: 601a str r2, [r3, #0]
800674c: e00c b.n 8006768 <USBD_HID_Init+0x90>
}
else /* LOW and FULL-speed endpoints */
{
pdev->ep_in[HIDInEpAdd & 0xFU].bInterval = HID_FS_BINTERVAL;
800674e: 4b14 ldr r3, [pc, #80] @ (80067a0 <USBD_HID_Init+0xc8>)
8006750: 781b ldrb r3, [r3, #0]
8006752: f003 020f and.w r2, r3, #15
8006756: 6879 ldr r1, [r7, #4]
8006758: 4613 mov r3, r2
800675a: 009b lsls r3, r3, #2
800675c: 4413 add r3, r2
800675e: 009b lsls r3, r3, #2
8006760: 440b add r3, r1
8006762: 331c adds r3, #28
8006764: 220a movs r2, #10
8006766: 601a str r2, [r3, #0]
}
/* Open EP IN */
(void)USBD_LL_OpenEP(pdev, HIDInEpAdd, USBD_EP_TYPE_INTR, HID_EPIN_SIZE);
8006768: 4b0d ldr r3, [pc, #52] @ (80067a0 <USBD_HID_Init+0xc8>)
800676a: 7819 ldrb r1, [r3, #0]
800676c: 230e movs r3, #14
800676e: 2203 movs r2, #3
8006770: 6878 ldr r0, [r7, #4]
8006772: f002 f852 bl 800881a <USBD_LL_OpenEP>
pdev->ep_in[HIDInEpAdd & 0xFU].is_used = 1U;
8006776: 4b0a ldr r3, [pc, #40] @ (80067a0 <USBD_HID_Init+0xc8>)
8006778: 781b ldrb r3, [r3, #0]
800677a: f003 020f and.w r2, r3, #15
800677e: 6879 ldr r1, [r7, #4]
8006780: 4613 mov r3, r2
8006782: 009b lsls r3, r3, #2
8006784: 4413 add r3, r2
8006786: 009b lsls r3, r3, #2
8006788: 440b add r3, r1
800678a: 3323 adds r3, #35 @ 0x23
800678c: 2201 movs r2, #1
800678e: 701a strb r2, [r3, #0]
hhid->state = USBD_HID_IDLE;
8006790: 68fb ldr r3, [r7, #12]
8006792: 2200 movs r2, #0
8006794: 731a strb r2, [r3, #12]
return (uint8_t)USBD_OK;
8006796: 2300 movs r3, #0
}
8006798: 4618 mov r0, r3
800679a: 3710 adds r7, #16
800679c: 46bd mov sp, r7
800679e: bd80 pop {r7, pc}
80067a0: 200000d5 .word 0x200000d5
080067a4 <USBD_HID_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_HID_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
80067a4: b580 push {r7, lr}
80067a6: b082 sub sp, #8
80067a8: af00 add r7, sp, #0
80067aa: 6078 str r0, [r7, #4]
80067ac: 460b mov r3, r1
80067ae: 70fb strb r3, [r7, #3]
/* Get the Endpoints addresses allocated for this class instance */
HIDInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_INTR, (uint8_t)pdev->classId);
#endif /* USE_USBD_COMPOSITE */
/* Close HID EPs */
(void)USBD_LL_CloseEP(pdev, HIDInEpAdd);
80067b0: 4b1f ldr r3, [pc, #124] @ (8006830 <USBD_HID_DeInit+0x8c>)
80067b2: 781b ldrb r3, [r3, #0]
80067b4: 4619 mov r1, r3
80067b6: 6878 ldr r0, [r7, #4]
80067b8: f002 f855 bl 8008866 <USBD_LL_CloseEP>
pdev->ep_in[HIDInEpAdd & 0xFU].is_used = 0U;
80067bc: 4b1c ldr r3, [pc, #112] @ (8006830 <USBD_HID_DeInit+0x8c>)
80067be: 781b ldrb r3, [r3, #0]
80067c0: f003 020f and.w r2, r3, #15
80067c4: 6879 ldr r1, [r7, #4]
80067c6: 4613 mov r3, r2
80067c8: 009b lsls r3, r3, #2
80067ca: 4413 add r3, r2
80067cc: 009b lsls r3, r3, #2
80067ce: 440b add r3, r1
80067d0: 3323 adds r3, #35 @ 0x23
80067d2: 2200 movs r2, #0
80067d4: 701a strb r2, [r3, #0]
pdev->ep_in[HIDInEpAdd & 0xFU].bInterval = 0U;
80067d6: 4b16 ldr r3, [pc, #88] @ (8006830 <USBD_HID_DeInit+0x8c>)
80067d8: 781b ldrb r3, [r3, #0]
80067da: f003 020f and.w r2, r3, #15
80067de: 6879 ldr r1, [r7, #4]
80067e0: 4613 mov r3, r2
80067e2: 009b lsls r3, r3, #2
80067e4: 4413 add r3, r2
80067e6: 009b lsls r3, r3, #2
80067e8: 440b add r3, r1
80067ea: 331c adds r3, #28
80067ec: 2200 movs r2, #0
80067ee: 601a str r2, [r3, #0]
/* Free allocated memory */
if (pdev->pClassDataCmsit[pdev->classId] != NULL)
80067f0: 687b ldr r3, [r7, #4]
80067f2: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
80067f6: 687b ldr r3, [r7, #4]
80067f8: 32b0 adds r2, #176 @ 0xb0
80067fa: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80067fe: 2b00 cmp r3, #0
8006800: d011 beq.n 8006826 <USBD_HID_DeInit+0x82>
{
(void)USBD_free(pdev->pClassDataCmsit[pdev->classId]);
8006802: 687b ldr r3, [r7, #4]
8006804: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8006808: 687b ldr r3, [r7, #4]
800680a: 32b0 adds r2, #176 @ 0xb0
800680c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8006810: 4618 mov r0, r3
8006812: f002 f96f bl 8008af4 <USBD_static_free>
pdev->pClassDataCmsit[pdev->classId] = NULL;
8006816: 687b ldr r3, [r7, #4]
8006818: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800681c: 687b ldr r3, [r7, #4]
800681e: 32b0 adds r2, #176 @ 0xb0
8006820: 2100 movs r1, #0
8006822: f843 1022 str.w r1, [r3, r2, lsl #2]
}
return (uint8_t)USBD_OK;
8006826: 2300 movs r3, #0
}
8006828: 4618 mov r0, r3
800682a: 3708 adds r7, #8
800682c: 46bd mov sp, r7
800682e: bd80 pop {r7, pc}
8006830: 200000d5 .word 0x200000d5
08006834 <USBD_HID_Setup>:
* @param pdev: instance
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_HID_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8006834: b580 push {r7, lr}
8006836: b086 sub sp, #24
8006838: af00 add r7, sp, #0
800683a: 6078 str r0, [r7, #4]
800683c: 6039 str r1, [r7, #0]
USBD_HID_HandleTypeDef *hhid = (USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
800683e: 687b ldr r3, [r7, #4]
8006840: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8006844: 687b ldr r3, [r7, #4]
8006846: 32b0 adds r2, #176 @ 0xb0
8006848: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800684c: 60fb str r3, [r7, #12]
USBD_StatusTypeDef ret = USBD_OK;
800684e: 2300 movs r3, #0
8006850: 75fb strb r3, [r7, #23]
uint16_t len;
uint8_t *pbuf;
uint16_t status_info = 0U;
8006852: 2300 movs r3, #0
8006854: 817b strh r3, [r7, #10]
if (hhid == NULL)
8006856: 68fb ldr r3, [r7, #12]
8006858: 2b00 cmp r3, #0
800685a: d101 bne.n 8006860 <USBD_HID_Setup+0x2c>
{
return (uint8_t)USBD_FAIL;
800685c: 2303 movs r3, #3
800685e: e0e8 b.n 8006a32 <USBD_HID_Setup+0x1fe>
}
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8006860: 683b ldr r3, [r7, #0]
8006862: 781b ldrb r3, [r3, #0]
8006864: f003 0360 and.w r3, r3, #96 @ 0x60
8006868: 2b00 cmp r3, #0
800686a: d046 beq.n 80068fa <USBD_HID_Setup+0xc6>
800686c: 2b20 cmp r3, #32
800686e: f040 80d8 bne.w 8006a22 <USBD_HID_Setup+0x1ee>
{
case USB_REQ_TYPE_CLASS :
switch (req->bRequest)
8006872: 683b ldr r3, [r7, #0]
8006874: 785b ldrb r3, [r3, #1]
8006876: 3b02 subs r3, #2
8006878: 2b09 cmp r3, #9
800687a: d836 bhi.n 80068ea <USBD_HID_Setup+0xb6>
800687c: a201 add r2, pc, #4 @ (adr r2, 8006884 <USBD_HID_Setup+0x50>)
800687e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8006882: bf00 nop
8006884: 080068db .word 0x080068db
8006888: 080068bb .word 0x080068bb
800688c: 080068eb .word 0x080068eb
8006890: 080068eb .word 0x080068eb
8006894: 080068eb .word 0x080068eb
8006898: 080068eb .word 0x080068eb
800689c: 080068eb .word 0x080068eb
80068a0: 080068eb .word 0x080068eb
80068a4: 080068c9 .word 0x080068c9
80068a8: 080068ad .word 0x080068ad
{
case USBD_HID_REQ_SET_PROTOCOL:
hhid->Protocol = (uint8_t)(req->wValue);
80068ac: 683b ldr r3, [r7, #0]
80068ae: 885b ldrh r3, [r3, #2]
80068b0: b2db uxtb r3, r3
80068b2: 461a mov r2, r3
80068b4: 68fb ldr r3, [r7, #12]
80068b6: 601a str r2, [r3, #0]
break;
80068b8: e01e b.n 80068f8 <USBD_HID_Setup+0xc4>
case USBD_HID_REQ_GET_PROTOCOL:
(void)USBD_CtlSendData(pdev, (uint8_t *)&hhid->Protocol, 1U);
80068ba: 68fb ldr r3, [r7, #12]
80068bc: 2201 movs r2, #1
80068be: 4619 mov r1, r3
80068c0: 6878 ldr r0, [r7, #4]
80068c2: f001 fc39 bl 8008138 <USBD_CtlSendData>
break;
80068c6: e017 b.n 80068f8 <USBD_HID_Setup+0xc4>
case USBD_HID_REQ_SET_IDLE:
hhid->IdleState = (uint8_t)(req->wValue >> 8);
80068c8: 683b ldr r3, [r7, #0]
80068ca: 885b ldrh r3, [r3, #2]
80068cc: 0a1b lsrs r3, r3, #8
80068ce: b29b uxth r3, r3
80068d0: b2db uxtb r3, r3
80068d2: 461a mov r2, r3
80068d4: 68fb ldr r3, [r7, #12]
80068d6: 605a str r2, [r3, #4]
break;
80068d8: e00e b.n 80068f8 <USBD_HID_Setup+0xc4>
case USBD_HID_REQ_GET_IDLE:
(void)USBD_CtlSendData(pdev, (uint8_t *)&hhid->IdleState, 1U);
80068da: 68fb ldr r3, [r7, #12]
80068dc: 3304 adds r3, #4
80068de: 2201 movs r2, #1
80068e0: 4619 mov r1, r3
80068e2: 6878 ldr r0, [r7, #4]
80068e4: f001 fc28 bl 8008138 <USBD_CtlSendData>
break;
80068e8: e006 b.n 80068f8 <USBD_HID_Setup+0xc4>
default:
USBD_CtlError(pdev, req);
80068ea: 6839 ldr r1, [r7, #0]
80068ec: 6878 ldr r0, [r7, #4]
80068ee: f001 fba6 bl 800803e <USBD_CtlError>
ret = USBD_FAIL;
80068f2: 2303 movs r3, #3
80068f4: 75fb strb r3, [r7, #23]
break;
80068f6: bf00 nop
}
break;
80068f8: e09a b.n 8006a30 <USBD_HID_Setup+0x1fc>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
80068fa: 683b ldr r3, [r7, #0]
80068fc: 785b ldrb r3, [r3, #1]
80068fe: 2b0b cmp r3, #11
8006900: f200 8086 bhi.w 8006a10 <USBD_HID_Setup+0x1dc>
8006904: a201 add r2, pc, #4 @ (adr r2, 800690c <USBD_HID_Setup+0xd8>)
8006906: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800690a: bf00 nop
800690c: 0800693d .word 0x0800693d
8006910: 08006a1f .word 0x08006a1f
8006914: 08006a11 .word 0x08006a11
8006918: 08006a11 .word 0x08006a11
800691c: 08006a11 .word 0x08006a11
8006920: 08006a11 .word 0x08006a11
8006924: 08006967 .word 0x08006967
8006928: 08006a11 .word 0x08006a11
800692c: 08006a11 .word 0x08006a11
8006930: 08006a11 .word 0x08006a11
8006934: 080069bf .word 0x080069bf
8006938: 080069e9 .word 0x080069e9
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800693c: 687b ldr r3, [r7, #4]
800693e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8006942: b2db uxtb r3, r3
8006944: 2b03 cmp r3, #3
8006946: d107 bne.n 8006958 <USBD_HID_Setup+0x124>
{
(void)USBD_CtlSendData(pdev, (uint8_t *)&status_info, 2U);
8006948: f107 030a add.w r3, r7, #10
800694c: 2202 movs r2, #2
800694e: 4619 mov r1, r3
8006950: 6878 ldr r0, [r7, #4]
8006952: f001 fbf1 bl 8008138 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8006956: e063 b.n 8006a20 <USBD_HID_Setup+0x1ec>
USBD_CtlError(pdev, req);
8006958: 6839 ldr r1, [r7, #0]
800695a: 6878 ldr r0, [r7, #4]
800695c: f001 fb6f bl 800803e <USBD_CtlError>
ret = USBD_FAIL;
8006960: 2303 movs r3, #3
8006962: 75fb strb r3, [r7, #23]
break;
8006964: e05c b.n 8006a20 <USBD_HID_Setup+0x1ec>
case USB_REQ_GET_DESCRIPTOR:
if ((req->wValue >> 8) == HID_REPORT_DESC)
8006966: 683b ldr r3, [r7, #0]
8006968: 885b ldrh r3, [r3, #2]
800696a: 0a1b lsrs r3, r3, #8
800696c: b29b uxth r3, r3
800696e: 2b22 cmp r3, #34 @ 0x22
8006970: d108 bne.n 8006984 <USBD_HID_Setup+0x150>
{
len = MIN(HID_MOUSE_REPORT_DESC_SIZE, req->wLength);
8006972: 683b ldr r3, [r7, #0]
8006974: 88db ldrh r3, [r3, #6]
8006976: 2b2d cmp r3, #45 @ 0x2d
8006978: bf28 it cs
800697a: 232d movcs r3, #45 @ 0x2d
800697c: 82bb strh r3, [r7, #20]
pbuf = HID_MOUSE_ReportDesc;
800697e: 4b2f ldr r3, [pc, #188] @ (8006a3c <USBD_HID_Setup+0x208>)
8006980: 613b str r3, [r7, #16]
8006982: e015 b.n 80069b0 <USBD_HID_Setup+0x17c>
}
else if ((req->wValue >> 8) == HID_DESCRIPTOR_TYPE)
8006984: 683b ldr r3, [r7, #0]
8006986: 885b ldrh r3, [r3, #2]
8006988: 0a1b lsrs r3, r3, #8
800698a: b29b uxth r3, r3
800698c: 2b21 cmp r3, #33 @ 0x21
800698e: d108 bne.n 80069a2 <USBD_HID_Setup+0x16e>
{
pbuf = USBD_HID_Desc;
8006990: 4b2b ldr r3, [pc, #172] @ (8006a40 <USBD_HID_Setup+0x20c>)
8006992: 613b str r3, [r7, #16]
len = MIN(USB_HID_DESC_SIZ, req->wLength);
8006994: 683b ldr r3, [r7, #0]
8006996: 88db ldrh r3, [r3, #6]
8006998: 2b09 cmp r3, #9
800699a: bf28 it cs
800699c: 2309 movcs r3, #9
800699e: 82bb strh r3, [r7, #20]
80069a0: e006 b.n 80069b0 <USBD_HID_Setup+0x17c>
}
else
{
USBD_CtlError(pdev, req);
80069a2: 6839 ldr r1, [r7, #0]
80069a4: 6878 ldr r0, [r7, #4]
80069a6: f001 fb4a bl 800803e <USBD_CtlError>
ret = USBD_FAIL;
80069aa: 2303 movs r3, #3
80069ac: 75fb strb r3, [r7, #23]
break;
80069ae: e037 b.n 8006a20 <USBD_HID_Setup+0x1ec>
}
(void)USBD_CtlSendData(pdev, pbuf, len);
80069b0: 8abb ldrh r3, [r7, #20]
80069b2: 461a mov r2, r3
80069b4: 6939 ldr r1, [r7, #16]
80069b6: 6878 ldr r0, [r7, #4]
80069b8: f001 fbbe bl 8008138 <USBD_CtlSendData>
break;
80069bc: e030 b.n 8006a20 <USBD_HID_Setup+0x1ec>
case USB_REQ_GET_INTERFACE :
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80069be: 687b ldr r3, [r7, #4]
80069c0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80069c4: b2db uxtb r3, r3
80069c6: 2b03 cmp r3, #3
80069c8: d107 bne.n 80069da <USBD_HID_Setup+0x1a6>
{
(void)USBD_CtlSendData(pdev, (uint8_t *)&hhid->AltSetting, 1U);
80069ca: 68fb ldr r3, [r7, #12]
80069cc: 3308 adds r3, #8
80069ce: 2201 movs r2, #1
80069d0: 4619 mov r1, r3
80069d2: 6878 ldr r0, [r7, #4]
80069d4: f001 fbb0 bl 8008138 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
80069d8: e022 b.n 8006a20 <USBD_HID_Setup+0x1ec>
USBD_CtlError(pdev, req);
80069da: 6839 ldr r1, [r7, #0]
80069dc: 6878 ldr r0, [r7, #4]
80069de: f001 fb2e bl 800803e <USBD_CtlError>
ret = USBD_FAIL;
80069e2: 2303 movs r3, #3
80069e4: 75fb strb r3, [r7, #23]
break;
80069e6: e01b b.n 8006a20 <USBD_HID_Setup+0x1ec>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80069e8: 687b ldr r3, [r7, #4]
80069ea: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80069ee: b2db uxtb r3, r3
80069f0: 2b03 cmp r3, #3
80069f2: d106 bne.n 8006a02 <USBD_HID_Setup+0x1ce>
{
hhid->AltSetting = (uint8_t)(req->wValue);
80069f4: 683b ldr r3, [r7, #0]
80069f6: 885b ldrh r3, [r3, #2]
80069f8: b2db uxtb r3, r3
80069fa: 461a mov r2, r3
80069fc: 68fb ldr r3, [r7, #12]
80069fe: 609a str r2, [r3, #8]
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8006a00: e00e b.n 8006a20 <USBD_HID_Setup+0x1ec>
USBD_CtlError(pdev, req);
8006a02: 6839 ldr r1, [r7, #0]
8006a04: 6878 ldr r0, [r7, #4]
8006a06: f001 fb1a bl 800803e <USBD_CtlError>
ret = USBD_FAIL;
8006a0a: 2303 movs r3, #3
8006a0c: 75fb strb r3, [r7, #23]
break;
8006a0e: e007 b.n 8006a20 <USBD_HID_Setup+0x1ec>
case USB_REQ_CLEAR_FEATURE:
break;
default:
USBD_CtlError(pdev, req);
8006a10: 6839 ldr r1, [r7, #0]
8006a12: 6878 ldr r0, [r7, #4]
8006a14: f001 fb13 bl 800803e <USBD_CtlError>
ret = USBD_FAIL;
8006a18: 2303 movs r3, #3
8006a1a: 75fb strb r3, [r7, #23]
break;
8006a1c: e000 b.n 8006a20 <USBD_HID_Setup+0x1ec>
break;
8006a1e: bf00 nop
}
break;
8006a20: e006 b.n 8006a30 <USBD_HID_Setup+0x1fc>
default:
USBD_CtlError(pdev, req);
8006a22: 6839 ldr r1, [r7, #0]
8006a24: 6878 ldr r0, [r7, #4]
8006a26: f001 fb0a bl 800803e <USBD_CtlError>
ret = USBD_FAIL;
8006a2a: 2303 movs r3, #3
8006a2c: 75fb strb r3, [r7, #23]
break;
8006a2e: bf00 nop
}
return (uint8_t)ret;
8006a30: 7dfb ldrb r3, [r7, #23]
}
8006a32: 4618 mov r0, r3
8006a34: 3718 adds r7, #24
8006a36: 46bd mov sp, r7
8006a38: bd80 pop {r7, pc}
8006a3a: bf00 nop
8006a3c: 200000a8 .word 0x200000a8
8006a40: 20000090 .word 0x20000090
08006a44 <USBD_HID_SendReport>:
uint8_t USBD_HID_SendReport(USBD_HandleTypeDef *pdev, uint8_t *report, uint16_t len, uint8_t ClassId)
{
USBD_HID_HandleTypeDef *hhid = (USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[ClassId];
#else
uint8_t USBD_HID_SendReport(USBD_HandleTypeDef *pdev, uint8_t *report, uint16_t len)
{
8006a44: b580 push {r7, lr}
8006a46: b086 sub sp, #24
8006a48: af00 add r7, sp, #0
8006a4a: 60f8 str r0, [r7, #12]
8006a4c: 60b9 str r1, [r7, #8]
8006a4e: 4613 mov r3, r2
8006a50: 80fb strh r3, [r7, #6]
USBD_HID_HandleTypeDef *hhid = (USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId];
8006a52: 68fb ldr r3, [r7, #12]
8006a54: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8006a58: 68fb ldr r3, [r7, #12]
8006a5a: 32b0 adds r2, #176 @ 0xb0
8006a5c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8006a60: 617b str r3, [r7, #20]
#endif /* USE_USBD_COMPOSITE */
if (hhid == NULL)
8006a62: 697b ldr r3, [r7, #20]
8006a64: 2b00 cmp r3, #0
8006a66: d101 bne.n 8006a6c <USBD_HID_SendReport+0x28>
{
return (uint8_t)USBD_FAIL;
8006a68: 2303 movs r3, #3
8006a6a: e014 b.n 8006a96 <USBD_HID_SendReport+0x52>
#ifdef USE_USBD_COMPOSITE
/* Get the Endpoints addresses allocated for this class instance */
HIDInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_INTR, ClassId);
#endif /* USE_USBD_COMPOSITE */
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8006a6c: 68fb ldr r3, [r7, #12]
8006a6e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8006a72: b2db uxtb r3, r3
8006a74: 2b03 cmp r3, #3
8006a76: d10d bne.n 8006a94 <USBD_HID_SendReport+0x50>
{
if (hhid->state == USBD_HID_IDLE)
8006a78: 697b ldr r3, [r7, #20]
8006a7a: 7b1b ldrb r3, [r3, #12]
8006a7c: 2b00 cmp r3, #0
8006a7e: d109 bne.n 8006a94 <USBD_HID_SendReport+0x50>
{
hhid->state = USBD_HID_BUSY;
8006a80: 697b ldr r3, [r7, #20]
8006a82: 2201 movs r2, #1
8006a84: 731a strb r2, [r3, #12]
(void)USBD_LL_Transmit(pdev, HIDInEpAdd, report, len);
8006a86: 4b06 ldr r3, [pc, #24] @ (8006aa0 <USBD_HID_SendReport+0x5c>)
8006a88: 7819 ldrb r1, [r3, #0]
8006a8a: 88fb ldrh r3, [r7, #6]
8006a8c: 68ba ldr r2, [r7, #8]
8006a8e: 68f8 ldr r0, [r7, #12]
8006a90: f001 ff91 bl 80089b6 <USBD_LL_Transmit>
}
}
return (uint8_t)USBD_OK;
8006a94: 2300 movs r3, #0
}
8006a96: 4618 mov r0, r3
8006a98: 3718 adds r7, #24
8006a9a: 46bd mov sp, r7
8006a9c: bd80 pop {r7, pc}
8006a9e: bf00 nop
8006aa0: 200000d5 .word 0x200000d5
08006aa4 <USBD_HID_GetPollingInterval>:
* return polling interval from endpoint descriptor
* @param pdev: device instance
* @retval polling interval
*/
uint32_t USBD_HID_GetPollingInterval(USBD_HandleTypeDef *pdev)
{
8006aa4: b480 push {r7}
8006aa6: b085 sub sp, #20
8006aa8: af00 add r7, sp, #0
8006aaa: 6078 str r0, [r7, #4]
uint32_t polling_interval;
/* HIGH-speed endpoints */
if (pdev->dev_speed == USBD_SPEED_HIGH)
8006aac: 687b ldr r3, [r7, #4]
8006aae: 7c1b ldrb r3, [r3, #16]
8006ab0: 2b00 cmp r3, #0
8006ab2: d102 bne.n 8006aba <USBD_HID_GetPollingInterval+0x16>
{
/* Sets the data transfer polling interval for high speed transfers.
Values between 1..16 are allowed. Values correspond to interval
of 2 ^ (bInterval-1). This option (8 ms, corresponds to HID_HS_BINTERVAL */
polling_interval = (((1U << (HID_HS_BINTERVAL - 1U))) / 8U);
8006ab4: 2308 movs r3, #8
8006ab6: 60fb str r3, [r7, #12]
8006ab8: e001 b.n 8006abe <USBD_HID_GetPollingInterval+0x1a>
}
else /* LOW and FULL-speed endpoints */
{
/* Sets the data transfer polling interval for low and full
speed transfers */
polling_interval = HID_FS_BINTERVAL;
8006aba: 230a movs r3, #10
8006abc: 60fb str r3, [r7, #12]
}
return ((uint32_t)(polling_interval));
8006abe: 68fb ldr r3, [r7, #12]
}
8006ac0: 4618 mov r0, r3
8006ac2: 3714 adds r7, #20
8006ac4: 46bd mov sp, r7
8006ac6: f85d 7b04 ldr.w r7, [sp], #4
8006aca: 4770 bx lr
08006acc <USBD_HID_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_HID_GetFSCfgDesc(uint16_t *length)
{
8006acc: b580 push {r7, lr}
8006ace: b084 sub sp, #16
8006ad0: af00 add r7, sp, #0
8006ad2: 6078 str r0, [r7, #4]
USBD_EpDescTypeDef *pEpDesc = USBD_GetEpDesc(USBD_HID_CfgDesc, HID_EPIN_ADDR);
8006ad4: 2181 movs r1, #129 @ 0x81
8006ad6: 4809 ldr r0, [pc, #36] @ (8006afc <USBD_HID_GetFSCfgDesc+0x30>)
8006ad8: f000 fc4e bl 8007378 <USBD_GetEpDesc>
8006adc: 60f8 str r0, [r7, #12]
if (pEpDesc != NULL)
8006ade: 68fb ldr r3, [r7, #12]
8006ae0: 2b00 cmp r3, #0
8006ae2: d002 beq.n 8006aea <USBD_HID_GetFSCfgDesc+0x1e>
{
pEpDesc->bInterval = HID_FS_BINTERVAL;
8006ae4: 68fb ldr r3, [r7, #12]
8006ae6: 220a movs r2, #10
8006ae8: 719a strb r2, [r3, #6]
}
*length = (uint16_t)sizeof(USBD_HID_CfgDesc);
8006aea: 687b ldr r3, [r7, #4]
8006aec: 2222 movs r2, #34 @ 0x22
8006aee: 801a strh r2, [r3, #0]
return USBD_HID_CfgDesc;
8006af0: 4b02 ldr r3, [pc, #8] @ (8006afc <USBD_HID_GetFSCfgDesc+0x30>)
}
8006af2: 4618 mov r0, r3
8006af4: 3710 adds r7, #16
8006af6: 46bd mov sp, r7
8006af8: bd80 pop {r7, pc}
8006afa: bf00 nop
8006afc: 2000006c .word 0x2000006c
08006b00 <USBD_HID_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_HID_GetHSCfgDesc(uint16_t *length)
{
8006b00: b580 push {r7, lr}
8006b02: b084 sub sp, #16
8006b04: af00 add r7, sp, #0
8006b06: 6078 str r0, [r7, #4]
USBD_EpDescTypeDef *pEpDesc = USBD_GetEpDesc(USBD_HID_CfgDesc, HID_EPIN_ADDR);
8006b08: 2181 movs r1, #129 @ 0x81
8006b0a: 4809 ldr r0, [pc, #36] @ (8006b30 <USBD_HID_GetHSCfgDesc+0x30>)
8006b0c: f000 fc34 bl 8007378 <USBD_GetEpDesc>
8006b10: 60f8 str r0, [r7, #12]
if (pEpDesc != NULL)
8006b12: 68fb ldr r3, [r7, #12]
8006b14: 2b00 cmp r3, #0
8006b16: d002 beq.n 8006b1e <USBD_HID_GetHSCfgDesc+0x1e>
{
pEpDesc->bInterval = HID_HS_BINTERVAL;
8006b18: 68fb ldr r3, [r7, #12]
8006b1a: 2207 movs r2, #7
8006b1c: 719a strb r2, [r3, #6]
}
*length = (uint16_t)sizeof(USBD_HID_CfgDesc);
8006b1e: 687b ldr r3, [r7, #4]
8006b20: 2222 movs r2, #34 @ 0x22
8006b22: 801a strh r2, [r3, #0]
return USBD_HID_CfgDesc;
8006b24: 4b02 ldr r3, [pc, #8] @ (8006b30 <USBD_HID_GetHSCfgDesc+0x30>)
}
8006b26: 4618 mov r0, r3
8006b28: 3710 adds r7, #16
8006b2a: 46bd mov sp, r7
8006b2c: bd80 pop {r7, pc}
8006b2e: bf00 nop
8006b30: 2000006c .word 0x2000006c
08006b34 <USBD_HID_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_HID_GetOtherSpeedCfgDesc(uint16_t *length)
{
8006b34: b580 push {r7, lr}
8006b36: b084 sub sp, #16
8006b38: af00 add r7, sp, #0
8006b3a: 6078 str r0, [r7, #4]
USBD_EpDescTypeDef *pEpDesc = USBD_GetEpDesc(USBD_HID_CfgDesc, HID_EPIN_ADDR);
8006b3c: 2181 movs r1, #129 @ 0x81
8006b3e: 4809 ldr r0, [pc, #36] @ (8006b64 <USBD_HID_GetOtherSpeedCfgDesc+0x30>)
8006b40: f000 fc1a bl 8007378 <USBD_GetEpDesc>
8006b44: 60f8 str r0, [r7, #12]
if (pEpDesc != NULL)
8006b46: 68fb ldr r3, [r7, #12]
8006b48: 2b00 cmp r3, #0
8006b4a: d002 beq.n 8006b52 <USBD_HID_GetOtherSpeedCfgDesc+0x1e>
{
pEpDesc->bInterval = HID_FS_BINTERVAL;
8006b4c: 68fb ldr r3, [r7, #12]
8006b4e: 220a movs r2, #10
8006b50: 719a strb r2, [r3, #6]
}
*length = (uint16_t)sizeof(USBD_HID_CfgDesc);
8006b52: 687b ldr r3, [r7, #4]
8006b54: 2222 movs r2, #34 @ 0x22
8006b56: 801a strh r2, [r3, #0]
return USBD_HID_CfgDesc;
8006b58: 4b02 ldr r3, [pc, #8] @ (8006b64 <USBD_HID_GetOtherSpeedCfgDesc+0x30>)
}
8006b5a: 4618 mov r0, r3
8006b5c: 3710 adds r7, #16
8006b5e: 46bd mov sp, r7
8006b60: bd80 pop {r7, pc}
8006b62: bf00 nop
8006b64: 2000006c .word 0x2000006c
08006b68 <USBD_HID_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint index
* @retval status
*/
static uint8_t USBD_HID_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8006b68: b480 push {r7}
8006b6a: b083 sub sp, #12
8006b6c: af00 add r7, sp, #0
8006b6e: 6078 str r0, [r7, #4]
8006b70: 460b mov r3, r1
8006b72: 70fb strb r3, [r7, #3]
UNUSED(epnum);
/* Ensure that the FIFO is empty before a new transfer, this condition could
be caused by a new transfer before the end of the previous transfer */
((USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId])->state = USBD_HID_IDLE;
8006b74: 687b ldr r3, [r7, #4]
8006b76: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8006b7a: 687b ldr r3, [r7, #4]
8006b7c: 32b0 adds r2, #176 @ 0xb0
8006b7e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8006b82: 2200 movs r2, #0
8006b84: 731a strb r2, [r3, #12]
return (uint8_t)USBD_OK;
8006b86: 2300 movs r3, #0
}
8006b88: 4618 mov r0, r3
8006b8a: 370c adds r7, #12
8006b8c: 46bd mov sp, r7
8006b8e: f85d 7b04 ldr.w r7, [sp], #4
8006b92: 4770 bx lr
08006b94 <USBD_HID_GetDeviceQualifierDesc>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_HID_GetDeviceQualifierDesc(uint16_t *length)
{
8006b94: b480 push {r7}
8006b96: b083 sub sp, #12
8006b98: af00 add r7, sp, #0
8006b9a: 6078 str r0, [r7, #4]
*length = (uint16_t)sizeof(USBD_HID_DeviceQualifierDesc);
8006b9c: 687b ldr r3, [r7, #4]
8006b9e: 220a movs r2, #10
8006ba0: 801a strh r2, [r3, #0]
return USBD_HID_DeviceQualifierDesc;
8006ba2: 4b03 ldr r3, [pc, #12] @ (8006bb0 <USBD_HID_GetDeviceQualifierDesc+0x1c>)
}
8006ba4: 4618 mov r0, r3
8006ba6: 370c adds r7, #12
8006ba8: 46bd mov sp, r7
8006baa: f85d 7b04 ldr.w r7, [sp], #4
8006bae: 4770 bx lr
8006bb0: 2000009c .word 0x2000009c
08006bb4 <USBD_Init>:
* @param id: Low level core index
* @retval status: USBD Status
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
8006bb4: b580 push {r7, lr}
8006bb6: b086 sub sp, #24
8006bb8: af00 add r7, sp, #0
8006bba: 60f8 str r0, [r7, #12]
8006bbc: 60b9 str r1, [r7, #8]
8006bbe: 4613 mov r3, r2
8006bc0: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef ret;
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
8006bc2: 68fb ldr r3, [r7, #12]
8006bc4: 2b00 cmp r3, #0
8006bc6: d101 bne.n 8006bcc <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif /* (USBD_DEBUG_LEVEL > 1U) */
return USBD_FAIL;
8006bc8: 2303 movs r3, #3
8006bca: e01f b.n 8006c0c <USBD_Init+0x58>
pdev->NumClasses = 0;
pdev->classId = 0;
}
#else
/* Unlink previous class*/
pdev->pClass[0] = NULL;
8006bcc: 68fb ldr r3, [r7, #12]
8006bce: 2200 movs r2, #0
8006bd0: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
pdev->pUserData[0] = NULL;
8006bd4: 68fb ldr r3, [r7, #12]
8006bd6: 2200 movs r2, #0
8006bd8: f8c3 22c4 str.w r2, [r3, #708] @ 0x2c4
#endif /* USE_USBD_COMPOSITE */
pdev->pConfDesc = NULL;
8006bdc: 68fb ldr r3, [r7, #12]
8006bde: 2200 movs r2, #0
8006be0: f8c3 22d0 str.w r2, [r3, #720] @ 0x2d0
/* Assign USBD Descriptors */
if (pdesc != NULL)
8006be4: 68bb ldr r3, [r7, #8]
8006be6: 2b00 cmp r3, #0
8006be8: d003 beq.n 8006bf2 <USBD_Init+0x3e>
{
pdev->pDesc = pdesc;
8006bea: 68fb ldr r3, [r7, #12]
8006bec: 68ba ldr r2, [r7, #8]
8006bee: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
8006bf2: 68fb ldr r3, [r7, #12]
8006bf4: 2201 movs r2, #1
8006bf6: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
8006bfa: 68fb ldr r3, [r7, #12]
8006bfc: 79fa ldrb r2, [r7, #7]
8006bfe: 701a strb r2, [r3, #0]
/* Initialize low level driver */
ret = USBD_LL_Init(pdev);
8006c00: 68f8 ldr r0, [r7, #12]
8006c02: f001 fda3 bl 800874c <USBD_LL_Init>
8006c06: 4603 mov r3, r0
8006c08: 75fb strb r3, [r7, #23]
return ret;
8006c0a: 7dfb ldrb r3, [r7, #23]
}
8006c0c: 4618 mov r0, r3
8006c0e: 3718 adds r7, #24
8006c10: 46bd mov sp, r7
8006c12: bd80 pop {r7, pc}
08006c14 <USBD_RegisterClass>:
* @param pdev: Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
8006c14: b580 push {r7, lr}
8006c16: b084 sub sp, #16
8006c18: af00 add r7, sp, #0
8006c1a: 6078 str r0, [r7, #4]
8006c1c: 6039 str r1, [r7, #0]
uint16_t len = 0U;
8006c1e: 2300 movs r3, #0
8006c20: 81fb strh r3, [r7, #14]
if (pclass == NULL)
8006c22: 683b ldr r3, [r7, #0]
8006c24: 2b00 cmp r3, #0
8006c26: d101 bne.n 8006c2c <USBD_RegisterClass+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif /* (USBD_DEBUG_LEVEL > 1U) */
return USBD_FAIL;
8006c28: 2303 movs r3, #3
8006c2a: e025 b.n 8006c78 <USBD_RegisterClass+0x64>
}
/* link the class to the USB Device handle */
pdev->pClass[0] = pclass;
8006c2c: 687b ldr r3, [r7, #4]
8006c2e: 683a ldr r2, [r7, #0]
8006c30: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClass[pdev->classId]->GetHSConfigDescriptor != NULL)
{
pdev->pConfDesc = (void *)pdev->pClass[pdev->classId]->GetHSConfigDescriptor(&len);
}
#else /* Default USE_USB_FS */
if (pdev->pClass[pdev->classId]->GetFSConfigDescriptor != NULL)
8006c34: 687b ldr r3, [r7, #4]
8006c36: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8006c3a: 687b ldr r3, [r7, #4]
8006c3c: 32ae adds r2, #174 @ 0xae
8006c3e: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8006c42: 6adb ldr r3, [r3, #44] @ 0x2c
8006c44: 2b00 cmp r3, #0
8006c46: d00f beq.n 8006c68 <USBD_RegisterClass+0x54>
{
pdev->pConfDesc = (void *)pdev->pClass[pdev->classId]->GetFSConfigDescriptor(&len);
8006c48: 687b ldr r3, [r7, #4]
8006c4a: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8006c4e: 687b ldr r3, [r7, #4]
8006c50: 32ae adds r2, #174 @ 0xae
8006c52: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8006c56: 6adb ldr r3, [r3, #44] @ 0x2c
8006c58: f107 020e add.w r2, r7, #14
8006c5c: 4610 mov r0, r2
8006c5e: 4798 blx r3
8006c60: 4602 mov r2, r0
8006c62: 687b ldr r3, [r7, #4]
8006c64: f8c3 22d0 str.w r2, [r3, #720] @ 0x2d0
}
#endif /* USE_USB_FS */
/* Increment the NumClasses */
pdev->NumClasses++;
8006c68: 687b ldr r3, [r7, #4]
8006c6a: f8d3 32d8 ldr.w r3, [r3, #728] @ 0x2d8
8006c6e: 1c5a adds r2, r3, #1
8006c70: 687b ldr r3, [r7, #4]
8006c72: f8c3 22d8 str.w r2, [r3, #728] @ 0x2d8
return USBD_OK;
8006c76: 2300 movs r3, #0
}
8006c78: 4618 mov r0, r3
8006c7a: 3710 adds r7, #16
8006c7c: 46bd mov sp, r7
8006c7e: bd80 pop {r7, pc}
08006c80 <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
8006c80: b580 push {r7, lr}
8006c82: b082 sub sp, #8
8006c84: af00 add r7, sp, #0
8006c86: 6078 str r0, [r7, #4]
#ifdef USE_USBD_COMPOSITE
pdev->classId = 0U;
#endif /* USE_USBD_COMPOSITE */
/* Start the low level driver */
return USBD_LL_Start(pdev);
8006c88: 6878 ldr r0, [r7, #4]
8006c8a: f001 fdab bl 80087e4 <USBD_LL_Start>
8006c8e: 4603 mov r3, r0
}
8006c90: 4618 mov r0, r3
8006c92: 3708 adds r7, #8
8006c94: 46bd mov sp, r7
8006c96: bd80 pop {r7, pc}
08006c98 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
8006c98: b480 push {r7}
8006c9a: b083 sub sp, #12
8006c9c: af00 add r7, sp, #0
8006c9e: 6078 str r0, [r7, #4]
return ret;
#else
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
8006ca0: 2300 movs r3, #0
#endif /* USBD_HS_TESTMODE_ENABLE */
}
8006ca2: 4618 mov r0, r3
8006ca4: 370c adds r7, #12
8006ca6: 46bd mov sp, r7
8006ca8: f85d 7b04 ldr.w r7, [sp], #4
8006cac: 4770 bx lr
08006cae <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8006cae: b580 push {r7, lr}
8006cb0: b084 sub sp, #16
8006cb2: af00 add r7, sp, #0
8006cb4: 6078 str r0, [r7, #4]
8006cb6: 460b mov r3, r1
8006cb8: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_OK;
8006cba: 2300 movs r3, #0
8006cbc: 73fb strb r3, [r7, #15]
}
}
}
}
#else
if (pdev->pClass[0] != NULL)
8006cbe: 687b ldr r3, [r7, #4]
8006cc0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006cc4: 2b00 cmp r3, #0
8006cc6: d009 beq.n 8006cdc <USBD_SetClassConfig+0x2e>
{
/* Set configuration and Start the Class */
ret = (USBD_StatusTypeDef)pdev->pClass[0]->Init(pdev, cfgidx);
8006cc8: 687b ldr r3, [r7, #4]
8006cca: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006cce: 681b ldr r3, [r3, #0]
8006cd0: 78fa ldrb r2, [r7, #3]
8006cd2: 4611 mov r1, r2
8006cd4: 6878 ldr r0, [r7, #4]
8006cd6: 4798 blx r3
8006cd8: 4603 mov r3, r0
8006cda: 73fb strb r3, [r7, #15]
}
#endif /* USE_USBD_COMPOSITE */
return ret;
8006cdc: 7bfb ldrb r3, [r7, #15]
}
8006cde: 4618 mov r0, r3
8006ce0: 3710 adds r7, #16
8006ce2: 46bd mov sp, r7
8006ce4: bd80 pop {r7, pc}
08006ce6 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8006ce6: b580 push {r7, lr}
8006ce8: b084 sub sp, #16
8006cea: af00 add r7, sp, #0
8006cec: 6078 str r0, [r7, #4]
8006cee: 460b mov r3, r1
8006cf0: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_OK;
8006cf2: 2300 movs r3, #0
8006cf4: 73fb strb r3, [r7, #15]
}
}
}
#else
/* Clear configuration and De-initialize the Class process */
if (pdev->pClass[0]->DeInit(pdev, cfgidx) != 0U)
8006cf6: 687b ldr r3, [r7, #4]
8006cf8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006cfc: 685b ldr r3, [r3, #4]
8006cfe: 78fa ldrb r2, [r7, #3]
8006d00: 4611 mov r1, r2
8006d02: 6878 ldr r0, [r7, #4]
8006d04: 4798 blx r3
8006d06: 4603 mov r3, r0
8006d08: 2b00 cmp r3, #0
8006d0a: d001 beq.n 8006d10 <USBD_ClrClassConfig+0x2a>
{
ret = USBD_FAIL;
8006d0c: 2303 movs r3, #3
8006d0e: 73fb strb r3, [r7, #15]
}
#endif /* USE_USBD_COMPOSITE */
return ret;
8006d10: 7bfb ldrb r3, [r7, #15]
}
8006d12: 4618 mov r0, r3
8006d14: 3710 adds r7, #16
8006d16: 46bd mov sp, r7
8006d18: bd80 pop {r7, pc}
08006d1a <USBD_LL_SetupStage>:
* @param pdev: device instance
* @param psetup: setup packet buffer pointer
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
8006d1a: b580 push {r7, lr}
8006d1c: b084 sub sp, #16
8006d1e: af00 add r7, sp, #0
8006d20: 6078 str r0, [r7, #4]
8006d22: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret;
USBD_ParseSetupRequest(&pdev->request, psetup);
8006d24: 687b ldr r3, [r7, #4]
8006d26: f203 23aa addw r3, r3, #682 @ 0x2aa
8006d2a: 6839 ldr r1, [r7, #0]
8006d2c: 4618 mov r0, r3
8006d2e: f001 f94c bl 8007fca <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
8006d32: 687b ldr r3, [r7, #4]
8006d34: 2201 movs r2, #1
8006d36: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
8006d3a: 687b ldr r3, [r7, #4]
8006d3c: f8b3 32b0 ldrh.w r3, [r3, #688] @ 0x2b0
8006d40: 461a mov r2, r3
8006d42: 687b ldr r3, [r7, #4]
8006d44: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
8006d48: 687b ldr r3, [r7, #4]
8006d4a: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa
8006d4e: f003 031f and.w r3, r3, #31
8006d52: 2b02 cmp r3, #2
8006d54: d01a beq.n 8006d8c <USBD_LL_SetupStage+0x72>
8006d56: 2b02 cmp r3, #2
8006d58: d822 bhi.n 8006da0 <USBD_LL_SetupStage+0x86>
8006d5a: 2b00 cmp r3, #0
8006d5c: d002 beq.n 8006d64 <USBD_LL_SetupStage+0x4a>
8006d5e: 2b01 cmp r3, #1
8006d60: d00a beq.n 8006d78 <USBD_LL_SetupStage+0x5e>
8006d62: e01d b.n 8006da0 <USBD_LL_SetupStage+0x86>
{
case USB_REQ_RECIPIENT_DEVICE:
ret = USBD_StdDevReq(pdev, &pdev->request);
8006d64: 687b ldr r3, [r7, #4]
8006d66: f203 23aa addw r3, r3, #682 @ 0x2aa
8006d6a: 4619 mov r1, r3
8006d6c: 6878 ldr r0, [r7, #4]
8006d6e: f000 fb77 bl 8007460 <USBD_StdDevReq>
8006d72: 4603 mov r3, r0
8006d74: 73fb strb r3, [r7, #15]
break;
8006d76: e020 b.n 8006dba <USBD_LL_SetupStage+0xa0>
case USB_REQ_RECIPIENT_INTERFACE:
ret = USBD_StdItfReq(pdev, &pdev->request);
8006d78: 687b ldr r3, [r7, #4]
8006d7a: f203 23aa addw r3, r3, #682 @ 0x2aa
8006d7e: 4619 mov r1, r3
8006d80: 6878 ldr r0, [r7, #4]
8006d82: f000 fbdf bl 8007544 <USBD_StdItfReq>
8006d86: 4603 mov r3, r0
8006d88: 73fb strb r3, [r7, #15]
break;
8006d8a: e016 b.n 8006dba <USBD_LL_SetupStage+0xa0>
case USB_REQ_RECIPIENT_ENDPOINT:
ret = USBD_StdEPReq(pdev, &pdev->request);
8006d8c: 687b ldr r3, [r7, #4]
8006d8e: f203 23aa addw r3, r3, #682 @ 0x2aa
8006d92: 4619 mov r1, r3
8006d94: 6878 ldr r0, [r7, #4]
8006d96: f000 fc41 bl 800761c <USBD_StdEPReq>
8006d9a: 4603 mov r3, r0
8006d9c: 73fb strb r3, [r7, #15]
break;
8006d9e: e00c b.n 8006dba <USBD_LL_SetupStage+0xa0>
default:
ret = USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
8006da0: 687b ldr r3, [r7, #4]
8006da2: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa
8006da6: f023 037f bic.w r3, r3, #127 @ 0x7f
8006daa: b2db uxtb r3, r3
8006dac: 4619 mov r1, r3
8006dae: 6878 ldr r0, [r7, #4]
8006db0: f001 fd78 bl 80088a4 <USBD_LL_StallEP>
8006db4: 4603 mov r3, r0
8006db6: 73fb strb r3, [r7, #15]
break;
8006db8: bf00 nop
}
return ret;
8006dba: 7bfb ldrb r3, [r7, #15]
}
8006dbc: 4618 mov r0, r3
8006dbe: 3710 adds r7, #16
8006dc0: 46bd mov sp, r7
8006dc2: bd80 pop {r7, pc}
08006dc4 <USBD_LL_DataOutStage>:
* @param pdata: data pointer
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8006dc4: b580 push {r7, lr}
8006dc6: b086 sub sp, #24
8006dc8: af00 add r7, sp, #0
8006dca: 60f8 str r0, [r7, #12]
8006dcc: 460b mov r3, r1
8006dce: 607a str r2, [r7, #4]
8006dd0: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
USBD_StatusTypeDef ret = USBD_OK;
8006dd2: 2300 movs r3, #0
8006dd4: 75fb strb r3, [r7, #23]
uint8_t idx;
UNUSED(pdata);
if (epnum == 0U)
8006dd6: 7afb ldrb r3, [r7, #11]
8006dd8: 2b00 cmp r3, #0
8006dda: d177 bne.n 8006ecc <USBD_LL_DataOutStage+0x108>
{
pep = &pdev->ep_out[0];
8006ddc: 68fb ldr r3, [r7, #12]
8006dde: f503 73aa add.w r3, r3, #340 @ 0x154
8006de2: 613b str r3, [r7, #16]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
8006de4: 68fb ldr r3, [r7, #12]
8006de6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8006dea: 2b03 cmp r3, #3
8006dec: f040 80a1 bne.w 8006f32 <USBD_LL_DataOutStage+0x16e>
{
if (pep->rem_length > pep->maxpacket)
8006df0: 693b ldr r3, [r7, #16]
8006df2: 685b ldr r3, [r3, #4]
8006df4: 693a ldr r2, [r7, #16]
8006df6: 8992 ldrh r2, [r2, #12]
8006df8: 4293 cmp r3, r2
8006dfa: d91c bls.n 8006e36 <USBD_LL_DataOutStage+0x72>
{
pep->rem_length -= pep->maxpacket;
8006dfc: 693b ldr r3, [r7, #16]
8006dfe: 685b ldr r3, [r3, #4]
8006e00: 693a ldr r2, [r7, #16]
8006e02: 8992 ldrh r2, [r2, #12]
8006e04: 1a9a subs r2, r3, r2
8006e06: 693b ldr r3, [r7, #16]
8006e08: 605a str r2, [r3, #4]
pep->pbuffer += pep->maxpacket;
8006e0a: 693b ldr r3, [r7, #16]
8006e0c: 691b ldr r3, [r3, #16]
8006e0e: 693a ldr r2, [r7, #16]
8006e10: 8992 ldrh r2, [r2, #12]
8006e12: 441a add r2, r3
8006e14: 693b ldr r3, [r7, #16]
8006e16: 611a str r2, [r3, #16]
(void)USBD_CtlContinueRx(pdev, pep->pbuffer, MAX(pep->rem_length, pep->maxpacket));
8006e18: 693b ldr r3, [r7, #16]
8006e1a: 6919 ldr r1, [r3, #16]
8006e1c: 693b ldr r3, [r7, #16]
8006e1e: 899b ldrh r3, [r3, #12]
8006e20: 461a mov r2, r3
8006e22: 693b ldr r3, [r7, #16]
8006e24: 685b ldr r3, [r3, #4]
8006e26: 4293 cmp r3, r2
8006e28: bf38 it cc
8006e2a: 4613 movcc r3, r2
8006e2c: 461a mov r2, r3
8006e2e: 68f8 ldr r0, [r7, #12]
8006e30: f001 f9b1 bl 8008196 <USBD_CtlContinueRx>
8006e34: e07d b.n 8006f32 <USBD_LL_DataOutStage+0x16e>
}
else
{
/* Find the class ID relative to the current request */
switch (pdev->request.bmRequest & 0x1FU)
8006e36: 68fb ldr r3, [r7, #12]
8006e38: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa
8006e3c: f003 031f and.w r3, r3, #31
8006e40: 2b02 cmp r3, #2
8006e42: d014 beq.n 8006e6e <USBD_LL_DataOutStage+0xaa>
8006e44: 2b02 cmp r3, #2
8006e46: d81d bhi.n 8006e84 <USBD_LL_DataOutStage+0xc0>
8006e48: 2b00 cmp r3, #0
8006e4a: d002 beq.n 8006e52 <USBD_LL_DataOutStage+0x8e>
8006e4c: 2b01 cmp r3, #1
8006e4e: d003 beq.n 8006e58 <USBD_LL_DataOutStage+0x94>
8006e50: e018 b.n 8006e84 <USBD_LL_DataOutStage+0xc0>
{
case USB_REQ_RECIPIENT_DEVICE:
/* Device requests must be managed by the first instantiated class
(or duplicated by all classes for simplicity) */
idx = 0U;
8006e52: 2300 movs r3, #0
8006e54: 75bb strb r3, [r7, #22]
break;
8006e56: e018 b.n 8006e8a <USBD_LL_DataOutStage+0xc6>
case USB_REQ_RECIPIENT_INTERFACE:
idx = USBD_CoreFindIF(pdev, LOBYTE(pdev->request.wIndex));
8006e58: 68fb ldr r3, [r7, #12]
8006e5a: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
8006e5e: b2db uxtb r3, r3
8006e60: 4619 mov r1, r3
8006e62: 68f8 ldr r0, [r7, #12]
8006e64: f000 fa6e bl 8007344 <USBD_CoreFindIF>
8006e68: 4603 mov r3, r0
8006e6a: 75bb strb r3, [r7, #22]
break;
8006e6c: e00d b.n 8006e8a <USBD_LL_DataOutStage+0xc6>
case USB_REQ_RECIPIENT_ENDPOINT:
idx = USBD_CoreFindEP(pdev, LOBYTE(pdev->request.wIndex));
8006e6e: 68fb ldr r3, [r7, #12]
8006e70: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
8006e74: b2db uxtb r3, r3
8006e76: 4619 mov r1, r3
8006e78: 68f8 ldr r0, [r7, #12]
8006e7a: f000 fa70 bl 800735e <USBD_CoreFindEP>
8006e7e: 4603 mov r3, r0
8006e80: 75bb strb r3, [r7, #22]
break;
8006e82: e002 b.n 8006e8a <USBD_LL_DataOutStage+0xc6>
default:
/* Back to the first class in case of doubt */
idx = 0U;
8006e84: 2300 movs r3, #0
8006e86: 75bb strb r3, [r7, #22]
break;
8006e88: bf00 nop
}
if (idx < USBD_MAX_SUPPORTED_CLASS)
8006e8a: 7dbb ldrb r3, [r7, #22]
8006e8c: 2b00 cmp r3, #0
8006e8e: d119 bne.n 8006ec4 <USBD_LL_DataOutStage+0x100>
{
/* Setup the class ID and route the request to the relative class function */
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8006e90: 68fb ldr r3, [r7, #12]
8006e92: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8006e96: b2db uxtb r3, r3
8006e98: 2b03 cmp r3, #3
8006e9a: d113 bne.n 8006ec4 <USBD_LL_DataOutStage+0x100>
{
if (pdev->pClass[idx]->EP0_RxReady != NULL)
8006e9c: 7dba ldrb r2, [r7, #22]
8006e9e: 68fb ldr r3, [r7, #12]
8006ea0: 32ae adds r2, #174 @ 0xae
8006ea2: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8006ea6: 691b ldr r3, [r3, #16]
8006ea8: 2b00 cmp r3, #0
8006eaa: d00b beq.n 8006ec4 <USBD_LL_DataOutStage+0x100>
{
pdev->classId = idx;
8006eac: 7dba ldrb r2, [r7, #22]
8006eae: 68fb ldr r3, [r7, #12]
8006eb0: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
pdev->pClass[idx]->EP0_RxReady(pdev);
8006eb4: 7dba ldrb r2, [r7, #22]
8006eb6: 68fb ldr r3, [r7, #12]
8006eb8: 32ae adds r2, #174 @ 0xae
8006eba: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8006ebe: 691b ldr r3, [r3, #16]
8006ec0: 68f8 ldr r0, [r7, #12]
8006ec2: 4798 blx r3
}
}
}
(void)USBD_CtlSendStatus(pdev);
8006ec4: 68f8 ldr r0, [r7, #12]
8006ec6: f001 f977 bl 80081b8 <USBD_CtlSendStatus>
8006eca: e032 b.n 8006f32 <USBD_LL_DataOutStage+0x16e>
}
}
else
{
/* Get the class index relative to this interface */
idx = USBD_CoreFindEP(pdev, (epnum & 0x7FU));
8006ecc: 7afb ldrb r3, [r7, #11]
8006ece: f003 037f and.w r3, r3, #127 @ 0x7f
8006ed2: b2db uxtb r3, r3
8006ed4: 4619 mov r1, r3
8006ed6: 68f8 ldr r0, [r7, #12]
8006ed8: f000 fa41 bl 800735e <USBD_CoreFindEP>
8006edc: 4603 mov r3, r0
8006ede: 75bb strb r3, [r7, #22]
if (((uint16_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS))
8006ee0: 7dbb ldrb r3, [r7, #22]
8006ee2: 2bff cmp r3, #255 @ 0xff
8006ee4: d025 beq.n 8006f32 <USBD_LL_DataOutStage+0x16e>
8006ee6: 7dbb ldrb r3, [r7, #22]
8006ee8: 2b00 cmp r3, #0
8006eea: d122 bne.n 8006f32 <USBD_LL_DataOutStage+0x16e>
{
/* Call the class data out function to manage the request */
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8006eec: 68fb ldr r3, [r7, #12]
8006eee: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8006ef2: b2db uxtb r3, r3
8006ef4: 2b03 cmp r3, #3
8006ef6: d117 bne.n 8006f28 <USBD_LL_DataOutStage+0x164>
{
if (pdev->pClass[idx]->DataOut != NULL)
8006ef8: 7dba ldrb r2, [r7, #22]
8006efa: 68fb ldr r3, [r7, #12]
8006efc: 32ae adds r2, #174 @ 0xae
8006efe: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8006f02: 699b ldr r3, [r3, #24]
8006f04: 2b00 cmp r3, #0
8006f06: d00f beq.n 8006f28 <USBD_LL_DataOutStage+0x164>
{
pdev->classId = idx;
8006f08: 7dba ldrb r2, [r7, #22]
8006f0a: 68fb ldr r3, [r7, #12]
8006f0c: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
ret = (USBD_StatusTypeDef)pdev->pClass[idx]->DataOut(pdev, epnum);
8006f10: 7dba ldrb r2, [r7, #22]
8006f12: 68fb ldr r3, [r7, #12]
8006f14: 32ae adds r2, #174 @ 0xae
8006f16: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8006f1a: 699b ldr r3, [r3, #24]
8006f1c: 7afa ldrb r2, [r7, #11]
8006f1e: 4611 mov r1, r2
8006f20: 68f8 ldr r0, [r7, #12]
8006f22: 4798 blx r3
8006f24: 4603 mov r3, r0
8006f26: 75fb strb r3, [r7, #23]
}
}
if (ret != USBD_OK)
8006f28: 7dfb ldrb r3, [r7, #23]
8006f2a: 2b00 cmp r3, #0
8006f2c: d001 beq.n 8006f32 <USBD_LL_DataOutStage+0x16e>
{
return ret;
8006f2e: 7dfb ldrb r3, [r7, #23]
8006f30: e000 b.n 8006f34 <USBD_LL_DataOutStage+0x170>
}
}
}
return USBD_OK;
8006f32: 2300 movs r3, #0
}
8006f34: 4618 mov r0, r3
8006f36: 3718 adds r7, #24
8006f38: 46bd mov sp, r7
8006f3a: bd80 pop {r7, pc}
08006f3c <USBD_LL_DataInStage>:
* @param pdata: data pointer
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8006f3c: b580 push {r7, lr}
8006f3e: b086 sub sp, #24
8006f40: af00 add r7, sp, #0
8006f42: 60f8 str r0, [r7, #12]
8006f44: 460b mov r3, r1
8006f46: 607a str r2, [r7, #4]
8006f48: 72fb strb r3, [r7, #11]
USBD_StatusTypeDef ret;
uint8_t idx;
UNUSED(pdata);
if (epnum == 0U)
8006f4a: 7afb ldrb r3, [r7, #11]
8006f4c: 2b00 cmp r3, #0
8006f4e: d178 bne.n 8007042 <USBD_LL_DataInStage+0x106>
{
pep = &pdev->ep_in[0];
8006f50: 68fb ldr r3, [r7, #12]
8006f52: 3314 adds r3, #20
8006f54: 613b str r3, [r7, #16]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
8006f56: 68fb ldr r3, [r7, #12]
8006f58: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8006f5c: 2b02 cmp r3, #2
8006f5e: d163 bne.n 8007028 <USBD_LL_DataInStage+0xec>
{
if (pep->rem_length > pep->maxpacket)
8006f60: 693b ldr r3, [r7, #16]
8006f62: 685b ldr r3, [r3, #4]
8006f64: 693a ldr r2, [r7, #16]
8006f66: 8992 ldrh r2, [r2, #12]
8006f68: 4293 cmp r3, r2
8006f6a: d91c bls.n 8006fa6 <USBD_LL_DataInStage+0x6a>
{
pep->rem_length -= pep->maxpacket;
8006f6c: 693b ldr r3, [r7, #16]
8006f6e: 685b ldr r3, [r3, #4]
8006f70: 693a ldr r2, [r7, #16]
8006f72: 8992 ldrh r2, [r2, #12]
8006f74: 1a9a subs r2, r3, r2
8006f76: 693b ldr r3, [r7, #16]
8006f78: 605a str r2, [r3, #4]
pep->pbuffer += pep->maxpacket;
8006f7a: 693b ldr r3, [r7, #16]
8006f7c: 691b ldr r3, [r3, #16]
8006f7e: 693a ldr r2, [r7, #16]
8006f80: 8992 ldrh r2, [r2, #12]
8006f82: 441a add r2, r3
8006f84: 693b ldr r3, [r7, #16]
8006f86: 611a str r2, [r3, #16]
(void)USBD_CtlContinueSendData(pdev, pep->pbuffer, pep->rem_length);
8006f88: 693b ldr r3, [r7, #16]
8006f8a: 6919 ldr r1, [r3, #16]
8006f8c: 693b ldr r3, [r7, #16]
8006f8e: 685b ldr r3, [r3, #4]
8006f90: 461a mov r2, r3
8006f92: 68f8 ldr r0, [r7, #12]
8006f94: f001 f8ee bl 8008174 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
(void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8006f98: 2300 movs r3, #0
8006f9a: 2200 movs r2, #0
8006f9c: 2100 movs r1, #0
8006f9e: 68f8 ldr r0, [r7, #12]
8006fa0: f001 fd2a bl 80089f8 <USBD_LL_PrepareReceive>
8006fa4: e040 b.n 8007028 <USBD_LL_DataInStage+0xec>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->maxpacket == pep->rem_length) &&
8006fa6: 693b ldr r3, [r7, #16]
8006fa8: 899b ldrh r3, [r3, #12]
8006faa: 461a mov r2, r3
8006fac: 693b ldr r3, [r7, #16]
8006fae: 685b ldr r3, [r3, #4]
8006fb0: 429a cmp r2, r3
8006fb2: d11c bne.n 8006fee <USBD_LL_DataInStage+0xb2>
(pep->total_length >= pep->maxpacket) &&
8006fb4: 693b ldr r3, [r7, #16]
8006fb6: 681b ldr r3, [r3, #0]
8006fb8: 693a ldr r2, [r7, #16]
8006fba: 8992 ldrh r2, [r2, #12]
if ((pep->maxpacket == pep->rem_length) &&
8006fbc: 4293 cmp r3, r2
8006fbe: d316 bcc.n 8006fee <USBD_LL_DataInStage+0xb2>
(pep->total_length < pdev->ep0_data_len))
8006fc0: 693b ldr r3, [r7, #16]
8006fc2: 681a ldr r2, [r3, #0]
8006fc4: 68fb ldr r3, [r7, #12]
8006fc6: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
8006fca: 429a cmp r2, r3
8006fcc: d20f bcs.n 8006fee <USBD_LL_DataInStage+0xb2>
{
(void)USBD_CtlContinueSendData(pdev, NULL, 0U);
8006fce: 2200 movs r2, #0
8006fd0: 2100 movs r1, #0
8006fd2: 68f8 ldr r0, [r7, #12]
8006fd4: f001 f8ce bl 8008174 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
8006fd8: 68fb ldr r3, [r7, #12]
8006fda: 2200 movs r2, #0
8006fdc: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
(void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8006fe0: 2300 movs r3, #0
8006fe2: 2200 movs r2, #0
8006fe4: 2100 movs r1, #0
8006fe6: 68f8 ldr r0, [r7, #12]
8006fe8: f001 fd06 bl 80089f8 <USBD_LL_PrepareReceive>
8006fec: e01c b.n 8007028 <USBD_LL_DataInStage+0xec>
}
else
{
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8006fee: 68fb ldr r3, [r7, #12]
8006ff0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8006ff4: b2db uxtb r3, r3
8006ff6: 2b03 cmp r3, #3
8006ff8: d10f bne.n 800701a <USBD_LL_DataInStage+0xde>
{
if (pdev->pClass[0]->EP0_TxSent != NULL)
8006ffa: 68fb ldr r3, [r7, #12]
8006ffc: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007000: 68db ldr r3, [r3, #12]
8007002: 2b00 cmp r3, #0
8007004: d009 beq.n 800701a <USBD_LL_DataInStage+0xde>
{
pdev->classId = 0U;
8007006: 68fb ldr r3, [r7, #12]
8007008: 2200 movs r2, #0
800700a: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
pdev->pClass[0]->EP0_TxSent(pdev);
800700e: 68fb ldr r3, [r7, #12]
8007010: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007014: 68db ldr r3, [r3, #12]
8007016: 68f8 ldr r0, [r7, #12]
8007018: 4798 blx r3
}
}
(void)USBD_LL_StallEP(pdev, 0x80U);
800701a: 2180 movs r1, #128 @ 0x80
800701c: 68f8 ldr r0, [r7, #12]
800701e: f001 fc41 bl 80088a4 <USBD_LL_StallEP>
(void)USBD_CtlReceiveStatus(pdev);
8007022: 68f8 ldr r0, [r7, #12]
8007024: f001 f8db bl 80081de <USBD_CtlReceiveStatus>
}
}
}
if (pdev->dev_test_mode != 0U)
8007028: 68fb ldr r3, [r7, #12]
800702a: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800702e: 2b00 cmp r3, #0
8007030: d03a beq.n 80070a8 <USBD_LL_DataInStage+0x16c>
{
(void)USBD_RunTestMode(pdev);
8007032: 68f8 ldr r0, [r7, #12]
8007034: f7ff fe30 bl 8006c98 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
8007038: 68fb ldr r3, [r7, #12]
800703a: 2200 movs r2, #0
800703c: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
8007040: e032 b.n 80070a8 <USBD_LL_DataInStage+0x16c>
}
}
else
{
/* Get the class index relative to this interface */
idx = USBD_CoreFindEP(pdev, ((uint8_t)epnum | 0x80U));
8007042: 7afb ldrb r3, [r7, #11]
8007044: f063 037f orn r3, r3, #127 @ 0x7f
8007048: b2db uxtb r3, r3
800704a: 4619 mov r1, r3
800704c: 68f8 ldr r0, [r7, #12]
800704e: f000 f986 bl 800735e <USBD_CoreFindEP>
8007052: 4603 mov r3, r0
8007054: 75fb strb r3, [r7, #23]
if (((uint16_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS))
8007056: 7dfb ldrb r3, [r7, #23]
8007058: 2bff cmp r3, #255 @ 0xff
800705a: d025 beq.n 80070a8 <USBD_LL_DataInStage+0x16c>
800705c: 7dfb ldrb r3, [r7, #23]
800705e: 2b00 cmp r3, #0
8007060: d122 bne.n 80070a8 <USBD_LL_DataInStage+0x16c>
{
/* Call the class data out function to manage the request */
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007062: 68fb ldr r3, [r7, #12]
8007064: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007068: b2db uxtb r3, r3
800706a: 2b03 cmp r3, #3
800706c: d11c bne.n 80070a8 <USBD_LL_DataInStage+0x16c>
{
if (pdev->pClass[idx]->DataIn != NULL)
800706e: 7dfa ldrb r2, [r7, #23]
8007070: 68fb ldr r3, [r7, #12]
8007072: 32ae adds r2, #174 @ 0xae
8007074: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8007078: 695b ldr r3, [r3, #20]
800707a: 2b00 cmp r3, #0
800707c: d014 beq.n 80070a8 <USBD_LL_DataInStage+0x16c>
{
pdev->classId = idx;
800707e: 7dfa ldrb r2, [r7, #23]
8007080: 68fb ldr r3, [r7, #12]
8007082: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
ret = (USBD_StatusTypeDef)pdev->pClass[idx]->DataIn(pdev, epnum);
8007086: 7dfa ldrb r2, [r7, #23]
8007088: 68fb ldr r3, [r7, #12]
800708a: 32ae adds r2, #174 @ 0xae
800708c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8007090: 695b ldr r3, [r3, #20]
8007092: 7afa ldrb r2, [r7, #11]
8007094: 4611 mov r1, r2
8007096: 68f8 ldr r0, [r7, #12]
8007098: 4798 blx r3
800709a: 4603 mov r3, r0
800709c: 75bb strb r3, [r7, #22]
if (ret != USBD_OK)
800709e: 7dbb ldrb r3, [r7, #22]
80070a0: 2b00 cmp r3, #0
80070a2: d001 beq.n 80070a8 <USBD_LL_DataInStage+0x16c>
{
return ret;
80070a4: 7dbb ldrb r3, [r7, #22]
80070a6: e000 b.n 80070aa <USBD_LL_DataInStage+0x16e>
}
}
}
}
return USBD_OK;
80070a8: 2300 movs r3, #0
}
80070aa: 4618 mov r0, r3
80070ac: 3718 adds r7, #24
80070ae: 46bd mov sp, r7
80070b0: bd80 pop {r7, pc}
080070b2 <USBD_LL_Reset>:
* Handle Reset event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
80070b2: b580 push {r7, lr}
80070b4: b084 sub sp, #16
80070b6: af00 add r7, sp, #0
80070b8: 6078 str r0, [r7, #4]
USBD_StatusTypeDef ret = USBD_OK;
80070ba: 2300 movs r3, #0
80070bc: 73fb strb r3, [r7, #15]
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
80070be: 687b ldr r3, [r7, #4]
80070c0: 2201 movs r2, #1
80070c2: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
80070c6: 687b ldr r3, [r7, #4]
80070c8: 2200 movs r2, #0
80070ca: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
80070ce: 687b ldr r3, [r7, #4]
80070d0: 2200 movs r2, #0
80070d2: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
80070d4: 687b ldr r3, [r7, #4]
80070d6: 2200 movs r2, #0
80070d8: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
pdev->dev_test_mode = 0U;
80070dc: 687b ldr r3, [r7, #4]
80070de: 2200 movs r2, #0
80070e0: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
}
}
}
#else
if (pdev->pClass[0] != NULL)
80070e4: 687b ldr r3, [r7, #4]
80070e6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80070ea: 2b00 cmp r3, #0
80070ec: d014 beq.n 8007118 <USBD_LL_Reset+0x66>
{
if (pdev->pClass[0]->DeInit != NULL)
80070ee: 687b ldr r3, [r7, #4]
80070f0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80070f4: 685b ldr r3, [r3, #4]
80070f6: 2b00 cmp r3, #0
80070f8: d00e beq.n 8007118 <USBD_LL_Reset+0x66>
{
if (pdev->pClass[0]->DeInit(pdev, (uint8_t)pdev->dev_config) != USBD_OK)
80070fa: 687b ldr r3, [r7, #4]
80070fc: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007100: 685b ldr r3, [r3, #4]
8007102: 687a ldr r2, [r7, #4]
8007104: 6852 ldr r2, [r2, #4]
8007106: b2d2 uxtb r2, r2
8007108: 4611 mov r1, r2
800710a: 6878 ldr r0, [r7, #4]
800710c: 4798 blx r3
800710e: 4603 mov r3, r0
8007110: 2b00 cmp r3, #0
8007112: d001 beq.n 8007118 <USBD_LL_Reset+0x66>
{
ret = USBD_FAIL;
8007114: 2303 movs r3, #3
8007116: 73fb strb r3, [r7, #15]
}
}
#endif /* USE_USBD_COMPOSITE */
/* Open EP0 OUT */
(void)USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8007118: 2340 movs r3, #64 @ 0x40
800711a: 2200 movs r2, #0
800711c: 2100 movs r1, #0
800711e: 6878 ldr r0, [r7, #4]
8007120: f001 fb7b bl 800881a <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
8007124: 687b ldr r3, [r7, #4]
8007126: 2201 movs r2, #1
8007128: f883 2163 strb.w r2, [r3, #355] @ 0x163
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800712c: 687b ldr r3, [r7, #4]
800712e: 2240 movs r2, #64 @ 0x40
8007130: f8a3 2160 strh.w r2, [r3, #352] @ 0x160
/* Open EP0 IN */
(void)USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8007134: 2340 movs r3, #64 @ 0x40
8007136: 2200 movs r2, #0
8007138: 2180 movs r1, #128 @ 0x80
800713a: 6878 ldr r0, [r7, #4]
800713c: f001 fb6d bl 800881a <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
8007140: 687b ldr r3, [r7, #4]
8007142: 2201 movs r2, #1
8007144: f883 2023 strb.w r2, [r3, #35] @ 0x23
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
8007148: 687b ldr r3, [r7, #4]
800714a: 2240 movs r2, #64 @ 0x40
800714c: 841a strh r2, [r3, #32]
return ret;
800714e: 7bfb ldrb r3, [r7, #15]
}
8007150: 4618 mov r0, r3
8007152: 3710 adds r7, #16
8007154: 46bd mov sp, r7
8007156: bd80 pop {r7, pc}
08007158 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
8007158: b480 push {r7}
800715a: b083 sub sp, #12
800715c: af00 add r7, sp, #0
800715e: 6078 str r0, [r7, #4]
8007160: 460b mov r3, r1
8007162: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
8007164: 687b ldr r3, [r7, #4]
8007166: 78fa ldrb r2, [r7, #3]
8007168: 741a strb r2, [r3, #16]
return USBD_OK;
800716a: 2300 movs r3, #0
}
800716c: 4618 mov r0, r3
800716e: 370c adds r7, #12
8007170: 46bd mov sp, r7
8007172: f85d 7b04 ldr.w r7, [sp], #4
8007176: 4770 bx lr
08007178 <USBD_LL_Suspend>:
* Handle Suspend event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
8007178: b480 push {r7}
800717a: b083 sub sp, #12
800717c: af00 add r7, sp, #0
800717e: 6078 str r0, [r7, #4]
if (pdev->dev_state != USBD_STATE_SUSPENDED)
8007180: 687b ldr r3, [r7, #4]
8007182: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007186: b2db uxtb r3, r3
8007188: 2b04 cmp r3, #4
800718a: d006 beq.n 800719a <USBD_LL_Suspend+0x22>
{
pdev->dev_old_state = pdev->dev_state;
800718c: 687b ldr r3, [r7, #4]
800718e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007192: b2da uxtb r2, r3
8007194: 687b ldr r3, [r7, #4]
8007196: f883 229d strb.w r2, [r3, #669] @ 0x29d
}
pdev->dev_state = USBD_STATE_SUSPENDED;
800719a: 687b ldr r3, [r7, #4]
800719c: 2204 movs r2, #4
800719e: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
80071a2: 2300 movs r3, #0
}
80071a4: 4618 mov r0, r3
80071a6: 370c adds r7, #12
80071a8: 46bd mov sp, r7
80071aa: f85d 7b04 ldr.w r7, [sp], #4
80071ae: 4770 bx lr
080071b0 <USBD_LL_Resume>:
* Handle Resume event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
80071b0: b480 push {r7}
80071b2: b083 sub sp, #12
80071b4: af00 add r7, sp, #0
80071b6: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
80071b8: 687b ldr r3, [r7, #4]
80071ba: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80071be: b2db uxtb r3, r3
80071c0: 2b04 cmp r3, #4
80071c2: d106 bne.n 80071d2 <USBD_LL_Resume+0x22>
{
pdev->dev_state = pdev->dev_old_state;
80071c4: 687b ldr r3, [r7, #4]
80071c6: f893 329d ldrb.w r3, [r3, #669] @ 0x29d
80071ca: b2da uxtb r2, r3
80071cc: 687b ldr r3, [r7, #4]
80071ce: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
80071d2: 2300 movs r3, #0
}
80071d4: 4618 mov r0, r3
80071d6: 370c adds r7, #12
80071d8: 46bd mov sp, r7
80071da: f85d 7b04 ldr.w r7, [sp], #4
80071de: 4770 bx lr
080071e0 <USBD_LL_SOF>:
* Handle SOF event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
80071e0: b580 push {r7, lr}
80071e2: b082 sub sp, #8
80071e4: af00 add r7, sp, #0
80071e6: 6078 str r0, [r7, #4]
/* The SOF event can be distributed for all classes that support it */
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80071e8: 687b ldr r3, [r7, #4]
80071ea: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80071ee: b2db uxtb r3, r3
80071f0: 2b03 cmp r3, #3
80071f2: d110 bne.n 8007216 <USBD_LL_SOF+0x36>
}
}
}
}
#else
if (pdev->pClass[0] != NULL)
80071f4: 687b ldr r3, [r7, #4]
80071f6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80071fa: 2b00 cmp r3, #0
80071fc: d00b beq.n 8007216 <USBD_LL_SOF+0x36>
{
if (pdev->pClass[0]->SOF != NULL)
80071fe: 687b ldr r3, [r7, #4]
8007200: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007204: 69db ldr r3, [r3, #28]
8007206: 2b00 cmp r3, #0
8007208: d005 beq.n 8007216 <USBD_LL_SOF+0x36>
{
(void)pdev->pClass[0]->SOF(pdev);
800720a: 687b ldr r3, [r7, #4]
800720c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007210: 69db ldr r3, [r3, #28]
8007212: 6878 ldr r0, [r7, #4]
8007214: 4798 blx r3
}
}
#endif /* USE_USBD_COMPOSITE */
}
return USBD_OK;
8007216: 2300 movs r3, #0
}
8007218: 4618 mov r0, r3
800721a: 3708 adds r7, #8
800721c: 46bd mov sp, r7
800721e: bd80 pop {r7, pc}
08007220 <USBD_LL_IsoINIncomplete>:
* @param epnum: Endpoint number
* @retval status
*/
USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev,
uint8_t epnum)
{
8007220: b580 push {r7, lr}
8007222: b082 sub sp, #8
8007224: af00 add r7, sp, #0
8007226: 6078 str r0, [r7, #4]
8007228: 460b mov r3, r1
800722a: 70fb strb r3, [r7, #3]
if (pdev->pClass[pdev->classId] == NULL)
800722c: 687b ldr r3, [r7, #4]
800722e: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8007232: 687b ldr r3, [r7, #4]
8007234: 32ae adds r2, #174 @ 0xae
8007236: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800723a: 2b00 cmp r3, #0
800723c: d101 bne.n 8007242 <USBD_LL_IsoINIncomplete+0x22>
{
return USBD_FAIL;
800723e: 2303 movs r3, #3
8007240: e01c b.n 800727c <USBD_LL_IsoINIncomplete+0x5c>
}
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007242: 687b ldr r3, [r7, #4]
8007244: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007248: b2db uxtb r3, r3
800724a: 2b03 cmp r3, #3
800724c: d115 bne.n 800727a <USBD_LL_IsoINIncomplete+0x5a>
{
if (pdev->pClass[pdev->classId]->IsoINIncomplete != NULL)
800724e: 687b ldr r3, [r7, #4]
8007250: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8007254: 687b ldr r3, [r7, #4]
8007256: 32ae adds r2, #174 @ 0xae
8007258: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800725c: 6a1b ldr r3, [r3, #32]
800725e: 2b00 cmp r3, #0
8007260: d00b beq.n 800727a <USBD_LL_IsoINIncomplete+0x5a>
{
(void)pdev->pClass[pdev->classId]->IsoINIncomplete(pdev, epnum);
8007262: 687b ldr r3, [r7, #4]
8007264: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8007268: 687b ldr r3, [r7, #4]
800726a: 32ae adds r2, #174 @ 0xae
800726c: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8007270: 6a1b ldr r3, [r3, #32]
8007272: 78fa ldrb r2, [r7, #3]
8007274: 4611 mov r1, r2
8007276: 6878 ldr r0, [r7, #4]
8007278: 4798 blx r3
}
}
return USBD_OK;
800727a: 2300 movs r3, #0
}
800727c: 4618 mov r0, r3
800727e: 3708 adds r7, #8
8007280: 46bd mov sp, r7
8007282: bd80 pop {r7, pc}
08007284 <USBD_LL_IsoOUTIncomplete>:
* @param epnum: Endpoint number
* @retval status
*/
USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev,
uint8_t epnum)
{
8007284: b580 push {r7, lr}
8007286: b082 sub sp, #8
8007288: af00 add r7, sp, #0
800728a: 6078 str r0, [r7, #4]
800728c: 460b mov r3, r1
800728e: 70fb strb r3, [r7, #3]
if (pdev->pClass[pdev->classId] == NULL)
8007290: 687b ldr r3, [r7, #4]
8007292: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8007296: 687b ldr r3, [r7, #4]
8007298: 32ae adds r2, #174 @ 0xae
800729a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800729e: 2b00 cmp r3, #0
80072a0: d101 bne.n 80072a6 <USBD_LL_IsoOUTIncomplete+0x22>
{
return USBD_FAIL;
80072a2: 2303 movs r3, #3
80072a4: e01c b.n 80072e0 <USBD_LL_IsoOUTIncomplete+0x5c>
}
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80072a6: 687b ldr r3, [r7, #4]
80072a8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80072ac: b2db uxtb r3, r3
80072ae: 2b03 cmp r3, #3
80072b0: d115 bne.n 80072de <USBD_LL_IsoOUTIncomplete+0x5a>
{
if (pdev->pClass[pdev->classId]->IsoOUTIncomplete != NULL)
80072b2: 687b ldr r3, [r7, #4]
80072b4: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
80072b8: 687b ldr r3, [r7, #4]
80072ba: 32ae adds r2, #174 @ 0xae
80072bc: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80072c0: 6a5b ldr r3, [r3, #36] @ 0x24
80072c2: 2b00 cmp r3, #0
80072c4: d00b beq.n 80072de <USBD_LL_IsoOUTIncomplete+0x5a>
{
(void)pdev->pClass[pdev->classId]->IsoOUTIncomplete(pdev, epnum);
80072c6: 687b ldr r3, [r7, #4]
80072c8: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
80072cc: 687b ldr r3, [r7, #4]
80072ce: 32ae adds r2, #174 @ 0xae
80072d0: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80072d4: 6a5b ldr r3, [r3, #36] @ 0x24
80072d6: 78fa ldrb r2, [r7, #3]
80072d8: 4611 mov r1, r2
80072da: 6878 ldr r0, [r7, #4]
80072dc: 4798 blx r3
}
}
return USBD_OK;
80072de: 2300 movs r3, #0
}
80072e0: 4618 mov r0, r3
80072e2: 3708 adds r7, #8
80072e4: 46bd mov sp, r7
80072e6: bd80 pop {r7, pc}
080072e8 <USBD_LL_DevConnected>:
* Handle device connection event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev)
{
80072e8: b480 push {r7}
80072ea: b083 sub sp, #12
80072ec: af00 add r7, sp, #0
80072ee: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
80072f0: 2300 movs r3, #0
}
80072f2: 4618 mov r0, r3
80072f4: 370c adds r7, #12
80072f6: 46bd mov sp, r7
80072f8: f85d 7b04 ldr.w r7, [sp], #4
80072fc: 4770 bx lr
080072fe <USBD_LL_DevDisconnected>:
* Handle device disconnection event
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev)
{
80072fe: b580 push {r7, lr}
8007300: b084 sub sp, #16
8007302: af00 add r7, sp, #0
8007304: 6078 str r0, [r7, #4]
USBD_StatusTypeDef ret = USBD_OK;
8007306: 2300 movs r3, #0
8007308: 73fb strb r3, [r7, #15]
/* Free Class Resources */
pdev->dev_state = USBD_STATE_DEFAULT;
800730a: 687b ldr r3, [r7, #4]
800730c: 2201 movs r2, #1
800730e: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
}
}
}
#else
if (pdev->pClass[0] != NULL)
8007312: 687b ldr r3, [r7, #4]
8007314: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007318: 2b00 cmp r3, #0
800731a: d00e beq.n 800733a <USBD_LL_DevDisconnected+0x3c>
{
if (pdev->pClass[0]->DeInit(pdev, (uint8_t)pdev->dev_config) != 0U)
800731c: 687b ldr r3, [r7, #4]
800731e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007322: 685b ldr r3, [r3, #4]
8007324: 687a ldr r2, [r7, #4]
8007326: 6852 ldr r2, [r2, #4]
8007328: b2d2 uxtb r2, r2
800732a: 4611 mov r1, r2
800732c: 6878 ldr r0, [r7, #4]
800732e: 4798 blx r3
8007330: 4603 mov r3, r0
8007332: 2b00 cmp r3, #0
8007334: d001 beq.n 800733a <USBD_LL_DevDisconnected+0x3c>
{
ret = USBD_FAIL;
8007336: 2303 movs r3, #3
8007338: 73fb strb r3, [r7, #15]
}
}
#endif /* USE_USBD_COMPOSITE */
return ret;
800733a: 7bfb ldrb r3, [r7, #15]
}
800733c: 4618 mov r0, r3
800733e: 3710 adds r7, #16
8007340: 46bd mov sp, r7
8007342: bd80 pop {r7, pc}
08007344 <USBD_CoreFindIF>:
* @param pdev: device instance
* @param index : selected interface number
* @retval index of the class using the selected interface number. OxFF if no class found.
*/
uint8_t USBD_CoreFindIF(USBD_HandleTypeDef *pdev, uint8_t index)
{
8007344: b480 push {r7}
8007346: b083 sub sp, #12
8007348: af00 add r7, sp, #0
800734a: 6078 str r0, [r7, #4]
800734c: 460b mov r3, r1
800734e: 70fb strb r3, [r7, #3]
return 0xFFU;
#else
UNUSED(pdev);
UNUSED(index);
return 0x00U;
8007350: 2300 movs r3, #0
#endif /* USE_USBD_COMPOSITE */
}
8007352: 4618 mov r0, r3
8007354: 370c adds r7, #12
8007356: 46bd mov sp, r7
8007358: f85d 7b04 ldr.w r7, [sp], #4
800735c: 4770 bx lr
0800735e <USBD_CoreFindEP>:
* @param pdev: device instance
* @param index : selected endpoint number
* @retval index of the class using the selected endpoint number. 0xFF if no class found.
*/
uint8_t USBD_CoreFindEP(USBD_HandleTypeDef *pdev, uint8_t index)
{
800735e: b480 push {r7}
8007360: b083 sub sp, #12
8007362: af00 add r7, sp, #0
8007364: 6078 str r0, [r7, #4]
8007366: 460b mov r3, r1
8007368: 70fb strb r3, [r7, #3]
return 0xFFU;
#else
UNUSED(pdev);
UNUSED(index);
return 0x00U;
800736a: 2300 movs r3, #0
#endif /* USE_USBD_COMPOSITE */
}
800736c: 4618 mov r0, r3
800736e: 370c adds r7, #12
8007370: 46bd mov sp, r7
8007372: f85d 7b04 ldr.w r7, [sp], #4
8007376: 4770 bx lr
08007378 <USBD_GetEpDesc>:
* @param pConfDesc: pointer to Bos descriptor
* @param EpAddr: endpoint address
* @retval pointer to video endpoint descriptor
*/
void *USBD_GetEpDesc(uint8_t *pConfDesc, uint8_t EpAddr)
{
8007378: b580 push {r7, lr}
800737a: b086 sub sp, #24
800737c: af00 add r7, sp, #0
800737e: 6078 str r0, [r7, #4]
8007380: 460b mov r3, r1
8007382: 70fb strb r3, [r7, #3]
USBD_DescHeaderTypeDef *pdesc = (USBD_DescHeaderTypeDef *)(void *)pConfDesc;
8007384: 687b ldr r3, [r7, #4]
8007386: 617b str r3, [r7, #20]
USBD_ConfigDescTypeDef *desc = (USBD_ConfigDescTypeDef *)(void *)pConfDesc;
8007388: 687b ldr r3, [r7, #4]
800738a: 60fb str r3, [r7, #12]
USBD_EpDescTypeDef *pEpDesc = NULL;
800738c: 2300 movs r3, #0
800738e: 613b str r3, [r7, #16]
uint16_t ptr;
if (desc->wTotalLength > desc->bLength)
8007390: 68fb ldr r3, [r7, #12]
8007392: 885b ldrh r3, [r3, #2]
8007394: b29b uxth r3, r3
8007396: 68fa ldr r2, [r7, #12]
8007398: 7812 ldrb r2, [r2, #0]
800739a: 4293 cmp r3, r2
800739c: d91f bls.n 80073de <USBD_GetEpDesc+0x66>
{
ptr = desc->bLength;
800739e: 68fb ldr r3, [r7, #12]
80073a0: 781b ldrb r3, [r3, #0]
80073a2: 817b strh r3, [r7, #10]
while (ptr < desc->wTotalLength)
80073a4: e013 b.n 80073ce <USBD_GetEpDesc+0x56>
{
pdesc = USBD_GetNextDesc((uint8_t *)pdesc, &ptr);
80073a6: f107 030a add.w r3, r7, #10
80073aa: 4619 mov r1, r3
80073ac: 6978 ldr r0, [r7, #20]
80073ae: f000 f81b bl 80073e8 <USBD_GetNextDesc>
80073b2: 6178 str r0, [r7, #20]
if (pdesc->bDescriptorType == USB_DESC_TYPE_ENDPOINT)
80073b4: 697b ldr r3, [r7, #20]
80073b6: 785b ldrb r3, [r3, #1]
80073b8: 2b05 cmp r3, #5
80073ba: d108 bne.n 80073ce <USBD_GetEpDesc+0x56>
{
pEpDesc = (USBD_EpDescTypeDef *)(void *)pdesc;
80073bc: 697b ldr r3, [r7, #20]
80073be: 613b str r3, [r7, #16]
if (pEpDesc->bEndpointAddress == EpAddr)
80073c0: 693b ldr r3, [r7, #16]
80073c2: 789b ldrb r3, [r3, #2]
80073c4: 78fa ldrb r2, [r7, #3]
80073c6: 429a cmp r2, r3
80073c8: d008 beq.n 80073dc <USBD_GetEpDesc+0x64>
{
break;
}
else
{
pEpDesc = NULL;
80073ca: 2300 movs r3, #0
80073cc: 613b str r3, [r7, #16]
while (ptr < desc->wTotalLength)
80073ce: 68fb ldr r3, [r7, #12]
80073d0: 885b ldrh r3, [r3, #2]
80073d2: b29a uxth r2, r3
80073d4: 897b ldrh r3, [r7, #10]
80073d6: 429a cmp r2, r3
80073d8: d8e5 bhi.n 80073a6 <USBD_GetEpDesc+0x2e>
80073da: e000 b.n 80073de <USBD_GetEpDesc+0x66>
break;
80073dc: bf00 nop
}
}
}
}
return (void *)pEpDesc;
80073de: 693b ldr r3, [r7, #16]
}
80073e0: 4618 mov r0, r3
80073e2: 3718 adds r7, #24
80073e4: 46bd mov sp, r7
80073e6: bd80 pop {r7, pc}
080073e8 <USBD_GetNextDesc>:
* @param buf: Buffer where the descriptor is available
* @param ptr: data pointer inside the descriptor
* @retval next header
*/
USBD_DescHeaderTypeDef *USBD_GetNextDesc(uint8_t *pbuf, uint16_t *ptr)
{
80073e8: b480 push {r7}
80073ea: b085 sub sp, #20
80073ec: af00 add r7, sp, #0
80073ee: 6078 str r0, [r7, #4]
80073f0: 6039 str r1, [r7, #0]
USBD_DescHeaderTypeDef *pnext = (USBD_DescHeaderTypeDef *)(void *)pbuf;
80073f2: 687b ldr r3, [r7, #4]
80073f4: 60fb str r3, [r7, #12]
*ptr += pnext->bLength;
80073f6: 683b ldr r3, [r7, #0]
80073f8: 881b ldrh r3, [r3, #0]
80073fa: 68fa ldr r2, [r7, #12]
80073fc: 7812 ldrb r2, [r2, #0]
80073fe: 4413 add r3, r2
8007400: b29a uxth r2, r3
8007402: 683b ldr r3, [r7, #0]
8007404: 801a strh r2, [r3, #0]
pnext = (USBD_DescHeaderTypeDef *)(void *)(pbuf + pnext->bLength);
8007406: 68fb ldr r3, [r7, #12]
8007408: 781b ldrb r3, [r3, #0]
800740a: 461a mov r2, r3
800740c: 687b ldr r3, [r7, #4]
800740e: 4413 add r3, r2
8007410: 60fb str r3, [r7, #12]
return (pnext);
8007412: 68fb ldr r3, [r7, #12]
}
8007414: 4618 mov r0, r3
8007416: 3714 adds r7, #20
8007418: 46bd mov sp, r7
800741a: f85d 7b04 ldr.w r7, [sp], #4
800741e: 4770 bx lr
08007420 <SWAPBYTE>:
/** @defgroup USBD_DEF_Exported_Macros
* @{
*/
__STATIC_INLINE uint16_t SWAPBYTE(uint8_t *addr)
{
8007420: b480 push {r7}
8007422: b087 sub sp, #28
8007424: af00 add r7, sp, #0
8007426: 6078 str r0, [r7, #4]
uint16_t _SwapVal;
uint16_t _Byte1;
uint16_t _Byte2;
uint8_t *_pbuff = addr;
8007428: 687b ldr r3, [r7, #4]
800742a: 617b str r3, [r7, #20]
_Byte1 = *(uint8_t *)_pbuff;
800742c: 697b ldr r3, [r7, #20]
800742e: 781b ldrb r3, [r3, #0]
8007430: 827b strh r3, [r7, #18]
_pbuff++;
8007432: 697b ldr r3, [r7, #20]
8007434: 3301 adds r3, #1
8007436: 617b str r3, [r7, #20]
_Byte2 = *(uint8_t *)_pbuff;
8007438: 697b ldr r3, [r7, #20]
800743a: 781b ldrb r3, [r3, #0]
800743c: 823b strh r3, [r7, #16]
_SwapVal = (_Byte2 << 8) | _Byte1;
800743e: f9b7 3010 ldrsh.w r3, [r7, #16]
8007442: 021b lsls r3, r3, #8
8007444: b21a sxth r2, r3
8007446: f9b7 3012 ldrsh.w r3, [r7, #18]
800744a: 4313 orrs r3, r2
800744c: b21b sxth r3, r3
800744e: 81fb strh r3, [r7, #14]
return _SwapVal;
8007450: 89fb ldrh r3, [r7, #14]
}
8007452: 4618 mov r0, r3
8007454: 371c adds r7, #28
8007456: 46bd mov sp, r7
8007458: f85d 7b04 ldr.w r7, [sp], #4
800745c: 4770 bx lr
...
08007460 <USBD_StdDevReq>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007460: b580 push {r7, lr}
8007462: b084 sub sp, #16
8007464: af00 add r7, sp, #0
8007466: 6078 str r0, [r7, #4]
8007468: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800746a: 2300 movs r3, #0
800746c: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800746e: 683b ldr r3, [r7, #0]
8007470: 781b ldrb r3, [r3, #0]
8007472: f003 0360 and.w r3, r3, #96 @ 0x60
8007476: 2b40 cmp r3, #64 @ 0x40
8007478: d005 beq.n 8007486 <USBD_StdDevReq+0x26>
800747a: 2b40 cmp r3, #64 @ 0x40
800747c: d857 bhi.n 800752e <USBD_StdDevReq+0xce>
800747e: 2b00 cmp r3, #0
8007480: d00f beq.n 80074a2 <USBD_StdDevReq+0x42>
8007482: 2b20 cmp r3, #32
8007484: d153 bne.n 800752e <USBD_StdDevReq+0xce>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
ret = (USBD_StatusTypeDef)pdev->pClass[pdev->classId]->Setup(pdev, req);
8007486: 687b ldr r3, [r7, #4]
8007488: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800748c: 687b ldr r3, [r7, #4]
800748e: 32ae adds r2, #174 @ 0xae
8007490: f853 3022 ldr.w r3, [r3, r2, lsl #2]
8007494: 689b ldr r3, [r3, #8]
8007496: 6839 ldr r1, [r7, #0]
8007498: 6878 ldr r0, [r7, #4]
800749a: 4798 blx r3
800749c: 4603 mov r3, r0
800749e: 73fb strb r3, [r7, #15]
break;
80074a0: e04a b.n 8007538 <USBD_StdDevReq+0xd8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
80074a2: 683b ldr r3, [r7, #0]
80074a4: 785b ldrb r3, [r3, #1]
80074a6: 2b09 cmp r3, #9
80074a8: d83b bhi.n 8007522 <USBD_StdDevReq+0xc2>
80074aa: a201 add r2, pc, #4 @ (adr r2, 80074b0 <USBD_StdDevReq+0x50>)
80074ac: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80074b0: 08007505 .word 0x08007505
80074b4: 08007519 .word 0x08007519
80074b8: 08007523 .word 0x08007523
80074bc: 0800750f .word 0x0800750f
80074c0: 08007523 .word 0x08007523
80074c4: 080074e3 .word 0x080074e3
80074c8: 080074d9 .word 0x080074d9
80074cc: 08007523 .word 0x08007523
80074d0: 080074fb .word 0x080074fb
80074d4: 080074ed .word 0x080074ed
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
80074d8: 6839 ldr r1, [r7, #0]
80074da: 6878 ldr r0, [r7, #4]
80074dc: f000 fa3e bl 800795c <USBD_GetDescriptor>
break;
80074e0: e024 b.n 800752c <USBD_StdDevReq+0xcc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
80074e2: 6839 ldr r1, [r7, #0]
80074e4: 6878 ldr r0, [r7, #4]
80074e6: f000 fbcd bl 8007c84 <USBD_SetAddress>
break;
80074ea: e01f b.n 800752c <USBD_StdDevReq+0xcc>
case USB_REQ_SET_CONFIGURATION:
ret = USBD_SetConfig(pdev, req);
80074ec: 6839 ldr r1, [r7, #0]
80074ee: 6878 ldr r0, [r7, #4]
80074f0: f000 fc0c bl 8007d0c <USBD_SetConfig>
80074f4: 4603 mov r3, r0
80074f6: 73fb strb r3, [r7, #15]
break;
80074f8: e018 b.n 800752c <USBD_StdDevReq+0xcc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
80074fa: 6839 ldr r1, [r7, #0]
80074fc: 6878 ldr r0, [r7, #4]
80074fe: f000 fcaf bl 8007e60 <USBD_GetConfig>
break;
8007502: e013 b.n 800752c <USBD_StdDevReq+0xcc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
8007504: 6839 ldr r1, [r7, #0]
8007506: 6878 ldr r0, [r7, #4]
8007508: f000 fce0 bl 8007ecc <USBD_GetStatus>
break;
800750c: e00e b.n 800752c <USBD_StdDevReq+0xcc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800750e: 6839 ldr r1, [r7, #0]
8007510: 6878 ldr r0, [r7, #4]
8007512: f000 fd0f bl 8007f34 <USBD_SetFeature>
break;
8007516: e009 b.n 800752c <USBD_StdDevReq+0xcc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
8007518: 6839 ldr r1, [r7, #0]
800751a: 6878 ldr r0, [r7, #4]
800751c: f000 fd33 bl 8007f86 <USBD_ClrFeature>
break;
8007520: e004 b.n 800752c <USBD_StdDevReq+0xcc>
default:
USBD_CtlError(pdev, req);
8007522: 6839 ldr r1, [r7, #0]
8007524: 6878 ldr r0, [r7, #4]
8007526: f000 fd8a bl 800803e <USBD_CtlError>
break;
800752a: bf00 nop
}
break;
800752c: e004 b.n 8007538 <USBD_StdDevReq+0xd8>
default:
USBD_CtlError(pdev, req);
800752e: 6839 ldr r1, [r7, #0]
8007530: 6878 ldr r0, [r7, #4]
8007532: f000 fd84 bl 800803e <USBD_CtlError>
break;
8007536: bf00 nop
}
return ret;
8007538: 7bfb ldrb r3, [r7, #15]
}
800753a: 4618 mov r0, r3
800753c: 3710 adds r7, #16
800753e: 46bd mov sp, r7
8007540: bd80 pop {r7, pc}
8007542: bf00 nop
08007544 <USBD_StdItfReq>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007544: b580 push {r7, lr}
8007546: b084 sub sp, #16
8007548: af00 add r7, sp, #0
800754a: 6078 str r0, [r7, #4]
800754c: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800754e: 2300 movs r3, #0
8007550: 73fb strb r3, [r7, #15]
uint8_t idx;
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007552: 683b ldr r3, [r7, #0]
8007554: 781b ldrb r3, [r3, #0]
8007556: f003 0360 and.w r3, r3, #96 @ 0x60
800755a: 2b40 cmp r3, #64 @ 0x40
800755c: d005 beq.n 800756a <USBD_StdItfReq+0x26>
800755e: 2b40 cmp r3, #64 @ 0x40
8007560: d852 bhi.n 8007608 <USBD_StdItfReq+0xc4>
8007562: 2b00 cmp r3, #0
8007564: d001 beq.n 800756a <USBD_StdItfReq+0x26>
8007566: 2b20 cmp r3, #32
8007568: d14e bne.n 8007608 <USBD_StdItfReq+0xc4>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800756a: 687b ldr r3, [r7, #4]
800756c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007570: b2db uxtb r3, r3
8007572: 3b01 subs r3, #1
8007574: 2b02 cmp r3, #2
8007576: d840 bhi.n 80075fa <USBD_StdItfReq+0xb6>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
8007578: 683b ldr r3, [r7, #0]
800757a: 889b ldrh r3, [r3, #4]
800757c: b2db uxtb r3, r3
800757e: 2b01 cmp r3, #1
8007580: d836 bhi.n 80075f0 <USBD_StdItfReq+0xac>
{
/* Get the class index relative to this interface */
idx = USBD_CoreFindIF(pdev, LOBYTE(req->wIndex));
8007582: 683b ldr r3, [r7, #0]
8007584: 889b ldrh r3, [r3, #4]
8007586: b2db uxtb r3, r3
8007588: 4619 mov r1, r3
800758a: 6878 ldr r0, [r7, #4]
800758c: f7ff feda bl 8007344 <USBD_CoreFindIF>
8007590: 4603 mov r3, r0
8007592: 73bb strb r3, [r7, #14]
if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS))
8007594: 7bbb ldrb r3, [r7, #14]
8007596: 2bff cmp r3, #255 @ 0xff
8007598: d01d beq.n 80075d6 <USBD_StdItfReq+0x92>
800759a: 7bbb ldrb r3, [r7, #14]
800759c: 2b00 cmp r3, #0
800759e: d11a bne.n 80075d6 <USBD_StdItfReq+0x92>
{
/* Call the class data out function to manage the request */
if (pdev->pClass[idx]->Setup != NULL)
80075a0: 7bba ldrb r2, [r7, #14]
80075a2: 687b ldr r3, [r7, #4]
80075a4: 32ae adds r2, #174 @ 0xae
80075a6: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80075aa: 689b ldr r3, [r3, #8]
80075ac: 2b00 cmp r3, #0
80075ae: d00f beq.n 80075d0 <USBD_StdItfReq+0x8c>
{
pdev->classId = idx;
80075b0: 7bba ldrb r2, [r7, #14]
80075b2: 687b ldr r3, [r7, #4]
80075b4: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
ret = (USBD_StatusTypeDef)(pdev->pClass[idx]->Setup(pdev, req));
80075b8: 7bba ldrb r2, [r7, #14]
80075ba: 687b ldr r3, [r7, #4]
80075bc: 32ae adds r2, #174 @ 0xae
80075be: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80075c2: 689b ldr r3, [r3, #8]
80075c4: 6839 ldr r1, [r7, #0]
80075c6: 6878 ldr r0, [r7, #4]
80075c8: 4798 blx r3
80075ca: 4603 mov r3, r0
80075cc: 73fb strb r3, [r7, #15]
if (pdev->pClass[idx]->Setup != NULL)
80075ce: e004 b.n 80075da <USBD_StdItfReq+0x96>
}
else
{
/* should never reach this condition */
ret = USBD_FAIL;
80075d0: 2303 movs r3, #3
80075d2: 73fb strb r3, [r7, #15]
if (pdev->pClass[idx]->Setup != NULL)
80075d4: e001 b.n 80075da <USBD_StdItfReq+0x96>
}
}
else
{
/* No relative interface found */
ret = USBD_FAIL;
80075d6: 2303 movs r3, #3
80075d8: 73fb strb r3, [r7, #15]
}
if ((req->wLength == 0U) && (ret == USBD_OK))
80075da: 683b ldr r3, [r7, #0]
80075dc: 88db ldrh r3, [r3, #6]
80075de: 2b00 cmp r3, #0
80075e0: d110 bne.n 8007604 <USBD_StdItfReq+0xc0>
80075e2: 7bfb ldrb r3, [r7, #15]
80075e4: 2b00 cmp r3, #0
80075e6: d10d bne.n 8007604 <USBD_StdItfReq+0xc0>
{
(void)USBD_CtlSendStatus(pdev);
80075e8: 6878 ldr r0, [r7, #4]
80075ea: f000 fde5 bl 80081b8 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
80075ee: e009 b.n 8007604 <USBD_StdItfReq+0xc0>
USBD_CtlError(pdev, req);
80075f0: 6839 ldr r1, [r7, #0]
80075f2: 6878 ldr r0, [r7, #4]
80075f4: f000 fd23 bl 800803e <USBD_CtlError>
break;
80075f8: e004 b.n 8007604 <USBD_StdItfReq+0xc0>
default:
USBD_CtlError(pdev, req);
80075fa: 6839 ldr r1, [r7, #0]
80075fc: 6878 ldr r0, [r7, #4]
80075fe: f000 fd1e bl 800803e <USBD_CtlError>
break;
8007602: e000 b.n 8007606 <USBD_StdItfReq+0xc2>
break;
8007604: bf00 nop
}
break;
8007606: e004 b.n 8007612 <USBD_StdItfReq+0xce>
default:
USBD_CtlError(pdev, req);
8007608: 6839 ldr r1, [r7, #0]
800760a: 6878 ldr r0, [r7, #4]
800760c: f000 fd17 bl 800803e <USBD_CtlError>
break;
8007610: bf00 nop
}
return ret;
8007612: 7bfb ldrb r3, [r7, #15]
}
8007614: 4618 mov r0, r3
8007616: 3710 adds r7, #16
8007618: 46bd mov sp, r7
800761a: bd80 pop {r7, pc}
0800761c <USBD_StdEPReq>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800761c: b580 push {r7, lr}
800761e: b084 sub sp, #16
8007620: af00 add r7, sp, #0
8007622: 6078 str r0, [r7, #4]
8007624: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
uint8_t idx;
USBD_StatusTypeDef ret = USBD_OK;
8007626: 2300 movs r3, #0
8007628: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800762a: 683b ldr r3, [r7, #0]
800762c: 889b ldrh r3, [r3, #4]
800762e: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007630: 683b ldr r3, [r7, #0]
8007632: 781b ldrb r3, [r3, #0]
8007634: f003 0360 and.w r3, r3, #96 @ 0x60
8007638: 2b40 cmp r3, #64 @ 0x40
800763a: d007 beq.n 800764c <USBD_StdEPReq+0x30>
800763c: 2b40 cmp r3, #64 @ 0x40
800763e: f200 8181 bhi.w 8007944 <USBD_StdEPReq+0x328>
8007642: 2b00 cmp r3, #0
8007644: d02a beq.n 800769c <USBD_StdEPReq+0x80>
8007646: 2b20 cmp r3, #32
8007648: f040 817c bne.w 8007944 <USBD_StdEPReq+0x328>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
/* Get the class index relative to this endpoint */
idx = USBD_CoreFindEP(pdev, ep_addr);
800764c: 7bbb ldrb r3, [r7, #14]
800764e: 4619 mov r1, r3
8007650: 6878 ldr r0, [r7, #4]
8007652: f7ff fe84 bl 800735e <USBD_CoreFindEP>
8007656: 4603 mov r3, r0
8007658: 737b strb r3, [r7, #13]
if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS))
800765a: 7b7b ldrb r3, [r7, #13]
800765c: 2bff cmp r3, #255 @ 0xff
800765e: f000 8176 beq.w 800794e <USBD_StdEPReq+0x332>
8007662: 7b7b ldrb r3, [r7, #13]
8007664: 2b00 cmp r3, #0
8007666: f040 8172 bne.w 800794e <USBD_StdEPReq+0x332>
{
pdev->classId = idx;
800766a: 7b7a ldrb r2, [r7, #13]
800766c: 687b ldr r3, [r7, #4]
800766e: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
/* Call the class data out function to manage the request */
if (pdev->pClass[idx]->Setup != NULL)
8007672: 7b7a ldrb r2, [r7, #13]
8007674: 687b ldr r3, [r7, #4]
8007676: 32ae adds r2, #174 @ 0xae
8007678: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800767c: 689b ldr r3, [r3, #8]
800767e: 2b00 cmp r3, #0
8007680: f000 8165 beq.w 800794e <USBD_StdEPReq+0x332>
{
ret = (USBD_StatusTypeDef)pdev->pClass[idx]->Setup(pdev, req);
8007684: 7b7a ldrb r2, [r7, #13]
8007686: 687b ldr r3, [r7, #4]
8007688: 32ae adds r2, #174 @ 0xae
800768a: f853 3022 ldr.w r3, [r3, r2, lsl #2]
800768e: 689b ldr r3, [r3, #8]
8007690: 6839 ldr r1, [r7, #0]
8007692: 6878 ldr r0, [r7, #4]
8007694: 4798 blx r3
8007696: 4603 mov r3, r0
8007698: 73fb strb r3, [r7, #15]
}
}
break;
800769a: e158 b.n 800794e <USBD_StdEPReq+0x332>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800769c: 683b ldr r3, [r7, #0]
800769e: 785b ldrb r3, [r3, #1]
80076a0: 2b03 cmp r3, #3
80076a2: d008 beq.n 80076b6 <USBD_StdEPReq+0x9a>
80076a4: 2b03 cmp r3, #3
80076a6: f300 8147 bgt.w 8007938 <USBD_StdEPReq+0x31c>
80076aa: 2b00 cmp r3, #0
80076ac: f000 809b beq.w 80077e6 <USBD_StdEPReq+0x1ca>
80076b0: 2b01 cmp r3, #1
80076b2: d03c beq.n 800772e <USBD_StdEPReq+0x112>
80076b4: e140 b.n 8007938 <USBD_StdEPReq+0x31c>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
80076b6: 687b ldr r3, [r7, #4]
80076b8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80076bc: b2db uxtb r3, r3
80076be: 2b02 cmp r3, #2
80076c0: d002 beq.n 80076c8 <USBD_StdEPReq+0xac>
80076c2: 2b03 cmp r3, #3
80076c4: d016 beq.n 80076f4 <USBD_StdEPReq+0xd8>
80076c6: e02c b.n 8007722 <USBD_StdEPReq+0x106>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
80076c8: 7bbb ldrb r3, [r7, #14]
80076ca: 2b00 cmp r3, #0
80076cc: d00d beq.n 80076ea <USBD_StdEPReq+0xce>
80076ce: 7bbb ldrb r3, [r7, #14]
80076d0: 2b80 cmp r3, #128 @ 0x80
80076d2: d00a beq.n 80076ea <USBD_StdEPReq+0xce>
{
(void)USBD_LL_StallEP(pdev, ep_addr);
80076d4: 7bbb ldrb r3, [r7, #14]
80076d6: 4619 mov r1, r3
80076d8: 6878 ldr r0, [r7, #4]
80076da: f001 f8e3 bl 80088a4 <USBD_LL_StallEP>
(void)USBD_LL_StallEP(pdev, 0x80U);
80076de: 2180 movs r1, #128 @ 0x80
80076e0: 6878 ldr r0, [r7, #4]
80076e2: f001 f8df bl 80088a4 <USBD_LL_StallEP>
80076e6: bf00 nop
}
else
{
USBD_CtlError(pdev, req);
}
break;
80076e8: e020 b.n 800772c <USBD_StdEPReq+0x110>
USBD_CtlError(pdev, req);
80076ea: 6839 ldr r1, [r7, #0]
80076ec: 6878 ldr r0, [r7, #4]
80076ee: f000 fca6 bl 800803e <USBD_CtlError>
break;
80076f2: e01b b.n 800772c <USBD_StdEPReq+0x110>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
80076f4: 683b ldr r3, [r7, #0]
80076f6: 885b ldrh r3, [r3, #2]
80076f8: 2b00 cmp r3, #0
80076fa: d10e bne.n 800771a <USBD_StdEPReq+0xfe>
{
if ((ep_addr != 0x00U) && (ep_addr != 0x80U) && (req->wLength == 0x00U))
80076fc: 7bbb ldrb r3, [r7, #14]
80076fe: 2b00 cmp r3, #0
8007700: d00b beq.n 800771a <USBD_StdEPReq+0xfe>
8007702: 7bbb ldrb r3, [r7, #14]
8007704: 2b80 cmp r3, #128 @ 0x80
8007706: d008 beq.n 800771a <USBD_StdEPReq+0xfe>
8007708: 683b ldr r3, [r7, #0]
800770a: 88db ldrh r3, [r3, #6]
800770c: 2b00 cmp r3, #0
800770e: d104 bne.n 800771a <USBD_StdEPReq+0xfe>
{
(void)USBD_LL_StallEP(pdev, ep_addr);
8007710: 7bbb ldrb r3, [r7, #14]
8007712: 4619 mov r1, r3
8007714: 6878 ldr r0, [r7, #4]
8007716: f001 f8c5 bl 80088a4 <USBD_LL_StallEP>
}
}
(void)USBD_CtlSendStatus(pdev);
800771a: 6878 ldr r0, [r7, #4]
800771c: f000 fd4c bl 80081b8 <USBD_CtlSendStatus>
break;
8007720: e004 b.n 800772c <USBD_StdEPReq+0x110>
default:
USBD_CtlError(pdev, req);
8007722: 6839 ldr r1, [r7, #0]
8007724: 6878 ldr r0, [r7, #4]
8007726: f000 fc8a bl 800803e <USBD_CtlError>
break;
800772a: bf00 nop
}
break;
800772c: e109 b.n 8007942 <USBD_StdEPReq+0x326>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800772e: 687b ldr r3, [r7, #4]
8007730: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007734: b2db uxtb r3, r3
8007736: 2b02 cmp r3, #2
8007738: d002 beq.n 8007740 <USBD_StdEPReq+0x124>
800773a: 2b03 cmp r3, #3
800773c: d016 beq.n 800776c <USBD_StdEPReq+0x150>
800773e: e04b b.n 80077d8 <USBD_StdEPReq+0x1bc>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8007740: 7bbb ldrb r3, [r7, #14]
8007742: 2b00 cmp r3, #0
8007744: d00d beq.n 8007762 <USBD_StdEPReq+0x146>
8007746: 7bbb ldrb r3, [r7, #14]
8007748: 2b80 cmp r3, #128 @ 0x80
800774a: d00a beq.n 8007762 <USBD_StdEPReq+0x146>
{
(void)USBD_LL_StallEP(pdev, ep_addr);
800774c: 7bbb ldrb r3, [r7, #14]
800774e: 4619 mov r1, r3
8007750: 6878 ldr r0, [r7, #4]
8007752: f001 f8a7 bl 80088a4 <USBD_LL_StallEP>
(void)USBD_LL_StallEP(pdev, 0x80U);
8007756: 2180 movs r1, #128 @ 0x80
8007758: 6878 ldr r0, [r7, #4]
800775a: f001 f8a3 bl 80088a4 <USBD_LL_StallEP>
800775e: bf00 nop
}
else
{
USBD_CtlError(pdev, req);
}
break;
8007760: e040 b.n 80077e4 <USBD_StdEPReq+0x1c8>
USBD_CtlError(pdev, req);
8007762: 6839 ldr r1, [r7, #0]
8007764: 6878 ldr r0, [r7, #4]
8007766: f000 fc6a bl 800803e <USBD_CtlError>
break;
800776a: e03b b.n 80077e4 <USBD_StdEPReq+0x1c8>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800776c: 683b ldr r3, [r7, #0]
800776e: 885b ldrh r3, [r3, #2]
8007770: 2b00 cmp r3, #0
8007772: d136 bne.n 80077e2 <USBD_StdEPReq+0x1c6>
{
if ((ep_addr & 0x7FU) != 0x00U)
8007774: 7bbb ldrb r3, [r7, #14]
8007776: f003 037f and.w r3, r3, #127 @ 0x7f
800777a: 2b00 cmp r3, #0
800777c: d004 beq.n 8007788 <USBD_StdEPReq+0x16c>
{
(void)USBD_LL_ClearStallEP(pdev, ep_addr);
800777e: 7bbb ldrb r3, [r7, #14]
8007780: 4619 mov r1, r3
8007782: 6878 ldr r0, [r7, #4]
8007784: f001 f8ad bl 80088e2 <USBD_LL_ClearStallEP>
}
(void)USBD_CtlSendStatus(pdev);
8007788: 6878 ldr r0, [r7, #4]
800778a: f000 fd15 bl 80081b8 <USBD_CtlSendStatus>
/* Get the class index relative to this interface */
idx = USBD_CoreFindEP(pdev, ep_addr);
800778e: 7bbb ldrb r3, [r7, #14]
8007790: 4619 mov r1, r3
8007792: 6878 ldr r0, [r7, #4]
8007794: f7ff fde3 bl 800735e <USBD_CoreFindEP>
8007798: 4603 mov r3, r0
800779a: 737b strb r3, [r7, #13]
if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS))
800779c: 7b7b ldrb r3, [r7, #13]
800779e: 2bff cmp r3, #255 @ 0xff
80077a0: d01f beq.n 80077e2 <USBD_StdEPReq+0x1c6>
80077a2: 7b7b ldrb r3, [r7, #13]
80077a4: 2b00 cmp r3, #0
80077a6: d11c bne.n 80077e2 <USBD_StdEPReq+0x1c6>
{
pdev->classId = idx;
80077a8: 7b7a ldrb r2, [r7, #13]
80077aa: 687b ldr r3, [r7, #4]
80077ac: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4
/* Call the class data out function to manage the request */
if (pdev->pClass[idx]->Setup != NULL)
80077b0: 7b7a ldrb r2, [r7, #13]
80077b2: 687b ldr r3, [r7, #4]
80077b4: 32ae adds r2, #174 @ 0xae
80077b6: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80077ba: 689b ldr r3, [r3, #8]
80077bc: 2b00 cmp r3, #0
80077be: d010 beq.n 80077e2 <USBD_StdEPReq+0x1c6>
{
ret = (USBD_StatusTypeDef)(pdev->pClass[idx]->Setup(pdev, req));
80077c0: 7b7a ldrb r2, [r7, #13]
80077c2: 687b ldr r3, [r7, #4]
80077c4: 32ae adds r2, #174 @ 0xae
80077c6: f853 3022 ldr.w r3, [r3, r2, lsl #2]
80077ca: 689b ldr r3, [r3, #8]
80077cc: 6839 ldr r1, [r7, #0]
80077ce: 6878 ldr r0, [r7, #4]
80077d0: 4798 blx r3
80077d2: 4603 mov r3, r0
80077d4: 73fb strb r3, [r7, #15]
}
}
}
break;
80077d6: e004 b.n 80077e2 <USBD_StdEPReq+0x1c6>
default:
USBD_CtlError(pdev, req);
80077d8: 6839 ldr r1, [r7, #0]
80077da: 6878 ldr r0, [r7, #4]
80077dc: f000 fc2f bl 800803e <USBD_CtlError>
break;
80077e0: e000 b.n 80077e4 <USBD_StdEPReq+0x1c8>
break;
80077e2: bf00 nop
}
break;
80077e4: e0ad b.n 8007942 <USBD_StdEPReq+0x326>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
80077e6: 687b ldr r3, [r7, #4]
80077e8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80077ec: b2db uxtb r3, r3
80077ee: 2b02 cmp r3, #2
80077f0: d002 beq.n 80077f8 <USBD_StdEPReq+0x1dc>
80077f2: 2b03 cmp r3, #3
80077f4: d033 beq.n 800785e <USBD_StdEPReq+0x242>
80077f6: e099 b.n 800792c <USBD_StdEPReq+0x310>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
80077f8: 7bbb ldrb r3, [r7, #14]
80077fa: 2b00 cmp r3, #0
80077fc: d007 beq.n 800780e <USBD_StdEPReq+0x1f2>
80077fe: 7bbb ldrb r3, [r7, #14]
8007800: 2b80 cmp r3, #128 @ 0x80
8007802: d004 beq.n 800780e <USBD_StdEPReq+0x1f2>
{
USBD_CtlError(pdev, req);
8007804: 6839 ldr r1, [r7, #0]
8007806: 6878 ldr r0, [r7, #4]
8007808: f000 fc19 bl 800803e <USBD_CtlError>
break;
800780c: e093 b.n 8007936 <USBD_StdEPReq+0x31a>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800780e: f997 300e ldrsb.w r3, [r7, #14]
8007812: 2b00 cmp r3, #0
8007814: da0b bge.n 800782e <USBD_StdEPReq+0x212>
8007816: 7bbb ldrb r3, [r7, #14]
8007818: f003 027f and.w r2, r3, #127 @ 0x7f
800781c: 4613 mov r3, r2
800781e: 009b lsls r3, r3, #2
8007820: 4413 add r3, r2
8007822: 009b lsls r3, r3, #2
8007824: 3310 adds r3, #16
8007826: 687a ldr r2, [r7, #4]
8007828: 4413 add r3, r2
800782a: 3304 adds r3, #4
800782c: e00b b.n 8007846 <USBD_StdEPReq+0x22a>
&pdev->ep_out[ep_addr & 0x7FU];
800782e: 7bbb ldrb r3, [r7, #14]
8007830: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8007834: 4613 mov r3, r2
8007836: 009b lsls r3, r3, #2
8007838: 4413 add r3, r2
800783a: 009b lsls r3, r3, #2
800783c: f503 73a8 add.w r3, r3, #336 @ 0x150
8007840: 687a ldr r2, [r7, #4]
8007842: 4413 add r3, r2
8007844: 3304 adds r3, #4
8007846: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
8007848: 68bb ldr r3, [r7, #8]
800784a: 2200 movs r2, #0
800784c: 739a strb r2, [r3, #14]
(void)USBD_CtlSendData(pdev, (uint8_t *)&pep->status, 2U);
800784e: 68bb ldr r3, [r7, #8]
8007850: 330e adds r3, #14
8007852: 2202 movs r2, #2
8007854: 4619 mov r1, r3
8007856: 6878 ldr r0, [r7, #4]
8007858: f000 fc6e bl 8008138 <USBD_CtlSendData>
break;
800785c: e06b b.n 8007936 <USBD_StdEPReq+0x31a>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
800785e: f997 300e ldrsb.w r3, [r7, #14]
8007862: 2b00 cmp r3, #0
8007864: da11 bge.n 800788a <USBD_StdEPReq+0x26e>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
8007866: 7bbb ldrb r3, [r7, #14]
8007868: f003 020f and.w r2, r3, #15
800786c: 6879 ldr r1, [r7, #4]
800786e: 4613 mov r3, r2
8007870: 009b lsls r3, r3, #2
8007872: 4413 add r3, r2
8007874: 009b lsls r3, r3, #2
8007876: 440b add r3, r1
8007878: 3323 adds r3, #35 @ 0x23
800787a: 781b ldrb r3, [r3, #0]
800787c: 2b00 cmp r3, #0
800787e: d117 bne.n 80078b0 <USBD_StdEPReq+0x294>
{
USBD_CtlError(pdev, req);
8007880: 6839 ldr r1, [r7, #0]
8007882: 6878 ldr r0, [r7, #4]
8007884: f000 fbdb bl 800803e <USBD_CtlError>
break;
8007888: e055 b.n 8007936 <USBD_StdEPReq+0x31a>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800788a: 7bbb ldrb r3, [r7, #14]
800788c: f003 020f and.w r2, r3, #15
8007890: 6879 ldr r1, [r7, #4]
8007892: 4613 mov r3, r2
8007894: 009b lsls r3, r3, #2
8007896: 4413 add r3, r2
8007898: 009b lsls r3, r3, #2
800789a: 440b add r3, r1
800789c: f203 1363 addw r3, r3, #355 @ 0x163
80078a0: 781b ldrb r3, [r3, #0]
80078a2: 2b00 cmp r3, #0
80078a4: d104 bne.n 80078b0 <USBD_StdEPReq+0x294>
{
USBD_CtlError(pdev, req);
80078a6: 6839 ldr r1, [r7, #0]
80078a8: 6878 ldr r0, [r7, #4]
80078aa: f000 fbc8 bl 800803e <USBD_CtlError>
break;
80078ae: e042 b.n 8007936 <USBD_StdEPReq+0x31a>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
80078b0: f997 300e ldrsb.w r3, [r7, #14]
80078b4: 2b00 cmp r3, #0
80078b6: da0b bge.n 80078d0 <USBD_StdEPReq+0x2b4>
80078b8: 7bbb ldrb r3, [r7, #14]
80078ba: f003 027f and.w r2, r3, #127 @ 0x7f
80078be: 4613 mov r3, r2
80078c0: 009b lsls r3, r3, #2
80078c2: 4413 add r3, r2
80078c4: 009b lsls r3, r3, #2
80078c6: 3310 adds r3, #16
80078c8: 687a ldr r2, [r7, #4]
80078ca: 4413 add r3, r2
80078cc: 3304 adds r3, #4
80078ce: e00b b.n 80078e8 <USBD_StdEPReq+0x2cc>
&pdev->ep_out[ep_addr & 0x7FU];
80078d0: 7bbb ldrb r3, [r7, #14]
80078d2: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
80078d6: 4613 mov r3, r2
80078d8: 009b lsls r3, r3, #2
80078da: 4413 add r3, r2
80078dc: 009b lsls r3, r3, #2
80078de: f503 73a8 add.w r3, r3, #336 @ 0x150
80078e2: 687a ldr r2, [r7, #4]
80078e4: 4413 add r3, r2
80078e6: 3304 adds r3, #4
80078e8: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
80078ea: 7bbb ldrb r3, [r7, #14]
80078ec: 2b00 cmp r3, #0
80078ee: d002 beq.n 80078f6 <USBD_StdEPReq+0x2da>
80078f0: 7bbb ldrb r3, [r7, #14]
80078f2: 2b80 cmp r3, #128 @ 0x80
80078f4: d103 bne.n 80078fe <USBD_StdEPReq+0x2e2>
{
pep->status = 0x0000U;
80078f6: 68bb ldr r3, [r7, #8]
80078f8: 2200 movs r2, #0
80078fa: 739a strb r2, [r3, #14]
80078fc: e00e b.n 800791c <USBD_StdEPReq+0x300>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr) != 0U)
80078fe: 7bbb ldrb r3, [r7, #14]
8007900: 4619 mov r1, r3
8007902: 6878 ldr r0, [r7, #4]
8007904: f001 f80c bl 8008920 <USBD_LL_IsStallEP>
8007908: 4603 mov r3, r0
800790a: 2b00 cmp r3, #0
800790c: d003 beq.n 8007916 <USBD_StdEPReq+0x2fa>
{
pep->status = 0x0001U;
800790e: 68bb ldr r3, [r7, #8]
8007910: 2201 movs r2, #1
8007912: 739a strb r2, [r3, #14]
8007914: e002 b.n 800791c <USBD_StdEPReq+0x300>
}
else
{
pep->status = 0x0000U;
8007916: 68bb ldr r3, [r7, #8]
8007918: 2200 movs r2, #0
800791a: 739a strb r2, [r3, #14]
}
(void)USBD_CtlSendData(pdev, (uint8_t *)&pep->status, 2U);
800791c: 68bb ldr r3, [r7, #8]
800791e: 330e adds r3, #14
8007920: 2202 movs r2, #2
8007922: 4619 mov r1, r3
8007924: 6878 ldr r0, [r7, #4]
8007926: f000 fc07 bl 8008138 <USBD_CtlSendData>
break;
800792a: e004 b.n 8007936 <USBD_StdEPReq+0x31a>
default:
USBD_CtlError(pdev, req);
800792c: 6839 ldr r1, [r7, #0]
800792e: 6878 ldr r0, [r7, #4]
8007930: f000 fb85 bl 800803e <USBD_CtlError>
break;
8007934: bf00 nop
}
break;
8007936: e004 b.n 8007942 <USBD_StdEPReq+0x326>
default:
USBD_CtlError(pdev, req);
8007938: 6839 ldr r1, [r7, #0]
800793a: 6878 ldr r0, [r7, #4]
800793c: f000 fb7f bl 800803e <USBD_CtlError>
break;
8007940: bf00 nop
}
break;
8007942: e005 b.n 8007950 <USBD_StdEPReq+0x334>
default:
USBD_CtlError(pdev, req);
8007944: 6839 ldr r1, [r7, #0]
8007946: 6878 ldr r0, [r7, #4]
8007948: f000 fb79 bl 800803e <USBD_CtlError>
break;
800794c: e000 b.n 8007950 <USBD_StdEPReq+0x334>
break;
800794e: bf00 nop
}
return ret;
8007950: 7bfb ldrb r3, [r7, #15]
}
8007952: 4618 mov r0, r3
8007954: 3710 adds r7, #16
8007956: 46bd mov sp, r7
8007958: bd80 pop {r7, pc}
...
0800795c <USBD_GetDescriptor>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800795c: b580 push {r7, lr}
800795e: b084 sub sp, #16
8007960: af00 add r7, sp, #0
8007962: 6078 str r0, [r7, #4]
8007964: 6039 str r1, [r7, #0]
uint16_t len = 0U;
8007966: 2300 movs r3, #0
8007968: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800796a: 2300 movs r3, #0
800796c: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800796e: 2300 movs r3, #0
8007970: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
8007972: 683b ldr r3, [r7, #0]
8007974: 885b ldrh r3, [r3, #2]
8007976: 0a1b lsrs r3, r3, #8
8007978: b29b uxth r3, r3
800797a: 3b01 subs r3, #1
800797c: 2b0e cmp r3, #14
800797e: f200 8152 bhi.w 8007c26 <USBD_GetDescriptor+0x2ca>
8007982: a201 add r2, pc, #4 @ (adr r2, 8007988 <USBD_GetDescriptor+0x2c>)
8007984: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007988: 080079f9 .word 0x080079f9
800798c: 08007a11 .word 0x08007a11
8007990: 08007a51 .word 0x08007a51
8007994: 08007c27 .word 0x08007c27
8007998: 08007c27 .word 0x08007c27
800799c: 08007bc7 .word 0x08007bc7
80079a0: 08007bf3 .word 0x08007bf3
80079a4: 08007c27 .word 0x08007c27
80079a8: 08007c27 .word 0x08007c27
80079ac: 08007c27 .word 0x08007c27
80079b0: 08007c27 .word 0x08007c27
80079b4: 08007c27 .word 0x08007c27
80079b8: 08007c27 .word 0x08007c27
80079bc: 08007c27 .word 0x08007c27
80079c0: 080079c5 .word 0x080079c5
{
#if ((USBD_LPM_ENABLED == 1U) || (USBD_CLASS_BOS_ENABLED == 1U))
case USB_DESC_TYPE_BOS:
if (pdev->pDesc->GetBOSDescriptor != NULL)
80079c4: 687b ldr r3, [r7, #4]
80079c6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80079ca: 69db ldr r3, [r3, #28]
80079cc: 2b00 cmp r3, #0
80079ce: d00b beq.n 80079e8 <USBD_GetDescriptor+0x8c>
{
pbuf = pdev->pDesc->GetBOSDescriptor(pdev->dev_speed, &len);
80079d0: 687b ldr r3, [r7, #4]
80079d2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80079d6: 69db ldr r3, [r3, #28]
80079d8: 687a ldr r2, [r7, #4]
80079da: 7c12 ldrb r2, [r2, #16]
80079dc: f107 0108 add.w r1, r7, #8
80079e0: 4610 mov r0, r2
80079e2: 4798 blx r3
80079e4: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80079e6: e126 b.n 8007c36 <USBD_GetDescriptor+0x2da>
USBD_CtlError(pdev, req);
80079e8: 6839 ldr r1, [r7, #0]
80079ea: 6878 ldr r0, [r7, #4]
80079ec: f000 fb27 bl 800803e <USBD_CtlError>
err++;
80079f0: 7afb ldrb r3, [r7, #11]
80079f2: 3301 adds r3, #1
80079f4: 72fb strb r3, [r7, #11]
break;
80079f6: e11e b.n 8007c36 <USBD_GetDescriptor+0x2da>
#endif /* (USBD_LPM_ENABLED == 1U) || (USBD_CLASS_BOS_ENABLED == 1U) */
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
80079f8: 687b ldr r3, [r7, #4]
80079fa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80079fe: 681b ldr r3, [r3, #0]
8007a00: 687a ldr r2, [r7, #4]
8007a02: 7c12 ldrb r2, [r2, #16]
8007a04: f107 0108 add.w r1, r7, #8
8007a08: 4610 mov r0, r2
8007a0a: 4798 blx r3
8007a0c: 60f8 str r0, [r7, #12]
break;
8007a0e: e112 b.n 8007c36 <USBD_GetDescriptor+0x2da>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007a10: 687b ldr r3, [r7, #4]
8007a12: 7c1b ldrb r3, [r3, #16]
8007a14: 2b00 cmp r3, #0
8007a16: d10d bne.n 8007a34 <USBD_GetDescriptor+0xd8>
pbuf = (uint8_t *)USBD_CMPSIT.GetHSConfigDescriptor(&len);
}
else
#endif /* USE_USBD_COMPOSITE */
{
pbuf = (uint8_t *)pdev->pClass[0]->GetHSConfigDescriptor(&len);
8007a18: 687b ldr r3, [r7, #4]
8007a1a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007a1e: 6a9b ldr r3, [r3, #40] @ 0x28
8007a20: f107 0208 add.w r2, r7, #8
8007a24: 4610 mov r0, r2
8007a26: 4798 blx r3
8007a28: 60f8 str r0, [r7, #12]
}
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8007a2a: 68fb ldr r3, [r7, #12]
8007a2c: 3301 adds r3, #1
8007a2e: 2202 movs r2, #2
8007a30: 701a strb r2, [r3, #0]
{
pbuf = (uint8_t *)pdev->pClass[0]->GetFSConfigDescriptor(&len);
}
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
8007a32: e100 b.n 8007c36 <USBD_GetDescriptor+0x2da>
pbuf = (uint8_t *)pdev->pClass[0]->GetFSConfigDescriptor(&len);
8007a34: 687b ldr r3, [r7, #4]
8007a36: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007a3a: 6adb ldr r3, [r3, #44] @ 0x2c
8007a3c: f107 0208 add.w r2, r7, #8
8007a40: 4610 mov r0, r2
8007a42: 4798 blx r3
8007a44: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8007a46: 68fb ldr r3, [r7, #12]
8007a48: 3301 adds r3, #1
8007a4a: 2202 movs r2, #2
8007a4c: 701a strb r2, [r3, #0]
break;
8007a4e: e0f2 b.n 8007c36 <USBD_GetDescriptor+0x2da>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
8007a50: 683b ldr r3, [r7, #0]
8007a52: 885b ldrh r3, [r3, #2]
8007a54: b2db uxtb r3, r3
8007a56: 2b05 cmp r3, #5
8007a58: f200 80ac bhi.w 8007bb4 <USBD_GetDescriptor+0x258>
8007a5c: a201 add r2, pc, #4 @ (adr r2, 8007a64 <USBD_GetDescriptor+0x108>)
8007a5e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007a62: bf00 nop
8007a64: 08007a7d .word 0x08007a7d
8007a68: 08007ab1 .word 0x08007ab1
8007a6c: 08007ae5 .word 0x08007ae5
8007a70: 08007b19 .word 0x08007b19
8007a74: 08007b4d .word 0x08007b4d
8007a78: 08007b81 .word 0x08007b81
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
8007a7c: 687b ldr r3, [r7, #4]
8007a7e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007a82: 685b ldr r3, [r3, #4]
8007a84: 2b00 cmp r3, #0
8007a86: d00b beq.n 8007aa0 <USBD_GetDescriptor+0x144>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
8007a88: 687b ldr r3, [r7, #4]
8007a8a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007a8e: 685b ldr r3, [r3, #4]
8007a90: 687a ldr r2, [r7, #4]
8007a92: 7c12 ldrb r2, [r2, #16]
8007a94: f107 0108 add.w r1, r7, #8
8007a98: 4610 mov r0, r2
8007a9a: 4798 blx r3
8007a9c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007a9e: e091 b.n 8007bc4 <USBD_GetDescriptor+0x268>
USBD_CtlError(pdev, req);
8007aa0: 6839 ldr r1, [r7, #0]
8007aa2: 6878 ldr r0, [r7, #4]
8007aa4: f000 facb bl 800803e <USBD_CtlError>
err++;
8007aa8: 7afb ldrb r3, [r7, #11]
8007aaa: 3301 adds r3, #1
8007aac: 72fb strb r3, [r7, #11]
break;
8007aae: e089 b.n 8007bc4 <USBD_GetDescriptor+0x268>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
8007ab0: 687b ldr r3, [r7, #4]
8007ab2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007ab6: 689b ldr r3, [r3, #8]
8007ab8: 2b00 cmp r3, #0
8007aba: d00b beq.n 8007ad4 <USBD_GetDescriptor+0x178>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
8007abc: 687b ldr r3, [r7, #4]
8007abe: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007ac2: 689b ldr r3, [r3, #8]
8007ac4: 687a ldr r2, [r7, #4]
8007ac6: 7c12 ldrb r2, [r2, #16]
8007ac8: f107 0108 add.w r1, r7, #8
8007acc: 4610 mov r0, r2
8007ace: 4798 blx r3
8007ad0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007ad2: e077 b.n 8007bc4 <USBD_GetDescriptor+0x268>
USBD_CtlError(pdev, req);
8007ad4: 6839 ldr r1, [r7, #0]
8007ad6: 6878 ldr r0, [r7, #4]
8007ad8: f000 fab1 bl 800803e <USBD_CtlError>
err++;
8007adc: 7afb ldrb r3, [r7, #11]
8007ade: 3301 adds r3, #1
8007ae0: 72fb strb r3, [r7, #11]
break;
8007ae2: e06f b.n 8007bc4 <USBD_GetDescriptor+0x268>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
8007ae4: 687b ldr r3, [r7, #4]
8007ae6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007aea: 68db ldr r3, [r3, #12]
8007aec: 2b00 cmp r3, #0
8007aee: d00b beq.n 8007b08 <USBD_GetDescriptor+0x1ac>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
8007af0: 687b ldr r3, [r7, #4]
8007af2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007af6: 68db ldr r3, [r3, #12]
8007af8: 687a ldr r2, [r7, #4]
8007afa: 7c12 ldrb r2, [r2, #16]
8007afc: f107 0108 add.w r1, r7, #8
8007b00: 4610 mov r0, r2
8007b02: 4798 blx r3
8007b04: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007b06: e05d b.n 8007bc4 <USBD_GetDescriptor+0x268>
USBD_CtlError(pdev, req);
8007b08: 6839 ldr r1, [r7, #0]
8007b0a: 6878 ldr r0, [r7, #4]
8007b0c: f000 fa97 bl 800803e <USBD_CtlError>
err++;
8007b10: 7afb ldrb r3, [r7, #11]
8007b12: 3301 adds r3, #1
8007b14: 72fb strb r3, [r7, #11]
break;
8007b16: e055 b.n 8007bc4 <USBD_GetDescriptor+0x268>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
8007b18: 687b ldr r3, [r7, #4]
8007b1a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007b1e: 691b ldr r3, [r3, #16]
8007b20: 2b00 cmp r3, #0
8007b22: d00b beq.n 8007b3c <USBD_GetDescriptor+0x1e0>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
8007b24: 687b ldr r3, [r7, #4]
8007b26: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007b2a: 691b ldr r3, [r3, #16]
8007b2c: 687a ldr r2, [r7, #4]
8007b2e: 7c12 ldrb r2, [r2, #16]
8007b30: f107 0108 add.w r1, r7, #8
8007b34: 4610 mov r0, r2
8007b36: 4798 blx r3
8007b38: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007b3a: e043 b.n 8007bc4 <USBD_GetDescriptor+0x268>
USBD_CtlError(pdev, req);
8007b3c: 6839 ldr r1, [r7, #0]
8007b3e: 6878 ldr r0, [r7, #4]
8007b40: f000 fa7d bl 800803e <USBD_CtlError>
err++;
8007b44: 7afb ldrb r3, [r7, #11]
8007b46: 3301 adds r3, #1
8007b48: 72fb strb r3, [r7, #11]
break;
8007b4a: e03b b.n 8007bc4 <USBD_GetDescriptor+0x268>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
8007b4c: 687b ldr r3, [r7, #4]
8007b4e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007b52: 695b ldr r3, [r3, #20]
8007b54: 2b00 cmp r3, #0
8007b56: d00b beq.n 8007b70 <USBD_GetDescriptor+0x214>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
8007b58: 687b ldr r3, [r7, #4]
8007b5a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007b5e: 695b ldr r3, [r3, #20]
8007b60: 687a ldr r2, [r7, #4]
8007b62: 7c12 ldrb r2, [r2, #16]
8007b64: f107 0108 add.w r1, r7, #8
8007b68: 4610 mov r0, r2
8007b6a: 4798 blx r3
8007b6c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007b6e: e029 b.n 8007bc4 <USBD_GetDescriptor+0x268>
USBD_CtlError(pdev, req);
8007b70: 6839 ldr r1, [r7, #0]
8007b72: 6878 ldr r0, [r7, #4]
8007b74: f000 fa63 bl 800803e <USBD_CtlError>
err++;
8007b78: 7afb ldrb r3, [r7, #11]
8007b7a: 3301 adds r3, #1
8007b7c: 72fb strb r3, [r7, #11]
break;
8007b7e: e021 b.n 8007bc4 <USBD_GetDescriptor+0x268>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
8007b80: 687b ldr r3, [r7, #4]
8007b82: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007b86: 699b ldr r3, [r3, #24]
8007b88: 2b00 cmp r3, #0
8007b8a: d00b beq.n 8007ba4 <USBD_GetDescriptor+0x248>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
8007b8c: 687b ldr r3, [r7, #4]
8007b8e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007b92: 699b ldr r3, [r3, #24]
8007b94: 687a ldr r2, [r7, #4]
8007b96: 7c12 ldrb r2, [r2, #16]
8007b98: f107 0108 add.w r1, r7, #8
8007b9c: 4610 mov r0, r2
8007b9e: 4798 blx r3
8007ba0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007ba2: e00f b.n 8007bc4 <USBD_GetDescriptor+0x268>
USBD_CtlError(pdev, req);
8007ba4: 6839 ldr r1, [r7, #0]
8007ba6: 6878 ldr r0, [r7, #4]
8007ba8: f000 fa49 bl 800803e <USBD_CtlError>
err++;
8007bac: 7afb ldrb r3, [r7, #11]
8007bae: 3301 adds r3, #1
8007bb0: 72fb strb r3, [r7, #11]
break;
8007bb2: e007 b.n 8007bc4 <USBD_GetDescriptor+0x268>
err++;
}
#endif /* USBD_SUPPORT_USER_STRING_DESC */
#if ((USBD_CLASS_USER_STRING_DESC == 0U) && (USBD_SUPPORT_USER_STRING_DESC == 0U))
USBD_CtlError(pdev, req);
8007bb4: 6839 ldr r1, [r7, #0]
8007bb6: 6878 ldr r0, [r7, #4]
8007bb8: f000 fa41 bl 800803e <USBD_CtlError>
err++;
8007bbc: 7afb ldrb r3, [r7, #11]
8007bbe: 3301 adds r3, #1
8007bc0: 72fb strb r3, [r7, #11]
#endif /* (USBD_CLASS_USER_STRING_DESC == 0U) && (USBD_SUPPORT_USER_STRING_DESC == 0U) */
break;
8007bc2: bf00 nop
}
break;
8007bc4: e037 b.n 8007c36 <USBD_GetDescriptor+0x2da>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007bc6: 687b ldr r3, [r7, #4]
8007bc8: 7c1b ldrb r3, [r3, #16]
8007bca: 2b00 cmp r3, #0
8007bcc: d109 bne.n 8007be2 <USBD_GetDescriptor+0x286>
pbuf = (uint8_t *)USBD_CMPSIT.GetDeviceQualifierDescriptor(&len);
}
else
#endif /* USE_USBD_COMPOSITE */
{
pbuf = (uint8_t *)pdev->pClass[0]->GetDeviceQualifierDescriptor(&len);
8007bce: 687b ldr r3, [r7, #4]
8007bd0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007bd4: 6b5b ldr r3, [r3, #52] @ 0x34
8007bd6: f107 0208 add.w r2, r7, #8
8007bda: 4610 mov r0, r2
8007bdc: 4798 blx r3
8007bde: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007be0: e029 b.n 8007c36 <USBD_GetDescriptor+0x2da>
USBD_CtlError(pdev, req);
8007be2: 6839 ldr r1, [r7, #0]
8007be4: 6878 ldr r0, [r7, #4]
8007be6: f000 fa2a bl 800803e <USBD_CtlError>
err++;
8007bea: 7afb ldrb r3, [r7, #11]
8007bec: 3301 adds r3, #1
8007bee: 72fb strb r3, [r7, #11]
break;
8007bf0: e021 b.n 8007c36 <USBD_GetDescriptor+0x2da>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007bf2: 687b ldr r3, [r7, #4]
8007bf4: 7c1b ldrb r3, [r3, #16]
8007bf6: 2b00 cmp r3, #0
8007bf8: d10d bne.n 8007c16 <USBD_GetDescriptor+0x2ba>
pbuf = (uint8_t *)USBD_CMPSIT.GetOtherSpeedConfigDescriptor(&len);
}
else
#endif /* USE_USBD_COMPOSITE */
{
pbuf = (uint8_t *)pdev->pClass[0]->GetOtherSpeedConfigDescriptor(&len);
8007bfa: 687b ldr r3, [r7, #4]
8007bfc: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007c00: 6b1b ldr r3, [r3, #48] @ 0x30
8007c02: f107 0208 add.w r2, r7, #8
8007c06: 4610 mov r0, r2
8007c08: 4798 blx r3
8007c0a: 60f8 str r0, [r7, #12]
}
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
8007c0c: 68fb ldr r3, [r7, #12]
8007c0e: 3301 adds r3, #1
8007c10: 2207 movs r2, #7
8007c12: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007c14: e00f b.n 8007c36 <USBD_GetDescriptor+0x2da>
USBD_CtlError(pdev, req);
8007c16: 6839 ldr r1, [r7, #0]
8007c18: 6878 ldr r0, [r7, #4]
8007c1a: f000 fa10 bl 800803e <USBD_CtlError>
err++;
8007c1e: 7afb ldrb r3, [r7, #11]
8007c20: 3301 adds r3, #1
8007c22: 72fb strb r3, [r7, #11]
break;
8007c24: e007 b.n 8007c36 <USBD_GetDescriptor+0x2da>
default:
USBD_CtlError(pdev, req);
8007c26: 6839 ldr r1, [r7, #0]
8007c28: 6878 ldr r0, [r7, #4]
8007c2a: f000 fa08 bl 800803e <USBD_CtlError>
err++;
8007c2e: 7afb ldrb r3, [r7, #11]
8007c30: 3301 adds r3, #1
8007c32: 72fb strb r3, [r7, #11]
break;
8007c34: bf00 nop
}
if (err != 0U)
8007c36: 7afb ldrb r3, [r7, #11]
8007c38: 2b00 cmp r3, #0
8007c3a: d11e bne.n 8007c7a <USBD_GetDescriptor+0x31e>
{
return;
}
if (req->wLength != 0U)
8007c3c: 683b ldr r3, [r7, #0]
8007c3e: 88db ldrh r3, [r3, #6]
8007c40: 2b00 cmp r3, #0
8007c42: d016 beq.n 8007c72 <USBD_GetDescriptor+0x316>
{
if (len != 0U)
8007c44: 893b ldrh r3, [r7, #8]
8007c46: 2b00 cmp r3, #0
8007c48: d00e beq.n 8007c68 <USBD_GetDescriptor+0x30c>
{
len = MIN(len, req->wLength);
8007c4a: 683b ldr r3, [r7, #0]
8007c4c: 88da ldrh r2, [r3, #6]
8007c4e: 893b ldrh r3, [r7, #8]
8007c50: 4293 cmp r3, r2
8007c52: bf28 it cs
8007c54: 4613 movcs r3, r2
8007c56: b29b uxth r3, r3
8007c58: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
8007c5a: 893b ldrh r3, [r7, #8]
8007c5c: 461a mov r2, r3
8007c5e: 68f9 ldr r1, [r7, #12]
8007c60: 6878 ldr r0, [r7, #4]
8007c62: f000 fa69 bl 8008138 <USBD_CtlSendData>
8007c66: e009 b.n 8007c7c <USBD_GetDescriptor+0x320>
}
else
{
USBD_CtlError(pdev, req);
8007c68: 6839 ldr r1, [r7, #0]
8007c6a: 6878 ldr r0, [r7, #4]
8007c6c: f000 f9e7 bl 800803e <USBD_CtlError>
8007c70: e004 b.n 8007c7c <USBD_GetDescriptor+0x320>
}
}
else
{
(void)USBD_CtlSendStatus(pdev);
8007c72: 6878 ldr r0, [r7, #4]
8007c74: f000 faa0 bl 80081b8 <USBD_CtlSendStatus>
8007c78: e000 b.n 8007c7c <USBD_GetDescriptor+0x320>
return;
8007c7a: bf00 nop
}
}
8007c7c: 3710 adds r7, #16
8007c7e: 46bd mov sp, r7
8007c80: bd80 pop {r7, pc}
8007c82: bf00 nop
08007c84 <USBD_SetAddress>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007c84: b580 push {r7, lr}
8007c86: b084 sub sp, #16
8007c88: af00 add r7, sp, #0
8007c8a: 6078 str r0, [r7, #4]
8007c8c: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
8007c8e: 683b ldr r3, [r7, #0]
8007c90: 889b ldrh r3, [r3, #4]
8007c92: 2b00 cmp r3, #0
8007c94: d131 bne.n 8007cfa <USBD_SetAddress+0x76>
8007c96: 683b ldr r3, [r7, #0]
8007c98: 88db ldrh r3, [r3, #6]
8007c9a: 2b00 cmp r3, #0
8007c9c: d12d bne.n 8007cfa <USBD_SetAddress+0x76>
8007c9e: 683b ldr r3, [r7, #0]
8007ca0: 885b ldrh r3, [r3, #2]
8007ca2: 2b7f cmp r3, #127 @ 0x7f
8007ca4: d829 bhi.n 8007cfa <USBD_SetAddress+0x76>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
8007ca6: 683b ldr r3, [r7, #0]
8007ca8: 885b ldrh r3, [r3, #2]
8007caa: b2db uxtb r3, r3
8007cac: f003 037f and.w r3, r3, #127 @ 0x7f
8007cb0: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007cb2: 687b ldr r3, [r7, #4]
8007cb4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007cb8: b2db uxtb r3, r3
8007cba: 2b03 cmp r3, #3
8007cbc: d104 bne.n 8007cc8 <USBD_SetAddress+0x44>
{
USBD_CtlError(pdev, req);
8007cbe: 6839 ldr r1, [r7, #0]
8007cc0: 6878 ldr r0, [r7, #4]
8007cc2: f000 f9bc bl 800803e <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007cc6: e01d b.n 8007d04 <USBD_SetAddress+0x80>
}
else
{
pdev->dev_address = dev_addr;
8007cc8: 687b ldr r3, [r7, #4]
8007cca: 7bfa ldrb r2, [r7, #15]
8007ccc: f883 229e strb.w r2, [r3, #670] @ 0x29e
(void)USBD_LL_SetUSBAddress(pdev, dev_addr);
8007cd0: 7bfb ldrb r3, [r7, #15]
8007cd2: 4619 mov r1, r3
8007cd4: 6878 ldr r0, [r7, #4]
8007cd6: f000 fe4f bl 8008978 <USBD_LL_SetUSBAddress>
(void)USBD_CtlSendStatus(pdev);
8007cda: 6878 ldr r0, [r7, #4]
8007cdc: f000 fa6c bl 80081b8 <USBD_CtlSendStatus>
if (dev_addr != 0U)
8007ce0: 7bfb ldrb r3, [r7, #15]
8007ce2: 2b00 cmp r3, #0
8007ce4: d004 beq.n 8007cf0 <USBD_SetAddress+0x6c>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8007ce6: 687b ldr r3, [r7, #4]
8007ce8: 2202 movs r2, #2
8007cea: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007cee: e009 b.n 8007d04 <USBD_SetAddress+0x80>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
8007cf0: 687b ldr r3, [r7, #4]
8007cf2: 2201 movs r2, #1
8007cf4: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007cf8: e004 b.n 8007d04 <USBD_SetAddress+0x80>
}
}
}
else
{
USBD_CtlError(pdev, req);
8007cfa: 6839 ldr r1, [r7, #0]
8007cfc: 6878 ldr r0, [r7, #4]
8007cfe: f000 f99e bl 800803e <USBD_CtlError>
}
}
8007d02: bf00 nop
8007d04: bf00 nop
8007d06: 3710 adds r7, #16
8007d08: 46bd mov sp, r7
8007d0a: bd80 pop {r7, pc}
08007d0c <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static USBD_StatusTypeDef USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007d0c: b580 push {r7, lr}
8007d0e: b084 sub sp, #16
8007d10: af00 add r7, sp, #0
8007d12: 6078 str r0, [r7, #4]
8007d14: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
8007d16: 2300 movs r3, #0
8007d18: 73fb strb r3, [r7, #15]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
8007d1a: 683b ldr r3, [r7, #0]
8007d1c: 885b ldrh r3, [r3, #2]
8007d1e: b2da uxtb r2, r3
8007d20: 4b4e ldr r3, [pc, #312] @ (8007e5c <USBD_SetConfig+0x150>)
8007d22: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
8007d24: 4b4d ldr r3, [pc, #308] @ (8007e5c <USBD_SetConfig+0x150>)
8007d26: 781b ldrb r3, [r3, #0]
8007d28: 2b01 cmp r3, #1
8007d2a: d905 bls.n 8007d38 <USBD_SetConfig+0x2c>
{
USBD_CtlError(pdev, req);
8007d2c: 6839 ldr r1, [r7, #0]
8007d2e: 6878 ldr r0, [r7, #4]
8007d30: f000 f985 bl 800803e <USBD_CtlError>
return USBD_FAIL;
8007d34: 2303 movs r3, #3
8007d36: e08c b.n 8007e52 <USBD_SetConfig+0x146>
}
switch (pdev->dev_state)
8007d38: 687b ldr r3, [r7, #4]
8007d3a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007d3e: b2db uxtb r3, r3
8007d40: 2b02 cmp r3, #2
8007d42: d002 beq.n 8007d4a <USBD_SetConfig+0x3e>
8007d44: 2b03 cmp r3, #3
8007d46: d029 beq.n 8007d9c <USBD_SetConfig+0x90>
8007d48: e075 b.n 8007e36 <USBD_SetConfig+0x12a>
{
case USBD_STATE_ADDRESSED:
if (cfgidx != 0U)
8007d4a: 4b44 ldr r3, [pc, #272] @ (8007e5c <USBD_SetConfig+0x150>)
8007d4c: 781b ldrb r3, [r3, #0]
8007d4e: 2b00 cmp r3, #0
8007d50: d020 beq.n 8007d94 <USBD_SetConfig+0x88>
{
pdev->dev_config = cfgidx;
8007d52: 4b42 ldr r3, [pc, #264] @ (8007e5c <USBD_SetConfig+0x150>)
8007d54: 781b ldrb r3, [r3, #0]
8007d56: 461a mov r2, r3
8007d58: 687b ldr r3, [r7, #4]
8007d5a: 605a str r2, [r3, #4]
ret = USBD_SetClassConfig(pdev, cfgidx);
8007d5c: 4b3f ldr r3, [pc, #252] @ (8007e5c <USBD_SetConfig+0x150>)
8007d5e: 781b ldrb r3, [r3, #0]
8007d60: 4619 mov r1, r3
8007d62: 6878 ldr r0, [r7, #4]
8007d64: f7fe ffa3 bl 8006cae <USBD_SetClassConfig>
8007d68: 4603 mov r3, r0
8007d6a: 73fb strb r3, [r7, #15]
if (ret != USBD_OK)
8007d6c: 7bfb ldrb r3, [r7, #15]
8007d6e: 2b00 cmp r3, #0
8007d70: d008 beq.n 8007d84 <USBD_SetConfig+0x78>
{
USBD_CtlError(pdev, req);
8007d72: 6839 ldr r1, [r7, #0]
8007d74: 6878 ldr r0, [r7, #4]
8007d76: f000 f962 bl 800803e <USBD_CtlError>
pdev->dev_state = USBD_STATE_ADDRESSED;
8007d7a: 687b ldr r3, [r7, #4]
8007d7c: 2202 movs r2, #2
8007d7e: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
else
{
(void)USBD_CtlSendStatus(pdev);
}
break;
8007d82: e065 b.n 8007e50 <USBD_SetConfig+0x144>
(void)USBD_CtlSendStatus(pdev);
8007d84: 6878 ldr r0, [r7, #4]
8007d86: f000 fa17 bl 80081b8 <USBD_CtlSendStatus>
pdev->dev_state = USBD_STATE_CONFIGURED;
8007d8a: 687b ldr r3, [r7, #4]
8007d8c: 2203 movs r2, #3
8007d8e: f883 229c strb.w r2, [r3, #668] @ 0x29c
break;
8007d92: e05d b.n 8007e50 <USBD_SetConfig+0x144>
(void)USBD_CtlSendStatus(pdev);
8007d94: 6878 ldr r0, [r7, #4]
8007d96: f000 fa0f bl 80081b8 <USBD_CtlSendStatus>
break;
8007d9a: e059 b.n 8007e50 <USBD_SetConfig+0x144>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
8007d9c: 4b2f ldr r3, [pc, #188] @ (8007e5c <USBD_SetConfig+0x150>)
8007d9e: 781b ldrb r3, [r3, #0]
8007da0: 2b00 cmp r3, #0
8007da2: d112 bne.n 8007dca <USBD_SetConfig+0xbe>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8007da4: 687b ldr r3, [r7, #4]
8007da6: 2202 movs r2, #2
8007da8: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
8007dac: 4b2b ldr r3, [pc, #172] @ (8007e5c <USBD_SetConfig+0x150>)
8007dae: 781b ldrb r3, [r3, #0]
8007db0: 461a mov r2, r3
8007db2: 687b ldr r3, [r7, #4]
8007db4: 605a str r2, [r3, #4]
(void)USBD_ClrClassConfig(pdev, cfgidx);
8007db6: 4b29 ldr r3, [pc, #164] @ (8007e5c <USBD_SetConfig+0x150>)
8007db8: 781b ldrb r3, [r3, #0]
8007dba: 4619 mov r1, r3
8007dbc: 6878 ldr r0, [r7, #4]
8007dbe: f7fe ff92 bl 8006ce6 <USBD_ClrClassConfig>
(void)USBD_CtlSendStatus(pdev);
8007dc2: 6878 ldr r0, [r7, #4]
8007dc4: f000 f9f8 bl 80081b8 <USBD_CtlSendStatus>
}
else
{
(void)USBD_CtlSendStatus(pdev);
}
break;
8007dc8: e042 b.n 8007e50 <USBD_SetConfig+0x144>
else if (cfgidx != pdev->dev_config)
8007dca: 4b24 ldr r3, [pc, #144] @ (8007e5c <USBD_SetConfig+0x150>)
8007dcc: 781b ldrb r3, [r3, #0]
8007dce: 461a mov r2, r3
8007dd0: 687b ldr r3, [r7, #4]
8007dd2: 685b ldr r3, [r3, #4]
8007dd4: 429a cmp r2, r3
8007dd6: d02a beq.n 8007e2e <USBD_SetConfig+0x122>
(void)USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
8007dd8: 687b ldr r3, [r7, #4]
8007dda: 685b ldr r3, [r3, #4]
8007ddc: b2db uxtb r3, r3
8007dde: 4619 mov r1, r3
8007de0: 6878 ldr r0, [r7, #4]
8007de2: f7fe ff80 bl 8006ce6 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
8007de6: 4b1d ldr r3, [pc, #116] @ (8007e5c <USBD_SetConfig+0x150>)
8007de8: 781b ldrb r3, [r3, #0]
8007dea: 461a mov r2, r3
8007dec: 687b ldr r3, [r7, #4]
8007dee: 605a str r2, [r3, #4]
ret = USBD_SetClassConfig(pdev, cfgidx);
8007df0: 4b1a ldr r3, [pc, #104] @ (8007e5c <USBD_SetConfig+0x150>)
8007df2: 781b ldrb r3, [r3, #0]
8007df4: 4619 mov r1, r3
8007df6: 6878 ldr r0, [r7, #4]
8007df8: f7fe ff59 bl 8006cae <USBD_SetClassConfig>
8007dfc: 4603 mov r3, r0
8007dfe: 73fb strb r3, [r7, #15]
if (ret != USBD_OK)
8007e00: 7bfb ldrb r3, [r7, #15]
8007e02: 2b00 cmp r3, #0
8007e04: d00f beq.n 8007e26 <USBD_SetConfig+0x11a>
USBD_CtlError(pdev, req);
8007e06: 6839 ldr r1, [r7, #0]
8007e08: 6878 ldr r0, [r7, #4]
8007e0a: f000 f918 bl 800803e <USBD_CtlError>
(void)USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
8007e0e: 687b ldr r3, [r7, #4]
8007e10: 685b ldr r3, [r3, #4]
8007e12: b2db uxtb r3, r3
8007e14: 4619 mov r1, r3
8007e16: 6878 ldr r0, [r7, #4]
8007e18: f7fe ff65 bl 8006ce6 <USBD_ClrClassConfig>
pdev->dev_state = USBD_STATE_ADDRESSED;
8007e1c: 687b ldr r3, [r7, #4]
8007e1e: 2202 movs r2, #2
8007e20: f883 229c strb.w r2, [r3, #668] @ 0x29c
break;
8007e24: e014 b.n 8007e50 <USBD_SetConfig+0x144>
(void)USBD_CtlSendStatus(pdev);
8007e26: 6878 ldr r0, [r7, #4]
8007e28: f000 f9c6 bl 80081b8 <USBD_CtlSendStatus>
break;
8007e2c: e010 b.n 8007e50 <USBD_SetConfig+0x144>
(void)USBD_CtlSendStatus(pdev);
8007e2e: 6878 ldr r0, [r7, #4]
8007e30: f000 f9c2 bl 80081b8 <USBD_CtlSendStatus>
break;
8007e34: e00c b.n 8007e50 <USBD_SetConfig+0x144>
default:
USBD_CtlError(pdev, req);
8007e36: 6839 ldr r1, [r7, #0]
8007e38: 6878 ldr r0, [r7, #4]
8007e3a: f000 f900 bl 800803e <USBD_CtlError>
(void)USBD_ClrClassConfig(pdev, cfgidx);
8007e3e: 4b07 ldr r3, [pc, #28] @ (8007e5c <USBD_SetConfig+0x150>)
8007e40: 781b ldrb r3, [r3, #0]
8007e42: 4619 mov r1, r3
8007e44: 6878 ldr r0, [r7, #4]
8007e46: f7fe ff4e bl 8006ce6 <USBD_ClrClassConfig>
ret = USBD_FAIL;
8007e4a: 2303 movs r3, #3
8007e4c: 73fb strb r3, [r7, #15]
break;
8007e4e: bf00 nop
}
return ret;
8007e50: 7bfb ldrb r3, [r7, #15]
}
8007e52: 4618 mov r0, r3
8007e54: 3710 adds r7, #16
8007e56: 46bd mov sp, r7
8007e58: bd80 pop {r7, pc}
8007e5a: bf00 nop
8007e5c: 200003b4 .word 0x200003b4
08007e60 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007e60: b580 push {r7, lr}
8007e62: b082 sub sp, #8
8007e64: af00 add r7, sp, #0
8007e66: 6078 str r0, [r7, #4]
8007e68: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
8007e6a: 683b ldr r3, [r7, #0]
8007e6c: 88db ldrh r3, [r3, #6]
8007e6e: 2b01 cmp r3, #1
8007e70: d004 beq.n 8007e7c <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
8007e72: 6839 ldr r1, [r7, #0]
8007e74: 6878 ldr r0, [r7, #4]
8007e76: f000 f8e2 bl 800803e <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
8007e7a: e023 b.n 8007ec4 <USBD_GetConfig+0x64>
switch (pdev->dev_state)
8007e7c: 687b ldr r3, [r7, #4]
8007e7e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007e82: b2db uxtb r3, r3
8007e84: 2b02 cmp r3, #2
8007e86: dc02 bgt.n 8007e8e <USBD_GetConfig+0x2e>
8007e88: 2b00 cmp r3, #0
8007e8a: dc03 bgt.n 8007e94 <USBD_GetConfig+0x34>
8007e8c: e015 b.n 8007eba <USBD_GetConfig+0x5a>
8007e8e: 2b03 cmp r3, #3
8007e90: d00b beq.n 8007eaa <USBD_GetConfig+0x4a>
8007e92: e012 b.n 8007eba <USBD_GetConfig+0x5a>
pdev->dev_default_config = 0U;
8007e94: 687b ldr r3, [r7, #4]
8007e96: 2200 movs r2, #0
8007e98: 609a str r2, [r3, #8]
(void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_default_config, 1U);
8007e9a: 687b ldr r3, [r7, #4]
8007e9c: 3308 adds r3, #8
8007e9e: 2201 movs r2, #1
8007ea0: 4619 mov r1, r3
8007ea2: 6878 ldr r0, [r7, #4]
8007ea4: f000 f948 bl 8008138 <USBD_CtlSendData>
break;
8007ea8: e00c b.n 8007ec4 <USBD_GetConfig+0x64>
(void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_config, 1U);
8007eaa: 687b ldr r3, [r7, #4]
8007eac: 3304 adds r3, #4
8007eae: 2201 movs r2, #1
8007eb0: 4619 mov r1, r3
8007eb2: 6878 ldr r0, [r7, #4]
8007eb4: f000 f940 bl 8008138 <USBD_CtlSendData>
break;
8007eb8: e004 b.n 8007ec4 <USBD_GetConfig+0x64>
USBD_CtlError(pdev, req);
8007eba: 6839 ldr r1, [r7, #0]
8007ebc: 6878 ldr r0, [r7, #4]
8007ebe: f000 f8be bl 800803e <USBD_CtlError>
break;
8007ec2: bf00 nop
}
8007ec4: bf00 nop
8007ec6: 3708 adds r7, #8
8007ec8: 46bd mov sp, r7
8007eca: bd80 pop {r7, pc}
08007ecc <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007ecc: b580 push {r7, lr}
8007ece: b082 sub sp, #8
8007ed0: af00 add r7, sp, #0
8007ed2: 6078 str r0, [r7, #4]
8007ed4: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8007ed6: 687b ldr r3, [r7, #4]
8007ed8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007edc: b2db uxtb r3, r3
8007ede: 3b01 subs r3, #1
8007ee0: 2b02 cmp r3, #2
8007ee2: d81e bhi.n 8007f22 <USBD_GetStatus+0x56>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
8007ee4: 683b ldr r3, [r7, #0]
8007ee6: 88db ldrh r3, [r3, #6]
8007ee8: 2b02 cmp r3, #2
8007eea: d004 beq.n 8007ef6 <USBD_GetStatus+0x2a>
{
USBD_CtlError(pdev, req);
8007eec: 6839 ldr r1, [r7, #0]
8007eee: 6878 ldr r0, [r7, #4]
8007ef0: f000 f8a5 bl 800803e <USBD_CtlError>
break;
8007ef4: e01a b.n 8007f2c <USBD_GetStatus+0x60>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
8007ef6: 687b ldr r3, [r7, #4]
8007ef8: 2201 movs r2, #1
8007efa: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif /* USBD_SELF_POWERED */
if (pdev->dev_remote_wakeup != 0U)
8007efc: 687b ldr r3, [r7, #4]
8007efe: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
8007f02: 2b00 cmp r3, #0
8007f04: d005 beq.n 8007f12 <USBD_GetStatus+0x46>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
8007f06: 687b ldr r3, [r7, #4]
8007f08: 68db ldr r3, [r3, #12]
8007f0a: f043 0202 orr.w r2, r3, #2
8007f0e: 687b ldr r3, [r7, #4]
8007f10: 60da str r2, [r3, #12]
}
(void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_config_status, 2U);
8007f12: 687b ldr r3, [r7, #4]
8007f14: 330c adds r3, #12
8007f16: 2202 movs r2, #2
8007f18: 4619 mov r1, r3
8007f1a: 6878 ldr r0, [r7, #4]
8007f1c: f000 f90c bl 8008138 <USBD_CtlSendData>
break;
8007f20: e004 b.n 8007f2c <USBD_GetStatus+0x60>
default:
USBD_CtlError(pdev, req);
8007f22: 6839 ldr r1, [r7, #0]
8007f24: 6878 ldr r0, [r7, #4]
8007f26: f000 f88a bl 800803e <USBD_CtlError>
break;
8007f2a: bf00 nop
}
}
8007f2c: bf00 nop
8007f2e: 3708 adds r7, #8
8007f30: 46bd mov sp, r7
8007f32: bd80 pop {r7, pc}
08007f34 <USBD_SetFeature>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007f34: b580 push {r7, lr}
8007f36: b082 sub sp, #8
8007f38: af00 add r7, sp, #0
8007f3a: 6078 str r0, [r7, #4]
8007f3c: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
8007f3e: 683b ldr r3, [r7, #0]
8007f40: 885b ldrh r3, [r3, #2]
8007f42: 2b01 cmp r3, #1
8007f44: d107 bne.n 8007f56 <USBD_SetFeature+0x22>
{
pdev->dev_remote_wakeup = 1U;
8007f46: 687b ldr r3, [r7, #4]
8007f48: 2201 movs r2, #1
8007f4a: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
(void)USBD_CtlSendStatus(pdev);
8007f4e: 6878 ldr r0, [r7, #4]
8007f50: f000 f932 bl 80081b8 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
}
8007f54: e013 b.n 8007f7e <USBD_SetFeature+0x4a>
else if (req->wValue == USB_FEATURE_TEST_MODE)
8007f56: 683b ldr r3, [r7, #0]
8007f58: 885b ldrh r3, [r3, #2]
8007f5a: 2b02 cmp r3, #2
8007f5c: d10b bne.n 8007f76 <USBD_SetFeature+0x42>
pdev->dev_test_mode = (uint8_t)(req->wIndex >> 8);
8007f5e: 683b ldr r3, [r7, #0]
8007f60: 889b ldrh r3, [r3, #4]
8007f62: 0a1b lsrs r3, r3, #8
8007f64: b29b uxth r3, r3
8007f66: b2da uxtb r2, r3
8007f68: 687b ldr r3, [r7, #4]
8007f6a: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
(void)USBD_CtlSendStatus(pdev);
8007f6e: 6878 ldr r0, [r7, #4]
8007f70: f000 f922 bl 80081b8 <USBD_CtlSendStatus>
}
8007f74: e003 b.n 8007f7e <USBD_SetFeature+0x4a>
USBD_CtlError(pdev, req);
8007f76: 6839 ldr r1, [r7, #0]
8007f78: 6878 ldr r0, [r7, #4]
8007f7a: f000 f860 bl 800803e <USBD_CtlError>
}
8007f7e: bf00 nop
8007f80: 3708 adds r7, #8
8007f82: 46bd mov sp, r7
8007f84: bd80 pop {r7, pc}
08007f86 <USBD_ClrFeature>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007f86: b580 push {r7, lr}
8007f88: b082 sub sp, #8
8007f8a: af00 add r7, sp, #0
8007f8c: 6078 str r0, [r7, #4]
8007f8e: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8007f90: 687b ldr r3, [r7, #4]
8007f92: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007f96: b2db uxtb r3, r3
8007f98: 3b01 subs r3, #1
8007f9a: 2b02 cmp r3, #2
8007f9c: d80b bhi.n 8007fb6 <USBD_ClrFeature+0x30>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
8007f9e: 683b ldr r3, [r7, #0]
8007fa0: 885b ldrh r3, [r3, #2]
8007fa2: 2b01 cmp r3, #1
8007fa4: d10c bne.n 8007fc0 <USBD_ClrFeature+0x3a>
{
pdev->dev_remote_wakeup = 0U;
8007fa6: 687b ldr r3, [r7, #4]
8007fa8: 2200 movs r2, #0
8007faa: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
(void)USBD_CtlSendStatus(pdev);
8007fae: 6878 ldr r0, [r7, #4]
8007fb0: f000 f902 bl 80081b8 <USBD_CtlSendStatus>
}
break;
8007fb4: e004 b.n 8007fc0 <USBD_ClrFeature+0x3a>
default:
USBD_CtlError(pdev, req);
8007fb6: 6839 ldr r1, [r7, #0]
8007fb8: 6878 ldr r0, [r7, #4]
8007fba: f000 f840 bl 800803e <USBD_CtlError>
break;
8007fbe: e000 b.n 8007fc2 <USBD_ClrFeature+0x3c>
break;
8007fc0: bf00 nop
}
}
8007fc2: bf00 nop
8007fc4: 3708 adds r7, #8
8007fc6: 46bd mov sp, r7
8007fc8: bd80 pop {r7, pc}
08007fca <USBD_ParseSetupRequest>:
* @param req: usb request
* @param pdata: setup data pointer
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
8007fca: b580 push {r7, lr}
8007fcc: b084 sub sp, #16
8007fce: af00 add r7, sp, #0
8007fd0: 6078 str r0, [r7, #4]
8007fd2: 6039 str r1, [r7, #0]
uint8_t *pbuff = pdata;
8007fd4: 683b ldr r3, [r7, #0]
8007fd6: 60fb str r3, [r7, #12]
req->bmRequest = *(uint8_t *)(pbuff);
8007fd8: 68fb ldr r3, [r7, #12]
8007fda: 781a ldrb r2, [r3, #0]
8007fdc: 687b ldr r3, [r7, #4]
8007fde: 701a strb r2, [r3, #0]
pbuff++;
8007fe0: 68fb ldr r3, [r7, #12]
8007fe2: 3301 adds r3, #1
8007fe4: 60fb str r3, [r7, #12]
req->bRequest = *(uint8_t *)(pbuff);
8007fe6: 68fb ldr r3, [r7, #12]
8007fe8: 781a ldrb r2, [r3, #0]
8007fea: 687b ldr r3, [r7, #4]
8007fec: 705a strb r2, [r3, #1]
pbuff++;
8007fee: 68fb ldr r3, [r7, #12]
8007ff0: 3301 adds r3, #1
8007ff2: 60fb str r3, [r7, #12]
req->wValue = SWAPBYTE(pbuff);
8007ff4: 68f8 ldr r0, [r7, #12]
8007ff6: f7ff fa13 bl 8007420 <SWAPBYTE>
8007ffa: 4603 mov r3, r0
8007ffc: 461a mov r2, r3
8007ffe: 687b ldr r3, [r7, #4]
8008000: 805a strh r2, [r3, #2]
pbuff++;
8008002: 68fb ldr r3, [r7, #12]
8008004: 3301 adds r3, #1
8008006: 60fb str r3, [r7, #12]
pbuff++;
8008008: 68fb ldr r3, [r7, #12]
800800a: 3301 adds r3, #1
800800c: 60fb str r3, [r7, #12]
req->wIndex = SWAPBYTE(pbuff);
800800e: 68f8 ldr r0, [r7, #12]
8008010: f7ff fa06 bl 8007420 <SWAPBYTE>
8008014: 4603 mov r3, r0
8008016: 461a mov r2, r3
8008018: 687b ldr r3, [r7, #4]
800801a: 809a strh r2, [r3, #4]
pbuff++;
800801c: 68fb ldr r3, [r7, #12]
800801e: 3301 adds r3, #1
8008020: 60fb str r3, [r7, #12]
pbuff++;
8008022: 68fb ldr r3, [r7, #12]
8008024: 3301 adds r3, #1
8008026: 60fb str r3, [r7, #12]
req->wLength = SWAPBYTE(pbuff);
8008028: 68f8 ldr r0, [r7, #12]
800802a: f7ff f9f9 bl 8007420 <SWAPBYTE>
800802e: 4603 mov r3, r0
8008030: 461a mov r2, r3
8008032: 687b ldr r3, [r7, #4]
8008034: 80da strh r2, [r3, #6]
}
8008036: bf00 nop
8008038: 3710 adds r7, #16
800803a: 46bd mov sp, r7
800803c: bd80 pop {r7, pc}
0800803e <USBD_CtlError>:
* @param pdev: device instance
* @param req: usb request
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800803e: b580 push {r7, lr}
8008040: b082 sub sp, #8
8008042: af00 add r7, sp, #0
8008044: 6078 str r0, [r7, #4]
8008046: 6039 str r1, [r7, #0]
UNUSED(req);
(void)USBD_LL_StallEP(pdev, 0x80U);
8008048: 2180 movs r1, #128 @ 0x80
800804a: 6878 ldr r0, [r7, #4]
800804c: f000 fc2a bl 80088a4 <USBD_LL_StallEP>
(void)USBD_LL_StallEP(pdev, 0U);
8008050: 2100 movs r1, #0
8008052: 6878 ldr r0, [r7, #4]
8008054: f000 fc26 bl 80088a4 <USBD_LL_StallEP>
}
8008058: bf00 nop
800805a: 3708 adds r7, #8
800805c: 46bd mov sp, r7
800805e: bd80 pop {r7, pc}
08008060 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
8008060: b580 push {r7, lr}
8008062: b086 sub sp, #24
8008064: af00 add r7, sp, #0
8008066: 60f8 str r0, [r7, #12]
8008068: 60b9 str r1, [r7, #8]
800806a: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800806c: 2300 movs r3, #0
800806e: 75fb strb r3, [r7, #23]
uint8_t *pdesc;
if (desc == NULL)
8008070: 68fb ldr r3, [r7, #12]
8008072: 2b00 cmp r3, #0
8008074: d042 beq.n 80080fc <USBD_GetString+0x9c>
{
return;
}
pdesc = desc;
8008076: 68fb ldr r3, [r7, #12]
8008078: 613b str r3, [r7, #16]
*len = MIN(USBD_MAX_STR_DESC_SIZ, ((uint16_t)USBD_GetLen(pdesc) * 2U) + 2U);
800807a: 6938 ldr r0, [r7, #16]
800807c: f000 f842 bl 8008104 <USBD_GetLen>
8008080: 4603 mov r3, r0
8008082: 3301 adds r3, #1
8008084: 005b lsls r3, r3, #1
8008086: f5b3 7f00 cmp.w r3, #512 @ 0x200
800808a: d808 bhi.n 800809e <USBD_GetString+0x3e>
800808c: 6938 ldr r0, [r7, #16]
800808e: f000 f839 bl 8008104 <USBD_GetLen>
8008092: 4603 mov r3, r0
8008094: 3301 adds r3, #1
8008096: b29b uxth r3, r3
8008098: 005b lsls r3, r3, #1
800809a: b29a uxth r2, r3
800809c: e001 b.n 80080a2 <USBD_GetString+0x42>
800809e: f44f 7200 mov.w r2, #512 @ 0x200
80080a2: 687b ldr r3, [r7, #4]
80080a4: 801a strh r2, [r3, #0]
unicode[idx] = *(uint8_t *)len;
80080a6: 7dfb ldrb r3, [r7, #23]
80080a8: 68ba ldr r2, [r7, #8]
80080aa: 4413 add r3, r2
80080ac: 687a ldr r2, [r7, #4]
80080ae: 7812 ldrb r2, [r2, #0]
80080b0: 701a strb r2, [r3, #0]
idx++;
80080b2: 7dfb ldrb r3, [r7, #23]
80080b4: 3301 adds r3, #1
80080b6: 75fb strb r3, [r7, #23]
unicode[idx] = USB_DESC_TYPE_STRING;
80080b8: 7dfb ldrb r3, [r7, #23]
80080ba: 68ba ldr r2, [r7, #8]
80080bc: 4413 add r3, r2
80080be: 2203 movs r2, #3
80080c0: 701a strb r2, [r3, #0]
idx++;
80080c2: 7dfb ldrb r3, [r7, #23]
80080c4: 3301 adds r3, #1
80080c6: 75fb strb r3, [r7, #23]
while (*pdesc != (uint8_t)'\0')
80080c8: e013 b.n 80080f2 <USBD_GetString+0x92>
{
unicode[idx] = *pdesc;
80080ca: 7dfb ldrb r3, [r7, #23]
80080cc: 68ba ldr r2, [r7, #8]
80080ce: 4413 add r3, r2
80080d0: 693a ldr r2, [r7, #16]
80080d2: 7812 ldrb r2, [r2, #0]
80080d4: 701a strb r2, [r3, #0]
pdesc++;
80080d6: 693b ldr r3, [r7, #16]
80080d8: 3301 adds r3, #1
80080da: 613b str r3, [r7, #16]
idx++;
80080dc: 7dfb ldrb r3, [r7, #23]
80080de: 3301 adds r3, #1
80080e0: 75fb strb r3, [r7, #23]
unicode[idx] = 0U;
80080e2: 7dfb ldrb r3, [r7, #23]
80080e4: 68ba ldr r2, [r7, #8]
80080e6: 4413 add r3, r2
80080e8: 2200 movs r2, #0
80080ea: 701a strb r2, [r3, #0]
idx++;
80080ec: 7dfb ldrb r3, [r7, #23]
80080ee: 3301 adds r3, #1
80080f0: 75fb strb r3, [r7, #23]
while (*pdesc != (uint8_t)'\0')
80080f2: 693b ldr r3, [r7, #16]
80080f4: 781b ldrb r3, [r3, #0]
80080f6: 2b00 cmp r3, #0
80080f8: d1e7 bne.n 80080ca <USBD_GetString+0x6a>
80080fa: e000 b.n 80080fe <USBD_GetString+0x9e>
return;
80080fc: bf00 nop
}
}
80080fe: 3718 adds r7, #24
8008100: 46bd mov sp, r7
8008102: bd80 pop {r7, pc}
08008104 <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
8008104: b480 push {r7}
8008106: b085 sub sp, #20
8008108: af00 add r7, sp, #0
800810a: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800810c: 2300 movs r3, #0
800810e: 73fb strb r3, [r7, #15]
uint8_t *pbuff = buf;
8008110: 687b ldr r3, [r7, #4]
8008112: 60bb str r3, [r7, #8]
while (*pbuff != (uint8_t)'\0')
8008114: e005 b.n 8008122 <USBD_GetLen+0x1e>
{
len++;
8008116: 7bfb ldrb r3, [r7, #15]
8008118: 3301 adds r3, #1
800811a: 73fb strb r3, [r7, #15]
pbuff++;
800811c: 68bb ldr r3, [r7, #8]
800811e: 3301 adds r3, #1
8008120: 60bb str r3, [r7, #8]
while (*pbuff != (uint8_t)'\0')
8008122: 68bb ldr r3, [r7, #8]
8008124: 781b ldrb r3, [r3, #0]
8008126: 2b00 cmp r3, #0
8008128: d1f5 bne.n 8008116 <USBD_GetLen+0x12>
}
return len;
800812a: 7bfb ldrb r3, [r7, #15]
}
800812c: 4618 mov r0, r3
800812e: 3714 adds r7, #20
8008130: 46bd mov sp, r7
8008132: f85d 7b04 ldr.w r7, [sp], #4
8008136: 4770 bx lr
08008138 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint32_t len)
{
8008138: b580 push {r7, lr}
800813a: b084 sub sp, #16
800813c: af00 add r7, sp, #0
800813e: 60f8 str r0, [r7, #12]
8008140: 60b9 str r1, [r7, #8]
8008142: 607a str r2, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
8008144: 68fb ldr r3, [r7, #12]
8008146: 2202 movs r2, #2
8008148: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
800814c: 68fb ldr r3, [r7, #12]
800814e: 687a ldr r2, [r7, #4]
8008150: 615a str r2, [r3, #20]
pdev->ep_in[0].pbuffer = pbuf;
8008152: 68fb ldr r3, [r7, #12]
8008154: 68ba ldr r2, [r7, #8]
8008156: 625a str r2, [r3, #36] @ 0x24
#ifdef USBD_AVOID_PACKET_SPLIT_MPS
pdev->ep_in[0].rem_length = 0U;
#else
pdev->ep_in[0].rem_length = len;
8008158: 68fb ldr r3, [r7, #12]
800815a: 687a ldr r2, [r7, #4]
800815c: 619a str r2, [r3, #24]
#endif /* USBD_AVOID_PACKET_SPLIT_MPS */
/* Start the transfer */
(void)USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800815e: 687b ldr r3, [r7, #4]
8008160: 68ba ldr r2, [r7, #8]
8008162: 2100 movs r1, #0
8008164: 68f8 ldr r0, [r7, #12]
8008166: f000 fc26 bl 80089b6 <USBD_LL_Transmit>
return USBD_OK;
800816a: 2300 movs r3, #0
}
800816c: 4618 mov r0, r3
800816e: 3710 adds r7, #16
8008170: 46bd mov sp, r7
8008172: bd80 pop {r7, pc}
08008174 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint32_t len)
{
8008174: b580 push {r7, lr}
8008176: b084 sub sp, #16
8008178: af00 add r7, sp, #0
800817a: 60f8 str r0, [r7, #12]
800817c: 60b9 str r1, [r7, #8]
800817e: 607a str r2, [r7, #4]
/* Start the next transfer */
(void)USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8008180: 687b ldr r3, [r7, #4]
8008182: 68ba ldr r2, [r7, #8]
8008184: 2100 movs r1, #0
8008186: 68f8 ldr r0, [r7, #12]
8008188: f000 fc15 bl 80089b6 <USBD_LL_Transmit>
return USBD_OK;
800818c: 2300 movs r3, #0
}
800818e: 4618 mov r0, r3
8008190: 3710 adds r7, #16
8008192: 46bd mov sp, r7
8008194: bd80 pop {r7, pc}
08008196 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint32_t len)
{
8008196: b580 push {r7, lr}
8008198: b084 sub sp, #16
800819a: af00 add r7, sp, #0
800819c: 60f8 str r0, [r7, #12]
800819e: 60b9 str r1, [r7, #8]
80081a0: 607a str r2, [r7, #4]
(void)USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
80081a2: 687b ldr r3, [r7, #4]
80081a4: 68ba ldr r2, [r7, #8]
80081a6: 2100 movs r1, #0
80081a8: 68f8 ldr r0, [r7, #12]
80081aa: f000 fc25 bl 80089f8 <USBD_LL_PrepareReceive>
return USBD_OK;
80081ae: 2300 movs r3, #0
}
80081b0: 4618 mov r0, r3
80081b2: 3710 adds r7, #16
80081b4: 46bd mov sp, r7
80081b6: bd80 pop {r7, pc}
080081b8 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
80081b8: b580 push {r7, lr}
80081ba: b082 sub sp, #8
80081bc: af00 add r7, sp, #0
80081be: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
80081c0: 687b ldr r3, [r7, #4]
80081c2: 2204 movs r2, #4
80081c4: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
(void)USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
80081c8: 2300 movs r3, #0
80081ca: 2200 movs r2, #0
80081cc: 2100 movs r1, #0
80081ce: 6878 ldr r0, [r7, #4]
80081d0: f000 fbf1 bl 80089b6 <USBD_LL_Transmit>
return USBD_OK;
80081d4: 2300 movs r3, #0
}
80081d6: 4618 mov r0, r3
80081d8: 3708 adds r7, #8
80081da: 46bd mov sp, r7
80081dc: bd80 pop {r7, pc}
080081de <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
80081de: b580 push {r7, lr}
80081e0: b082 sub sp, #8
80081e2: af00 add r7, sp, #0
80081e4: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
80081e6: 687b ldr r3, [r7, #4]
80081e8: 2205 movs r2, #5
80081ea: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
(void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
80081ee: 2300 movs r3, #0
80081f0: 2200 movs r2, #0
80081f2: 2100 movs r1, #0
80081f4: 6878 ldr r0, [r7, #4]
80081f6: f000 fbff bl 80089f8 <USBD_LL_PrepareReceive>
return USBD_OK;
80081fa: 2300 movs r3, #0
}
80081fc: 4618 mov r0, r3
80081fe: 3708 adds r7, #8
8008200: 46bd mov sp, r7
8008202: bd80 pop {r7, pc}
08008204 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
8008204: b580 push {r7, lr}
8008206: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
8008208: 2200 movs r2, #0
800820a: 490e ldr r1, [pc, #56] @ (8008244 <MX_USB_DEVICE_Init+0x40>)
800820c: 480e ldr r0, [pc, #56] @ (8008248 <MX_USB_DEVICE_Init+0x44>)
800820e: f7fe fcd1 bl 8006bb4 <USBD_Init>
8008212: 4603 mov r3, r0
8008214: 2b00 cmp r3, #0
8008216: d001 beq.n 800821c <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
8008218: f7f8 fd1c bl 8000c54 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_HID) != USBD_OK)
800821c: 490b ldr r1, [pc, #44] @ (800824c <MX_USB_DEVICE_Init+0x48>)
800821e: 480a ldr r0, [pc, #40] @ (8008248 <MX_USB_DEVICE_Init+0x44>)
8008220: f7fe fcf8 bl 8006c14 <USBD_RegisterClass>
8008224: 4603 mov r3, r0
8008226: 2b00 cmp r3, #0
8008228: d001 beq.n 800822e <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
800822a: f7f8 fd13 bl 8000c54 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
800822e: 4806 ldr r0, [pc, #24] @ (8008248 <MX_USB_DEVICE_Init+0x44>)
8008230: f7fe fd26 bl 8006c80 <USBD_Start>
8008234: 4603 mov r3, r0
8008236: 2b00 cmp r3, #0
8008238: d001 beq.n 800823e <MX_USB_DEVICE_Init+0x3a>
{
Error_Handler();
800823a: f7f8 fd0b bl 8000c54 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
800823e: bf00 nop
8008240: bd80 pop {r7, pc}
8008242: bf00 nop
8008244: 200000d8 .word 0x200000d8
8008248: 200003b8 .word 0x200003b8
800824c: 20000034 .word 0x20000034
08008250 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008250: b480 push {r7}
8008252: b083 sub sp, #12
8008254: af00 add r7, sp, #0
8008256: 4603 mov r3, r0
8008258: 6039 str r1, [r7, #0]
800825a: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
800825c: 683b ldr r3, [r7, #0]
800825e: 2212 movs r2, #18
8008260: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
8008262: 4b03 ldr r3, [pc, #12] @ (8008270 <USBD_FS_DeviceDescriptor+0x20>)
}
8008264: 4618 mov r0, r3
8008266: 370c adds r7, #12
8008268: 46bd mov sp, r7
800826a: f85d 7b04 ldr.w r7, [sp], #4
800826e: 4770 bx lr
8008270: 200000f8 .word 0x200000f8
08008274 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008274: b480 push {r7}
8008276: b083 sub sp, #12
8008278: af00 add r7, sp, #0
800827a: 4603 mov r3, r0
800827c: 6039 str r1, [r7, #0]
800827e: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
8008280: 683b ldr r3, [r7, #0]
8008282: 2204 movs r2, #4
8008284: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
8008286: 4b03 ldr r3, [pc, #12] @ (8008294 <USBD_FS_LangIDStrDescriptor+0x20>)
}
8008288: 4618 mov r0, r3
800828a: 370c adds r7, #12
800828c: 46bd mov sp, r7
800828e: f85d 7b04 ldr.w r7, [sp], #4
8008292: 4770 bx lr
8008294: 20000118 .word 0x20000118
08008298 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008298: b580 push {r7, lr}
800829a: b082 sub sp, #8
800829c: af00 add r7, sp, #0
800829e: 4603 mov r3, r0
80082a0: 6039 str r1, [r7, #0]
80082a2: 71fb strb r3, [r7, #7]
if(speed == 0)
80082a4: 79fb ldrb r3, [r7, #7]
80082a6: 2b00 cmp r3, #0
80082a8: d105 bne.n 80082b6 <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
80082aa: 683a ldr r2, [r7, #0]
80082ac: 4907 ldr r1, [pc, #28] @ (80082cc <USBD_FS_ProductStrDescriptor+0x34>)
80082ae: 4808 ldr r0, [pc, #32] @ (80082d0 <USBD_FS_ProductStrDescriptor+0x38>)
80082b0: f7ff fed6 bl 8008060 <USBD_GetString>
80082b4: e004 b.n 80082c0 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
80082b6: 683a ldr r2, [r7, #0]
80082b8: 4904 ldr r1, [pc, #16] @ (80082cc <USBD_FS_ProductStrDescriptor+0x34>)
80082ba: 4805 ldr r0, [pc, #20] @ (80082d0 <USBD_FS_ProductStrDescriptor+0x38>)
80082bc: f7ff fed0 bl 8008060 <USBD_GetString>
}
return USBD_StrDesc;
80082c0: 4b02 ldr r3, [pc, #8] @ (80082cc <USBD_FS_ProductStrDescriptor+0x34>)
}
80082c2: 4618 mov r0, r3
80082c4: 3708 adds r7, #8
80082c6: 46bd mov sp, r7
80082c8: bd80 pop {r7, pc}
80082ca: bf00 nop
80082cc: 20000694 .word 0x20000694
80082d0: 08008bd0 .word 0x08008bd0
080082d4 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80082d4: b580 push {r7, lr}
80082d6: b082 sub sp, #8
80082d8: af00 add r7, sp, #0
80082da: 4603 mov r3, r0
80082dc: 6039 str r1, [r7, #0]
80082de: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
80082e0: 683a ldr r2, [r7, #0]
80082e2: 4904 ldr r1, [pc, #16] @ (80082f4 <USBD_FS_ManufacturerStrDescriptor+0x20>)
80082e4: 4804 ldr r0, [pc, #16] @ (80082f8 <USBD_FS_ManufacturerStrDescriptor+0x24>)
80082e6: f7ff febb bl 8008060 <USBD_GetString>
return USBD_StrDesc;
80082ea: 4b02 ldr r3, [pc, #8] @ (80082f4 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
80082ec: 4618 mov r0, r3
80082ee: 3708 adds r7, #8
80082f0: 46bd mov sp, r7
80082f2: bd80 pop {r7, pc}
80082f4: 20000694 .word 0x20000694
80082f8: 08008be4 .word 0x08008be4
080082fc <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80082fc: b580 push {r7, lr}
80082fe: b082 sub sp, #8
8008300: af00 add r7, sp, #0
8008302: 4603 mov r3, r0
8008304: 6039 str r1, [r7, #0]
8008306: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
8008308: 683b ldr r3, [r7, #0]
800830a: 221a movs r2, #26
800830c: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800830e: f000 f855 bl 80083bc <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
8008312: 4b02 ldr r3, [pc, #8] @ (800831c <USBD_FS_SerialStrDescriptor+0x20>)
}
8008314: 4618 mov r0, r3
8008316: 3708 adds r7, #8
8008318: 46bd mov sp, r7
800831a: bd80 pop {r7, pc}
800831c: 2000011c .word 0x2000011c
08008320 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008320: b580 push {r7, lr}
8008322: b082 sub sp, #8
8008324: af00 add r7, sp, #0
8008326: 4603 mov r3, r0
8008328: 6039 str r1, [r7, #0]
800832a: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
800832c: 79fb ldrb r3, [r7, #7]
800832e: 2b00 cmp r3, #0
8008330: d105 bne.n 800833e <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
8008332: 683a ldr r2, [r7, #0]
8008334: 4907 ldr r1, [pc, #28] @ (8008354 <USBD_FS_ConfigStrDescriptor+0x34>)
8008336: 4808 ldr r0, [pc, #32] @ (8008358 <USBD_FS_ConfigStrDescriptor+0x38>)
8008338: f7ff fe92 bl 8008060 <USBD_GetString>
800833c: e004 b.n 8008348 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800833e: 683a ldr r2, [r7, #0]
8008340: 4904 ldr r1, [pc, #16] @ (8008354 <USBD_FS_ConfigStrDescriptor+0x34>)
8008342: 4805 ldr r0, [pc, #20] @ (8008358 <USBD_FS_ConfigStrDescriptor+0x38>)
8008344: f7ff fe8c bl 8008060 <USBD_GetString>
}
return USBD_StrDesc;
8008348: 4b02 ldr r3, [pc, #8] @ (8008354 <USBD_FS_ConfigStrDescriptor+0x34>)
}
800834a: 4618 mov r0, r3
800834c: 3708 adds r7, #8
800834e: 46bd mov sp, r7
8008350: bd80 pop {r7, pc}
8008352: bf00 nop
8008354: 20000694 .word 0x20000694
8008358: 08008bf0 .word 0x08008bf0
0800835c <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800835c: b580 push {r7, lr}
800835e: b082 sub sp, #8
8008360: af00 add r7, sp, #0
8008362: 4603 mov r3, r0
8008364: 6039 str r1, [r7, #0]
8008366: 71fb strb r3, [r7, #7]
if(speed == 0)
8008368: 79fb ldrb r3, [r7, #7]
800836a: 2b00 cmp r3, #0
800836c: d105 bne.n 800837a <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800836e: 683a ldr r2, [r7, #0]
8008370: 4907 ldr r1, [pc, #28] @ (8008390 <USBD_FS_InterfaceStrDescriptor+0x34>)
8008372: 4808 ldr r0, [pc, #32] @ (8008394 <USBD_FS_InterfaceStrDescriptor+0x38>)
8008374: f7ff fe74 bl 8008060 <USBD_GetString>
8008378: e004 b.n 8008384 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800837a: 683a ldr r2, [r7, #0]
800837c: 4904 ldr r1, [pc, #16] @ (8008390 <USBD_FS_InterfaceStrDescriptor+0x34>)
800837e: 4805 ldr r0, [pc, #20] @ (8008394 <USBD_FS_InterfaceStrDescriptor+0x38>)
8008380: f7ff fe6e bl 8008060 <USBD_GetString>
}
return USBD_StrDesc;
8008384: 4b02 ldr r3, [pc, #8] @ (8008390 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
8008386: 4618 mov r0, r3
8008388: 3708 adds r7, #8
800838a: 46bd mov sp, r7
800838c: bd80 pop {r7, pc}
800838e: bf00 nop
8008390: 20000694 .word 0x20000694
8008394: 08008bfc .word 0x08008bfc
08008398 <USBD_FS_USR_BOSDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008398: b480 push {r7}
800839a: b083 sub sp, #12
800839c: af00 add r7, sp, #0
800839e: 4603 mov r3, r0
80083a0: 6039 str r1, [r7, #0]
80083a2: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_BOSDesc);
80083a4: 683b ldr r3, [r7, #0]
80083a6: 220c movs r2, #12
80083a8: 801a strh r2, [r3, #0]
return (uint8_t*)USBD_FS_BOSDesc;
80083aa: 4b03 ldr r3, [pc, #12] @ (80083b8 <USBD_FS_USR_BOSDescriptor+0x20>)
}
80083ac: 4618 mov r0, r3
80083ae: 370c adds r7, #12
80083b0: 46bd mov sp, r7
80083b2: f85d 7b04 ldr.w r7, [sp], #4
80083b6: 4770 bx lr
80083b8: 2000010c .word 0x2000010c
080083bc <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
80083bc: b580 push {r7, lr}
80083be: b084 sub sp, #16
80083c0: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
80083c2: 4b0f ldr r3, [pc, #60] @ (8008400 <Get_SerialNum+0x44>)
80083c4: 681b ldr r3, [r3, #0]
80083c6: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
80083c8: 4b0e ldr r3, [pc, #56] @ (8008404 <Get_SerialNum+0x48>)
80083ca: 681b ldr r3, [r3, #0]
80083cc: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
80083ce: 4b0e ldr r3, [pc, #56] @ (8008408 <Get_SerialNum+0x4c>)
80083d0: 681b ldr r3, [r3, #0]
80083d2: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
80083d4: 68fa ldr r2, [r7, #12]
80083d6: 687b ldr r3, [r7, #4]
80083d8: 4413 add r3, r2
80083da: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
80083dc: 68fb ldr r3, [r7, #12]
80083de: 2b00 cmp r3, #0
80083e0: d009 beq.n 80083f6 <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
80083e2: 2208 movs r2, #8
80083e4: 4909 ldr r1, [pc, #36] @ (800840c <Get_SerialNum+0x50>)
80083e6: 68f8 ldr r0, [r7, #12]
80083e8: f000 f814 bl 8008414 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
80083ec: 2204 movs r2, #4
80083ee: 4908 ldr r1, [pc, #32] @ (8008410 <Get_SerialNum+0x54>)
80083f0: 68b8 ldr r0, [r7, #8]
80083f2: f000 f80f bl 8008414 <IntToUnicode>
}
}
80083f6: bf00 nop
80083f8: 3710 adds r7, #16
80083fa: 46bd mov sp, r7
80083fc: bd80 pop {r7, pc}
80083fe: bf00 nop
8008400: 1fff7a10 .word 0x1fff7a10
8008404: 1fff7a14 .word 0x1fff7a14
8008408: 1fff7a18 .word 0x1fff7a18
800840c: 2000011e .word 0x2000011e
8008410: 2000012e .word 0x2000012e
08008414 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
8008414: b480 push {r7}
8008416: b087 sub sp, #28
8008418: af00 add r7, sp, #0
800841a: 60f8 str r0, [r7, #12]
800841c: 60b9 str r1, [r7, #8]
800841e: 4613 mov r3, r2
8008420: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
8008422: 2300 movs r3, #0
8008424: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
8008426: 2300 movs r3, #0
8008428: 75fb strb r3, [r7, #23]
800842a: e027 b.n 800847c <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800842c: 68fb ldr r3, [r7, #12]
800842e: 0f1b lsrs r3, r3, #28
8008430: 2b09 cmp r3, #9
8008432: d80b bhi.n 800844c <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
8008434: 68fb ldr r3, [r7, #12]
8008436: 0f1b lsrs r3, r3, #28
8008438: b2da uxtb r2, r3
800843a: 7dfb ldrb r3, [r7, #23]
800843c: 005b lsls r3, r3, #1
800843e: 4619 mov r1, r3
8008440: 68bb ldr r3, [r7, #8]
8008442: 440b add r3, r1
8008444: 3230 adds r2, #48 @ 0x30
8008446: b2d2 uxtb r2, r2
8008448: 701a strb r2, [r3, #0]
800844a: e00a b.n 8008462 <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800844c: 68fb ldr r3, [r7, #12]
800844e: 0f1b lsrs r3, r3, #28
8008450: b2da uxtb r2, r3
8008452: 7dfb ldrb r3, [r7, #23]
8008454: 005b lsls r3, r3, #1
8008456: 4619 mov r1, r3
8008458: 68bb ldr r3, [r7, #8]
800845a: 440b add r3, r1
800845c: 3237 adds r2, #55 @ 0x37
800845e: b2d2 uxtb r2, r2
8008460: 701a strb r2, [r3, #0]
}
value = value << 4;
8008462: 68fb ldr r3, [r7, #12]
8008464: 011b lsls r3, r3, #4
8008466: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
8008468: 7dfb ldrb r3, [r7, #23]
800846a: 005b lsls r3, r3, #1
800846c: 3301 adds r3, #1
800846e: 68ba ldr r2, [r7, #8]
8008470: 4413 add r3, r2
8008472: 2200 movs r2, #0
8008474: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
8008476: 7dfb ldrb r3, [r7, #23]
8008478: 3301 adds r3, #1
800847a: 75fb strb r3, [r7, #23]
800847c: 7dfa ldrb r2, [r7, #23]
800847e: 79fb ldrb r3, [r7, #7]
8008480: 429a cmp r2, r3
8008482: d3d3 bcc.n 800842c <IntToUnicode+0x18>
}
}
8008484: bf00 nop
8008486: bf00 nop
8008488: 371c adds r7, #28
800848a: 46bd mov sp, r7
800848c: f85d 7b04 ldr.w r7, [sp], #4
8008490: 4770 bx lr
...
08008494 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
8008494: b580 push {r7, lr}
8008496: b0a0 sub sp, #128 @ 0x80
8008498: af00 add r7, sp, #0
800849a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
800849c: f107 036c add.w r3, r7, #108 @ 0x6c
80084a0: 2200 movs r2, #0
80084a2: 601a str r2, [r3, #0]
80084a4: 605a str r2, [r3, #4]
80084a6: 609a str r2, [r3, #8]
80084a8: 60da str r2, [r3, #12]
80084aa: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
80084ac: f107 0310 add.w r3, r7, #16
80084b0: 225c movs r2, #92 @ 0x5c
80084b2: 2100 movs r1, #0
80084b4: 4618 mov r0, r3
80084b6: f000 fb53 bl 8008b60 <memset>
if(pcdHandle->Instance==USB_OTG_FS)
80084ba: 687b ldr r3, [r7, #4]
80084bc: 681b ldr r3, [r3, #0]
80084be: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000
80084c2: d149 bne.n 8008558 <HAL_PCD_MspInit+0xc4>
/* USER CODE END USB_OTG_FS_MspInit 0 */
/** Initializes the peripherals clock
*/
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
80084c4: f44f 7380 mov.w r3, #256 @ 0x100
80084c8: 613b str r3, [r7, #16]
PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLQ;
80084ca: 2300 movs r3, #0
80084cc: 667b str r3, [r7, #100] @ 0x64
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
80084ce: f107 0310 add.w r3, r7, #16
80084d2: 4618 mov r0, r3
80084d4: f7fa fed8 bl 8003288 <HAL_RCCEx_PeriphCLKConfig>
80084d8: 4603 mov r3, r0
80084da: 2b00 cmp r3, #0
80084dc: d001 beq.n 80084e2 <HAL_PCD_MspInit+0x4e>
{
Error_Handler();
80084de: f7f8 fbb9 bl 8000c54 <Error_Handler>
}
__HAL_RCC_GPIOA_CLK_ENABLE();
80084e2: 2300 movs r3, #0
80084e4: 60fb str r3, [r7, #12]
80084e6: 4b1e ldr r3, [pc, #120] @ (8008560 <HAL_PCD_MspInit+0xcc>)
80084e8: 6b1b ldr r3, [r3, #48] @ 0x30
80084ea: 4a1d ldr r2, [pc, #116] @ (8008560 <HAL_PCD_MspInit+0xcc>)
80084ec: f043 0301 orr.w r3, r3, #1
80084f0: 6313 str r3, [r2, #48] @ 0x30
80084f2: 4b1b ldr r3, [pc, #108] @ (8008560 <HAL_PCD_MspInit+0xcc>)
80084f4: 6b1b ldr r3, [r3, #48] @ 0x30
80084f6: f003 0301 and.w r3, r3, #1
80084fa: 60fb str r3, [r7, #12]
80084fc: 68fb ldr r3, [r7, #12]
/**USB_OTG_FS GPIO Configuration
PA11 ------> USB_OTG_FS_DM
PA12 ------> USB_OTG_FS_DP
*/
GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12;
80084fe: f44f 53c0 mov.w r3, #6144 @ 0x1800
8008502: 66fb str r3, [r7, #108] @ 0x6c
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8008504: 2302 movs r3, #2
8008506: 673b str r3, [r7, #112] @ 0x70
GPIO_InitStruct.Pull = GPIO_NOPULL;
8008508: 2300 movs r3, #0
800850a: 677b str r3, [r7, #116] @ 0x74
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
800850c: 2303 movs r3, #3
800850e: 67bb str r3, [r7, #120] @ 0x78
GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
8008510: 230a movs r3, #10
8008512: 67fb str r3, [r7, #124] @ 0x7c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8008514: f107 036c add.w r3, r7, #108 @ 0x6c
8008518: 4619 mov r1, r3
800851a: 4812 ldr r0, [pc, #72] @ (8008564 <HAL_PCD_MspInit+0xd0>)
800851c: f7f9 f80a bl 8001534 <HAL_GPIO_Init>
/* Peripheral clock enable */
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
8008520: 4b0f ldr r3, [pc, #60] @ (8008560 <HAL_PCD_MspInit+0xcc>)
8008522: 6b5b ldr r3, [r3, #52] @ 0x34
8008524: 4a0e ldr r2, [pc, #56] @ (8008560 <HAL_PCD_MspInit+0xcc>)
8008526: f043 0380 orr.w r3, r3, #128 @ 0x80
800852a: 6353 str r3, [r2, #52] @ 0x34
800852c: 2300 movs r3, #0
800852e: 60bb str r3, [r7, #8]
8008530: 4b0b ldr r3, [pc, #44] @ (8008560 <HAL_PCD_MspInit+0xcc>)
8008532: 6c5b ldr r3, [r3, #68] @ 0x44
8008534: 4a0a ldr r2, [pc, #40] @ (8008560 <HAL_PCD_MspInit+0xcc>)
8008536: f443 4380 orr.w r3, r3, #16384 @ 0x4000
800853a: 6453 str r3, [r2, #68] @ 0x44
800853c: 4b08 ldr r3, [pc, #32] @ (8008560 <HAL_PCD_MspInit+0xcc>)
800853e: 6c5b ldr r3, [r3, #68] @ 0x44
8008540: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008544: 60bb str r3, [r7, #8]
8008546: 68bb ldr r3, [r7, #8]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0);
8008548: 2200 movs r2, #0
800854a: 2100 movs r1, #0
800854c: 2043 movs r0, #67 @ 0x43
800854e: f7f8 ffba bl 80014c6 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(OTG_FS_IRQn);
8008552: 2043 movs r0, #67 @ 0x43
8008554: f7f8 ffd3 bl 80014fe <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_OTG_FS_MspInit 1 */
/* USER CODE END USB_OTG_FS_MspInit 1 */
}
}
8008558: bf00 nop
800855a: 3780 adds r7, #128 @ 0x80
800855c: 46bd mov sp, r7
800855e: bd80 pop {r7, pc}
8008560: 40023800 .word 0x40023800
8008564: 40020000 .word 0x40020000
08008568 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008568: b580 push {r7, lr}
800856a: b082 sub sp, #8
800856c: af00 add r7, sp, #0
800856e: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
8008570: 687b ldr r3, [r7, #4]
8008572: f8d3 24e0 ldr.w r2, [r3, #1248] @ 0x4e0
8008576: 687b ldr r3, [r7, #4]
8008578: f203 439c addw r3, r3, #1180 @ 0x49c
800857c: 4619 mov r1, r3
800857e: 4610 mov r0, r2
8008580: f7fe fbcb bl 8006d1a <USBD_LL_SetupStage>
}
8008584: bf00 nop
8008586: 3708 adds r7, #8
8008588: 46bd mov sp, r7
800858a: bd80 pop {r7, pc}
0800858c <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800858c: b580 push {r7, lr}
800858e: b082 sub sp, #8
8008590: af00 add r7, sp, #0
8008592: 6078 str r0, [r7, #4]
8008594: 460b mov r3, r1
8008596: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
8008598: 687b ldr r3, [r7, #4]
800859a: f8d3 04e0 ldr.w r0, [r3, #1248] @ 0x4e0
800859e: 78fa ldrb r2, [r7, #3]
80085a0: 6879 ldr r1, [r7, #4]
80085a2: 4613 mov r3, r2
80085a4: 00db lsls r3, r3, #3
80085a6: 4413 add r3, r2
80085a8: 009b lsls r3, r3, #2
80085aa: 440b add r3, r1
80085ac: f503 7318 add.w r3, r3, #608 @ 0x260
80085b0: 681a ldr r2, [r3, #0]
80085b2: 78fb ldrb r3, [r7, #3]
80085b4: 4619 mov r1, r3
80085b6: f7fe fc05 bl 8006dc4 <USBD_LL_DataOutStage>
}
80085ba: bf00 nop
80085bc: 3708 adds r7, #8
80085be: 46bd mov sp, r7
80085c0: bd80 pop {r7, pc}
080085c2 <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80085c2: b580 push {r7, lr}
80085c4: b082 sub sp, #8
80085c6: af00 add r7, sp, #0
80085c8: 6078 str r0, [r7, #4]
80085ca: 460b mov r3, r1
80085cc: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
80085ce: 687b ldr r3, [r7, #4]
80085d0: f8d3 04e0 ldr.w r0, [r3, #1248] @ 0x4e0
80085d4: 78fa ldrb r2, [r7, #3]
80085d6: 6879 ldr r1, [r7, #4]
80085d8: 4613 mov r3, r2
80085da: 00db lsls r3, r3, #3
80085dc: 4413 add r3, r2
80085de: 009b lsls r3, r3, #2
80085e0: 440b add r3, r1
80085e2: 3320 adds r3, #32
80085e4: 681a ldr r2, [r3, #0]
80085e6: 78fb ldrb r3, [r7, #3]
80085e8: 4619 mov r1, r3
80085ea: f7fe fca7 bl 8006f3c <USBD_LL_DataInStage>
}
80085ee: bf00 nop
80085f0: 3708 adds r7, #8
80085f2: 46bd mov sp, r7
80085f4: bd80 pop {r7, pc}
080085f6 <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80085f6: b580 push {r7, lr}
80085f8: b082 sub sp, #8
80085fa: af00 add r7, sp, #0
80085fc: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
80085fe: 687b ldr r3, [r7, #4]
8008600: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8008604: 4618 mov r0, r3
8008606: f7fe fdeb bl 80071e0 <USBD_LL_SOF>
}
800860a: bf00 nop
800860c: 3708 adds r7, #8
800860e: 46bd mov sp, r7
8008610: bd80 pop {r7, pc}
08008612 <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008612: b580 push {r7, lr}
8008614: b084 sub sp, #16
8008616: af00 add r7, sp, #0
8008618: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800861a: 2301 movs r3, #1
800861c: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed == PCD_SPEED_HIGH)
800861e: 687b ldr r3, [r7, #4]
8008620: 79db ldrb r3, [r3, #7]
8008622: 2b00 cmp r3, #0
8008624: d102 bne.n 800862c <HAL_PCD_ResetCallback+0x1a>
{
speed = USBD_SPEED_HIGH;
8008626: 2300 movs r3, #0
8008628: 73fb strb r3, [r7, #15]
800862a: e008 b.n 800863e <HAL_PCD_ResetCallback+0x2c>
}
else if ( hpcd->Init.speed == PCD_SPEED_FULL)
800862c: 687b ldr r3, [r7, #4]
800862e: 79db ldrb r3, [r3, #7]
8008630: 2b02 cmp r3, #2
8008632: d102 bne.n 800863a <HAL_PCD_ResetCallback+0x28>
{
speed = USBD_SPEED_FULL;
8008634: 2301 movs r3, #1
8008636: 73fb strb r3, [r7, #15]
8008638: e001 b.n 800863e <HAL_PCD_ResetCallback+0x2c>
}
else
{
Error_Handler();
800863a: f7f8 fb0b bl 8000c54 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800863e: 687b ldr r3, [r7, #4]
8008640: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8008644: 7bfa ldrb r2, [r7, #15]
8008646: 4611 mov r1, r2
8008648: 4618 mov r0, r3
800864a: f7fe fd85 bl 8007158 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800864e: 687b ldr r3, [r7, #4]
8008650: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8008654: 4618 mov r0, r3
8008656: f7fe fd2c bl 80070b2 <USBD_LL_Reset>
}
800865a: bf00 nop
800865c: 3710 adds r7, #16
800865e: 46bd mov sp, r7
8008660: bd80 pop {r7, pc}
...
08008664 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008664: b580 push {r7, lr}
8008666: b082 sub sp, #8
8008668: af00 add r7, sp, #0
800866a: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800866c: 687b ldr r3, [r7, #4]
800866e: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8008672: 4618 mov r0, r3
8008674: f7fe fd80 bl 8007178 <USBD_LL_Suspend>
__HAL_PCD_GATE_PHYCLOCK(hpcd);
8008678: 687b ldr r3, [r7, #4]
800867a: 681b ldr r3, [r3, #0]
800867c: f503 6360 add.w r3, r3, #3584 @ 0xe00
8008680: 681b ldr r3, [r3, #0]
8008682: 687a ldr r2, [r7, #4]
8008684: 6812 ldr r2, [r2, #0]
8008686: f502 6260 add.w r2, r2, #3584 @ 0xe00
800868a: f043 0301 orr.w r3, r3, #1
800868e: 6013 str r3, [r2, #0]
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
8008690: 687b ldr r3, [r7, #4]
8008692: 7adb ldrb r3, [r3, #11]
8008694: 2b00 cmp r3, #0
8008696: d005 beq.n 80086a4 <HAL_PCD_SuspendCallback+0x40>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
8008698: 4b04 ldr r3, [pc, #16] @ (80086ac <HAL_PCD_SuspendCallback+0x48>)
800869a: 691b ldr r3, [r3, #16]
800869c: 4a03 ldr r2, [pc, #12] @ (80086ac <HAL_PCD_SuspendCallback+0x48>)
800869e: f043 0306 orr.w r3, r3, #6
80086a2: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
80086a4: bf00 nop
80086a6: 3708 adds r7, #8
80086a8: 46bd mov sp, r7
80086aa: bd80 pop {r7, pc}
80086ac: e000ed00 .word 0xe000ed00
080086b0 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80086b0: b580 push {r7, lr}
80086b2: b082 sub sp, #8
80086b4: af00 add r7, sp, #0
80086b6: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
80086b8: 687b ldr r3, [r7, #4]
80086ba: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
80086be: 4618 mov r0, r3
80086c0: f7fe fd76 bl 80071b0 <USBD_LL_Resume>
}
80086c4: bf00 nop
80086c6: 3708 adds r7, #8
80086c8: 46bd mov sp, r7
80086ca: bd80 pop {r7, pc}
080086cc <HAL_PCD_ISOOUTIncompleteCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80086cc: b580 push {r7, lr}
80086ce: b082 sub sp, #8
80086d0: af00 add r7, sp, #0
80086d2: 6078 str r0, [r7, #4]
80086d4: 460b mov r3, r1
80086d6: 70fb strb r3, [r7, #3]
USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
80086d8: 687b ldr r3, [r7, #4]
80086da: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
80086de: 78fa ldrb r2, [r7, #3]
80086e0: 4611 mov r1, r2
80086e2: 4618 mov r0, r3
80086e4: f7fe fdce bl 8007284 <USBD_LL_IsoOUTIncomplete>
}
80086e8: bf00 nop
80086ea: 3708 adds r7, #8
80086ec: 46bd mov sp, r7
80086ee: bd80 pop {r7, pc}
080086f0 <HAL_PCD_ISOINIncompleteCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80086f0: b580 push {r7, lr}
80086f2: b082 sub sp, #8
80086f4: af00 add r7, sp, #0
80086f6: 6078 str r0, [r7, #4]
80086f8: 460b mov r3, r1
80086fa: 70fb strb r3, [r7, #3]
USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum);
80086fc: 687b ldr r3, [r7, #4]
80086fe: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8008702: 78fa ldrb r2, [r7, #3]
8008704: 4611 mov r1, r2
8008706: 4618 mov r0, r3
8008708: f7fe fd8a bl 8007220 <USBD_LL_IsoINIncomplete>
}
800870c: bf00 nop
800870e: 3708 adds r7, #8
8008710: 46bd mov sp, r7
8008712: bd80 pop {r7, pc}
08008714 <HAL_PCD_ConnectCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008714: b580 push {r7, lr}
8008716: b082 sub sp, #8
8008718: af00 add r7, sp, #0
800871a: 6078 str r0, [r7, #4]
USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData);
800871c: 687b ldr r3, [r7, #4]
800871e: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8008722: 4618 mov r0, r3
8008724: f7fe fde0 bl 80072e8 <USBD_LL_DevConnected>
}
8008728: bf00 nop
800872a: 3708 adds r7, #8
800872c: 46bd mov sp, r7
800872e: bd80 pop {r7, pc}
08008730 <HAL_PCD_DisconnectCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008730: b580 push {r7, lr}
8008732: b082 sub sp, #8
8008734: af00 add r7, sp, #0
8008736: 6078 str r0, [r7, #4]
USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData);
8008738: 687b ldr r3, [r7, #4]
800873a: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
800873e: 4618 mov r0, r3
8008740: f7fe fddd bl 80072fe <USBD_LL_DevDisconnected>
}
8008744: bf00 nop
8008746: 3708 adds r7, #8
8008748: 46bd mov sp, r7
800874a: bd80 pop {r7, pc}
0800874c <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800874c: b580 push {r7, lr}
800874e: b082 sub sp, #8
8008750: af00 add r7, sp, #0
8008752: 6078 str r0, [r7, #4]
/* Init USB Ip. */
if (pdev->id == DEVICE_FS) {
8008754: 687b ldr r3, [r7, #4]
8008756: 781b ldrb r3, [r3, #0]
8008758: 2b00 cmp r3, #0
800875a: d13c bne.n 80087d6 <USBD_LL_Init+0x8a>
/* Link the driver to the stack. */
hpcd_USB_OTG_FS.pData = pdev;
800875c: 4a20 ldr r2, [pc, #128] @ (80087e0 <USBD_LL_Init+0x94>)
800875e: 687b ldr r3, [r7, #4]
8008760: f8c2 34e0 str.w r3, [r2, #1248] @ 0x4e0
pdev->pData = &hpcd_USB_OTG_FS;
8008764: 687b ldr r3, [r7, #4]
8008766: 4a1e ldr r2, [pc, #120] @ (80087e0 <USBD_LL_Init+0x94>)
8008768: f8c3 22c8 str.w r2, [r3, #712] @ 0x2c8
hpcd_USB_OTG_FS.Instance = USB_OTG_FS;
800876c: 4b1c ldr r3, [pc, #112] @ (80087e0 <USBD_LL_Init+0x94>)
800876e: f04f 42a0 mov.w r2, #1342177280 @ 0x50000000
8008772: 601a str r2, [r3, #0]
hpcd_USB_OTG_FS.Init.dev_endpoints = 6;
8008774: 4b1a ldr r3, [pc, #104] @ (80087e0 <USBD_LL_Init+0x94>)
8008776: 2206 movs r2, #6
8008778: 711a strb r2, [r3, #4]
hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL;
800877a: 4b19 ldr r3, [pc, #100] @ (80087e0 <USBD_LL_Init+0x94>)
800877c: 2202 movs r2, #2
800877e: 71da strb r2, [r3, #7]
hpcd_USB_OTG_FS.Init.dma_enable = DISABLE;
8008780: 4b17 ldr r3, [pc, #92] @ (80087e0 <USBD_LL_Init+0x94>)
8008782: 2200 movs r2, #0
8008784: 719a strb r2, [r3, #6]
hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED;
8008786: 4b16 ldr r3, [pc, #88] @ (80087e0 <USBD_LL_Init+0x94>)
8008788: 2202 movs r2, #2
800878a: 725a strb r2, [r3, #9]
hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE;
800878c: 4b14 ldr r3, [pc, #80] @ (80087e0 <USBD_LL_Init+0x94>)
800878e: 2200 movs r2, #0
8008790: 729a strb r2, [r3, #10]
hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE;
8008792: 4b13 ldr r3, [pc, #76] @ (80087e0 <USBD_LL_Init+0x94>)
8008794: 2200 movs r2, #0
8008796: 72da strb r2, [r3, #11]
hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE;
8008798: 4b11 ldr r3, [pc, #68] @ (80087e0 <USBD_LL_Init+0x94>)
800879a: 2200 movs r2, #0
800879c: 731a strb r2, [r3, #12]
hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE;
800879e: 4b10 ldr r3, [pc, #64] @ (80087e0 <USBD_LL_Init+0x94>)
80087a0: 2200 movs r2, #0
80087a2: 739a strb r2, [r3, #14]
hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE;
80087a4: 4b0e ldr r3, [pc, #56] @ (80087e0 <USBD_LL_Init+0x94>)
80087a6: 2200 movs r2, #0
80087a8: 73da strb r2, [r3, #15]
if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK)
80087aa: 480d ldr r0, [pc, #52] @ (80087e0 <USBD_LL_Init+0x94>)
80087ac: f7f9 f9cc bl 8001b48 <HAL_PCD_Init>
80087b0: 4603 mov r3, r0
80087b2: 2b00 cmp r3, #0
80087b4: d001 beq.n 80087ba <USBD_LL_Init+0x6e>
{
Error_Handler( );
80087b6: f7f8 fa4d bl 8000c54 <Error_Handler>
HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_OTG_FS, PCD_DataOutStageCallback);
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_OTG_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80);
80087ba: 2180 movs r1, #128 @ 0x80
80087bc: 4808 ldr r0, [pc, #32] @ (80087e0 <USBD_LL_Init+0x94>)
80087be: f7fa fc14 bl 8002fea <HAL_PCDEx_SetRxFiFo>
HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40);
80087c2: 2240 movs r2, #64 @ 0x40
80087c4: 2100 movs r1, #0
80087c6: 4806 ldr r0, [pc, #24] @ (80087e0 <USBD_LL_Init+0x94>)
80087c8: f7fa fbc8 bl 8002f5c <HAL_PCDEx_SetTxFiFo>
HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80);
80087cc: 2280 movs r2, #128 @ 0x80
80087ce: 2101 movs r1, #1
80087d0: 4803 ldr r0, [pc, #12] @ (80087e0 <USBD_LL_Init+0x94>)
80087d2: f7fa fbc3 bl 8002f5c <HAL_PCDEx_SetTxFiFo>
}
return USBD_OK;
80087d6: 2300 movs r3, #0
}
80087d8: 4618 mov r0, r3
80087da: 3708 adds r7, #8
80087dc: 46bd mov sp, r7
80087de: bd80 pop {r7, pc}
80087e0: 20000894 .word 0x20000894
080087e4 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
80087e4: b580 push {r7, lr}
80087e6: b084 sub sp, #16
80087e8: af00 add r7, sp, #0
80087ea: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
80087ec: 2300 movs r3, #0
80087ee: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
80087f0: 2300 movs r3, #0
80087f2: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
80087f4: 687b ldr r3, [r7, #4]
80087f6: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
80087fa: 4618 mov r0, r3
80087fc: f7f9 faba bl 8001d74 <HAL_PCD_Start>
8008800: 4603 mov r3, r0
8008802: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008804: 7bfb ldrb r3, [r7, #15]
8008806: 4618 mov r0, r3
8008808: f000 f97e bl 8008b08 <USBD_Get_USB_Status>
800880c: 4603 mov r3, r0
800880e: 73bb strb r3, [r7, #14]
return usb_status;
8008810: 7bbb ldrb r3, [r7, #14]
}
8008812: 4618 mov r0, r3
8008814: 3710 adds r7, #16
8008816: 46bd mov sp, r7
8008818: bd80 pop {r7, pc}
0800881a <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800881a: b580 push {r7, lr}
800881c: b084 sub sp, #16
800881e: af00 add r7, sp, #0
8008820: 6078 str r0, [r7, #4]
8008822: 4608 mov r0, r1
8008824: 4611 mov r1, r2
8008826: 461a mov r2, r3
8008828: 4603 mov r3, r0
800882a: 70fb strb r3, [r7, #3]
800882c: 460b mov r3, r1
800882e: 70bb strb r3, [r7, #2]
8008830: 4613 mov r3, r2
8008832: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
8008834: 2300 movs r3, #0
8008836: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008838: 2300 movs r3, #0
800883a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800883c: 687b ldr r3, [r7, #4]
800883e: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8
8008842: 78bb ldrb r3, [r7, #2]
8008844: 883a ldrh r2, [r7, #0]
8008846: 78f9 ldrb r1, [r7, #3]
8008848: f7f9 ffbb bl 80027c2 <HAL_PCD_EP_Open>
800884c: 4603 mov r3, r0
800884e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008850: 7bfb ldrb r3, [r7, #15]
8008852: 4618 mov r0, r3
8008854: f000 f958 bl 8008b08 <USBD_Get_USB_Status>
8008858: 4603 mov r3, r0
800885a: 73bb strb r3, [r7, #14]
return usb_status;
800885c: 7bbb ldrb r3, [r7, #14]
}
800885e: 4618 mov r0, r3
8008860: 3710 adds r7, #16
8008862: 46bd mov sp, r7
8008864: bd80 pop {r7, pc}
08008866 <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008866: b580 push {r7, lr}
8008868: b084 sub sp, #16
800886a: af00 add r7, sp, #0
800886c: 6078 str r0, [r7, #4]
800886e: 460b mov r3, r1
8008870: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008872: 2300 movs r3, #0
8008874: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008876: 2300 movs r3, #0
8008878: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800887a: 687b ldr r3, [r7, #4]
800887c: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8008880: 78fa ldrb r2, [r7, #3]
8008882: 4611 mov r1, r2
8008884: 4618 mov r0, r3
8008886: f7fa f806 bl 8002896 <HAL_PCD_EP_Close>
800888a: 4603 mov r3, r0
800888c: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800888e: 7bfb ldrb r3, [r7, #15]
8008890: 4618 mov r0, r3
8008892: f000 f939 bl 8008b08 <USBD_Get_USB_Status>
8008896: 4603 mov r3, r0
8008898: 73bb strb r3, [r7, #14]
return usb_status;
800889a: 7bbb ldrb r3, [r7, #14]
}
800889c: 4618 mov r0, r3
800889e: 3710 adds r7, #16
80088a0: 46bd mov sp, r7
80088a2: bd80 pop {r7, pc}
080088a4 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
80088a4: b580 push {r7, lr}
80088a6: b084 sub sp, #16
80088a8: af00 add r7, sp, #0
80088aa: 6078 str r0, [r7, #4]
80088ac: 460b mov r3, r1
80088ae: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
80088b0: 2300 movs r3, #0
80088b2: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
80088b4: 2300 movs r3, #0
80088b6: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
80088b8: 687b ldr r3, [r7, #4]
80088ba: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
80088be: 78fa ldrb r2, [r7, #3]
80088c0: 4611 mov r1, r2
80088c2: 4618 mov r0, r3
80088c4: f7fa f8a6 bl 8002a14 <HAL_PCD_EP_SetStall>
80088c8: 4603 mov r3, r0
80088ca: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
80088cc: 7bfb ldrb r3, [r7, #15]
80088ce: 4618 mov r0, r3
80088d0: f000 f91a bl 8008b08 <USBD_Get_USB_Status>
80088d4: 4603 mov r3, r0
80088d6: 73bb strb r3, [r7, #14]
return usb_status;
80088d8: 7bbb ldrb r3, [r7, #14]
}
80088da: 4618 mov r0, r3
80088dc: 3710 adds r7, #16
80088de: 46bd mov sp, r7
80088e0: bd80 pop {r7, pc}
080088e2 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
80088e2: b580 push {r7, lr}
80088e4: b084 sub sp, #16
80088e6: af00 add r7, sp, #0
80088e8: 6078 str r0, [r7, #4]
80088ea: 460b mov r3, r1
80088ec: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
80088ee: 2300 movs r3, #0
80088f0: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
80088f2: 2300 movs r3, #0
80088f4: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
80088f6: 687b ldr r3, [r7, #4]
80088f8: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
80088fc: 78fa ldrb r2, [r7, #3]
80088fe: 4611 mov r1, r2
8008900: 4618 mov r0, r3
8008902: f7fa f8ea bl 8002ada <HAL_PCD_EP_ClrStall>
8008906: 4603 mov r3, r0
8008908: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800890a: 7bfb ldrb r3, [r7, #15]
800890c: 4618 mov r0, r3
800890e: f000 f8fb bl 8008b08 <USBD_Get_USB_Status>
8008912: 4603 mov r3, r0
8008914: 73bb strb r3, [r7, #14]
return usb_status;
8008916: 7bbb ldrb r3, [r7, #14]
}
8008918: 4618 mov r0, r3
800891a: 3710 adds r7, #16
800891c: 46bd mov sp, r7
800891e: bd80 pop {r7, pc}
08008920 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008920: b480 push {r7}
8008922: b085 sub sp, #20
8008924: af00 add r7, sp, #0
8008926: 6078 str r0, [r7, #4]
8008928: 460b mov r3, r1
800892a: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800892c: 687b ldr r3, [r7, #4]
800892e: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8008932: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
8008934: f997 3003 ldrsb.w r3, [r7, #3]
8008938: 2b00 cmp r3, #0
800893a: da0b bge.n 8008954 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800893c: 78fb ldrb r3, [r7, #3]
800893e: f003 027f and.w r2, r3, #127 @ 0x7f
8008942: 68f9 ldr r1, [r7, #12]
8008944: 4613 mov r3, r2
8008946: 00db lsls r3, r3, #3
8008948: 4413 add r3, r2
800894a: 009b lsls r3, r3, #2
800894c: 440b add r3, r1
800894e: 3316 adds r3, #22
8008950: 781b ldrb r3, [r3, #0]
8008952: e00b b.n 800896c <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
8008954: 78fb ldrb r3, [r7, #3]
8008956: f003 027f and.w r2, r3, #127 @ 0x7f
800895a: 68f9 ldr r1, [r7, #12]
800895c: 4613 mov r3, r2
800895e: 00db lsls r3, r3, #3
8008960: 4413 add r3, r2
8008962: 009b lsls r3, r3, #2
8008964: 440b add r3, r1
8008966: f203 2356 addw r3, r3, #598 @ 0x256
800896a: 781b ldrb r3, [r3, #0]
}
}
800896c: 4618 mov r0, r3
800896e: 3714 adds r7, #20
8008970: 46bd mov sp, r7
8008972: f85d 7b04 ldr.w r7, [sp], #4
8008976: 4770 bx lr
08008978 <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
8008978: b580 push {r7, lr}
800897a: b084 sub sp, #16
800897c: af00 add r7, sp, #0
800897e: 6078 str r0, [r7, #4]
8008980: 460b mov r3, r1
8008982: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008984: 2300 movs r3, #0
8008986: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008988: 2300 movs r3, #0
800898a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800898c: 687b ldr r3, [r7, #4]
800898e: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8
8008992: 78fa ldrb r2, [r7, #3]
8008994: 4611 mov r1, r2
8008996: 4618 mov r0, r3
8008998: f7f9 feef bl 800277a <HAL_PCD_SetAddress>
800899c: 4603 mov r3, r0
800899e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
80089a0: 7bfb ldrb r3, [r7, #15]
80089a2: 4618 mov r0, r3
80089a4: f000 f8b0 bl 8008b08 <USBD_Get_USB_Status>
80089a8: 4603 mov r3, r0
80089aa: 73bb strb r3, [r7, #14]
return usb_status;
80089ac: 7bbb ldrb r3, [r7, #14]
}
80089ae: 4618 mov r0, r3
80089b0: 3710 adds r7, #16
80089b2: 46bd mov sp, r7
80089b4: bd80 pop {r7, pc}
080089b6 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
{
80089b6: b580 push {r7, lr}
80089b8: b086 sub sp, #24
80089ba: af00 add r7, sp, #0
80089bc: 60f8 str r0, [r7, #12]
80089be: 607a str r2, [r7, #4]
80089c0: 603b str r3, [r7, #0]
80089c2: 460b mov r3, r1
80089c4: 72fb strb r3, [r7, #11]
HAL_StatusTypeDef hal_status = HAL_OK;
80089c6: 2300 movs r3, #0
80089c8: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
80089ca: 2300 movs r3, #0
80089cc: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
80089ce: 68fb ldr r3, [r7, #12]
80089d0: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8
80089d4: 7af9 ldrb r1, [r7, #11]
80089d6: 683b ldr r3, [r7, #0]
80089d8: 687a ldr r2, [r7, #4]
80089da: f7f9 ffe1 bl 80029a0 <HAL_PCD_EP_Transmit>
80089de: 4603 mov r3, r0
80089e0: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
80089e2: 7dfb ldrb r3, [r7, #23]
80089e4: 4618 mov r0, r3
80089e6: f000 f88f bl 8008b08 <USBD_Get_USB_Status>
80089ea: 4603 mov r3, r0
80089ec: 75bb strb r3, [r7, #22]
return usb_status;
80089ee: 7dbb ldrb r3, [r7, #22]
}
80089f0: 4618 mov r0, r3
80089f2: 3718 adds r7, #24
80089f4: 46bd mov sp, r7
80089f6: bd80 pop {r7, pc}
080089f8 <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size)
{
80089f8: b580 push {r7, lr}
80089fa: b086 sub sp, #24
80089fc: af00 add r7, sp, #0
80089fe: 60f8 str r0, [r7, #12]
8008a00: 607a str r2, [r7, #4]
8008a02: 603b str r3, [r7, #0]
8008a04: 460b mov r3, r1
8008a06: 72fb strb r3, [r7, #11]
HAL_StatusTypeDef hal_status = HAL_OK;
8008a08: 2300 movs r3, #0
8008a0a: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8008a0c: 2300 movs r3, #0
8008a0e: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
8008a10: 68fb ldr r3, [r7, #12]
8008a12: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8
8008a16: 7af9 ldrb r1, [r7, #11]
8008a18: 683b ldr r3, [r7, #0]
8008a1a: 687a ldr r2, [r7, #4]
8008a1c: f7f9 ff85 bl 800292a <HAL_PCD_EP_Receive>
8008a20: 4603 mov r3, r0
8008a22: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8008a24: 7dfb ldrb r3, [r7, #23]
8008a26: 4618 mov r0, r3
8008a28: f000 f86e bl 8008b08 <USBD_Get_USB_Status>
8008a2c: 4603 mov r3, r0
8008a2e: 75bb strb r3, [r7, #22]
return usb_status;
8008a30: 7dbb ldrb r3, [r7, #22]
}
8008a32: 4618 mov r0, r3
8008a34: 3718 adds r7, #24
8008a36: 46bd mov sp, r7
8008a38: bd80 pop {r7, pc}
...
08008a3c <HAL_PCDEx_LPM_Callback>:
* @param hpcd: PCD handle
* @param msg: LPM message
* @retval None
*/
void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg)
{
8008a3c: b580 push {r7, lr}
8008a3e: b082 sub sp, #8
8008a40: af00 add r7, sp, #0
8008a42: 6078 str r0, [r7, #4]
8008a44: 460b mov r3, r1
8008a46: 70fb strb r3, [r7, #3]
switch (msg)
8008a48: 78fb ldrb r3, [r7, #3]
8008a4a: 2b00 cmp r3, #0
8008a4c: d002 beq.n 8008a54 <HAL_PCDEx_LPM_Callback+0x18>
8008a4e: 2b01 cmp r3, #1
8008a50: d01f beq.n 8008a92 <HAL_PCDEx_LPM_Callback+0x56>
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
}
break;
}
}
8008a52: e03b b.n 8008acc <HAL_PCDEx_LPM_Callback+0x90>
if (hpcd->Init.low_power_enable)
8008a54: 687b ldr r3, [r7, #4]
8008a56: 7adb ldrb r3, [r3, #11]
8008a58: 2b00 cmp r3, #0
8008a5a: d007 beq.n 8008a6c <HAL_PCDEx_LPM_Callback+0x30>
SystemClock_Config();
8008a5c: f7f7 fda6 bl 80005ac <SystemClock_Config>
SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
8008a60: 4b1c ldr r3, [pc, #112] @ (8008ad4 <HAL_PCDEx_LPM_Callback+0x98>)
8008a62: 691b ldr r3, [r3, #16]
8008a64: 4a1b ldr r2, [pc, #108] @ (8008ad4 <HAL_PCDEx_LPM_Callback+0x98>)
8008a66: f023 0306 bic.w r3, r3, #6
8008a6a: 6113 str r3, [r2, #16]
__HAL_PCD_UNGATE_PHYCLOCK(hpcd);
8008a6c: 687b ldr r3, [r7, #4]
8008a6e: 681b ldr r3, [r3, #0]
8008a70: f503 6360 add.w r3, r3, #3584 @ 0xe00
8008a74: 681b ldr r3, [r3, #0]
8008a76: 687a ldr r2, [r7, #4]
8008a78: 6812 ldr r2, [r2, #0]
8008a7a: f502 6260 add.w r2, r2, #3584 @ 0xe00
8008a7e: f023 0301 bic.w r3, r3, #1
8008a82: 6013 str r3, [r2, #0]
USBD_LL_Resume(hpcd->pData);
8008a84: 687b ldr r3, [r7, #4]
8008a86: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8008a8a: 4618 mov r0, r3
8008a8c: f7fe fb90 bl 80071b0 <USBD_LL_Resume>
break;
8008a90: e01c b.n 8008acc <HAL_PCDEx_LPM_Callback+0x90>
__HAL_PCD_GATE_PHYCLOCK(hpcd);
8008a92: 687b ldr r3, [r7, #4]
8008a94: 681b ldr r3, [r3, #0]
8008a96: f503 6360 add.w r3, r3, #3584 @ 0xe00
8008a9a: 681b ldr r3, [r3, #0]
8008a9c: 687a ldr r2, [r7, #4]
8008a9e: 6812 ldr r2, [r2, #0]
8008aa0: f502 6260 add.w r2, r2, #3584 @ 0xe00
8008aa4: f043 0301 orr.w r3, r3, #1
8008aa8: 6013 str r3, [r2, #0]
USBD_LL_Suspend(hpcd->pData);
8008aaa: 687b ldr r3, [r7, #4]
8008aac: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0
8008ab0: 4618 mov r0, r3
8008ab2: f7fe fb61 bl 8007178 <USBD_LL_Suspend>
if (hpcd->Init.low_power_enable)
8008ab6: 687b ldr r3, [r7, #4]
8008ab8: 7adb ldrb r3, [r3, #11]
8008aba: 2b00 cmp r3, #0
8008abc: d005 beq.n 8008aca <HAL_PCDEx_LPM_Callback+0x8e>
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
8008abe: 4b05 ldr r3, [pc, #20] @ (8008ad4 <HAL_PCDEx_LPM_Callback+0x98>)
8008ac0: 691b ldr r3, [r3, #16]
8008ac2: 4a04 ldr r2, [pc, #16] @ (8008ad4 <HAL_PCDEx_LPM_Callback+0x98>)
8008ac4: f043 0306 orr.w r3, r3, #6
8008ac8: 6113 str r3, [r2, #16]
break;
8008aca: bf00 nop
}
8008acc: bf00 nop
8008ace: 3708 adds r7, #8
8008ad0: 46bd mov sp, r7
8008ad2: bd80 pop {r7, pc}
8008ad4: e000ed00 .word 0xe000ed00
08008ad8 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
8008ad8: b480 push {r7}
8008ada: b083 sub sp, #12
8008adc: af00 add r7, sp, #0
8008ade: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_HID_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
8008ae0: 4b03 ldr r3, [pc, #12] @ (8008af0 <USBD_static_malloc+0x18>)
}
8008ae2: 4618 mov r0, r3
8008ae4: 370c adds r7, #12
8008ae6: 46bd mov sp, r7
8008ae8: f85d 7b04 ldr.w r7, [sp], #4
8008aec: 4770 bx lr
8008aee: bf00 nop
8008af0: 20000d78 .word 0x20000d78
08008af4 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
8008af4: b480 push {r7}
8008af6: b083 sub sp, #12
8008af8: af00 add r7, sp, #0
8008afa: 6078 str r0, [r7, #4]
}
8008afc: bf00 nop
8008afe: 370c adds r7, #12
8008b00: 46bd mov sp, r7
8008b02: f85d 7b04 ldr.w r7, [sp], #4
8008b06: 4770 bx lr
08008b08 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
8008b08: b480 push {r7}
8008b0a: b085 sub sp, #20
8008b0c: af00 add r7, sp, #0
8008b0e: 4603 mov r3, r0
8008b10: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
8008b12: 2300 movs r3, #0
8008b14: 73fb strb r3, [r7, #15]
switch (hal_status)
8008b16: 79fb ldrb r3, [r7, #7]
8008b18: 2b03 cmp r3, #3
8008b1a: d817 bhi.n 8008b4c <USBD_Get_USB_Status+0x44>
8008b1c: a201 add r2, pc, #4 @ (adr r2, 8008b24 <USBD_Get_USB_Status+0x1c>)
8008b1e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008b22: bf00 nop
8008b24: 08008b35 .word 0x08008b35
8008b28: 08008b3b .word 0x08008b3b
8008b2c: 08008b41 .word 0x08008b41
8008b30: 08008b47 .word 0x08008b47
{
case HAL_OK :
usb_status = USBD_OK;
8008b34: 2300 movs r3, #0
8008b36: 73fb strb r3, [r7, #15]
break;
8008b38: e00b b.n 8008b52 <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
8008b3a: 2303 movs r3, #3
8008b3c: 73fb strb r3, [r7, #15]
break;
8008b3e: e008 b.n 8008b52 <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
8008b40: 2301 movs r3, #1
8008b42: 73fb strb r3, [r7, #15]
break;
8008b44: e005 b.n 8008b52 <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
8008b46: 2303 movs r3, #3
8008b48: 73fb strb r3, [r7, #15]
break;
8008b4a: e002 b.n 8008b52 <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
8008b4c: 2303 movs r3, #3
8008b4e: 73fb strb r3, [r7, #15]
break;
8008b50: bf00 nop
}
return usb_status;
8008b52: 7bfb ldrb r3, [r7, #15]
}
8008b54: 4618 mov r0, r3
8008b56: 3714 adds r7, #20
8008b58: 46bd mov sp, r7
8008b5a: f85d 7b04 ldr.w r7, [sp], #4
8008b5e: 4770 bx lr
08008b60 <memset>:
8008b60: 4402 add r2, r0
8008b62: 4603 mov r3, r0
8008b64: 4293 cmp r3, r2
8008b66: d100 bne.n 8008b6a <memset+0xa>
8008b68: 4770 bx lr
8008b6a: f803 1b01 strb.w r1, [r3], #1
8008b6e: e7f9 b.n 8008b64 <memset+0x4>
08008b70 <__libc_init_array>:
8008b70: b570 push {r4, r5, r6, lr}
8008b72: 4d0d ldr r5, [pc, #52] @ (8008ba8 <__libc_init_array+0x38>)
8008b74: 4c0d ldr r4, [pc, #52] @ (8008bac <__libc_init_array+0x3c>)
8008b76: 1b64 subs r4, r4, r5
8008b78: 10a4 asrs r4, r4, #2
8008b7a: 2600 movs r6, #0
8008b7c: 42a6 cmp r6, r4
8008b7e: d109 bne.n 8008b94 <__libc_init_array+0x24>
8008b80: 4d0b ldr r5, [pc, #44] @ (8008bb0 <__libc_init_array+0x40>)
8008b82: 4c0c ldr r4, [pc, #48] @ (8008bb4 <__libc_init_array+0x44>)
8008b84: f000 f818 bl 8008bb8 <_init>
8008b88: 1b64 subs r4, r4, r5
8008b8a: 10a4 asrs r4, r4, #2
8008b8c: 2600 movs r6, #0
8008b8e: 42a6 cmp r6, r4
8008b90: d105 bne.n 8008b9e <__libc_init_array+0x2e>
8008b92: bd70 pop {r4, r5, r6, pc}
8008b94: f855 3b04 ldr.w r3, [r5], #4
8008b98: 4798 blx r3
8008b9a: 3601 adds r6, #1
8008b9c: e7ee b.n 8008b7c <__libc_init_array+0xc>
8008b9e: f855 3b04 ldr.w r3, [r5], #4
8008ba2: 4798 blx r3
8008ba4: 3601 adds r6, #1
8008ba6: e7f2 b.n 8008b8e <__libc_init_array+0x1e>
8008ba8: 08008c2c .word 0x08008c2c
8008bac: 08008c2c .word 0x08008c2c
8008bb0: 08008c2c .word 0x08008c2c
8008bb4: 08008c30 .word 0x08008c30
08008bb8 <_init>:
8008bb8: b5f8 push {r3, r4, r5, r6, r7, lr}
8008bba: bf00 nop
8008bbc: bcf8 pop {r3, r4, r5, r6, r7}
8008bbe: bc08 pop {r3}
8008bc0: 469e mov lr, r3
8008bc2: 4770 bx lr
08008bc4 <_fini>:
8008bc4: b5f8 push {r3, r4, r5, r6, r7, lr}
8008bc6: bf00 nop
8008bc8: bcf8 pop {r3, r4, r5, r6, r7}
8008bca: bc08 pop {r3}
8008bcc: 469e mov lr, r3
8008bce: 4770 bx lr
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