modularkbd.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001c4 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00009390 080001c4 080001c4 000011c4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000054 08009554 08009554 0000a554 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 080095a8 080095a8 0000b134 2**0 CONTENTS, READONLY 4 .ARM 00000008 080095a8 080095a8 0000a5a8 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 080095b0 080095b0 0000b134 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 080095b0 080095b0 0000a5b0 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 080095b4 080095b4 0000a5b4 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 00000134 20000000 080095b8 0000b000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 00000d58 20000134 080096ec 0000b134 2**2 ALLOC 10 ._user_heap_stack 00000604 20000e8c 080096ec 0000be8c 2**0 ALLOC 11 .ARM.attributes 00000030 00000000 00000000 0000b134 2**0 CONTENTS, READONLY 12 .debug_info 00019467 00000000 00000000 0000b164 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 00003855 00000000 00000000 000245cb 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 000016a0 00000000 00000000 00027e20 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 000011ad 00000000 00000000 000294c0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 00025576 00000000 00000000 0002a66d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0001c06a 00000000 00000000 0004fbe3 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000d7ce0 00000000 00000000 0006bc4d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 0014392d 2**0 CONTENTS, READONLY 20 .debug_frame 000060cc 00000000 00000000 00143970 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 00000062 00000000 00000000 00149a3c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080001c4 <__do_global_dtors_aux>: 80001c4: b510 push {r4, lr} 80001c6: 4c05 ldr r4, [pc, #20] @ (80001dc <__do_global_dtors_aux+0x18>) 80001c8: 7823 ldrb r3, [r4, #0] 80001ca: b933 cbnz r3, 80001da <__do_global_dtors_aux+0x16> 80001cc: 4b04 ldr r3, [pc, #16] @ (80001e0 <__do_global_dtors_aux+0x1c>) 80001ce: b113 cbz r3, 80001d6 <__do_global_dtors_aux+0x12> 80001d0: 4804 ldr r0, [pc, #16] @ (80001e4 <__do_global_dtors_aux+0x20>) 80001d2: f3af 8000 nop.w 80001d6: 2301 movs r3, #1 80001d8: 7023 strb r3, [r4, #0] 80001da: bd10 pop {r4, pc} 80001dc: 20000134 .word 0x20000134 80001e0: 00000000 .word 0x00000000 80001e4: 0800953c .word 0x0800953c 080001e8 : 80001e8: b508 push {r3, lr} 80001ea: 4b03 ldr r3, [pc, #12] @ (80001f8 ) 80001ec: b11b cbz r3, 80001f6 80001ee: 4903 ldr r1, [pc, #12] @ (80001fc ) 80001f0: 4803 ldr r0, [pc, #12] @ (8000200 ) 80001f2: f3af 8000 nop.w 80001f6: bd08 pop {r3, pc} 80001f8: 00000000 .word 0x00000000 80001fc: 20000138 .word 0x20000138 8000200: 0800953c .word 0x0800953c 08000204 <__aeabi_uldivmod>: 8000204: b953 cbnz r3, 800021c <__aeabi_uldivmod+0x18> 8000206: b94a cbnz r2, 800021c <__aeabi_uldivmod+0x18> 8000208: 2900 cmp r1, #0 800020a: bf08 it eq 800020c: 2800 cmpeq r0, #0 800020e: bf1c itt ne 8000210: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff 8000214: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 8000218: f000 b988 b.w 800052c <__aeabi_idiv0> 800021c: f1ad 0c08 sub.w ip, sp, #8 8000220: e96d ce04 strd ip, lr, [sp, #-16]! 8000224: f000 f806 bl 8000234 <__udivmoddi4> 8000228: f8dd e004 ldr.w lr, [sp, #4] 800022c: e9dd 2302 ldrd r2, r3, [sp, #8] 8000230: b004 add sp, #16 8000232: 4770 bx lr 08000234 <__udivmoddi4>: 8000234: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8000238: 9d08 ldr r5, [sp, #32] 800023a: 468e mov lr, r1 800023c: 4604 mov r4, r0 800023e: 4688 mov r8, r1 8000240: 2b00 cmp r3, #0 8000242: d14a bne.n 80002da <__udivmoddi4+0xa6> 8000244: 428a cmp r2, r1 8000246: 4617 mov r7, r2 8000248: d962 bls.n 8000310 <__udivmoddi4+0xdc> 800024a: fab2 f682 clz r6, r2 800024e: b14e cbz r6, 8000264 <__udivmoddi4+0x30> 8000250: f1c6 0320 rsb r3, r6, #32 8000254: fa01 f806 lsl.w r8, r1, r6 8000258: fa20 f303 lsr.w r3, r0, r3 800025c: 40b7 lsls r7, r6 800025e: ea43 0808 orr.w r8, r3, r8 8000262: 40b4 lsls r4, r6 8000264: ea4f 4e17 mov.w lr, r7, lsr #16 8000268: fa1f fc87 uxth.w ip, r7 800026c: fbb8 f1fe udiv r1, r8, lr 8000270: 0c23 lsrs r3, r4, #16 8000272: fb0e 8811 mls r8, lr, r1, r8 8000276: ea43 4308 orr.w r3, r3, r8, lsl #16 800027a: fb01 f20c mul.w r2, r1, ip 800027e: 429a cmp r2, r3 8000280: d909 bls.n 8000296 <__udivmoddi4+0x62> 8000282: 18fb adds r3, r7, r3 8000284: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff 8000288: f080 80ea bcs.w 8000460 <__udivmoddi4+0x22c> 800028c: 429a cmp r2, r3 800028e: f240 80e7 bls.w 8000460 <__udivmoddi4+0x22c> 8000292: 3902 subs r1, #2 8000294: 443b add r3, r7 8000296: 1a9a subs r2, r3, r2 8000298: b2a3 uxth r3, r4 800029a: fbb2 f0fe udiv r0, r2, lr 800029e: fb0e 2210 mls r2, lr, r0, r2 80002a2: ea43 4302 orr.w r3, r3, r2, lsl #16 80002a6: fb00 fc0c mul.w ip, r0, ip 80002aa: 459c cmp ip, r3 80002ac: d909 bls.n 80002c2 <__udivmoddi4+0x8e> 80002ae: 18fb adds r3, r7, r3 80002b0: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff 80002b4: f080 80d6 bcs.w 8000464 <__udivmoddi4+0x230> 80002b8: 459c cmp ip, r3 80002ba: f240 80d3 bls.w 8000464 <__udivmoddi4+0x230> 80002be: 443b add r3, r7 80002c0: 3802 subs r0, #2 80002c2: ea40 4001 orr.w r0, r0, r1, lsl #16 80002c6: eba3 030c sub.w r3, r3, ip 80002ca: 2100 movs r1, #0 80002cc: b11d cbz r5, 80002d6 <__udivmoddi4+0xa2> 80002ce: 40f3 lsrs r3, r6 80002d0: 2200 movs r2, #0 80002d2: e9c5 3200 strd r3, r2, [r5] 80002d6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80002da: 428b cmp r3, r1 80002dc: d905 bls.n 80002ea <__udivmoddi4+0xb6> 80002de: b10d cbz r5, 80002e4 <__udivmoddi4+0xb0> 80002e0: e9c5 0100 strd r0, r1, [r5] 80002e4: 2100 movs r1, #0 80002e6: 4608 mov r0, r1 80002e8: e7f5 b.n 80002d6 <__udivmoddi4+0xa2> 80002ea: fab3 f183 clz r1, r3 80002ee: 2900 cmp r1, #0 80002f0: d146 bne.n 8000380 <__udivmoddi4+0x14c> 80002f2: 4573 cmp r3, lr 80002f4: d302 bcc.n 80002fc <__udivmoddi4+0xc8> 80002f6: 4282 cmp r2, r0 80002f8: f200 8105 bhi.w 8000506 <__udivmoddi4+0x2d2> 80002fc: 1a84 subs r4, r0, r2 80002fe: eb6e 0203 sbc.w r2, lr, r3 8000302: 2001 movs r0, #1 8000304: 4690 mov r8, r2 8000306: 2d00 cmp r5, #0 8000308: d0e5 beq.n 80002d6 <__udivmoddi4+0xa2> 800030a: e9c5 4800 strd r4, r8, [r5] 800030e: e7e2 b.n 80002d6 <__udivmoddi4+0xa2> 8000310: 2a00 cmp r2, #0 8000312: f000 8090 beq.w 8000436 <__udivmoddi4+0x202> 8000316: fab2 f682 clz r6, r2 800031a: 2e00 cmp r6, #0 800031c: f040 80a4 bne.w 8000468 <__udivmoddi4+0x234> 8000320: 1a8a subs r2, r1, r2 8000322: 0c03 lsrs r3, r0, #16 8000324: ea4f 4e17 mov.w lr, r7, lsr #16 8000328: b280 uxth r0, r0 800032a: b2bc uxth r4, r7 800032c: 2101 movs r1, #1 800032e: fbb2 fcfe udiv ip, r2, lr 8000332: fb0e 221c mls r2, lr, ip, r2 8000336: ea43 4302 orr.w r3, r3, r2, lsl #16 800033a: fb04 f20c mul.w r2, r4, ip 800033e: 429a cmp r2, r3 8000340: d907 bls.n 8000352 <__udivmoddi4+0x11e> 8000342: 18fb adds r3, r7, r3 8000344: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff 8000348: d202 bcs.n 8000350 <__udivmoddi4+0x11c> 800034a: 429a cmp r2, r3 800034c: f200 80e0 bhi.w 8000510 <__udivmoddi4+0x2dc> 8000350: 46c4 mov ip, r8 8000352: 1a9b subs r3, r3, r2 8000354: fbb3 f2fe udiv r2, r3, lr 8000358: fb0e 3312 mls r3, lr, r2, r3 800035c: ea40 4303 orr.w r3, r0, r3, lsl #16 8000360: fb02 f404 mul.w r4, r2, r4 8000364: 429c cmp r4, r3 8000366: d907 bls.n 8000378 <__udivmoddi4+0x144> 8000368: 18fb adds r3, r7, r3 800036a: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff 800036e: d202 bcs.n 8000376 <__udivmoddi4+0x142> 8000370: 429c cmp r4, r3 8000372: f200 80ca bhi.w 800050a <__udivmoddi4+0x2d6> 8000376: 4602 mov r2, r0 8000378: 1b1b subs r3, r3, r4 800037a: ea42 400c orr.w r0, r2, ip, lsl #16 800037e: e7a5 b.n 80002cc <__udivmoddi4+0x98> 8000380: f1c1 0620 rsb r6, r1, #32 8000384: 408b lsls r3, r1 8000386: fa22 f706 lsr.w r7, r2, r6 800038a: 431f orrs r7, r3 800038c: fa0e f401 lsl.w r4, lr, r1 8000390: fa20 f306 lsr.w r3, r0, r6 8000394: fa2e fe06 lsr.w lr, lr, r6 8000398: ea4f 4917 mov.w r9, r7, lsr #16 800039c: 4323 orrs r3, r4 800039e: fa00 f801 lsl.w r8, r0, r1 80003a2: fa1f fc87 uxth.w ip, r7 80003a6: fbbe f0f9 udiv r0, lr, r9 80003aa: 0c1c lsrs r4, r3, #16 80003ac: fb09 ee10 mls lr, r9, r0, lr 80003b0: ea44 440e orr.w r4, r4, lr, lsl #16 80003b4: fb00 fe0c mul.w lr, r0, ip 80003b8: 45a6 cmp lr, r4 80003ba: fa02 f201 lsl.w r2, r2, r1 80003be: d909 bls.n 80003d4 <__udivmoddi4+0x1a0> 80003c0: 193c adds r4, r7, r4 80003c2: f100 3aff add.w sl, r0, #4294967295 @ 0xffffffff 80003c6: f080 809c bcs.w 8000502 <__udivmoddi4+0x2ce> 80003ca: 45a6 cmp lr, r4 80003cc: f240 8099 bls.w 8000502 <__udivmoddi4+0x2ce> 80003d0: 3802 subs r0, #2 80003d2: 443c add r4, r7 80003d4: eba4 040e sub.w r4, r4, lr 80003d8: fa1f fe83 uxth.w lr, r3 80003dc: fbb4 f3f9 udiv r3, r4, r9 80003e0: fb09 4413 mls r4, r9, r3, r4 80003e4: ea4e 4404 orr.w r4, lr, r4, lsl #16 80003e8: fb03 fc0c mul.w ip, r3, ip 80003ec: 45a4 cmp ip, r4 80003ee: d908 bls.n 8000402 <__udivmoddi4+0x1ce> 80003f0: 193c adds r4, r7, r4 80003f2: f103 3eff add.w lr, r3, #4294967295 @ 0xffffffff 80003f6: f080 8082 bcs.w 80004fe <__udivmoddi4+0x2ca> 80003fa: 45a4 cmp ip, r4 80003fc: d97f bls.n 80004fe <__udivmoddi4+0x2ca> 80003fe: 3b02 subs r3, #2 8000400: 443c add r4, r7 8000402: ea43 4000 orr.w r0, r3, r0, lsl #16 8000406: eba4 040c sub.w r4, r4, ip 800040a: fba0 ec02 umull lr, ip, r0, r2 800040e: 4564 cmp r4, ip 8000410: 4673 mov r3, lr 8000412: 46e1 mov r9, ip 8000414: d362 bcc.n 80004dc <__udivmoddi4+0x2a8> 8000416: d05f beq.n 80004d8 <__udivmoddi4+0x2a4> 8000418: b15d cbz r5, 8000432 <__udivmoddi4+0x1fe> 800041a: ebb8 0203 subs.w r2, r8, r3 800041e: eb64 0409 sbc.w r4, r4, r9 8000422: fa04 f606 lsl.w r6, r4, r6 8000426: fa22 f301 lsr.w r3, r2, r1 800042a: 431e orrs r6, r3 800042c: 40cc lsrs r4, r1 800042e: e9c5 6400 strd r6, r4, [r5] 8000432: 2100 movs r1, #0 8000434: e74f b.n 80002d6 <__udivmoddi4+0xa2> 8000436: fbb1 fcf2 udiv ip, r1, r2 800043a: 0c01 lsrs r1, r0, #16 800043c: ea41 410e orr.w r1, r1, lr, lsl #16 8000440: b280 uxth r0, r0 8000442: ea40 4201 orr.w r2, r0, r1, lsl #16 8000446: 463b mov r3, r7 8000448: 4638 mov r0, r7 800044a: 463c mov r4, r7 800044c: 46b8 mov r8, r7 800044e: 46be mov lr, r7 8000450: 2620 movs r6, #32 8000452: fbb1 f1f7 udiv r1, r1, r7 8000456: eba2 0208 sub.w r2, r2, r8 800045a: ea41 410c orr.w r1, r1, ip, lsl #16 800045e: e766 b.n 800032e <__udivmoddi4+0xfa> 8000460: 4601 mov r1, r0 8000462: e718 b.n 8000296 <__udivmoddi4+0x62> 8000464: 4610 mov r0, r2 8000466: e72c b.n 80002c2 <__udivmoddi4+0x8e> 8000468: f1c6 0220 rsb r2, r6, #32 800046c: fa2e f302 lsr.w r3, lr, r2 8000470: 40b7 lsls r7, r6 8000472: 40b1 lsls r1, r6 8000474: fa20 f202 lsr.w r2, r0, r2 8000478: ea4f 4e17 mov.w lr, r7, lsr #16 800047c: 430a orrs r2, r1 800047e: fbb3 f8fe udiv r8, r3, lr 8000482: b2bc uxth r4, r7 8000484: fb0e 3318 mls r3, lr, r8, r3 8000488: 0c11 lsrs r1, r2, #16 800048a: ea41 4103 orr.w r1, r1, r3, lsl #16 800048e: fb08 f904 mul.w r9, r8, r4 8000492: 40b0 lsls r0, r6 8000494: 4589 cmp r9, r1 8000496: ea4f 4310 mov.w r3, r0, lsr #16 800049a: b280 uxth r0, r0 800049c: d93e bls.n 800051c <__udivmoddi4+0x2e8> 800049e: 1879 adds r1, r7, r1 80004a0: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff 80004a4: d201 bcs.n 80004aa <__udivmoddi4+0x276> 80004a6: 4589 cmp r9, r1 80004a8: d81f bhi.n 80004ea <__udivmoddi4+0x2b6> 80004aa: eba1 0109 sub.w r1, r1, r9 80004ae: fbb1 f9fe udiv r9, r1, lr 80004b2: fb09 f804 mul.w r8, r9, r4 80004b6: fb0e 1119 mls r1, lr, r9, r1 80004ba: b292 uxth r2, r2 80004bc: ea42 4201 orr.w r2, r2, r1, lsl #16 80004c0: 4542 cmp r2, r8 80004c2: d229 bcs.n 8000518 <__udivmoddi4+0x2e4> 80004c4: 18ba adds r2, r7, r2 80004c6: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff 80004ca: d2c4 bcs.n 8000456 <__udivmoddi4+0x222> 80004cc: 4542 cmp r2, r8 80004ce: d2c2 bcs.n 8000456 <__udivmoddi4+0x222> 80004d0: f1a9 0102 sub.w r1, r9, #2 80004d4: 443a add r2, r7 80004d6: e7be b.n 8000456 <__udivmoddi4+0x222> 80004d8: 45f0 cmp r8, lr 80004da: d29d bcs.n 8000418 <__udivmoddi4+0x1e4> 80004dc: ebbe 0302 subs.w r3, lr, r2 80004e0: eb6c 0c07 sbc.w ip, ip, r7 80004e4: 3801 subs r0, #1 80004e6: 46e1 mov r9, ip 80004e8: e796 b.n 8000418 <__udivmoddi4+0x1e4> 80004ea: eba7 0909 sub.w r9, r7, r9 80004ee: 4449 add r1, r9 80004f0: f1a8 0c02 sub.w ip, r8, #2 80004f4: fbb1 f9fe udiv r9, r1, lr 80004f8: fb09 f804 mul.w r8, r9, r4 80004fc: e7db b.n 80004b6 <__udivmoddi4+0x282> 80004fe: 4673 mov r3, lr 8000500: e77f b.n 8000402 <__udivmoddi4+0x1ce> 8000502: 4650 mov r0, sl 8000504: e766 b.n 80003d4 <__udivmoddi4+0x1a0> 8000506: 4608 mov r0, r1 8000508: e6fd b.n 8000306 <__udivmoddi4+0xd2> 800050a: 443b add r3, r7 800050c: 3a02 subs r2, #2 800050e: e733 b.n 8000378 <__udivmoddi4+0x144> 8000510: f1ac 0c02 sub.w ip, ip, #2 8000514: 443b add r3, r7 8000516: e71c b.n 8000352 <__udivmoddi4+0x11e> 8000518: 4649 mov r1, r9 800051a: e79c b.n 8000456 <__udivmoddi4+0x222> 800051c: eba1 0109 sub.w r1, r1, r9 8000520: 46c4 mov ip, r8 8000522: fbb1 f9fe udiv r9, r1, lr 8000526: fb09 f804 mul.w r8, r9, r4 800052a: e7c4 b.n 80004b6 <__udivmoddi4+0x282> 0800052c <__aeabi_idiv0>: 800052c: 4770 bx lr 800052e: bf00 nop 08000530
: /** * @brief The application entry point. * @retval int */ int main(void) { 8000530: b580 push {r7, lr} 8000532: b084 sub sp, #16 8000534: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8000536: f000 ff31 bl 800139c /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 800053a: f000 f88b bl 8000654 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 800053e: f000 faa1 bl 8000a84 MX_TIM2_Init(); 8000542: f000 f921 bl 8000788 MX_TIM3_Init(); 8000546: f000 f977 bl 8000838 MX_UART4_Init(); 800054a: f000 f9c9 bl 80008e0 MX_UART5_Init(); 800054e: f000 f9f1 bl 8000934 MX_USART1_UART_Init(); 8000552: f000 fa19 bl 8000988 MX_USART2_UART_Init(); 8000556: f000 fa41 bl 80009dc MX_I2C1_Init(); 800055a: f000 f8e7 bl 800072c MX_USART3_UART_Init(); 800055e: f000 fa67 bl 8000a30 MX_USB_DEVICE_Init(); 8000562: f008 fb11 bl 8008b88 /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { if (MODE != MODE_INACTIVE){ 8000566: 4b2f ldr r3, [pc, #188] @ (8000624 ) 8000568: 781b ldrb r3, [r3, #0] 800056a: b2db uxtb r3, r3 800056c: 2b00 cmp r3, #0 800056e: d034 beq.n 80005da //Reset Report resetReport(); 8000570: f000 fc3c bl 8000dec //Query Neighbors UARTMessage query; query.depth = DEPTH; 8000574: 4b2c ldr r3, [pc, #176] @ (8000628 ) 8000576: 881b ldrh r3, [r3, #0] 8000578: 803b strh r3, [r7, #0] query.msgType = 0x01; 800057a: 2301 movs r3, #1 800057c: 807b strh r3, [r7, #2] memset(query.keypress, 0,sizeof(query.keypress)); 800057e: 463b mov r3, r7 8000580: 3304 adds r3, #4 8000582: 220c movs r2, #12 8000584: 2100 movs r1, #0 8000586: 4618 mov r0, r3 8000588: f008 ffac bl 80094e4 HAL_UART_Transmit_DMA(&huart1, (uint8_t*)&query, sizeof(query)); 800058c: 463b mov r3, r7 800058e: 2210 movs r2, #16 8000590: 4619 mov r1, r3 8000592: 4826 ldr r0, [pc, #152] @ (800062c ) 8000594: f004 fc46 bl 8004e24 HAL_UART_Transmit_DMA(&huart2, (uint8_t*)&query, sizeof(query)); 8000598: 463b mov r3, r7 800059a: 2210 movs r2, #16 800059c: 4619 mov r1, r3 800059e: 4824 ldr r0, [pc, #144] @ (8000630 ) 80005a0: f004 fc40 bl 8004e24 HAL_UART_Transmit_DMA(&huart4, (uint8_t*)&query, sizeof(query)); 80005a4: 463b mov r3, r7 80005a6: 2210 movs r2, #16 80005a8: 4619 mov r1, r3 80005aa: 4822 ldr r0, [pc, #136] @ (8000634 ) 80005ac: f004 fc3a bl 8004e24 HAL_UART_Transmit_DMA(&huart5, (uint8_t*)&query, sizeof(query)); 80005b0: 463b mov r3, r7 80005b2: 2210 movs r2, #16 80005b4: 4619 mov r1, r3 80005b6: 4820 ldr r0, [pc, #128] @ (8000638 ) 80005b8: f004 fc34 bl 8004e24 matrixScan(); 80005bc: f000 fbbe bl 8000d3c switch (MODE){ 80005c0: 4b18 ldr r3, [pc, #96] @ (8000624 ) 80005c2: 781b ldrb r3, [r3, #0] 80005c4: b2db uxtb r3, r3 80005c6: 2b01 cmp r3, #1 80005c8: d001 beq.n 80005ce 80005ca: 2b02 cmp r3, #2 80005cc: e022 b.n 8000614 //TODO: Detect if a request is recieved break; case MODE_MAINBOARD: //Send to USB USBD_HID_SendReport(&hUsbDeviceFS, (uint8_t*)&REPORT, sizeof(REPORT)); 80005ce: 220e movs r2, #14 80005d0: 491a ldr r1, [pc, #104] @ (800063c ) 80005d2: 481b ldr r0, [pc, #108] @ (8000640 ) 80005d4: f006 fef8 bl 80073c8 break; 80005d8: e01c b.n 8000614 //TODO: Send heartbeat signal to child nodes }else{ //INACTIVE Mode //Check if the USB is enumerated/connected. if (hUsbDeviceFS.dev_state == USBD_STATE_CONFIGURED) { 80005da: 4b19 ldr r3, [pc, #100] @ (8000640 ) 80005dc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80005e0: b2db uxtb r3, r3 80005e2: 2b03 cmp r3, #3 80005e4: d116 bne.n 8000614 MODE = MODE_MAINBOARD; 80005e6: 4b0f ldr r3, [pc, #60] @ (8000624 ) 80005e8: 2201 movs r2, #1 80005ea: 701a strb r2, [r3, #0] //Enable DMA RX HAL_UART_Receive_DMA(&huart1, UART1_RX_BUFF, UART_RX_BUFF_SIZE); 80005ec: 2240 movs r2, #64 @ 0x40 80005ee: 4915 ldr r1, [pc, #84] @ (8000644 ) 80005f0: 480e ldr r0, [pc, #56] @ (800062c ) 80005f2: f004 fc93 bl 8004f1c HAL_UART_Receive_DMA(&huart2, UART2_RX_BUFF, UART_RX_BUFF_SIZE); 80005f6: 2240 movs r2, #64 @ 0x40 80005f8: 4913 ldr r1, [pc, #76] @ (8000648 ) 80005fa: 480d ldr r0, [pc, #52] @ (8000630 ) 80005fc: f004 fc8e bl 8004f1c HAL_UART_Receive_DMA(&huart4, UART4_RX_BUFF, UART_RX_BUFF_SIZE); 8000600: 2240 movs r2, #64 @ 0x40 8000602: 4912 ldr r1, [pc, #72] @ (800064c ) 8000604: 480b ldr r0, [pc, #44] @ (8000634 ) 8000606: f004 fc89 bl 8004f1c HAL_UART_Receive_DMA(&huart5, UART5_RX_BUFF, UART_RX_BUFF_SIZE); 800060a: 2240 movs r2, #64 @ 0x40 800060c: 4910 ldr r1, [pc, #64] @ (8000650 ) 800060e: 480a ldr r0, [pc, #40] @ (8000638 ) 8000610: f004 fc84 bl 8004f1c }else{ } } HAL_Delay(USBD_HID_GetPollingInterval(&hUsbDeviceFS)); 8000614: 480a ldr r0, [pc, #40] @ (8000640 ) 8000616: f006 ff07 bl 8007428 800061a: 4603 mov r3, r0 800061c: 4618 mov r0, r3 800061e: f000 ff2f bl 8001480 if (MODE != MODE_INACTIVE){ 8000622: e7a0 b.n 8000566 8000624: 200004ac .word 0x200004ac 8000628: 200004aa .word 0x200004aa 800062c: 200002c4 .word 0x200002c4 8000630: 2000030c .word 0x2000030c 8000634: 20000234 .word 0x20000234 8000638: 2000027c .word 0x2000027c 800063c: 2000049c .word 0x2000049c 8000640: 200004b8 .word 0x200004b8 8000644: 2000039c .word 0x2000039c 8000648: 200003dc .word 0x200003dc 800064c: 2000041c .word 0x2000041c 8000650: 2000045c .word 0x2000045c 08000654 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8000654: b580 push {r7, lr} 8000656: b094 sub sp, #80 @ 0x50 8000658: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 800065a: f107 031c add.w r3, r7, #28 800065e: 2234 movs r2, #52 @ 0x34 8000660: 2100 movs r1, #0 8000662: 4618 mov r0, r3 8000664: f008 ff3e bl 80094e4 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 8000668: f107 0308 add.w r3, r7, #8 800066c: 2200 movs r2, #0 800066e: 601a str r2, [r3, #0] 8000670: 605a str r2, [r3, #4] 8000672: 609a str r2, [r3, #8] 8000674: 60da str r2, [r3, #12] 8000676: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); 8000678: 2300 movs r3, #0 800067a: 607b str r3, [r7, #4] 800067c: 4b29 ldr r3, [pc, #164] @ (8000724 ) 800067e: 6c1b ldr r3, [r3, #64] @ 0x40 8000680: 4a28 ldr r2, [pc, #160] @ (8000724 ) 8000682: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8000686: 6413 str r3, [r2, #64] @ 0x40 8000688: 4b26 ldr r3, [pc, #152] @ (8000724 ) 800068a: 6c1b ldr r3, [r3, #64] @ 0x40 800068c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8000690: 607b str r3, [r7, #4] 8000692: 687b ldr r3, [r7, #4] __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); 8000694: 2300 movs r3, #0 8000696: 603b str r3, [r7, #0] 8000698: 4b23 ldr r3, [pc, #140] @ (8000728 ) 800069a: 681b ldr r3, [r3, #0] 800069c: f423 4340 bic.w r3, r3, #49152 @ 0xc000 80006a0: 4a21 ldr r2, [pc, #132] @ (8000728 ) 80006a2: f443 4380 orr.w r3, r3, #16384 @ 0x4000 80006a6: 6013 str r3, [r2, #0] 80006a8: 4b1f ldr r3, [pc, #124] @ (8000728 ) 80006aa: 681b ldr r3, [r3, #0] 80006ac: f403 4340 and.w r3, r3, #49152 @ 0xc000 80006b0: 603b str r3, [r7, #0] 80006b2: 683b ldr r3, [r7, #0] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 80006b4: 2301 movs r3, #1 80006b6: 61fb str r3, [r7, #28] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 80006b8: f44f 3380 mov.w r3, #65536 @ 0x10000 80006bc: 623b str r3, [r7, #32] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 80006be: 2302 movs r3, #2 80006c0: 637b str r3, [r7, #52] @ 0x34 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 80006c2: f44f 0380 mov.w r3, #4194304 @ 0x400000 80006c6: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.PLL.PLLM = 4; 80006c8: 2304 movs r3, #4 80006ca: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLN = 96; 80006cc: 2360 movs r3, #96 @ 0x60 80006ce: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 80006d0: 2302 movs r3, #2 80006d2: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.PLL.PLLQ = 4; 80006d4: 2304 movs r3, #4 80006d6: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.PLL.PLLR = 2; 80006d8: 2302 movs r3, #2 80006da: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 80006dc: f107 031c add.w r3, r7, #28 80006e0: 4618 mov r0, r3 80006e2: f003 fc8d bl 8004000 80006e6: 4603 mov r3, r0 80006e8: 2b00 cmp r3, #0 80006ea: d001 beq.n 80006f0 { Error_Handler(); 80006ec: f000 fb8e bl 8000e0c } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 80006f0: 230f movs r3, #15 80006f2: 60bb str r3, [r7, #8] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 80006f4: 2302 movs r3, #2 80006f6: 60fb str r3, [r7, #12] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2; 80006f8: 2380 movs r3, #128 @ 0x80 80006fa: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 80006fc: f44f 5380 mov.w r3, #4096 @ 0x1000 8000700: 617b str r3, [r7, #20] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8000702: 2300 movs r3, #0 8000704: 61bb str r3, [r7, #24] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) 8000706: f107 0308 add.w r3, r7, #8 800070a: 2101 movs r1, #1 800070c: 4618 mov r0, r3 800070e: f002 fe03 bl 8003318 8000712: 4603 mov r3, r0 8000714: 2b00 cmp r3, #0 8000716: d001 beq.n 800071c { Error_Handler(); 8000718: f000 fb78 bl 8000e0c } } 800071c: bf00 nop 800071e: 3750 adds r7, #80 @ 0x50 8000720: 46bd mov sp, r7 8000722: bd80 pop {r7, pc} 8000724: 40023800 .word 0x40023800 8000728: 40007000 .word 0x40007000 0800072c : * @brief I2C1 Initialization Function * @param None * @retval None */ static void MX_I2C1_Init(void) { 800072c: b580 push {r7, lr} 800072e: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; 8000730: 4b12 ldr r3, [pc, #72] @ (800077c ) 8000732: 4a13 ldr r2, [pc, #76] @ (8000780 ) 8000734: 601a str r2, [r3, #0] hi2c1.Init.ClockSpeed = 100000; 8000736: 4b11 ldr r3, [pc, #68] @ (800077c ) 8000738: 4a12 ldr r2, [pc, #72] @ (8000784 ) 800073a: 605a str r2, [r3, #4] hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; 800073c: 4b0f ldr r3, [pc, #60] @ (800077c ) 800073e: 2200 movs r2, #0 8000740: 609a str r2, [r3, #8] hi2c1.Init.OwnAddress1 = 0; 8000742: 4b0e ldr r3, [pc, #56] @ (800077c ) 8000744: 2200 movs r2, #0 8000746: 60da str r2, [r3, #12] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 8000748: 4b0c ldr r3, [pc, #48] @ (800077c ) 800074a: f44f 4280 mov.w r2, #16384 @ 0x4000 800074e: 611a str r2, [r3, #16] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8000750: 4b0a ldr r3, [pc, #40] @ (800077c ) 8000752: 2200 movs r2, #0 8000754: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2 = 0; 8000756: 4b09 ldr r3, [pc, #36] @ (800077c ) 8000758: 2200 movs r2, #0 800075a: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 800075c: 4b07 ldr r3, [pc, #28] @ (800077c ) 800075e: 2200 movs r2, #0 8000760: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8000762: 4b06 ldr r3, [pc, #24] @ (800077c ) 8000764: 2200 movs r2, #0 8000766: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) 8000768: 4804 ldr r0, [pc, #16] @ (800077c ) 800076a: f001 fa0b bl 8001b84 800076e: 4603 mov r3, r0 8000770: 2b00 cmp r3, #0 8000772: d001 beq.n 8000778 { Error_Handler(); 8000774: f000 fb4a bl 8000e0c } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } 8000778: bf00 nop 800077a: bd80 pop {r7, pc} 800077c: 20000150 .word 0x20000150 8000780: 40005400 .word 0x40005400 8000784: 000186a0 .word 0x000186a0 08000788 : * @brief TIM2 Initialization Function * @param None * @retval None */ static void MX_TIM2_Init(void) { 8000788: b580 push {r7, lr} 800078a: b08a sub sp, #40 @ 0x28 800078c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ TIM_MasterConfigTypeDef sMasterConfig = {0}; 800078e: f107 0320 add.w r3, r7, #32 8000792: 2200 movs r2, #0 8000794: 601a str r2, [r3, #0] 8000796: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 8000798: 1d3b adds r3, r7, #4 800079a: 2200 movs r2, #0 800079c: 601a str r2, [r3, #0] 800079e: 605a str r2, [r3, #4] 80007a0: 609a str r2, [r3, #8] 80007a2: 60da str r2, [r3, #12] 80007a4: 611a str r2, [r3, #16] 80007a6: 615a str r2, [r3, #20] 80007a8: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM2_Init 1 */ /* USER CODE END TIM2_Init 1 */ htim2.Instance = TIM2; 80007aa: 4b22 ldr r3, [pc, #136] @ (8000834 ) 80007ac: f04f 4280 mov.w r2, #1073741824 @ 0x40000000 80007b0: 601a str r2, [r3, #0] htim2.Init.Prescaler = 0; 80007b2: 4b20 ldr r3, [pc, #128] @ (8000834 ) 80007b4: 2200 movs r2, #0 80007b6: 605a str r2, [r3, #4] htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 80007b8: 4b1e ldr r3, [pc, #120] @ (8000834 ) 80007ba: 2200 movs r2, #0 80007bc: 609a str r2, [r3, #8] htim2.Init.Period = 4294967295; 80007be: 4b1d ldr r3, [pc, #116] @ (8000834 ) 80007c0: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80007c4: 60da str r2, [r3, #12] htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 80007c6: 4b1b ldr r3, [pc, #108] @ (8000834 ) 80007c8: 2200 movs r2, #0 80007ca: 611a str r2, [r3, #16] htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80007cc: 4b19 ldr r3, [pc, #100] @ (8000834 ) 80007ce: 2200 movs r2, #0 80007d0: 619a str r2, [r3, #24] if (HAL_TIM_OC_Init(&htim2) != HAL_OK) 80007d2: 4818 ldr r0, [pc, #96] @ (8000834 ) 80007d4: f003 feb2 bl 800453c 80007d8: 4603 mov r3, r0 80007da: 2b00 cmp r3, #0 80007dc: d001 beq.n 80007e2 { Error_Handler(); 80007de: f000 fb15 bl 8000e0c } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 80007e2: 2300 movs r3, #0 80007e4: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 80007e6: 2300 movs r3, #0 80007e8: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 80007ea: f107 0320 add.w r3, r7, #32 80007ee: 4619 mov r1, r3 80007f0: 4810 ldr r0, [pc, #64] @ (8000834 ) 80007f2: f004 fa4b bl 8004c8c 80007f6: 4603 mov r3, r0 80007f8: 2b00 cmp r3, #0 80007fa: d001 beq.n 8000800 { Error_Handler(); 80007fc: f000 fb06 bl 8000e0c } sConfigOC.OCMode = TIM_OCMODE_FORCED_ACTIVE; 8000800: 2350 movs r3, #80 @ 0x50 8000802: 607b str r3, [r7, #4] sConfigOC.Pulse = 0; 8000804: 2300 movs r3, #0 8000806: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 8000808: 2300 movs r3, #0 800080a: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 800080c: 2300 movs r3, #0 800080e: 617b str r3, [r7, #20] if (HAL_TIM_OC_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 8000810: 1d3b adds r3, r7, #4 8000812: 2200 movs r2, #0 8000814: 4619 mov r1, r3 8000816: 4807 ldr r0, [pc, #28] @ (8000834 ) 8000818: f003 ff86 bl 8004728 800081c: 4603 mov r3, r0 800081e: 2b00 cmp r3, #0 8000820: d001 beq.n 8000826 { Error_Handler(); 8000822: f000 faf3 bl 8000e0c } /* USER CODE BEGIN TIM2_Init 2 */ /* USER CODE END TIM2_Init 2 */ HAL_TIM_MspPostInit(&htim2); 8000826: 4803 ldr r0, [pc, #12] @ (8000834 ) 8000828: f000 fbce bl 8000fc8 } 800082c: bf00 nop 800082e: 3728 adds r7, #40 @ 0x28 8000830: 46bd mov sp, r7 8000832: bd80 pop {r7, pc} 8000834: 200001a4 .word 0x200001a4 08000838 : * @brief TIM3 Initialization Function * @param None * @retval None */ static void MX_TIM3_Init(void) { 8000838: b580 push {r7, lr} 800083a: b08c sub sp, #48 @ 0x30 800083c: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_Init 0 */ /* USER CODE END TIM3_Init 0 */ TIM_Encoder_InitTypeDef sConfig = {0}; 800083e: f107 030c add.w r3, r7, #12 8000842: 2224 movs r2, #36 @ 0x24 8000844: 2100 movs r1, #0 8000846: 4618 mov r0, r3 8000848: f008 fe4c bl 80094e4 TIM_MasterConfigTypeDef sMasterConfig = {0}; 800084c: 1d3b adds r3, r7, #4 800084e: 2200 movs r2, #0 8000850: 601a str r2, [r3, #0] 8000852: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM3_Init 1 */ /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; 8000854: 4b20 ldr r3, [pc, #128] @ (80008d8 ) 8000856: 4a21 ldr r2, [pc, #132] @ (80008dc ) 8000858: 601a str r2, [r3, #0] htim3.Init.Prescaler = 0; 800085a: 4b1f ldr r3, [pc, #124] @ (80008d8 ) 800085c: 2200 movs r2, #0 800085e: 605a str r2, [r3, #4] htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 8000860: 4b1d ldr r3, [pc, #116] @ (80008d8 ) 8000862: 2200 movs r2, #0 8000864: 609a str r2, [r3, #8] htim3.Init.Period = 65535; 8000866: 4b1c ldr r3, [pc, #112] @ (80008d8 ) 8000868: f64f 72ff movw r2, #65535 @ 0xffff 800086c: 60da str r2, [r3, #12] htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 800086e: 4b1a ldr r3, [pc, #104] @ (80008d8 ) 8000870: 2200 movs r2, #0 8000872: 611a str r2, [r3, #16] htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8000874: 4b18 ldr r3, [pc, #96] @ (80008d8 ) 8000876: 2200 movs r2, #0 8000878: 619a str r2, [r3, #24] sConfig.EncoderMode = TIM_ENCODERMODE_TI1; 800087a: 2301 movs r3, #1 800087c: 60fb str r3, [r7, #12] sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; 800087e: 2300 movs r3, #0 8000880: 613b str r3, [r7, #16] sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; 8000882: 2301 movs r3, #1 8000884: 617b str r3, [r7, #20] sConfig.IC1Prescaler = TIM_ICPSC_DIV1; 8000886: 2300 movs r3, #0 8000888: 61bb str r3, [r7, #24] sConfig.IC1Filter = 0; 800088a: 2300 movs r3, #0 800088c: 61fb str r3, [r7, #28] sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; 800088e: 2300 movs r3, #0 8000890: 623b str r3, [r7, #32] sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; 8000892: 2301 movs r3, #1 8000894: 627b str r3, [r7, #36] @ 0x24 sConfig.IC2Prescaler = TIM_ICPSC_DIV1; 8000896: 2300 movs r3, #0 8000898: 62bb str r3, [r7, #40] @ 0x28 sConfig.IC2Filter = 0; 800089a: 2300 movs r3, #0 800089c: 62fb str r3, [r7, #44] @ 0x2c if (HAL_TIM_Encoder_Init(&htim3, &sConfig) != HAL_OK) 800089e: f107 030c add.w r3, r7, #12 80008a2: 4619 mov r1, r3 80008a4: 480c ldr r0, [pc, #48] @ (80008d8 ) 80008a6: f003 fe98 bl 80045da 80008aa: 4603 mov r3, r0 80008ac: 2b00 cmp r3, #0 80008ae: d001 beq.n 80008b4 { Error_Handler(); 80008b0: f000 faac bl 8000e0c } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 80008b4: 2300 movs r3, #0 80008b6: 607b str r3, [r7, #4] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 80008b8: 2300 movs r3, #0 80008ba: 60bb str r3, [r7, #8] if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 80008bc: 1d3b adds r3, r7, #4 80008be: 4619 mov r1, r3 80008c0: 4805 ldr r0, [pc, #20] @ (80008d8 ) 80008c2: f004 f9e3 bl 8004c8c 80008c6: 4603 mov r3, r0 80008c8: 2b00 cmp r3, #0 80008ca: d001 beq.n 80008d0 { Error_Handler(); 80008cc: f000 fa9e bl 8000e0c } /* USER CODE BEGIN TIM3_Init 2 */ /* USER CODE END TIM3_Init 2 */ } 80008d0: bf00 nop 80008d2: 3730 adds r7, #48 @ 0x30 80008d4: 46bd mov sp, r7 80008d6: bd80 pop {r7, pc} 80008d8: 200001ec .word 0x200001ec 80008dc: 40000400 .word 0x40000400 080008e0 : * @brief UART4 Initialization Function * @param None * @retval None */ static void MX_UART4_Init(void) { 80008e0: b580 push {r7, lr} 80008e2: af00 add r7, sp, #0 /* USER CODE END UART4_Init 0 */ /* USER CODE BEGIN UART4_Init 1 */ /* USER CODE END UART4_Init 1 */ huart4.Instance = UART4; 80008e4: 4b11 ldr r3, [pc, #68] @ (800092c ) 80008e6: 4a12 ldr r2, [pc, #72] @ (8000930 ) 80008e8: 601a str r2, [r3, #0] huart4.Init.BaudRate = 115200; 80008ea: 4b10 ldr r3, [pc, #64] @ (800092c ) 80008ec: f44f 32e1 mov.w r2, #115200 @ 0x1c200 80008f0: 605a str r2, [r3, #4] huart4.Init.WordLength = UART_WORDLENGTH_8B; 80008f2: 4b0e ldr r3, [pc, #56] @ (800092c ) 80008f4: 2200 movs r2, #0 80008f6: 609a str r2, [r3, #8] huart4.Init.StopBits = UART_STOPBITS_1; 80008f8: 4b0c ldr r3, [pc, #48] @ (800092c ) 80008fa: 2200 movs r2, #0 80008fc: 60da str r2, [r3, #12] huart4.Init.Parity = UART_PARITY_NONE; 80008fe: 4b0b ldr r3, [pc, #44] @ (800092c ) 8000900: 2200 movs r2, #0 8000902: 611a str r2, [r3, #16] huart4.Init.Mode = UART_MODE_TX_RX; 8000904: 4b09 ldr r3, [pc, #36] @ (800092c ) 8000906: 220c movs r2, #12 8000908: 615a str r2, [r3, #20] huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800090a: 4b08 ldr r3, [pc, #32] @ (800092c ) 800090c: 2200 movs r2, #0 800090e: 619a str r2, [r3, #24] huart4.Init.OverSampling = UART_OVERSAMPLING_16; 8000910: 4b06 ldr r3, [pc, #24] @ (800092c ) 8000912: 2200 movs r2, #0 8000914: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart4) != HAL_OK) 8000916: 4805 ldr r0, [pc, #20] @ (800092c ) 8000918: f004 fa34 bl 8004d84 800091c: 4603 mov r3, r0 800091e: 2b00 cmp r3, #0 8000920: d001 beq.n 8000926 { Error_Handler(); 8000922: f000 fa73 bl 8000e0c } /* USER CODE BEGIN UART4_Init 2 */ /* USER CODE END UART4_Init 2 */ } 8000926: bf00 nop 8000928: bd80 pop {r7, pc} 800092a: bf00 nop 800092c: 20000234 .word 0x20000234 8000930: 40004c00 .word 0x40004c00 08000934 : * @brief UART5 Initialization Function * @param None * @retval None */ static void MX_UART5_Init(void) { 8000934: b580 push {r7, lr} 8000936: af00 add r7, sp, #0 /* USER CODE END UART5_Init 0 */ /* USER CODE BEGIN UART5_Init 1 */ /* USER CODE END UART5_Init 1 */ huart5.Instance = UART5; 8000938: 4b11 ldr r3, [pc, #68] @ (8000980 ) 800093a: 4a12 ldr r2, [pc, #72] @ (8000984 ) 800093c: 601a str r2, [r3, #0] huart5.Init.BaudRate = 115200; 800093e: 4b10 ldr r3, [pc, #64] @ (8000980 ) 8000940: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8000944: 605a str r2, [r3, #4] huart5.Init.WordLength = UART_WORDLENGTH_8B; 8000946: 4b0e ldr r3, [pc, #56] @ (8000980 ) 8000948: 2200 movs r2, #0 800094a: 609a str r2, [r3, #8] huart5.Init.StopBits = UART_STOPBITS_1; 800094c: 4b0c ldr r3, [pc, #48] @ (8000980 ) 800094e: 2200 movs r2, #0 8000950: 60da str r2, [r3, #12] huart5.Init.Parity = UART_PARITY_NONE; 8000952: 4b0b ldr r3, [pc, #44] @ (8000980 ) 8000954: 2200 movs r2, #0 8000956: 611a str r2, [r3, #16] huart5.Init.Mode = UART_MODE_TX_RX; 8000958: 4b09 ldr r3, [pc, #36] @ (8000980 ) 800095a: 220c movs r2, #12 800095c: 615a str r2, [r3, #20] huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800095e: 4b08 ldr r3, [pc, #32] @ (8000980 ) 8000960: 2200 movs r2, #0 8000962: 619a str r2, [r3, #24] huart5.Init.OverSampling = UART_OVERSAMPLING_16; 8000964: 4b06 ldr r3, [pc, #24] @ (8000980 ) 8000966: 2200 movs r2, #0 8000968: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart5) != HAL_OK) 800096a: 4805 ldr r0, [pc, #20] @ (8000980 ) 800096c: f004 fa0a bl 8004d84 8000970: 4603 mov r3, r0 8000972: 2b00 cmp r3, #0 8000974: d001 beq.n 800097a { Error_Handler(); 8000976: f000 fa49 bl 8000e0c } /* USER CODE BEGIN UART5_Init 2 */ /* USER CODE END UART5_Init 2 */ } 800097a: bf00 nop 800097c: bd80 pop {r7, pc} 800097e: bf00 nop 8000980: 2000027c .word 0x2000027c 8000984: 40005000 .word 0x40005000 08000988 : * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { 8000988: b580 push {r7, lr} 800098a: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 800098c: 4b11 ldr r3, [pc, #68] @ (80009d4 ) 800098e: 4a12 ldr r2, [pc, #72] @ (80009d8 ) 8000990: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 8000992: 4b10 ldr r3, [pc, #64] @ (80009d4 ) 8000994: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8000998: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 800099a: 4b0e ldr r3, [pc, #56] @ (80009d4 ) 800099c: 2200 movs r2, #0 800099e: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 80009a0: 4b0c ldr r3, [pc, #48] @ (80009d4 ) 80009a2: 2200 movs r2, #0 80009a4: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 80009a6: 4b0b ldr r3, [pc, #44] @ (80009d4 ) 80009a8: 2200 movs r2, #0 80009aa: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 80009ac: 4b09 ldr r3, [pc, #36] @ (80009d4 ) 80009ae: 220c movs r2, #12 80009b0: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80009b2: 4b08 ldr r3, [pc, #32] @ (80009d4 ) 80009b4: 2200 movs r2, #0 80009b6: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 80009b8: 4b06 ldr r3, [pc, #24] @ (80009d4 ) 80009ba: 2200 movs r2, #0 80009bc: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 80009be: 4805 ldr r0, [pc, #20] @ (80009d4 ) 80009c0: f004 f9e0 bl 8004d84 80009c4: 4603 mov r3, r0 80009c6: 2b00 cmp r3, #0 80009c8: d001 beq.n 80009ce { Error_Handler(); 80009ca: f000 fa1f bl 8000e0c } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 80009ce: bf00 nop 80009d0: bd80 pop {r7, pc} 80009d2: bf00 nop 80009d4: 200002c4 .word 0x200002c4 80009d8: 40011000 .word 0x40011000 080009dc : * @brief USART2 Initialization Function * @param None * @retval None */ static void MX_USART2_UART_Init(void) { 80009dc: b580 push {r7, lr} 80009de: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; 80009e0: 4b11 ldr r3, [pc, #68] @ (8000a28 ) 80009e2: 4a12 ldr r2, [pc, #72] @ (8000a2c ) 80009e4: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; 80009e6: 4b10 ldr r3, [pc, #64] @ (8000a28 ) 80009e8: f44f 32e1 mov.w r2, #115200 @ 0x1c200 80009ec: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 80009ee: 4b0e ldr r3, [pc, #56] @ (8000a28 ) 80009f0: 2200 movs r2, #0 80009f2: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; 80009f4: 4b0c ldr r3, [pc, #48] @ (8000a28 ) 80009f6: 2200 movs r2, #0 80009f8: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; 80009fa: 4b0b ldr r3, [pc, #44] @ (8000a28 ) 80009fc: 2200 movs r2, #0 80009fe: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; 8000a00: 4b09 ldr r3, [pc, #36] @ (8000a28 ) 8000a02: 220c movs r2, #12 8000a04: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8000a06: 4b08 ldr r3, [pc, #32] @ (8000a28 ) 8000a08: 2200 movs r2, #0 8000a0a: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 8000a0c: 4b06 ldr r3, [pc, #24] @ (8000a28 ) 8000a0e: 2200 movs r2, #0 8000a10: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 8000a12: 4805 ldr r0, [pc, #20] @ (8000a28 ) 8000a14: f004 f9b6 bl 8004d84 8000a18: 4603 mov r3, r0 8000a1a: 2b00 cmp r3, #0 8000a1c: d001 beq.n 8000a22 { Error_Handler(); 8000a1e: f000 f9f5 bl 8000e0c } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } 8000a22: bf00 nop 8000a24: bd80 pop {r7, pc} 8000a26: bf00 nop 8000a28: 2000030c .word 0x2000030c 8000a2c: 40004400 .word 0x40004400 08000a30 : * @brief USART3 Initialization Function * @param None * @retval None */ static void MX_USART3_UART_Init(void) { 8000a30: b580 push {r7, lr} 8000a32: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; 8000a34: 4b11 ldr r3, [pc, #68] @ (8000a7c ) 8000a36: 4a12 ldr r2, [pc, #72] @ (8000a80 ) 8000a38: 601a str r2, [r3, #0] huart3.Init.BaudRate = 115200; 8000a3a: 4b10 ldr r3, [pc, #64] @ (8000a7c ) 8000a3c: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8000a40: 605a str r2, [r3, #4] huart3.Init.WordLength = UART_WORDLENGTH_8B; 8000a42: 4b0e ldr r3, [pc, #56] @ (8000a7c ) 8000a44: 2200 movs r2, #0 8000a46: 609a str r2, [r3, #8] huart3.Init.StopBits = UART_STOPBITS_1; 8000a48: 4b0c ldr r3, [pc, #48] @ (8000a7c ) 8000a4a: 2200 movs r2, #0 8000a4c: 60da str r2, [r3, #12] huart3.Init.Parity = UART_PARITY_NONE; 8000a4e: 4b0b ldr r3, [pc, #44] @ (8000a7c ) 8000a50: 2200 movs r2, #0 8000a52: 611a str r2, [r3, #16] huart3.Init.Mode = UART_MODE_TX_RX; 8000a54: 4b09 ldr r3, [pc, #36] @ (8000a7c ) 8000a56: 220c movs r2, #12 8000a58: 615a str r2, [r3, #20] huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8000a5a: 4b08 ldr r3, [pc, #32] @ (8000a7c ) 8000a5c: 2200 movs r2, #0 8000a5e: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; 8000a60: 4b06 ldr r3, [pc, #24] @ (8000a7c ) 8000a62: 2200 movs r2, #0 8000a64: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart3) != HAL_OK) 8000a66: 4805 ldr r0, [pc, #20] @ (8000a7c ) 8000a68: f004 f98c bl 8004d84 8000a6c: 4603 mov r3, r0 8000a6e: 2b00 cmp r3, #0 8000a70: d001 beq.n 8000a76 { Error_Handler(); 8000a72: f000 f9cb bl 8000e0c } /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } 8000a76: bf00 nop 8000a78: bd80 pop {r7, pc} 8000a7a: bf00 nop 8000a7c: 20000354 .word 0x20000354 8000a80: 40004800 .word 0x40004800 08000a84 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 8000a84: b580 push {r7, lr} 8000a86: b08a sub sp, #40 @ 0x28 8000a88: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000a8a: f107 0314 add.w r3, r7, #20 8000a8e: 2200 movs r2, #0 8000a90: 601a str r2, [r3, #0] 8000a92: 605a str r2, [r3, #4] 8000a94: 609a str r2, [r3, #8] 8000a96: 60da str r2, [r3, #12] 8000a98: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOH_CLK_ENABLE(); 8000a9a: 2300 movs r3, #0 8000a9c: 613b str r3, [r7, #16] 8000a9e: 4b45 ldr r3, [pc, #276] @ (8000bb4 ) 8000aa0: 6b1b ldr r3, [r3, #48] @ 0x30 8000aa2: 4a44 ldr r2, [pc, #272] @ (8000bb4 ) 8000aa4: f043 0380 orr.w r3, r3, #128 @ 0x80 8000aa8: 6313 str r3, [r2, #48] @ 0x30 8000aaa: 4b42 ldr r3, [pc, #264] @ (8000bb4 ) 8000aac: 6b1b ldr r3, [r3, #48] @ 0x30 8000aae: f003 0380 and.w r3, r3, #128 @ 0x80 8000ab2: 613b str r3, [r7, #16] 8000ab4: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 8000ab6: 2300 movs r3, #0 8000ab8: 60fb str r3, [r7, #12] 8000aba: 4b3e ldr r3, [pc, #248] @ (8000bb4 ) 8000abc: 6b1b ldr r3, [r3, #48] @ 0x30 8000abe: 4a3d ldr r2, [pc, #244] @ (8000bb4 ) 8000ac0: f043 0301 orr.w r3, r3, #1 8000ac4: 6313 str r3, [r2, #48] @ 0x30 8000ac6: 4b3b ldr r3, [pc, #236] @ (8000bb4 ) 8000ac8: 6b1b ldr r3, [r3, #48] @ 0x30 8000aca: f003 0301 and.w r3, r3, #1 8000ace: 60fb str r3, [r7, #12] 8000ad0: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOC_CLK_ENABLE(); 8000ad2: 2300 movs r3, #0 8000ad4: 60bb str r3, [r7, #8] 8000ad6: 4b37 ldr r3, [pc, #220] @ (8000bb4 ) 8000ad8: 6b1b ldr r3, [r3, #48] @ 0x30 8000ada: 4a36 ldr r2, [pc, #216] @ (8000bb4 ) 8000adc: f043 0304 orr.w r3, r3, #4 8000ae0: 6313 str r3, [r2, #48] @ 0x30 8000ae2: 4b34 ldr r3, [pc, #208] @ (8000bb4 ) 8000ae4: 6b1b ldr r3, [r3, #48] @ 0x30 8000ae6: f003 0304 and.w r3, r3, #4 8000aea: 60bb str r3, [r7, #8] 8000aec: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8000aee: 2300 movs r3, #0 8000af0: 607b str r3, [r7, #4] 8000af2: 4b30 ldr r3, [pc, #192] @ (8000bb4 ) 8000af4: 6b1b ldr r3, [r3, #48] @ 0x30 8000af6: 4a2f ldr r2, [pc, #188] @ (8000bb4 ) 8000af8: f043 0302 orr.w r3, r3, #2 8000afc: 6313 str r3, [r2, #48] @ 0x30 8000afe: 4b2d ldr r3, [pc, #180] @ (8000bb4 ) 8000b00: 6b1b ldr r3, [r3, #48] @ 0x30 8000b02: f003 0302 and.w r3, r3, #2 8000b06: 607b str r3, [r7, #4] 8000b08: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 8000b0a: 2300 movs r3, #0 8000b0c: 603b str r3, [r7, #0] 8000b0e: 4b29 ldr r3, [pc, #164] @ (8000bb4 ) 8000b10: 6b1b ldr r3, [r3, #48] @ 0x30 8000b12: 4a28 ldr r2, [pc, #160] @ (8000bb4 ) 8000b14: f043 0308 orr.w r3, r3, #8 8000b18: 6313 str r3, [r2, #48] @ 0x30 8000b1a: 4b26 ldr r3, [pc, #152] @ (8000bb4 ) 8000b1c: 6b1b ldr r3, [r3, #48] @ 0x30 8000b1e: f003 0308 and.w r3, r3, #8 8000b22: 603b str r3, [r7, #0] 8000b24: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9, GPIO_PIN_RESET); 8000b26: 2200 movs r2, #0 8000b28: f44f 7170 mov.w r1, #960 @ 0x3c0 8000b2c: 4822 ldr r0, [pc, #136] @ (8000bb8 ) 8000b2e: f001 f80f bl 8001b50 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); 8000b32: 2200 movs r2, #0 8000b34: f44f 7180 mov.w r1, #256 @ 0x100 8000b38: 4820 ldr r0, [pc, #128] @ (8000bbc ) 8000b3a: f001 f809 bl 8001b50 /*Configure GPIO pins : PC4 PC5 */ GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; 8000b3e: 2330 movs r3, #48 @ 0x30 8000b40: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8000b42: 2300 movs r3, #0 8000b44: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 8000b46: 2302 movs r3, #2 8000b48: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8000b4a: f107 0314 add.w r3, r7, #20 8000b4e: 4619 mov r1, r3 8000b50: 4819 ldr r0, [pc, #100] @ (8000bb8 ) 8000b52: f000 fe51 bl 80017f8 /*Configure GPIO pins : PB0 PB1 PB2 PB10 */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_10; 8000b56: f240 4307 movw r3, #1031 @ 0x407 8000b5a: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8000b5c: 2300 movs r3, #0 8000b5e: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 8000b60: 2302 movs r3, #2 8000b62: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8000b64: f107 0314 add.w r3, r7, #20 8000b68: 4619 mov r1, r3 8000b6a: 4815 ldr r0, [pc, #84] @ (8000bc0 ) 8000b6c: f000 fe44 bl 80017f8 /*Configure GPIO pins : PC6 PC7 PC8 PC9 */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9; 8000b70: f44f 7370 mov.w r3, #960 @ 0x3c0 8000b74: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8000b76: 2301 movs r3, #1 8000b78: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 8000b7a: 2302 movs r3, #2 8000b7c: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000b7e: 2300 movs r3, #0 8000b80: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8000b82: f107 0314 add.w r3, r7, #20 8000b86: 4619 mov r1, r3 8000b88: 480b ldr r0, [pc, #44] @ (8000bb8 ) 8000b8a: f000 fe35 bl 80017f8 /*Configure GPIO pin : PA8 */ GPIO_InitStruct.Pin = GPIO_PIN_8; 8000b8e: f44f 7380 mov.w r3, #256 @ 0x100 8000b92: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8000b94: 2301 movs r3, #1 8000b96: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_PULLDOWN; 8000b98: 2302 movs r3, #2 8000b9a: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000b9c: 2300 movs r3, #0 8000b9e: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000ba0: f107 0314 add.w r3, r7, #20 8000ba4: 4619 mov r1, r3 8000ba6: 4805 ldr r0, [pc, #20] @ (8000bbc ) 8000ba8: f000 fe26 bl 80017f8 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 8000bac: bf00 nop 8000bae: 3728 adds r7, #40 @ 0x28 8000bb0: 46bd mov sp, r7 8000bb2: bd80 pop {r7, pc} 8000bb4: 40023800 .word 0x40023800 8000bb8: 40020800 .word 0x40020800 8000bbc: 40020000 .word 0x40020000 8000bc0: 40020400 .word 0x40020400 08000bc4 : /* USER CODE BEGIN 4 */ //UART Message Requests Goes Here void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart){ 8000bc4: b580 push {r7, lr} 8000bc6: b082 sub sp, #8 8000bc8: af00 add r7, sp, #0 8000bca: 6078 str r0, [r7, #4] if(huart->Instance == USART1){ 8000bcc: 687b ldr r3, [r7, #4] 8000bce: 681b ldr r3, [r3, #0] 8000bd0: 4a07 ldr r2, [pc, #28] @ (8000bf0 ) 8000bd2: 4293 cmp r3, r2 8000bd4: d108 bne.n 8000be8 handleUARTMessages(UART1_RX_BUFF, huart); 8000bd6: 6879 ldr r1, [r7, #4] 8000bd8: 4806 ldr r0, [pc, #24] @ (8000bf4 ) 8000bda: f000 f80d bl 8000bf8 HAL_UART_Receive_DMA(huart, UART1_RX_BUFF, UART_RX_BUFF_SIZE); 8000bde: 2240 movs r2, #64 @ 0x40 8000be0: 4904 ldr r1, [pc, #16] @ (8000bf4 ) 8000be2: 6878 ldr r0, [r7, #4] 8000be4: f004 f99a bl 8004f1c } } 8000be8: bf00 nop 8000bea: 3708 adds r7, #8 8000bec: 46bd mov sp, r7 8000bee: bd80 pop {r7, pc} 8000bf0: 40011000 .word 0x40011000 8000bf4: 2000039c .word 0x2000039c 08000bf8 : void handleUARTMessages(uint8_t *data, UART_HandleTypeDef *sender){ 8000bf8: b580 push {r7, lr} 8000bfa: b08c sub sp, #48 @ 0x30 8000bfc: af00 add r7, sp, #0 8000bfe: 6078 str r0, [r7, #4] 8000c00: 6039 str r1, [r7, #0] UARTMessage msg; UARTMessage res; // Parse incoming message msg.depth = (data[0]<<8) | data[1]; 8000c02: 687b ldr r3, [r7, #4] 8000c04: 781b ldrb r3, [r3, #0] 8000c06: b21b sxth r3, r3 8000c08: 021b lsls r3, r3, #8 8000c0a: b21a sxth r2, r3 8000c0c: 687b ldr r3, [r7, #4] 8000c0e: 3301 adds r3, #1 8000c10: 781b ldrb r3, [r3, #0] 8000c12: b21b sxth r3, r3 8000c14: 4313 orrs r3, r2 8000c16: b21b sxth r3, r3 8000c18: b29b uxth r3, r3 8000c1a: 83bb strh r3, [r7, #28] msg.msgType = (data[2]<<8) | data[3]; 8000c1c: 687b ldr r3, [r7, #4] 8000c1e: 3302 adds r3, #2 8000c20: 781b ldrb r3, [r3, #0] 8000c22: b21b sxth r3, r3 8000c24: 021b lsls r3, r3, #8 8000c26: b21a sxth r2, r3 8000c28: 687b ldr r3, [r7, #4] 8000c2a: 3303 adds r3, #3 8000c2c: 781b ldrb r3, [r3, #0] 8000c2e: b21b sxth r3, r3 8000c30: 4313 orrs r3, r2 8000c32: b21b sxth r3, r3 8000c34: b29b uxth r3, r3 8000c36: 83fb strh r3, [r7, #30] memcpy(msg.keypress, &data[4], 12); 8000c38: 687b ldr r3, [r7, #4] 8000c3a: 1d1a adds r2, r3, #4 8000c3c: f107 0320 add.w r3, r7, #32 8000c40: 6810 ldr r0, [r2, #0] 8000c42: 6851 ldr r1, [r2, #4] 8000c44: 6892 ldr r2, [r2, #8] 8000c46: c307 stmia r3!, {r0, r1, r2} switch(msg.msgType){ 8000c48: 8bfb ldrh r3, [r7, #30] 8000c4a: 2b01 cmp r3, #1 8000c4c: d002 beq.n 8000c54 8000c4e: 2b10 cmp r3, #16 8000c50: d01b beq.n 8000c8a for (int i = 0; i < 12; i++) { REPORT.KEYPRESS[i] |= msg.keypress[i]; } break; } } 8000c52: e037 b.n 8000cc4 if (sender->gState == HAL_UART_STATE_READY) { 8000c54: 683b ldr r3, [r7, #0] 8000c56: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8000c5a: b2db uxtb r3, r3 8000c5c: 2b20 cmp r3, #32 8000c5e: d130 bne.n 8000cc2 res.depth = DEPTH; 8000c60: 4b1a ldr r3, [pc, #104] @ (8000ccc ) 8000c62: 881b ldrh r3, [r3, #0] 8000c64: 81bb strh r3, [r7, #12] res.msgType = 0x10; 8000c66: 2310 movs r3, #16 8000c68: 81fb strh r3, [r7, #14] memcpy(res.keypress, &REPORT.KEYPRESS, sizeof(REPORT.KEYPRESS)); 8000c6a: 4a19 ldr r2, [pc, #100] @ (8000cd0 ) 8000c6c: f107 0310 add.w r3, r7, #16 8000c70: 3202 adds r2, #2 8000c72: 6810 ldr r0, [r2, #0] 8000c74: 6851 ldr r1, [r2, #4] 8000c76: 6892 ldr r2, [r2, #8] 8000c78: c307 stmia r3!, {r0, r1, r2} HAL_UART_Transmit_DMA(sender, (uint8_t *)&res, sizeof(res)); 8000c7a: f107 030c add.w r3, r7, #12 8000c7e: 2210 movs r2, #16 8000c80: 4619 mov r1, r3 8000c82: 6838 ldr r0, [r7, #0] 8000c84: f004 f8ce bl 8004e24 break; 8000c88: e01b b.n 8000cc2 for (int i = 0; i < 12; i++) { 8000c8a: 2300 movs r3, #0 8000c8c: 62fb str r3, [r7, #44] @ 0x2c 8000c8e: e014 b.n 8000cba REPORT.KEYPRESS[i] |= msg.keypress[i]; 8000c90: 4a0f ldr r2, [pc, #60] @ (8000cd0 ) 8000c92: 6afb ldr r3, [r7, #44] @ 0x2c 8000c94: 4413 add r3, r2 8000c96: 3302 adds r3, #2 8000c98: 781a ldrb r2, [r3, #0] 8000c9a: f107 0120 add.w r1, r7, #32 8000c9e: 6afb ldr r3, [r7, #44] @ 0x2c 8000ca0: 440b add r3, r1 8000ca2: 781b ldrb r3, [r3, #0] 8000ca4: 4313 orrs r3, r2 8000ca6: b2d9 uxtb r1, r3 8000ca8: 4a09 ldr r2, [pc, #36] @ (8000cd0 ) 8000caa: 6afb ldr r3, [r7, #44] @ 0x2c 8000cac: 4413 add r3, r2 8000cae: 3302 adds r3, #2 8000cb0: 460a mov r2, r1 8000cb2: 701a strb r2, [r3, #0] for (int i = 0; i < 12; i++) { 8000cb4: 6afb ldr r3, [r7, #44] @ 0x2c 8000cb6: 3301 adds r3, #1 8000cb8: 62fb str r3, [r7, #44] @ 0x2c 8000cba: 6afb ldr r3, [r7, #44] @ 0x2c 8000cbc: 2b0b cmp r3, #11 8000cbe: dde7 ble.n 8000c90 break; 8000cc0: e000 b.n 8000cc4 break; 8000cc2: bf00 nop } 8000cc4: bf00 nop 8000cc6: 3730 adds r7, #48 @ 0x30 8000cc8: 46bd mov sp, r7 8000cca: bd80 pop {r7, pc} 8000ccc: 200004aa .word 0x200004aa 8000cd0: 2000049c .word 0x2000049c 08000cd4 : void addUSBReport(uint8_t usageID){ 8000cd4: b480 push {r7} 8000cd6: b085 sub sp, #20 8000cd8: af00 add r7, sp, #0 8000cda: 4603 mov r3, r0 8000cdc: 71fb strb r3, [r7, #7] if(usageID < 0x04 || usageID > 0x73) return; //Usage ID is out of bounds 8000cde: 79fb ldrb r3, [r7, #7] 8000ce0: 2b03 cmp r3, #3 8000ce2: d922 bls.n 8000d2a 8000ce4: 79fb ldrb r3, [r7, #7] 8000ce6: 2b73 cmp r3, #115 @ 0x73 8000ce8: d81f bhi.n 8000d2a uint16_t bit_index = usageID - 0x04; //Offset, UsageID starts with 0x04. Gives us the actual value of the bit 8000cea: 79fb ldrb r3, [r7, #7] 8000cec: b29b uxth r3, r3 8000cee: 3b04 subs r3, #4 8000cf0: 81fb strh r3, [r7, #14] uint8_t byte_index = bit_index/8; //Calculates which byte in the REPORT array 8000cf2: 89fb ldrh r3, [r7, #14] 8000cf4: 08db lsrs r3, r3, #3 8000cf6: b29b uxth r3, r3 8000cf8: 737b strb r3, [r7, #13] uint8_t bit_offset = bit_index%8; //Calculates which bits in the REPORT[byte_index] should be set/unset 8000cfa: 89fb ldrh r3, [r7, #14] 8000cfc: b2db uxtb r3, r3 8000cfe: f003 0307 and.w r3, r3, #7 8000d02: 733b strb r3, [r7, #12] REPORT.KEYPRESS[byte_index] |= (1 << bit_offset); 8000d04: 7b7b ldrb r3, [r7, #13] 8000d06: 4a0c ldr r2, [pc, #48] @ (8000d38 ) 8000d08: 4413 add r3, r2 8000d0a: 789b ldrb r3, [r3, #2] 8000d0c: b25a sxtb r2, r3 8000d0e: 7b3b ldrb r3, [r7, #12] 8000d10: 2101 movs r1, #1 8000d12: fa01 f303 lsl.w r3, r1, r3 8000d16: b25b sxtb r3, r3 8000d18: 4313 orrs r3, r2 8000d1a: b25a sxtb r2, r3 8000d1c: 7b7b ldrb r3, [r7, #13] 8000d1e: b2d1 uxtb r1, r2 8000d20: 4a05 ldr r2, [pc, #20] @ (8000d38 ) 8000d22: 4413 add r3, r2 8000d24: 460a mov r2, r1 8000d26: 709a strb r2, [r3, #2] 8000d28: e000 b.n 8000d2c if(usageID < 0x04 || usageID > 0x73) return; //Usage ID is out of bounds 8000d2a: bf00 nop } 8000d2c: 3714 adds r7, #20 8000d2e: 46bd mov sp, r7 8000d30: f85d 7b04 ldr.w r7, [sp], #4 8000d34: 4770 bx lr 8000d36: bf00 nop 8000d38: 2000049c .word 0x2000049c 08000d3c : void matrixScan(void){ 8000d3c: b580 push {r7, lr} 8000d3e: b082 sub sp, #8 8000d40: af00 add r7, sp, #0 for (uint8_t col = 0; col < COL; col++){ 8000d42: 2300 movs r3, #0 8000d44: 71fb strb r3, [r7, #7] 8000d46: e042 b.n 8000dce HAL_GPIO_WritePin(COLUMN_PINS[col].GPIOx, COLUMN_PINS[col].PIN, GPIO_PIN_SET); 8000d48: 79fb ldrb r3, [r7, #7] 8000d4a: 4a25 ldr r2, [pc, #148] @ (8000de0 ) 8000d4c: f852 0033 ldr.w r0, [r2, r3, lsl #3] 8000d50: 79fb ldrb r3, [r7, #7] 8000d52: 4a23 ldr r2, [pc, #140] @ (8000de0 ) 8000d54: 00db lsls r3, r3, #3 8000d56: 4413 add r3, r2 8000d58: 889b ldrh r3, [r3, #4] 8000d5a: 2201 movs r2, #1 8000d5c: 4619 mov r1, r3 8000d5e: f000 fef7 bl 8001b50 HAL_Delay(1); 8000d62: 2001 movs r0, #1 8000d64: f000 fb8c bl 8001480 for(uint8_t row = 0; row < ROW; row++){ 8000d68: 2300 movs r3, #0 8000d6a: 71bb strb r3, [r7, #6] 8000d6c: e01c b.n 8000da8 if(HAL_GPIO_ReadPin(ROW_PINS[row].GPIOx, ROW_PINS[row].PIN)){ 8000d6e: 79bb ldrb r3, [r7, #6] 8000d70: 4a1c ldr r2, [pc, #112] @ (8000de4 ) 8000d72: f852 2033 ldr.w r2, [r2, r3, lsl #3] 8000d76: 79bb ldrb r3, [r7, #6] 8000d78: 491a ldr r1, [pc, #104] @ (8000de4 ) 8000d7a: 00db lsls r3, r3, #3 8000d7c: 440b add r3, r1 8000d7e: 889b ldrh r3, [r3, #4] 8000d80: 4619 mov r1, r3 8000d82: 4610 mov r0, r2 8000d84: f000 fecc bl 8001b20 8000d88: 4603 mov r3, r0 8000d8a: 2b00 cmp r3, #0 8000d8c: d009 beq.n 8000da2 addUSBReport(KEYCODES[row][col]); 8000d8e: 79ba ldrb r2, [r7, #6] 8000d90: 79fb ldrb r3, [r7, #7] 8000d92: 4915 ldr r1, [pc, #84] @ (8000de8 ) 8000d94: 0052 lsls r2, r2, #1 8000d96: 440a add r2, r1 8000d98: 4413 add r3, r2 8000d9a: 781b ldrb r3, [r3, #0] 8000d9c: 4618 mov r0, r3 8000d9e: f7ff ff99 bl 8000cd4 for(uint8_t row = 0; row < ROW; row++){ 8000da2: 79bb ldrb r3, [r7, #6] 8000da4: 3301 adds r3, #1 8000da6: 71bb strb r3, [r7, #6] 8000da8: 79bb ldrb r3, [r7, #6] 8000daa: 2b01 cmp r3, #1 8000dac: d9df bls.n 8000d6e } } HAL_GPIO_WritePin(COLUMN_PINS[col].GPIOx, COLUMN_PINS[col].PIN, GPIO_PIN_RESET); 8000dae: 79fb ldrb r3, [r7, #7] 8000db0: 4a0b ldr r2, [pc, #44] @ (8000de0 ) 8000db2: f852 0033 ldr.w r0, [r2, r3, lsl #3] 8000db6: 79fb ldrb r3, [r7, #7] 8000db8: 4a09 ldr r2, [pc, #36] @ (8000de0 ) 8000dba: 00db lsls r3, r3, #3 8000dbc: 4413 add r3, r2 8000dbe: 889b ldrh r3, [r3, #4] 8000dc0: 2200 movs r2, #0 8000dc2: 4619 mov r1, r3 8000dc4: f000 fec4 bl 8001b50 for (uint8_t col = 0; col < COL; col++){ 8000dc8: 79fb ldrb r3, [r7, #7] 8000dca: 3301 adds r3, #1 8000dcc: 71fb strb r3, [r7, #7] 8000dce: 79fb ldrb r3, [r7, #7] 8000dd0: 2b01 cmp r3, #1 8000dd2: d9b9 bls.n 8000d48 } } 8000dd4: bf00 nop 8000dd6: bf00 nop 8000dd8: 3708 adds r7, #8 8000dda: 46bd mov sp, r7 8000ddc: bd80 pop {r7, pc} 8000dde: bf00 nop 8000de0: 20000010 .word 0x20000010 8000de4: 20000000 .word 0x20000000 8000de8: 20000020 .word 0x20000020 08000dec : void resetReport(void){ 8000dec: b580 push {r7, lr} 8000dee: af00 add r7, sp, #0 REPORT.MODIFIER = 0; 8000df0: 4b04 ldr r3, [pc, #16] @ (8000e04 ) 8000df2: 2200 movs r2, #0 8000df4: 701a strb r2, [r3, #0] memset(REPORT.KEYPRESS, 0, sizeof(REPORT.KEYPRESS)); 8000df6: 220c movs r2, #12 8000df8: 2100 movs r1, #0 8000dfa: 4803 ldr r0, [pc, #12] @ (8000e08 ) 8000dfc: f008 fb72 bl 80094e4 } 8000e00: bf00 nop 8000e02: bd80 pop {r7, pc} 8000e04: 2000049c .word 0x2000049c 8000e08: 2000049e .word 0x2000049e 08000e0c : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8000e0c: b480 push {r7} 8000e0e: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting special-purpose register PRIMASK. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8000e10: b672 cpsid i } 8000e12: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8000e14: bf00 nop 8000e16: e7fd b.n 8000e14 08000e18 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8000e18: b480 push {r7} 8000e1a: b083 sub sp, #12 8000e1c: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 8000e1e: 2300 movs r3, #0 8000e20: 607b str r3, [r7, #4] 8000e22: 4b10 ldr r3, [pc, #64] @ (8000e64 ) 8000e24: 6c5b ldr r3, [r3, #68] @ 0x44 8000e26: 4a0f ldr r2, [pc, #60] @ (8000e64 ) 8000e28: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8000e2c: 6453 str r3, [r2, #68] @ 0x44 8000e2e: 4b0d ldr r3, [pc, #52] @ (8000e64 ) 8000e30: 6c5b ldr r3, [r3, #68] @ 0x44 8000e32: f403 4380 and.w r3, r3, #16384 @ 0x4000 8000e36: 607b str r3, [r7, #4] 8000e38: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); 8000e3a: 2300 movs r3, #0 8000e3c: 603b str r3, [r7, #0] 8000e3e: 4b09 ldr r3, [pc, #36] @ (8000e64 ) 8000e40: 6c1b ldr r3, [r3, #64] @ 0x40 8000e42: 4a08 ldr r2, [pc, #32] @ (8000e64 ) 8000e44: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8000e48: 6413 str r3, [r2, #64] @ 0x40 8000e4a: 4b06 ldr r3, [pc, #24] @ (8000e64 ) 8000e4c: 6c1b ldr r3, [r3, #64] @ 0x40 8000e4e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8000e52: 603b str r3, [r7, #0] 8000e54: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8000e56: bf00 nop 8000e58: 370c adds r7, #12 8000e5a: 46bd mov sp, r7 8000e5c: f85d 7b04 ldr.w r7, [sp], #4 8000e60: 4770 bx lr 8000e62: bf00 nop 8000e64: 40023800 .word 0x40023800 08000e68 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8000e68: b580 push {r7, lr} 8000e6a: b08a sub sp, #40 @ 0x28 8000e6c: af00 add r7, sp, #0 8000e6e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000e70: f107 0314 add.w r3, r7, #20 8000e74: 2200 movs r2, #0 8000e76: 601a str r2, [r3, #0] 8000e78: 605a str r2, [r3, #4] 8000e7a: 609a str r2, [r3, #8] 8000e7c: 60da str r2, [r3, #12] 8000e7e: 611a str r2, [r3, #16] if(hi2c->Instance==I2C1) 8000e80: 687b ldr r3, [r7, #4] 8000e82: 681b ldr r3, [r3, #0] 8000e84: 4a19 ldr r2, [pc, #100] @ (8000eec ) 8000e86: 4293 cmp r3, r2 8000e88: d12b bne.n 8000ee2 { /* USER CODE BEGIN I2C1_MspInit 0 */ /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8000e8a: 2300 movs r3, #0 8000e8c: 613b str r3, [r7, #16] 8000e8e: 4b18 ldr r3, [pc, #96] @ (8000ef0 ) 8000e90: 6b1b ldr r3, [r3, #48] @ 0x30 8000e92: 4a17 ldr r2, [pc, #92] @ (8000ef0 ) 8000e94: f043 0302 orr.w r3, r3, #2 8000e98: 6313 str r3, [r2, #48] @ 0x30 8000e9a: 4b15 ldr r3, [pc, #84] @ (8000ef0 ) 8000e9c: 6b1b ldr r3, [r3, #48] @ 0x30 8000e9e: f003 0302 and.w r3, r3, #2 8000ea2: 613b str r3, [r7, #16] 8000ea4: 693b ldr r3, [r7, #16] /**I2C1 GPIO Configuration PB6 ------> I2C1_SCL PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 8000ea6: 23c0 movs r3, #192 @ 0xc0 8000ea8: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8000eaa: 2312 movs r3, #18 8000eac: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000eae: 2300 movs r3, #0 8000eb0: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000eb2: 2303 movs r3, #3 8000eb4: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 8000eb6: 2304 movs r3, #4 8000eb8: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8000eba: f107 0314 add.w r3, r7, #20 8000ebe: 4619 mov r1, r3 8000ec0: 480c ldr r0, [pc, #48] @ (8000ef4 ) 8000ec2: f000 fc99 bl 80017f8 /* Peripheral clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); 8000ec6: 2300 movs r3, #0 8000ec8: 60fb str r3, [r7, #12] 8000eca: 4b09 ldr r3, [pc, #36] @ (8000ef0 ) 8000ecc: 6c1b ldr r3, [r3, #64] @ 0x40 8000ece: 4a08 ldr r2, [pc, #32] @ (8000ef0 ) 8000ed0: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 8000ed4: 6413 str r3, [r2, #64] @ 0x40 8000ed6: 4b06 ldr r3, [pc, #24] @ (8000ef0 ) 8000ed8: 6c1b ldr r3, [r3, #64] @ 0x40 8000eda: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8000ede: 60fb str r3, [r7, #12] 8000ee0: 68fb ldr r3, [r7, #12] /* USER CODE END I2C1_MspInit 1 */ } } 8000ee2: bf00 nop 8000ee4: 3728 adds r7, #40 @ 0x28 8000ee6: 46bd mov sp, r7 8000ee8: bd80 pop {r7, pc} 8000eea: bf00 nop 8000eec: 40005400 .word 0x40005400 8000ef0: 40023800 .word 0x40023800 8000ef4: 40020400 .word 0x40020400 08000ef8 : * This function configures the hardware resources used in this example * @param htim_oc: TIM_OC handle pointer * @retval None */ void HAL_TIM_OC_MspInit(TIM_HandleTypeDef* htim_oc) { 8000ef8: b480 push {r7} 8000efa: b085 sub sp, #20 8000efc: af00 add r7, sp, #0 8000efe: 6078 str r0, [r7, #4] if(htim_oc->Instance==TIM2) 8000f00: 687b ldr r3, [r7, #4] 8000f02: 681b ldr r3, [r3, #0] 8000f04: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8000f08: d10d bne.n 8000f26 { /* USER CODE BEGIN TIM2_MspInit 0 */ /* USER CODE END TIM2_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM2_CLK_ENABLE(); 8000f0a: 2300 movs r3, #0 8000f0c: 60fb str r3, [r7, #12] 8000f0e: 4b09 ldr r3, [pc, #36] @ (8000f34 ) 8000f10: 6c1b ldr r3, [r3, #64] @ 0x40 8000f12: 4a08 ldr r2, [pc, #32] @ (8000f34 ) 8000f14: f043 0301 orr.w r3, r3, #1 8000f18: 6413 str r3, [r2, #64] @ 0x40 8000f1a: 4b06 ldr r3, [pc, #24] @ (8000f34 ) 8000f1c: 6c1b ldr r3, [r3, #64] @ 0x40 8000f1e: f003 0301 and.w r3, r3, #1 8000f22: 60fb str r3, [r7, #12] 8000f24: 68fb ldr r3, [r7, #12] /* USER CODE END TIM2_MspInit 1 */ } } 8000f26: bf00 nop 8000f28: 3714 adds r7, #20 8000f2a: 46bd mov sp, r7 8000f2c: f85d 7b04 ldr.w r7, [sp], #4 8000f30: 4770 bx lr 8000f32: bf00 nop 8000f34: 40023800 .word 0x40023800 08000f38 : * This function configures the hardware resources used in this example * @param htim_encoder: TIM_Encoder handle pointer * @retval None */ void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder) { 8000f38: b580 push {r7, lr} 8000f3a: b08a sub sp, #40 @ 0x28 8000f3c: af00 add r7, sp, #0 8000f3e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000f40: f107 0314 add.w r3, r7, #20 8000f44: 2200 movs r2, #0 8000f46: 601a str r2, [r3, #0] 8000f48: 605a str r2, [r3, #4] 8000f4a: 609a str r2, [r3, #8] 8000f4c: 60da str r2, [r3, #12] 8000f4e: 611a str r2, [r3, #16] if(htim_encoder->Instance==TIM3) 8000f50: 687b ldr r3, [r7, #4] 8000f52: 681b ldr r3, [r3, #0] 8000f54: 4a19 ldr r2, [pc, #100] @ (8000fbc ) 8000f56: 4293 cmp r3, r2 8000f58: d12b bne.n 8000fb2 { /* USER CODE BEGIN TIM3_MspInit 0 */ /* USER CODE END TIM3_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM3_CLK_ENABLE(); 8000f5a: 2300 movs r3, #0 8000f5c: 613b str r3, [r7, #16] 8000f5e: 4b18 ldr r3, [pc, #96] @ (8000fc0 ) 8000f60: 6c1b ldr r3, [r3, #64] @ 0x40 8000f62: 4a17 ldr r2, [pc, #92] @ (8000fc0 ) 8000f64: f043 0302 orr.w r3, r3, #2 8000f68: 6413 str r3, [r2, #64] @ 0x40 8000f6a: 4b15 ldr r3, [pc, #84] @ (8000fc0 ) 8000f6c: 6c1b ldr r3, [r3, #64] @ 0x40 8000f6e: f003 0302 and.w r3, r3, #2 8000f72: 613b str r3, [r7, #16] 8000f74: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 8000f76: 2300 movs r3, #0 8000f78: 60fb str r3, [r7, #12] 8000f7a: 4b11 ldr r3, [pc, #68] @ (8000fc0 ) 8000f7c: 6b1b ldr r3, [r3, #48] @ 0x30 8000f7e: 4a10 ldr r2, [pc, #64] @ (8000fc0 ) 8000f80: f043 0301 orr.w r3, r3, #1 8000f84: 6313 str r3, [r2, #48] @ 0x30 8000f86: 4b0e ldr r3, [pc, #56] @ (8000fc0 ) 8000f88: 6b1b ldr r3, [r3, #48] @ 0x30 8000f8a: f003 0301 and.w r3, r3, #1 8000f8e: 60fb str r3, [r7, #12] 8000f90: 68fb ldr r3, [r7, #12] /**TIM3 GPIO Configuration PA6 ------> TIM3_CH1 PA7 ------> TIM3_CH2 */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 8000f92: 23c0 movs r3, #192 @ 0xc0 8000f94: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000f96: 2302 movs r3, #2 8000f98: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000f9a: 2300 movs r3, #0 8000f9c: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000f9e: 2300 movs r3, #0 8000fa0: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; 8000fa2: 2302 movs r3, #2 8000fa4: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000fa6: f107 0314 add.w r3, r7, #20 8000faa: 4619 mov r1, r3 8000fac: 4805 ldr r0, [pc, #20] @ (8000fc4 ) 8000fae: f000 fc23 bl 80017f8 /* USER CODE END TIM3_MspInit 1 */ } } 8000fb2: bf00 nop 8000fb4: 3728 adds r7, #40 @ 0x28 8000fb6: 46bd mov sp, r7 8000fb8: bd80 pop {r7, pc} 8000fba: bf00 nop 8000fbc: 40000400 .word 0x40000400 8000fc0: 40023800 .word 0x40023800 8000fc4: 40020000 .word 0x40020000 08000fc8 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { 8000fc8: b580 push {r7, lr} 8000fca: b088 sub sp, #32 8000fcc: af00 add r7, sp, #0 8000fce: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000fd0: f107 030c add.w r3, r7, #12 8000fd4: 2200 movs r2, #0 8000fd6: 601a str r2, [r3, #0] 8000fd8: 605a str r2, [r3, #4] 8000fda: 609a str r2, [r3, #8] 8000fdc: 60da str r2, [r3, #12] 8000fde: 611a str r2, [r3, #16] if(htim->Instance==TIM2) 8000fe0: 687b ldr r3, [r7, #4] 8000fe2: 681b ldr r3, [r3, #0] 8000fe4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8000fe8: d11d bne.n 8001026 { /* USER CODE BEGIN TIM2_MspPostInit 0 */ /* USER CODE END TIM2_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8000fea: 2300 movs r3, #0 8000fec: 60bb str r3, [r7, #8] 8000fee: 4b10 ldr r3, [pc, #64] @ (8001030 ) 8000ff0: 6b1b ldr r3, [r3, #48] @ 0x30 8000ff2: 4a0f ldr r2, [pc, #60] @ (8001030 ) 8000ff4: f043 0301 orr.w r3, r3, #1 8000ff8: 6313 str r3, [r2, #48] @ 0x30 8000ffa: 4b0d ldr r3, [pc, #52] @ (8001030 ) 8000ffc: 6b1b ldr r3, [r3, #48] @ 0x30 8000ffe: f003 0301 and.w r3, r3, #1 8001002: 60bb str r3, [r7, #8] 8001004: 68bb ldr r3, [r7, #8] /**TIM2 GPIO Configuration PA5 ------> TIM2_CH1 */ GPIO_InitStruct.Pin = GPIO_PIN_5; 8001006: 2320 movs r3, #32 8001008: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800100a: 2302 movs r3, #2 800100c: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; 800100e: 2300 movs r3, #0 8001010: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001012: 2300 movs r3, #0 8001014: 61bb str r3, [r7, #24] GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 8001016: 2301 movs r3, #1 8001018: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800101a: f107 030c add.w r3, r7, #12 800101e: 4619 mov r1, r3 8001020: 4804 ldr r0, [pc, #16] @ (8001034 ) 8001022: f000 fbe9 bl 80017f8 /* USER CODE BEGIN TIM2_MspPostInit 1 */ /* USER CODE END TIM2_MspPostInit 1 */ } } 8001026: bf00 nop 8001028: 3720 adds r7, #32 800102a: 46bd mov sp, r7 800102c: bd80 pop {r7, pc} 800102e: bf00 nop 8001030: 40023800 .word 0x40023800 8001034: 40020000 .word 0x40020000 08001038 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8001038: b580 push {r7, lr} 800103a: b092 sub sp, #72 @ 0x48 800103c: af00 add r7, sp, #0 800103e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001040: f107 0334 add.w r3, r7, #52 @ 0x34 8001044: 2200 movs r2, #0 8001046: 601a str r2, [r3, #0] 8001048: 605a str r2, [r3, #4] 800104a: 609a str r2, [r3, #8] 800104c: 60da str r2, [r3, #12] 800104e: 611a str r2, [r3, #16] if(huart->Instance==UART4) 8001050: 687b ldr r3, [r7, #4] 8001052: 681b ldr r3, [r3, #0] 8001054: 4a8d ldr r2, [pc, #564] @ (800128c ) 8001056: 4293 cmp r3, r2 8001058: d12c bne.n 80010b4 { /* USER CODE BEGIN UART4_MspInit 0 */ /* USER CODE END UART4_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_UART4_CLK_ENABLE(); 800105a: 2300 movs r3, #0 800105c: 633b str r3, [r7, #48] @ 0x30 800105e: 4b8c ldr r3, [pc, #560] @ (8001290 ) 8001060: 6c1b ldr r3, [r3, #64] @ 0x40 8001062: 4a8b ldr r2, [pc, #556] @ (8001290 ) 8001064: f443 2300 orr.w r3, r3, #524288 @ 0x80000 8001068: 6413 str r3, [r2, #64] @ 0x40 800106a: 4b89 ldr r3, [pc, #548] @ (8001290 ) 800106c: 6c1b ldr r3, [r3, #64] @ 0x40 800106e: f403 2300 and.w r3, r3, #524288 @ 0x80000 8001072: 633b str r3, [r7, #48] @ 0x30 8001074: 6b3b ldr r3, [r7, #48] @ 0x30 __HAL_RCC_GPIOA_CLK_ENABLE(); 8001076: 2300 movs r3, #0 8001078: 62fb str r3, [r7, #44] @ 0x2c 800107a: 4b85 ldr r3, [pc, #532] @ (8001290 ) 800107c: 6b1b ldr r3, [r3, #48] @ 0x30 800107e: 4a84 ldr r2, [pc, #528] @ (8001290 ) 8001080: f043 0301 orr.w r3, r3, #1 8001084: 6313 str r3, [r2, #48] @ 0x30 8001086: 4b82 ldr r3, [pc, #520] @ (8001290 ) 8001088: 6b1b ldr r3, [r3, #48] @ 0x30 800108a: f003 0301 and.w r3, r3, #1 800108e: 62fb str r3, [r7, #44] @ 0x2c 8001090: 6afb ldr r3, [r7, #44] @ 0x2c /**UART4 GPIO Configuration PA0-WKUP ------> UART4_TX PA1 ------> UART4_RX */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; 8001092: 2303 movs r3, #3 8001094: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001096: 2302 movs r3, #2 8001098: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 800109a: 2300 movs r3, #0 800109c: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 800109e: 2303 movs r3, #3 80010a0: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF8_UART4; 80010a2: 2308 movs r3, #8 80010a4: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80010a6: f107 0334 add.w r3, r7, #52 @ 0x34 80010aa: 4619 mov r1, r3 80010ac: 4879 ldr r0, [pc, #484] @ (8001294 ) 80010ae: f000 fba3 bl 80017f8 /* USER CODE BEGIN USART3_MspInit 1 */ /* USER CODE END USART3_MspInit 1 */ } } 80010b2: e0e7 b.n 8001284 else if(huart->Instance==UART5) 80010b4: 687b ldr r3, [r7, #4] 80010b6: 681b ldr r3, [r3, #0] 80010b8: 4a77 ldr r2, [pc, #476] @ (8001298 ) 80010ba: 4293 cmp r3, r2 80010bc: d14b bne.n 8001156 __HAL_RCC_UART5_CLK_ENABLE(); 80010be: 2300 movs r3, #0 80010c0: 62bb str r3, [r7, #40] @ 0x28 80010c2: 4b73 ldr r3, [pc, #460] @ (8001290 ) 80010c4: 6c1b ldr r3, [r3, #64] @ 0x40 80010c6: 4a72 ldr r2, [pc, #456] @ (8001290 ) 80010c8: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 80010cc: 6413 str r3, [r2, #64] @ 0x40 80010ce: 4b70 ldr r3, [pc, #448] @ (8001290 ) 80010d0: 6c1b ldr r3, [r3, #64] @ 0x40 80010d2: f403 1380 and.w r3, r3, #1048576 @ 0x100000 80010d6: 62bb str r3, [r7, #40] @ 0x28 80010d8: 6abb ldr r3, [r7, #40] @ 0x28 __HAL_RCC_GPIOC_CLK_ENABLE(); 80010da: 2300 movs r3, #0 80010dc: 627b str r3, [r7, #36] @ 0x24 80010de: 4b6c ldr r3, [pc, #432] @ (8001290 ) 80010e0: 6b1b ldr r3, [r3, #48] @ 0x30 80010e2: 4a6b ldr r2, [pc, #428] @ (8001290 ) 80010e4: f043 0304 orr.w r3, r3, #4 80010e8: 6313 str r3, [r2, #48] @ 0x30 80010ea: 4b69 ldr r3, [pc, #420] @ (8001290 ) 80010ec: 6b1b ldr r3, [r3, #48] @ 0x30 80010ee: f003 0304 and.w r3, r3, #4 80010f2: 627b str r3, [r7, #36] @ 0x24 80010f4: 6a7b ldr r3, [r7, #36] @ 0x24 __HAL_RCC_GPIOD_CLK_ENABLE(); 80010f6: 2300 movs r3, #0 80010f8: 623b str r3, [r7, #32] 80010fa: 4b65 ldr r3, [pc, #404] @ (8001290 ) 80010fc: 6b1b ldr r3, [r3, #48] @ 0x30 80010fe: 4a64 ldr r2, [pc, #400] @ (8001290 ) 8001100: f043 0308 orr.w r3, r3, #8 8001104: 6313 str r3, [r2, #48] @ 0x30 8001106: 4b62 ldr r3, [pc, #392] @ (8001290 ) 8001108: 6b1b ldr r3, [r3, #48] @ 0x30 800110a: f003 0308 and.w r3, r3, #8 800110e: 623b str r3, [r7, #32] 8001110: 6a3b ldr r3, [r7, #32] GPIO_InitStruct.Pin = GPIO_PIN_12; 8001112: f44f 5380 mov.w r3, #4096 @ 0x1000 8001116: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001118: 2302 movs r3, #2 800111a: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 800111c: 2300 movs r3, #0 800111e: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001120: 2303 movs r3, #3 8001122: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF8_UART5; 8001124: 2308 movs r3, #8 8001126: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8001128: f107 0334 add.w r3, r7, #52 @ 0x34 800112c: 4619 mov r1, r3 800112e: 485b ldr r0, [pc, #364] @ (800129c ) 8001130: f000 fb62 bl 80017f8 GPIO_InitStruct.Pin = GPIO_PIN_2; 8001134: 2304 movs r3, #4 8001136: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001138: 2302 movs r3, #2 800113a: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 800113c: 2300 movs r3, #0 800113e: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001140: 2303 movs r3, #3 8001142: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF8_UART5; 8001144: 2308 movs r3, #8 8001146: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8001148: f107 0334 add.w r3, r7, #52 @ 0x34 800114c: 4619 mov r1, r3 800114e: 4854 ldr r0, [pc, #336] @ (80012a0 ) 8001150: f000 fb52 bl 80017f8 } 8001154: e096 b.n 8001284 else if(huart->Instance==USART1) 8001156: 687b ldr r3, [r7, #4] 8001158: 681b ldr r3, [r3, #0] 800115a: 4a52 ldr r2, [pc, #328] @ (80012a4 ) 800115c: 4293 cmp r3, r2 800115e: d12d bne.n 80011bc __HAL_RCC_USART1_CLK_ENABLE(); 8001160: 2300 movs r3, #0 8001162: 61fb str r3, [r7, #28] 8001164: 4b4a ldr r3, [pc, #296] @ (8001290 ) 8001166: 6c5b ldr r3, [r3, #68] @ 0x44 8001168: 4a49 ldr r2, [pc, #292] @ (8001290 ) 800116a: f043 0310 orr.w r3, r3, #16 800116e: 6453 str r3, [r2, #68] @ 0x44 8001170: 4b47 ldr r3, [pc, #284] @ (8001290 ) 8001172: 6c5b ldr r3, [r3, #68] @ 0x44 8001174: f003 0310 and.w r3, r3, #16 8001178: 61fb str r3, [r7, #28] 800117a: 69fb ldr r3, [r7, #28] __HAL_RCC_GPIOA_CLK_ENABLE(); 800117c: 2300 movs r3, #0 800117e: 61bb str r3, [r7, #24] 8001180: 4b43 ldr r3, [pc, #268] @ (8001290 ) 8001182: 6b1b ldr r3, [r3, #48] @ 0x30 8001184: 4a42 ldr r2, [pc, #264] @ (8001290 ) 8001186: f043 0301 orr.w r3, r3, #1 800118a: 6313 str r3, [r2, #48] @ 0x30 800118c: 4b40 ldr r3, [pc, #256] @ (8001290 ) 800118e: 6b1b ldr r3, [r3, #48] @ 0x30 8001190: f003 0301 and.w r3, r3, #1 8001194: 61bb str r3, [r7, #24] 8001196: 69bb ldr r3, [r7, #24] GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; 8001198: f44f 63c0 mov.w r3, #1536 @ 0x600 800119c: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800119e: 2302 movs r3, #2 80011a0: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 80011a2: 2300 movs r3, #0 80011a4: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80011a6: 2303 movs r3, #3 80011a8: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 80011aa: 2307 movs r3, #7 80011ac: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80011ae: f107 0334 add.w r3, r7, #52 @ 0x34 80011b2: 4619 mov r1, r3 80011b4: 4837 ldr r0, [pc, #220] @ (8001294 ) 80011b6: f000 fb1f bl 80017f8 } 80011ba: e063 b.n 8001284 else if(huart->Instance==USART2) 80011bc: 687b ldr r3, [r7, #4] 80011be: 681b ldr r3, [r3, #0] 80011c0: 4a39 ldr r2, [pc, #228] @ (80012a8 ) 80011c2: 4293 cmp r3, r2 80011c4: d12c bne.n 8001220 __HAL_RCC_USART2_CLK_ENABLE(); 80011c6: 2300 movs r3, #0 80011c8: 617b str r3, [r7, #20] 80011ca: 4b31 ldr r3, [pc, #196] @ (8001290 ) 80011cc: 6c1b ldr r3, [r3, #64] @ 0x40 80011ce: 4a30 ldr r2, [pc, #192] @ (8001290 ) 80011d0: f443 3300 orr.w r3, r3, #131072 @ 0x20000 80011d4: 6413 str r3, [r2, #64] @ 0x40 80011d6: 4b2e ldr r3, [pc, #184] @ (8001290 ) 80011d8: 6c1b ldr r3, [r3, #64] @ 0x40 80011da: f403 3300 and.w r3, r3, #131072 @ 0x20000 80011de: 617b str r3, [r7, #20] 80011e0: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 80011e2: 2300 movs r3, #0 80011e4: 613b str r3, [r7, #16] 80011e6: 4b2a ldr r3, [pc, #168] @ (8001290 ) 80011e8: 6b1b ldr r3, [r3, #48] @ 0x30 80011ea: 4a29 ldr r2, [pc, #164] @ (8001290 ) 80011ec: f043 0301 orr.w r3, r3, #1 80011f0: 6313 str r3, [r2, #48] @ 0x30 80011f2: 4b27 ldr r3, [pc, #156] @ (8001290 ) 80011f4: 6b1b ldr r3, [r3, #48] @ 0x30 80011f6: f003 0301 and.w r3, r3, #1 80011fa: 613b str r3, [r7, #16] 80011fc: 693b ldr r3, [r7, #16] GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; 80011fe: 230c movs r3, #12 8001200: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001202: 2302 movs r3, #2 8001204: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001206: 2300 movs r3, #0 8001208: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 800120a: 2303 movs r3, #3 800120c: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 800120e: 2307 movs r3, #7 8001210: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001212: f107 0334 add.w r3, r7, #52 @ 0x34 8001216: 4619 mov r1, r3 8001218: 481e ldr r0, [pc, #120] @ (8001294 ) 800121a: f000 faed bl 80017f8 } 800121e: e031 b.n 8001284 else if(huart->Instance==USART3) 8001220: 687b ldr r3, [r7, #4] 8001222: 681b ldr r3, [r3, #0] 8001224: 4a21 ldr r2, [pc, #132] @ (80012ac ) 8001226: 4293 cmp r3, r2 8001228: d12c bne.n 8001284 __HAL_RCC_USART3_CLK_ENABLE(); 800122a: 2300 movs r3, #0 800122c: 60fb str r3, [r7, #12] 800122e: 4b18 ldr r3, [pc, #96] @ (8001290 ) 8001230: 6c1b ldr r3, [r3, #64] @ 0x40 8001232: 4a17 ldr r2, [pc, #92] @ (8001290 ) 8001234: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8001238: 6413 str r3, [r2, #64] @ 0x40 800123a: 4b15 ldr r3, [pc, #84] @ (8001290 ) 800123c: 6c1b ldr r3, [r3, #64] @ 0x40 800123e: f403 2380 and.w r3, r3, #262144 @ 0x40000 8001242: 60fb str r3, [r7, #12] 8001244: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOC_CLK_ENABLE(); 8001246: 2300 movs r3, #0 8001248: 60bb str r3, [r7, #8] 800124a: 4b11 ldr r3, [pc, #68] @ (8001290 ) 800124c: 6b1b ldr r3, [r3, #48] @ 0x30 800124e: 4a10 ldr r2, [pc, #64] @ (8001290 ) 8001250: f043 0304 orr.w r3, r3, #4 8001254: 6313 str r3, [r2, #48] @ 0x30 8001256: 4b0e ldr r3, [pc, #56] @ (8001290 ) 8001258: 6b1b ldr r3, [r3, #48] @ 0x30 800125a: f003 0304 and.w r3, r3, #4 800125e: 60bb str r3, [r7, #8] 8001260: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 8001262: f44f 6340 mov.w r3, #3072 @ 0xc00 8001266: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001268: 2302 movs r3, #2 800126a: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 800126c: 2300 movs r3, #0 800126e: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001270: 2303 movs r3, #3 8001272: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF7_USART3; 8001274: 2307 movs r3, #7 8001276: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8001278: f107 0334 add.w r3, r7, #52 @ 0x34 800127c: 4619 mov r1, r3 800127e: 4807 ldr r0, [pc, #28] @ (800129c ) 8001280: f000 faba bl 80017f8 } 8001284: bf00 nop 8001286: 3748 adds r7, #72 @ 0x48 8001288: 46bd mov sp, r7 800128a: bd80 pop {r7, pc} 800128c: 40004c00 .word 0x40004c00 8001290: 40023800 .word 0x40023800 8001294: 40020000 .word 0x40020000 8001298: 40005000 .word 0x40005000 800129c: 40020800 .word 0x40020800 80012a0: 40020c00 .word 0x40020c00 80012a4: 40011000 .word 0x40011000 80012a8: 40004400 .word 0x40004400 80012ac: 40004800 .word 0x40004800 080012b0 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 80012b0: b480 push {r7} 80012b2: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 80012b4: bf00 nop 80012b6: e7fd b.n 80012b4 080012b8 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 80012b8: b480 push {r7} 80012ba: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 80012bc: bf00 nop 80012be: e7fd b.n 80012bc 080012c0 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 80012c0: b480 push {r7} 80012c2: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 80012c4: bf00 nop 80012c6: e7fd b.n 80012c4 080012c8 : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { 80012c8: b480 push {r7} 80012ca: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 80012cc: bf00 nop 80012ce: e7fd b.n 80012cc 080012d0 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 80012d0: b480 push {r7} 80012d2: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 80012d4: bf00 nop 80012d6: e7fd b.n 80012d4 080012d8 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 80012d8: b480 push {r7} 80012da: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 80012dc: bf00 nop 80012de: 46bd mov sp, r7 80012e0: f85d 7b04 ldr.w r7, [sp], #4 80012e4: 4770 bx lr 080012e6 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 80012e6: b480 push {r7} 80012e8: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 80012ea: bf00 nop 80012ec: 46bd mov sp, r7 80012ee: f85d 7b04 ldr.w r7, [sp], #4 80012f2: 4770 bx lr 080012f4 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 80012f4: b480 push {r7} 80012f6: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 80012f8: bf00 nop 80012fa: 46bd mov sp, r7 80012fc: f85d 7b04 ldr.w r7, [sp], #4 8001300: 4770 bx lr 08001302 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8001302: b580 push {r7, lr} 8001304: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8001306: f000 f89b bl 8001440 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 800130a: bf00 nop 800130c: bd80 pop {r7, pc} ... 08001310 : /** * @brief This function handles USB On The Go FS global interrupt. */ void OTG_FS_IRQHandler(void) { 8001310: b580 push {r7, lr} 8001312: af00 add r7, sp, #0 /* USER CODE BEGIN OTG_FS_IRQn 0 */ /* USER CODE END OTG_FS_IRQn 0 */ HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS); 8001314: 4802 ldr r0, [pc, #8] @ (8001320 ) 8001316: f000 fec4 bl 80020a2 /* USER CODE BEGIN OTG_FS_IRQn 1 */ /* USER CODE END OTG_FS_IRQn 1 */ } 800131a: bf00 nop 800131c: bd80 pop {r7, pc} 800131e: bf00 nop 8001320: 20000994 .word 0x20000994 08001324 : * configuration. * @param None * @retval None */ void SystemInit(void) { 8001324: b480 push {r7} 8001326: af00 add r7, sp, #0 /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ 8001328: 4b06 ldr r3, [pc, #24] @ (8001344 ) 800132a: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 800132e: 4a05 ldr r2, [pc, #20] @ (8001344 ) 8001330: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 8001334: f8c2 3088 str.w r3, [r2, #136] @ 0x88 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ } 8001338: bf00 nop 800133a: 46bd mov sp, r7 800133c: f85d 7b04 ldr.w r7, [sp], #4 8001340: 4770 bx lr 8001342: bf00 nop 8001344: e000ed00 .word 0xe000ed00 08001348 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ 8001348: f8df d034 ldr.w sp, [pc, #52] @ 8001380 /* Call the clock system initialization function.*/ bl SystemInit 800134c: f7ff ffea bl 8001324 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8001350: 480c ldr r0, [pc, #48] @ (8001384 ) ldr r1, =_edata 8001352: 490d ldr r1, [pc, #52] @ (8001388 ) ldr r2, =_sidata 8001354: 4a0d ldr r2, [pc, #52] @ (800138c ) movs r3, #0 8001356: 2300 movs r3, #0 b LoopCopyDataInit 8001358: e002 b.n 8001360 0800135a : CopyDataInit: ldr r4, [r2, r3] 800135a: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 800135c: 50c4 str r4, [r0, r3] adds r3, r3, #4 800135e: 3304 adds r3, #4 08001360 : LoopCopyDataInit: adds r4, r0, r3 8001360: 18c4 adds r4, r0, r3 cmp r4, r1 8001362: 428c cmp r4, r1 bcc CopyDataInit 8001364: d3f9 bcc.n 800135a /* Zero fill the bss segment. */ ldr r2, =_sbss 8001366: 4a0a ldr r2, [pc, #40] @ (8001390 ) ldr r4, =_ebss 8001368: 4c0a ldr r4, [pc, #40] @ (8001394 ) movs r3, #0 800136a: 2300 movs r3, #0 b LoopFillZerobss 800136c: e001 b.n 8001372 0800136e : FillZerobss: str r3, [r2] 800136e: 6013 str r3, [r2, #0] adds r2, r2, #4 8001370: 3204 adds r2, #4 08001372 : LoopFillZerobss: cmp r2, r4 8001372: 42a2 cmp r2, r4 bcc FillZerobss 8001374: d3fb bcc.n 800136e /* Call static constructors */ bl __libc_init_array 8001376: f008 f8bd bl 80094f4 <__libc_init_array> /* Call the application's entry point.*/ bl main 800137a: f7ff f8d9 bl 8000530
bx lr 800137e: 4770 bx lr ldr sp, =_estack /* set stack pointer */ 8001380: 20020000 .word 0x20020000 ldr r0, =_sdata 8001384: 20000000 .word 0x20000000 ldr r1, =_edata 8001388: 20000134 .word 0x20000134 ldr r2, =_sidata 800138c: 080095b8 .word 0x080095b8 ldr r2, =_sbss 8001390: 20000134 .word 0x20000134 ldr r4, =_ebss 8001394: 20000e8c .word 0x20000e8c 08001398 : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8001398: e7fe b.n 8001398 ... 0800139c : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 800139c: b580 push {r7, lr} 800139e: af00 add r7, sp, #0 /* Configure Flash prefetch, Instruction cache, Data cache */ #if (INSTRUCTION_CACHE_ENABLE != 0U) __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); 80013a0: 4b0e ldr r3, [pc, #56] @ (80013dc ) 80013a2: 681b ldr r3, [r3, #0] 80013a4: 4a0d ldr r2, [pc, #52] @ (80013dc ) 80013a6: f443 7300 orr.w r3, r3, #512 @ 0x200 80013aa: 6013 str r3, [r2, #0] #endif /* INSTRUCTION_CACHE_ENABLE */ #if (DATA_CACHE_ENABLE != 0U) __HAL_FLASH_DATA_CACHE_ENABLE(); 80013ac: 4b0b ldr r3, [pc, #44] @ (80013dc ) 80013ae: 681b ldr r3, [r3, #0] 80013b0: 4a0a ldr r2, [pc, #40] @ (80013dc ) 80013b2: f443 6380 orr.w r3, r3, #1024 @ 0x400 80013b6: 6013 str r3, [r2, #0] #endif /* DATA_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 80013b8: 4b08 ldr r3, [pc, #32] @ (80013dc ) 80013ba: 681b ldr r3, [r3, #0] 80013bc: 4a07 ldr r2, [pc, #28] @ (80013dc ) 80013be: f443 7380 orr.w r3, r3, #256 @ 0x100 80013c2: 6013 str r3, [r2, #0] #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 80013c4: 2003 movs r0, #3 80013c6: f000 f94f bl 8001668 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 80013ca: 200f movs r0, #15 80013cc: f000 f808 bl 80013e0 /* Init the low level hardware */ HAL_MspInit(); 80013d0: f7ff fd22 bl 8000e18 /* Return function status */ return HAL_OK; 80013d4: 2300 movs r3, #0 } 80013d6: 4618 mov r0, r3 80013d8: bd80 pop {r7, pc} 80013da: bf00 nop 80013dc: 40023c00 .word 0x40023c00 080013e0 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 80013e0: b580 push {r7, lr} 80013e2: b082 sub sp, #8 80013e4: af00 add r7, sp, #0 80013e6: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 80013e8: 4b12 ldr r3, [pc, #72] @ (8001434 ) 80013ea: 681a ldr r2, [r3, #0] 80013ec: 4b12 ldr r3, [pc, #72] @ (8001438 ) 80013ee: 781b ldrb r3, [r3, #0] 80013f0: 4619 mov r1, r3 80013f2: f44f 737a mov.w r3, #1000 @ 0x3e8 80013f6: fbb3 f3f1 udiv r3, r3, r1 80013fa: fbb2 f3f3 udiv r3, r2, r3 80013fe: 4618 mov r0, r3 8001400: f000 f967 bl 80016d2 8001404: 4603 mov r3, r0 8001406: 2b00 cmp r3, #0 8001408: d001 beq.n 800140e { return HAL_ERROR; 800140a: 2301 movs r3, #1 800140c: e00e b.n 800142c } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 800140e: 687b ldr r3, [r7, #4] 8001410: 2b0f cmp r3, #15 8001412: d80a bhi.n 800142a { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8001414: 2200 movs r2, #0 8001416: 6879 ldr r1, [r7, #4] 8001418: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800141c: f000 f92f bl 800167e uwTickPrio = TickPriority; 8001420: 4a06 ldr r2, [pc, #24] @ (800143c ) 8001422: 687b ldr r3, [r7, #4] 8001424: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8001426: 2300 movs r3, #0 8001428: e000 b.n 800142c return HAL_ERROR; 800142a: 2301 movs r3, #1 } 800142c: 4618 mov r0, r3 800142e: 3708 adds r7, #8 8001430: 46bd mov sp, r7 8001432: bd80 pop {r7, pc} 8001434: 20000024 .word 0x20000024 8001438: 2000002c .word 0x2000002c 800143c: 20000028 .word 0x20000028 08001440 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8001440: b480 push {r7} 8001442: af00 add r7, sp, #0 uwTick += uwTickFreq; 8001444: 4b06 ldr r3, [pc, #24] @ (8001460 ) 8001446: 781b ldrb r3, [r3, #0] 8001448: 461a mov r2, r3 800144a: 4b06 ldr r3, [pc, #24] @ (8001464 ) 800144c: 681b ldr r3, [r3, #0] 800144e: 4413 add r3, r2 8001450: 4a04 ldr r2, [pc, #16] @ (8001464 ) 8001452: 6013 str r3, [r2, #0] } 8001454: bf00 nop 8001456: 46bd mov sp, r7 8001458: f85d 7b04 ldr.w r7, [sp], #4 800145c: 4770 bx lr 800145e: bf00 nop 8001460: 2000002c .word 0x2000002c 8001464: 200004b0 .word 0x200004b0 08001468 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8001468: b480 push {r7} 800146a: af00 add r7, sp, #0 return uwTick; 800146c: 4b03 ldr r3, [pc, #12] @ (800147c ) 800146e: 681b ldr r3, [r3, #0] } 8001470: 4618 mov r0, r3 8001472: 46bd mov sp, r7 8001474: f85d 7b04 ldr.w r7, [sp], #4 8001478: 4770 bx lr 800147a: bf00 nop 800147c: 200004b0 .word 0x200004b0 08001480 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 8001480: b580 push {r7, lr} 8001482: b084 sub sp, #16 8001484: af00 add r7, sp, #0 8001486: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8001488: f7ff ffee bl 8001468 800148c: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800148e: 687b ldr r3, [r7, #4] 8001490: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 8001492: 68fb ldr r3, [r7, #12] 8001494: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8001498: d005 beq.n 80014a6 { wait += (uint32_t)(uwTickFreq); 800149a: 4b0a ldr r3, [pc, #40] @ (80014c4 ) 800149c: 781b ldrb r3, [r3, #0] 800149e: 461a mov r2, r3 80014a0: 68fb ldr r3, [r7, #12] 80014a2: 4413 add r3, r2 80014a4: 60fb str r3, [r7, #12] } while((HAL_GetTick() - tickstart) < wait) 80014a6: bf00 nop 80014a8: f7ff ffde bl 8001468 80014ac: 4602 mov r2, r0 80014ae: 68bb ldr r3, [r7, #8] 80014b0: 1ad3 subs r3, r2, r3 80014b2: 68fa ldr r2, [r7, #12] 80014b4: 429a cmp r2, r3 80014b6: d8f7 bhi.n 80014a8 { } } 80014b8: bf00 nop 80014ba: bf00 nop 80014bc: 3710 adds r7, #16 80014be: 46bd mov sp, r7 80014c0: bd80 pop {r7, pc} 80014c2: bf00 nop 80014c4: 2000002c .word 0x2000002c 080014c8 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 80014c8: b480 push {r7} 80014ca: b085 sub sp, #20 80014cc: af00 add r7, sp, #0 80014ce: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80014d0: 687b ldr r3, [r7, #4] 80014d2: f003 0307 and.w r3, r3, #7 80014d6: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 80014d8: 4b0c ldr r3, [pc, #48] @ (800150c <__NVIC_SetPriorityGrouping+0x44>) 80014da: 68db ldr r3, [r3, #12] 80014dc: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80014de: 68ba ldr r2, [r7, #8] 80014e0: f64f 03ff movw r3, #63743 @ 0xf8ff 80014e4: 4013 ands r3, r2 80014e6: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 80014e8: 68fb ldr r3, [r7, #12] 80014ea: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80014ec: 68bb ldr r3, [r7, #8] 80014ee: 4313 orrs r3, r2 reg_value = (reg_value | 80014f0: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 80014f4: f443 3300 orr.w r3, r3, #131072 @ 0x20000 80014f8: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 80014fa: 4a04 ldr r2, [pc, #16] @ (800150c <__NVIC_SetPriorityGrouping+0x44>) 80014fc: 68bb ldr r3, [r7, #8] 80014fe: 60d3 str r3, [r2, #12] } 8001500: bf00 nop 8001502: 3714 adds r7, #20 8001504: 46bd mov sp, r7 8001506: f85d 7b04 ldr.w r7, [sp], #4 800150a: 4770 bx lr 800150c: e000ed00 .word 0xe000ed00 08001510 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8001510: b480 push {r7} 8001512: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8001514: 4b04 ldr r3, [pc, #16] @ (8001528 <__NVIC_GetPriorityGrouping+0x18>) 8001516: 68db ldr r3, [r3, #12] 8001518: 0a1b lsrs r3, r3, #8 800151a: f003 0307 and.w r3, r3, #7 } 800151e: 4618 mov r0, r3 8001520: 46bd mov sp, r7 8001522: f85d 7b04 ldr.w r7, [sp], #4 8001526: 4770 bx lr 8001528: e000ed00 .word 0xe000ed00 0800152c <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 800152c: b480 push {r7} 800152e: b083 sub sp, #12 8001530: af00 add r7, sp, #0 8001532: 4603 mov r3, r0 8001534: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001536: f997 3007 ldrsb.w r3, [r7, #7] 800153a: 2b00 cmp r3, #0 800153c: db0b blt.n 8001556 <__NVIC_EnableIRQ+0x2a> { __COMPILER_BARRIER(); NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 800153e: 79fb ldrb r3, [r7, #7] 8001540: f003 021f and.w r2, r3, #31 8001544: 4907 ldr r1, [pc, #28] @ (8001564 <__NVIC_EnableIRQ+0x38>) 8001546: f997 3007 ldrsb.w r3, [r7, #7] 800154a: 095b lsrs r3, r3, #5 800154c: 2001 movs r0, #1 800154e: fa00 f202 lsl.w r2, r0, r2 8001552: f841 2023 str.w r2, [r1, r3, lsl #2] __COMPILER_BARRIER(); } } 8001556: bf00 nop 8001558: 370c adds r7, #12 800155a: 46bd mov sp, r7 800155c: f85d 7b04 ldr.w r7, [sp], #4 8001560: 4770 bx lr 8001562: bf00 nop 8001564: e000e100 .word 0xe000e100 08001568 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8001568: b480 push {r7} 800156a: b083 sub sp, #12 800156c: af00 add r7, sp, #0 800156e: 4603 mov r3, r0 8001570: 6039 str r1, [r7, #0] 8001572: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001574: f997 3007 ldrsb.w r3, [r7, #7] 8001578: 2b00 cmp r3, #0 800157a: db0a blt.n 8001592 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800157c: 683b ldr r3, [r7, #0] 800157e: b2da uxtb r2, r3 8001580: 490c ldr r1, [pc, #48] @ (80015b4 <__NVIC_SetPriority+0x4c>) 8001582: f997 3007 ldrsb.w r3, [r7, #7] 8001586: 0112 lsls r2, r2, #4 8001588: b2d2 uxtb r2, r2 800158a: 440b add r3, r1 800158c: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 8001590: e00a b.n 80015a8 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001592: 683b ldr r3, [r7, #0] 8001594: b2da uxtb r2, r3 8001596: 4908 ldr r1, [pc, #32] @ (80015b8 <__NVIC_SetPriority+0x50>) 8001598: 79fb ldrb r3, [r7, #7] 800159a: f003 030f and.w r3, r3, #15 800159e: 3b04 subs r3, #4 80015a0: 0112 lsls r2, r2, #4 80015a2: b2d2 uxtb r2, r2 80015a4: 440b add r3, r1 80015a6: 761a strb r2, [r3, #24] } 80015a8: bf00 nop 80015aa: 370c adds r7, #12 80015ac: 46bd mov sp, r7 80015ae: f85d 7b04 ldr.w r7, [sp], #4 80015b2: 4770 bx lr 80015b4: e000e100 .word 0xe000e100 80015b8: e000ed00 .word 0xe000ed00 080015bc : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 80015bc: b480 push {r7} 80015be: b089 sub sp, #36 @ 0x24 80015c0: af00 add r7, sp, #0 80015c2: 60f8 str r0, [r7, #12] 80015c4: 60b9 str r1, [r7, #8] 80015c6: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80015c8: 68fb ldr r3, [r7, #12] 80015ca: f003 0307 and.w r3, r3, #7 80015ce: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80015d0: 69fb ldr r3, [r7, #28] 80015d2: f1c3 0307 rsb r3, r3, #7 80015d6: 2b04 cmp r3, #4 80015d8: bf28 it cs 80015da: 2304 movcs r3, #4 80015dc: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80015de: 69fb ldr r3, [r7, #28] 80015e0: 3304 adds r3, #4 80015e2: 2b06 cmp r3, #6 80015e4: d902 bls.n 80015ec 80015e6: 69fb ldr r3, [r7, #28] 80015e8: 3b03 subs r3, #3 80015ea: e000 b.n 80015ee 80015ec: 2300 movs r3, #0 80015ee: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80015f0: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80015f4: 69bb ldr r3, [r7, #24] 80015f6: fa02 f303 lsl.w r3, r2, r3 80015fa: 43da mvns r2, r3 80015fc: 68bb ldr r3, [r7, #8] 80015fe: 401a ands r2, r3 8001600: 697b ldr r3, [r7, #20] 8001602: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8001604: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 8001608: 697b ldr r3, [r7, #20] 800160a: fa01 f303 lsl.w r3, r1, r3 800160e: 43d9 mvns r1, r3 8001610: 687b ldr r3, [r7, #4] 8001612: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001614: 4313 orrs r3, r2 ); } 8001616: 4618 mov r0, r3 8001618: 3724 adds r7, #36 @ 0x24 800161a: 46bd mov sp, r7 800161c: f85d 7b04 ldr.w r7, [sp], #4 8001620: 4770 bx lr ... 08001624 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8001624: b580 push {r7, lr} 8001626: b082 sub sp, #8 8001628: af00 add r7, sp, #0 800162a: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 800162c: 687b ldr r3, [r7, #4] 800162e: 3b01 subs r3, #1 8001630: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8001634: d301 bcc.n 800163a { return (1UL); /* Reload value impossible */ 8001636: 2301 movs r3, #1 8001638: e00f b.n 800165a } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 800163a: 4a0a ldr r2, [pc, #40] @ (8001664 ) 800163c: 687b ldr r3, [r7, #4] 800163e: 3b01 subs r3, #1 8001640: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 8001642: 210f movs r1, #15 8001644: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8001648: f7ff ff8e bl 8001568 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 800164c: 4b05 ldr r3, [pc, #20] @ (8001664 ) 800164e: 2200 movs r2, #0 8001650: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 8001652: 4b04 ldr r3, [pc, #16] @ (8001664 ) 8001654: 2207 movs r2, #7 8001656: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8001658: 2300 movs r3, #0 } 800165a: 4618 mov r0, r3 800165c: 3708 adds r7, #8 800165e: 46bd mov sp, r7 8001660: bd80 pop {r7, pc} 8001662: bf00 nop 8001664: e000e010 .word 0xe000e010 08001668 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8001668: b580 push {r7, lr} 800166a: b082 sub sp, #8 800166c: af00 add r7, sp, #0 800166e: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 8001670: 6878 ldr r0, [r7, #4] 8001672: f7ff ff29 bl 80014c8 <__NVIC_SetPriorityGrouping> } 8001676: bf00 nop 8001678: 3708 adds r7, #8 800167a: 46bd mov sp, r7 800167c: bd80 pop {r7, pc} 0800167e : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 800167e: b580 push {r7, lr} 8001680: b086 sub sp, #24 8001682: af00 add r7, sp, #0 8001684: 4603 mov r3, r0 8001686: 60b9 str r1, [r7, #8] 8001688: 607a str r2, [r7, #4] 800168a: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 800168c: 2300 movs r3, #0 800168e: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 8001690: f7ff ff3e bl 8001510 <__NVIC_GetPriorityGrouping> 8001694: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8001696: 687a ldr r2, [r7, #4] 8001698: 68b9 ldr r1, [r7, #8] 800169a: 6978 ldr r0, [r7, #20] 800169c: f7ff ff8e bl 80015bc 80016a0: 4602 mov r2, r0 80016a2: f997 300f ldrsb.w r3, [r7, #15] 80016a6: 4611 mov r1, r2 80016a8: 4618 mov r0, r3 80016aa: f7ff ff5d bl 8001568 <__NVIC_SetPriority> } 80016ae: bf00 nop 80016b0: 3718 adds r7, #24 80016b2: 46bd mov sp, r7 80016b4: bd80 pop {r7, pc} 080016b6 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80016b6: b580 push {r7, lr} 80016b8: b082 sub sp, #8 80016ba: af00 add r7, sp, #0 80016bc: 4603 mov r3, r0 80016be: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80016c0: f997 3007 ldrsb.w r3, [r7, #7] 80016c4: 4618 mov r0, r3 80016c6: f7ff ff31 bl 800152c <__NVIC_EnableIRQ> } 80016ca: bf00 nop 80016cc: 3708 adds r7, #8 80016ce: 46bd mov sp, r7 80016d0: bd80 pop {r7, pc} 080016d2 : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 80016d2: b580 push {r7, lr} 80016d4: b082 sub sp, #8 80016d6: af00 add r7, sp, #0 80016d8: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 80016da: 6878 ldr r0, [r7, #4] 80016dc: f7ff ffa2 bl 8001624 80016e0: 4603 mov r3, r0 } 80016e2: 4618 mov r0, r3 80016e4: 3708 adds r7, #8 80016e6: 46bd mov sp, r7 80016e8: bd80 pop {r7, pc} 080016ea : * @param DstAddress The destination memory Buffer address * @param DataLength The length of data to be transferred from source to destination * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 80016ea: b580 push {r7, lr} 80016ec: b086 sub sp, #24 80016ee: af00 add r7, sp, #0 80016f0: 60f8 str r0, [r7, #12] 80016f2: 60b9 str r1, [r7, #8] 80016f4: 607a str r2, [r7, #4] 80016f6: 603b str r3, [r7, #0] HAL_StatusTypeDef status = HAL_OK; 80016f8: 2300 movs r3, #0 80016fa: 75fb strb r3, [r7, #23] /* calculate DMA base and stream number */ DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress; 80016fc: 68fb ldr r3, [r7, #12] 80016fe: 6d9b ldr r3, [r3, #88] @ 0x58 8001700: 613b str r3, [r7, #16] /* Check the parameters */ assert_param(IS_DMA_BUFFER_SIZE(DataLength)); /* Process locked */ __HAL_LOCK(hdma); 8001702: 68fb ldr r3, [r7, #12] 8001704: f893 3034 ldrb.w r3, [r3, #52] @ 0x34 8001708: 2b01 cmp r3, #1 800170a: d101 bne.n 8001710 800170c: 2302 movs r3, #2 800170e: e040 b.n 8001792 8001710: 68fb ldr r3, [r7, #12] 8001712: 2201 movs r2, #1 8001714: f883 2034 strb.w r2, [r3, #52] @ 0x34 if(HAL_DMA_STATE_READY == hdma->State) 8001718: 68fb ldr r3, [r7, #12] 800171a: f893 3035 ldrb.w r3, [r3, #53] @ 0x35 800171e: b2db uxtb r3, r3 8001720: 2b01 cmp r3, #1 8001722: d12f bne.n 8001784 { /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; 8001724: 68fb ldr r3, [r7, #12] 8001726: 2202 movs r2, #2 8001728: f883 2035 strb.w r2, [r3, #53] @ 0x35 /* Initialize the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; 800172c: 68fb ldr r3, [r7, #12] 800172e: 2200 movs r2, #0 8001730: 655a str r2, [r3, #84] @ 0x54 /* Configure the source, destination address and the data length */ DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); 8001732: 683b ldr r3, [r7, #0] 8001734: 687a ldr r2, [r7, #4] 8001736: 68b9 ldr r1, [r7, #8] 8001738: 68f8 ldr r0, [r7, #12] 800173a: f000 f82e bl 800179a /* Clear all interrupt flags at correct offset within the register */ regs->IFCR = 0x3FU << hdma->StreamIndex; 800173e: 68fb ldr r3, [r7, #12] 8001740: 6ddb ldr r3, [r3, #92] @ 0x5c 8001742: 223f movs r2, #63 @ 0x3f 8001744: 409a lsls r2, r3 8001746: 693b ldr r3, [r7, #16] 8001748: 609a str r2, [r3, #8] /* Enable Common interrupts*/ hdma->Instance->CR |= DMA_IT_TC | DMA_IT_TE | DMA_IT_DME; 800174a: 68fb ldr r3, [r7, #12] 800174c: 681b ldr r3, [r3, #0] 800174e: 681a ldr r2, [r3, #0] 8001750: 68fb ldr r3, [r7, #12] 8001752: 681b ldr r3, [r3, #0] 8001754: f042 0216 orr.w r2, r2, #22 8001758: 601a str r2, [r3, #0] if(hdma->XferHalfCpltCallback != NULL) 800175a: 68fb ldr r3, [r7, #12] 800175c: 6c1b ldr r3, [r3, #64] @ 0x40 800175e: 2b00 cmp r3, #0 8001760: d007 beq.n 8001772 { hdma->Instance->CR |= DMA_IT_HT; 8001762: 68fb ldr r3, [r7, #12] 8001764: 681b ldr r3, [r3, #0] 8001766: 681a ldr r2, [r3, #0] 8001768: 68fb ldr r3, [r7, #12] 800176a: 681b ldr r3, [r3, #0] 800176c: f042 0208 orr.w r2, r2, #8 8001770: 601a str r2, [r3, #0] } /* Enable the Peripheral */ __HAL_DMA_ENABLE(hdma); 8001772: 68fb ldr r3, [r7, #12] 8001774: 681b ldr r3, [r3, #0] 8001776: 681a ldr r2, [r3, #0] 8001778: 68fb ldr r3, [r7, #12] 800177a: 681b ldr r3, [r3, #0] 800177c: f042 0201 orr.w r2, r2, #1 8001780: 601a str r2, [r3, #0] 8001782: e005 b.n 8001790 } else { /* Process unlocked */ __HAL_UNLOCK(hdma); 8001784: 68fb ldr r3, [r7, #12] 8001786: 2200 movs r2, #0 8001788: f883 2034 strb.w r2, [r3, #52] @ 0x34 /* Return error status */ status = HAL_BUSY; 800178c: 2302 movs r3, #2 800178e: 75fb strb r3, [r7, #23] } return status; 8001790: 7dfb ldrb r3, [r7, #23] } 8001792: 4618 mov r0, r3 8001794: 3718 adds r7, #24 8001796: 46bd mov sp, r7 8001798: bd80 pop {r7, pc} 0800179a : * @param DstAddress The destination memory Buffer address * @param DataLength The length of data to be transferred from source to destination * @retval HAL status */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength) { 800179a: b480 push {r7} 800179c: b085 sub sp, #20 800179e: af00 add r7, sp, #0 80017a0: 60f8 str r0, [r7, #12] 80017a2: 60b9 str r1, [r7, #8] 80017a4: 607a str r2, [r7, #4] 80017a6: 603b str r3, [r7, #0] /* Clear DBM bit */ hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM); 80017a8: 68fb ldr r3, [r7, #12] 80017aa: 681b ldr r3, [r3, #0] 80017ac: 681a ldr r2, [r3, #0] 80017ae: 68fb ldr r3, [r7, #12] 80017b0: 681b ldr r3, [r3, #0] 80017b2: f422 2280 bic.w r2, r2, #262144 @ 0x40000 80017b6: 601a str r2, [r3, #0] /* Configure DMA Stream data length */ hdma->Instance->NDTR = DataLength; 80017b8: 68fb ldr r3, [r7, #12] 80017ba: 681b ldr r3, [r3, #0] 80017bc: 683a ldr r2, [r7, #0] 80017be: 605a str r2, [r3, #4] /* Memory to Peripheral */ if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) 80017c0: 68fb ldr r3, [r7, #12] 80017c2: 689b ldr r3, [r3, #8] 80017c4: 2b40 cmp r3, #64 @ 0x40 80017c6: d108 bne.n 80017da { /* Configure DMA Stream destination address */ hdma->Instance->PAR = DstAddress; 80017c8: 68fb ldr r3, [r7, #12] 80017ca: 681b ldr r3, [r3, #0] 80017cc: 687a ldr r2, [r7, #4] 80017ce: 609a str r2, [r3, #8] /* Configure DMA Stream source address */ hdma->Instance->M0AR = SrcAddress; 80017d0: 68fb ldr r3, [r7, #12] 80017d2: 681b ldr r3, [r3, #0] 80017d4: 68ba ldr r2, [r7, #8] 80017d6: 60da str r2, [r3, #12] hdma->Instance->PAR = SrcAddress; /* Configure DMA Stream destination address */ hdma->Instance->M0AR = DstAddress; } } 80017d8: e007 b.n 80017ea hdma->Instance->PAR = SrcAddress; 80017da: 68fb ldr r3, [r7, #12] 80017dc: 681b ldr r3, [r3, #0] 80017de: 68ba ldr r2, [r7, #8] 80017e0: 609a str r2, [r3, #8] hdma->Instance->M0AR = DstAddress; 80017e2: 68fb ldr r3, [r7, #12] 80017e4: 681b ldr r3, [r3, #0] 80017e6: 687a ldr r2, [r7, #4] 80017e8: 60da str r2, [r3, #12] } 80017ea: bf00 nop 80017ec: 3714 adds r7, #20 80017ee: 46bd mov sp, r7 80017f0: f85d 7b04 ldr.w r7, [sp], #4 80017f4: 4770 bx lr ... 080017f8 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80017f8: b480 push {r7} 80017fa: b089 sub sp, #36 @ 0x24 80017fc: af00 add r7, sp, #0 80017fe: 6078 str r0, [r7, #4] 8001800: 6039 str r1, [r7, #0] uint32_t position; uint32_t ioposition = 0x00U; 8001802: 2300 movs r3, #0 8001804: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; 8001806: 2300 movs r3, #0 8001808: 613b str r3, [r7, #16] uint32_t temp = 0x00U; 800180a: 2300 movs r3, #0 800180c: 61bb str r3, [r7, #24] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for(position = 0U; position < GPIO_NUMBER; position++) 800180e: 2300 movs r3, #0 8001810: 61fb str r3, [r7, #28] 8001812: e165 b.n 8001ae0 { /* Get the IO position */ ioposition = 0x01U << position; 8001814: 2201 movs r2, #1 8001816: 69fb ldr r3, [r7, #28] 8001818: fa02 f303 lsl.w r3, r2, r3 800181c: 617b str r3, [r7, #20] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 800181e: 683b ldr r3, [r7, #0] 8001820: 681b ldr r3, [r3, #0] 8001822: 697a ldr r2, [r7, #20] 8001824: 4013 ands r3, r2 8001826: 613b str r3, [r7, #16] if(iocurrent == ioposition) 8001828: 693a ldr r2, [r7, #16] 800182a: 697b ldr r3, [r7, #20] 800182c: 429a cmp r2, r3 800182e: f040 8154 bne.w 8001ada { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ 8001832: 683b ldr r3, [r7, #0] 8001834: 685b ldr r3, [r3, #4] 8001836: f003 0303 and.w r3, r3, #3 800183a: 2b01 cmp r3, #1 800183c: d005 beq.n 800184a (GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 800183e: 683b ldr r3, [r7, #0] 8001840: 685b ldr r3, [r3, #4] 8001842: f003 0303 and.w r3, r3, #3 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ 8001846: 2b02 cmp r3, #2 8001848: d130 bne.n 80018ac { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; 800184a: 687b ldr r3, [r7, #4] 800184c: 689b ldr r3, [r3, #8] 800184e: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); 8001850: 69fb ldr r3, [r7, #28] 8001852: 005b lsls r3, r3, #1 8001854: 2203 movs r2, #3 8001856: fa02 f303 lsl.w r3, r2, r3 800185a: 43db mvns r3, r3 800185c: 69ba ldr r2, [r7, #24] 800185e: 4013 ands r3, r2 8001860: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2U)); 8001862: 683b ldr r3, [r7, #0] 8001864: 68da ldr r2, [r3, #12] 8001866: 69fb ldr r3, [r7, #28] 8001868: 005b lsls r3, r3, #1 800186a: fa02 f303 lsl.w r3, r2, r3 800186e: 69ba ldr r2, [r7, #24] 8001870: 4313 orrs r3, r2 8001872: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; 8001874: 687b ldr r3, [r7, #4] 8001876: 69ba ldr r2, [r7, #24] 8001878: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; 800187a: 687b ldr r3, [r7, #4] 800187c: 685b ldr r3, [r3, #4] 800187e: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT_0 << position) ; 8001880: 2201 movs r2, #1 8001882: 69fb ldr r3, [r7, #28] 8001884: fa02 f303 lsl.w r3, r2, r3 8001888: 43db mvns r3, r3 800188a: 69ba ldr r2, [r7, #24] 800188c: 4013 ands r3, r2 800188e: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 8001890: 683b ldr r3, [r7, #0] 8001892: 685b ldr r3, [r3, #4] 8001894: 091b lsrs r3, r3, #4 8001896: f003 0201 and.w r2, r3, #1 800189a: 69fb ldr r3, [r7, #28] 800189c: fa02 f303 lsl.w r3, r2, r3 80018a0: 69ba ldr r2, [r7, #24] 80018a2: 4313 orrs r3, r2 80018a4: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; 80018a6: 687b ldr r3, [r7, #4] 80018a8: 69ba ldr r2, [r7, #24] 80018aa: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) 80018ac: 683b ldr r3, [r7, #0] 80018ae: 685b ldr r3, [r3, #4] 80018b0: f003 0303 and.w r3, r3, #3 80018b4: 2b03 cmp r3, #3 80018b6: d017 beq.n 80018e8 { /* Check the parameters */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; 80018b8: 687b ldr r3, [r7, #4] 80018ba: 68db ldr r3, [r3, #12] 80018bc: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); 80018be: 69fb ldr r3, [r7, #28] 80018c0: 005b lsls r3, r3, #1 80018c2: 2203 movs r2, #3 80018c4: fa02 f303 lsl.w r3, r2, r3 80018c8: 43db mvns r3, r3 80018ca: 69ba ldr r2, [r7, #24] 80018cc: 4013 ands r3, r2 80018ce: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2U)); 80018d0: 683b ldr r3, [r7, #0] 80018d2: 689a ldr r2, [r3, #8] 80018d4: 69fb ldr r3, [r7, #28] 80018d6: 005b lsls r3, r3, #1 80018d8: fa02 f303 lsl.w r3, r2, r3 80018dc: 69ba ldr r2, [r7, #24] 80018de: 4313 orrs r3, r2 80018e0: 61bb str r3, [r7, #24] GPIOx->PUPDR = temp; 80018e2: 687b ldr r3, [r7, #4] 80018e4: 69ba ldr r2, [r7, #24] 80018e6: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 80018e8: 683b ldr r3, [r7, #0] 80018ea: 685b ldr r3, [r3, #4] 80018ec: f003 0303 and.w r3, r3, #3 80018f0: 2b02 cmp r3, #2 80018f2: d123 bne.n 800193c { /* Check the Alternate function parameter */ assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; 80018f4: 69fb ldr r3, [r7, #28] 80018f6: 08da lsrs r2, r3, #3 80018f8: 687b ldr r3, [r7, #4] 80018fa: 3208 adds r2, #8 80018fc: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8001900: 61bb str r3, [r7, #24] temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; 8001902: 69fb ldr r3, [r7, #28] 8001904: f003 0307 and.w r3, r3, #7 8001908: 009b lsls r3, r3, #2 800190a: 220f movs r2, #15 800190c: fa02 f303 lsl.w r3, r2, r3 8001910: 43db mvns r3, r3 8001912: 69ba ldr r2, [r7, #24] 8001914: 4013 ands r3, r2 8001916: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); 8001918: 683b ldr r3, [r7, #0] 800191a: 691a ldr r2, [r3, #16] 800191c: 69fb ldr r3, [r7, #28] 800191e: f003 0307 and.w r3, r3, #7 8001922: 009b lsls r3, r3, #2 8001924: fa02 f303 lsl.w r3, r2, r3 8001928: 69ba ldr r2, [r7, #24] 800192a: 4313 orrs r3, r2 800192c: 61bb str r3, [r7, #24] GPIOx->AFR[position >> 3U] = temp; 800192e: 69fb ldr r3, [r7, #28] 8001930: 08da lsrs r2, r3, #3 8001932: 687b ldr r3, [r7, #4] 8001934: 3208 adds r2, #8 8001936: 69b9 ldr r1, [r7, #24] 8001938: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; 800193c: 687b ldr r3, [r7, #4] 800193e: 681b ldr r3, [r3, #0] 8001940: 61bb str r3, [r7, #24] temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); 8001942: 69fb ldr r3, [r7, #28] 8001944: 005b lsls r3, r3, #1 8001946: 2203 movs r2, #3 8001948: fa02 f303 lsl.w r3, r2, r3 800194c: 43db mvns r3, r3 800194e: 69ba ldr r2, [r7, #24] 8001950: 4013 ands r3, r2 8001952: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); 8001954: 683b ldr r3, [r7, #0] 8001956: 685b ldr r3, [r3, #4] 8001958: f003 0203 and.w r2, r3, #3 800195c: 69fb ldr r3, [r7, #28] 800195e: 005b lsls r3, r3, #1 8001960: fa02 f303 lsl.w r3, r2, r3 8001964: 69ba ldr r2, [r7, #24] 8001966: 4313 orrs r3, r2 8001968: 61bb str r3, [r7, #24] GPIOx->MODER = temp; 800196a: 687b ldr r3, [r7, #4] 800196c: 69ba ldr r2, [r7, #24] 800196e: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) != 0x00U) 8001970: 683b ldr r3, [r7, #0] 8001972: 685b ldr r3, [r3, #4] 8001974: f403 3340 and.w r3, r3, #196608 @ 0x30000 8001978: 2b00 cmp r3, #0 800197a: f000 80ae beq.w 8001ada { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 800197e: 2300 movs r3, #0 8001980: 60fb str r3, [r7, #12] 8001982: 4b5d ldr r3, [pc, #372] @ (8001af8 ) 8001984: 6c5b ldr r3, [r3, #68] @ 0x44 8001986: 4a5c ldr r2, [pc, #368] @ (8001af8 ) 8001988: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800198c: 6453 str r3, [r2, #68] @ 0x44 800198e: 4b5a ldr r3, [pc, #360] @ (8001af8 ) 8001990: 6c5b ldr r3, [r3, #68] @ 0x44 8001992: f403 4380 and.w r3, r3, #16384 @ 0x4000 8001996: 60fb str r3, [r7, #12] 8001998: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2U]; 800199a: 4a58 ldr r2, [pc, #352] @ (8001afc ) 800199c: 69fb ldr r3, [r7, #28] 800199e: 089b lsrs r3, r3, #2 80019a0: 3302 adds r3, #2 80019a2: f852 3023 ldr.w r3, [r2, r3, lsl #2] 80019a6: 61bb str r3, [r7, #24] temp &= ~(0x0FU << (4U * (position & 0x03U))); 80019a8: 69fb ldr r3, [r7, #28] 80019aa: f003 0303 and.w r3, r3, #3 80019ae: 009b lsls r3, r3, #2 80019b0: 220f movs r2, #15 80019b2: fa02 f303 lsl.w r3, r2, r3 80019b6: 43db mvns r3, r3 80019b8: 69ba ldr r2, [r7, #24] 80019ba: 4013 ands r3, r2 80019bc: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 80019be: 687b ldr r3, [r7, #4] 80019c0: 4a4f ldr r2, [pc, #316] @ (8001b00 ) 80019c2: 4293 cmp r3, r2 80019c4: d025 beq.n 8001a12 80019c6: 687b ldr r3, [r7, #4] 80019c8: 4a4e ldr r2, [pc, #312] @ (8001b04 ) 80019ca: 4293 cmp r3, r2 80019cc: d01f beq.n 8001a0e 80019ce: 687b ldr r3, [r7, #4] 80019d0: 4a4d ldr r2, [pc, #308] @ (8001b08 ) 80019d2: 4293 cmp r3, r2 80019d4: d019 beq.n 8001a0a 80019d6: 687b ldr r3, [r7, #4] 80019d8: 4a4c ldr r2, [pc, #304] @ (8001b0c ) 80019da: 4293 cmp r3, r2 80019dc: d013 beq.n 8001a06 80019de: 687b ldr r3, [r7, #4] 80019e0: 4a4b ldr r2, [pc, #300] @ (8001b10 ) 80019e2: 4293 cmp r3, r2 80019e4: d00d beq.n 8001a02 80019e6: 687b ldr r3, [r7, #4] 80019e8: 4a4a ldr r2, [pc, #296] @ (8001b14 ) 80019ea: 4293 cmp r3, r2 80019ec: d007 beq.n 80019fe 80019ee: 687b ldr r3, [r7, #4] 80019f0: 4a49 ldr r2, [pc, #292] @ (8001b18 ) 80019f2: 4293 cmp r3, r2 80019f4: d101 bne.n 80019fa 80019f6: 2306 movs r3, #6 80019f8: e00c b.n 8001a14 80019fa: 2307 movs r3, #7 80019fc: e00a b.n 8001a14 80019fe: 2305 movs r3, #5 8001a00: e008 b.n 8001a14 8001a02: 2304 movs r3, #4 8001a04: e006 b.n 8001a14 8001a06: 2303 movs r3, #3 8001a08: e004 b.n 8001a14 8001a0a: 2302 movs r3, #2 8001a0c: e002 b.n 8001a14 8001a0e: 2301 movs r3, #1 8001a10: e000 b.n 8001a14 8001a12: 2300 movs r3, #0 8001a14: 69fa ldr r2, [r7, #28] 8001a16: f002 0203 and.w r2, r2, #3 8001a1a: 0092 lsls r2, r2, #2 8001a1c: 4093 lsls r3, r2 8001a1e: 69ba ldr r2, [r7, #24] 8001a20: 4313 orrs r3, r2 8001a22: 61bb str r3, [r7, #24] SYSCFG->EXTICR[position >> 2U] = temp; 8001a24: 4935 ldr r1, [pc, #212] @ (8001afc ) 8001a26: 69fb ldr r3, [r7, #28] 8001a28: 089b lsrs r3, r3, #2 8001a2a: 3302 adds r3, #2 8001a2c: 69ba ldr r2, [r7, #24] 8001a2e: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; 8001a32: 4b3a ldr r3, [pc, #232] @ (8001b1c ) 8001a34: 689b ldr r3, [r3, #8] 8001a36: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8001a38: 693b ldr r3, [r7, #16] 8001a3a: 43db mvns r3, r3 8001a3c: 69ba ldr r2, [r7, #24] 8001a3e: 4013 ands r3, r2 8001a40: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) 8001a42: 683b ldr r3, [r7, #0] 8001a44: 685b ldr r3, [r3, #4] 8001a46: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8001a4a: 2b00 cmp r3, #0 8001a4c: d003 beq.n 8001a56 { temp |= iocurrent; 8001a4e: 69ba ldr r2, [r7, #24] 8001a50: 693b ldr r3, [r7, #16] 8001a52: 4313 orrs r3, r2 8001a54: 61bb str r3, [r7, #24] } EXTI->RTSR = temp; 8001a56: 4a31 ldr r2, [pc, #196] @ (8001b1c ) 8001a58: 69bb ldr r3, [r7, #24] 8001a5a: 6093 str r3, [r2, #8] temp = EXTI->FTSR; 8001a5c: 4b2f ldr r3, [pc, #188] @ (8001b1c ) 8001a5e: 68db ldr r3, [r3, #12] 8001a60: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8001a62: 693b ldr r3, [r7, #16] 8001a64: 43db mvns r3, r3 8001a66: 69ba ldr r2, [r7, #24] 8001a68: 4013 ands r3, r2 8001a6a: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) 8001a6c: 683b ldr r3, [r7, #0] 8001a6e: 685b ldr r3, [r3, #4] 8001a70: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8001a74: 2b00 cmp r3, #0 8001a76: d003 beq.n 8001a80 { temp |= iocurrent; 8001a78: 69ba ldr r2, [r7, #24] 8001a7a: 693b ldr r3, [r7, #16] 8001a7c: 4313 orrs r3, r2 8001a7e: 61bb str r3, [r7, #24] } EXTI->FTSR = temp; 8001a80: 4a26 ldr r2, [pc, #152] @ (8001b1c ) 8001a82: 69bb ldr r3, [r7, #24] 8001a84: 60d3 str r3, [r2, #12] temp = EXTI->EMR; 8001a86: 4b25 ldr r3, [pc, #148] @ (8001b1c ) 8001a88: 685b ldr r3, [r3, #4] 8001a8a: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8001a8c: 693b ldr r3, [r7, #16] 8001a8e: 43db mvns r3, r3 8001a90: 69ba ldr r2, [r7, #24] 8001a92: 4013 ands r3, r2 8001a94: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_EVT) != 0x00U) 8001a96: 683b ldr r3, [r7, #0] 8001a98: 685b ldr r3, [r3, #4] 8001a9a: f403 3300 and.w r3, r3, #131072 @ 0x20000 8001a9e: 2b00 cmp r3, #0 8001aa0: d003 beq.n 8001aaa { temp |= iocurrent; 8001aa2: 69ba ldr r2, [r7, #24] 8001aa4: 693b ldr r3, [r7, #16] 8001aa6: 4313 orrs r3, r2 8001aa8: 61bb str r3, [r7, #24] } EXTI->EMR = temp; 8001aaa: 4a1c ldr r2, [pc, #112] @ (8001b1c ) 8001aac: 69bb ldr r3, [r7, #24] 8001aae: 6053 str r3, [r2, #4] /* Clear EXTI line configuration */ temp = EXTI->IMR; 8001ab0: 4b1a ldr r3, [pc, #104] @ (8001b1c ) 8001ab2: 681b ldr r3, [r3, #0] 8001ab4: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8001ab6: 693b ldr r3, [r7, #16] 8001ab8: 43db mvns r3, r3 8001aba: 69ba ldr r2, [r7, #24] 8001abc: 4013 ands r3, r2 8001abe: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_IT) != 0x00U) 8001ac0: 683b ldr r3, [r7, #0] 8001ac2: 685b ldr r3, [r3, #4] 8001ac4: f403 3380 and.w r3, r3, #65536 @ 0x10000 8001ac8: 2b00 cmp r3, #0 8001aca: d003 beq.n 8001ad4 { temp |= iocurrent; 8001acc: 69ba ldr r2, [r7, #24] 8001ace: 693b ldr r3, [r7, #16] 8001ad0: 4313 orrs r3, r2 8001ad2: 61bb str r3, [r7, #24] } EXTI->IMR = temp; 8001ad4: 4a11 ldr r2, [pc, #68] @ (8001b1c ) 8001ad6: 69bb ldr r3, [r7, #24] 8001ad8: 6013 str r3, [r2, #0] for(position = 0U; position < GPIO_NUMBER; position++) 8001ada: 69fb ldr r3, [r7, #28] 8001adc: 3301 adds r3, #1 8001ade: 61fb str r3, [r7, #28] 8001ae0: 69fb ldr r3, [r7, #28] 8001ae2: 2b0f cmp r3, #15 8001ae4: f67f ae96 bls.w 8001814 } } } } 8001ae8: bf00 nop 8001aea: bf00 nop 8001aec: 3724 adds r7, #36 @ 0x24 8001aee: 46bd mov sp, r7 8001af0: f85d 7b04 ldr.w r7, [sp], #4 8001af4: 4770 bx lr 8001af6: bf00 nop 8001af8: 40023800 .word 0x40023800 8001afc: 40013800 .word 0x40013800 8001b00: 40020000 .word 0x40020000 8001b04: 40020400 .word 0x40020400 8001b08: 40020800 .word 0x40020800 8001b0c: 40020c00 .word 0x40020c00 8001b10: 40021000 .word 0x40021000 8001b14: 40021400 .word 0x40021400 8001b18: 40021800 .word 0x40021800 8001b1c: 40013c00 .word 0x40013c00 08001b20 : * @param GPIO_Pin specifies the port bit to read. * This parameter can be GPIO_PIN_x where x can be (0..15). * @retval The input port pin value. */ GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) { 8001b20: b480 push {r7} 8001b22: b085 sub sp, #20 8001b24: af00 add r7, sp, #0 8001b26: 6078 str r0, [r7, #4] 8001b28: 460b mov r3, r1 8001b2a: 807b strh r3, [r7, #2] GPIO_PinState bitstatus; /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) 8001b2c: 687b ldr r3, [r7, #4] 8001b2e: 691a ldr r2, [r3, #16] 8001b30: 887b ldrh r3, [r7, #2] 8001b32: 4013 ands r3, r2 8001b34: 2b00 cmp r3, #0 8001b36: d002 beq.n 8001b3e { bitstatus = GPIO_PIN_SET; 8001b38: 2301 movs r3, #1 8001b3a: 73fb strb r3, [r7, #15] 8001b3c: e001 b.n 8001b42 } else { bitstatus = GPIO_PIN_RESET; 8001b3e: 2300 movs r3, #0 8001b40: 73fb strb r3, [r7, #15] } return bitstatus; 8001b42: 7bfb ldrb r3, [r7, #15] } 8001b44: 4618 mov r0, r3 8001b46: 3714 adds r7, #20 8001b48: 46bd mov sp, r7 8001b4a: f85d 7b04 ldr.w r7, [sp], #4 8001b4e: 4770 bx lr 08001b50 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8001b50: b480 push {r7} 8001b52: b083 sub sp, #12 8001b54: af00 add r7, sp, #0 8001b56: 6078 str r0, [r7, #4] 8001b58: 460b mov r3, r1 8001b5a: 807b strh r3, [r7, #2] 8001b5c: 4613 mov r3, r2 8001b5e: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) 8001b60: 787b ldrb r3, [r7, #1] 8001b62: 2b00 cmp r3, #0 8001b64: d003 beq.n 8001b6e { GPIOx->BSRR = GPIO_Pin; 8001b66: 887a ldrh r2, [r7, #2] 8001b68: 687b ldr r3, [r7, #4] 8001b6a: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; } } 8001b6c: e003 b.n 8001b76 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 8001b6e: 887b ldrh r3, [r7, #2] 8001b70: 041a lsls r2, r3, #16 8001b72: 687b ldr r3, [r7, #4] 8001b74: 619a str r2, [r3, #24] } 8001b76: bf00 nop 8001b78: 370c adds r7, #12 8001b7a: 46bd mov sp, r7 8001b7c: f85d 7b04 ldr.w r7, [sp], #4 8001b80: 4770 bx lr ... 08001b84 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 8001b84: b580 push {r7, lr} 8001b86: b084 sub sp, #16 8001b88: af00 add r7, sp, #0 8001b8a: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) 8001b8c: 687b ldr r3, [r7, #4] 8001b8e: 2b00 cmp r3, #0 8001b90: d101 bne.n 8001b96 { return HAL_ERROR; 8001b92: 2301 movs r3, #1 8001b94: e12b b.n 8001dee assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 8001b96: 687b ldr r3, [r7, #4] 8001b98: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8001b9c: b2db uxtb r3, r3 8001b9e: 2b00 cmp r3, #0 8001ba0: d106 bne.n 8001bb0 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8001ba2: 687b ldr r3, [r7, #4] 8001ba4: 2200 movs r2, #0 8001ba6: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 8001baa: 6878 ldr r0, [r7, #4] 8001bac: f7ff f95c bl 8000e68 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 8001bb0: 687b ldr r3, [r7, #4] 8001bb2: 2224 movs r2, #36 @ 0x24 8001bb4: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8001bb8: 687b ldr r3, [r7, #4] 8001bba: 681b ldr r3, [r3, #0] 8001bbc: 681a ldr r2, [r3, #0] 8001bbe: 687b ldr r3, [r7, #4] 8001bc0: 681b ldr r3, [r3, #0] 8001bc2: f022 0201 bic.w r2, r2, #1 8001bc6: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; 8001bc8: 687b ldr r3, [r7, #4] 8001bca: 681b ldr r3, [r3, #0] 8001bcc: 681a ldr r2, [r3, #0] 8001bce: 687b ldr r3, [r7, #4] 8001bd0: 681b ldr r3, [r3, #0] 8001bd2: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8001bd6: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; 8001bd8: 687b ldr r3, [r7, #4] 8001bda: 681b ldr r3, [r3, #0] 8001bdc: 681a ldr r2, [r3, #0] 8001bde: 687b ldr r3, [r7, #4] 8001be0: 681b ldr r3, [r3, #0] 8001be2: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8001be6: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 8001be8: f001 fc88 bl 80034fc 8001bec: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 8001bee: 687b ldr r3, [r7, #4] 8001bf0: 685b ldr r3, [r3, #4] 8001bf2: 4a81 ldr r2, [pc, #516] @ (8001df8 ) 8001bf4: 4293 cmp r3, r2 8001bf6: d807 bhi.n 8001c08 8001bf8: 68fb ldr r3, [r7, #12] 8001bfa: 4a80 ldr r2, [pc, #512] @ (8001dfc ) 8001bfc: 4293 cmp r3, r2 8001bfe: bf94 ite ls 8001c00: 2301 movls r3, #1 8001c02: 2300 movhi r3, #0 8001c04: b2db uxtb r3, r3 8001c06: e006 b.n 8001c16 8001c08: 68fb ldr r3, [r7, #12] 8001c0a: 4a7d ldr r2, [pc, #500] @ (8001e00 ) 8001c0c: 4293 cmp r3, r2 8001c0e: bf94 ite ls 8001c10: 2301 movls r3, #1 8001c12: 2300 movhi r3, #0 8001c14: b2db uxtb r3, r3 8001c16: 2b00 cmp r3, #0 8001c18: d001 beq.n 8001c1e { return HAL_ERROR; 8001c1a: 2301 movs r3, #1 8001c1c: e0e7 b.n 8001dee } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 8001c1e: 68fb ldr r3, [r7, #12] 8001c20: 4a78 ldr r2, [pc, #480] @ (8001e04 ) 8001c22: fba2 2303 umull r2, r3, r2, r3 8001c26: 0c9b lsrs r3, r3, #18 8001c28: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); 8001c2a: 687b ldr r3, [r7, #4] 8001c2c: 681b ldr r3, [r3, #0] 8001c2e: 685b ldr r3, [r3, #4] 8001c30: f023 013f bic.w r1, r3, #63 @ 0x3f 8001c34: 687b ldr r3, [r7, #4] 8001c36: 681b ldr r3, [r3, #0] 8001c38: 68ba ldr r2, [r7, #8] 8001c3a: 430a orrs r2, r1 8001c3c: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); 8001c3e: 687b ldr r3, [r7, #4] 8001c40: 681b ldr r3, [r3, #0] 8001c42: 6a1b ldr r3, [r3, #32] 8001c44: f023 013f bic.w r1, r3, #63 @ 0x3f 8001c48: 687b ldr r3, [r7, #4] 8001c4a: 685b ldr r3, [r3, #4] 8001c4c: 4a6a ldr r2, [pc, #424] @ (8001df8 ) 8001c4e: 4293 cmp r3, r2 8001c50: d802 bhi.n 8001c58 8001c52: 68bb ldr r3, [r7, #8] 8001c54: 3301 adds r3, #1 8001c56: e009 b.n 8001c6c 8001c58: 68bb ldr r3, [r7, #8] 8001c5a: f44f 7296 mov.w r2, #300 @ 0x12c 8001c5e: fb02 f303 mul.w r3, r2, r3 8001c62: 4a69 ldr r2, [pc, #420] @ (8001e08 ) 8001c64: fba2 2303 umull r2, r3, r2, r3 8001c68: 099b lsrs r3, r3, #6 8001c6a: 3301 adds r3, #1 8001c6c: 687a ldr r2, [r7, #4] 8001c6e: 6812 ldr r2, [r2, #0] 8001c70: 430b orrs r3, r1 8001c72: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); 8001c74: 687b ldr r3, [r7, #4] 8001c76: 681b ldr r3, [r3, #0] 8001c78: 69db ldr r3, [r3, #28] 8001c7a: f423 424f bic.w r2, r3, #52992 @ 0xcf00 8001c7e: f022 02ff bic.w r2, r2, #255 @ 0xff 8001c82: 687b ldr r3, [r7, #4] 8001c84: 685b ldr r3, [r3, #4] 8001c86: 495c ldr r1, [pc, #368] @ (8001df8 ) 8001c88: 428b cmp r3, r1 8001c8a: d819 bhi.n 8001cc0 8001c8c: 68fb ldr r3, [r7, #12] 8001c8e: 1e59 subs r1, r3, #1 8001c90: 687b ldr r3, [r7, #4] 8001c92: 685b ldr r3, [r3, #4] 8001c94: 005b lsls r3, r3, #1 8001c96: fbb1 f3f3 udiv r3, r1, r3 8001c9a: 1c59 adds r1, r3, #1 8001c9c: f640 73fc movw r3, #4092 @ 0xffc 8001ca0: 400b ands r3, r1 8001ca2: 2b00 cmp r3, #0 8001ca4: d00a beq.n 8001cbc 8001ca6: 68fb ldr r3, [r7, #12] 8001ca8: 1e59 subs r1, r3, #1 8001caa: 687b ldr r3, [r7, #4] 8001cac: 685b ldr r3, [r3, #4] 8001cae: 005b lsls r3, r3, #1 8001cb0: fbb1 f3f3 udiv r3, r1, r3 8001cb4: 3301 adds r3, #1 8001cb6: f3c3 030b ubfx r3, r3, #0, #12 8001cba: e051 b.n 8001d60 8001cbc: 2304 movs r3, #4 8001cbe: e04f b.n 8001d60 8001cc0: 687b ldr r3, [r7, #4] 8001cc2: 689b ldr r3, [r3, #8] 8001cc4: 2b00 cmp r3, #0 8001cc6: d111 bne.n 8001cec 8001cc8: 68fb ldr r3, [r7, #12] 8001cca: 1e58 subs r0, r3, #1 8001ccc: 687b ldr r3, [r7, #4] 8001cce: 6859 ldr r1, [r3, #4] 8001cd0: 460b mov r3, r1 8001cd2: 005b lsls r3, r3, #1 8001cd4: 440b add r3, r1 8001cd6: fbb0 f3f3 udiv r3, r0, r3 8001cda: 3301 adds r3, #1 8001cdc: f3c3 030b ubfx r3, r3, #0, #12 8001ce0: 2b00 cmp r3, #0 8001ce2: bf0c ite eq 8001ce4: 2301 moveq r3, #1 8001ce6: 2300 movne r3, #0 8001ce8: b2db uxtb r3, r3 8001cea: e012 b.n 8001d12 8001cec: 68fb ldr r3, [r7, #12] 8001cee: 1e58 subs r0, r3, #1 8001cf0: 687b ldr r3, [r7, #4] 8001cf2: 6859 ldr r1, [r3, #4] 8001cf4: 460b mov r3, r1 8001cf6: 009b lsls r3, r3, #2 8001cf8: 440b add r3, r1 8001cfa: 0099 lsls r1, r3, #2 8001cfc: 440b add r3, r1 8001cfe: fbb0 f3f3 udiv r3, r0, r3 8001d02: 3301 adds r3, #1 8001d04: f3c3 030b ubfx r3, r3, #0, #12 8001d08: 2b00 cmp r3, #0 8001d0a: bf0c ite eq 8001d0c: 2301 moveq r3, #1 8001d0e: 2300 movne r3, #0 8001d10: b2db uxtb r3, r3 8001d12: 2b00 cmp r3, #0 8001d14: d001 beq.n 8001d1a 8001d16: 2301 movs r3, #1 8001d18: e022 b.n 8001d60 8001d1a: 687b ldr r3, [r7, #4] 8001d1c: 689b ldr r3, [r3, #8] 8001d1e: 2b00 cmp r3, #0 8001d20: d10e bne.n 8001d40 8001d22: 68fb ldr r3, [r7, #12] 8001d24: 1e58 subs r0, r3, #1 8001d26: 687b ldr r3, [r7, #4] 8001d28: 6859 ldr r1, [r3, #4] 8001d2a: 460b mov r3, r1 8001d2c: 005b lsls r3, r3, #1 8001d2e: 440b add r3, r1 8001d30: fbb0 f3f3 udiv r3, r0, r3 8001d34: 3301 adds r3, #1 8001d36: f3c3 030b ubfx r3, r3, #0, #12 8001d3a: f443 4300 orr.w r3, r3, #32768 @ 0x8000 8001d3e: e00f b.n 8001d60 8001d40: 68fb ldr r3, [r7, #12] 8001d42: 1e58 subs r0, r3, #1 8001d44: 687b ldr r3, [r7, #4] 8001d46: 6859 ldr r1, [r3, #4] 8001d48: 460b mov r3, r1 8001d4a: 009b lsls r3, r3, #2 8001d4c: 440b add r3, r1 8001d4e: 0099 lsls r1, r3, #2 8001d50: 440b add r3, r1 8001d52: fbb0 f3f3 udiv r3, r0, r3 8001d56: 3301 adds r3, #1 8001d58: f3c3 030b ubfx r3, r3, #0, #12 8001d5c: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8001d60: 6879 ldr r1, [r7, #4] 8001d62: 6809 ldr r1, [r1, #0] 8001d64: 4313 orrs r3, r2 8001d66: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); 8001d68: 687b ldr r3, [r7, #4] 8001d6a: 681b ldr r3, [r3, #0] 8001d6c: 681b ldr r3, [r3, #0] 8001d6e: f023 01c0 bic.w r1, r3, #192 @ 0xc0 8001d72: 687b ldr r3, [r7, #4] 8001d74: 69da ldr r2, [r3, #28] 8001d76: 687b ldr r3, [r7, #4] 8001d78: 6a1b ldr r3, [r3, #32] 8001d7a: 431a orrs r2, r3 8001d7c: 687b ldr r3, [r7, #4] 8001d7e: 681b ldr r3, [r3, #0] 8001d80: 430a orrs r2, r1 8001d82: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); 8001d84: 687b ldr r3, [r7, #4] 8001d86: 681b ldr r3, [r3, #0] 8001d88: 689b ldr r3, [r3, #8] 8001d8a: f423 4303 bic.w r3, r3, #33536 @ 0x8300 8001d8e: f023 03ff bic.w r3, r3, #255 @ 0xff 8001d92: 687a ldr r2, [r7, #4] 8001d94: 6911 ldr r1, [r2, #16] 8001d96: 687a ldr r2, [r7, #4] 8001d98: 68d2 ldr r2, [r2, #12] 8001d9a: 4311 orrs r1, r2 8001d9c: 687a ldr r2, [r7, #4] 8001d9e: 6812 ldr r2, [r2, #0] 8001da0: 430b orrs r3, r1 8001da2: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); 8001da4: 687b ldr r3, [r7, #4] 8001da6: 681b ldr r3, [r3, #0] 8001da8: 68db ldr r3, [r3, #12] 8001daa: f023 01ff bic.w r1, r3, #255 @ 0xff 8001dae: 687b ldr r3, [r7, #4] 8001db0: 695a ldr r2, [r3, #20] 8001db2: 687b ldr r3, [r7, #4] 8001db4: 699b ldr r3, [r3, #24] 8001db6: 431a orrs r2, r3 8001db8: 687b ldr r3, [r7, #4] 8001dba: 681b ldr r3, [r3, #0] 8001dbc: 430a orrs r2, r1 8001dbe: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8001dc0: 687b ldr r3, [r7, #4] 8001dc2: 681b ldr r3, [r3, #0] 8001dc4: 681a ldr r2, [r3, #0] 8001dc6: 687b ldr r3, [r7, #4] 8001dc8: 681b ldr r3, [r3, #0] 8001dca: f042 0201 orr.w r2, r2, #1 8001dce: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8001dd0: 687b ldr r3, [r7, #4] 8001dd2: 2200 movs r2, #0 8001dd4: 641a str r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_READY; 8001dd6: 687b ldr r3, [r7, #4] 8001dd8: 2220 movs r2, #32 8001dda: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->PreviousState = I2C_STATE_NONE; 8001dde: 687b ldr r3, [r7, #4] 8001de0: 2200 movs r2, #0 8001de2: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8001de4: 687b ldr r3, [r7, #4] 8001de6: 2200 movs r2, #0 8001de8: f883 203e strb.w r2, [r3, #62] @ 0x3e return HAL_OK; 8001dec: 2300 movs r3, #0 } 8001dee: 4618 mov r0, r3 8001df0: 3710 adds r7, #16 8001df2: 46bd mov sp, r7 8001df4: bd80 pop {r7, pc} 8001df6: bf00 nop 8001df8: 000186a0 .word 0x000186a0 8001dfc: 001e847f .word 0x001e847f 8001e00: 003d08ff .word 0x003d08ff 8001e04: 431bde83 .word 0x431bde83 8001e08: 10624dd3 .word 0x10624dd3 08001e0c : * parameters in the PCD_InitTypeDef and initialize the associated handle. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) { 8001e0c: b580 push {r7, lr} 8001e0e: b086 sub sp, #24 8001e10: af02 add r7, sp, #8 8001e12: 6078 str r0, [r7, #4] const USB_OTG_GlobalTypeDef *USBx; #endif /* defined (USB_OTG_FS) */ uint8_t i; /* Check the PCD handle allocation */ if (hpcd == NULL) 8001e14: 687b ldr r3, [r7, #4] 8001e16: 2b00 cmp r3, #0 8001e18: d101 bne.n 8001e1e { return HAL_ERROR; 8001e1a: 2301 movs r3, #1 8001e1c: e108 b.n 8002030 /* Check the parameters */ assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); #if defined (USB_OTG_FS) USBx = hpcd->Instance; 8001e1e: 687b ldr r3, [r7, #4] 8001e20: 681b ldr r3, [r3, #0] 8001e22: 60bb str r3, [r7, #8] #endif /* defined (USB_OTG_FS) */ if (hpcd->State == HAL_PCD_STATE_RESET) 8001e24: 687b ldr r3, [r7, #4] 8001e26: f893 3495 ldrb.w r3, [r3, #1173] @ 0x495 8001e2a: b2db uxtb r3, r3 8001e2c: 2b00 cmp r3, #0 8001e2e: d106 bne.n 8001e3e { /* Allocate lock resource and initialize it */ hpcd->Lock = HAL_UNLOCKED; 8001e30: 687b ldr r3, [r7, #4] 8001e32: 2200 movs r2, #0 8001e34: f883 2494 strb.w r2, [r3, #1172] @ 0x494 /* Init the low level hardware */ hpcd->MspInitCallback(hpcd); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_PCD_MspInit(hpcd); 8001e38: 6878 ldr r0, [r7, #4] 8001e3a: f006 ffed bl 8008e18 #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ } hpcd->State = HAL_PCD_STATE_BUSY; 8001e3e: 687b ldr r3, [r7, #4] 8001e40: 2203 movs r2, #3 8001e42: f883 2495 strb.w r2, [r3, #1173] @ 0x495 #if defined (USB_OTG_FS) /* Disable DMA mode for FS instance */ if (USBx == USB_OTG_FS) 8001e46: 68bb ldr r3, [r7, #8] 8001e48: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000 8001e4c: d102 bne.n 8001e54 { hpcd->Init.dma_enable = 0U; 8001e4e: 687b ldr r3, [r7, #4] 8001e50: 2200 movs r2, #0 8001e52: 719a strb r2, [r3, #6] } #endif /* defined (USB_OTG_FS) */ /* Disable the Interrupts */ __HAL_PCD_DISABLE(hpcd); 8001e54: 687b ldr r3, [r7, #4] 8001e56: 681b ldr r3, [r3, #0] 8001e58: 4618 mov r0, r3 8001e5a: f003 fece bl 8005bfa /*Init the Core (common init.) */ if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK) 8001e5e: 687b ldr r3, [r7, #4] 8001e60: 6818 ldr r0, [r3, #0] 8001e62: 687b ldr r3, [r7, #4] 8001e64: 7c1a ldrb r2, [r3, #16] 8001e66: f88d 2000 strb.w r2, [sp] 8001e6a: 3304 adds r3, #4 8001e6c: cb0e ldmia r3, {r1, r2, r3} 8001e6e: f003 fdad bl 80059cc 8001e72: 4603 mov r3, r0 8001e74: 2b00 cmp r3, #0 8001e76: d005 beq.n 8001e84 { hpcd->State = HAL_PCD_STATE_ERROR; 8001e78: 687b ldr r3, [r7, #4] 8001e7a: 2202 movs r2, #2 8001e7c: f883 2495 strb.w r2, [r3, #1173] @ 0x495 return HAL_ERROR; 8001e80: 2301 movs r3, #1 8001e82: e0d5 b.n 8002030 } /* Force Device Mode */ if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK) 8001e84: 687b ldr r3, [r7, #4] 8001e86: 681b ldr r3, [r3, #0] 8001e88: 2100 movs r1, #0 8001e8a: 4618 mov r0, r3 8001e8c: f003 fec6 bl 8005c1c 8001e90: 4603 mov r3, r0 8001e92: 2b00 cmp r3, #0 8001e94: d005 beq.n 8001ea2 { hpcd->State = HAL_PCD_STATE_ERROR; 8001e96: 687b ldr r3, [r7, #4] 8001e98: 2202 movs r2, #2 8001e9a: f883 2495 strb.w r2, [r3, #1173] @ 0x495 return HAL_ERROR; 8001e9e: 2301 movs r3, #1 8001ea0: e0c6 b.n 8002030 } /* Init endpoints structures */ for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8001ea2: 2300 movs r3, #0 8001ea4: 73fb strb r3, [r7, #15] 8001ea6: e04a b.n 8001f3e { /* Init ep structure */ hpcd->IN_ep[i].is_in = 1U; 8001ea8: 7bfa ldrb r2, [r7, #15] 8001eaa: 6879 ldr r1, [r7, #4] 8001eac: 4613 mov r3, r2 8001eae: 00db lsls r3, r3, #3 8001eb0: 4413 add r3, r2 8001eb2: 009b lsls r3, r3, #2 8001eb4: 440b add r3, r1 8001eb6: 3315 adds r3, #21 8001eb8: 2201 movs r2, #1 8001eba: 701a strb r2, [r3, #0] hpcd->IN_ep[i].num = i; 8001ebc: 7bfa ldrb r2, [r7, #15] 8001ebe: 6879 ldr r1, [r7, #4] 8001ec0: 4613 mov r3, r2 8001ec2: 00db lsls r3, r3, #3 8001ec4: 4413 add r3, r2 8001ec6: 009b lsls r3, r3, #2 8001ec8: 440b add r3, r1 8001eca: 3314 adds r3, #20 8001ecc: 7bfa ldrb r2, [r7, #15] 8001ece: 701a strb r2, [r3, #0] hpcd->IN_ep[i].tx_fifo_num = i; 8001ed0: 7bfa ldrb r2, [r7, #15] 8001ed2: 7bfb ldrb r3, [r7, #15] 8001ed4: b298 uxth r0, r3 8001ed6: 6879 ldr r1, [r7, #4] 8001ed8: 4613 mov r3, r2 8001eda: 00db lsls r3, r3, #3 8001edc: 4413 add r3, r2 8001ede: 009b lsls r3, r3, #2 8001ee0: 440b add r3, r1 8001ee2: 332e adds r3, #46 @ 0x2e 8001ee4: 4602 mov r2, r0 8001ee6: 801a strh r2, [r3, #0] /* Control until ep is activated */ hpcd->IN_ep[i].type = EP_TYPE_CTRL; 8001ee8: 7bfa ldrb r2, [r7, #15] 8001eea: 6879 ldr r1, [r7, #4] 8001eec: 4613 mov r3, r2 8001eee: 00db lsls r3, r3, #3 8001ef0: 4413 add r3, r2 8001ef2: 009b lsls r3, r3, #2 8001ef4: 440b add r3, r1 8001ef6: 3318 adds r3, #24 8001ef8: 2200 movs r2, #0 8001efa: 701a strb r2, [r3, #0] hpcd->IN_ep[i].maxpacket = 0U; 8001efc: 7bfa ldrb r2, [r7, #15] 8001efe: 6879 ldr r1, [r7, #4] 8001f00: 4613 mov r3, r2 8001f02: 00db lsls r3, r3, #3 8001f04: 4413 add r3, r2 8001f06: 009b lsls r3, r3, #2 8001f08: 440b add r3, r1 8001f0a: 331c adds r3, #28 8001f0c: 2200 movs r2, #0 8001f0e: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_buff = 0U; 8001f10: 7bfa ldrb r2, [r7, #15] 8001f12: 6879 ldr r1, [r7, #4] 8001f14: 4613 mov r3, r2 8001f16: 00db lsls r3, r3, #3 8001f18: 4413 add r3, r2 8001f1a: 009b lsls r3, r3, #2 8001f1c: 440b add r3, r1 8001f1e: 3320 adds r3, #32 8001f20: 2200 movs r2, #0 8001f22: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_len = 0U; 8001f24: 7bfa ldrb r2, [r7, #15] 8001f26: 6879 ldr r1, [r7, #4] 8001f28: 4613 mov r3, r2 8001f2a: 00db lsls r3, r3, #3 8001f2c: 4413 add r3, r2 8001f2e: 009b lsls r3, r3, #2 8001f30: 440b add r3, r1 8001f32: 3324 adds r3, #36 @ 0x24 8001f34: 2200 movs r2, #0 8001f36: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8001f38: 7bfb ldrb r3, [r7, #15] 8001f3a: 3301 adds r3, #1 8001f3c: 73fb strb r3, [r7, #15] 8001f3e: 687b ldr r3, [r7, #4] 8001f40: 791b ldrb r3, [r3, #4] 8001f42: 7bfa ldrb r2, [r7, #15] 8001f44: 429a cmp r2, r3 8001f46: d3af bcc.n 8001ea8 } for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8001f48: 2300 movs r3, #0 8001f4a: 73fb strb r3, [r7, #15] 8001f4c: e044 b.n 8001fd8 { hpcd->OUT_ep[i].is_in = 0U; 8001f4e: 7bfa ldrb r2, [r7, #15] 8001f50: 6879 ldr r1, [r7, #4] 8001f52: 4613 mov r3, r2 8001f54: 00db lsls r3, r3, #3 8001f56: 4413 add r3, r2 8001f58: 009b lsls r3, r3, #2 8001f5a: 440b add r3, r1 8001f5c: f203 2355 addw r3, r3, #597 @ 0x255 8001f60: 2200 movs r2, #0 8001f62: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].num = i; 8001f64: 7bfa ldrb r2, [r7, #15] 8001f66: 6879 ldr r1, [r7, #4] 8001f68: 4613 mov r3, r2 8001f6a: 00db lsls r3, r3, #3 8001f6c: 4413 add r3, r2 8001f6e: 009b lsls r3, r3, #2 8001f70: 440b add r3, r1 8001f72: f503 7315 add.w r3, r3, #596 @ 0x254 8001f76: 7bfa ldrb r2, [r7, #15] 8001f78: 701a strb r2, [r3, #0] /* Control until ep is activated */ hpcd->OUT_ep[i].type = EP_TYPE_CTRL; 8001f7a: 7bfa ldrb r2, [r7, #15] 8001f7c: 6879 ldr r1, [r7, #4] 8001f7e: 4613 mov r3, r2 8001f80: 00db lsls r3, r3, #3 8001f82: 4413 add r3, r2 8001f84: 009b lsls r3, r3, #2 8001f86: 440b add r3, r1 8001f88: f503 7316 add.w r3, r3, #600 @ 0x258 8001f8c: 2200 movs r2, #0 8001f8e: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].maxpacket = 0U; 8001f90: 7bfa ldrb r2, [r7, #15] 8001f92: 6879 ldr r1, [r7, #4] 8001f94: 4613 mov r3, r2 8001f96: 00db lsls r3, r3, #3 8001f98: 4413 add r3, r2 8001f9a: 009b lsls r3, r3, #2 8001f9c: 440b add r3, r1 8001f9e: f503 7317 add.w r3, r3, #604 @ 0x25c 8001fa2: 2200 movs r2, #0 8001fa4: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_buff = 0U; 8001fa6: 7bfa ldrb r2, [r7, #15] 8001fa8: 6879 ldr r1, [r7, #4] 8001faa: 4613 mov r3, r2 8001fac: 00db lsls r3, r3, #3 8001fae: 4413 add r3, r2 8001fb0: 009b lsls r3, r3, #2 8001fb2: 440b add r3, r1 8001fb4: f503 7318 add.w r3, r3, #608 @ 0x260 8001fb8: 2200 movs r2, #0 8001fba: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_len = 0U; 8001fbc: 7bfa ldrb r2, [r7, #15] 8001fbe: 6879 ldr r1, [r7, #4] 8001fc0: 4613 mov r3, r2 8001fc2: 00db lsls r3, r3, #3 8001fc4: 4413 add r3, r2 8001fc6: 009b lsls r3, r3, #2 8001fc8: 440b add r3, r1 8001fca: f503 7319 add.w r3, r3, #612 @ 0x264 8001fce: 2200 movs r2, #0 8001fd0: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8001fd2: 7bfb ldrb r3, [r7, #15] 8001fd4: 3301 adds r3, #1 8001fd6: 73fb strb r3, [r7, #15] 8001fd8: 687b ldr r3, [r7, #4] 8001fda: 791b ldrb r3, [r3, #4] 8001fdc: 7bfa ldrb r2, [r7, #15] 8001fde: 429a cmp r2, r3 8001fe0: d3b5 bcc.n 8001f4e } /* Init Device */ if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK) 8001fe2: 687b ldr r3, [r7, #4] 8001fe4: 6818 ldr r0, [r3, #0] 8001fe6: 687b ldr r3, [r7, #4] 8001fe8: 7c1a ldrb r2, [r3, #16] 8001fea: f88d 2000 strb.w r2, [sp] 8001fee: 3304 adds r3, #4 8001ff0: cb0e ldmia r3, {r1, r2, r3} 8001ff2: f003 fe5f bl 8005cb4 8001ff6: 4603 mov r3, r0 8001ff8: 2b00 cmp r3, #0 8001ffa: d005 beq.n 8002008 { hpcd->State = HAL_PCD_STATE_ERROR; 8001ffc: 687b ldr r3, [r7, #4] 8001ffe: 2202 movs r2, #2 8002000: f883 2495 strb.w r2, [r3, #1173] @ 0x495 return HAL_ERROR; 8002004: 2301 movs r3, #1 8002006: e013 b.n 8002030 } hpcd->USB_Address = 0U; 8002008: 687b ldr r3, [r7, #4] 800200a: 2200 movs r2, #0 800200c: 745a strb r2, [r3, #17] hpcd->State = HAL_PCD_STATE_READY; 800200e: 687b ldr r3, [r7, #4] 8002010: 2201 movs r2, #1 8002012: f883 2495 strb.w r2, [r3, #1173] @ 0x495 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \ || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \ || defined(STM32F423xx) /* Activate LPM */ if (hpcd->Init.lpm_enable == 1U) 8002016: 687b ldr r3, [r7, #4] 8002018: 7b1b ldrb r3, [r3, #12] 800201a: 2b01 cmp r3, #1 800201c: d102 bne.n 8002024 { (void)HAL_PCDEx_ActivateLPM(hpcd); 800201e: 6878 ldr r0, [r7, #4] 8002020: f001 f956 bl 80032d0 } #endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */ (void)USB_DevDisconnect(hpcd->Instance); 8002024: 687b ldr r3, [r7, #4] 8002026: 681b ldr r3, [r3, #0] 8002028: 4618 mov r0, r3 800202a: f004 fe9c bl 8006d66 return HAL_OK; 800202e: 2300 movs r3, #0 } 8002030: 4618 mov r0, r3 8002032: 3710 adds r7, #16 8002034: 46bd mov sp, r7 8002036: bd80 pop {r7, pc} 08002038 : * @brief Start the USB device * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) { 8002038: b580 push {r7, lr} 800203a: b084 sub sp, #16 800203c: af00 add r7, sp, #0 800203e: 6078 str r0, [r7, #4] USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 8002040: 687b ldr r3, [r7, #4] 8002042: 681b ldr r3, [r3, #0] 8002044: 60fb str r3, [r7, #12] __HAL_LOCK(hpcd); 8002046: 687b ldr r3, [r7, #4] 8002048: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 800204c: 2b01 cmp r3, #1 800204e: d101 bne.n 8002054 8002050: 2302 movs r3, #2 8002052: e022 b.n 800209a 8002054: 687b ldr r3, [r7, #4] 8002056: 2201 movs r2, #1 8002058: f883 2494 strb.w r2, [r3, #1172] @ 0x494 if (((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) != 0U) && 800205c: 68fb ldr r3, [r7, #12] 800205e: 68db ldr r3, [r3, #12] 8002060: f003 0340 and.w r3, r3, #64 @ 0x40 8002064: 2b00 cmp r3, #0 8002066: d009 beq.n 800207c (hpcd->Init.battery_charging_enable == 1U)) 8002068: 687b ldr r3, [r7, #4] 800206a: 7b5b ldrb r3, [r3, #13] if (((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) != 0U) && 800206c: 2b01 cmp r3, #1 800206e: d105 bne.n 800207c { /* Enable USB Transceiver */ USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN; 8002070: 68fb ldr r3, [r7, #12] 8002072: 6b9b ldr r3, [r3, #56] @ 0x38 8002074: f443 3280 orr.w r2, r3, #65536 @ 0x10000 8002078: 68fb ldr r3, [r7, #12] 800207a: 639a str r2, [r3, #56] @ 0x38 } __HAL_PCD_ENABLE(hpcd); 800207c: 687b ldr r3, [r7, #4] 800207e: 681b ldr r3, [r3, #0] 8002080: 4618 mov r0, r3 8002082: f003 fda9 bl 8005bd8 (void)USB_DevConnect(hpcd->Instance); 8002086: 687b ldr r3, [r7, #4] 8002088: 681b ldr r3, [r3, #0] 800208a: 4618 mov r0, r3 800208c: f004 fe4a bl 8006d24 __HAL_UNLOCK(hpcd); 8002090: 687b ldr r3, [r7, #4] 8002092: 2200 movs r2, #0 8002094: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return HAL_OK; 8002098: 2300 movs r3, #0 } 800209a: 4618 mov r0, r3 800209c: 3710 adds r7, #16 800209e: 46bd mov sp, r7 80020a0: bd80 pop {r7, pc} 080020a2 : * @brief Handles PCD interrupt request. * @param hpcd PCD handle * @retval HAL status */ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) { 80020a2: b590 push {r4, r7, lr} 80020a4: b08d sub sp, #52 @ 0x34 80020a6: af00 add r7, sp, #0 80020a8: 6078 str r0, [r7, #4] USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 80020aa: 687b ldr r3, [r7, #4] 80020ac: 681b ldr r3, [r3, #0] 80020ae: 623b str r3, [r7, #32] uint32_t USBx_BASE = (uint32_t)USBx; 80020b0: 6a3b ldr r3, [r7, #32] 80020b2: 61fb str r3, [r7, #28] uint32_t epnum; uint32_t fifoemptymsk; uint32_t RegVal; /* ensure that we are in device mode */ if (USB_GetMode(hpcd->Instance) == USB_OTG_MODE_DEVICE) 80020b4: 687b ldr r3, [r7, #4] 80020b6: 681b ldr r3, [r3, #0] 80020b8: 4618 mov r0, r3 80020ba: f004 ff08 bl 8006ece 80020be: 4603 mov r3, r0 80020c0: 2b00 cmp r3, #0 80020c2: f040 84b9 bne.w 8002a38 { /* avoid spurious interrupt */ if (__HAL_PCD_IS_INVALID_INTERRUPT(hpcd)) 80020c6: 687b ldr r3, [r7, #4] 80020c8: 681b ldr r3, [r3, #0] 80020ca: 4618 mov r0, r3 80020cc: f004 fe6c bl 8006da8 80020d0: 4603 mov r3, r0 80020d2: 2b00 cmp r3, #0 80020d4: f000 84af beq.w 8002a36 { return; } /* store current frame number */ hpcd->FrameNumber = (USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF_Msk) >> USB_OTG_DSTS_FNSOF_Pos; 80020d8: 69fb ldr r3, [r7, #28] 80020da: f503 6300 add.w r3, r3, #2048 @ 0x800 80020de: 689b ldr r3, [r3, #8] 80020e0: 0a1b lsrs r3, r3, #8 80020e2: f3c3 020d ubfx r2, r3, #0, #14 80020e6: 687b ldr r3, [r7, #4] 80020e8: f8c3 24d4 str.w r2, [r3, #1236] @ 0x4d4 if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_MMIS)) 80020ec: 687b ldr r3, [r7, #4] 80020ee: 681b ldr r3, [r3, #0] 80020f0: 4618 mov r0, r3 80020f2: f004 fe59 bl 8006da8 80020f6: 4603 mov r3, r0 80020f8: f003 0302 and.w r3, r3, #2 80020fc: 2b02 cmp r3, #2 80020fe: d107 bne.n 8002110 { /* incorrect mode, acknowledge the interrupt */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS); 8002100: 687b ldr r3, [r7, #4] 8002102: 681b ldr r3, [r3, #0] 8002104: 695a ldr r2, [r3, #20] 8002106: 687b ldr r3, [r7, #4] 8002108: 681b ldr r3, [r3, #0] 800210a: f002 0202 and.w r2, r2, #2 800210e: 615a str r2, [r3, #20] } /* Handle RxQLevel Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) 8002110: 687b ldr r3, [r7, #4] 8002112: 681b ldr r3, [r3, #0] 8002114: 4618 mov r0, r3 8002116: f004 fe47 bl 8006da8 800211a: 4603 mov r3, r0 800211c: f003 0310 and.w r3, r3, #16 8002120: 2b10 cmp r3, #16 8002122: d161 bne.n 80021e8 { USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); 8002124: 687b ldr r3, [r7, #4] 8002126: 681b ldr r3, [r3, #0] 8002128: 699a ldr r2, [r3, #24] 800212a: 687b ldr r3, [r7, #4] 800212c: 681b ldr r3, [r3, #0] 800212e: f022 0210 bic.w r2, r2, #16 8002132: 619a str r2, [r3, #24] RegVal = USBx->GRXSTSP; 8002134: 6a3b ldr r3, [r7, #32] 8002136: 6a1b ldr r3, [r3, #32] 8002138: 61bb str r3, [r7, #24] ep = &hpcd->OUT_ep[RegVal & USB_OTG_GRXSTSP_EPNUM]; 800213a: 69bb ldr r3, [r7, #24] 800213c: f003 020f and.w r2, r3, #15 8002140: 4613 mov r3, r2 8002142: 00db lsls r3, r3, #3 8002144: 4413 add r3, r2 8002146: 009b lsls r3, r3, #2 8002148: f503 7314 add.w r3, r3, #592 @ 0x250 800214c: 687a ldr r2, [r7, #4] 800214e: 4413 add r3, r2 8002150: 3304 adds r3, #4 8002152: 617b str r3, [r7, #20] if (((RegVal & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT) 8002154: 69bb ldr r3, [r7, #24] 8002156: f403 13f0 and.w r3, r3, #1966080 @ 0x1e0000 800215a: f5b3 2f80 cmp.w r3, #262144 @ 0x40000 800215e: d124 bne.n 80021aa { if ((RegVal & USB_OTG_GRXSTSP_BCNT) != 0U) 8002160: 69ba ldr r2, [r7, #24] 8002162: f647 73f0 movw r3, #32752 @ 0x7ff0 8002166: 4013 ands r3, r2 8002168: 2b00 cmp r3, #0 800216a: d035 beq.n 80021d8 { (void)USB_ReadPacket(USBx, ep->xfer_buff, 800216c: 697b ldr r3, [r7, #20] 800216e: 68d9 ldr r1, [r3, #12] (uint16_t)((RegVal & USB_OTG_GRXSTSP_BCNT) >> 4)); 8002170: 69bb ldr r3, [r7, #24] 8002172: 091b lsrs r3, r3, #4 8002174: b29b uxth r3, r3 (void)USB_ReadPacket(USBx, ep->xfer_buff, 8002176: f3c3 030a ubfx r3, r3, #0, #11 800217a: b29b uxth r3, r3 800217c: 461a mov r2, r3 800217e: 6a38 ldr r0, [r7, #32] 8002180: f004 fc7e bl 8006a80 ep->xfer_buff += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4; 8002184: 697b ldr r3, [r7, #20] 8002186: 68da ldr r2, [r3, #12] 8002188: 69bb ldr r3, [r7, #24] 800218a: 091b lsrs r3, r3, #4 800218c: f3c3 030a ubfx r3, r3, #0, #11 8002190: 441a add r2, r3 8002192: 697b ldr r3, [r7, #20] 8002194: 60da str r2, [r3, #12] ep->xfer_count += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4; 8002196: 697b ldr r3, [r7, #20] 8002198: 695a ldr r2, [r3, #20] 800219a: 69bb ldr r3, [r7, #24] 800219c: 091b lsrs r3, r3, #4 800219e: f3c3 030a ubfx r3, r3, #0, #11 80021a2: 441a add r2, r3 80021a4: 697b ldr r3, [r7, #20] 80021a6: 615a str r2, [r3, #20] 80021a8: e016 b.n 80021d8 } } else if (((RegVal & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT) 80021aa: 69bb ldr r3, [r7, #24] 80021ac: f403 13f0 and.w r3, r3, #1966080 @ 0x1e0000 80021b0: f5b3 2f40 cmp.w r3, #786432 @ 0xc0000 80021b4: d110 bne.n 80021d8 { (void)USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); 80021b6: 687b ldr r3, [r7, #4] 80021b8: f203 439c addw r3, r3, #1180 @ 0x49c 80021bc: 2208 movs r2, #8 80021be: 4619 mov r1, r3 80021c0: 6a38 ldr r0, [r7, #32] 80021c2: f004 fc5d bl 8006a80 ep->xfer_count += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4; 80021c6: 697b ldr r3, [r7, #20] 80021c8: 695a ldr r2, [r3, #20] 80021ca: 69bb ldr r3, [r7, #24] 80021cc: 091b lsrs r3, r3, #4 80021ce: f3c3 030a ubfx r3, r3, #0, #11 80021d2: 441a add r2, r3 80021d4: 697b ldr r3, [r7, #20] 80021d6: 615a str r2, [r3, #20] else { /* ... */ } USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); 80021d8: 687b ldr r3, [r7, #4] 80021da: 681b ldr r3, [r3, #0] 80021dc: 699a ldr r2, [r3, #24] 80021de: 687b ldr r3, [r7, #4] 80021e0: 681b ldr r3, [r3, #0] 80021e2: f042 0210 orr.w r2, r2, #16 80021e6: 619a str r2, [r3, #24] } if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OEPINT)) 80021e8: 687b ldr r3, [r7, #4] 80021ea: 681b ldr r3, [r3, #0] 80021ec: 4618 mov r0, r3 80021ee: f004 fddb bl 8006da8 80021f2: 4603 mov r3, r0 80021f4: f403 2300 and.w r3, r3, #524288 @ 0x80000 80021f8: f5b3 2f00 cmp.w r3, #524288 @ 0x80000 80021fc: f040 80a7 bne.w 800234e { epnum = 0U; 8002200: 2300 movs r3, #0 8002202: 627b str r3, [r7, #36] @ 0x24 /* Read in the device interrupt bits */ ep_intr = USB_ReadDevAllOutEpInterrupt(hpcd->Instance); 8002204: 687b ldr r3, [r7, #4] 8002206: 681b ldr r3, [r3, #0] 8002208: 4618 mov r0, r3 800220a: f004 fde0 bl 8006dce 800220e: 62b8 str r0, [r7, #40] @ 0x28 while (ep_intr != 0U) 8002210: e099 b.n 8002346 { if ((ep_intr & 0x1U) != 0U) 8002212: 6abb ldr r3, [r7, #40] @ 0x28 8002214: f003 0301 and.w r3, r3, #1 8002218: 2b00 cmp r3, #0 800221a: f000 808e beq.w 800233a { epint = USB_ReadDevOutEPInterrupt(hpcd->Instance, (uint8_t)epnum); 800221e: 687b ldr r3, [r7, #4] 8002220: 681b ldr r3, [r3, #0] 8002222: 6a7a ldr r2, [r7, #36] @ 0x24 8002224: b2d2 uxtb r2, r2 8002226: 4611 mov r1, r2 8002228: 4618 mov r0, r3 800222a: f004 fe04 bl 8006e36 800222e: 6138 str r0, [r7, #16] if ((epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) 8002230: 693b ldr r3, [r7, #16] 8002232: f003 0301 and.w r3, r3, #1 8002236: 2b00 cmp r3, #0 8002238: d00c beq.n 8002254 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_XFRC); 800223a: 6a7b ldr r3, [r7, #36] @ 0x24 800223c: 015a lsls r2, r3, #5 800223e: 69fb ldr r3, [r7, #28] 8002240: 4413 add r3, r2 8002242: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002246: 461a mov r2, r3 8002248: 2301 movs r3, #1 800224a: 6093 str r3, [r2, #8] (void)PCD_EP_OutXfrComplete_int(hpcd, epnum); 800224c: 6a79 ldr r1, [r7, #36] @ 0x24 800224e: 6878 ldr r0, [r7, #4] 8002250: f000 feb8 bl 8002fc4 } if ((epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) 8002254: 693b ldr r3, [r7, #16] 8002256: f003 0308 and.w r3, r3, #8 800225a: 2b00 cmp r3, #0 800225c: d00c beq.n 8002278 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP); 800225e: 6a7b ldr r3, [r7, #36] @ 0x24 8002260: 015a lsls r2, r3, #5 8002262: 69fb ldr r3, [r7, #28] 8002264: 4413 add r3, r2 8002266: f503 6330 add.w r3, r3, #2816 @ 0xb00 800226a: 461a mov r2, r3 800226c: 2308 movs r3, #8 800226e: 6093 str r3, [r2, #8] /* Class B setup phase done for previous decoded setup */ (void)PCD_EP_OutSetupPacket_int(hpcd, epnum); 8002270: 6a79 ldr r1, [r7, #36] @ 0x24 8002272: 6878 ldr r0, [r7, #4] 8002274: f000 ff8e bl 8003194 } if ((epint & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS) 8002278: 693b ldr r3, [r7, #16] 800227a: f003 0310 and.w r3, r3, #16 800227e: 2b00 cmp r3, #0 8002280: d008 beq.n 8002294 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPDIS); 8002282: 6a7b ldr r3, [r7, #36] @ 0x24 8002284: 015a lsls r2, r3, #5 8002286: 69fb ldr r3, [r7, #28] 8002288: 4413 add r3, r2 800228a: f503 6330 add.w r3, r3, #2816 @ 0xb00 800228e: 461a mov r2, r3 8002290: 2310 movs r3, #16 8002292: 6093 str r3, [r2, #8] } /* Clear OUT Endpoint disable interrupt */ if ((epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD) 8002294: 693b ldr r3, [r7, #16] 8002296: f003 0302 and.w r3, r3, #2 800229a: 2b00 cmp r3, #0 800229c: d030 beq.n 8002300 { if ((USBx->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF) == USB_OTG_GINTSTS_BOUTNAKEFF) 800229e: 6a3b ldr r3, [r7, #32] 80022a0: 695b ldr r3, [r3, #20] 80022a2: f003 0380 and.w r3, r3, #128 @ 0x80 80022a6: 2b80 cmp r3, #128 @ 0x80 80022a8: d109 bne.n 80022be { USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK; 80022aa: 69fb ldr r3, [r7, #28] 80022ac: f503 6300 add.w r3, r3, #2048 @ 0x800 80022b0: 685b ldr r3, [r3, #4] 80022b2: 69fa ldr r2, [r7, #28] 80022b4: f502 6200 add.w r2, r2, #2048 @ 0x800 80022b8: f443 6380 orr.w r3, r3, #1024 @ 0x400 80022bc: 6053 str r3, [r2, #4] } ep = &hpcd->OUT_ep[epnum]; 80022be: 6a7a ldr r2, [r7, #36] @ 0x24 80022c0: 4613 mov r3, r2 80022c2: 00db lsls r3, r3, #3 80022c4: 4413 add r3, r2 80022c6: 009b lsls r3, r3, #2 80022c8: f503 7314 add.w r3, r3, #592 @ 0x250 80022cc: 687a ldr r2, [r7, #4] 80022ce: 4413 add r3, r2 80022d0: 3304 adds r3, #4 80022d2: 617b str r3, [r7, #20] if (ep->is_iso_incomplete == 1U) 80022d4: 697b ldr r3, [r7, #20] 80022d6: 78db ldrb r3, [r3, #3] 80022d8: 2b01 cmp r3, #1 80022da: d108 bne.n 80022ee { ep->is_iso_incomplete = 0U; 80022dc: 697b ldr r3, [r7, #20] 80022de: 2200 movs r2, #0 80022e0: 70da strb r2, [r3, #3] #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum); 80022e2: 6a7b ldr r3, [r7, #36] @ 0x24 80022e4: b2db uxtb r3, r3 80022e6: 4619 mov r1, r3 80022e8: 6878 ldr r0, [r7, #4] 80022ea: f006 feb1 bl 8009050 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD); 80022ee: 6a7b ldr r3, [r7, #36] @ 0x24 80022f0: 015a lsls r2, r3, #5 80022f2: 69fb ldr r3, [r7, #28] 80022f4: 4413 add r3, r2 80022f6: f503 6330 add.w r3, r3, #2816 @ 0xb00 80022fa: 461a mov r2, r3 80022fc: 2302 movs r3, #2 80022fe: 6093 str r3, [r2, #8] } /* Clear Status Phase Received interrupt */ if ((epint & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR) 8002300: 693b ldr r3, [r7, #16] 8002302: f003 0320 and.w r3, r3, #32 8002306: 2b00 cmp r3, #0 8002308: d008 beq.n 800231c { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR); 800230a: 6a7b ldr r3, [r7, #36] @ 0x24 800230c: 015a lsls r2, r3, #5 800230e: 69fb ldr r3, [r7, #28] 8002310: 4413 add r3, r2 8002312: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002316: 461a mov r2, r3 8002318: 2320 movs r3, #32 800231a: 6093 str r3, [r2, #8] } /* Clear OUT NAK interrupt */ if ((epint & USB_OTG_DOEPINT_NAK) == USB_OTG_DOEPINT_NAK) 800231c: 693b ldr r3, [r7, #16] 800231e: f403 5300 and.w r3, r3, #8192 @ 0x2000 8002322: 2b00 cmp r3, #0 8002324: d009 beq.n 800233a { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_NAK); 8002326: 6a7b ldr r3, [r7, #36] @ 0x24 8002328: 015a lsls r2, r3, #5 800232a: 69fb ldr r3, [r7, #28] 800232c: 4413 add r3, r2 800232e: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002332: 461a mov r2, r3 8002334: f44f 5300 mov.w r3, #8192 @ 0x2000 8002338: 6093 str r3, [r2, #8] } } epnum++; 800233a: 6a7b ldr r3, [r7, #36] @ 0x24 800233c: 3301 adds r3, #1 800233e: 627b str r3, [r7, #36] @ 0x24 ep_intr >>= 1U; 8002340: 6abb ldr r3, [r7, #40] @ 0x28 8002342: 085b lsrs r3, r3, #1 8002344: 62bb str r3, [r7, #40] @ 0x28 while (ep_intr != 0U) 8002346: 6abb ldr r3, [r7, #40] @ 0x28 8002348: 2b00 cmp r3, #0 800234a: f47f af62 bne.w 8002212 } } if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IEPINT)) 800234e: 687b ldr r3, [r7, #4] 8002350: 681b ldr r3, [r3, #0] 8002352: 4618 mov r0, r3 8002354: f004 fd28 bl 8006da8 8002358: 4603 mov r3, r0 800235a: f403 2380 and.w r3, r3, #262144 @ 0x40000 800235e: f5b3 2f80 cmp.w r3, #262144 @ 0x40000 8002362: f040 80db bne.w 800251c { /* Read in the device interrupt bits */ ep_intr = USB_ReadDevAllInEpInterrupt(hpcd->Instance); 8002366: 687b ldr r3, [r7, #4] 8002368: 681b ldr r3, [r3, #0] 800236a: 4618 mov r0, r3 800236c: f004 fd49 bl 8006e02 8002370: 62b8 str r0, [r7, #40] @ 0x28 epnum = 0U; 8002372: 2300 movs r3, #0 8002374: 627b str r3, [r7, #36] @ 0x24 while (ep_intr != 0U) 8002376: e0cd b.n 8002514 { if ((ep_intr & 0x1U) != 0U) /* In ITR */ 8002378: 6abb ldr r3, [r7, #40] @ 0x28 800237a: f003 0301 and.w r3, r3, #1 800237e: 2b00 cmp r3, #0 8002380: f000 80c2 beq.w 8002508 { epint = USB_ReadDevInEPInterrupt(hpcd->Instance, (uint8_t)epnum); 8002384: 687b ldr r3, [r7, #4] 8002386: 681b ldr r3, [r3, #0] 8002388: 6a7a ldr r2, [r7, #36] @ 0x24 800238a: b2d2 uxtb r2, r2 800238c: 4611 mov r1, r2 800238e: 4618 mov r0, r3 8002390: f004 fd6f bl 8006e72 8002394: 6138 str r0, [r7, #16] if ((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) 8002396: 693b ldr r3, [r7, #16] 8002398: f003 0301 and.w r3, r3, #1 800239c: 2b00 cmp r3, #0 800239e: d057 beq.n 8002450 { fifoemptymsk = (uint32_t)(0x1UL << (epnum & EP_ADDR_MSK)); 80023a0: 6a7b ldr r3, [r7, #36] @ 0x24 80023a2: f003 030f and.w r3, r3, #15 80023a6: 2201 movs r2, #1 80023a8: fa02 f303 lsl.w r3, r2, r3 80023ac: 60fb str r3, [r7, #12] USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk; 80023ae: 69fb ldr r3, [r7, #28] 80023b0: f503 6300 add.w r3, r3, #2048 @ 0x800 80023b4: 6b5a ldr r2, [r3, #52] @ 0x34 80023b6: 68fb ldr r3, [r7, #12] 80023b8: 43db mvns r3, r3 80023ba: 69f9 ldr r1, [r7, #28] 80023bc: f501 6100 add.w r1, r1, #2048 @ 0x800 80023c0: 4013 ands r3, r2 80023c2: 634b str r3, [r1, #52] @ 0x34 CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC); 80023c4: 6a7b ldr r3, [r7, #36] @ 0x24 80023c6: 015a lsls r2, r3, #5 80023c8: 69fb ldr r3, [r7, #28] 80023ca: 4413 add r3, r2 80023cc: f503 6310 add.w r3, r3, #2304 @ 0x900 80023d0: 461a mov r2, r3 80023d2: 2301 movs r3, #1 80023d4: 6093 str r3, [r2, #8] if (hpcd->Init.dma_enable == 1U) 80023d6: 687b ldr r3, [r7, #4] 80023d8: 799b ldrb r3, [r3, #6] 80023da: 2b01 cmp r3, #1 80023dc: d132 bne.n 8002444 { hpcd->IN_ep[epnum].xfer_buff += hpcd->IN_ep[epnum].maxpacket; 80023de: 6879 ldr r1, [r7, #4] 80023e0: 6a7a ldr r2, [r7, #36] @ 0x24 80023e2: 4613 mov r3, r2 80023e4: 00db lsls r3, r3, #3 80023e6: 4413 add r3, r2 80023e8: 009b lsls r3, r3, #2 80023ea: 440b add r3, r1 80023ec: 3320 adds r3, #32 80023ee: 6819 ldr r1, [r3, #0] 80023f0: 6878 ldr r0, [r7, #4] 80023f2: 6a7a ldr r2, [r7, #36] @ 0x24 80023f4: 4613 mov r3, r2 80023f6: 00db lsls r3, r3, #3 80023f8: 4413 add r3, r2 80023fa: 009b lsls r3, r3, #2 80023fc: 4403 add r3, r0 80023fe: 331c adds r3, #28 8002400: 681b ldr r3, [r3, #0] 8002402: 4419 add r1, r3 8002404: 6878 ldr r0, [r7, #4] 8002406: 6a7a ldr r2, [r7, #36] @ 0x24 8002408: 4613 mov r3, r2 800240a: 00db lsls r3, r3, #3 800240c: 4413 add r3, r2 800240e: 009b lsls r3, r3, #2 8002410: 4403 add r3, r0 8002412: 3320 adds r3, #32 8002414: 6019 str r1, [r3, #0] /* this is ZLP, so prepare EP0 for next setup */ if ((epnum == 0U) && (hpcd->IN_ep[epnum].xfer_len == 0U)) 8002416: 6a7b ldr r3, [r7, #36] @ 0x24 8002418: 2b00 cmp r3, #0 800241a: d113 bne.n 8002444 800241c: 6879 ldr r1, [r7, #4] 800241e: 6a7a ldr r2, [r7, #36] @ 0x24 8002420: 4613 mov r3, r2 8002422: 00db lsls r3, r3, #3 8002424: 4413 add r3, r2 8002426: 009b lsls r3, r3, #2 8002428: 440b add r3, r1 800242a: 3324 adds r3, #36 @ 0x24 800242c: 681b ldr r3, [r3, #0] 800242e: 2b00 cmp r3, #0 8002430: d108 bne.n 8002444 { /* prepare to rx more setup packets */ (void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup); 8002432: 687b ldr r3, [r7, #4] 8002434: 6818 ldr r0, [r3, #0] 8002436: 687b ldr r3, [r7, #4] 8002438: f203 439c addw r3, r3, #1180 @ 0x49c 800243c: 461a mov r2, r3 800243e: 2101 movs r1, #1 8002440: f004 fd76 bl 8006f30 } #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_DataInStageCallback(hpcd, (uint8_t)epnum); 8002444: 6a7b ldr r3, [r7, #36] @ 0x24 8002446: b2db uxtb r3, r3 8002448: 4619 mov r1, r3 800244a: 6878 ldr r0, [r7, #4] 800244c: f006 fd7b bl 8008f46 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } if ((epint & USB_OTG_DIEPINT_TOC) == USB_OTG_DIEPINT_TOC) 8002450: 693b ldr r3, [r7, #16] 8002452: f003 0308 and.w r3, r3, #8 8002456: 2b00 cmp r3, #0 8002458: d008 beq.n 800246c { CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_TOC); 800245a: 6a7b ldr r3, [r7, #36] @ 0x24 800245c: 015a lsls r2, r3, #5 800245e: 69fb ldr r3, [r7, #28] 8002460: 4413 add r3, r2 8002462: f503 6310 add.w r3, r3, #2304 @ 0x900 8002466: 461a mov r2, r3 8002468: 2308 movs r3, #8 800246a: 6093 str r3, [r2, #8] } if ((epint & USB_OTG_DIEPINT_ITTXFE) == USB_OTG_DIEPINT_ITTXFE) 800246c: 693b ldr r3, [r7, #16] 800246e: f003 0310 and.w r3, r3, #16 8002472: 2b00 cmp r3, #0 8002474: d008 beq.n 8002488 { CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_ITTXFE); 8002476: 6a7b ldr r3, [r7, #36] @ 0x24 8002478: 015a lsls r2, r3, #5 800247a: 69fb ldr r3, [r7, #28] 800247c: 4413 add r3, r2 800247e: f503 6310 add.w r3, r3, #2304 @ 0x900 8002482: 461a mov r2, r3 8002484: 2310 movs r3, #16 8002486: 6093 str r3, [r2, #8] } if ((epint & USB_OTG_DIEPINT_INEPNE) == USB_OTG_DIEPINT_INEPNE) 8002488: 693b ldr r3, [r7, #16] 800248a: f003 0340 and.w r3, r3, #64 @ 0x40 800248e: 2b00 cmp r3, #0 8002490: d008 beq.n 80024a4 { CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_INEPNE); 8002492: 6a7b ldr r3, [r7, #36] @ 0x24 8002494: 015a lsls r2, r3, #5 8002496: 69fb ldr r3, [r7, #28] 8002498: 4413 add r3, r2 800249a: f503 6310 add.w r3, r3, #2304 @ 0x900 800249e: 461a mov r2, r3 80024a0: 2340 movs r3, #64 @ 0x40 80024a2: 6093 str r3, [r2, #8] } if ((epint & USB_OTG_DIEPINT_EPDISD) == USB_OTG_DIEPINT_EPDISD) 80024a4: 693b ldr r3, [r7, #16] 80024a6: f003 0302 and.w r3, r3, #2 80024aa: 2b00 cmp r3, #0 80024ac: d023 beq.n 80024f6 { (void)USB_FlushTxFifo(USBx, epnum); 80024ae: 6a79 ldr r1, [r7, #36] @ 0x24 80024b0: 6a38 ldr r0, [r7, #32] 80024b2: f003 fd5d bl 8005f70 ep = &hpcd->IN_ep[epnum]; 80024b6: 6a7a ldr r2, [r7, #36] @ 0x24 80024b8: 4613 mov r3, r2 80024ba: 00db lsls r3, r3, #3 80024bc: 4413 add r3, r2 80024be: 009b lsls r3, r3, #2 80024c0: 3310 adds r3, #16 80024c2: 687a ldr r2, [r7, #4] 80024c4: 4413 add r3, r2 80024c6: 3304 adds r3, #4 80024c8: 617b str r3, [r7, #20] if (ep->is_iso_incomplete == 1U) 80024ca: 697b ldr r3, [r7, #20] 80024cc: 78db ldrb r3, [r3, #3] 80024ce: 2b01 cmp r3, #1 80024d0: d108 bne.n 80024e4 { ep->is_iso_incomplete = 0U; 80024d2: 697b ldr r3, [r7, #20] 80024d4: 2200 movs r2, #0 80024d6: 70da strb r2, [r3, #3] #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ISOINIncompleteCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_ISOINIncompleteCallback(hpcd, (uint8_t)epnum); 80024d8: 6a7b ldr r3, [r7, #36] @ 0x24 80024da: b2db uxtb r3, r3 80024dc: 4619 mov r1, r3 80024de: 6878 ldr r0, [r7, #4] 80024e0: f006 fdc8 bl 8009074 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_EPDISD); 80024e4: 6a7b ldr r3, [r7, #36] @ 0x24 80024e6: 015a lsls r2, r3, #5 80024e8: 69fb ldr r3, [r7, #28] 80024ea: 4413 add r3, r2 80024ec: f503 6310 add.w r3, r3, #2304 @ 0x900 80024f0: 461a mov r2, r3 80024f2: 2302 movs r3, #2 80024f4: 6093 str r3, [r2, #8] } if ((epint & USB_OTG_DIEPINT_TXFE) == USB_OTG_DIEPINT_TXFE) 80024f6: 693b ldr r3, [r7, #16] 80024f8: f003 0380 and.w r3, r3, #128 @ 0x80 80024fc: 2b00 cmp r3, #0 80024fe: d003 beq.n 8002508 { (void)PCD_WriteEmptyTxFifo(hpcd, epnum); 8002500: 6a79 ldr r1, [r7, #36] @ 0x24 8002502: 6878 ldr r0, [r7, #4] 8002504: f000 fcd2 bl 8002eac } } epnum++; 8002508: 6a7b ldr r3, [r7, #36] @ 0x24 800250a: 3301 adds r3, #1 800250c: 627b str r3, [r7, #36] @ 0x24 ep_intr >>= 1U; 800250e: 6abb ldr r3, [r7, #40] @ 0x28 8002510: 085b lsrs r3, r3, #1 8002512: 62bb str r3, [r7, #40] @ 0x28 while (ep_intr != 0U) 8002514: 6abb ldr r3, [r7, #40] @ 0x28 8002516: 2b00 cmp r3, #0 8002518: f47f af2e bne.w 8002378 } } /* Handle Resume Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT)) 800251c: 687b ldr r3, [r7, #4] 800251e: 681b ldr r3, [r3, #0] 8002520: 4618 mov r0, r3 8002522: f004 fc41 bl 8006da8 8002526: 4603 mov r3, r0 8002528: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 800252c: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8002530: d122 bne.n 8002578 { /* Clear the Remote Wake-up Signaling */ USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG; 8002532: 69fb ldr r3, [r7, #28] 8002534: f503 6300 add.w r3, r3, #2048 @ 0x800 8002538: 685b ldr r3, [r3, #4] 800253a: 69fa ldr r2, [r7, #28] 800253c: f502 6200 add.w r2, r2, #2048 @ 0x800 8002540: f023 0301 bic.w r3, r3, #1 8002544: 6053 str r3, [r2, #4] if (hpcd->LPM_State == LPM_L1) 8002546: 687b ldr r3, [r7, #4] 8002548: f893 34cc ldrb.w r3, [r3, #1228] @ 0x4cc 800254c: 2b01 cmp r3, #1 800254e: d108 bne.n 8002562 { hpcd->LPM_State = LPM_L0; 8002550: 687b ldr r3, [r7, #4] 8002552: 2200 movs r2, #0 8002554: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->LPMCallback(hpcd, PCD_LPM_L0_ACTIVE); #else HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE); 8002558: 2100 movs r1, #0 800255a: 6878 ldr r0, [r7, #4] 800255c: f006 ff30 bl 80093c0 8002560: e002 b.n 8002568 else { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResumeCallback(hpcd); #else HAL_PCD_ResumeCallback(hpcd); 8002562: 6878 ldr r0, [r7, #4] 8002564: f006 fd66 bl 8009034 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT); 8002568: 687b ldr r3, [r7, #4] 800256a: 681b ldr r3, [r3, #0] 800256c: 695a ldr r2, [r3, #20] 800256e: 687b ldr r3, [r7, #4] 8002570: 681b ldr r3, [r3, #0] 8002572: f002 4200 and.w r2, r2, #2147483648 @ 0x80000000 8002576: 615a str r2, [r3, #20] } /* Handle Suspend Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP)) 8002578: 687b ldr r3, [r7, #4] 800257a: 681b ldr r3, [r3, #0] 800257c: 4618 mov r0, r3 800257e: f004 fc13 bl 8006da8 8002582: 4603 mov r3, r0 8002584: f403 6300 and.w r3, r3, #2048 @ 0x800 8002588: f5b3 6f00 cmp.w r3, #2048 @ 0x800 800258c: d112 bne.n 80025b4 { if ((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS) 800258e: 69fb ldr r3, [r7, #28] 8002590: f503 6300 add.w r3, r3, #2048 @ 0x800 8002594: 689b ldr r3, [r3, #8] 8002596: f003 0301 and.w r3, r3, #1 800259a: 2b01 cmp r3, #1 800259c: d102 bne.n 80025a4 { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SuspendCallback(hpcd); #else HAL_PCD_SuspendCallback(hpcd); 800259e: 6878 ldr r0, [r7, #4] 80025a0: f006 fd22 bl 8008fe8 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP); 80025a4: 687b ldr r3, [r7, #4] 80025a6: 681b ldr r3, [r3, #0] 80025a8: 695a ldr r2, [r3, #20] 80025aa: 687b ldr r3, [r7, #4] 80025ac: 681b ldr r3, [r3, #0] 80025ae: f402 6200 and.w r2, r2, #2048 @ 0x800 80025b2: 615a str r2, [r3, #20] } #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \ || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \ || defined(STM32F423xx) /* Handle LPM Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT)) 80025b4: 687b ldr r3, [r7, #4] 80025b6: 681b ldr r3, [r3, #0] 80025b8: 4618 mov r0, r3 80025ba: f004 fbf5 bl 8006da8 80025be: 4603 mov r3, r0 80025c0: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 80025c4: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 80025c8: d121 bne.n 800260e { __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT); 80025ca: 687b ldr r3, [r7, #4] 80025cc: 681b ldr r3, [r3, #0] 80025ce: 695a ldr r2, [r3, #20] 80025d0: 687b ldr r3, [r7, #4] 80025d2: 681b ldr r3, [r3, #0] 80025d4: f002 6200 and.w r2, r2, #134217728 @ 0x8000000 80025d8: 615a str r2, [r3, #20] if (hpcd->LPM_State == LPM_L0) 80025da: 687b ldr r3, [r7, #4] 80025dc: f893 34cc ldrb.w r3, [r3, #1228] @ 0x4cc 80025e0: 2b00 cmp r3, #0 80025e2: d111 bne.n 8002608 { hpcd->LPM_State = LPM_L1; 80025e4: 687b ldr r3, [r7, #4] 80025e6: 2201 movs r2, #1 80025e8: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc hpcd->BESL = (hpcd->Instance->GLPMCFG & USB_OTG_GLPMCFG_BESL) >> 2U; 80025ec: 687b ldr r3, [r7, #4] 80025ee: 681b ldr r3, [r3, #0] 80025f0: 6d5b ldr r3, [r3, #84] @ 0x54 80025f2: 089b lsrs r3, r3, #2 80025f4: f003 020f and.w r2, r3, #15 80025f8: 687b ldr r3, [r7, #4] 80025fa: f8c3 24d0 str.w r2, [r3, #1232] @ 0x4d0 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->LPMCallback(hpcd, PCD_LPM_L1_ACTIVE); #else HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE); 80025fe: 2101 movs r1, #1 8002600: 6878 ldr r0, [r7, #4] 8002602: f006 fedd bl 80093c0 8002606: e002 b.n 800260e else { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SuspendCallback(hpcd); #else HAL_PCD_SuspendCallback(hpcd); 8002608: 6878 ldr r0, [r7, #4] 800260a: f006 fced bl 8008fe8 } #endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */ /* Handle Reset Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBRST)) 800260e: 687b ldr r3, [r7, #4] 8002610: 681b ldr r3, [r3, #0] 8002612: 4618 mov r0, r3 8002614: f004 fbc8 bl 8006da8 8002618: 4603 mov r3, r0 800261a: f403 5380 and.w r3, r3, #4096 @ 0x1000 800261e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8002622: f040 80b7 bne.w 8002794 { USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG; 8002626: 69fb ldr r3, [r7, #28] 8002628: f503 6300 add.w r3, r3, #2048 @ 0x800 800262c: 685b ldr r3, [r3, #4] 800262e: 69fa ldr r2, [r7, #28] 8002630: f502 6200 add.w r2, r2, #2048 @ 0x800 8002634: f023 0301 bic.w r3, r3, #1 8002638: 6053 str r3, [r2, #4] (void)USB_FlushTxFifo(hpcd->Instance, 0x10U); 800263a: 687b ldr r3, [r7, #4] 800263c: 681b ldr r3, [r3, #0] 800263e: 2110 movs r1, #16 8002640: 4618 mov r0, r3 8002642: f003 fc95 bl 8005f70 for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8002646: 2300 movs r3, #0 8002648: 62fb str r3, [r7, #44] @ 0x2c 800264a: e046 b.n 80026da { USBx_INEP(i)->DIEPINT = 0xFB7FU; 800264c: 6afb ldr r3, [r7, #44] @ 0x2c 800264e: 015a lsls r2, r3, #5 8002650: 69fb ldr r3, [r7, #28] 8002652: 4413 add r3, r2 8002654: f503 6310 add.w r3, r3, #2304 @ 0x900 8002658: 461a mov r2, r3 800265a: f64f 337f movw r3, #64383 @ 0xfb7f 800265e: 6093 str r3, [r2, #8] USBx_INEP(i)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL; 8002660: 6afb ldr r3, [r7, #44] @ 0x2c 8002662: 015a lsls r2, r3, #5 8002664: 69fb ldr r3, [r7, #28] 8002666: 4413 add r3, r2 8002668: f503 6310 add.w r3, r3, #2304 @ 0x900 800266c: 681b ldr r3, [r3, #0] 800266e: 6afa ldr r2, [r7, #44] @ 0x2c 8002670: 0151 lsls r1, r2, #5 8002672: 69fa ldr r2, [r7, #28] 8002674: 440a add r2, r1 8002676: f502 6210 add.w r2, r2, #2304 @ 0x900 800267a: f423 1300 bic.w r3, r3, #2097152 @ 0x200000 800267e: 6013 str r3, [r2, #0] USBx_OUTEP(i)->DOEPINT = 0xFB7FU; 8002680: 6afb ldr r3, [r7, #44] @ 0x2c 8002682: 015a lsls r2, r3, #5 8002684: 69fb ldr r3, [r7, #28] 8002686: 4413 add r3, r2 8002688: f503 6330 add.w r3, r3, #2816 @ 0xb00 800268c: 461a mov r2, r3 800268e: f64f 337f movw r3, #64383 @ 0xfb7f 8002692: 6093 str r3, [r2, #8] USBx_OUTEP(i)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL; 8002694: 6afb ldr r3, [r7, #44] @ 0x2c 8002696: 015a lsls r2, r3, #5 8002698: 69fb ldr r3, [r7, #28] 800269a: 4413 add r3, r2 800269c: f503 6330 add.w r3, r3, #2816 @ 0xb00 80026a0: 681b ldr r3, [r3, #0] 80026a2: 6afa ldr r2, [r7, #44] @ 0x2c 80026a4: 0151 lsls r1, r2, #5 80026a6: 69fa ldr r2, [r7, #28] 80026a8: 440a add r2, r1 80026aa: f502 6230 add.w r2, r2, #2816 @ 0xb00 80026ae: f423 1300 bic.w r3, r3, #2097152 @ 0x200000 80026b2: 6013 str r3, [r2, #0] USBx_OUTEP(i)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; 80026b4: 6afb ldr r3, [r7, #44] @ 0x2c 80026b6: 015a lsls r2, r3, #5 80026b8: 69fb ldr r3, [r7, #28] 80026ba: 4413 add r3, r2 80026bc: f503 6330 add.w r3, r3, #2816 @ 0xb00 80026c0: 681b ldr r3, [r3, #0] 80026c2: 6afa ldr r2, [r7, #44] @ 0x2c 80026c4: 0151 lsls r1, r2, #5 80026c6: 69fa ldr r2, [r7, #28] 80026c8: 440a add r2, r1 80026ca: f502 6230 add.w r2, r2, #2816 @ 0xb00 80026ce: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 80026d2: 6013 str r3, [r2, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 80026d4: 6afb ldr r3, [r7, #44] @ 0x2c 80026d6: 3301 adds r3, #1 80026d8: 62fb str r3, [r7, #44] @ 0x2c 80026da: 687b ldr r3, [r7, #4] 80026dc: 791b ldrb r3, [r3, #4] 80026de: 461a mov r2, r3 80026e0: 6afb ldr r3, [r7, #44] @ 0x2c 80026e2: 4293 cmp r3, r2 80026e4: d3b2 bcc.n 800264c } USBx_DEVICE->DAINTMSK |= 0x10001U; 80026e6: 69fb ldr r3, [r7, #28] 80026e8: f503 6300 add.w r3, r3, #2048 @ 0x800 80026ec: 69db ldr r3, [r3, #28] 80026ee: 69fa ldr r2, [r7, #28] 80026f0: f502 6200 add.w r2, r2, #2048 @ 0x800 80026f4: f043 1301 orr.w r3, r3, #65537 @ 0x10001 80026f8: 61d3 str r3, [r2, #28] if (hpcd->Init.use_dedicated_ep1 != 0U) 80026fa: 687b ldr r3, [r7, #4] 80026fc: 7bdb ldrb r3, [r3, #15] 80026fe: 2b00 cmp r3, #0 8002700: d016 beq.n 8002730 { USBx_DEVICE->DOUTEP1MSK |= USB_OTG_DOEPMSK_STUPM | 8002702: 69fb ldr r3, [r7, #28] 8002704: f503 6300 add.w r3, r3, #2048 @ 0x800 8002708: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 800270c: 69fa ldr r2, [r7, #28] 800270e: f502 6200 add.w r2, r2, #2048 @ 0x800 8002712: f043 030b orr.w r3, r3, #11 8002716: f8c2 3084 str.w r3, [r2, #132] @ 0x84 USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM; USBx_DEVICE->DINEP1MSK |= USB_OTG_DIEPMSK_TOM | 800271a: 69fb ldr r3, [r7, #28] 800271c: f503 6300 add.w r3, r3, #2048 @ 0x800 8002720: 6c5b ldr r3, [r3, #68] @ 0x44 8002722: 69fa ldr r2, [r7, #28] 8002724: f502 6200 add.w r2, r2, #2048 @ 0x800 8002728: f043 030b orr.w r3, r3, #11 800272c: 6453 str r3, [r2, #68] @ 0x44 800272e: e015 b.n 800275c USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM; } else { USBx_DEVICE->DOEPMSK |= USB_OTG_DOEPMSK_STUPM | 8002730: 69fb ldr r3, [r7, #28] 8002732: f503 6300 add.w r3, r3, #2048 @ 0x800 8002736: 695b ldr r3, [r3, #20] 8002738: 69fa ldr r2, [r7, #28] 800273a: f502 6200 add.w r2, r2, #2048 @ 0x800 800273e: f443 5300 orr.w r3, r3, #8192 @ 0x2000 8002742: f043 032b orr.w r3, r3, #43 @ 0x2b 8002746: 6153 str r3, [r2, #20] USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM | USB_OTG_DOEPMSK_OTEPSPRM | USB_OTG_DOEPMSK_NAKM; USBx_DEVICE->DIEPMSK |= USB_OTG_DIEPMSK_TOM | 8002748: 69fb ldr r3, [r7, #28] 800274a: f503 6300 add.w r3, r3, #2048 @ 0x800 800274e: 691b ldr r3, [r3, #16] 8002750: 69fa ldr r2, [r7, #28] 8002752: f502 6200 add.w r2, r2, #2048 @ 0x800 8002756: f043 030b orr.w r3, r3, #11 800275a: 6113 str r3, [r2, #16] USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM; } /* Set Default Address to 0 */ USBx_DEVICE->DCFG &= ~USB_OTG_DCFG_DAD; 800275c: 69fb ldr r3, [r7, #28] 800275e: f503 6300 add.w r3, r3, #2048 @ 0x800 8002762: 681b ldr r3, [r3, #0] 8002764: 69fa ldr r2, [r7, #28] 8002766: f502 6200 add.w r2, r2, #2048 @ 0x800 800276a: f423 63fe bic.w r3, r3, #2032 @ 0x7f0 800276e: 6013 str r3, [r2, #0] /* setup EP0 to receive SETUP packets */ (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable, 8002770: 687b ldr r3, [r7, #4] 8002772: 6818 ldr r0, [r3, #0] 8002774: 687b ldr r3, [r7, #4] 8002776: 7999 ldrb r1, [r3, #6] (uint8_t *)hpcd->Setup); 8002778: 687b ldr r3, [r7, #4] 800277a: f203 439c addw r3, r3, #1180 @ 0x49c (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable, 800277e: 461a mov r2, r3 8002780: f004 fbd6 bl 8006f30 __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBRST); 8002784: 687b ldr r3, [r7, #4] 8002786: 681b ldr r3, [r3, #0] 8002788: 695a ldr r2, [r3, #20] 800278a: 687b ldr r3, [r7, #4] 800278c: 681b ldr r3, [r3, #0] 800278e: f402 5280 and.w r2, r2, #4096 @ 0x1000 8002792: 615a str r2, [r3, #20] } /* Handle Enumeration done Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE)) 8002794: 687b ldr r3, [r7, #4] 8002796: 681b ldr r3, [r3, #0] 8002798: 4618 mov r0, r3 800279a: f004 fb05 bl 8006da8 800279e: 4603 mov r3, r0 80027a0: f403 5300 and.w r3, r3, #8192 @ 0x2000 80027a4: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 80027a8: d123 bne.n 80027f2 { (void)USB_ActivateSetup(hpcd->Instance); 80027aa: 687b ldr r3, [r7, #4] 80027ac: 681b ldr r3, [r3, #0] 80027ae: 4618 mov r0, r3 80027b0: f004 fb9b bl 8006eea hpcd->Init.speed = USB_GetDevSpeed(hpcd->Instance); 80027b4: 687b ldr r3, [r7, #4] 80027b6: 681b ldr r3, [r3, #0] 80027b8: 4618 mov r0, r3 80027ba: f003 fc52 bl 8006062 80027be: 4603 mov r3, r0 80027c0: 461a mov r2, r3 80027c2: 687b ldr r3, [r7, #4] 80027c4: 71da strb r2, [r3, #7] /* Set USB Turnaround time */ (void)USB_SetTurnaroundTime(hpcd->Instance, 80027c6: 687b ldr r3, [r7, #4] 80027c8: 681c ldr r4, [r3, #0] 80027ca: f000 fe8b bl 80034e4 80027ce: 4601 mov r1, r0 HAL_RCC_GetHCLKFreq(), (uint8_t)hpcd->Init.speed); 80027d0: 687b ldr r3, [r7, #4] 80027d2: 79db ldrb r3, [r3, #7] (void)USB_SetTurnaroundTime(hpcd->Instance, 80027d4: 461a mov r2, r3 80027d6: 4620 mov r0, r4 80027d8: f003 f95c bl 8005a94 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResetCallback(hpcd); #else HAL_PCD_ResetCallback(hpcd); 80027dc: 6878 ldr r0, [r7, #4] 80027de: f006 fbda bl 8008f96 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE); 80027e2: 687b ldr r3, [r7, #4] 80027e4: 681b ldr r3, [r3, #0] 80027e6: 695a ldr r2, [r3, #20] 80027e8: 687b ldr r3, [r7, #4] 80027ea: 681b ldr r3, [r3, #0] 80027ec: f402 5200 and.w r2, r2, #8192 @ 0x2000 80027f0: 615a str r2, [r3, #20] } /* Handle SOF Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SOF)) 80027f2: 687b ldr r3, [r7, #4] 80027f4: 681b ldr r3, [r3, #0] 80027f6: 4618 mov r0, r3 80027f8: f004 fad6 bl 8006da8 80027fc: 4603 mov r3, r0 80027fe: f003 0308 and.w r3, r3, #8 8002802: 2b08 cmp r3, #8 8002804: d10a bne.n 800281c { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SOFCallback(hpcd); #else HAL_PCD_SOFCallback(hpcd); 8002806: 6878 ldr r0, [r7, #4] 8002808: f006 fbb7 bl 8008f7a #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SOF); 800280c: 687b ldr r3, [r7, #4] 800280e: 681b ldr r3, [r3, #0] 8002810: 695a ldr r2, [r3, #20] 8002812: 687b ldr r3, [r7, #4] 8002814: 681b ldr r3, [r3, #0] 8002816: f002 0208 and.w r2, r2, #8 800281a: 615a str r2, [r3, #20] } /* Handle Global OUT NAK effective Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_BOUTNAKEFF)) 800281c: 687b ldr r3, [r7, #4] 800281e: 681b ldr r3, [r3, #0] 8002820: 4618 mov r0, r3 8002822: f004 fac1 bl 8006da8 8002826: 4603 mov r3, r0 8002828: f003 0380 and.w r3, r3, #128 @ 0x80 800282c: 2b80 cmp r3, #128 @ 0x80 800282e: d123 bne.n 8002878 { USBx->GINTMSK &= ~USB_OTG_GINTMSK_GONAKEFFM; 8002830: 6a3b ldr r3, [r7, #32] 8002832: 699b ldr r3, [r3, #24] 8002834: f023 0280 bic.w r2, r3, #128 @ 0x80 8002838: 6a3b ldr r3, [r7, #32] 800283a: 619a str r2, [r3, #24] for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 800283c: 2301 movs r3, #1 800283e: 627b str r3, [r7, #36] @ 0x24 8002840: e014 b.n 800286c { if (hpcd->OUT_ep[epnum].is_iso_incomplete == 1U) 8002842: 6879 ldr r1, [r7, #4] 8002844: 6a7a ldr r2, [r7, #36] @ 0x24 8002846: 4613 mov r3, r2 8002848: 00db lsls r3, r3, #3 800284a: 4413 add r3, r2 800284c: 009b lsls r3, r3, #2 800284e: 440b add r3, r1 8002850: f203 2357 addw r3, r3, #599 @ 0x257 8002854: 781b ldrb r3, [r3, #0] 8002856: 2b01 cmp r3, #1 8002858: d105 bne.n 8002866 { /* Abort current transaction and disable the EP */ (void)HAL_PCD_EP_Abort(hpcd, (uint8_t)epnum); 800285a: 6a7b ldr r3, [r7, #36] @ 0x24 800285c: b2db uxtb r3, r3 800285e: 4619 mov r1, r3 8002860: 6878 ldr r0, [r7, #4] 8002862: f000 faf2 bl 8002e4a for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 8002866: 6a7b ldr r3, [r7, #36] @ 0x24 8002868: 3301 adds r3, #1 800286a: 627b str r3, [r7, #36] @ 0x24 800286c: 687b ldr r3, [r7, #4] 800286e: 791b ldrb r3, [r3, #4] 8002870: 461a mov r2, r3 8002872: 6a7b ldr r3, [r7, #36] @ 0x24 8002874: 4293 cmp r3, r2 8002876: d3e4 bcc.n 8002842 } } } /* Handle Incomplete ISO IN Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR)) 8002878: 687b ldr r3, [r7, #4] 800287a: 681b ldr r3, [r3, #0] 800287c: 4618 mov r0, r3 800287e: f004 fa93 bl 8006da8 8002882: 4603 mov r3, r0 8002884: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8002888: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 800288c: d13c bne.n 8002908 { for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 800288e: 2301 movs r3, #1 8002890: 627b str r3, [r7, #36] @ 0x24 8002892: e02b b.n 80028ec { RegVal = USBx_INEP(epnum)->DIEPCTL; 8002894: 6a7b ldr r3, [r7, #36] @ 0x24 8002896: 015a lsls r2, r3, #5 8002898: 69fb ldr r3, [r7, #28] 800289a: 4413 add r3, r2 800289c: f503 6310 add.w r3, r3, #2304 @ 0x900 80028a0: 681b ldr r3, [r3, #0] 80028a2: 61bb str r3, [r7, #24] if ((hpcd->IN_ep[epnum].type == EP_TYPE_ISOC) && 80028a4: 6879 ldr r1, [r7, #4] 80028a6: 6a7a ldr r2, [r7, #36] @ 0x24 80028a8: 4613 mov r3, r2 80028aa: 00db lsls r3, r3, #3 80028ac: 4413 add r3, r2 80028ae: 009b lsls r3, r3, #2 80028b0: 440b add r3, r1 80028b2: 3318 adds r3, #24 80028b4: 781b ldrb r3, [r3, #0] 80028b6: 2b01 cmp r3, #1 80028b8: d115 bne.n 80028e6 ((RegVal & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)) 80028ba: 69bb ldr r3, [r7, #24] if ((hpcd->IN_ep[epnum].type == EP_TYPE_ISOC) && 80028bc: 2b00 cmp r3, #0 80028be: da12 bge.n 80028e6 { hpcd->IN_ep[epnum].is_iso_incomplete = 1U; 80028c0: 6879 ldr r1, [r7, #4] 80028c2: 6a7a ldr r2, [r7, #36] @ 0x24 80028c4: 4613 mov r3, r2 80028c6: 00db lsls r3, r3, #3 80028c8: 4413 add r3, r2 80028ca: 009b lsls r3, r3, #2 80028cc: 440b add r3, r1 80028ce: 3317 adds r3, #23 80028d0: 2201 movs r2, #1 80028d2: 701a strb r2, [r3, #0] /* Abort current transaction and disable the EP */ (void)HAL_PCD_EP_Abort(hpcd, (uint8_t)(epnum | 0x80U)); 80028d4: 6a7b ldr r3, [r7, #36] @ 0x24 80028d6: b2db uxtb r3, r3 80028d8: f063 037f orn r3, r3, #127 @ 0x7f 80028dc: b2db uxtb r3, r3 80028de: 4619 mov r1, r3 80028e0: 6878 ldr r0, [r7, #4] 80028e2: f000 fab2 bl 8002e4a for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 80028e6: 6a7b ldr r3, [r7, #36] @ 0x24 80028e8: 3301 adds r3, #1 80028ea: 627b str r3, [r7, #36] @ 0x24 80028ec: 687b ldr r3, [r7, #4] 80028ee: 791b ldrb r3, [r3, #4] 80028f0: 461a mov r2, r3 80028f2: 6a7b ldr r3, [r7, #36] @ 0x24 80028f4: 4293 cmp r3, r2 80028f6: d3cd bcc.n 8002894 } } __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR); 80028f8: 687b ldr r3, [r7, #4] 80028fa: 681b ldr r3, [r3, #0] 80028fc: 695a ldr r2, [r3, #20] 80028fe: 687b ldr r3, [r7, #4] 8002900: 681b ldr r3, [r3, #0] 8002902: f402 1280 and.w r2, r2, #1048576 @ 0x100000 8002906: 615a str r2, [r3, #20] } /* Handle Incomplete ISO OUT Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT)) 8002908: 687b ldr r3, [r7, #4] 800290a: 681b ldr r3, [r3, #0] 800290c: 4618 mov r0, r3 800290e: f004 fa4b bl 8006da8 8002912: 4603 mov r3, r0 8002914: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8002918: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000 800291c: d156 bne.n 80029cc { for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 800291e: 2301 movs r3, #1 8002920: 627b str r3, [r7, #36] @ 0x24 8002922: e045 b.n 80029b0 { RegVal = USBx_OUTEP(epnum)->DOEPCTL; 8002924: 6a7b ldr r3, [r7, #36] @ 0x24 8002926: 015a lsls r2, r3, #5 8002928: 69fb ldr r3, [r7, #28] 800292a: 4413 add r3, r2 800292c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002930: 681b ldr r3, [r3, #0] 8002932: 61bb str r3, [r7, #24] if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) && 8002934: 6879 ldr r1, [r7, #4] 8002936: 6a7a ldr r2, [r7, #36] @ 0x24 8002938: 4613 mov r3, r2 800293a: 00db lsls r3, r3, #3 800293c: 4413 add r3, r2 800293e: 009b lsls r3, r3, #2 8002940: 440b add r3, r1 8002942: f503 7316 add.w r3, r3, #600 @ 0x258 8002946: 781b ldrb r3, [r3, #0] 8002948: 2b01 cmp r3, #1 800294a: d12e bne.n 80029aa ((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) && 800294c: 69bb ldr r3, [r7, #24] if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) && 800294e: 2b00 cmp r3, #0 8002950: da2b bge.n 80029aa (((RegVal & (0x1U << 16)) >> 16U) == (hpcd->FrameNumber & 0x1U))) 8002952: 69bb ldr r3, [r7, #24] 8002954: 0c1a lsrs r2, r3, #16 8002956: 687b ldr r3, [r7, #4] 8002958: f8d3 34d4 ldr.w r3, [r3, #1236] @ 0x4d4 800295c: 4053 eors r3, r2 800295e: f003 0301 and.w r3, r3, #1 ((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) && 8002962: 2b00 cmp r3, #0 8002964: d121 bne.n 80029aa { hpcd->OUT_ep[epnum].is_iso_incomplete = 1U; 8002966: 6879 ldr r1, [r7, #4] 8002968: 6a7a ldr r2, [r7, #36] @ 0x24 800296a: 4613 mov r3, r2 800296c: 00db lsls r3, r3, #3 800296e: 4413 add r3, r2 8002970: 009b lsls r3, r3, #2 8002972: 440b add r3, r1 8002974: f203 2357 addw r3, r3, #599 @ 0x257 8002978: 2201 movs r2, #1 800297a: 701a strb r2, [r3, #0] USBx->GINTMSK |= USB_OTG_GINTMSK_GONAKEFFM; 800297c: 6a3b ldr r3, [r7, #32] 800297e: 699b ldr r3, [r3, #24] 8002980: f043 0280 orr.w r2, r3, #128 @ 0x80 8002984: 6a3b ldr r3, [r7, #32] 8002986: 619a str r2, [r3, #24] if ((USBx->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF) == 0U) 8002988: 6a3b ldr r3, [r7, #32] 800298a: 695b ldr r3, [r3, #20] 800298c: f003 0380 and.w r3, r3, #128 @ 0x80 8002990: 2b00 cmp r3, #0 8002992: d10a bne.n 80029aa { USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK; 8002994: 69fb ldr r3, [r7, #28] 8002996: f503 6300 add.w r3, r3, #2048 @ 0x800 800299a: 685b ldr r3, [r3, #4] 800299c: 69fa ldr r2, [r7, #28] 800299e: f502 6200 add.w r2, r2, #2048 @ 0x800 80029a2: f443 7300 orr.w r3, r3, #512 @ 0x200 80029a6: 6053 str r3, [r2, #4] break; 80029a8: e008 b.n 80029bc for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 80029aa: 6a7b ldr r3, [r7, #36] @ 0x24 80029ac: 3301 adds r3, #1 80029ae: 627b str r3, [r7, #36] @ 0x24 80029b0: 687b ldr r3, [r7, #4] 80029b2: 791b ldrb r3, [r3, #4] 80029b4: 461a mov r2, r3 80029b6: 6a7b ldr r3, [r7, #36] @ 0x24 80029b8: 4293 cmp r3, r2 80029ba: d3b3 bcc.n 8002924 } } } __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT); 80029bc: 687b ldr r3, [r7, #4] 80029be: 681b ldr r3, [r3, #0] 80029c0: 695a ldr r2, [r3, #20] 80029c2: 687b ldr r3, [r7, #4] 80029c4: 681b ldr r3, [r3, #0] 80029c6: f402 1200 and.w r2, r2, #2097152 @ 0x200000 80029ca: 615a str r2, [r3, #20] } /* Handle Connection event Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT)) 80029cc: 687b ldr r3, [r7, #4] 80029ce: 681b ldr r3, [r3, #0] 80029d0: 4618 mov r0, r3 80029d2: f004 f9e9 bl 8006da8 80029d6: 4603 mov r3, r0 80029d8: f003 4380 and.w r3, r3, #1073741824 @ 0x40000000 80029dc: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80029e0: d10a bne.n 80029f8 { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ConnectCallback(hpcd); #else HAL_PCD_ConnectCallback(hpcd); 80029e2: 6878 ldr r0, [r7, #4] 80029e4: f006 fb58 bl 8009098 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT); 80029e8: 687b ldr r3, [r7, #4] 80029ea: 681b ldr r3, [r3, #0] 80029ec: 695a ldr r2, [r3, #20] 80029ee: 687b ldr r3, [r7, #4] 80029f0: 681b ldr r3, [r3, #0] 80029f2: f002 4280 and.w r2, r2, #1073741824 @ 0x40000000 80029f6: 615a str r2, [r3, #20] } /* Handle Disconnection event Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OTGINT)) 80029f8: 687b ldr r3, [r7, #4] 80029fa: 681b ldr r3, [r3, #0] 80029fc: 4618 mov r0, r3 80029fe: f004 f9d3 bl 8006da8 8002a02: 4603 mov r3, r0 8002a04: f003 0304 and.w r3, r3, #4 8002a08: 2b04 cmp r3, #4 8002a0a: d115 bne.n 8002a38 { RegVal = hpcd->Instance->GOTGINT; 8002a0c: 687b ldr r3, [r7, #4] 8002a0e: 681b ldr r3, [r3, #0] 8002a10: 685b ldr r3, [r3, #4] 8002a12: 61bb str r3, [r7, #24] if ((RegVal & USB_OTG_GOTGINT_SEDET) == USB_OTG_GOTGINT_SEDET) 8002a14: 69bb ldr r3, [r7, #24] 8002a16: f003 0304 and.w r3, r3, #4 8002a1a: 2b00 cmp r3, #0 8002a1c: d002 beq.n 8002a24 { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DisconnectCallback(hpcd); #else HAL_PCD_DisconnectCallback(hpcd); 8002a1e: 6878 ldr r0, [r7, #4] 8002a20: f006 fb48 bl 80090b4 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } hpcd->Instance->GOTGINT |= RegVal; 8002a24: 687b ldr r3, [r7, #4] 8002a26: 681b ldr r3, [r3, #0] 8002a28: 6859 ldr r1, [r3, #4] 8002a2a: 687b ldr r3, [r7, #4] 8002a2c: 681b ldr r3, [r3, #0] 8002a2e: 69ba ldr r2, [r7, #24] 8002a30: 430a orrs r2, r1 8002a32: 605a str r2, [r3, #4] 8002a34: e000 b.n 8002a38 return; 8002a36: bf00 nop } } } 8002a38: 3734 adds r7, #52 @ 0x34 8002a3a: 46bd mov sp, r7 8002a3c: bd90 pop {r4, r7, pc} 08002a3e : * @param hpcd PCD handle * @param address new device address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) { 8002a3e: b580 push {r7, lr} 8002a40: b082 sub sp, #8 8002a42: af00 add r7, sp, #0 8002a44: 6078 str r0, [r7, #4] 8002a46: 460b mov r3, r1 8002a48: 70fb strb r3, [r7, #3] __HAL_LOCK(hpcd); 8002a4a: 687b ldr r3, [r7, #4] 8002a4c: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 8002a50: 2b01 cmp r3, #1 8002a52: d101 bne.n 8002a58 8002a54: 2302 movs r3, #2 8002a56: e012 b.n 8002a7e 8002a58: 687b ldr r3, [r7, #4] 8002a5a: 2201 movs r2, #1 8002a5c: f883 2494 strb.w r2, [r3, #1172] @ 0x494 hpcd->USB_Address = address; 8002a60: 687b ldr r3, [r7, #4] 8002a62: 78fa ldrb r2, [r7, #3] 8002a64: 745a strb r2, [r3, #17] (void)USB_SetDevAddress(hpcd->Instance, address); 8002a66: 687b ldr r3, [r7, #4] 8002a68: 681b ldr r3, [r3, #0] 8002a6a: 78fa ldrb r2, [r7, #3] 8002a6c: 4611 mov r1, r2 8002a6e: 4618 mov r0, r3 8002a70: f004 f932 bl 8006cd8 __HAL_UNLOCK(hpcd); 8002a74: 687b ldr r3, [r7, #4] 8002a76: 2200 movs r2, #0 8002a78: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return HAL_OK; 8002a7c: 2300 movs r3, #0 } 8002a7e: 4618 mov r0, r3 8002a80: 3708 adds r7, #8 8002a82: 46bd mov sp, r7 8002a84: bd80 pop {r7, pc} 08002a86 : * @param ep_type endpoint type * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) { 8002a86: b580 push {r7, lr} 8002a88: b084 sub sp, #16 8002a8a: af00 add r7, sp, #0 8002a8c: 6078 str r0, [r7, #4] 8002a8e: 4608 mov r0, r1 8002a90: 4611 mov r1, r2 8002a92: 461a mov r2, r3 8002a94: 4603 mov r3, r0 8002a96: 70fb strb r3, [r7, #3] 8002a98: 460b mov r3, r1 8002a9a: 803b strh r3, [r7, #0] 8002a9c: 4613 mov r3, r2 8002a9e: 70bb strb r3, [r7, #2] HAL_StatusTypeDef ret = HAL_OK; 8002aa0: 2300 movs r3, #0 8002aa2: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8002aa4: f997 3003 ldrsb.w r3, [r7, #3] 8002aa8: 2b00 cmp r3, #0 8002aaa: da0f bge.n 8002acc { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8002aac: 78fb ldrb r3, [r7, #3] 8002aae: f003 020f and.w r2, r3, #15 8002ab2: 4613 mov r3, r2 8002ab4: 00db lsls r3, r3, #3 8002ab6: 4413 add r3, r2 8002ab8: 009b lsls r3, r3, #2 8002aba: 3310 adds r3, #16 8002abc: 687a ldr r2, [r7, #4] 8002abe: 4413 add r3, r2 8002ac0: 3304 adds r3, #4 8002ac2: 60fb str r3, [r7, #12] ep->is_in = 1U; 8002ac4: 68fb ldr r3, [r7, #12] 8002ac6: 2201 movs r2, #1 8002ac8: 705a strb r2, [r3, #1] 8002aca: e00f b.n 8002aec } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8002acc: 78fb ldrb r3, [r7, #3] 8002ace: f003 020f and.w r2, r3, #15 8002ad2: 4613 mov r3, r2 8002ad4: 00db lsls r3, r3, #3 8002ad6: 4413 add r3, r2 8002ad8: 009b lsls r3, r3, #2 8002ada: f503 7314 add.w r3, r3, #592 @ 0x250 8002ade: 687a ldr r2, [r7, #4] 8002ae0: 4413 add r3, r2 8002ae2: 3304 adds r3, #4 8002ae4: 60fb str r3, [r7, #12] ep->is_in = 0U; 8002ae6: 68fb ldr r3, [r7, #12] 8002ae8: 2200 movs r2, #0 8002aea: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 8002aec: 78fb ldrb r3, [r7, #3] 8002aee: f003 030f and.w r3, r3, #15 8002af2: b2da uxtb r2, r3 8002af4: 68fb ldr r3, [r7, #12] 8002af6: 701a strb r2, [r3, #0] ep->maxpacket = (uint32_t)ep_mps & 0x7FFU; 8002af8: 883b ldrh r3, [r7, #0] 8002afa: f3c3 020a ubfx r2, r3, #0, #11 8002afe: 68fb ldr r3, [r7, #12] 8002b00: 609a str r2, [r3, #8] ep->type = ep_type; 8002b02: 68fb ldr r3, [r7, #12] 8002b04: 78ba ldrb r2, [r7, #2] 8002b06: 711a strb r2, [r3, #4] if (ep->is_in != 0U) 8002b08: 68fb ldr r3, [r7, #12] 8002b0a: 785b ldrb r3, [r3, #1] 8002b0c: 2b00 cmp r3, #0 8002b0e: d004 beq.n 8002b1a { /* Assign a Tx FIFO */ ep->tx_fifo_num = ep->num; 8002b10: 68fb ldr r3, [r7, #12] 8002b12: 781b ldrb r3, [r3, #0] 8002b14: 461a mov r2, r3 8002b16: 68fb ldr r3, [r7, #12] 8002b18: 835a strh r2, [r3, #26] } /* Set initial data PID. */ if (ep_type == EP_TYPE_BULK) 8002b1a: 78bb ldrb r3, [r7, #2] 8002b1c: 2b02 cmp r3, #2 8002b1e: d102 bne.n 8002b26 { ep->data_pid_start = 0U; 8002b20: 68fb ldr r3, [r7, #12] 8002b22: 2200 movs r2, #0 8002b24: 715a strb r2, [r3, #5] } __HAL_LOCK(hpcd); 8002b26: 687b ldr r3, [r7, #4] 8002b28: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 8002b2c: 2b01 cmp r3, #1 8002b2e: d101 bne.n 8002b34 8002b30: 2302 movs r3, #2 8002b32: e00e b.n 8002b52 8002b34: 687b ldr r3, [r7, #4] 8002b36: 2201 movs r2, #1 8002b38: f883 2494 strb.w r2, [r3, #1172] @ 0x494 (void)USB_ActivateEndpoint(hpcd->Instance, ep); 8002b3c: 687b ldr r3, [r7, #4] 8002b3e: 681b ldr r3, [r3, #0] 8002b40: 68f9 ldr r1, [r7, #12] 8002b42: 4618 mov r0, r3 8002b44: f003 fab2 bl 80060ac __HAL_UNLOCK(hpcd); 8002b48: 687b ldr r3, [r7, #4] 8002b4a: 2200 movs r2, #0 8002b4c: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return ret; 8002b50: 7afb ldrb r3, [r7, #11] } 8002b52: 4618 mov r0, r3 8002b54: 3710 adds r7, #16 8002b56: 46bd mov sp, r7 8002b58: bd80 pop {r7, pc} 08002b5a : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8002b5a: b580 push {r7, lr} 8002b5c: b084 sub sp, #16 8002b5e: af00 add r7, sp, #0 8002b60: 6078 str r0, [r7, #4] 8002b62: 460b mov r3, r1 8002b64: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8002b66: f997 3003 ldrsb.w r3, [r7, #3] 8002b6a: 2b00 cmp r3, #0 8002b6c: da0f bge.n 8002b8e { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8002b6e: 78fb ldrb r3, [r7, #3] 8002b70: f003 020f and.w r2, r3, #15 8002b74: 4613 mov r3, r2 8002b76: 00db lsls r3, r3, #3 8002b78: 4413 add r3, r2 8002b7a: 009b lsls r3, r3, #2 8002b7c: 3310 adds r3, #16 8002b7e: 687a ldr r2, [r7, #4] 8002b80: 4413 add r3, r2 8002b82: 3304 adds r3, #4 8002b84: 60fb str r3, [r7, #12] ep->is_in = 1U; 8002b86: 68fb ldr r3, [r7, #12] 8002b88: 2201 movs r2, #1 8002b8a: 705a strb r2, [r3, #1] 8002b8c: e00f b.n 8002bae } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8002b8e: 78fb ldrb r3, [r7, #3] 8002b90: f003 020f and.w r2, r3, #15 8002b94: 4613 mov r3, r2 8002b96: 00db lsls r3, r3, #3 8002b98: 4413 add r3, r2 8002b9a: 009b lsls r3, r3, #2 8002b9c: f503 7314 add.w r3, r3, #592 @ 0x250 8002ba0: 687a ldr r2, [r7, #4] 8002ba2: 4413 add r3, r2 8002ba4: 3304 adds r3, #4 8002ba6: 60fb str r3, [r7, #12] ep->is_in = 0U; 8002ba8: 68fb ldr r3, [r7, #12] 8002baa: 2200 movs r2, #0 8002bac: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 8002bae: 78fb ldrb r3, [r7, #3] 8002bb0: f003 030f and.w r3, r3, #15 8002bb4: b2da uxtb r2, r3 8002bb6: 68fb ldr r3, [r7, #12] 8002bb8: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8002bba: 687b ldr r3, [r7, #4] 8002bbc: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 8002bc0: 2b01 cmp r3, #1 8002bc2: d101 bne.n 8002bc8 8002bc4: 2302 movs r3, #2 8002bc6: e00e b.n 8002be6 8002bc8: 687b ldr r3, [r7, #4] 8002bca: 2201 movs r2, #1 8002bcc: f883 2494 strb.w r2, [r3, #1172] @ 0x494 (void)USB_DeactivateEndpoint(hpcd->Instance, ep); 8002bd0: 687b ldr r3, [r7, #4] 8002bd2: 681b ldr r3, [r3, #0] 8002bd4: 68f9 ldr r1, [r7, #12] 8002bd6: 4618 mov r0, r3 8002bd8: f003 faf0 bl 80061bc __HAL_UNLOCK(hpcd); 8002bdc: 687b ldr r3, [r7, #4] 8002bde: 2200 movs r2, #0 8002be0: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return HAL_OK; 8002be4: 2300 movs r3, #0 } 8002be6: 4618 mov r0, r3 8002be8: 3710 adds r7, #16 8002bea: 46bd mov sp, r7 8002bec: bd80 pop {r7, pc} 08002bee : * @param pBuf pointer to the reception buffer * @param len amount of data to be received * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8002bee: b580 push {r7, lr} 8002bf0: b086 sub sp, #24 8002bf2: af00 add r7, sp, #0 8002bf4: 60f8 str r0, [r7, #12] 8002bf6: 607a str r2, [r7, #4] 8002bf8: 603b str r3, [r7, #0] 8002bfa: 460b mov r3, r1 8002bfc: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8002bfe: 7afb ldrb r3, [r7, #11] 8002c00: f003 020f and.w r2, r3, #15 8002c04: 4613 mov r3, r2 8002c06: 00db lsls r3, r3, #3 8002c08: 4413 add r3, r2 8002c0a: 009b lsls r3, r3, #2 8002c0c: f503 7314 add.w r3, r3, #592 @ 0x250 8002c10: 68fa ldr r2, [r7, #12] 8002c12: 4413 add r3, r2 8002c14: 3304 adds r3, #4 8002c16: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8002c18: 697b ldr r3, [r7, #20] 8002c1a: 687a ldr r2, [r7, #4] 8002c1c: 60da str r2, [r3, #12] ep->xfer_len = len; 8002c1e: 697b ldr r3, [r7, #20] 8002c20: 683a ldr r2, [r7, #0] 8002c22: 611a str r2, [r3, #16] ep->xfer_count = 0U; 8002c24: 697b ldr r3, [r7, #20] 8002c26: 2200 movs r2, #0 8002c28: 615a str r2, [r3, #20] ep->is_in = 0U; 8002c2a: 697b ldr r3, [r7, #20] 8002c2c: 2200 movs r2, #0 8002c2e: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8002c30: 7afb ldrb r3, [r7, #11] 8002c32: f003 030f and.w r3, r3, #15 8002c36: b2da uxtb r2, r3 8002c38: 697b ldr r3, [r7, #20] 8002c3a: 701a strb r2, [r3, #0] if (hpcd->Init.dma_enable == 1U) 8002c3c: 68fb ldr r3, [r7, #12] 8002c3e: 799b ldrb r3, [r3, #6] 8002c40: 2b01 cmp r3, #1 8002c42: d102 bne.n 8002c4a { ep->dma_addr = (uint32_t)pBuf; 8002c44: 687a ldr r2, [r7, #4] 8002c46: 697b ldr r3, [r7, #20] 8002c48: 61da str r2, [r3, #28] } (void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable); 8002c4a: 68fb ldr r3, [r7, #12] 8002c4c: 6818 ldr r0, [r3, #0] 8002c4e: 68fb ldr r3, [r7, #12] 8002c50: 799b ldrb r3, [r3, #6] 8002c52: 461a mov r2, r3 8002c54: 6979 ldr r1, [r7, #20] 8002c56: f003 fb8d bl 8006374 return HAL_OK; 8002c5a: 2300 movs r3, #0 } 8002c5c: 4618 mov r0, r3 8002c5e: 3718 adds r7, #24 8002c60: 46bd mov sp, r7 8002c62: bd80 pop {r7, pc} 08002c64 : * @param pBuf pointer to the transmission buffer * @param len amount of data to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8002c64: b580 push {r7, lr} 8002c66: b086 sub sp, #24 8002c68: af00 add r7, sp, #0 8002c6a: 60f8 str r0, [r7, #12] 8002c6c: 607a str r2, [r7, #4] 8002c6e: 603b str r3, [r7, #0] 8002c70: 460b mov r3, r1 8002c72: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8002c74: 7afb ldrb r3, [r7, #11] 8002c76: f003 020f and.w r2, r3, #15 8002c7a: 4613 mov r3, r2 8002c7c: 00db lsls r3, r3, #3 8002c7e: 4413 add r3, r2 8002c80: 009b lsls r3, r3, #2 8002c82: 3310 adds r3, #16 8002c84: 68fa ldr r2, [r7, #12] 8002c86: 4413 add r3, r2 8002c88: 3304 adds r3, #4 8002c8a: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 8002c8c: 697b ldr r3, [r7, #20] 8002c8e: 687a ldr r2, [r7, #4] 8002c90: 60da str r2, [r3, #12] ep->xfer_len = len; 8002c92: 697b ldr r3, [r7, #20] 8002c94: 683a ldr r2, [r7, #0] 8002c96: 611a str r2, [r3, #16] ep->xfer_count = 0U; 8002c98: 697b ldr r3, [r7, #20] 8002c9a: 2200 movs r2, #0 8002c9c: 615a str r2, [r3, #20] ep->is_in = 1U; 8002c9e: 697b ldr r3, [r7, #20] 8002ca0: 2201 movs r2, #1 8002ca2: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8002ca4: 7afb ldrb r3, [r7, #11] 8002ca6: f003 030f and.w r3, r3, #15 8002caa: b2da uxtb r2, r3 8002cac: 697b ldr r3, [r7, #20] 8002cae: 701a strb r2, [r3, #0] if (hpcd->Init.dma_enable == 1U) 8002cb0: 68fb ldr r3, [r7, #12] 8002cb2: 799b ldrb r3, [r3, #6] 8002cb4: 2b01 cmp r3, #1 8002cb6: d102 bne.n 8002cbe { ep->dma_addr = (uint32_t)pBuf; 8002cb8: 687a ldr r2, [r7, #4] 8002cba: 697b ldr r3, [r7, #20] 8002cbc: 61da str r2, [r3, #28] } (void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable); 8002cbe: 68fb ldr r3, [r7, #12] 8002cc0: 6818 ldr r0, [r3, #0] 8002cc2: 68fb ldr r3, [r7, #12] 8002cc4: 799b ldrb r3, [r3, #6] 8002cc6: 461a mov r2, r3 8002cc8: 6979 ldr r1, [r7, #20] 8002cca: f003 fb53 bl 8006374 return HAL_OK; 8002cce: 2300 movs r3, #0 } 8002cd0: 4618 mov r0, r3 8002cd2: 3718 adds r7, #24 8002cd4: 46bd mov sp, r7 8002cd6: bd80 pop {r7, pc} 08002cd8 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8002cd8: b580 push {r7, lr} 8002cda: b084 sub sp, #16 8002cdc: af00 add r7, sp, #0 8002cde: 6078 str r0, [r7, #4] 8002ce0: 460b mov r3, r1 8002ce2: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints) 8002ce4: 78fb ldrb r3, [r7, #3] 8002ce6: f003 030f and.w r3, r3, #15 8002cea: 687a ldr r2, [r7, #4] 8002cec: 7912 ldrb r2, [r2, #4] 8002cee: 4293 cmp r3, r2 8002cf0: d901 bls.n 8002cf6 { return HAL_ERROR; 8002cf2: 2301 movs r3, #1 8002cf4: e04f b.n 8002d96 } if ((0x80U & ep_addr) == 0x80U) 8002cf6: f997 3003 ldrsb.w r3, [r7, #3] 8002cfa: 2b00 cmp r3, #0 8002cfc: da0f bge.n 8002d1e { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8002cfe: 78fb ldrb r3, [r7, #3] 8002d00: f003 020f and.w r2, r3, #15 8002d04: 4613 mov r3, r2 8002d06: 00db lsls r3, r3, #3 8002d08: 4413 add r3, r2 8002d0a: 009b lsls r3, r3, #2 8002d0c: 3310 adds r3, #16 8002d0e: 687a ldr r2, [r7, #4] 8002d10: 4413 add r3, r2 8002d12: 3304 adds r3, #4 8002d14: 60fb str r3, [r7, #12] ep->is_in = 1U; 8002d16: 68fb ldr r3, [r7, #12] 8002d18: 2201 movs r2, #1 8002d1a: 705a strb r2, [r3, #1] 8002d1c: e00d b.n 8002d3a } else { ep = &hpcd->OUT_ep[ep_addr]; 8002d1e: 78fa ldrb r2, [r7, #3] 8002d20: 4613 mov r3, r2 8002d22: 00db lsls r3, r3, #3 8002d24: 4413 add r3, r2 8002d26: 009b lsls r3, r3, #2 8002d28: f503 7314 add.w r3, r3, #592 @ 0x250 8002d2c: 687a ldr r2, [r7, #4] 8002d2e: 4413 add r3, r2 8002d30: 3304 adds r3, #4 8002d32: 60fb str r3, [r7, #12] ep->is_in = 0U; 8002d34: 68fb ldr r3, [r7, #12] 8002d36: 2200 movs r2, #0 8002d38: 705a strb r2, [r3, #1] } ep->is_stall = 1U; 8002d3a: 68fb ldr r3, [r7, #12] 8002d3c: 2201 movs r2, #1 8002d3e: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 8002d40: 78fb ldrb r3, [r7, #3] 8002d42: f003 030f and.w r3, r3, #15 8002d46: b2da uxtb r2, r3 8002d48: 68fb ldr r3, [r7, #12] 8002d4a: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8002d4c: 687b ldr r3, [r7, #4] 8002d4e: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 8002d52: 2b01 cmp r3, #1 8002d54: d101 bne.n 8002d5a 8002d56: 2302 movs r3, #2 8002d58: e01d b.n 8002d96 8002d5a: 687b ldr r3, [r7, #4] 8002d5c: 2201 movs r2, #1 8002d5e: f883 2494 strb.w r2, [r3, #1172] @ 0x494 (void)USB_EPSetStall(hpcd->Instance, ep); 8002d62: 687b ldr r3, [r7, #4] 8002d64: 681b ldr r3, [r3, #0] 8002d66: 68f9 ldr r1, [r7, #12] 8002d68: 4618 mov r0, r3 8002d6a: f003 fee1 bl 8006b30 if ((ep_addr & EP_ADDR_MSK) == 0U) 8002d6e: 78fb ldrb r3, [r7, #3] 8002d70: f003 030f and.w r3, r3, #15 8002d74: 2b00 cmp r3, #0 8002d76: d109 bne.n 8002d8c { (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup); 8002d78: 687b ldr r3, [r7, #4] 8002d7a: 6818 ldr r0, [r3, #0] 8002d7c: 687b ldr r3, [r7, #4] 8002d7e: 7999 ldrb r1, [r3, #6] 8002d80: 687b ldr r3, [r7, #4] 8002d82: f203 439c addw r3, r3, #1180 @ 0x49c 8002d86: 461a mov r2, r3 8002d88: f004 f8d2 bl 8006f30 } __HAL_UNLOCK(hpcd); 8002d8c: 687b ldr r3, [r7, #4] 8002d8e: 2200 movs r2, #0 8002d90: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return HAL_OK; 8002d94: 2300 movs r3, #0 } 8002d96: 4618 mov r0, r3 8002d98: 3710 adds r7, #16 8002d9a: 46bd mov sp, r7 8002d9c: bd80 pop {r7, pc} 08002d9e : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8002d9e: b580 push {r7, lr} 8002da0: b084 sub sp, #16 8002da2: af00 add r7, sp, #0 8002da4: 6078 str r0, [r7, #4] 8002da6: 460b mov r3, r1 8002da8: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints) 8002daa: 78fb ldrb r3, [r7, #3] 8002dac: f003 030f and.w r3, r3, #15 8002db0: 687a ldr r2, [r7, #4] 8002db2: 7912 ldrb r2, [r2, #4] 8002db4: 4293 cmp r3, r2 8002db6: d901 bls.n 8002dbc { return HAL_ERROR; 8002db8: 2301 movs r3, #1 8002dba: e042 b.n 8002e42 } if ((0x80U & ep_addr) == 0x80U) 8002dbc: f997 3003 ldrsb.w r3, [r7, #3] 8002dc0: 2b00 cmp r3, #0 8002dc2: da0f bge.n 8002de4 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8002dc4: 78fb ldrb r3, [r7, #3] 8002dc6: f003 020f and.w r2, r3, #15 8002dca: 4613 mov r3, r2 8002dcc: 00db lsls r3, r3, #3 8002dce: 4413 add r3, r2 8002dd0: 009b lsls r3, r3, #2 8002dd2: 3310 adds r3, #16 8002dd4: 687a ldr r2, [r7, #4] 8002dd6: 4413 add r3, r2 8002dd8: 3304 adds r3, #4 8002dda: 60fb str r3, [r7, #12] ep->is_in = 1U; 8002ddc: 68fb ldr r3, [r7, #12] 8002dde: 2201 movs r2, #1 8002de0: 705a strb r2, [r3, #1] 8002de2: e00f b.n 8002e04 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8002de4: 78fb ldrb r3, [r7, #3] 8002de6: f003 020f and.w r2, r3, #15 8002dea: 4613 mov r3, r2 8002dec: 00db lsls r3, r3, #3 8002dee: 4413 add r3, r2 8002df0: 009b lsls r3, r3, #2 8002df2: f503 7314 add.w r3, r3, #592 @ 0x250 8002df6: 687a ldr r2, [r7, #4] 8002df8: 4413 add r3, r2 8002dfa: 3304 adds r3, #4 8002dfc: 60fb str r3, [r7, #12] ep->is_in = 0U; 8002dfe: 68fb ldr r3, [r7, #12] 8002e00: 2200 movs r2, #0 8002e02: 705a strb r2, [r3, #1] } ep->is_stall = 0U; 8002e04: 68fb ldr r3, [r7, #12] 8002e06: 2200 movs r2, #0 8002e08: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 8002e0a: 78fb ldrb r3, [r7, #3] 8002e0c: f003 030f and.w r3, r3, #15 8002e10: b2da uxtb r2, r3 8002e12: 68fb ldr r3, [r7, #12] 8002e14: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 8002e16: 687b ldr r3, [r7, #4] 8002e18: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 8002e1c: 2b01 cmp r3, #1 8002e1e: d101 bne.n 8002e24 8002e20: 2302 movs r3, #2 8002e22: e00e b.n 8002e42 8002e24: 687b ldr r3, [r7, #4] 8002e26: 2201 movs r2, #1 8002e28: f883 2494 strb.w r2, [r3, #1172] @ 0x494 (void)USB_EPClearStall(hpcd->Instance, ep); 8002e2c: 687b ldr r3, [r7, #4] 8002e2e: 681b ldr r3, [r3, #0] 8002e30: 68f9 ldr r1, [r7, #12] 8002e32: 4618 mov r0, r3 8002e34: f003 feea bl 8006c0c __HAL_UNLOCK(hpcd); 8002e38: 687b ldr r3, [r7, #4] 8002e3a: 2200 movs r2, #0 8002e3c: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return HAL_OK; 8002e40: 2300 movs r3, #0 } 8002e42: 4618 mov r0, r3 8002e44: 3710 adds r7, #16 8002e46: 46bd mov sp, r7 8002e48: bd80 pop {r7, pc} 08002e4a : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8002e4a: b580 push {r7, lr} 8002e4c: b084 sub sp, #16 8002e4e: af00 add r7, sp, #0 8002e50: 6078 str r0, [r7, #4] 8002e52: 460b mov r3, r1 8002e54: 70fb strb r3, [r7, #3] HAL_StatusTypeDef ret; PCD_EPTypeDef *ep; if ((0x80U & ep_addr) == 0x80U) 8002e56: f997 3003 ldrsb.w r3, [r7, #3] 8002e5a: 2b00 cmp r3, #0 8002e5c: da0c bge.n 8002e78 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8002e5e: 78fb ldrb r3, [r7, #3] 8002e60: f003 020f and.w r2, r3, #15 8002e64: 4613 mov r3, r2 8002e66: 00db lsls r3, r3, #3 8002e68: 4413 add r3, r2 8002e6a: 009b lsls r3, r3, #2 8002e6c: 3310 adds r3, #16 8002e6e: 687a ldr r2, [r7, #4] 8002e70: 4413 add r3, r2 8002e72: 3304 adds r3, #4 8002e74: 60fb str r3, [r7, #12] 8002e76: e00c b.n 8002e92 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8002e78: 78fb ldrb r3, [r7, #3] 8002e7a: f003 020f and.w r2, r3, #15 8002e7e: 4613 mov r3, r2 8002e80: 00db lsls r3, r3, #3 8002e82: 4413 add r3, r2 8002e84: 009b lsls r3, r3, #2 8002e86: f503 7314 add.w r3, r3, #592 @ 0x250 8002e8a: 687a ldr r2, [r7, #4] 8002e8c: 4413 add r3, r2 8002e8e: 3304 adds r3, #4 8002e90: 60fb str r3, [r7, #12] } /* Stop Xfer */ ret = USB_EPStopXfer(hpcd->Instance, ep); 8002e92: 687b ldr r3, [r7, #4] 8002e94: 681b ldr r3, [r3, #0] 8002e96: 68f9 ldr r1, [r7, #12] 8002e98: 4618 mov r0, r3 8002e9a: f003 fd09 bl 80068b0 8002e9e: 4603 mov r3, r0 8002ea0: 72fb strb r3, [r7, #11] return ret; 8002ea2: 7afb ldrb r3, [r7, #11] } 8002ea4: 4618 mov r0, r3 8002ea6: 3710 adds r7, #16 8002ea8: 46bd mov sp, r7 8002eaa: bd80 pop {r7, pc} 08002eac : * @param hpcd PCD handle * @param epnum endpoint number * @retval HAL status */ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum) { 8002eac: b580 push {r7, lr} 8002eae: b08a sub sp, #40 @ 0x28 8002eb0: af02 add r7, sp, #8 8002eb2: 6078 str r0, [r7, #4] 8002eb4: 6039 str r1, [r7, #0] USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 8002eb6: 687b ldr r3, [r7, #4] 8002eb8: 681b ldr r3, [r3, #0] 8002eba: 617b str r3, [r7, #20] uint32_t USBx_BASE = (uint32_t)USBx; 8002ebc: 697b ldr r3, [r7, #20] 8002ebe: 613b str r3, [r7, #16] USB_OTG_EPTypeDef *ep; uint32_t len; uint32_t len32b; uint32_t fifoemptymsk; ep = &hpcd->IN_ep[epnum]; 8002ec0: 683a ldr r2, [r7, #0] 8002ec2: 4613 mov r3, r2 8002ec4: 00db lsls r3, r3, #3 8002ec6: 4413 add r3, r2 8002ec8: 009b lsls r3, r3, #2 8002eca: 3310 adds r3, #16 8002ecc: 687a ldr r2, [r7, #4] 8002ece: 4413 add r3, r2 8002ed0: 3304 adds r3, #4 8002ed2: 60fb str r3, [r7, #12] if (ep->xfer_count > ep->xfer_len) 8002ed4: 68fb ldr r3, [r7, #12] 8002ed6: 695a ldr r2, [r3, #20] 8002ed8: 68fb ldr r3, [r7, #12] 8002eda: 691b ldr r3, [r3, #16] 8002edc: 429a cmp r2, r3 8002ede: d901 bls.n 8002ee4 { return HAL_ERROR; 8002ee0: 2301 movs r3, #1 8002ee2: e06b b.n 8002fbc } len = ep->xfer_len - ep->xfer_count; 8002ee4: 68fb ldr r3, [r7, #12] 8002ee6: 691a ldr r2, [r3, #16] 8002ee8: 68fb ldr r3, [r7, #12] 8002eea: 695b ldr r3, [r3, #20] 8002eec: 1ad3 subs r3, r2, r3 8002eee: 61fb str r3, [r7, #28] if (len > ep->maxpacket) 8002ef0: 68fb ldr r3, [r7, #12] 8002ef2: 689b ldr r3, [r3, #8] 8002ef4: 69fa ldr r2, [r7, #28] 8002ef6: 429a cmp r2, r3 8002ef8: d902 bls.n 8002f00 { len = ep->maxpacket; 8002efa: 68fb ldr r3, [r7, #12] 8002efc: 689b ldr r3, [r3, #8] 8002efe: 61fb str r3, [r7, #28] } len32b = (len + 3U) / 4U; 8002f00: 69fb ldr r3, [r7, #28] 8002f02: 3303 adds r3, #3 8002f04: 089b lsrs r3, r3, #2 8002f06: 61bb str r3, [r7, #24] while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) && 8002f08: e02a b.n 8002f60 (ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U)) { /* Write the FIFO */ len = ep->xfer_len - ep->xfer_count; 8002f0a: 68fb ldr r3, [r7, #12] 8002f0c: 691a ldr r2, [r3, #16] 8002f0e: 68fb ldr r3, [r7, #12] 8002f10: 695b ldr r3, [r3, #20] 8002f12: 1ad3 subs r3, r2, r3 8002f14: 61fb str r3, [r7, #28] if (len > ep->maxpacket) 8002f16: 68fb ldr r3, [r7, #12] 8002f18: 689b ldr r3, [r3, #8] 8002f1a: 69fa ldr r2, [r7, #28] 8002f1c: 429a cmp r2, r3 8002f1e: d902 bls.n 8002f26 { len = ep->maxpacket; 8002f20: 68fb ldr r3, [r7, #12] 8002f22: 689b ldr r3, [r3, #8] 8002f24: 61fb str r3, [r7, #28] } len32b = (len + 3U) / 4U; 8002f26: 69fb ldr r3, [r7, #28] 8002f28: 3303 adds r3, #3 8002f2a: 089b lsrs r3, r3, #2 8002f2c: 61bb str r3, [r7, #24] (void)USB_WritePacket(USBx, ep->xfer_buff, (uint8_t)epnum, (uint16_t)len, 8002f2e: 68fb ldr r3, [r7, #12] 8002f30: 68d9 ldr r1, [r3, #12] 8002f32: 683b ldr r3, [r7, #0] 8002f34: b2da uxtb r2, r3 8002f36: 69fb ldr r3, [r7, #28] 8002f38: b298 uxth r0, r3 (uint8_t)hpcd->Init.dma_enable); 8002f3a: 687b ldr r3, [r7, #4] 8002f3c: 799b ldrb r3, [r3, #6] (void)USB_WritePacket(USBx, ep->xfer_buff, (uint8_t)epnum, (uint16_t)len, 8002f3e: 9300 str r3, [sp, #0] 8002f40: 4603 mov r3, r0 8002f42: 6978 ldr r0, [r7, #20] 8002f44: f003 fd5e bl 8006a04 ep->xfer_buff += len; 8002f48: 68fb ldr r3, [r7, #12] 8002f4a: 68da ldr r2, [r3, #12] 8002f4c: 69fb ldr r3, [r7, #28] 8002f4e: 441a add r2, r3 8002f50: 68fb ldr r3, [r7, #12] 8002f52: 60da str r2, [r3, #12] ep->xfer_count += len; 8002f54: 68fb ldr r3, [r7, #12] 8002f56: 695a ldr r2, [r3, #20] 8002f58: 69fb ldr r3, [r7, #28] 8002f5a: 441a add r2, r3 8002f5c: 68fb ldr r3, [r7, #12] 8002f5e: 615a str r2, [r3, #20] while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) && 8002f60: 683b ldr r3, [r7, #0] 8002f62: 015a lsls r2, r3, #5 8002f64: 693b ldr r3, [r7, #16] 8002f66: 4413 add r3, r2 8002f68: f503 6310 add.w r3, r3, #2304 @ 0x900 8002f6c: 699b ldr r3, [r3, #24] 8002f6e: b29b uxth r3, r3 (ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U)) 8002f70: 69ba ldr r2, [r7, #24] 8002f72: 429a cmp r2, r3 8002f74: d809 bhi.n 8002f8a 8002f76: 68fb ldr r3, [r7, #12] 8002f78: 695a ldr r2, [r3, #20] 8002f7a: 68fb ldr r3, [r7, #12] 8002f7c: 691b ldr r3, [r3, #16] while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) && 8002f7e: 429a cmp r2, r3 8002f80: d203 bcs.n 8002f8a (ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U)) 8002f82: 68fb ldr r3, [r7, #12] 8002f84: 691b ldr r3, [r3, #16] 8002f86: 2b00 cmp r3, #0 8002f88: d1bf bne.n 8002f0a } if (ep->xfer_len <= ep->xfer_count) 8002f8a: 68fb ldr r3, [r7, #12] 8002f8c: 691a ldr r2, [r3, #16] 8002f8e: 68fb ldr r3, [r7, #12] 8002f90: 695b ldr r3, [r3, #20] 8002f92: 429a cmp r2, r3 8002f94: d811 bhi.n 8002fba { fifoemptymsk = (uint32_t)(0x1UL << (epnum & EP_ADDR_MSK)); 8002f96: 683b ldr r3, [r7, #0] 8002f98: f003 030f and.w r3, r3, #15 8002f9c: 2201 movs r2, #1 8002f9e: fa02 f303 lsl.w r3, r2, r3 8002fa2: 60bb str r3, [r7, #8] USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk; 8002fa4: 693b ldr r3, [r7, #16] 8002fa6: f503 6300 add.w r3, r3, #2048 @ 0x800 8002faa: 6b5a ldr r2, [r3, #52] @ 0x34 8002fac: 68bb ldr r3, [r7, #8] 8002fae: 43db mvns r3, r3 8002fb0: 6939 ldr r1, [r7, #16] 8002fb2: f501 6100 add.w r1, r1, #2048 @ 0x800 8002fb6: 4013 ands r3, r2 8002fb8: 634b str r3, [r1, #52] @ 0x34 } return HAL_OK; 8002fba: 2300 movs r3, #0 } 8002fbc: 4618 mov r0, r3 8002fbe: 3720 adds r7, #32 8002fc0: 46bd mov sp, r7 8002fc2: bd80 pop {r7, pc} 08002fc4 : * @param hpcd PCD handle * @param epnum endpoint number * @retval HAL status */ static HAL_StatusTypeDef PCD_EP_OutXfrComplete_int(PCD_HandleTypeDef *hpcd, uint32_t epnum) { 8002fc4: b580 push {r7, lr} 8002fc6: b088 sub sp, #32 8002fc8: af00 add r7, sp, #0 8002fca: 6078 str r0, [r7, #4] 8002fcc: 6039 str r1, [r7, #0] USB_OTG_EPTypeDef *ep; const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 8002fce: 687b ldr r3, [r7, #4] 8002fd0: 681b ldr r3, [r3, #0] 8002fd2: 61fb str r3, [r7, #28] uint32_t USBx_BASE = (uint32_t)USBx; 8002fd4: 69fb ldr r3, [r7, #28] 8002fd6: 61bb str r3, [r7, #24] uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U); 8002fd8: 69fb ldr r3, [r7, #28] 8002fda: 333c adds r3, #60 @ 0x3c 8002fdc: 3304 adds r3, #4 8002fde: 681b ldr r3, [r3, #0] 8002fe0: 617b str r3, [r7, #20] uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT; 8002fe2: 683b ldr r3, [r7, #0] 8002fe4: 015a lsls r2, r3, #5 8002fe6: 69bb ldr r3, [r7, #24] 8002fe8: 4413 add r3, r2 8002fea: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002fee: 689b ldr r3, [r3, #8] 8002ff0: 613b str r3, [r7, #16] if (hpcd->Init.dma_enable == 1U) 8002ff2: 687b ldr r3, [r7, #4] 8002ff4: 799b ldrb r3, [r3, #6] 8002ff6: 2b01 cmp r3, #1 8002ff8: d17b bne.n 80030f2 { if ((DoepintReg & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) /* Class C */ 8002ffa: 693b ldr r3, [r7, #16] 8002ffc: f003 0308 and.w r3, r3, #8 8003000: 2b00 cmp r3, #0 8003002: d015 beq.n 8003030 { /* StupPktRcvd = 1 this is a setup packet */ if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 8003004: 697b ldr r3, [r7, #20] 8003006: 4a61 ldr r2, [pc, #388] @ (800318c ) 8003008: 4293 cmp r3, r2 800300a: f240 80b9 bls.w 8003180 ((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX)) 800300e: 693b ldr r3, [r7, #16] 8003010: f403 4300 and.w r3, r3, #32768 @ 0x8000 if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 8003014: 2b00 cmp r3, #0 8003016: f000 80b3 beq.w 8003180 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX); 800301a: 683b ldr r3, [r7, #0] 800301c: 015a lsls r2, r3, #5 800301e: 69bb ldr r3, [r7, #24] 8003020: 4413 add r3, r2 8003022: f503 6330 add.w r3, r3, #2816 @ 0xb00 8003026: 461a mov r2, r3 8003028: f44f 4300 mov.w r3, #32768 @ 0x8000 800302c: 6093 str r3, [r2, #8] 800302e: e0a7 b.n 8003180 } } else if ((DoepintReg & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR) /* Class E */ 8003030: 693b ldr r3, [r7, #16] 8003032: f003 0320 and.w r3, r3, #32 8003036: 2b00 cmp r3, #0 8003038: d009 beq.n 800304e { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR); 800303a: 683b ldr r3, [r7, #0] 800303c: 015a lsls r2, r3, #5 800303e: 69bb ldr r3, [r7, #24] 8003040: 4413 add r3, r2 8003042: f503 6330 add.w r3, r3, #2816 @ 0xb00 8003046: 461a mov r2, r3 8003048: 2320 movs r3, #32 800304a: 6093 str r3, [r2, #8] 800304c: e098 b.n 8003180 } else if ((DoepintReg & (USB_OTG_DOEPINT_STUP | USB_OTG_DOEPINT_OTEPSPR)) == 0U) 800304e: 693b ldr r3, [r7, #16] 8003050: f003 0328 and.w r3, r3, #40 @ 0x28 8003054: 2b00 cmp r3, #0 8003056: f040 8093 bne.w 8003180 { /* StupPktRcvd = 1 this is a setup packet */ if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 800305a: 697b ldr r3, [r7, #20] 800305c: 4a4b ldr r2, [pc, #300] @ (800318c ) 800305e: 4293 cmp r3, r2 8003060: d90f bls.n 8003082 ((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX)) 8003062: 693b ldr r3, [r7, #16] 8003064: f403 4300 and.w r3, r3, #32768 @ 0x8000 if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 8003068: 2b00 cmp r3, #0 800306a: d00a beq.n 8003082 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX); 800306c: 683b ldr r3, [r7, #0] 800306e: 015a lsls r2, r3, #5 8003070: 69bb ldr r3, [r7, #24] 8003072: 4413 add r3, r2 8003074: f503 6330 add.w r3, r3, #2816 @ 0xb00 8003078: 461a mov r2, r3 800307a: f44f 4300 mov.w r3, #32768 @ 0x8000 800307e: 6093 str r3, [r2, #8] 8003080: e07e b.n 8003180 } else { ep = &hpcd->OUT_ep[epnum]; 8003082: 683a ldr r2, [r7, #0] 8003084: 4613 mov r3, r2 8003086: 00db lsls r3, r3, #3 8003088: 4413 add r3, r2 800308a: 009b lsls r3, r3, #2 800308c: f503 7314 add.w r3, r3, #592 @ 0x250 8003090: 687a ldr r2, [r7, #4] 8003092: 4413 add r3, r2 8003094: 3304 adds r3, #4 8003096: 60fb str r3, [r7, #12] /* out data packet received over EP */ ep->xfer_count = ep->xfer_size - (USBx_OUTEP(epnum)->DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ); 8003098: 68fb ldr r3, [r7, #12] 800309a: 6a1a ldr r2, [r3, #32] 800309c: 683b ldr r3, [r7, #0] 800309e: 0159 lsls r1, r3, #5 80030a0: 69bb ldr r3, [r7, #24] 80030a2: 440b add r3, r1 80030a4: f503 6330 add.w r3, r3, #2816 @ 0xb00 80030a8: 691b ldr r3, [r3, #16] 80030aa: f3c3 0312 ubfx r3, r3, #0, #19 80030ae: 1ad2 subs r2, r2, r3 80030b0: 68fb ldr r3, [r7, #12] 80030b2: 615a str r2, [r3, #20] if (epnum == 0U) 80030b4: 683b ldr r3, [r7, #0] 80030b6: 2b00 cmp r3, #0 80030b8: d114 bne.n 80030e4 { if (ep->xfer_len == 0U) 80030ba: 68fb ldr r3, [r7, #12] 80030bc: 691b ldr r3, [r3, #16] 80030be: 2b00 cmp r3, #0 80030c0: d109 bne.n 80030d6 { /* this is ZLP, so prepare EP0 for next setup */ (void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup); 80030c2: 687b ldr r3, [r7, #4] 80030c4: 6818 ldr r0, [r3, #0] 80030c6: 687b ldr r3, [r7, #4] 80030c8: f203 439c addw r3, r3, #1180 @ 0x49c 80030cc: 461a mov r2, r3 80030ce: 2101 movs r1, #1 80030d0: f003 ff2e bl 8006f30 80030d4: e006 b.n 80030e4 } else { ep->xfer_buff += ep->xfer_count; 80030d6: 68fb ldr r3, [r7, #12] 80030d8: 68da ldr r2, [r3, #12] 80030da: 68fb ldr r3, [r7, #12] 80030dc: 695b ldr r3, [r3, #20] 80030de: 441a add r2, r3 80030e0: 68fb ldr r3, [r7, #12] 80030e2: 60da str r2, [r3, #12] } #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum); 80030e4: 683b ldr r3, [r7, #0] 80030e6: b2db uxtb r3, r3 80030e8: 4619 mov r1, r3 80030ea: 6878 ldr r0, [r7, #4] 80030ec: f005 ff10 bl 8008f10 80030f0: e046 b.n 8003180 /* ... */ } } else { if (gSNPSiD == USB_OTG_CORE_ID_310A) 80030f2: 697b ldr r3, [r7, #20] 80030f4: 4a26 ldr r2, [pc, #152] @ (8003190 ) 80030f6: 4293 cmp r3, r2 80030f8: d124 bne.n 8003144 { /* StupPktRcvd = 1 this is a setup packet */ if ((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX) 80030fa: 693b ldr r3, [r7, #16] 80030fc: f403 4300 and.w r3, r3, #32768 @ 0x8000 8003100: 2b00 cmp r3, #0 8003102: d00a beq.n 800311a { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX); 8003104: 683b ldr r3, [r7, #0] 8003106: 015a lsls r2, r3, #5 8003108: 69bb ldr r3, [r7, #24] 800310a: 4413 add r3, r2 800310c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8003110: 461a mov r2, r3 8003112: f44f 4300 mov.w r3, #32768 @ 0x8000 8003116: 6093 str r3, [r2, #8] 8003118: e032 b.n 8003180 } else { if ((DoepintReg & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR) 800311a: 693b ldr r3, [r7, #16] 800311c: f003 0320 and.w r3, r3, #32 8003120: 2b00 cmp r3, #0 8003122: d008 beq.n 8003136 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR); 8003124: 683b ldr r3, [r7, #0] 8003126: 015a lsls r2, r3, #5 8003128: 69bb ldr r3, [r7, #24] 800312a: 4413 add r3, r2 800312c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8003130: 461a mov r2, r3 8003132: 2320 movs r3, #32 8003134: 6093 str r3, [r2, #8] } #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum); 8003136: 683b ldr r3, [r7, #0] 8003138: b2db uxtb r3, r3 800313a: 4619 mov r1, r3 800313c: 6878 ldr r0, [r7, #4] 800313e: f005 fee7 bl 8008f10 8003142: e01d b.n 8003180 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } } else { if ((epnum == 0U) && (hpcd->OUT_ep[epnum].xfer_len == 0U)) 8003144: 683b ldr r3, [r7, #0] 8003146: 2b00 cmp r3, #0 8003148: d114 bne.n 8003174 800314a: 6879 ldr r1, [r7, #4] 800314c: 683a ldr r2, [r7, #0] 800314e: 4613 mov r3, r2 8003150: 00db lsls r3, r3, #3 8003152: 4413 add r3, r2 8003154: 009b lsls r3, r3, #2 8003156: 440b add r3, r1 8003158: f503 7319 add.w r3, r3, #612 @ 0x264 800315c: 681b ldr r3, [r3, #0] 800315e: 2b00 cmp r3, #0 8003160: d108 bne.n 8003174 { /* this is ZLP, so prepare EP0 for next setup */ (void)USB_EP0_OutStart(hpcd->Instance, 0U, (uint8_t *)hpcd->Setup); 8003162: 687b ldr r3, [r7, #4] 8003164: 6818 ldr r0, [r3, #0] 8003166: 687b ldr r3, [r7, #4] 8003168: f203 439c addw r3, r3, #1180 @ 0x49c 800316c: 461a mov r2, r3 800316e: 2100 movs r1, #0 8003170: f003 fede bl 8006f30 } #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum); 8003174: 683b ldr r3, [r7, #0] 8003176: b2db uxtb r3, r3 8003178: 4619 mov r1, r3 800317a: 6878 ldr r0, [r7, #4] 800317c: f005 fec8 bl 8008f10 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } } return HAL_OK; 8003180: 2300 movs r3, #0 } 8003182: 4618 mov r0, r3 8003184: 3720 adds r7, #32 8003186: 46bd mov sp, r7 8003188: bd80 pop {r7, pc} 800318a: bf00 nop 800318c: 4f54300a .word 0x4f54300a 8003190: 4f54310a .word 0x4f54310a 08003194 : * @param hpcd PCD handle * @param epnum endpoint number * @retval HAL status */ static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint32_t epnum) { 8003194: b580 push {r7, lr} 8003196: b086 sub sp, #24 8003198: af00 add r7, sp, #0 800319a: 6078 str r0, [r7, #4] 800319c: 6039 str r1, [r7, #0] const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 800319e: 687b ldr r3, [r7, #4] 80031a0: 681b ldr r3, [r3, #0] 80031a2: 617b str r3, [r7, #20] uint32_t USBx_BASE = (uint32_t)USBx; 80031a4: 697b ldr r3, [r7, #20] 80031a6: 613b str r3, [r7, #16] uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U); 80031a8: 697b ldr r3, [r7, #20] 80031aa: 333c adds r3, #60 @ 0x3c 80031ac: 3304 adds r3, #4 80031ae: 681b ldr r3, [r3, #0] 80031b0: 60fb str r3, [r7, #12] uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT; 80031b2: 683b ldr r3, [r7, #0] 80031b4: 015a lsls r2, r3, #5 80031b6: 693b ldr r3, [r7, #16] 80031b8: 4413 add r3, r2 80031ba: f503 6330 add.w r3, r3, #2816 @ 0xb00 80031be: 689b ldr r3, [r3, #8] 80031c0: 60bb str r3, [r7, #8] if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 80031c2: 68fb ldr r3, [r7, #12] 80031c4: 4a15 ldr r2, [pc, #84] @ (800321c ) 80031c6: 4293 cmp r3, r2 80031c8: d90e bls.n 80031e8 ((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX)) 80031ca: 68bb ldr r3, [r7, #8] 80031cc: f403 4300 and.w r3, r3, #32768 @ 0x8000 if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 80031d0: 2b00 cmp r3, #0 80031d2: d009 beq.n 80031e8 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX); 80031d4: 683b ldr r3, [r7, #0] 80031d6: 015a lsls r2, r3, #5 80031d8: 693b ldr r3, [r7, #16] 80031da: 4413 add r3, r2 80031dc: f503 6330 add.w r3, r3, #2816 @ 0xb00 80031e0: 461a mov r2, r3 80031e2: f44f 4300 mov.w r3, #32768 @ 0x8000 80031e6: 6093 str r3, [r2, #8] /* Inform the upper layer that a setup packet is available */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SetupStageCallback(hpcd); #else HAL_PCD_SetupStageCallback(hpcd); 80031e8: 6878 ldr r0, [r7, #4] 80031ea: f005 fe7f bl 8008eec #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((gSNPSiD > USB_OTG_CORE_ID_300A) && (hpcd->Init.dma_enable == 1U)) 80031ee: 68fb ldr r3, [r7, #12] 80031f0: 4a0a ldr r2, [pc, #40] @ (800321c ) 80031f2: 4293 cmp r3, r2 80031f4: d90c bls.n 8003210 80031f6: 687b ldr r3, [r7, #4] 80031f8: 799b ldrb r3, [r3, #6] 80031fa: 2b01 cmp r3, #1 80031fc: d108 bne.n 8003210 { (void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup); 80031fe: 687b ldr r3, [r7, #4] 8003200: 6818 ldr r0, [r3, #0] 8003202: 687b ldr r3, [r7, #4] 8003204: f203 439c addw r3, r3, #1180 @ 0x49c 8003208: 461a mov r2, r3 800320a: 2101 movs r1, #1 800320c: f003 fe90 bl 8006f30 } return HAL_OK; 8003210: 2300 movs r3, #0 } 8003212: 4618 mov r0, r3 8003214: 3718 adds r7, #24 8003216: 46bd mov sp, r7 8003218: bd80 pop {r7, pc} 800321a: bf00 nop 800321c: 4f54300a .word 0x4f54300a 08003220 : * @param fifo The number of Tx fifo * @param size Fifo size * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size) { 8003220: b480 push {r7} 8003222: b085 sub sp, #20 8003224: af00 add r7, sp, #0 8003226: 6078 str r0, [r7, #4] 8003228: 460b mov r3, r1 800322a: 70fb strb r3, [r7, #3] 800322c: 4613 mov r3, r2 800322e: 803b strh r3, [r7, #0] --> Txn should be configured with the minimum space of 16 words The FIFO is used optimally when used TxFIFOs are allocated in the top of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones. When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */ Tx_Offset = hpcd->Instance->GRXFSIZ; 8003230: 687b ldr r3, [r7, #4] 8003232: 681b ldr r3, [r3, #0] 8003234: 6a5b ldr r3, [r3, #36] @ 0x24 8003236: 60bb str r3, [r7, #8] if (fifo == 0U) 8003238: 78fb ldrb r3, [r7, #3] 800323a: 2b00 cmp r3, #0 800323c: d107 bne.n 800324e { hpcd->Instance->DIEPTXF0_HNPTXFSIZ = ((uint32_t)size << 16) | Tx_Offset; 800323e: 883b ldrh r3, [r7, #0] 8003240: 0419 lsls r1, r3, #16 8003242: 687b ldr r3, [r7, #4] 8003244: 681b ldr r3, [r3, #0] 8003246: 68ba ldr r2, [r7, #8] 8003248: 430a orrs r2, r1 800324a: 629a str r2, [r3, #40] @ 0x28 800324c: e028 b.n 80032a0 } else { Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16; 800324e: 687b ldr r3, [r7, #4] 8003250: 681b ldr r3, [r3, #0] 8003252: 6a9b ldr r3, [r3, #40] @ 0x28 8003254: 0c1b lsrs r3, r3, #16 8003256: 68ba ldr r2, [r7, #8] 8003258: 4413 add r3, r2 800325a: 60bb str r3, [r7, #8] for (i = 0U; i < (fifo - 1U); i++) 800325c: 2300 movs r3, #0 800325e: 73fb strb r3, [r7, #15] 8003260: e00d b.n 800327e { Tx_Offset += (hpcd->Instance->DIEPTXF[i] >> 16); 8003262: 687b ldr r3, [r7, #4] 8003264: 681a ldr r2, [r3, #0] 8003266: 7bfb ldrb r3, [r7, #15] 8003268: 3340 adds r3, #64 @ 0x40 800326a: 009b lsls r3, r3, #2 800326c: 4413 add r3, r2 800326e: 685b ldr r3, [r3, #4] 8003270: 0c1b lsrs r3, r3, #16 8003272: 68ba ldr r2, [r7, #8] 8003274: 4413 add r3, r2 8003276: 60bb str r3, [r7, #8] for (i = 0U; i < (fifo - 1U); i++) 8003278: 7bfb ldrb r3, [r7, #15] 800327a: 3301 adds r3, #1 800327c: 73fb strb r3, [r7, #15] 800327e: 7bfa ldrb r2, [r7, #15] 8003280: 78fb ldrb r3, [r7, #3] 8003282: 3b01 subs r3, #1 8003284: 429a cmp r2, r3 8003286: d3ec bcc.n 8003262 } /* Multiply Tx_Size by 2 to get higher performance */ hpcd->Instance->DIEPTXF[fifo - 1U] = ((uint32_t)size << 16) | Tx_Offset; 8003288: 883b ldrh r3, [r7, #0] 800328a: 0418 lsls r0, r3, #16 800328c: 687b ldr r3, [r7, #4] 800328e: 6819 ldr r1, [r3, #0] 8003290: 78fb ldrb r3, [r7, #3] 8003292: 3b01 subs r3, #1 8003294: 68ba ldr r2, [r7, #8] 8003296: 4302 orrs r2, r0 8003298: 3340 adds r3, #64 @ 0x40 800329a: 009b lsls r3, r3, #2 800329c: 440b add r3, r1 800329e: 605a str r2, [r3, #4] } return HAL_OK; 80032a0: 2300 movs r3, #0 } 80032a2: 4618 mov r0, r3 80032a4: 3714 adds r7, #20 80032a6: 46bd mov sp, r7 80032a8: f85d 7b04 ldr.w r7, [sp], #4 80032ac: 4770 bx lr 080032ae : * @param hpcd PCD handle * @param size Size of Rx fifo * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size) { 80032ae: b480 push {r7} 80032b0: b083 sub sp, #12 80032b2: af00 add r7, sp, #0 80032b4: 6078 str r0, [r7, #4] 80032b6: 460b mov r3, r1 80032b8: 807b strh r3, [r7, #2] hpcd->Instance->GRXFSIZ = size; 80032ba: 687b ldr r3, [r7, #4] 80032bc: 681b ldr r3, [r3, #0] 80032be: 887a ldrh r2, [r7, #2] 80032c0: 625a str r2, [r3, #36] @ 0x24 return HAL_OK; 80032c2: 2300 movs r3, #0 } 80032c4: 4618 mov r0, r3 80032c6: 370c adds r7, #12 80032c8: 46bd mov sp, r7 80032ca: f85d 7b04 ldr.w r7, [sp], #4 80032ce: 4770 bx lr 080032d0 : * @brief Activate LPM feature. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) { 80032d0: b480 push {r7} 80032d2: b085 sub sp, #20 80032d4: af00 add r7, sp, #0 80032d6: 6078 str r0, [r7, #4] USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 80032d8: 687b ldr r3, [r7, #4] 80032da: 681b ldr r3, [r3, #0] 80032dc: 60fb str r3, [r7, #12] hpcd->lpm_active = 1U; 80032de: 687b ldr r3, [r7, #4] 80032e0: 2201 movs r2, #1 80032e2: f8c3 24d8 str.w r2, [r3, #1240] @ 0x4d8 hpcd->LPM_State = LPM_L0; 80032e6: 687b ldr r3, [r7, #4] 80032e8: 2200 movs r2, #0 80032ea: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM; 80032ee: 68fb ldr r3, [r7, #12] 80032f0: 699b ldr r3, [r3, #24] 80032f2: f043 6200 orr.w r2, r3, #134217728 @ 0x8000000 80032f6: 68fb ldr r3, [r7, #12] 80032f8: 619a str r2, [r3, #24] USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); 80032fa: 68fb ldr r3, [r7, #12] 80032fc: 6d5b ldr r3, [r3, #84] @ 0x54 80032fe: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8003302: f043 0303 orr.w r3, r3, #3 8003306: 68fa ldr r2, [r7, #12] 8003308: 6553 str r3, [r2, #84] @ 0x54 return HAL_OK; 800330a: 2300 movs r3, #0 } 800330c: 4618 mov r0, r3 800330e: 3714 adds r7, #20 8003310: 46bd mov sp, r7 8003312: f85d 7b04 ldr.w r7, [sp], #4 8003316: 4770 bx lr 08003318 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8003318: b580 push {r7, lr} 800331a: b084 sub sp, #16 800331c: af00 add r7, sp, #0 800331e: 6078 str r0, [r7, #4] 8003320: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 8003322: 687b ldr r3, [r7, #4] 8003324: 2b00 cmp r3, #0 8003326: d101 bne.n 800332c { return HAL_ERROR; 8003328: 2301 movs r3, #1 800332a: e0cc b.n 80034c6 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 800332c: 4b68 ldr r3, [pc, #416] @ (80034d0 ) 800332e: 681b ldr r3, [r3, #0] 8003330: f003 030f and.w r3, r3, #15 8003334: 683a ldr r2, [r7, #0] 8003336: 429a cmp r2, r3 8003338: d90c bls.n 8003354 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 800333a: 4b65 ldr r3, [pc, #404] @ (80034d0 ) 800333c: 683a ldr r2, [r7, #0] 800333e: b2d2 uxtb r2, r2 8003340: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8003342: 4b63 ldr r3, [pc, #396] @ (80034d0 ) 8003344: 681b ldr r3, [r3, #0] 8003346: f003 030f and.w r3, r3, #15 800334a: 683a ldr r2, [r7, #0] 800334c: 429a cmp r2, r3 800334e: d001 beq.n 8003354 { return HAL_ERROR; 8003350: 2301 movs r3, #1 8003352: e0b8 b.n 80034c6 } } /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8003354: 687b ldr r3, [r7, #4] 8003356: 681b ldr r3, [r3, #0] 8003358: f003 0302 and.w r3, r3, #2 800335c: 2b00 cmp r3, #0 800335e: d020 beq.n 80033a2 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8003360: 687b ldr r3, [r7, #4] 8003362: 681b ldr r3, [r3, #0] 8003364: f003 0304 and.w r3, r3, #4 8003368: 2b00 cmp r3, #0 800336a: d005 beq.n 8003378 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 800336c: 4b59 ldr r3, [pc, #356] @ (80034d4 ) 800336e: 689b ldr r3, [r3, #8] 8003370: 4a58 ldr r2, [pc, #352] @ (80034d4 ) 8003372: f443 53e0 orr.w r3, r3, #7168 @ 0x1c00 8003376: 6093 str r3, [r2, #8] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8003378: 687b ldr r3, [r7, #4] 800337a: 681b ldr r3, [r3, #0] 800337c: f003 0308 and.w r3, r3, #8 8003380: 2b00 cmp r3, #0 8003382: d005 beq.n 8003390 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8003384: 4b53 ldr r3, [pc, #332] @ (80034d4 ) 8003386: 689b ldr r3, [r3, #8] 8003388: 4a52 ldr r2, [pc, #328] @ (80034d4 ) 800338a: f443 4360 orr.w r3, r3, #57344 @ 0xe000 800338e: 6093 str r3, [r2, #8] } assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8003390: 4b50 ldr r3, [pc, #320] @ (80034d4 ) 8003392: 689b ldr r3, [r3, #8] 8003394: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8003398: 687b ldr r3, [r7, #4] 800339a: 689b ldr r3, [r3, #8] 800339c: 494d ldr r1, [pc, #308] @ (80034d4 ) 800339e: 4313 orrs r3, r2 80033a0: 608b str r3, [r1, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 80033a2: 687b ldr r3, [r7, #4] 80033a4: 681b ldr r3, [r3, #0] 80033a6: f003 0301 and.w r3, r3, #1 80033aa: 2b00 cmp r3, #0 80033ac: d044 beq.n 8003438 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 80033ae: 687b ldr r3, [r7, #4] 80033b0: 685b ldr r3, [r3, #4] 80033b2: 2b01 cmp r3, #1 80033b4: d107 bne.n 80033c6 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80033b6: 4b47 ldr r3, [pc, #284] @ (80034d4 ) 80033b8: 681b ldr r3, [r3, #0] 80033ba: f403 3300 and.w r3, r3, #131072 @ 0x20000 80033be: 2b00 cmp r3, #0 80033c0: d119 bne.n 80033f6 { return HAL_ERROR; 80033c2: 2301 movs r3, #1 80033c4: e07f b.n 80034c6 } } /* PLL is selected as System Clock Source */ else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || 80033c6: 687b ldr r3, [r7, #4] 80033c8: 685b ldr r3, [r3, #4] 80033ca: 2b02 cmp r3, #2 80033cc: d003 beq.n 80033d6 (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 80033ce: 687b ldr r3, [r7, #4] 80033d0: 685b ldr r3, [r3, #4] else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || 80033d2: 2b03 cmp r3, #3 80033d4: d107 bne.n 80033e6 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80033d6: 4b3f ldr r3, [pc, #252] @ (80034d4 ) 80033d8: 681b ldr r3, [r3, #0] 80033da: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80033de: 2b00 cmp r3, #0 80033e0: d109 bne.n 80033f6 { return HAL_ERROR; 80033e2: 2301 movs r3, #1 80033e4: e06f b.n 80034c6 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80033e6: 4b3b ldr r3, [pc, #236] @ (80034d4 ) 80033e8: 681b ldr r3, [r3, #0] 80033ea: f003 0302 and.w r3, r3, #2 80033ee: 2b00 cmp r3, #0 80033f0: d101 bne.n 80033f6 { return HAL_ERROR; 80033f2: 2301 movs r3, #1 80033f4: e067 b.n 80034c6 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 80033f6: 4b37 ldr r3, [pc, #220] @ (80034d4 ) 80033f8: 689b ldr r3, [r3, #8] 80033fa: f023 0203 bic.w r2, r3, #3 80033fe: 687b ldr r3, [r7, #4] 8003400: 685b ldr r3, [r3, #4] 8003402: 4934 ldr r1, [pc, #208] @ (80034d4 ) 8003404: 4313 orrs r3, r2 8003406: 608b str r3, [r1, #8] /* Get Start Tick */ tickstart = HAL_GetTick(); 8003408: f7fe f82e bl 8001468 800340c: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 800340e: e00a b.n 8003426 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8003410: f7fe f82a bl 8001468 8003414: 4602 mov r2, r0 8003416: 68fb ldr r3, [r7, #12] 8003418: 1ad3 subs r3, r2, r3 800341a: f241 3288 movw r2, #5000 @ 0x1388 800341e: 4293 cmp r3, r2 8003420: d901 bls.n 8003426 { return HAL_TIMEOUT; 8003422: 2303 movs r3, #3 8003424: e04f b.n 80034c6 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8003426: 4b2b ldr r3, [pc, #172] @ (80034d4 ) 8003428: 689b ldr r3, [r3, #8] 800342a: f003 020c and.w r2, r3, #12 800342e: 687b ldr r3, [r7, #4] 8003430: 685b ldr r3, [r3, #4] 8003432: 009b lsls r3, r3, #2 8003434: 429a cmp r2, r3 8003436: d1eb bne.n 8003410 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 8003438: 4b25 ldr r3, [pc, #148] @ (80034d0 ) 800343a: 681b ldr r3, [r3, #0] 800343c: f003 030f and.w r3, r3, #15 8003440: 683a ldr r2, [r7, #0] 8003442: 429a cmp r2, r3 8003444: d20c bcs.n 8003460 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8003446: 4b22 ldr r3, [pc, #136] @ (80034d0 ) 8003448: 683a ldr r2, [r7, #0] 800344a: b2d2 uxtb r2, r2 800344c: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 800344e: 4b20 ldr r3, [pc, #128] @ (80034d0 ) 8003450: 681b ldr r3, [r3, #0] 8003452: f003 030f and.w r3, r3, #15 8003456: 683a ldr r2, [r7, #0] 8003458: 429a cmp r2, r3 800345a: d001 beq.n 8003460 { return HAL_ERROR; 800345c: 2301 movs r3, #1 800345e: e032 b.n 80034c6 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8003460: 687b ldr r3, [r7, #4] 8003462: 681b ldr r3, [r3, #0] 8003464: f003 0304 and.w r3, r3, #4 8003468: 2b00 cmp r3, #0 800346a: d008 beq.n 800347e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 800346c: 4b19 ldr r3, [pc, #100] @ (80034d4 ) 800346e: 689b ldr r3, [r3, #8] 8003470: f423 52e0 bic.w r2, r3, #7168 @ 0x1c00 8003474: 687b ldr r3, [r7, #4] 8003476: 68db ldr r3, [r3, #12] 8003478: 4916 ldr r1, [pc, #88] @ (80034d4 ) 800347a: 4313 orrs r3, r2 800347c: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 800347e: 687b ldr r3, [r7, #4] 8003480: 681b ldr r3, [r3, #0] 8003482: f003 0308 and.w r3, r3, #8 8003486: 2b00 cmp r3, #0 8003488: d009 beq.n 800349e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 800348a: 4b12 ldr r3, [pc, #72] @ (80034d4 ) 800348c: 689b ldr r3, [r3, #8] 800348e: f423 4260 bic.w r2, r3, #57344 @ 0xe000 8003492: 687b ldr r3, [r7, #4] 8003494: 691b ldr r3, [r3, #16] 8003496: 00db lsls r3, r3, #3 8003498: 490e ldr r1, [pc, #56] @ (80034d4 ) 800349a: 4313 orrs r3, r2 800349c: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 800349e: f000 fb7f bl 8003ba0 80034a2: 4602 mov r2, r0 80034a4: 4b0b ldr r3, [pc, #44] @ (80034d4 ) 80034a6: 689b ldr r3, [r3, #8] 80034a8: 091b lsrs r3, r3, #4 80034aa: f003 030f and.w r3, r3, #15 80034ae: 490a ldr r1, [pc, #40] @ (80034d8 ) 80034b0: 5ccb ldrb r3, [r1, r3] 80034b2: fa22 f303 lsr.w r3, r2, r3 80034b6: 4a09 ldr r2, [pc, #36] @ (80034dc ) 80034b8: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings */ HAL_InitTick(uwTickPrio); 80034ba: 4b09 ldr r3, [pc, #36] @ (80034e0 ) 80034bc: 681b ldr r3, [r3, #0] 80034be: 4618 mov r0, r3 80034c0: f7fd ff8e bl 80013e0 return HAL_OK; 80034c4: 2300 movs r3, #0 } 80034c6: 4618 mov r0, r3 80034c8: 3710 adds r7, #16 80034ca: 46bd mov sp, r7 80034cc: bd80 pop {r7, pc} 80034ce: bf00 nop 80034d0: 40023c00 .word 0x40023c00 80034d4: 40023800 .word 0x40023800 80034d8: 08009590 .word 0x08009590 80034dc: 20000024 .word 0x20000024 80034e0: 20000028 .word 0x20000028 080034e4 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 80034e4: b480 push {r7} 80034e6: af00 add r7, sp, #0 return SystemCoreClock; 80034e8: 4b03 ldr r3, [pc, #12] @ (80034f8 ) 80034ea: 681b ldr r3, [r3, #0] } 80034ec: 4618 mov r0, r3 80034ee: 46bd mov sp, r7 80034f0: f85d 7b04 ldr.w r7, [sp], #4 80034f4: 4770 bx lr 80034f6: bf00 nop 80034f8: 20000024 .word 0x20000024 080034fc : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 80034fc: b580 push {r7, lr} 80034fe: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8003500: f7ff fff0 bl 80034e4 8003504: 4602 mov r2, r0 8003506: 4b05 ldr r3, [pc, #20] @ (800351c ) 8003508: 689b ldr r3, [r3, #8] 800350a: 0a9b lsrs r3, r3, #10 800350c: f003 0307 and.w r3, r3, #7 8003510: 4903 ldr r1, [pc, #12] @ (8003520 ) 8003512: 5ccb ldrb r3, [r1, r3] 8003514: fa22 f303 lsr.w r3, r2, r3 } 8003518: 4618 mov r0, r3 800351a: bd80 pop {r7, pc} 800351c: 40023800 .word 0x40023800 8003520: 080095a0 .word 0x080095a0 08003524 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 8003524: b580 push {r7, lr} 8003526: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8003528: f7ff ffdc bl 80034e4 800352c: 4602 mov r2, r0 800352e: 4b05 ldr r3, [pc, #20] @ (8003544 ) 8003530: 689b ldr r3, [r3, #8] 8003532: 0b5b lsrs r3, r3, #13 8003534: f003 0307 and.w r3, r3, #7 8003538: 4903 ldr r1, [pc, #12] @ (8003548 ) 800353a: 5ccb ldrb r3, [r1, r3] 800353c: fa22 f303 lsr.w r3, r2, r3 } 8003540: 4618 mov r0, r3 8003542: bd80 pop {r7, pc} 8003544: 40023800 .word 0x40023800 8003548: 080095a0 .word 0x080095a0 0800354c : * the backup registers) and RCC_BDCR register are set to their reset values. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 800354c: b580 push {r7, lr} 800354e: b08c sub sp, #48 @ 0x30 8003550: af00 add r7, sp, #0 8003552: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8003554: 2300 movs r3, #0 8003556: 627b str r3, [r7, #36] @ 0x24 uint32_t tmpreg1 = 0U; 8003558: 2300 movs r3, #0 800355a: 623b str r3, [r7, #32] uint32_t plli2sp = 0U; 800355c: 2300 movs r3, #0 800355e: 61fb str r3, [r7, #28] uint32_t plli2sq = 0U; 8003560: 2300 movs r3, #0 8003562: 61bb str r3, [r7, #24] uint32_t plli2sr = 0U; 8003564: 2300 movs r3, #0 8003566: 617b str r3, [r7, #20] uint32_t pllsaip = 0U; 8003568: 2300 movs r3, #0 800356a: 613b str r3, [r7, #16] uint32_t pllsaiq = 0U; 800356c: 2300 movs r3, #0 800356e: 60fb str r3, [r7, #12] uint32_t plli2sused = 0U; 8003570: 2300 movs r3, #0 8003572: 62fb str r3, [r7, #44] @ 0x2c uint32_t pllsaiused = 0U; 8003574: 2300 movs r3, #0 8003576: 62bb str r3, [r7, #40] @ 0x28 /* Check the peripheral clock selection parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------ I2S APB1 configuration --------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == (RCC_PERIPHCLK_I2S_APB1)) 8003578: 687b ldr r3, [r7, #4] 800357a: 681b ldr r3, [r3, #0] 800357c: f003 0301 and.w r3, r3, #1 8003580: 2b00 cmp r3, #0 8003582: d010 beq.n 80035a6 { /* Check the parameters */ assert_param(IS_RCC_I2SAPB1CLKSOURCE(PeriphClkInit->I2sApb1ClockSelection)); /* Configure I2S Clock source */ __HAL_RCC_I2S_APB1_CONFIG(PeriphClkInit->I2sApb1ClockSelection); 8003584: 4b6f ldr r3, [pc, #444] @ (8003744 ) 8003586: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 800358a: f023 62c0 bic.w r2, r3, #100663296 @ 0x6000000 800358e: 687b ldr r3, [r7, #4] 8003590: 6b9b ldr r3, [r3, #56] @ 0x38 8003592: 496c ldr r1, [pc, #432] @ (8003744 ) 8003594: 4313 orrs r3, r2 8003596: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for I2S */ if (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S) 800359a: 687b ldr r3, [r7, #4] 800359c: 6b9b ldr r3, [r3, #56] @ 0x38 800359e: 2b00 cmp r3, #0 80035a0: d101 bne.n 80035a6 { plli2sused = 1U; 80035a2: 2301 movs r3, #1 80035a4: 62fb str r3, [r7, #44] @ 0x2c } } /*--------------------------------------------------------------------------*/ /*---------------------------- I2S APB2 configuration ----------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == (RCC_PERIPHCLK_I2S_APB2)) 80035a6: 687b ldr r3, [r7, #4] 80035a8: 681b ldr r3, [r3, #0] 80035aa: f003 0302 and.w r3, r3, #2 80035ae: 2b00 cmp r3, #0 80035b0: d010 beq.n 80035d4 { /* Check the parameters */ assert_param(IS_RCC_I2SAPB2CLKSOURCE(PeriphClkInit->I2sApb2ClockSelection)); /* Configure I2S Clock source */ __HAL_RCC_I2S_APB2_CONFIG(PeriphClkInit->I2sApb2ClockSelection); 80035b2: 4b64 ldr r3, [pc, #400] @ (8003744 ) 80035b4: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 80035b8: f023 52c0 bic.w r2, r3, #402653184 @ 0x18000000 80035bc: 687b ldr r3, [r7, #4] 80035be: 6bdb ldr r3, [r3, #60] @ 0x3c 80035c0: 4960 ldr r1, [pc, #384] @ (8003744 ) 80035c2: 4313 orrs r3, r2 80035c4: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for I2S */ if (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S) 80035c8: 687b ldr r3, [r7, #4] 80035ca: 6bdb ldr r3, [r3, #60] @ 0x3c 80035cc: 2b00 cmp r3, #0 80035ce: d101 bne.n 80035d4 { plli2sused = 1U; 80035d0: 2301 movs r3, #1 80035d2: 62fb str r3, [r7, #44] @ 0x2c } } /*--------------------------------------------------------------------------*/ /*--------------------------- SAI1 configuration ---------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1)) 80035d4: 687b ldr r3, [r7, #4] 80035d6: 681b ldr r3, [r3, #0] 80035d8: f003 0304 and.w r3, r3, #4 80035dc: 2b00 cmp r3, #0 80035de: d017 beq.n 8003610 { /* Check the parameters */ assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection)); /* Configure SAI1 Clock source */ __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); 80035e0: 4b58 ldr r3, [pc, #352] @ (8003744 ) 80035e2: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 80035e6: f423 1240 bic.w r2, r3, #3145728 @ 0x300000 80035ea: 687b ldr r3, [r7, #4] 80035ec: 6b1b ldr r3, [r3, #48] @ 0x30 80035ee: 4955 ldr r1, [pc, #340] @ (8003744 ) 80035f0: 4313 orrs r3, r2 80035f2: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for SAI */ if (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S) 80035f6: 687b ldr r3, [r7, #4] 80035f8: 6b1b ldr r3, [r3, #48] @ 0x30 80035fa: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 80035fe: d101 bne.n 8003604 { plli2sused = 1U; 8003600: 2301 movs r3, #1 8003602: 62fb str r3, [r7, #44] @ 0x2c } /* Enable the PLLSAI when it's used as clock source for SAI */ if (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI) 8003604: 687b ldr r3, [r7, #4] 8003606: 6b1b ldr r3, [r3, #48] @ 0x30 8003608: 2b00 cmp r3, #0 800360a: d101 bne.n 8003610 { pllsaiused = 1U; 800360c: 2301 movs r3, #1 800360e: 62bb str r3, [r7, #40] @ 0x28 } } /*--------------------------------------------------------------------------*/ /*-------------------------- SAI2 configuration ----------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2)) 8003610: 687b ldr r3, [r7, #4] 8003612: 681b ldr r3, [r3, #0] 8003614: f003 0308 and.w r3, r3, #8 8003618: 2b00 cmp r3, #0 800361a: d017 beq.n 800364c { /* Check the parameters */ assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection)); /* Configure SAI2 Clock source */ __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection); 800361c: 4b49 ldr r3, [pc, #292] @ (8003744 ) 800361e: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8003622: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000 8003626: 687b ldr r3, [r7, #4] 8003628: 6b5b ldr r3, [r3, #52] @ 0x34 800362a: 4946 ldr r1, [pc, #280] @ (8003744 ) 800362c: 4313 orrs r3, r2 800362e: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for SAI */ if (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S) 8003632: 687b ldr r3, [r7, #4] 8003634: 6b5b ldr r3, [r3, #52] @ 0x34 8003636: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 800363a: d101 bne.n 8003640 { plli2sused = 1U; 800363c: 2301 movs r3, #1 800363e: 62fb str r3, [r7, #44] @ 0x2c } /* Enable the PLLSAI when it's used as clock source for SAI */ if (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI) 8003640: 687b ldr r3, [r7, #4] 8003642: 6b5b ldr r3, [r3, #52] @ 0x34 8003644: 2b00 cmp r3, #0 8003646: d101 bne.n 800364c { pllsaiused = 1U; 8003648: 2301 movs r3, #1 800364a: 62bb str r3, [r7, #40] @ 0x28 } } /*--------------------------------------------------------------------------*/ /*----------------------------- RTC configuration --------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) 800364c: 687b ldr r3, [r7, #4] 800364e: 681b ldr r3, [r3, #0] 8003650: f003 0320 and.w r3, r3, #32 8003654: 2b00 cmp r3, #0 8003656: f000 808a beq.w 800376e { /* Check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* Enable Power Clock*/ __HAL_RCC_PWR_CLK_ENABLE(); 800365a: 2300 movs r3, #0 800365c: 60bb str r3, [r7, #8] 800365e: 4b39 ldr r3, [pc, #228] @ (8003744 ) 8003660: 6c1b ldr r3, [r3, #64] @ 0x40 8003662: 4a38 ldr r2, [pc, #224] @ (8003744 ) 8003664: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8003668: 6413 str r3, [r2, #64] @ 0x40 800366a: 4b36 ldr r3, [pc, #216] @ (8003744 ) 800366c: 6c1b ldr r3, [r3, #64] @ 0x40 800366e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003672: 60bb str r3, [r7, #8] 8003674: 68bb ldr r3, [r7, #8] /* Enable write access to Backup domain */ PWR->CR |= PWR_CR_DBP; 8003676: 4b34 ldr r3, [pc, #208] @ (8003748 ) 8003678: 681b ldr r3, [r3, #0] 800367a: 4a33 ldr r2, [pc, #204] @ (8003748 ) 800367c: f443 7380 orr.w r3, r3, #256 @ 0x100 8003680: 6013 str r3, [r2, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003682: f7fd fef1 bl 8001468 8003686: 6278 str r0, [r7, #36] @ 0x24 while ((PWR->CR & PWR_CR_DBP) == RESET) 8003688: e008 b.n 800369c { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 800368a: f7fd feed bl 8001468 800368e: 4602 mov r2, r0 8003690: 6a7b ldr r3, [r7, #36] @ 0x24 8003692: 1ad3 subs r3, r2, r3 8003694: 2b02 cmp r3, #2 8003696: d901 bls.n 800369c { return HAL_TIMEOUT; 8003698: 2303 movs r3, #3 800369a: e278 b.n 8003b8e while ((PWR->CR & PWR_CR_DBP) == RESET) 800369c: 4b2a ldr r3, [pc, #168] @ (8003748 ) 800369e: 681b ldr r3, [r3, #0] 80036a0: f403 7380 and.w r3, r3, #256 @ 0x100 80036a4: 2b00 cmp r3, #0 80036a6: d0f0 beq.n 800368a } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL); 80036a8: 4b26 ldr r3, [pc, #152] @ (8003744 ) 80036aa: 6f1b ldr r3, [r3, #112] @ 0x70 80036ac: f403 7340 and.w r3, r3, #768 @ 0x300 80036b0: 623b str r3, [r7, #32] if ((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 80036b2: 6a3b ldr r3, [r7, #32] 80036b4: 2b00 cmp r3, #0 80036b6: d02f beq.n 8003718 80036b8: 687b ldr r3, [r7, #4] 80036ba: 6c1b ldr r3, [r3, #64] @ 0x40 80036bc: f403 7340 and.w r3, r3, #768 @ 0x300 80036c0: 6a3a ldr r2, [r7, #32] 80036c2: 429a cmp r2, r3 80036c4: d028 beq.n 8003718 { /* Store the content of BDCR register before the reset of Backup Domain */ tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 80036c6: 4b1f ldr r3, [pc, #124] @ (8003744 ) 80036c8: 6f1b ldr r3, [r3, #112] @ 0x70 80036ca: f423 7340 bic.w r3, r3, #768 @ 0x300 80036ce: 623b str r3, [r7, #32] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 80036d0: 4b1e ldr r3, [pc, #120] @ (800374c ) 80036d2: 2201 movs r2, #1 80036d4: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 80036d6: 4b1d ldr r3, [pc, #116] @ (800374c ) 80036d8: 2200 movs r2, #0 80036da: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = tmpreg1; 80036dc: 4a19 ldr r2, [pc, #100] @ (8003744 ) 80036de: 6a3b ldr r3, [r7, #32] 80036e0: 6713 str r3, [r2, #112] @ 0x70 /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON)) 80036e2: 4b18 ldr r3, [pc, #96] @ (8003744 ) 80036e4: 6f1b ldr r3, [r3, #112] @ 0x70 80036e6: f003 0301 and.w r3, r3, #1 80036ea: 2b01 cmp r3, #1 80036ec: d114 bne.n 8003718 { /* Get tick */ tickstart = HAL_GetTick(); 80036ee: f7fd febb bl 8001468 80036f2: 6278 str r0, [r7, #36] @ 0x24 /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80036f4: e00a b.n 800370c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80036f6: f7fd feb7 bl 8001468 80036fa: 4602 mov r2, r0 80036fc: 6a7b ldr r3, [r7, #36] @ 0x24 80036fe: 1ad3 subs r3, r2, r3 8003700: f241 3288 movw r2, #5000 @ 0x1388 8003704: 4293 cmp r3, r2 8003706: d901 bls.n 800370c { return HAL_TIMEOUT; 8003708: 2303 movs r3, #3 800370a: e240 b.n 8003b8e while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 800370c: 4b0d ldr r3, [pc, #52] @ (8003744 ) 800370e: 6f1b ldr r3, [r3, #112] @ 0x70 8003710: f003 0302 and.w r3, r3, #2 8003714: 2b00 cmp r3, #0 8003716: d0ee beq.n 80036f6 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8003718: 687b ldr r3, [r7, #4] 800371a: 6c1b ldr r3, [r3, #64] @ 0x40 800371c: f403 7340 and.w r3, r3, #768 @ 0x300 8003720: f5b3 7f40 cmp.w r3, #768 @ 0x300 8003724: d114 bne.n 8003750 8003726: 4b07 ldr r3, [pc, #28] @ (8003744 ) 8003728: 689b ldr r3, [r3, #8] 800372a: f423 12f8 bic.w r2, r3, #2031616 @ 0x1f0000 800372e: 687b ldr r3, [r7, #4] 8003730: 6c1b ldr r3, [r3, #64] @ 0x40 8003732: f023 4370 bic.w r3, r3, #4026531840 @ 0xf0000000 8003736: f423 7340 bic.w r3, r3, #768 @ 0x300 800373a: 4902 ldr r1, [pc, #8] @ (8003744 ) 800373c: 4313 orrs r3, r2 800373e: 608b str r3, [r1, #8] 8003740: e00c b.n 800375c 8003742: bf00 nop 8003744: 40023800 .word 0x40023800 8003748: 40007000 .word 0x40007000 800374c: 42470e40 .word 0x42470e40 8003750: 4b4a ldr r3, [pc, #296] @ (800387c ) 8003752: 689b ldr r3, [r3, #8] 8003754: 4a49 ldr r2, [pc, #292] @ (800387c ) 8003756: f423 13f8 bic.w r3, r3, #2031616 @ 0x1f0000 800375a: 6093 str r3, [r2, #8] 800375c: 4b47 ldr r3, [pc, #284] @ (800387c ) 800375e: 6f1a ldr r2, [r3, #112] @ 0x70 8003760: 687b ldr r3, [r7, #4] 8003762: 6c1b ldr r3, [r3, #64] @ 0x40 8003764: f3c3 030b ubfx r3, r3, #0, #12 8003768: 4944 ldr r1, [pc, #272] @ (800387c ) 800376a: 4313 orrs r3, r2 800376c: 670b str r3, [r1, #112] @ 0x70 } /*--------------------------------------------------------------------------*/ /*---------------------------- TIM configuration ---------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM)) 800376e: 687b ldr r3, [r7, #4] 8003770: 681b ldr r3, [r3, #0] 8003772: f003 0310 and.w r3, r3, #16 8003776: 2b00 cmp r3, #0 8003778: d004 beq.n 8003784 { /* Configure Timer Prescaler */ __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection); 800377a: 687b ldr r3, [r7, #4] 800377c: f893 2058 ldrb.w r2, [r3, #88] @ 0x58 8003780: 4b3f ldr r3, [pc, #252] @ (8003880 ) 8003782: 601a str r2, [r3, #0] } /*--------------------------------------------------------------------------*/ /*---------------------------- FMPI2C1 Configuration -----------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMPI2C1) == RCC_PERIPHCLK_FMPI2C1) 8003784: 687b ldr r3, [r7, #4] 8003786: 681b ldr r3, [r3, #0] 8003788: f003 0380 and.w r3, r3, #128 @ 0x80 800378c: 2b00 cmp r3, #0 800378e: d00a beq.n 80037a6 { /* Check the parameters */ assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection)); /* Configure the FMPI2C1 clock source */ __HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection); 8003790: 4b3a ldr r3, [pc, #232] @ (800387c ) 8003792: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8003796: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000 800379a: 687b ldr r3, [r7, #4] 800379c: 6cdb ldr r3, [r3, #76] @ 0x4c 800379e: 4937 ldr r1, [pc, #220] @ (800387c ) 80037a0: 4313 orrs r3, r2 80037a2: f8c1 3094 str.w r3, [r1, #148] @ 0x94 } /*--------------------------------------------------------------------------*/ /*------------------------------ CEC Configuration -------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) 80037a6: 687b ldr r3, [r7, #4] 80037a8: 681b ldr r3, [r3, #0] 80037aa: f003 0340 and.w r3, r3, #64 @ 0x40 80037ae: 2b00 cmp r3, #0 80037b0: d00a beq.n 80037c8 { /* Check the parameters */ assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); /* Configure the CEC clock source */ __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); 80037b2: 4b32 ldr r3, [pc, #200] @ (800387c ) 80037b4: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 80037b8: f023 6280 bic.w r2, r3, #67108864 @ 0x4000000 80037bc: 687b ldr r3, [r7, #4] 80037be: 6c9b ldr r3, [r3, #72] @ 0x48 80037c0: 492e ldr r1, [pc, #184] @ (800387c ) 80037c2: 4313 orrs r3, r2 80037c4: f8c1 3094 str.w r3, [r1, #148] @ 0x94 } /*--------------------------------------------------------------------------*/ /*----------------------------- CLK48 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) 80037c8: 687b ldr r3, [r7, #4] 80037ca: 681b ldr r3, [r3, #0] 80037cc: f403 7380 and.w r3, r3, #256 @ 0x100 80037d0: 2b00 cmp r3, #0 80037d2: d011 beq.n 80037f8 { /* Check the parameters */ assert_param(IS_RCC_CLK48CLKSOURCE(PeriphClkInit->Clk48ClockSelection)); /* Configure the CLK48 clock source */ __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection); 80037d4: 4b29 ldr r3, [pc, #164] @ (800387c ) 80037d6: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 80037da: f023 6200 bic.w r2, r3, #134217728 @ 0x8000000 80037de: 687b ldr r3, [r7, #4] 80037e0: 6d5b ldr r3, [r3, #84] @ 0x54 80037e2: 4926 ldr r1, [pc, #152] @ (800387c ) 80037e4: 4313 orrs r3, r2 80037e6: f8c1 3094 str.w r3, [r1, #148] @ 0x94 /* Enable the PLLSAI when it's used as clock source for CLK48 */ if (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP) 80037ea: 687b ldr r3, [r7, #4] 80037ec: 6d5b ldr r3, [r3, #84] @ 0x54 80037ee: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 80037f2: d101 bne.n 80037f8 { pllsaiused = 1U; 80037f4: 2301 movs r3, #1 80037f6: 62bb str r3, [r7, #40] @ 0x28 } } /*--------------------------------------------------------------------------*/ /*----------------------------- SDIO Configuration -------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO) 80037f8: 687b ldr r3, [r7, #4] 80037fa: 681b ldr r3, [r3, #0] 80037fc: f403 7300 and.w r3, r3, #512 @ 0x200 8003800: 2b00 cmp r3, #0 8003802: d00a beq.n 800381a { /* Check the parameters */ assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection)); /* Configure the SDIO clock source */ __HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection); 8003804: 4b1d ldr r3, [pc, #116] @ (800387c ) 8003806: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 800380a: f023 5280 bic.w r2, r3, #268435456 @ 0x10000000 800380e: 687b ldr r3, [r7, #4] 8003810: 6c5b ldr r3, [r3, #68] @ 0x44 8003812: 491a ldr r1, [pc, #104] @ (800387c ) 8003814: 4313 orrs r3, r2 8003816: f8c1 3094 str.w r3, [r1, #148] @ 0x94 } /*--------------------------------------------------------------------------*/ /*------------------------------ SPDIFRX Configuration ---------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) 800381a: 687b ldr r3, [r7, #4] 800381c: 681b ldr r3, [r3, #0] 800381e: f403 6380 and.w r3, r3, #1024 @ 0x400 8003822: 2b00 cmp r3, #0 8003824: d011 beq.n 800384a { /* Check the parameters */ assert_param(IS_RCC_SPDIFRXCLKSOURCE(PeriphClkInit->SpdifClockSelection)); /* Configure the SPDIFRX clock source */ __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifClockSelection); 8003826: 4b15 ldr r3, [pc, #84] @ (800387c ) 8003828: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 800382c: f023 5200 bic.w r2, r3, #536870912 @ 0x20000000 8003830: 687b ldr r3, [r7, #4] 8003832: 6d1b ldr r3, [r3, #80] @ 0x50 8003834: 4911 ldr r1, [pc, #68] @ (800387c ) 8003836: 4313 orrs r3, r2 8003838: f8c1 3094 str.w r3, [r1, #148] @ 0x94 /* Enable the PLLI2S when it's used as clock source for SPDIFRX */ if (PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP) 800383c: 687b ldr r3, [r7, #4] 800383e: 6d1b ldr r3, [r3, #80] @ 0x50 8003840: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 8003844: d101 bne.n 800384a { plli2sused = 1U; 8003846: 2301 movs r3, #1 8003848: 62fb str r3, [r7, #44] @ 0x2c /*--------------------------------------------------------------------------*/ /*---------------------------- PLLI2S Configuration ------------------------*/ /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S on APB1, I2S on APB2 or SPDIFRX */ if ((plli2sused == 1U) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S)) 800384a: 6afb ldr r3, [r7, #44] @ 0x2c 800384c: 2b01 cmp r3, #1 800384e: d005 beq.n 800385c 8003850: 687b ldr r3, [r7, #4] 8003852: 681b ldr r3, [r3, #0] 8003854: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8003858: f040 80ff bne.w 8003a5a { /* Disable the PLLI2S */ __HAL_RCC_PLLI2S_DISABLE(); 800385c: 4b09 ldr r3, [pc, #36] @ (8003884 ) 800385e: 2200 movs r2, #0 8003860: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003862: f7fd fe01 bl 8001468 8003866: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLI2S is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) 8003868: e00e b.n 8003888 { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 800386a: f7fd fdfd bl 8001468 800386e: 4602 mov r2, r0 8003870: 6a7b ldr r3, [r7, #36] @ 0x24 8003872: 1ad3 subs r3, r2, r3 8003874: 2b02 cmp r3, #2 8003876: d907 bls.n 8003888 { /* return in case of Timeout detected */ return HAL_TIMEOUT; 8003878: 2303 movs r3, #3 800387a: e188 b.n 8003b8e 800387c: 40023800 .word 0x40023800 8003880: 424711e0 .word 0x424711e0 8003884: 42470068 .word 0x42470068 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) 8003888: 4b7e ldr r3, [pc, #504] @ (8003a84 ) 800388a: 681b ldr r3, [r3, #0] 800388c: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8003890: 2b00 cmp r3, #0 8003892: d1ea bne.n 800386a /* check for common PLLI2S Parameters */ assert_param(IS_RCC_PLLI2SM_VALUE(PeriphClkInit->PLLI2S.PLLI2SM)); assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN)); /*------ In Case of PLLI2S is selected as source clock for I2S -----------*/ if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == RCC_PERIPHCLK_I2S_APB1) 8003894: 687b ldr r3, [r7, #4] 8003896: 681b ldr r3, [r3, #0] 8003898: f003 0301 and.w r3, r3, #1 800389c: 2b00 cmp r3, #0 800389e: d003 beq.n 80038a8 && (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) || 80038a0: 687b ldr r3, [r7, #4] 80038a2: 6b9b ldr r3, [r3, #56] @ 0x38 80038a4: 2b00 cmp r3, #0 80038a6: d009 beq.n 80038bc ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S))) 80038a8: 687b ldr r3, [r7, #4] 80038aa: 681b ldr r3, [r3, #0] 80038ac: f003 0302 and.w r3, r3, #2 && (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) || 80038b0: 2b00 cmp r3, #0 80038b2: d028 beq.n 8003906 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S))) 80038b4: 687b ldr r3, [r7, #4] 80038b6: 6bdb ldr r3, [r3, #60] @ 0x3c 80038b8: 2b00 cmp r3, #0 80038ba: d124 bne.n 8003906 { /* check for Parameters */ assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); /* Read PLLI2SP/PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */ plli2sp = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U); 80038bc: 4b71 ldr r3, [pc, #452] @ (8003a84 ) 80038be: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 80038c2: 0c1b lsrs r3, r3, #16 80038c4: f003 0303 and.w r3, r3, #3 80038c8: 3301 adds r3, #1 80038ca: 005b lsls r3, r3, #1 80038cc: 61fb str r3, [r7, #28] plli2sq = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos); 80038ce: 4b6d ldr r3, [pc, #436] @ (8003a84 ) 80038d0: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 80038d4: 0e1b lsrs r3, r3, #24 80038d6: f003 030f and.w r3, r3, #15 80038da: 61bb str r3, [r7, #24] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */ /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, plli2sp, plli2sq, 80038dc: 687b ldr r3, [r7, #4] 80038de: 685a ldr r2, [r3, #4] 80038e0: 687b ldr r3, [r7, #4] 80038e2: 689b ldr r3, [r3, #8] 80038e4: 019b lsls r3, r3, #6 80038e6: 431a orrs r2, r3 80038e8: 69fb ldr r3, [r7, #28] 80038ea: 085b lsrs r3, r3, #1 80038ec: 3b01 subs r3, #1 80038ee: 041b lsls r3, r3, #16 80038f0: 431a orrs r2, r3 80038f2: 69bb ldr r3, [r7, #24] 80038f4: 061b lsls r3, r3, #24 80038f6: 431a orrs r2, r3 80038f8: 687b ldr r3, [r7, #4] 80038fa: 695b ldr r3, [r3, #20] 80038fc: 071b lsls r3, r3, #28 80038fe: 4961 ldr r1, [pc, #388] @ (8003a84 ) 8003900: 4313 orrs r3, r2 8003902: f8c1 3084 str.w r3, [r1, #132] @ 0x84 PeriphClkInit->PLLI2S.PLLI2SR); } /*------- In Case of PLLI2S is selected as source clock for SAI ----------*/ if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) 8003906: 687b ldr r3, [r7, #4] 8003908: 681b ldr r3, [r3, #0] 800390a: f003 0304 and.w r3, r3, #4 800390e: 2b00 cmp r3, #0 8003910: d004 beq.n 800391c && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || 8003912: 687b ldr r3, [r7, #4] 8003914: 6b1b ldr r3, [r3, #48] @ 0x30 8003916: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 800391a: d00a beq.n 8003932 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) 800391c: 687b ldr r3, [r7, #4] 800391e: 681b ldr r3, [r3, #0] 8003920: f003 0308 and.w r3, r3, #8 && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || 8003924: 2b00 cmp r3, #0 8003926: d035 beq.n 8003994 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) 8003928: 687b ldr r3, [r7, #4] 800392a: 6b5b ldr r3, [r3, #52] @ 0x34 800392c: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8003930: d130 bne.n 8003994 assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); /* Check for PLLI2S/DIVQ parameters */ assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ)); /* Read PLLI2SP/PLLI2SR value from PLLI2SCFGR register (this value is not needed for SAI configuration) */ plli2sp = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U); 8003932: 4b54 ldr r3, [pc, #336] @ (8003a84 ) 8003934: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8003938: 0c1b lsrs r3, r3, #16 800393a: f003 0303 and.w r3, r3, #3 800393e: 3301 adds r3, #1 8003940: 005b lsls r3, r3, #1 8003942: 61fb str r3, [r7, #28] plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); 8003944: 4b4f ldr r3, [pc, #316] @ (8003a84 ) 8003946: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 800394a: 0f1b lsrs r3, r3, #28 800394c: f003 0307 and.w r3, r3, #7 8003950: 617b str r3, [r7, #20] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */ /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */ /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, plli2sp, 8003952: 687b ldr r3, [r7, #4] 8003954: 685a ldr r2, [r3, #4] 8003956: 687b ldr r3, [r7, #4] 8003958: 689b ldr r3, [r3, #8] 800395a: 019b lsls r3, r3, #6 800395c: 431a orrs r2, r3 800395e: 69fb ldr r3, [r7, #28] 8003960: 085b lsrs r3, r3, #1 8003962: 3b01 subs r3, #1 8003964: 041b lsls r3, r3, #16 8003966: 431a orrs r2, r3 8003968: 687b ldr r3, [r7, #4] 800396a: 691b ldr r3, [r3, #16] 800396c: 061b lsls r3, r3, #24 800396e: 431a orrs r2, r3 8003970: 697b ldr r3, [r7, #20] 8003972: 071b lsls r3, r3, #28 8003974: 4943 ldr r1, [pc, #268] @ (8003a84 ) 8003976: 4313 orrs r3, r2 8003978: f8c1 3084 str.w r3, [r1, #132] @ 0x84 PeriphClkInit->PLLI2S.PLLI2SQ, plli2sr); /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */ __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ); 800397c: 4b41 ldr r3, [pc, #260] @ (8003a84 ) 800397e: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8003982: f023 021f bic.w r2, r3, #31 8003986: 687b ldr r3, [r7, #4] 8003988: 6a9b ldr r3, [r3, #40] @ 0x28 800398a: 3b01 subs r3, #1 800398c: 493d ldr r1, [pc, #244] @ (8003a84 ) 800398e: 4313 orrs r3, r2 8003990: f8c1 308c str.w r3, [r1, #140] @ 0x8c } /*------ In Case of PLLI2S is selected as source clock for SPDIFRX -------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) 8003994: 687b ldr r3, [r7, #4] 8003996: 681b ldr r3, [r3, #0] 8003998: f403 6380 and.w r3, r3, #1024 @ 0x400 800399c: 2b00 cmp r3, #0 800399e: d029 beq.n 80039f4 && (PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP)) 80039a0: 687b ldr r3, [r7, #4] 80039a2: 6d1b ldr r3, [r3, #80] @ 0x50 80039a4: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 80039a8: d124 bne.n 80039f4 { /* check for Parameters */ assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP)); /* Read PLLI2SR value from PLLI2SCFGR register (this value is not need for SAI configuration) */ plli2sq = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U); 80039aa: 4b36 ldr r3, [pc, #216] @ (8003a84 ) 80039ac: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 80039b0: 0c1b lsrs r3, r3, #16 80039b2: f003 0303 and.w r3, r3, #3 80039b6: 3301 adds r3, #1 80039b8: 005b lsls r3, r3, #1 80039ba: 61bb str r3, [r7, #24] plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); 80039bc: 4b31 ldr r3, [pc, #196] @ (8003a84 ) 80039be: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 80039c2: 0f1b lsrs r3, r3, #28 80039c4: f003 0307 and.w r3, r3, #7 80039c8: 617b str r3, [r7, #20] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */ /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SP, 80039ca: 687b ldr r3, [r7, #4] 80039cc: 685a ldr r2, [r3, #4] 80039ce: 687b ldr r3, [r7, #4] 80039d0: 689b ldr r3, [r3, #8] 80039d2: 019b lsls r3, r3, #6 80039d4: 431a orrs r2, r3 80039d6: 687b ldr r3, [r7, #4] 80039d8: 68db ldr r3, [r3, #12] 80039da: 085b lsrs r3, r3, #1 80039dc: 3b01 subs r3, #1 80039de: 041b lsls r3, r3, #16 80039e0: 431a orrs r2, r3 80039e2: 69bb ldr r3, [r7, #24] 80039e4: 061b lsls r3, r3, #24 80039e6: 431a orrs r2, r3 80039e8: 697b ldr r3, [r7, #20] 80039ea: 071b lsls r3, r3, #28 80039ec: 4925 ldr r1, [pc, #148] @ (8003a84 ) 80039ee: 4313 orrs r3, r2 80039f0: f8c1 3084 str.w r3, [r1, #132] @ 0x84 plli2sq, plli2sr); } /*----------------- In Case of PLLI2S is just selected -----------------*/ if ((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S) 80039f4: 687b ldr r3, [r7, #4] 80039f6: 681b ldr r3, [r3, #0] 80039f8: f403 6300 and.w r3, r3, #2048 @ 0x800 80039fc: 2b00 cmp r3, #0 80039fe: d016 beq.n 8003a2e assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SP, 8003a00: 687b ldr r3, [r7, #4] 8003a02: 685a ldr r2, [r3, #4] 8003a04: 687b ldr r3, [r7, #4] 8003a06: 689b ldr r3, [r3, #8] 8003a08: 019b lsls r3, r3, #6 8003a0a: 431a orrs r2, r3 8003a0c: 687b ldr r3, [r7, #4] 8003a0e: 68db ldr r3, [r3, #12] 8003a10: 085b lsrs r3, r3, #1 8003a12: 3b01 subs r3, #1 8003a14: 041b lsls r3, r3, #16 8003a16: 431a orrs r2, r3 8003a18: 687b ldr r3, [r7, #4] 8003a1a: 691b ldr r3, [r3, #16] 8003a1c: 061b lsls r3, r3, #24 8003a1e: 431a orrs r2, r3 8003a20: 687b ldr r3, [r7, #4] 8003a22: 695b ldr r3, [r3, #20] 8003a24: 071b lsls r3, r3, #28 8003a26: 4917 ldr r1, [pc, #92] @ (8003a84 ) 8003a28: 4313 orrs r3, r2 8003a2a: f8c1 3084 str.w r3, [r1, #132] @ 0x84 PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR); } /* Enable the PLLI2S */ __HAL_RCC_PLLI2S_ENABLE(); 8003a2e: 4b16 ldr r3, [pc, #88] @ (8003a88 ) 8003a30: 2201 movs r2, #1 8003a32: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003a34: f7fd fd18 bl 8001468 8003a38: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLI2S is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 8003a3a: e008 b.n 8003a4e { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 8003a3c: f7fd fd14 bl 8001468 8003a40: 4602 mov r2, r0 8003a42: 6a7b ldr r3, [r7, #36] @ 0x24 8003a44: 1ad3 subs r3, r2, r3 8003a46: 2b02 cmp r3, #2 8003a48: d901 bls.n 8003a4e { /* return in case of Timeout detected */ return HAL_TIMEOUT; 8003a4a: 2303 movs r3, #3 8003a4c: e09f b.n 8003b8e while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 8003a4e: 4b0d ldr r3, [pc, #52] @ (8003a84 ) 8003a50: 681b ldr r3, [r3, #0] 8003a52: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8003a56: 2b00 cmp r3, #0 8003a58: d0f0 beq.n 8003a3c } /*--------------------------------------------------------------------------*/ /*----------------------------- PLLSAI Configuration -----------------------*/ /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, CLK48 or SDIO */ if (pllsaiused == 1U) 8003a5a: 6abb ldr r3, [r7, #40] @ 0x28 8003a5c: 2b01 cmp r3, #1 8003a5e: f040 8095 bne.w 8003b8c { /* Disable PLLSAI Clock */ __HAL_RCC_PLLSAI_DISABLE(); 8003a62: 4b0a ldr r3, [pc, #40] @ (8003a8c ) 8003a64: 2200 movs r2, #0 8003a66: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003a68: f7fd fcfe bl 8001468 8003a6c: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLSAI is disabled */ while (__HAL_RCC_PLLSAI_GET_FLAG() != RESET) 8003a6e: e00f b.n 8003a90 { if ((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE) 8003a70: f7fd fcfa bl 8001468 8003a74: 4602 mov r2, r0 8003a76: 6a7b ldr r3, [r7, #36] @ 0x24 8003a78: 1ad3 subs r3, r2, r3 8003a7a: 2b02 cmp r3, #2 8003a7c: d908 bls.n 8003a90 { /* return in case of Timeout detected */ return HAL_TIMEOUT; 8003a7e: 2303 movs r3, #3 8003a80: e085 b.n 8003b8e 8003a82: bf00 nop 8003a84: 40023800 .word 0x40023800 8003a88: 42470068 .word 0x42470068 8003a8c: 42470070 .word 0x42470070 while (__HAL_RCC_PLLSAI_GET_FLAG() != RESET) 8003a90: 4b41 ldr r3, [pc, #260] @ (8003b98 ) 8003a92: 681b ldr r3, [r3, #0] 8003a94: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8003a98: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 8003a9c: d0e8 beq.n 8003a70 /* Check the PLLSAI division factors */ assert_param(IS_RCC_PLLSAIM_VALUE(PeriphClkInit->PLLSAI.PLLSAIM)); assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN)); /*------ In Case of PLLSAI is selected as source clock for SAI -----------*/ if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) 8003a9e: 687b ldr r3, [r7, #4] 8003aa0: 681b ldr r3, [r3, #0] 8003aa2: f003 0304 and.w r3, r3, #4 8003aa6: 2b00 cmp r3, #0 8003aa8: d003 beq.n 8003ab2 && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) || 8003aaa: 687b ldr r3, [r7, #4] 8003aac: 6b1b ldr r3, [r3, #48] @ 0x30 8003aae: 2b00 cmp r3, #0 8003ab0: d009 beq.n 8003ac6 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) 8003ab2: 687b ldr r3, [r7, #4] 8003ab4: 681b ldr r3, [r3, #0] 8003ab6: f003 0308 and.w r3, r3, #8 && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) || 8003aba: 2b00 cmp r3, #0 8003abc: d02b beq.n 8003b16 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) 8003abe: 687b ldr r3, [r7, #4] 8003ac0: 6b5b ldr r3, [r3, #52] @ 0x34 8003ac2: 2b00 cmp r3, #0 8003ac4: d127 bne.n 8003b16 assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ)); /* check for PLLSAI/DIVQ Parameter */ assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ)); /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */ pllsaip = ((((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U) << 1U); 8003ac6: 4b34 ldr r3, [pc, #208] @ (8003b98 ) 8003ac8: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8003acc: 0c1b lsrs r3, r3, #16 8003ace: f003 0303 and.w r3, r3, #3 8003ad2: 3301 adds r3, #1 8003ad4: 005b lsls r3, r3, #1 8003ad6: 613b str r3, [r7, #16] /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */ /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */ /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN, pllsaip, 8003ad8: 687b ldr r3, [r7, #4] 8003ada: 699a ldr r2, [r3, #24] 8003adc: 687b ldr r3, [r7, #4] 8003ade: 69db ldr r3, [r3, #28] 8003ae0: 019b lsls r3, r3, #6 8003ae2: 431a orrs r2, r3 8003ae4: 693b ldr r3, [r7, #16] 8003ae6: 085b lsrs r3, r3, #1 8003ae8: 3b01 subs r3, #1 8003aea: 041b lsls r3, r3, #16 8003aec: 431a orrs r2, r3 8003aee: 687b ldr r3, [r7, #4] 8003af0: 6a5b ldr r3, [r3, #36] @ 0x24 8003af2: 061b lsls r3, r3, #24 8003af4: 4928 ldr r1, [pc, #160] @ (8003b98 ) 8003af6: 4313 orrs r3, r2 8003af8: f8c1 3088 str.w r3, [r1, #136] @ 0x88 PeriphClkInit->PLLSAI.PLLSAIQ, 0U); /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */ __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ); 8003afc: 4b26 ldr r3, [pc, #152] @ (8003b98 ) 8003afe: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8003b02: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 8003b06: 687b ldr r3, [r7, #4] 8003b08: 6adb ldr r3, [r3, #44] @ 0x2c 8003b0a: 3b01 subs r3, #1 8003b0c: 021b lsls r3, r3, #8 8003b0e: 4922 ldr r1, [pc, #136] @ (8003b98 ) 8003b10: 4313 orrs r3, r2 8003b12: f8c1 308c str.w r3, [r1, #140] @ 0x8c } /*------ In Case of PLLSAI is selected as source clock for CLK48 ---------*/ /* In Case of PLLI2S is selected as source clock for CLK48 */ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) 8003b16: 687b ldr r3, [r7, #4] 8003b18: 681b ldr r3, [r3, #0] 8003b1a: f403 7380 and.w r3, r3, #256 @ 0x100 8003b1e: 2b00 cmp r3, #0 8003b20: d01d beq.n 8003b5e && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP)) 8003b22: 687b ldr r3, [r7, #4] 8003b24: 6d5b ldr r3, [r3, #84] @ 0x54 8003b26: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 8003b2a: d118 bne.n 8003b5e { /* check for Parameters */ assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP)); /* Read PLLSAIQ value from PLLI2SCFGR register (this value is not need for SAI configuration) */ pllsaiq = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos); 8003b2c: 4b1a ldr r3, [pc, #104] @ (8003b98 ) 8003b2e: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 8003b32: 0e1b lsrs r3, r3, #24 8003b34: f003 030f and.w r3, r3, #15 8003b38: 60fb str r3, [r7, #12] /* Configure the PLLSAI division factors */ /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) * (PLLI2SN/PLLSAIM) */ /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN, PeriphClkInit->PLLSAI.PLLSAIP, 8003b3a: 687b ldr r3, [r7, #4] 8003b3c: 699a ldr r2, [r3, #24] 8003b3e: 687b ldr r3, [r7, #4] 8003b40: 69db ldr r3, [r3, #28] 8003b42: 019b lsls r3, r3, #6 8003b44: 431a orrs r2, r3 8003b46: 687b ldr r3, [r7, #4] 8003b48: 6a1b ldr r3, [r3, #32] 8003b4a: 085b lsrs r3, r3, #1 8003b4c: 3b01 subs r3, #1 8003b4e: 041b lsls r3, r3, #16 8003b50: 431a orrs r2, r3 8003b52: 68fb ldr r3, [r7, #12] 8003b54: 061b lsls r3, r3, #24 8003b56: 4910 ldr r1, [pc, #64] @ (8003b98 ) 8003b58: 4313 orrs r3, r2 8003b5a: f8c1 3088 str.w r3, [r1, #136] @ 0x88 pllsaiq, 0U); } /* Enable PLLSAI Clock */ __HAL_RCC_PLLSAI_ENABLE(); 8003b5e: 4b0f ldr r3, [pc, #60] @ (8003b9c ) 8003b60: 2201 movs r2, #1 8003b62: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003b64: f7fd fc80 bl 8001468 8003b68: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLSAI is ready */ while (__HAL_RCC_PLLSAI_GET_FLAG() == RESET) 8003b6a: e008 b.n 8003b7e { if ((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE) 8003b6c: f7fd fc7c bl 8001468 8003b70: 4602 mov r2, r0 8003b72: 6a7b ldr r3, [r7, #36] @ 0x24 8003b74: 1ad3 subs r3, r2, r3 8003b76: 2b02 cmp r3, #2 8003b78: d901 bls.n 8003b7e { /* return in case of Timeout detected */ return HAL_TIMEOUT; 8003b7a: 2303 movs r3, #3 8003b7c: e007 b.n 8003b8e while (__HAL_RCC_PLLSAI_GET_FLAG() == RESET) 8003b7e: 4b06 ldr r3, [pc, #24] @ (8003b98 ) 8003b80: 681b ldr r3, [r3, #0] 8003b82: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8003b86: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 8003b8a: d1ef bne.n 8003b6c } } } return HAL_OK; 8003b8c: 2300 movs r3, #0 } 8003b8e: 4618 mov r0, r3 8003b90: 3730 adds r7, #48 @ 0x30 8003b92: 46bd mov sp, r7 8003b94: bd80 pop {r7, pc} 8003b96: bf00 nop 8003b98: 40023800 .word 0x40023800 8003b9c: 42470070 .word 0x42470070 08003ba0 : * * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 8003ba0: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 8003ba4: b0ae sub sp, #184 @ 0xb8 8003ba6: af00 add r7, sp, #0 uint32_t pllm = 0U; 8003ba8: 2300 movs r3, #0 8003baa: f8c7 30ac str.w r3, [r7, #172] @ 0xac uint32_t pllvco = 0U; 8003bae: 2300 movs r3, #0 8003bb0: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 uint32_t pllp = 0U; 8003bb4: 2300 movs r3, #0 8003bb6: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 uint32_t pllr = 0U; 8003bba: 2300 movs r3, #0 8003bbc: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 uint32_t sysclockfreq = 0U; 8003bc0: 2300 movs r3, #0 8003bc2: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) 8003bc6: 4bcb ldr r3, [pc, #812] @ (8003ef4 ) 8003bc8: 689b ldr r3, [r3, #8] 8003bca: f003 030c and.w r3, r3, #12 8003bce: 2b0c cmp r3, #12 8003bd0: f200 8206 bhi.w 8003fe0 8003bd4: a201 add r2, pc, #4 @ (adr r2, 8003bdc ) 8003bd6: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8003bda: bf00 nop 8003bdc: 08003c11 .word 0x08003c11 8003be0: 08003fe1 .word 0x08003fe1 8003be4: 08003fe1 .word 0x08003fe1 8003be8: 08003fe1 .word 0x08003fe1 8003bec: 08003c19 .word 0x08003c19 8003bf0: 08003fe1 .word 0x08003fe1 8003bf4: 08003fe1 .word 0x08003fe1 8003bf8: 08003fe1 .word 0x08003fe1 8003bfc: 08003c21 .word 0x08003c21 8003c00: 08003fe1 .word 0x08003fe1 8003c04: 08003fe1 .word 0x08003fe1 8003c08: 08003fe1 .word 0x08003fe1 8003c0c: 08003e11 .word 0x08003e11 { case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ { sysclockfreq = HSI_VALUE; 8003c10: 4bb9 ldr r3, [pc, #740] @ (8003ef8 ) 8003c12: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 break; 8003c16: e1e7 b.n 8003fe8 } case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ { sysclockfreq = HSE_VALUE; 8003c18: 4bb8 ldr r3, [pc, #736] @ (8003efc ) 8003c1a: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 break; 8003c1e: e1e3 b.n 8003fe8 } case RCC_CFGR_SWS_PLL: /* PLL/PLLP used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLP */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 8003c20: 4bb4 ldr r3, [pc, #720] @ (8003ef4 ) 8003c22: 685b ldr r3, [r3, #4] 8003c24: f003 033f and.w r3, r3, #63 @ 0x3f 8003c28: f8c7 30ac str.w r3, [r7, #172] @ 0xac if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) 8003c2c: 4bb1 ldr r3, [pc, #708] @ (8003ef4 ) 8003c2e: 685b ldr r3, [r3, #4] 8003c30: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8003c34: 2b00 cmp r3, #0 8003c36: d071 beq.n 8003d1c { /* HSE used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 8003c38: 4bae ldr r3, [pc, #696] @ (8003ef4 ) 8003c3a: 685b ldr r3, [r3, #4] 8003c3c: 099b lsrs r3, r3, #6 8003c3e: 2200 movs r2, #0 8003c40: f8c7 3098 str.w r3, [r7, #152] @ 0x98 8003c44: f8c7 209c str.w r2, [r7, #156] @ 0x9c 8003c48: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 8003c4c: f3c3 0308 ubfx r3, r3, #0, #9 8003c50: f8c7 3090 str.w r3, [r7, #144] @ 0x90 8003c54: 2300 movs r3, #0 8003c56: f8c7 3094 str.w r3, [r7, #148] @ 0x94 8003c5a: e9d7 4524 ldrd r4, r5, [r7, #144] @ 0x90 8003c5e: 4622 mov r2, r4 8003c60: 462b mov r3, r5 8003c62: f04f 0000 mov.w r0, #0 8003c66: f04f 0100 mov.w r1, #0 8003c6a: 0159 lsls r1, r3, #5 8003c6c: ea41 61d2 orr.w r1, r1, r2, lsr #27 8003c70: 0150 lsls r0, r2, #5 8003c72: 4602 mov r2, r0 8003c74: 460b mov r3, r1 8003c76: 4621 mov r1, r4 8003c78: 1a51 subs r1, r2, r1 8003c7a: 6439 str r1, [r7, #64] @ 0x40 8003c7c: 4629 mov r1, r5 8003c7e: eb63 0301 sbc.w r3, r3, r1 8003c82: 647b str r3, [r7, #68] @ 0x44 8003c84: f04f 0200 mov.w r2, #0 8003c88: f04f 0300 mov.w r3, #0 8003c8c: e9d7 8910 ldrd r8, r9, [r7, #64] @ 0x40 8003c90: 4649 mov r1, r9 8003c92: 018b lsls r3, r1, #6 8003c94: 4641 mov r1, r8 8003c96: ea43 6391 orr.w r3, r3, r1, lsr #26 8003c9a: 4641 mov r1, r8 8003c9c: 018a lsls r2, r1, #6 8003c9e: 4641 mov r1, r8 8003ca0: 1a51 subs r1, r2, r1 8003ca2: 63b9 str r1, [r7, #56] @ 0x38 8003ca4: 4649 mov r1, r9 8003ca6: eb63 0301 sbc.w r3, r3, r1 8003caa: 63fb str r3, [r7, #60] @ 0x3c 8003cac: f04f 0200 mov.w r2, #0 8003cb0: f04f 0300 mov.w r3, #0 8003cb4: e9d7 890e ldrd r8, r9, [r7, #56] @ 0x38 8003cb8: 4649 mov r1, r9 8003cba: 00cb lsls r3, r1, #3 8003cbc: 4641 mov r1, r8 8003cbe: ea43 7351 orr.w r3, r3, r1, lsr #29 8003cc2: 4641 mov r1, r8 8003cc4: 00ca lsls r2, r1, #3 8003cc6: 4610 mov r0, r2 8003cc8: 4619 mov r1, r3 8003cca: 4603 mov r3, r0 8003ccc: 4622 mov r2, r4 8003cce: 189b adds r3, r3, r2 8003cd0: 633b str r3, [r7, #48] @ 0x30 8003cd2: 462b mov r3, r5 8003cd4: 460a mov r2, r1 8003cd6: eb42 0303 adc.w r3, r2, r3 8003cda: 637b str r3, [r7, #52] @ 0x34 8003cdc: f04f 0200 mov.w r2, #0 8003ce0: f04f 0300 mov.w r3, #0 8003ce4: e9d7 450c ldrd r4, r5, [r7, #48] @ 0x30 8003ce8: 4629 mov r1, r5 8003cea: 024b lsls r3, r1, #9 8003cec: 4621 mov r1, r4 8003cee: ea43 53d1 orr.w r3, r3, r1, lsr #23 8003cf2: 4621 mov r1, r4 8003cf4: 024a lsls r2, r1, #9 8003cf6: 4610 mov r0, r2 8003cf8: 4619 mov r1, r3 8003cfa: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 8003cfe: 2200 movs r2, #0 8003d00: f8c7 3088 str.w r3, [r7, #136] @ 0x88 8003d04: f8c7 208c str.w r2, [r7, #140] @ 0x8c 8003d08: e9d7 2322 ldrd r2, r3, [r7, #136] @ 0x88 8003d0c: f7fc fa7a bl 8000204 <__aeabi_uldivmod> 8003d10: 4602 mov r2, r0 8003d12: 460b mov r3, r1 8003d14: 4613 mov r3, r2 8003d16: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8003d1a: e067 b.n 8003dec } else { /* HSI used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 8003d1c: 4b75 ldr r3, [pc, #468] @ (8003ef4 ) 8003d1e: 685b ldr r3, [r3, #4] 8003d20: 099b lsrs r3, r3, #6 8003d22: 2200 movs r2, #0 8003d24: f8c7 3080 str.w r3, [r7, #128] @ 0x80 8003d28: f8c7 2084 str.w r2, [r7, #132] @ 0x84 8003d2c: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 8003d30: f3c3 0308 ubfx r3, r3, #0, #9 8003d34: 67bb str r3, [r7, #120] @ 0x78 8003d36: 2300 movs r3, #0 8003d38: 67fb str r3, [r7, #124] @ 0x7c 8003d3a: e9d7 451e ldrd r4, r5, [r7, #120] @ 0x78 8003d3e: 4622 mov r2, r4 8003d40: 462b mov r3, r5 8003d42: f04f 0000 mov.w r0, #0 8003d46: f04f 0100 mov.w r1, #0 8003d4a: 0159 lsls r1, r3, #5 8003d4c: ea41 61d2 orr.w r1, r1, r2, lsr #27 8003d50: 0150 lsls r0, r2, #5 8003d52: 4602 mov r2, r0 8003d54: 460b mov r3, r1 8003d56: 4621 mov r1, r4 8003d58: 1a51 subs r1, r2, r1 8003d5a: 62b9 str r1, [r7, #40] @ 0x28 8003d5c: 4629 mov r1, r5 8003d5e: eb63 0301 sbc.w r3, r3, r1 8003d62: 62fb str r3, [r7, #44] @ 0x2c 8003d64: f04f 0200 mov.w r2, #0 8003d68: f04f 0300 mov.w r3, #0 8003d6c: e9d7 890a ldrd r8, r9, [r7, #40] @ 0x28 8003d70: 4649 mov r1, r9 8003d72: 018b lsls r3, r1, #6 8003d74: 4641 mov r1, r8 8003d76: ea43 6391 orr.w r3, r3, r1, lsr #26 8003d7a: 4641 mov r1, r8 8003d7c: 018a lsls r2, r1, #6 8003d7e: 4641 mov r1, r8 8003d80: ebb2 0a01 subs.w sl, r2, r1 8003d84: 4649 mov r1, r9 8003d86: eb63 0b01 sbc.w fp, r3, r1 8003d8a: f04f 0200 mov.w r2, #0 8003d8e: f04f 0300 mov.w r3, #0 8003d92: ea4f 03cb mov.w r3, fp, lsl #3 8003d96: ea43 735a orr.w r3, r3, sl, lsr #29 8003d9a: ea4f 02ca mov.w r2, sl, lsl #3 8003d9e: 4692 mov sl, r2 8003da0: 469b mov fp, r3 8003da2: 4623 mov r3, r4 8003da4: eb1a 0303 adds.w r3, sl, r3 8003da8: 623b str r3, [r7, #32] 8003daa: 462b mov r3, r5 8003dac: eb4b 0303 adc.w r3, fp, r3 8003db0: 627b str r3, [r7, #36] @ 0x24 8003db2: f04f 0200 mov.w r2, #0 8003db6: f04f 0300 mov.w r3, #0 8003dba: e9d7 4508 ldrd r4, r5, [r7, #32] 8003dbe: 4629 mov r1, r5 8003dc0: 028b lsls r3, r1, #10 8003dc2: 4621 mov r1, r4 8003dc4: ea43 5391 orr.w r3, r3, r1, lsr #22 8003dc8: 4621 mov r1, r4 8003dca: 028a lsls r2, r1, #10 8003dcc: 4610 mov r0, r2 8003dce: 4619 mov r1, r3 8003dd0: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 8003dd4: 2200 movs r2, #0 8003dd6: 673b str r3, [r7, #112] @ 0x70 8003dd8: 677a str r2, [r7, #116] @ 0x74 8003dda: e9d7 231c ldrd r2, r3, [r7, #112] @ 0x70 8003dde: f7fc fa11 bl 8000204 <__aeabi_uldivmod> 8003de2: 4602 mov r2, r0 8003de4: 460b mov r3, r1 8003de6: 4613 mov r3, r2 8003de8: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 } pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U); 8003dec: 4b41 ldr r3, [pc, #260] @ (8003ef4 ) 8003dee: 685b ldr r3, [r3, #4] 8003df0: 0c1b lsrs r3, r3, #16 8003df2: f003 0303 and.w r3, r3, #3 8003df6: 3301 adds r3, #1 8003df8: 005b lsls r3, r3, #1 8003dfa: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 sysclockfreq = pllvco / pllp; 8003dfe: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 8003e02: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 8003e06: fbb2 f3f3 udiv r3, r2, r3 8003e0a: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 break; 8003e0e: e0eb b.n 8003fe8 } case RCC_CFGR_SWS_PLLR: /* PLL/PLLR used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLR */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 8003e10: 4b38 ldr r3, [pc, #224] @ (8003ef4 ) 8003e12: 685b ldr r3, [r3, #4] 8003e14: f003 033f and.w r3, r3, #63 @ 0x3f 8003e18: f8c7 30ac str.w r3, [r7, #172] @ 0xac if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) 8003e1c: 4b35 ldr r3, [pc, #212] @ (8003ef4 ) 8003e1e: 685b ldr r3, [r3, #4] 8003e20: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8003e24: 2b00 cmp r3, #0 8003e26: d06b beq.n 8003f00 { /* HSE used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 8003e28: 4b32 ldr r3, [pc, #200] @ (8003ef4 ) 8003e2a: 685b ldr r3, [r3, #4] 8003e2c: 099b lsrs r3, r3, #6 8003e2e: 2200 movs r2, #0 8003e30: 66bb str r3, [r7, #104] @ 0x68 8003e32: 66fa str r2, [r7, #108] @ 0x6c 8003e34: 6ebb ldr r3, [r7, #104] @ 0x68 8003e36: f3c3 0308 ubfx r3, r3, #0, #9 8003e3a: 663b str r3, [r7, #96] @ 0x60 8003e3c: 2300 movs r3, #0 8003e3e: 667b str r3, [r7, #100] @ 0x64 8003e40: e9d7 4518 ldrd r4, r5, [r7, #96] @ 0x60 8003e44: 4622 mov r2, r4 8003e46: 462b mov r3, r5 8003e48: f04f 0000 mov.w r0, #0 8003e4c: f04f 0100 mov.w r1, #0 8003e50: 0159 lsls r1, r3, #5 8003e52: ea41 61d2 orr.w r1, r1, r2, lsr #27 8003e56: 0150 lsls r0, r2, #5 8003e58: 4602 mov r2, r0 8003e5a: 460b mov r3, r1 8003e5c: 4621 mov r1, r4 8003e5e: 1a51 subs r1, r2, r1 8003e60: 61b9 str r1, [r7, #24] 8003e62: 4629 mov r1, r5 8003e64: eb63 0301 sbc.w r3, r3, r1 8003e68: 61fb str r3, [r7, #28] 8003e6a: f04f 0200 mov.w r2, #0 8003e6e: f04f 0300 mov.w r3, #0 8003e72: e9d7 ab06 ldrd sl, fp, [r7, #24] 8003e76: 4659 mov r1, fp 8003e78: 018b lsls r3, r1, #6 8003e7a: 4651 mov r1, sl 8003e7c: ea43 6391 orr.w r3, r3, r1, lsr #26 8003e80: 4651 mov r1, sl 8003e82: 018a lsls r2, r1, #6 8003e84: 4651 mov r1, sl 8003e86: ebb2 0801 subs.w r8, r2, r1 8003e8a: 4659 mov r1, fp 8003e8c: eb63 0901 sbc.w r9, r3, r1 8003e90: f04f 0200 mov.w r2, #0 8003e94: f04f 0300 mov.w r3, #0 8003e98: ea4f 03c9 mov.w r3, r9, lsl #3 8003e9c: ea43 7358 orr.w r3, r3, r8, lsr #29 8003ea0: ea4f 02c8 mov.w r2, r8, lsl #3 8003ea4: 4690 mov r8, r2 8003ea6: 4699 mov r9, r3 8003ea8: 4623 mov r3, r4 8003eaa: eb18 0303 adds.w r3, r8, r3 8003eae: 613b str r3, [r7, #16] 8003eb0: 462b mov r3, r5 8003eb2: eb49 0303 adc.w r3, r9, r3 8003eb6: 617b str r3, [r7, #20] 8003eb8: f04f 0200 mov.w r2, #0 8003ebc: f04f 0300 mov.w r3, #0 8003ec0: e9d7 4504 ldrd r4, r5, [r7, #16] 8003ec4: 4629 mov r1, r5 8003ec6: 024b lsls r3, r1, #9 8003ec8: 4621 mov r1, r4 8003eca: ea43 53d1 orr.w r3, r3, r1, lsr #23 8003ece: 4621 mov r1, r4 8003ed0: 024a lsls r2, r1, #9 8003ed2: 4610 mov r0, r2 8003ed4: 4619 mov r1, r3 8003ed6: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 8003eda: 2200 movs r2, #0 8003edc: 65bb str r3, [r7, #88] @ 0x58 8003ede: 65fa str r2, [r7, #92] @ 0x5c 8003ee0: e9d7 2316 ldrd r2, r3, [r7, #88] @ 0x58 8003ee4: f7fc f98e bl 8000204 <__aeabi_uldivmod> 8003ee8: 4602 mov r2, r0 8003eea: 460b mov r3, r1 8003eec: 4613 mov r3, r2 8003eee: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8003ef2: e065 b.n 8003fc0 8003ef4: 40023800 .word 0x40023800 8003ef8: 00f42400 .word 0x00f42400 8003efc: 007a1200 .word 0x007a1200 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 8003f00: 4b3d ldr r3, [pc, #244] @ (8003ff8 ) 8003f02: 685b ldr r3, [r3, #4] 8003f04: 099b lsrs r3, r3, #6 8003f06: 2200 movs r2, #0 8003f08: 4618 mov r0, r3 8003f0a: 4611 mov r1, r2 8003f0c: f3c0 0308 ubfx r3, r0, #0, #9 8003f10: 653b str r3, [r7, #80] @ 0x50 8003f12: 2300 movs r3, #0 8003f14: 657b str r3, [r7, #84] @ 0x54 8003f16: e9d7 8914 ldrd r8, r9, [r7, #80] @ 0x50 8003f1a: 4642 mov r2, r8 8003f1c: 464b mov r3, r9 8003f1e: f04f 0000 mov.w r0, #0 8003f22: f04f 0100 mov.w r1, #0 8003f26: 0159 lsls r1, r3, #5 8003f28: ea41 61d2 orr.w r1, r1, r2, lsr #27 8003f2c: 0150 lsls r0, r2, #5 8003f2e: 4602 mov r2, r0 8003f30: 460b mov r3, r1 8003f32: 4641 mov r1, r8 8003f34: 1a51 subs r1, r2, r1 8003f36: 60b9 str r1, [r7, #8] 8003f38: 4649 mov r1, r9 8003f3a: eb63 0301 sbc.w r3, r3, r1 8003f3e: 60fb str r3, [r7, #12] 8003f40: f04f 0200 mov.w r2, #0 8003f44: f04f 0300 mov.w r3, #0 8003f48: e9d7 ab02 ldrd sl, fp, [r7, #8] 8003f4c: 4659 mov r1, fp 8003f4e: 018b lsls r3, r1, #6 8003f50: 4651 mov r1, sl 8003f52: ea43 6391 orr.w r3, r3, r1, lsr #26 8003f56: 4651 mov r1, sl 8003f58: 018a lsls r2, r1, #6 8003f5a: 4651 mov r1, sl 8003f5c: 1a54 subs r4, r2, r1 8003f5e: 4659 mov r1, fp 8003f60: eb63 0501 sbc.w r5, r3, r1 8003f64: f04f 0200 mov.w r2, #0 8003f68: f04f 0300 mov.w r3, #0 8003f6c: 00eb lsls r3, r5, #3 8003f6e: ea43 7354 orr.w r3, r3, r4, lsr #29 8003f72: 00e2 lsls r2, r4, #3 8003f74: 4614 mov r4, r2 8003f76: 461d mov r5, r3 8003f78: 4643 mov r3, r8 8003f7a: 18e3 adds r3, r4, r3 8003f7c: 603b str r3, [r7, #0] 8003f7e: 464b mov r3, r9 8003f80: eb45 0303 adc.w r3, r5, r3 8003f84: 607b str r3, [r7, #4] 8003f86: f04f 0200 mov.w r2, #0 8003f8a: f04f 0300 mov.w r3, #0 8003f8e: e9d7 4500 ldrd r4, r5, [r7] 8003f92: 4629 mov r1, r5 8003f94: 028b lsls r3, r1, #10 8003f96: 4621 mov r1, r4 8003f98: ea43 5391 orr.w r3, r3, r1, lsr #22 8003f9c: 4621 mov r1, r4 8003f9e: 028a lsls r2, r1, #10 8003fa0: 4610 mov r0, r2 8003fa2: 4619 mov r1, r3 8003fa4: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 8003fa8: 2200 movs r2, #0 8003faa: 64bb str r3, [r7, #72] @ 0x48 8003fac: 64fa str r2, [r7, #76] @ 0x4c 8003fae: e9d7 2312 ldrd r2, r3, [r7, #72] @ 0x48 8003fb2: f7fc f927 bl 8000204 <__aeabi_uldivmod> 8003fb6: 4602 mov r2, r0 8003fb8: 460b mov r3, r1 8003fba: 4613 mov r3, r2 8003fbc: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 } pllr = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos); 8003fc0: 4b0d ldr r3, [pc, #52] @ (8003ff8 ) 8003fc2: 685b ldr r3, [r3, #4] 8003fc4: 0f1b lsrs r3, r3, #28 8003fc6: f003 0307 and.w r3, r3, #7 8003fca: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 sysclockfreq = pllvco / pllr; 8003fce: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 8003fd2: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 8003fd6: fbb2 f3f3 udiv r3, r2, r3 8003fda: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 break; 8003fde: e003 b.n 8003fe8 } default: { sysclockfreq = HSI_VALUE; 8003fe0: 4b06 ldr r3, [pc, #24] @ (8003ffc ) 8003fe2: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 break; 8003fe6: bf00 nop } } return sysclockfreq; 8003fe8: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0 } 8003fec: 4618 mov r0, r3 8003fee: 37b8 adds r7, #184 @ 0xb8 8003ff0: 46bd mov sp, r7 8003ff2: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 8003ff6: bf00 nop 8003ff8: 40023800 .word 0x40023800 8003ffc: 00f42400 .word 0x00f42400 08004000 : * @note This function add the PLL/PLLR factor management during PLL configuration this feature * is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) { 8004000: b580 push {r7, lr} 8004002: b086 sub sp, #24 8004004: af00 add r7, sp, #0 8004006: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8004008: 687b ldr r3, [r7, #4] 800400a: 2b00 cmp r3, #0 800400c: d101 bne.n 8004012 { return HAL_ERROR; 800400e: 2301 movs r3, #1 8004010: e28d b.n 800452e } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8004012: 687b ldr r3, [r7, #4] 8004014: 681b ldr r3, [r3, #0] 8004016: f003 0301 and.w r3, r3, #1 800401a: 2b00 cmp r3, #0 800401c: f000 8083 beq.w 8004126 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ #if defined(STM32F446xx) if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) 8004020: 4b94 ldr r3, [pc, #592] @ (8004274 ) 8004022: 689b ldr r3, [r3, #8] 8004024: f003 030c and.w r3, r3, #12 8004028: 2b04 cmp r3, #4 800402a: d019 beq.n 8004060 || \ ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) || \ 800402c: 4b91 ldr r3, [pc, #580] @ (8004274 ) 800402e: 689b ldr r3, [r3, #8] 8004030: f003 030c and.w r3, r3, #12 || \ 8004034: 2b08 cmp r3, #8 8004036: d106 bne.n 8004046 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) || \ 8004038: 4b8e ldr r3, [pc, #568] @ (8004274 ) 800403a: 685b ldr r3, [r3, #4] 800403c: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8004040: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8004044: d00c beq.n 8004060 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) 8004046: 4b8b ldr r3, [pc, #556] @ (8004274 ) 8004048: 689b ldr r3, [r3, #8] 800404a: f003 030c and.w r3, r3, #12 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) || \ 800404e: 2b0c cmp r3, #12 8004050: d112 bne.n 8004078 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) 8004052: 4b88 ldr r3, [pc, #544] @ (8004274 ) 8004054: 685b ldr r3, [r3, #4] 8004056: f403 0380 and.w r3, r3, #4194304 @ 0x400000 800405a: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 800405e: d10b bne.n 8004078 if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \ ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) #endif /* STM32F446xx */ { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8004060: 4b84 ldr r3, [pc, #528] @ (8004274 ) 8004062: 681b ldr r3, [r3, #0] 8004064: f403 3300 and.w r3, r3, #131072 @ 0x20000 8004068: 2b00 cmp r3, #0 800406a: d05b beq.n 8004124 800406c: 687b ldr r3, [r7, #4] 800406e: 685b ldr r3, [r3, #4] 8004070: 2b00 cmp r3, #0 8004072: d157 bne.n 8004124 { return HAL_ERROR; 8004074: 2301 movs r3, #1 8004076: e25a b.n 800452e } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8004078: 687b ldr r3, [r7, #4] 800407a: 685b ldr r3, [r3, #4] 800407c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8004080: d106 bne.n 8004090 8004082: 4b7c ldr r3, [pc, #496] @ (8004274 ) 8004084: 681b ldr r3, [r3, #0] 8004086: 4a7b ldr r2, [pc, #492] @ (8004274 ) 8004088: f443 3380 orr.w r3, r3, #65536 @ 0x10000 800408c: 6013 str r3, [r2, #0] 800408e: e01d b.n 80040cc 8004090: 687b ldr r3, [r7, #4] 8004092: 685b ldr r3, [r3, #4] 8004094: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 8004098: d10c bne.n 80040b4 800409a: 4b76 ldr r3, [pc, #472] @ (8004274 ) 800409c: 681b ldr r3, [r3, #0] 800409e: 4a75 ldr r2, [pc, #468] @ (8004274 ) 80040a0: f443 2380 orr.w r3, r3, #262144 @ 0x40000 80040a4: 6013 str r3, [r2, #0] 80040a6: 4b73 ldr r3, [pc, #460] @ (8004274 ) 80040a8: 681b ldr r3, [r3, #0] 80040aa: 4a72 ldr r2, [pc, #456] @ (8004274 ) 80040ac: f443 3380 orr.w r3, r3, #65536 @ 0x10000 80040b0: 6013 str r3, [r2, #0] 80040b2: e00b b.n 80040cc 80040b4: 4b6f ldr r3, [pc, #444] @ (8004274 ) 80040b6: 681b ldr r3, [r3, #0] 80040b8: 4a6e ldr r2, [pc, #440] @ (8004274 ) 80040ba: f423 3380 bic.w r3, r3, #65536 @ 0x10000 80040be: 6013 str r3, [r2, #0] 80040c0: 4b6c ldr r3, [pc, #432] @ (8004274 ) 80040c2: 681b ldr r3, [r3, #0] 80040c4: 4a6b ldr r2, [pc, #428] @ (8004274 ) 80040c6: f423 2380 bic.w r3, r3, #262144 @ 0x40000 80040ca: 6013 str r3, [r2, #0] /* Check the HSE State */ if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) 80040cc: 687b ldr r3, [r7, #4] 80040ce: 685b ldr r3, [r3, #4] 80040d0: 2b00 cmp r3, #0 80040d2: d013 beq.n 80040fc { /* Get Start Tick*/ tickstart = HAL_GetTick(); 80040d4: f7fd f9c8 bl 8001468 80040d8: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80040da: e008 b.n 80040ee { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 80040dc: f7fd f9c4 bl 8001468 80040e0: 4602 mov r2, r0 80040e2: 693b ldr r3, [r7, #16] 80040e4: 1ad3 subs r3, r2, r3 80040e6: 2b64 cmp r3, #100 @ 0x64 80040e8: d901 bls.n 80040ee { return HAL_TIMEOUT; 80040ea: 2303 movs r3, #3 80040ec: e21f b.n 800452e while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 80040ee: 4b61 ldr r3, [pc, #388] @ (8004274 ) 80040f0: 681b ldr r3, [r3, #0] 80040f2: f403 3300 and.w r3, r3, #131072 @ 0x20000 80040f6: 2b00 cmp r3, #0 80040f8: d0f0 beq.n 80040dc 80040fa: e014 b.n 8004126 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); 80040fc: f7fd f9b4 bl 8001468 8004100: 6138 str r0, [r7, #16] /* Wait till HSE is bypassed or disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8004102: e008 b.n 8004116 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8004104: f7fd f9b0 bl 8001468 8004108: 4602 mov r2, r0 800410a: 693b ldr r3, [r7, #16] 800410c: 1ad3 subs r3, r2, r3 800410e: 2b64 cmp r3, #100 @ 0x64 8004110: d901 bls.n 8004116 { return HAL_TIMEOUT; 8004112: 2303 movs r3, #3 8004114: e20b b.n 800452e while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8004116: 4b57 ldr r3, [pc, #348] @ (8004274 ) 8004118: 681b ldr r3, [r3, #0] 800411a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800411e: 2b00 cmp r3, #0 8004120: d1f0 bne.n 8004104 8004122: e000 b.n 8004126 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8004124: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8004126: 687b ldr r3, [r7, #4] 8004128: 681b ldr r3, [r3, #0] 800412a: f003 0302 and.w r3, r3, #2 800412e: 2b00 cmp r3, #0 8004130: d06f beq.n 8004212 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ #if defined(STM32F446xx) if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) 8004132: 4b50 ldr r3, [pc, #320] @ (8004274 ) 8004134: 689b ldr r3, [r3, #8] 8004136: f003 030c and.w r3, r3, #12 800413a: 2b00 cmp r3, #0 800413c: d017 beq.n 800416e || \ ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) || \ 800413e: 4b4d ldr r3, [pc, #308] @ (8004274 ) 8004140: 689b ldr r3, [r3, #8] 8004142: f003 030c and.w r3, r3, #12 || \ 8004146: 2b08 cmp r3, #8 8004148: d105 bne.n 8004156 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) || \ 800414a: 4b4a ldr r3, [pc, #296] @ (8004274 ) 800414c: 685b ldr r3, [r3, #4] 800414e: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8004152: 2b00 cmp r3, #0 8004154: d00b beq.n 800416e ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) 8004156: 4b47 ldr r3, [pc, #284] @ (8004274 ) 8004158: 689b ldr r3, [r3, #8] 800415a: f003 030c and.w r3, r3, #12 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) || \ 800415e: 2b0c cmp r3, #12 8004160: d11c bne.n 800419c ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) 8004162: 4b44 ldr r3, [pc, #272] @ (8004274 ) 8004164: 685b ldr r3, [r3, #4] 8004166: f403 0380 and.w r3, r3, #4194304 @ 0x400000 800416a: 2b00 cmp r3, #0 800416c: d116 bne.n 800419c || \ ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) #endif /* STM32F446xx */ { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 800416e: 4b41 ldr r3, [pc, #260] @ (8004274 ) 8004170: 681b ldr r3, [r3, #0] 8004172: f003 0302 and.w r3, r3, #2 8004176: 2b00 cmp r3, #0 8004178: d005 beq.n 8004186 800417a: 687b ldr r3, [r7, #4] 800417c: 68db ldr r3, [r3, #12] 800417e: 2b01 cmp r3, #1 8004180: d001 beq.n 8004186 { return HAL_ERROR; 8004182: 2301 movs r3, #1 8004184: e1d3 b.n 800452e } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8004186: 4b3b ldr r3, [pc, #236] @ (8004274 ) 8004188: 681b ldr r3, [r3, #0] 800418a: f023 02f8 bic.w r2, r3, #248 @ 0xf8 800418e: 687b ldr r3, [r7, #4] 8004190: 691b ldr r3, [r3, #16] 8004192: 00db lsls r3, r3, #3 8004194: 4937 ldr r1, [pc, #220] @ (8004274 ) 8004196: 4313 orrs r3, r2 8004198: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 800419a: e03a b.n 8004212 } } else { /* Check the HSI State */ if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF) 800419c: 687b ldr r3, [r7, #4] 800419e: 68db ldr r3, [r3, #12] 80041a0: 2b00 cmp r3, #0 80041a2: d020 beq.n 80041e6 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 80041a4: 4b34 ldr r3, [pc, #208] @ (8004278 ) 80041a6: 2201 movs r2, #1 80041a8: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 80041aa: f7fd f95d bl 8001468 80041ae: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80041b0: e008 b.n 80041c4 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80041b2: f7fd f959 bl 8001468 80041b6: 4602 mov r2, r0 80041b8: 693b ldr r3, [r7, #16] 80041ba: 1ad3 subs r3, r2, r3 80041bc: 2b02 cmp r3, #2 80041be: d901 bls.n 80041c4 { return HAL_TIMEOUT; 80041c0: 2303 movs r3, #3 80041c2: e1b4 b.n 800452e while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 80041c4: 4b2b ldr r3, [pc, #172] @ (8004274 ) 80041c6: 681b ldr r3, [r3, #0] 80041c8: f003 0302 and.w r3, r3, #2 80041cc: 2b00 cmp r3, #0 80041ce: d0f0 beq.n 80041b2 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80041d0: 4b28 ldr r3, [pc, #160] @ (8004274 ) 80041d2: 681b ldr r3, [r3, #0] 80041d4: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80041d8: 687b ldr r3, [r7, #4] 80041da: 691b ldr r3, [r3, #16] 80041dc: 00db lsls r3, r3, #3 80041de: 4925 ldr r1, [pc, #148] @ (8004274 ) 80041e0: 4313 orrs r3, r2 80041e2: 600b str r3, [r1, #0] 80041e4: e015 b.n 8004212 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 80041e6: 4b24 ldr r3, [pc, #144] @ (8004278 ) 80041e8: 2200 movs r2, #0 80041ea: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 80041ec: f7fd f93c bl 8001468 80041f0: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 80041f2: e008 b.n 8004206 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 80041f4: f7fd f938 bl 8001468 80041f8: 4602 mov r2, r0 80041fa: 693b ldr r3, [r7, #16] 80041fc: 1ad3 subs r3, r2, r3 80041fe: 2b02 cmp r3, #2 8004200: d901 bls.n 8004206 { return HAL_TIMEOUT; 8004202: 2303 movs r3, #3 8004204: e193 b.n 800452e while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8004206: 4b1b ldr r3, [pc, #108] @ (8004274 ) 8004208: 681b ldr r3, [r3, #0] 800420a: f003 0302 and.w r3, r3, #2 800420e: 2b00 cmp r3, #0 8004210: d1f0 bne.n 80041f4 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8004212: 687b ldr r3, [r7, #4] 8004214: 681b ldr r3, [r3, #0] 8004216: f003 0308 and.w r3, r3, #8 800421a: 2b00 cmp r3, #0 800421c: d036 beq.n 800428c { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF) 800421e: 687b ldr r3, [r7, #4] 8004220: 695b ldr r3, [r3, #20] 8004222: 2b00 cmp r3, #0 8004224: d016 beq.n 8004254 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8004226: 4b15 ldr r3, [pc, #84] @ (800427c ) 8004228: 2201 movs r2, #1 800422a: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 800422c: f7fd f91c bl 8001468 8004230: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8004232: e008 b.n 8004246 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8004234: f7fd f918 bl 8001468 8004238: 4602 mov r2, r0 800423a: 693b ldr r3, [r7, #16] 800423c: 1ad3 subs r3, r2, r3 800423e: 2b02 cmp r3, #2 8004240: d901 bls.n 8004246 { return HAL_TIMEOUT; 8004242: 2303 movs r3, #3 8004244: e173 b.n 800452e while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8004246: 4b0b ldr r3, [pc, #44] @ (8004274 ) 8004248: 6f5b ldr r3, [r3, #116] @ 0x74 800424a: f003 0302 and.w r3, r3, #2 800424e: 2b00 cmp r3, #0 8004250: d0f0 beq.n 8004234 8004252: e01b b.n 800428c } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8004254: 4b09 ldr r3, [pc, #36] @ (800427c ) 8004256: 2200 movs r2, #0 8004258: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 800425a: f7fd f905 bl 8001468 800425e: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8004260: e00e b.n 8004280 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8004262: f7fd f901 bl 8001468 8004266: 4602 mov r2, r0 8004268: 693b ldr r3, [r7, #16] 800426a: 1ad3 subs r3, r2, r3 800426c: 2b02 cmp r3, #2 800426e: d907 bls.n 8004280 { return HAL_TIMEOUT; 8004270: 2303 movs r3, #3 8004272: e15c b.n 800452e 8004274: 40023800 .word 0x40023800 8004278: 42470000 .word 0x42470000 800427c: 42470e80 .word 0x42470e80 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8004280: 4b8a ldr r3, [pc, #552] @ (80044ac ) 8004282: 6f5b ldr r3, [r3, #116] @ 0x74 8004284: f003 0302 and.w r3, r3, #2 8004288: 2b00 cmp r3, #0 800428a: d1ea bne.n 8004262 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 800428c: 687b ldr r3, [r7, #4] 800428e: 681b ldr r3, [r3, #0] 8004290: f003 0304 and.w r3, r3, #4 8004294: 2b00 cmp r3, #0 8004296: f000 8097 beq.w 80043c8 { FlagStatus pwrclkchanged = RESET; 800429a: 2300 movs r3, #0 800429c: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 800429e: 4b83 ldr r3, [pc, #524] @ (80044ac ) 80042a0: 6c1b ldr r3, [r3, #64] @ 0x40 80042a2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80042a6: 2b00 cmp r3, #0 80042a8: d10f bne.n 80042ca { __HAL_RCC_PWR_CLK_ENABLE(); 80042aa: 2300 movs r3, #0 80042ac: 60bb str r3, [r7, #8] 80042ae: 4b7f ldr r3, [pc, #508] @ (80044ac ) 80042b0: 6c1b ldr r3, [r3, #64] @ 0x40 80042b2: 4a7e ldr r2, [pc, #504] @ (80044ac ) 80042b4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80042b8: 6413 str r3, [r2, #64] @ 0x40 80042ba: 4b7c ldr r3, [pc, #496] @ (80044ac ) 80042bc: 6c1b ldr r3, [r3, #64] @ 0x40 80042be: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80042c2: 60bb str r3, [r7, #8] 80042c4: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 80042c6: 2301 movs r3, #1 80042c8: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80042ca: 4b79 ldr r3, [pc, #484] @ (80044b0 ) 80042cc: 681b ldr r3, [r3, #0] 80042ce: f403 7380 and.w r3, r3, #256 @ 0x100 80042d2: 2b00 cmp r3, #0 80042d4: d118 bne.n 8004308 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 80042d6: 4b76 ldr r3, [pc, #472] @ (80044b0 ) 80042d8: 681b ldr r3, [r3, #0] 80042da: 4a75 ldr r2, [pc, #468] @ (80044b0 ) 80042dc: f443 7380 orr.w r3, r3, #256 @ 0x100 80042e0: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 80042e2: f7fd f8c1 bl 8001468 80042e6: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80042e8: e008 b.n 80042fc { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 80042ea: f7fd f8bd bl 8001468 80042ee: 4602 mov r2, r0 80042f0: 693b ldr r3, [r7, #16] 80042f2: 1ad3 subs r3, r2, r3 80042f4: 2b02 cmp r3, #2 80042f6: d901 bls.n 80042fc { return HAL_TIMEOUT; 80042f8: 2303 movs r3, #3 80042fa: e118 b.n 800452e while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 80042fc: 4b6c ldr r3, [pc, #432] @ (80044b0 ) 80042fe: 681b ldr r3, [r3, #0] 8004300: f403 7380 and.w r3, r3, #256 @ 0x100 8004304: 2b00 cmp r3, #0 8004306: d0f0 beq.n 80042ea } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8004308: 687b ldr r3, [r7, #4] 800430a: 689b ldr r3, [r3, #8] 800430c: 2b01 cmp r3, #1 800430e: d106 bne.n 800431e 8004310: 4b66 ldr r3, [pc, #408] @ (80044ac ) 8004312: 6f1b ldr r3, [r3, #112] @ 0x70 8004314: 4a65 ldr r2, [pc, #404] @ (80044ac ) 8004316: f043 0301 orr.w r3, r3, #1 800431a: 6713 str r3, [r2, #112] @ 0x70 800431c: e01c b.n 8004358 800431e: 687b ldr r3, [r7, #4] 8004320: 689b ldr r3, [r3, #8] 8004322: 2b05 cmp r3, #5 8004324: d10c bne.n 8004340 8004326: 4b61 ldr r3, [pc, #388] @ (80044ac ) 8004328: 6f1b ldr r3, [r3, #112] @ 0x70 800432a: 4a60 ldr r2, [pc, #384] @ (80044ac ) 800432c: f043 0304 orr.w r3, r3, #4 8004330: 6713 str r3, [r2, #112] @ 0x70 8004332: 4b5e ldr r3, [pc, #376] @ (80044ac ) 8004334: 6f1b ldr r3, [r3, #112] @ 0x70 8004336: 4a5d ldr r2, [pc, #372] @ (80044ac ) 8004338: f043 0301 orr.w r3, r3, #1 800433c: 6713 str r3, [r2, #112] @ 0x70 800433e: e00b b.n 8004358 8004340: 4b5a ldr r3, [pc, #360] @ (80044ac ) 8004342: 6f1b ldr r3, [r3, #112] @ 0x70 8004344: 4a59 ldr r2, [pc, #356] @ (80044ac ) 8004346: f023 0301 bic.w r3, r3, #1 800434a: 6713 str r3, [r2, #112] @ 0x70 800434c: 4b57 ldr r3, [pc, #348] @ (80044ac ) 800434e: 6f1b ldr r3, [r3, #112] @ 0x70 8004350: 4a56 ldr r2, [pc, #344] @ (80044ac ) 8004352: f023 0304 bic.w r3, r3, #4 8004356: 6713 str r3, [r2, #112] @ 0x70 /* Check the LSE State */ if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) 8004358: 687b ldr r3, [r7, #4] 800435a: 689b ldr r3, [r3, #8] 800435c: 2b00 cmp r3, #0 800435e: d015 beq.n 800438c { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8004360: f7fd f882 bl 8001468 8004364: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8004366: e00a b.n 800437e { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8004368: f7fd f87e bl 8001468 800436c: 4602 mov r2, r0 800436e: 693b ldr r3, [r7, #16] 8004370: 1ad3 subs r3, r2, r3 8004372: f241 3288 movw r2, #5000 @ 0x1388 8004376: 4293 cmp r3, r2 8004378: d901 bls.n 800437e { return HAL_TIMEOUT; 800437a: 2303 movs r3, #3 800437c: e0d7 b.n 800452e while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 800437e: 4b4b ldr r3, [pc, #300] @ (80044ac ) 8004380: 6f1b ldr r3, [r3, #112] @ 0x70 8004382: f003 0302 and.w r3, r3, #2 8004386: 2b00 cmp r3, #0 8004388: d0ee beq.n 8004368 800438a: e014 b.n 80043b6 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); 800438c: f7fd f86c bl 8001468 8004390: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8004392: e00a b.n 80043aa { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8004394: f7fd f868 bl 8001468 8004398: 4602 mov r2, r0 800439a: 693b ldr r3, [r7, #16] 800439c: 1ad3 subs r3, r2, r3 800439e: f241 3288 movw r2, #5000 @ 0x1388 80043a2: 4293 cmp r3, r2 80043a4: d901 bls.n 80043aa { return HAL_TIMEOUT; 80043a6: 2303 movs r3, #3 80043a8: e0c1 b.n 800452e while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 80043aa: 4b40 ldr r3, [pc, #256] @ (80044ac ) 80043ac: 6f1b ldr r3, [r3, #112] @ 0x70 80043ae: f003 0302 and.w r3, r3, #2 80043b2: 2b00 cmp r3, #0 80043b4: d1ee bne.n 8004394 } } } /* Restore clock configuration if changed */ if (pwrclkchanged == SET) 80043b6: 7dfb ldrb r3, [r7, #23] 80043b8: 2b01 cmp r3, #1 80043ba: d105 bne.n 80043c8 { __HAL_RCC_PWR_CLK_DISABLE(); 80043bc: 4b3b ldr r3, [pc, #236] @ (80044ac ) 80043be: 6c1b ldr r3, [r3, #64] @ 0x40 80043c0: 4a3a ldr r2, [pc, #232] @ (80044ac ) 80043c2: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 80043c6: 6413 str r3, [r2, #64] @ 0x40 } } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 80043c8: 687b ldr r3, [r7, #4] 80043ca: 699b ldr r3, [r3, #24] 80043cc: 2b00 cmp r3, #0 80043ce: f000 80ad beq.w 800452c { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) 80043d2: 4b36 ldr r3, [pc, #216] @ (80044ac ) 80043d4: 689b ldr r3, [r3, #8] 80043d6: f003 030c and.w r3, r3, #12 80043da: 2b08 cmp r3, #8 80043dc: d060 beq.n 80044a0 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 80043de: 687b ldr r3, [r7, #4] 80043e0: 699b ldr r3, [r3, #24] 80043e2: 2b02 cmp r3, #2 80043e4: d145 bne.n 8004472 assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 80043e6: 4b33 ldr r3, [pc, #204] @ (80044b4 ) 80043e8: 2200 movs r2, #0 80043ea: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 80043ec: f7fd f83c bl 8001468 80043f0: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 80043f2: e008 b.n 8004406 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80043f4: f7fd f838 bl 8001468 80043f8: 4602 mov r2, r0 80043fa: 693b ldr r3, [r7, #16] 80043fc: 1ad3 subs r3, r2, r3 80043fe: 2b02 cmp r3, #2 8004400: d901 bls.n 8004406 { return HAL_TIMEOUT; 8004402: 2303 movs r3, #3 8004404: e093 b.n 800452e while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8004406: 4b29 ldr r3, [pc, #164] @ (80044ac ) 8004408: 681b ldr r3, [r3, #0] 800440a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800440e: 2b00 cmp r3, #0 8004410: d1f0 bne.n 80043f4 } } /* Configure the main PLL clock source, multiplication and division factors. */ WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \ 8004412: 687b ldr r3, [r7, #4] 8004414: 69da ldr r2, [r3, #28] 8004416: 687b ldr r3, [r7, #4] 8004418: 6a1b ldr r3, [r3, #32] 800441a: 431a orrs r2, r3 800441c: 687b ldr r3, [r7, #4] 800441e: 6a5b ldr r3, [r3, #36] @ 0x24 8004420: 019b lsls r3, r3, #6 8004422: 431a orrs r2, r3 8004424: 687b ldr r3, [r7, #4] 8004426: 6a9b ldr r3, [r3, #40] @ 0x28 8004428: 085b lsrs r3, r3, #1 800442a: 3b01 subs r3, #1 800442c: 041b lsls r3, r3, #16 800442e: 431a orrs r2, r3 8004430: 687b ldr r3, [r7, #4] 8004432: 6adb ldr r3, [r3, #44] @ 0x2c 8004434: 061b lsls r3, r3, #24 8004436: 431a orrs r2, r3 8004438: 687b ldr r3, [r7, #4] 800443a: 6b1b ldr r3, [r3, #48] @ 0x30 800443c: 071b lsls r3, r3, #28 800443e: 491b ldr r1, [pc, #108] @ (80044ac ) 8004440: 4313 orrs r3, r2 8004442: 604b str r3, [r1, #4] (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \ (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \ (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos) | \ (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8004444: 4b1b ldr r3, [pc, #108] @ (80044b4 ) 8004446: 2201 movs r2, #1 8004448: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 800444a: f7fd f80d bl 8001468 800444e: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004450: e008 b.n 8004464 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8004452: f7fd f809 bl 8001468 8004456: 4602 mov r2, r0 8004458: 693b ldr r3, [r7, #16] 800445a: 1ad3 subs r3, r2, r3 800445c: 2b02 cmp r3, #2 800445e: d901 bls.n 8004464 { return HAL_TIMEOUT; 8004460: 2303 movs r3, #3 8004462: e064 b.n 800452e while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004464: 4b11 ldr r3, [pc, #68] @ (80044ac ) 8004466: 681b ldr r3, [r3, #0] 8004468: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800446c: 2b00 cmp r3, #0 800446e: d0f0 beq.n 8004452 8004470: e05c b.n 800452c } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8004472: 4b10 ldr r3, [pc, #64] @ (80044b4 ) 8004474: 2200 movs r2, #0 8004476: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8004478: f7fc fff6 bl 8001468 800447c: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800447e: e008 b.n 8004492 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8004480: f7fc fff2 bl 8001468 8004484: 4602 mov r2, r0 8004486: 693b ldr r3, [r7, #16] 8004488: 1ad3 subs r3, r2, r3 800448a: 2b02 cmp r3, #2 800448c: d901 bls.n 8004492 { return HAL_TIMEOUT; 800448e: 2303 movs r3, #3 8004490: e04d b.n 800452e while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8004492: 4b06 ldr r3, [pc, #24] @ (80044ac ) 8004494: 681b ldr r3, [r3, #0] 8004496: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800449a: 2b00 cmp r3, #0 800449c: d1f0 bne.n 8004480 800449e: e045 b.n 800452c } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 80044a0: 687b ldr r3, [r7, #4] 80044a2: 699b ldr r3, [r3, #24] 80044a4: 2b01 cmp r3, #1 80044a6: d107 bne.n 80044b8 { return HAL_ERROR; 80044a8: 2301 movs r3, #1 80044aa: e040 b.n 800452e 80044ac: 40023800 .word 0x40023800 80044b0: 40007000 .word 0x40007000 80044b4: 42470060 .word 0x42470060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->PLLCFGR; 80044b8: 4b1f ldr r3, [pc, #124] @ (8004538 ) 80044ba: 685b ldr r3, [r3, #4] 80044bc: 60fb str r3, [r7, #12] #if defined (RCC_PLLCFGR_PLLR) if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || 80044be: 687b ldr r3, [r7, #4] 80044c0: 699b ldr r3, [r3, #24] 80044c2: 2b01 cmp r3, #1 80044c4: d030 beq.n 8004528 (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80044c6: 68fb ldr r3, [r7, #12] 80044c8: f403 0280 and.w r2, r3, #4194304 @ 0x400000 80044cc: 687b ldr r3, [r7, #4] 80044ce: 69db ldr r3, [r3, #28] if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || 80044d0: 429a cmp r2, r3 80044d2: d129 bne.n 8004528 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || 80044d4: 68fb ldr r3, [r7, #12] 80044d6: f003 023f and.w r2, r3, #63 @ 0x3f 80044da: 687b ldr r3, [r7, #4] 80044dc: 6a1b ldr r3, [r3, #32] (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 80044de: 429a cmp r2, r3 80044e0: d122 bne.n 8004528 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || 80044e2: 68fa ldr r2, [r7, #12] 80044e4: f647 73c0 movw r3, #32704 @ 0x7fc0 80044e8: 4013 ands r3, r2 80044ea: 687a ldr r2, [r7, #4] 80044ec: 6a52 ldr r2, [r2, #36] @ 0x24 80044ee: 0192 lsls r2, r2, #6 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || 80044f0: 4293 cmp r3, r2 80044f2: d119 bne.n 8004528 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || 80044f4: 68fb ldr r3, [r7, #12] 80044f6: f403 3240 and.w r2, r3, #196608 @ 0x30000 80044fa: 687b ldr r3, [r7, #4] 80044fc: 6a9b ldr r3, [r3, #40] @ 0x28 80044fe: 085b lsrs r3, r3, #1 8004500: 3b01 subs r3, #1 8004502: 041b lsls r3, r3, #16 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || 8004504: 429a cmp r2, r3 8004506: d10f bne.n 8004528 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || 8004508: 68fb ldr r3, [r7, #12] 800450a: f003 6270 and.w r2, r3, #251658240 @ 0xf000000 800450e: 687b ldr r3, [r7, #4] 8004510: 6adb ldr r3, [r3, #44] @ 0x2c 8004512: 061b lsls r3, r3, #24 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || 8004514: 429a cmp r2, r3 8004516: d107 bne.n 8004528 (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))) 8004518: 68fb ldr r3, [r7, #12] 800451a: f003 42e0 and.w r2, r3, #1879048192 @ 0x70000000 800451e: 687b ldr r3, [r7, #4] 8004520: 6b1b ldr r3, [r3, #48] @ 0x30 8004522: 071b lsls r3, r3, #28 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || 8004524: 429a cmp r2, r3 8004526: d001 beq.n 800452c (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))) #endif /* RCC_PLLCFGR_PLLR */ { return HAL_ERROR; 8004528: 2301 movs r3, #1 800452a: e000 b.n 800452e } } } } return HAL_OK; 800452c: 2300 movs r3, #0 } 800452e: 4618 mov r0, r3 8004530: 3718 adds r7, #24 8004532: 46bd mov sp, r7 8004534: bd80 pop {r7, pc} 8004536: bf00 nop 8004538: 40023800 .word 0x40023800 0800453c : * Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init() * @param htim TIM Output Compare handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim) { 800453c: b580 push {r7, lr} 800453e: b082 sub sp, #8 8004540: af00 add r7, sp, #0 8004542: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8004544: 687b ldr r3, [r7, #4] 8004546: 2b00 cmp r3, #0 8004548: d101 bne.n 800454e { return HAL_ERROR; 800454a: 2301 movs r3, #1 800454c: e041 b.n 80045d2 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 800454e: 687b ldr r3, [r7, #4] 8004550: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8004554: b2db uxtb r3, r3 8004556: 2b00 cmp r3, #0 8004558: d106 bne.n 8004568 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 800455a: 687b ldr r3, [r7, #4] 800455c: 2200 movs r2, #0 800455e: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->OC_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_OC_MspInit(htim); 8004562: 6878 ldr r0, [r7, #4] 8004564: f7fc fcc8 bl 8000ef8 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8004568: 687b ldr r3, [r7, #4] 800456a: 2202 movs r2, #2 800456c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the Output Compare */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8004570: 687b ldr r3, [r7, #4] 8004572: 681a ldr r2, [r3, #0] 8004574: 687b ldr r3, [r7, #4] 8004576: 3304 adds r3, #4 8004578: 4619 mov r1, r3 800457a: 4610 mov r0, r2 800457c: f000 f930 bl 80047e0 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8004580: 687b ldr r3, [r7, #4] 8004582: 2201 movs r2, #1 8004584: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8004588: 687b ldr r3, [r7, #4] 800458a: 2201 movs r2, #1 800458c: f883 203e strb.w r2, [r3, #62] @ 0x3e 8004590: 687b ldr r3, [r7, #4] 8004592: 2201 movs r2, #1 8004594: f883 203f strb.w r2, [r3, #63] @ 0x3f 8004598: 687b ldr r3, [r7, #4] 800459a: 2201 movs r2, #1 800459c: f883 2040 strb.w r2, [r3, #64] @ 0x40 80045a0: 687b ldr r3, [r7, #4] 80045a2: 2201 movs r2, #1 80045a4: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 80045a8: 687b ldr r3, [r7, #4] 80045aa: 2201 movs r2, #1 80045ac: f883 2042 strb.w r2, [r3, #66] @ 0x42 80045b0: 687b ldr r3, [r7, #4] 80045b2: 2201 movs r2, #1 80045b4: f883 2043 strb.w r2, [r3, #67] @ 0x43 80045b8: 687b ldr r3, [r7, #4] 80045ba: 2201 movs r2, #1 80045bc: f883 2044 strb.w r2, [r3, #68] @ 0x44 80045c0: 687b ldr r3, [r7, #4] 80045c2: 2201 movs r2, #1 80045c4: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 80045c8: 687b ldr r3, [r7, #4] 80045ca: 2201 movs r2, #1 80045cc: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 80045d0: 2300 movs r3, #0 } 80045d2: 4618 mov r0, r3 80045d4: 3708 adds r7, #8 80045d6: 46bd mov sp, r7 80045d8: bd80 pop {r7, pc} 080045da : * @param htim TIM Encoder Interface handle * @param sConfig TIM Encoder Interface configuration structure * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig) { 80045da: b580 push {r7, lr} 80045dc: b086 sub sp, #24 80045de: af00 add r7, sp, #0 80045e0: 6078 str r0, [r7, #4] 80045e2: 6039 str r1, [r7, #0] uint32_t tmpsmcr; uint32_t tmpccmr1; uint32_t tmpccer; /* Check the TIM handle allocation */ if (htim == NULL) 80045e4: 687b ldr r3, [r7, #4] 80045e6: 2b00 cmp r3, #0 80045e8: d101 bne.n 80045ee { return HAL_ERROR; 80045ea: 2301 movs r3, #1 80045ec: e097 b.n 800471e assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); if (htim->State == HAL_TIM_STATE_RESET) 80045ee: 687b ldr r3, [r7, #4] 80045f0: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 80045f4: b2db uxtb r3, r3 80045f6: 2b00 cmp r3, #0 80045f8: d106 bne.n 8004608 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 80045fa: 687b ldr r3, [r7, #4] 80045fc: 2200 movs r2, #0 80045fe: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Encoder_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_Encoder_MspInit(htim); 8004602: 6878 ldr r0, [r7, #4] 8004604: f7fc fc98 bl 8000f38 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8004608: 687b ldr r3, [r7, #4] 800460a: 2202 movs r2, #2 800460c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Reset the SMS and ECE bits */ htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); 8004610: 687b ldr r3, [r7, #4] 8004612: 681b ldr r3, [r3, #0] 8004614: 689b ldr r3, [r3, #8] 8004616: 687a ldr r2, [r7, #4] 8004618: 6812 ldr r2, [r2, #0] 800461a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 800461e: f023 0307 bic.w r3, r3, #7 8004622: 6093 str r3, [r2, #8] /* Configure the Time base in the Encoder Mode */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8004624: 687b ldr r3, [r7, #4] 8004626: 681a ldr r2, [r3, #0] 8004628: 687b ldr r3, [r7, #4] 800462a: 3304 adds r3, #4 800462c: 4619 mov r1, r3 800462e: 4610 mov r0, r2 8004630: f000 f8d6 bl 80047e0 /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 8004634: 687b ldr r3, [r7, #4] 8004636: 681b ldr r3, [r3, #0] 8004638: 689b ldr r3, [r3, #8] 800463a: 617b str r3, [r7, #20] /* Get the TIMx CCMR1 register value */ tmpccmr1 = htim->Instance->CCMR1; 800463c: 687b ldr r3, [r7, #4] 800463e: 681b ldr r3, [r3, #0] 8004640: 699b ldr r3, [r3, #24] 8004642: 613b str r3, [r7, #16] /* Get the TIMx CCER register value */ tmpccer = htim->Instance->CCER; 8004644: 687b ldr r3, [r7, #4] 8004646: 681b ldr r3, [r3, #0] 8004648: 6a1b ldr r3, [r3, #32] 800464a: 60fb str r3, [r7, #12] /* Set the encoder Mode */ tmpsmcr |= sConfig->EncoderMode; 800464c: 683b ldr r3, [r7, #0] 800464e: 681b ldr r3, [r3, #0] 8004650: 697a ldr r2, [r7, #20] 8004652: 4313 orrs r3, r2 8004654: 617b str r3, [r7, #20] /* Select the Capture Compare 1 and the Capture Compare 2 as input */ tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); 8004656: 693b ldr r3, [r7, #16] 8004658: f423 7340 bic.w r3, r3, #768 @ 0x300 800465c: f023 0303 bic.w r3, r3, #3 8004660: 613b str r3, [r7, #16] tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); 8004662: 683b ldr r3, [r7, #0] 8004664: 689a ldr r2, [r3, #8] 8004666: 683b ldr r3, [r7, #0] 8004668: 699b ldr r3, [r3, #24] 800466a: 021b lsls r3, r3, #8 800466c: 4313 orrs r3, r2 800466e: 693a ldr r2, [r7, #16] 8004670: 4313 orrs r3, r2 8004672: 613b str r3, [r7, #16] /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); 8004674: 693b ldr r3, [r7, #16] 8004676: f423 6340 bic.w r3, r3, #3072 @ 0xc00 800467a: f023 030c bic.w r3, r3, #12 800467e: 613b str r3, [r7, #16] tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); 8004680: 693b ldr r3, [r7, #16] 8004682: f423 4370 bic.w r3, r3, #61440 @ 0xf000 8004686: f023 03f0 bic.w r3, r3, #240 @ 0xf0 800468a: 613b str r3, [r7, #16] tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); 800468c: 683b ldr r3, [r7, #0] 800468e: 68da ldr r2, [r3, #12] 8004690: 683b ldr r3, [r7, #0] 8004692: 69db ldr r3, [r3, #28] 8004694: 021b lsls r3, r3, #8 8004696: 4313 orrs r3, r2 8004698: 693a ldr r2, [r7, #16] 800469a: 4313 orrs r3, r2 800469c: 613b str r3, [r7, #16] tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); 800469e: 683b ldr r3, [r7, #0] 80046a0: 691b ldr r3, [r3, #16] 80046a2: 011a lsls r2, r3, #4 80046a4: 683b ldr r3, [r7, #0] 80046a6: 6a1b ldr r3, [r3, #32] 80046a8: 031b lsls r3, r3, #12 80046aa: 4313 orrs r3, r2 80046ac: 693a ldr r2, [r7, #16] 80046ae: 4313 orrs r3, r2 80046b0: 613b str r3, [r7, #16] /* Set the TI1 and the TI2 Polarities */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); 80046b2: 68fb ldr r3, [r7, #12] 80046b4: f023 0322 bic.w r3, r3, #34 @ 0x22 80046b8: 60fb str r3, [r7, #12] tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); 80046ba: 68fb ldr r3, [r7, #12] 80046bc: f023 0388 bic.w r3, r3, #136 @ 0x88 80046c0: 60fb str r3, [r7, #12] tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); 80046c2: 683b ldr r3, [r7, #0] 80046c4: 685a ldr r2, [r3, #4] 80046c6: 683b ldr r3, [r7, #0] 80046c8: 695b ldr r3, [r3, #20] 80046ca: 011b lsls r3, r3, #4 80046cc: 4313 orrs r3, r2 80046ce: 68fa ldr r2, [r7, #12] 80046d0: 4313 orrs r3, r2 80046d2: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 80046d4: 687b ldr r3, [r7, #4] 80046d6: 681b ldr r3, [r3, #0] 80046d8: 697a ldr r2, [r7, #20] 80046da: 609a str r2, [r3, #8] /* Write to TIMx CCMR1 */ htim->Instance->CCMR1 = tmpccmr1; 80046dc: 687b ldr r3, [r7, #4] 80046de: 681b ldr r3, [r3, #0] 80046e0: 693a ldr r2, [r7, #16] 80046e2: 619a str r2, [r3, #24] /* Write to TIMx CCER */ htim->Instance->CCER = tmpccer; 80046e4: 687b ldr r3, [r7, #4] 80046e6: 681b ldr r3, [r3, #0] 80046e8: 68fa ldr r2, [r7, #12] 80046ea: 621a str r2, [r3, #32] /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 80046ec: 687b ldr r3, [r7, #4] 80046ee: 2201 movs r2, #1 80046f0: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Set the TIM channels state */ TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 80046f4: 687b ldr r3, [r7, #4] 80046f6: 2201 movs r2, #1 80046f8: f883 203e strb.w r2, [r3, #62] @ 0x3e TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 80046fc: 687b ldr r3, [r7, #4] 80046fe: 2201 movs r2, #1 8004700: f883 203f strb.w r2, [r3, #63] @ 0x3f TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 8004704: 687b ldr r3, [r7, #4] 8004706: 2201 movs r2, #1 8004708: f883 2042 strb.w r2, [r3, #66] @ 0x42 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 800470c: 687b ldr r3, [r7, #4] 800470e: 2201 movs r2, #1 8004710: f883 2043 strb.w r2, [r3, #67] @ 0x43 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8004714: 687b ldr r3, [r7, #4] 8004716: 2201 movs r2, #1 8004718: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 800471c: 2300 movs r3, #0 } 800471e: 4618 mov r0, r3 8004720: 3718 adds r7, #24 8004722: 46bd mov sp, r7 8004724: bd80 pop {r7, pc} ... 08004728 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 8004728: b580 push {r7, lr} 800472a: b086 sub sp, #24 800472c: af00 add r7, sp, #0 800472e: 60f8 str r0, [r7, #12] 8004730: 60b9 str r1, [r7, #8] 8004732: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8004734: 2300 movs r3, #0 8004736: 75fb strb r3, [r7, #23] assert_param(IS_TIM_CHANNELS(Channel)); assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); /* Process Locked */ __HAL_LOCK(htim); 8004738: 68fb ldr r3, [r7, #12] 800473a: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 800473e: 2b01 cmp r3, #1 8004740: d101 bne.n 8004746 8004742: 2302 movs r3, #2 8004744: e048 b.n 80047d8 8004746: 68fb ldr r3, [r7, #12] 8004748: 2201 movs r2, #1 800474a: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 800474e: 687b ldr r3, [r7, #4] 8004750: 2b0c cmp r3, #12 8004752: d839 bhi.n 80047c8 8004754: a201 add r2, pc, #4 @ (adr r2, 800475c ) 8004756: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800475a: bf00 nop 800475c: 08004791 .word 0x08004791 8004760: 080047c9 .word 0x080047c9 8004764: 080047c9 .word 0x080047c9 8004768: 080047c9 .word 0x080047c9 800476c: 0800479f .word 0x0800479f 8004770: 080047c9 .word 0x080047c9 8004774: 080047c9 .word 0x080047c9 8004778: 080047c9 .word 0x080047c9 800477c: 080047ad .word 0x080047ad 8004780: 080047c9 .word 0x080047c9 8004784: 080047c9 .word 0x080047c9 8004788: 080047c9 .word 0x080047c9 800478c: 080047bb .word 0x080047bb { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the TIM Channel 1 in Output Compare */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8004790: 68fb ldr r3, [r7, #12] 8004792: 681b ldr r3, [r3, #0] 8004794: 68b9 ldr r1, [r7, #8] 8004796: 4618 mov r0, r3 8004798: f000 f8c8 bl 800492c break; 800479c: e017 b.n 80047ce { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the TIM Channel 2 in Output Compare */ TIM_OC2_SetConfig(htim->Instance, sConfig); 800479e: 68fb ldr r3, [r7, #12] 80047a0: 681b ldr r3, [r3, #0] 80047a2: 68b9 ldr r1, [r7, #8] 80047a4: 4618 mov r0, r3 80047a6: f000 f931 bl 8004a0c break; 80047aa: e010 b.n 80047ce { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the TIM Channel 3 in Output Compare */ TIM_OC3_SetConfig(htim->Instance, sConfig); 80047ac: 68fb ldr r3, [r7, #12] 80047ae: 681b ldr r3, [r3, #0] 80047b0: 68b9 ldr r1, [r7, #8] 80047b2: 4618 mov r0, r3 80047b4: f000 f9a0 bl 8004af8 break; 80047b8: e009 b.n 80047ce { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the TIM Channel 4 in Output Compare */ TIM_OC4_SetConfig(htim->Instance, sConfig); 80047ba: 68fb ldr r3, [r7, #12] 80047bc: 681b ldr r3, [r3, #0] 80047be: 68b9 ldr r1, [r7, #8] 80047c0: 4618 mov r0, r3 80047c2: f000 fa0d bl 8004be0 break; 80047c6: e002 b.n 80047ce } default: status = HAL_ERROR; 80047c8: 2301 movs r3, #1 80047ca: 75fb strb r3, [r7, #23] break; 80047cc: bf00 nop } __HAL_UNLOCK(htim); 80047ce: 68fb ldr r3, [r7, #12] 80047d0: 2200 movs r2, #0 80047d2: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 80047d6: 7dfb ldrb r3, [r7, #23] } 80047d8: 4618 mov r0, r3 80047da: 3718 adds r7, #24 80047dc: 46bd mov sp, r7 80047de: bd80 pop {r7, pc} 080047e0 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 80047e0: b480 push {r7} 80047e2: b085 sub sp, #20 80047e4: af00 add r7, sp, #0 80047e6: 6078 str r0, [r7, #4] 80047e8: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 80047ea: 687b ldr r3, [r7, #4] 80047ec: 681b ldr r3, [r3, #0] 80047ee: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 80047f0: 687b ldr r3, [r7, #4] 80047f2: 4a43 ldr r2, [pc, #268] @ (8004900 ) 80047f4: 4293 cmp r3, r2 80047f6: d013 beq.n 8004820 80047f8: 687b ldr r3, [r7, #4] 80047fa: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80047fe: d00f beq.n 8004820 8004800: 687b ldr r3, [r7, #4] 8004802: 4a40 ldr r2, [pc, #256] @ (8004904 ) 8004804: 4293 cmp r3, r2 8004806: d00b beq.n 8004820 8004808: 687b ldr r3, [r7, #4] 800480a: 4a3f ldr r2, [pc, #252] @ (8004908 ) 800480c: 4293 cmp r3, r2 800480e: d007 beq.n 8004820 8004810: 687b ldr r3, [r7, #4] 8004812: 4a3e ldr r2, [pc, #248] @ (800490c ) 8004814: 4293 cmp r3, r2 8004816: d003 beq.n 8004820 8004818: 687b ldr r3, [r7, #4] 800481a: 4a3d ldr r2, [pc, #244] @ (8004910 ) 800481c: 4293 cmp r3, r2 800481e: d108 bne.n 8004832 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8004820: 68fb ldr r3, [r7, #12] 8004822: f023 0370 bic.w r3, r3, #112 @ 0x70 8004826: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 8004828: 683b ldr r3, [r7, #0] 800482a: 685b ldr r3, [r3, #4] 800482c: 68fa ldr r2, [r7, #12] 800482e: 4313 orrs r3, r2 8004830: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8004832: 687b ldr r3, [r7, #4] 8004834: 4a32 ldr r2, [pc, #200] @ (8004900 ) 8004836: 4293 cmp r3, r2 8004838: d02b beq.n 8004892 800483a: 687b ldr r3, [r7, #4] 800483c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8004840: d027 beq.n 8004892 8004842: 687b ldr r3, [r7, #4] 8004844: 4a2f ldr r2, [pc, #188] @ (8004904 ) 8004846: 4293 cmp r3, r2 8004848: d023 beq.n 8004892 800484a: 687b ldr r3, [r7, #4] 800484c: 4a2e ldr r2, [pc, #184] @ (8004908 ) 800484e: 4293 cmp r3, r2 8004850: d01f beq.n 8004892 8004852: 687b ldr r3, [r7, #4] 8004854: 4a2d ldr r2, [pc, #180] @ (800490c ) 8004856: 4293 cmp r3, r2 8004858: d01b beq.n 8004892 800485a: 687b ldr r3, [r7, #4] 800485c: 4a2c ldr r2, [pc, #176] @ (8004910 ) 800485e: 4293 cmp r3, r2 8004860: d017 beq.n 8004892 8004862: 687b ldr r3, [r7, #4] 8004864: 4a2b ldr r2, [pc, #172] @ (8004914 ) 8004866: 4293 cmp r3, r2 8004868: d013 beq.n 8004892 800486a: 687b ldr r3, [r7, #4] 800486c: 4a2a ldr r2, [pc, #168] @ (8004918 ) 800486e: 4293 cmp r3, r2 8004870: d00f beq.n 8004892 8004872: 687b ldr r3, [r7, #4] 8004874: 4a29 ldr r2, [pc, #164] @ (800491c ) 8004876: 4293 cmp r3, r2 8004878: d00b beq.n 8004892 800487a: 687b ldr r3, [r7, #4] 800487c: 4a28 ldr r2, [pc, #160] @ (8004920 ) 800487e: 4293 cmp r3, r2 8004880: d007 beq.n 8004892 8004882: 687b ldr r3, [r7, #4] 8004884: 4a27 ldr r2, [pc, #156] @ (8004924 ) 8004886: 4293 cmp r3, r2 8004888: d003 beq.n 8004892 800488a: 687b ldr r3, [r7, #4] 800488c: 4a26 ldr r2, [pc, #152] @ (8004928 ) 800488e: 4293 cmp r3, r2 8004890: d108 bne.n 80048a4 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 8004892: 68fb ldr r3, [r7, #12] 8004894: f423 7340 bic.w r3, r3, #768 @ 0x300 8004898: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 800489a: 683b ldr r3, [r7, #0] 800489c: 68db ldr r3, [r3, #12] 800489e: 68fa ldr r2, [r7, #12] 80048a0: 4313 orrs r3, r2 80048a2: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 80048a4: 68fb ldr r3, [r7, #12] 80048a6: f023 0280 bic.w r2, r3, #128 @ 0x80 80048aa: 683b ldr r3, [r7, #0] 80048ac: 695b ldr r3, [r3, #20] 80048ae: 4313 orrs r3, r2 80048b0: 60fb str r3, [r7, #12] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 80048b2: 683b ldr r3, [r7, #0] 80048b4: 689a ldr r2, [r3, #8] 80048b6: 687b ldr r3, [r7, #4] 80048b8: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 80048ba: 683b ldr r3, [r7, #0] 80048bc: 681a ldr r2, [r3, #0] 80048be: 687b ldr r3, [r7, #4] 80048c0: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 80048c2: 687b ldr r3, [r7, #4] 80048c4: 4a0e ldr r2, [pc, #56] @ (8004900 ) 80048c6: 4293 cmp r3, r2 80048c8: d003 beq.n 80048d2 80048ca: 687b ldr r3, [r7, #4] 80048cc: 4a10 ldr r2, [pc, #64] @ (8004910 ) 80048ce: 4293 cmp r3, r2 80048d0: d103 bne.n 80048da { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 80048d2: 683b ldr r3, [r7, #0] 80048d4: 691a ldr r2, [r3, #16] 80048d6: 687b ldr r3, [r7, #4] 80048d8: 631a str r2, [r3, #48] @ 0x30 } /* Disable Update Event (UEV) with Update Generation (UG) by changing Update Request Source (URS) to avoid Update flag (UIF) */ SET_BIT(TIMx->CR1, TIM_CR1_URS); 80048da: 687b ldr r3, [r7, #4] 80048dc: 681b ldr r3, [r3, #0] 80048de: f043 0204 orr.w r2, r3, #4 80048e2: 687b ldr r3, [r7, #4] 80048e4: 601a str r2, [r3, #0] /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 80048e6: 687b ldr r3, [r7, #4] 80048e8: 2201 movs r2, #1 80048ea: 615a str r2, [r3, #20] TIMx->CR1 = tmpcr1; 80048ec: 687b ldr r3, [r7, #4] 80048ee: 68fa ldr r2, [r7, #12] 80048f0: 601a str r2, [r3, #0] } 80048f2: bf00 nop 80048f4: 3714 adds r7, #20 80048f6: 46bd mov sp, r7 80048f8: f85d 7b04 ldr.w r7, [sp], #4 80048fc: 4770 bx lr 80048fe: bf00 nop 8004900: 40010000 .word 0x40010000 8004904: 40000400 .word 0x40000400 8004908: 40000800 .word 0x40000800 800490c: 40000c00 .word 0x40000c00 8004910: 40010400 .word 0x40010400 8004914: 40014000 .word 0x40014000 8004918: 40014400 .word 0x40014400 800491c: 40014800 .word 0x40014800 8004920: 40001800 .word 0x40001800 8004924: 40001c00 .word 0x40001c00 8004928: 40002000 .word 0x40002000 0800492c : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 800492c: b480 push {r7} 800492e: b087 sub sp, #28 8004930: af00 add r7, sp, #0 8004932: 6078 str r0, [r7, #4] 8004934: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8004936: 687b ldr r3, [r7, #4] 8004938: 6a1b ldr r3, [r3, #32] 800493a: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 800493c: 687b ldr r3, [r7, #4] 800493e: 6a1b ldr r3, [r3, #32] 8004940: f023 0201 bic.w r2, r3, #1 8004944: 687b ldr r3, [r7, #4] 8004946: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8004948: 687b ldr r3, [r7, #4] 800494a: 685b ldr r3, [r3, #4] 800494c: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 800494e: 687b ldr r3, [r7, #4] 8004950: 699b ldr r3, [r3, #24] 8004952: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 8004954: 68fb ldr r3, [r7, #12] 8004956: f023 0370 bic.w r3, r3, #112 @ 0x70 800495a: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 800495c: 68fb ldr r3, [r7, #12] 800495e: f023 0303 bic.w r3, r3, #3 8004962: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8004964: 683b ldr r3, [r7, #0] 8004966: 681b ldr r3, [r3, #0] 8004968: 68fa ldr r2, [r7, #12] 800496a: 4313 orrs r3, r2 800496c: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 800496e: 697b ldr r3, [r7, #20] 8004970: f023 0302 bic.w r3, r3, #2 8004974: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 8004976: 683b ldr r3, [r7, #0] 8004978: 689b ldr r3, [r3, #8] 800497a: 697a ldr r2, [r7, #20] 800497c: 4313 orrs r3, r2 800497e: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 8004980: 687b ldr r3, [r7, #4] 8004982: 4a20 ldr r2, [pc, #128] @ (8004a04 ) 8004984: 4293 cmp r3, r2 8004986: d003 beq.n 8004990 8004988: 687b ldr r3, [r7, #4] 800498a: 4a1f ldr r2, [pc, #124] @ (8004a08 ) 800498c: 4293 cmp r3, r2 800498e: d10c bne.n 80049aa { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 8004990: 697b ldr r3, [r7, #20] 8004992: f023 0308 bic.w r3, r3, #8 8004996: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 8004998: 683b ldr r3, [r7, #0] 800499a: 68db ldr r3, [r3, #12] 800499c: 697a ldr r2, [r7, #20] 800499e: 4313 orrs r3, r2 80049a0: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 80049a2: 697b ldr r3, [r7, #20] 80049a4: f023 0304 bic.w r3, r3, #4 80049a8: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 80049aa: 687b ldr r3, [r7, #4] 80049ac: 4a15 ldr r2, [pc, #84] @ (8004a04 ) 80049ae: 4293 cmp r3, r2 80049b0: d003 beq.n 80049ba 80049b2: 687b ldr r3, [r7, #4] 80049b4: 4a14 ldr r2, [pc, #80] @ (8004a08 ) 80049b6: 4293 cmp r3, r2 80049b8: d111 bne.n 80049de /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 80049ba: 693b ldr r3, [r7, #16] 80049bc: f423 7380 bic.w r3, r3, #256 @ 0x100 80049c0: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 80049c2: 693b ldr r3, [r7, #16] 80049c4: f423 7300 bic.w r3, r3, #512 @ 0x200 80049c8: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 80049ca: 683b ldr r3, [r7, #0] 80049cc: 695b ldr r3, [r3, #20] 80049ce: 693a ldr r2, [r7, #16] 80049d0: 4313 orrs r3, r2 80049d2: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 80049d4: 683b ldr r3, [r7, #0] 80049d6: 699b ldr r3, [r3, #24] 80049d8: 693a ldr r2, [r7, #16] 80049da: 4313 orrs r3, r2 80049dc: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 80049de: 687b ldr r3, [r7, #4] 80049e0: 693a ldr r2, [r7, #16] 80049e2: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 80049e4: 687b ldr r3, [r7, #4] 80049e6: 68fa ldr r2, [r7, #12] 80049e8: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 80049ea: 683b ldr r3, [r7, #0] 80049ec: 685a ldr r2, [r3, #4] 80049ee: 687b ldr r3, [r7, #4] 80049f0: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80049f2: 687b ldr r3, [r7, #4] 80049f4: 697a ldr r2, [r7, #20] 80049f6: 621a str r2, [r3, #32] } 80049f8: bf00 nop 80049fa: 371c adds r7, #28 80049fc: 46bd mov sp, r7 80049fe: f85d 7b04 ldr.w r7, [sp], #4 8004a02: 4770 bx lr 8004a04: 40010000 .word 0x40010000 8004a08: 40010400 .word 0x40010400 08004a0c : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8004a0c: b480 push {r7} 8004a0e: b087 sub sp, #28 8004a10: af00 add r7, sp, #0 8004a12: 6078 str r0, [r7, #4] 8004a14: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8004a16: 687b ldr r3, [r7, #4] 8004a18: 6a1b ldr r3, [r3, #32] 8004a1a: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 8004a1c: 687b ldr r3, [r7, #4] 8004a1e: 6a1b ldr r3, [r3, #32] 8004a20: f023 0210 bic.w r2, r3, #16 8004a24: 687b ldr r3, [r7, #4] 8004a26: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8004a28: 687b ldr r3, [r7, #4] 8004a2a: 685b ldr r3, [r3, #4] 8004a2c: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 8004a2e: 687b ldr r3, [r7, #4] 8004a30: 699b ldr r3, [r3, #24] 8004a32: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 8004a34: 68fb ldr r3, [r7, #12] 8004a36: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004a3a: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 8004a3c: 68fb ldr r3, [r7, #12] 8004a3e: f423 7340 bic.w r3, r3, #768 @ 0x300 8004a42: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8004a44: 683b ldr r3, [r7, #0] 8004a46: 681b ldr r3, [r3, #0] 8004a48: 021b lsls r3, r3, #8 8004a4a: 68fa ldr r2, [r7, #12] 8004a4c: 4313 orrs r3, r2 8004a4e: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 8004a50: 697b ldr r3, [r7, #20] 8004a52: f023 0320 bic.w r3, r3, #32 8004a56: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 8004a58: 683b ldr r3, [r7, #0] 8004a5a: 689b ldr r3, [r3, #8] 8004a5c: 011b lsls r3, r3, #4 8004a5e: 697a ldr r2, [r7, #20] 8004a60: 4313 orrs r3, r2 8004a62: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 8004a64: 687b ldr r3, [r7, #4] 8004a66: 4a22 ldr r2, [pc, #136] @ (8004af0 ) 8004a68: 4293 cmp r3, r2 8004a6a: d003 beq.n 8004a74 8004a6c: 687b ldr r3, [r7, #4] 8004a6e: 4a21 ldr r2, [pc, #132] @ (8004af4 ) 8004a70: 4293 cmp r3, r2 8004a72: d10d bne.n 8004a90 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 8004a74: 697b ldr r3, [r7, #20] 8004a76: f023 0380 bic.w r3, r3, #128 @ 0x80 8004a7a: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 8004a7c: 683b ldr r3, [r7, #0] 8004a7e: 68db ldr r3, [r3, #12] 8004a80: 011b lsls r3, r3, #4 8004a82: 697a ldr r2, [r7, #20] 8004a84: 4313 orrs r3, r2 8004a86: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 8004a88: 697b ldr r3, [r7, #20] 8004a8a: f023 0340 bic.w r3, r3, #64 @ 0x40 8004a8e: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8004a90: 687b ldr r3, [r7, #4] 8004a92: 4a17 ldr r2, [pc, #92] @ (8004af0 ) 8004a94: 4293 cmp r3, r2 8004a96: d003 beq.n 8004aa0 8004a98: 687b ldr r3, [r7, #4] 8004a9a: 4a16 ldr r2, [pc, #88] @ (8004af4 ) 8004a9c: 4293 cmp r3, r2 8004a9e: d113 bne.n 8004ac8 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 8004aa0: 693b ldr r3, [r7, #16] 8004aa2: f423 6380 bic.w r3, r3, #1024 @ 0x400 8004aa6: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 8004aa8: 693b ldr r3, [r7, #16] 8004aaa: f423 6300 bic.w r3, r3, #2048 @ 0x800 8004aae: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 8004ab0: 683b ldr r3, [r7, #0] 8004ab2: 695b ldr r3, [r3, #20] 8004ab4: 009b lsls r3, r3, #2 8004ab6: 693a ldr r2, [r7, #16] 8004ab8: 4313 orrs r3, r2 8004aba: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 8004abc: 683b ldr r3, [r7, #0] 8004abe: 699b ldr r3, [r3, #24] 8004ac0: 009b lsls r3, r3, #2 8004ac2: 693a ldr r2, [r7, #16] 8004ac4: 4313 orrs r3, r2 8004ac6: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8004ac8: 687b ldr r3, [r7, #4] 8004aca: 693a ldr r2, [r7, #16] 8004acc: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8004ace: 687b ldr r3, [r7, #4] 8004ad0: 68fa ldr r2, [r7, #12] 8004ad2: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 8004ad4: 683b ldr r3, [r7, #0] 8004ad6: 685a ldr r2, [r3, #4] 8004ad8: 687b ldr r3, [r7, #4] 8004ada: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8004adc: 687b ldr r3, [r7, #4] 8004ade: 697a ldr r2, [r7, #20] 8004ae0: 621a str r2, [r3, #32] } 8004ae2: bf00 nop 8004ae4: 371c adds r7, #28 8004ae6: 46bd mov sp, r7 8004ae8: f85d 7b04 ldr.w r7, [sp], #4 8004aec: 4770 bx lr 8004aee: bf00 nop 8004af0: 40010000 .word 0x40010000 8004af4: 40010400 .word 0x40010400 08004af8 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8004af8: b480 push {r7} 8004afa: b087 sub sp, #28 8004afc: af00 add r7, sp, #0 8004afe: 6078 str r0, [r7, #4] 8004b00: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8004b02: 687b ldr r3, [r7, #4] 8004b04: 6a1b ldr r3, [r3, #32] 8004b06: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 8004b08: 687b ldr r3, [r7, #4] 8004b0a: 6a1b ldr r3, [r3, #32] 8004b0c: f423 7280 bic.w r2, r3, #256 @ 0x100 8004b10: 687b ldr r3, [r7, #4] 8004b12: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8004b14: 687b ldr r3, [r7, #4] 8004b16: 685b ldr r3, [r3, #4] 8004b18: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8004b1a: 687b ldr r3, [r7, #4] 8004b1c: 69db ldr r3, [r3, #28] 8004b1e: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 8004b20: 68fb ldr r3, [r7, #12] 8004b22: f023 0370 bic.w r3, r3, #112 @ 0x70 8004b26: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 8004b28: 68fb ldr r3, [r7, #12] 8004b2a: f023 0303 bic.w r3, r3, #3 8004b2e: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8004b30: 683b ldr r3, [r7, #0] 8004b32: 681b ldr r3, [r3, #0] 8004b34: 68fa ldr r2, [r7, #12] 8004b36: 4313 orrs r3, r2 8004b38: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 8004b3a: 697b ldr r3, [r7, #20] 8004b3c: f423 7300 bic.w r3, r3, #512 @ 0x200 8004b40: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 8004b42: 683b ldr r3, [r7, #0] 8004b44: 689b ldr r3, [r3, #8] 8004b46: 021b lsls r3, r3, #8 8004b48: 697a ldr r2, [r7, #20] 8004b4a: 4313 orrs r3, r2 8004b4c: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 8004b4e: 687b ldr r3, [r7, #4] 8004b50: 4a21 ldr r2, [pc, #132] @ (8004bd8 ) 8004b52: 4293 cmp r3, r2 8004b54: d003 beq.n 8004b5e 8004b56: 687b ldr r3, [r7, #4] 8004b58: 4a20 ldr r2, [pc, #128] @ (8004bdc ) 8004b5a: 4293 cmp r3, r2 8004b5c: d10d bne.n 8004b7a { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 8004b5e: 697b ldr r3, [r7, #20] 8004b60: f423 6300 bic.w r3, r3, #2048 @ 0x800 8004b64: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 8004b66: 683b ldr r3, [r7, #0] 8004b68: 68db ldr r3, [r3, #12] 8004b6a: 021b lsls r3, r3, #8 8004b6c: 697a ldr r2, [r7, #20] 8004b6e: 4313 orrs r3, r2 8004b70: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 8004b72: 697b ldr r3, [r7, #20] 8004b74: f423 6380 bic.w r3, r3, #1024 @ 0x400 8004b78: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8004b7a: 687b ldr r3, [r7, #4] 8004b7c: 4a16 ldr r2, [pc, #88] @ (8004bd8 ) 8004b7e: 4293 cmp r3, r2 8004b80: d003 beq.n 8004b8a 8004b82: 687b ldr r3, [r7, #4] 8004b84: 4a15 ldr r2, [pc, #84] @ (8004bdc ) 8004b86: 4293 cmp r3, r2 8004b88: d113 bne.n 8004bb2 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 8004b8a: 693b ldr r3, [r7, #16] 8004b8c: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8004b90: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 8004b92: 693b ldr r3, [r7, #16] 8004b94: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8004b98: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 8004b9a: 683b ldr r3, [r7, #0] 8004b9c: 695b ldr r3, [r3, #20] 8004b9e: 011b lsls r3, r3, #4 8004ba0: 693a ldr r2, [r7, #16] 8004ba2: 4313 orrs r3, r2 8004ba4: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 8004ba6: 683b ldr r3, [r7, #0] 8004ba8: 699b ldr r3, [r3, #24] 8004baa: 011b lsls r3, r3, #4 8004bac: 693a ldr r2, [r7, #16] 8004bae: 4313 orrs r3, r2 8004bb0: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8004bb2: 687b ldr r3, [r7, #4] 8004bb4: 693a ldr r2, [r7, #16] 8004bb6: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8004bb8: 687b ldr r3, [r7, #4] 8004bba: 68fa ldr r2, [r7, #12] 8004bbc: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 8004bbe: 683b ldr r3, [r7, #0] 8004bc0: 685a ldr r2, [r3, #4] 8004bc2: 687b ldr r3, [r7, #4] 8004bc4: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8004bc6: 687b ldr r3, [r7, #4] 8004bc8: 697a ldr r2, [r7, #20] 8004bca: 621a str r2, [r3, #32] } 8004bcc: bf00 nop 8004bce: 371c adds r7, #28 8004bd0: 46bd mov sp, r7 8004bd2: f85d 7b04 ldr.w r7, [sp], #4 8004bd6: 4770 bx lr 8004bd8: 40010000 .word 0x40010000 8004bdc: 40010400 .word 0x40010400 08004be0 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8004be0: b480 push {r7} 8004be2: b087 sub sp, #28 8004be4: af00 add r7, sp, #0 8004be6: 6078 str r0, [r7, #4] 8004be8: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 8004bea: 687b ldr r3, [r7, #4] 8004bec: 6a1b ldr r3, [r3, #32] 8004bee: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 8004bf0: 687b ldr r3, [r7, #4] 8004bf2: 6a1b ldr r3, [r3, #32] 8004bf4: f423 5280 bic.w r2, r3, #4096 @ 0x1000 8004bf8: 687b ldr r3, [r7, #4] 8004bfa: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 8004bfc: 687b ldr r3, [r7, #4] 8004bfe: 685b ldr r3, [r3, #4] 8004c00: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 8004c02: 687b ldr r3, [r7, #4] 8004c04: 69db ldr r3, [r3, #28] 8004c06: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 8004c08: 68fb ldr r3, [r7, #12] 8004c0a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 8004c0e: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 8004c10: 68fb ldr r3, [r7, #12] 8004c12: f423 7340 bic.w r3, r3, #768 @ 0x300 8004c16: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 8004c18: 683b ldr r3, [r7, #0] 8004c1a: 681b ldr r3, [r3, #0] 8004c1c: 021b lsls r3, r3, #8 8004c1e: 68fa ldr r2, [r7, #12] 8004c20: 4313 orrs r3, r2 8004c22: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 8004c24: 693b ldr r3, [r7, #16] 8004c26: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8004c2a: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 8004c2c: 683b ldr r3, [r7, #0] 8004c2e: 689b ldr r3, [r3, #8] 8004c30: 031b lsls r3, r3, #12 8004c32: 693a ldr r2, [r7, #16] 8004c34: 4313 orrs r3, r2 8004c36: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 8004c38: 687b ldr r3, [r7, #4] 8004c3a: 4a12 ldr r2, [pc, #72] @ (8004c84 ) 8004c3c: 4293 cmp r3, r2 8004c3e: d003 beq.n 8004c48 8004c40: 687b ldr r3, [r7, #4] 8004c42: 4a11 ldr r2, [pc, #68] @ (8004c88 ) 8004c44: 4293 cmp r3, r2 8004c46: d109 bne.n 8004c5c { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 8004c48: 697b ldr r3, [r7, #20] 8004c4a: f423 4380 bic.w r3, r3, #16384 @ 0x4000 8004c4e: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 8004c50: 683b ldr r3, [r7, #0] 8004c52: 695b ldr r3, [r3, #20] 8004c54: 019b lsls r3, r3, #6 8004c56: 697a ldr r2, [r7, #20] 8004c58: 4313 orrs r3, r2 8004c5a: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8004c5c: 687b ldr r3, [r7, #4] 8004c5e: 697a ldr r2, [r7, #20] 8004c60: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8004c62: 687b ldr r3, [r7, #4] 8004c64: 68fa ldr r2, [r7, #12] 8004c66: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 8004c68: 683b ldr r3, [r7, #0] 8004c6a: 685a ldr r2, [r3, #4] 8004c6c: 687b ldr r3, [r7, #4] 8004c6e: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8004c70: 687b ldr r3, [r7, #4] 8004c72: 693a ldr r2, [r7, #16] 8004c74: 621a str r2, [r3, #32] } 8004c76: bf00 nop 8004c78: 371c adds r7, #28 8004c7a: 46bd mov sp, r7 8004c7c: f85d 7b04 ldr.w r7, [sp], #4 8004c80: 4770 bx lr 8004c82: bf00 nop 8004c84: 40010000 .word 0x40010000 8004c88: 40010400 .word 0x40010400 08004c8c : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 8004c8c: b480 push {r7} 8004c8e: b085 sub sp, #20 8004c90: af00 add r7, sp, #0 8004c92: 6078 str r0, [r7, #4] 8004c94: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 8004c96: 687b ldr r3, [r7, #4] 8004c98: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 8004c9c: 2b01 cmp r3, #1 8004c9e: d101 bne.n 8004ca4 8004ca0: 2302 movs r3, #2 8004ca2: e05a b.n 8004d5a 8004ca4: 687b ldr r3, [r7, #4] 8004ca6: 2201 movs r2, #1 8004ca8: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 8004cac: 687b ldr r3, [r7, #4] 8004cae: 2202 movs r2, #2 8004cb0: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 8004cb4: 687b ldr r3, [r7, #4] 8004cb6: 681b ldr r3, [r3, #0] 8004cb8: 685b ldr r3, [r3, #4] 8004cba: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 8004cbc: 687b ldr r3, [r7, #4] 8004cbe: 681b ldr r3, [r3, #0] 8004cc0: 689b ldr r3, [r3, #8] 8004cc2: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 8004cc4: 68fb ldr r3, [r7, #12] 8004cc6: f023 0370 bic.w r3, r3, #112 @ 0x70 8004cca: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 8004ccc: 683b ldr r3, [r7, #0] 8004cce: 681b ldr r3, [r3, #0] 8004cd0: 68fa ldr r2, [r7, #12] 8004cd2: 4313 orrs r3, r2 8004cd4: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 8004cd6: 687b ldr r3, [r7, #4] 8004cd8: 681b ldr r3, [r3, #0] 8004cda: 68fa ldr r2, [r7, #12] 8004cdc: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8004cde: 687b ldr r3, [r7, #4] 8004ce0: 681b ldr r3, [r3, #0] 8004ce2: 4a21 ldr r2, [pc, #132] @ (8004d68 ) 8004ce4: 4293 cmp r3, r2 8004ce6: d022 beq.n 8004d2e 8004ce8: 687b ldr r3, [r7, #4] 8004cea: 681b ldr r3, [r3, #0] 8004cec: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8004cf0: d01d beq.n 8004d2e 8004cf2: 687b ldr r3, [r7, #4] 8004cf4: 681b ldr r3, [r3, #0] 8004cf6: 4a1d ldr r2, [pc, #116] @ (8004d6c ) 8004cf8: 4293 cmp r3, r2 8004cfa: d018 beq.n 8004d2e 8004cfc: 687b ldr r3, [r7, #4] 8004cfe: 681b ldr r3, [r3, #0] 8004d00: 4a1b ldr r2, [pc, #108] @ (8004d70 ) 8004d02: 4293 cmp r3, r2 8004d04: d013 beq.n 8004d2e 8004d06: 687b ldr r3, [r7, #4] 8004d08: 681b ldr r3, [r3, #0] 8004d0a: 4a1a ldr r2, [pc, #104] @ (8004d74 ) 8004d0c: 4293 cmp r3, r2 8004d0e: d00e beq.n 8004d2e 8004d10: 687b ldr r3, [r7, #4] 8004d12: 681b ldr r3, [r3, #0] 8004d14: 4a18 ldr r2, [pc, #96] @ (8004d78 ) 8004d16: 4293 cmp r3, r2 8004d18: d009 beq.n 8004d2e 8004d1a: 687b ldr r3, [r7, #4] 8004d1c: 681b ldr r3, [r3, #0] 8004d1e: 4a17 ldr r2, [pc, #92] @ (8004d7c ) 8004d20: 4293 cmp r3, r2 8004d22: d004 beq.n 8004d2e 8004d24: 687b ldr r3, [r7, #4] 8004d26: 681b ldr r3, [r3, #0] 8004d28: 4a15 ldr r2, [pc, #84] @ (8004d80 ) 8004d2a: 4293 cmp r3, r2 8004d2c: d10c bne.n 8004d48 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 8004d2e: 68bb ldr r3, [r7, #8] 8004d30: f023 0380 bic.w r3, r3, #128 @ 0x80 8004d34: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 8004d36: 683b ldr r3, [r7, #0] 8004d38: 685b ldr r3, [r3, #4] 8004d3a: 68ba ldr r2, [r7, #8] 8004d3c: 4313 orrs r3, r2 8004d3e: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8004d40: 687b ldr r3, [r7, #4] 8004d42: 681b ldr r3, [r3, #0] 8004d44: 68ba ldr r2, [r7, #8] 8004d46: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 8004d48: 687b ldr r3, [r7, #4] 8004d4a: 2201 movs r2, #1 8004d4c: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8004d50: 687b ldr r3, [r7, #4] 8004d52: 2200 movs r2, #0 8004d54: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 8004d58: 2300 movs r3, #0 } 8004d5a: 4618 mov r0, r3 8004d5c: 3714 adds r7, #20 8004d5e: 46bd mov sp, r7 8004d60: f85d 7b04 ldr.w r7, [sp], #4 8004d64: 4770 bx lr 8004d66: bf00 nop 8004d68: 40010000 .word 0x40010000 8004d6c: 40000400 .word 0x40000400 8004d70: 40000800 .word 0x40000800 8004d74: 40000c00 .word 0x40000c00 8004d78: 40010400 .word 0x40010400 8004d7c: 40014000 .word 0x40014000 8004d80: 40001800 .word 0x40001800 08004d84 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 8004d84: b580 push {r7, lr} 8004d86: b082 sub sp, #8 8004d88: af00 add r7, sp, #0 8004d8a: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 8004d8c: 687b ldr r3, [r7, #4] 8004d8e: 2b00 cmp r3, #0 8004d90: d101 bne.n 8004d96 { return HAL_ERROR; 8004d92: 2301 movs r3, #1 8004d94: e042 b.n 8004e1c assert_param(IS_UART_INSTANCE(huart->Instance)); } assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); if (huart->gState == HAL_UART_STATE_RESET) 8004d96: 687b ldr r3, [r7, #4] 8004d98: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8004d9c: b2db uxtb r3, r3 8004d9e: 2b00 cmp r3, #0 8004da0: d106 bne.n 8004db0 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 8004da2: 687b ldr r3, [r7, #4] 8004da4: 2200 movs r2, #0 8004da6: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 8004daa: 6878 ldr r0, [r7, #4] 8004dac: f7fc f944 bl 8001038 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 8004db0: 687b ldr r3, [r7, #4] 8004db2: 2224 movs r2, #36 @ 0x24 8004db4: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 8004db8: 687b ldr r3, [r7, #4] 8004dba: 681b ldr r3, [r3, #0] 8004dbc: 68da ldr r2, [r3, #12] 8004dbe: 687b ldr r3, [r7, #4] 8004dc0: 681b ldr r3, [r3, #0] 8004dc2: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8004dc6: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 8004dc8: 6878 ldr r0, [r7, #4] 8004dca: f000 fb8b bl 80054e4 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8004dce: 687b ldr r3, [r7, #4] 8004dd0: 681b ldr r3, [r3, #0] 8004dd2: 691a ldr r2, [r3, #16] 8004dd4: 687b ldr r3, [r7, #4] 8004dd6: 681b ldr r3, [r3, #0] 8004dd8: f422 4290 bic.w r2, r2, #18432 @ 0x4800 8004ddc: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8004dde: 687b ldr r3, [r7, #4] 8004de0: 681b ldr r3, [r3, #0] 8004de2: 695a ldr r2, [r3, #20] 8004de4: 687b ldr r3, [r7, #4] 8004de6: 681b ldr r3, [r3, #0] 8004de8: f022 022a bic.w r2, r2, #42 @ 0x2a 8004dec: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 8004dee: 687b ldr r3, [r7, #4] 8004df0: 681b ldr r3, [r3, #0] 8004df2: 68da ldr r2, [r3, #12] 8004df4: 687b ldr r3, [r7, #4] 8004df6: 681b ldr r3, [r3, #0] 8004df8: f442 5200 orr.w r2, r2, #8192 @ 0x2000 8004dfc: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8004dfe: 687b ldr r3, [r7, #4] 8004e00: 2200 movs r2, #0 8004e02: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 8004e04: 687b ldr r3, [r7, #4] 8004e06: 2220 movs r2, #32 8004e08: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 8004e0c: 687b ldr r3, [r7, #4] 8004e0e: 2220 movs r2, #32 8004e10: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 8004e14: 687b ldr r3, [r7, #4] 8004e16: 2200 movs r2, #0 8004e18: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 8004e1a: 2300 movs r3, #0 } 8004e1c: 4618 mov r0, r3 8004e1e: 3708 adds r7, #8 8004e20: 46bd mov sp, r7 8004e22: bd80 pop {r7, pc} 08004e24 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { 8004e24: b580 push {r7, lr} 8004e26: b08c sub sp, #48 @ 0x30 8004e28: af00 add r7, sp, #0 8004e2a: 60f8 str r0, [r7, #12] 8004e2c: 60b9 str r1, [r7, #8] 8004e2e: 4613 mov r3, r2 8004e30: 80fb strh r3, [r7, #6] const uint32_t *tmp; /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 8004e32: 68fb ldr r3, [r7, #12] 8004e34: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8004e38: b2db uxtb r3, r3 8004e3a: 2b20 cmp r3, #32 8004e3c: d162 bne.n 8004f04 { if ((pData == NULL) || (Size == 0U)) 8004e3e: 68bb ldr r3, [r7, #8] 8004e40: 2b00 cmp r3, #0 8004e42: d002 beq.n 8004e4a 8004e44: 88fb ldrh r3, [r7, #6] 8004e46: 2b00 cmp r3, #0 8004e48: d101 bne.n 8004e4e { return HAL_ERROR; 8004e4a: 2301 movs r3, #1 8004e4c: e05b b.n 8004f06 } huart->pTxBuffPtr = pData; 8004e4e: 68ba ldr r2, [r7, #8] 8004e50: 68fb ldr r3, [r7, #12] 8004e52: 621a str r2, [r3, #32] huart->TxXferSize = Size; 8004e54: 68fb ldr r3, [r7, #12] 8004e56: 88fa ldrh r2, [r7, #6] 8004e58: 849a strh r2, [r3, #36] @ 0x24 huart->TxXferCount = Size; 8004e5a: 68fb ldr r3, [r7, #12] 8004e5c: 88fa ldrh r2, [r7, #6] 8004e5e: 84da strh r2, [r3, #38] @ 0x26 huart->ErrorCode = HAL_UART_ERROR_NONE; 8004e60: 68fb ldr r3, [r7, #12] 8004e62: 2200 movs r2, #0 8004e64: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_BUSY_TX; 8004e66: 68fb ldr r3, [r7, #12] 8004e68: 2221 movs r2, #33 @ 0x21 8004e6a: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Set the UART DMA transfer complete callback */ huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt; 8004e6e: 68fb ldr r3, [r7, #12] 8004e70: 6b9b ldr r3, [r3, #56] @ 0x38 8004e72: 4a27 ldr r2, [pc, #156] @ (8004f10 ) 8004e74: 63da str r2, [r3, #60] @ 0x3c /* Set the UART DMA Half transfer complete callback */ huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt; 8004e76: 68fb ldr r3, [r7, #12] 8004e78: 6b9b ldr r3, [r3, #56] @ 0x38 8004e7a: 4a26 ldr r2, [pc, #152] @ (8004f14 ) 8004e7c: 641a str r2, [r3, #64] @ 0x40 /* Set the DMA error callback */ huart->hdmatx->XferErrorCallback = UART_DMAError; 8004e7e: 68fb ldr r3, [r7, #12] 8004e80: 6b9b ldr r3, [r3, #56] @ 0x38 8004e82: 4a25 ldr r2, [pc, #148] @ (8004f18 ) 8004e84: 64da str r2, [r3, #76] @ 0x4c /* Set the DMA abort callback */ huart->hdmatx->XferAbortCallback = NULL; 8004e86: 68fb ldr r3, [r7, #12] 8004e88: 6b9b ldr r3, [r3, #56] @ 0x38 8004e8a: 2200 movs r2, #0 8004e8c: 651a str r2, [r3, #80] @ 0x50 /* Enable the UART transmit DMA stream */ tmp = (const uint32_t *)&pData; 8004e8e: f107 0308 add.w r3, r7, #8 8004e92: 62fb str r3, [r7, #44] @ 0x2c if (HAL_DMA_Start_IT(huart->hdmatx, *(const uint32_t *)tmp, (uint32_t)&huart->Instance->DR, Size) != HAL_OK) 8004e94: 68fb ldr r3, [r7, #12] 8004e96: 6b98 ldr r0, [r3, #56] @ 0x38 8004e98: 6afb ldr r3, [r7, #44] @ 0x2c 8004e9a: 6819 ldr r1, [r3, #0] 8004e9c: 68fb ldr r3, [r7, #12] 8004e9e: 681b ldr r3, [r3, #0] 8004ea0: 3304 adds r3, #4 8004ea2: 461a mov r2, r3 8004ea4: 88fb ldrh r3, [r7, #6] 8004ea6: f7fc fc20 bl 80016ea 8004eaa: 4603 mov r3, r0 8004eac: 2b00 cmp r3, #0 8004eae: d008 beq.n 8004ec2 { /* Set error code to DMA */ huart->ErrorCode = HAL_UART_ERROR_DMA; 8004eb0: 68fb ldr r3, [r7, #12] 8004eb2: 2210 movs r2, #16 8004eb4: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->gState to ready */ huart->gState = HAL_UART_STATE_READY; 8004eb6: 68fb ldr r3, [r7, #12] 8004eb8: 2220 movs r2, #32 8004eba: f883 2041 strb.w r2, [r3, #65] @ 0x41 return HAL_ERROR; 8004ebe: 2301 movs r3, #1 8004ec0: e021 b.n 8004f06 } /* Clear the TC flag in the SR register by writing 0 to it */ __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC); 8004ec2: 68fb ldr r3, [r7, #12] 8004ec4: 681b ldr r3, [r3, #0] 8004ec6: f06f 0240 mvn.w r2, #64 @ 0x40 8004eca: 601a str r2, [r3, #0] /* Enable the DMA transfer for transmit request by setting the DMAT bit in the UART CR3 register */ ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8004ecc: 68fb ldr r3, [r7, #12] 8004ece: 681b ldr r3, [r3, #0] 8004ed0: 3314 adds r3, #20 8004ed2: 61bb str r3, [r7, #24] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8004ed4: 69bb ldr r3, [r7, #24] 8004ed6: e853 3f00 ldrex r3, [r3] 8004eda: 617b str r3, [r7, #20] return(result); 8004edc: 697b ldr r3, [r7, #20] 8004ede: f043 0380 orr.w r3, r3, #128 @ 0x80 8004ee2: 62bb str r3, [r7, #40] @ 0x28 8004ee4: 68fb ldr r3, [r7, #12] 8004ee6: 681b ldr r3, [r3, #0] 8004ee8: 3314 adds r3, #20 8004eea: 6aba ldr r2, [r7, #40] @ 0x28 8004eec: 627a str r2, [r7, #36] @ 0x24 8004eee: 623b str r3, [r7, #32] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8004ef0: 6a39 ldr r1, [r7, #32] 8004ef2: 6a7a ldr r2, [r7, #36] @ 0x24 8004ef4: e841 2300 strex r3, r2, [r1] 8004ef8: 61fb str r3, [r7, #28] return(result); 8004efa: 69fb ldr r3, [r7, #28] 8004efc: 2b00 cmp r3, #0 8004efe: d1e5 bne.n 8004ecc return HAL_OK; 8004f00: 2300 movs r3, #0 8004f02: e000 b.n 8004f06 } else { return HAL_BUSY; 8004f04: 2302 movs r3, #2 } } 8004f06: 4618 mov r0, r3 8004f08: 3730 adds r7, #48 @ 0x30 8004f0a: 46bd mov sp, r7 8004f0c: bd80 pop {r7, pc} 8004f0e: bf00 nop 8004f10: 08004fcf .word 0x08004fcf 8004f14: 08005069 .word 0x08005069 8004f18: 080051ed .word 0x080051ed 08004f1c : * @param Size Amount of data elements (u8 or u16) to be received. * @note When the UART parity is enabled (PCE = 1) the received data contains the parity bit. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8004f1c: b580 push {r7, lr} 8004f1e: b084 sub sp, #16 8004f20: af00 add r7, sp, #0 8004f22: 60f8 str r0, [r7, #12] 8004f24: 60b9 str r1, [r7, #8] 8004f26: 4613 mov r3, r2 8004f28: 80fb strh r3, [r7, #6] /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) 8004f2a: 68fb ldr r3, [r7, #12] 8004f2c: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 8004f30: b2db uxtb r3, r3 8004f32: 2b20 cmp r3, #32 8004f34: d112 bne.n 8004f5c { if ((pData == NULL) || (Size == 0U)) 8004f36: 68bb ldr r3, [r7, #8] 8004f38: 2b00 cmp r3, #0 8004f3a: d002 beq.n 8004f42 8004f3c: 88fb ldrh r3, [r7, #6] 8004f3e: 2b00 cmp r3, #0 8004f40: d101 bne.n 8004f46 { return HAL_ERROR; 8004f42: 2301 movs r3, #1 8004f44: e00b b.n 8004f5e } /* Set Reception type to Standard reception */ huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8004f46: 68fb ldr r3, [r7, #12] 8004f48: 2200 movs r2, #0 8004f4a: 631a str r2, [r3, #48] @ 0x30 return (UART_Start_Receive_DMA(huart, pData, Size)); 8004f4c: 88fb ldrh r3, [r7, #6] 8004f4e: 461a mov r2, r3 8004f50: 68b9 ldr r1, [r7, #8] 8004f52: 68f8 ldr r0, [r7, #12] 8004f54: f000 f994 bl 8005280 8004f58: 4603 mov r3, r0 8004f5a: e000 b.n 8004f5e } else { return HAL_BUSY; 8004f5c: 2302 movs r3, #2 } } 8004f5e: 4618 mov r0, r3 8004f60: 3710 adds r7, #16 8004f62: 46bd mov sp, r7 8004f64: bd80 pop {r7, pc} 08004f66 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { 8004f66: b480 push {r7} 8004f68: b083 sub sp, #12 8004f6a: af00 add r7, sp, #0 8004f6c: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxCpltCallback could be implemented in the user file */ } 8004f6e: bf00 nop 8004f70: 370c adds r7, #12 8004f72: 46bd mov sp, r7 8004f74: f85d 7b04 ldr.w r7, [sp], #4 8004f78: 4770 bx lr 08004f7a : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart) { 8004f7a: b480 push {r7} 8004f7c: b083 sub sp, #12 8004f7e: af00 add r7, sp, #0 8004f80: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_TxHalfCpltCallback could be implemented in the user file */ } 8004f82: bf00 nop 8004f84: 370c adds r7, #12 8004f86: 46bd mov sp, r7 8004f88: f85d 7b04 ldr.w r7, [sp], #4 8004f8c: 4770 bx lr 08004f8e : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart) { 8004f8e: b480 push {r7} 8004f90: b083 sub sp, #12 8004f92: af00 add r7, sp, #0 8004f94: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_RxHalfCpltCallback could be implemented in the user file */ } 8004f96: bf00 nop 8004f98: 370c adds r7, #12 8004f9a: 46bd mov sp, r7 8004f9c: f85d 7b04 ldr.w r7, [sp], #4 8004fa0: 4770 bx lr 08004fa2 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { 8004fa2: b480 push {r7} 8004fa4: b083 sub sp, #12 8004fa6: af00 add r7, sp, #0 8004fa8: 6078 str r0, [r7, #4] /* Prevent unused argument(s) compilation warning */ UNUSED(huart); /* NOTE: This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback could be implemented in the user file */ } 8004faa: bf00 nop 8004fac: 370c adds r7, #12 8004fae: 46bd mov sp, r7 8004fb0: f85d 7b04 ldr.w r7, [sp], #4 8004fb4: 4770 bx lr 08004fb6 : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { 8004fb6: b480 push {r7} 8004fb8: b083 sub sp, #12 8004fba: af00 add r7, sp, #0 8004fbc: 6078 str r0, [r7, #4] 8004fbe: 460b mov r3, r1 8004fc0: 807b strh r3, [r7, #2] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } 8004fc2: bf00 nop 8004fc4: 370c adds r7, #12 8004fc6: 46bd mov sp, r7 8004fc8: f85d 7b04 ldr.w r7, [sp], #4 8004fcc: 4770 bx lr 08004fce : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma) { 8004fce: b580 push {r7, lr} 8004fd0: b090 sub sp, #64 @ 0x40 8004fd2: af00 add r7, sp, #0 8004fd4: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8004fd6: 687b ldr r3, [r7, #4] 8004fd8: 6b9b ldr r3, [r3, #56] @ 0x38 8004fda: 63fb str r3, [r7, #60] @ 0x3c /* DMA Normal mode*/ if ((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U) 8004fdc: 687b ldr r3, [r7, #4] 8004fde: 681b ldr r3, [r3, #0] 8004fe0: 681b ldr r3, [r3, #0] 8004fe2: f403 7380 and.w r3, r3, #256 @ 0x100 8004fe6: 2b00 cmp r3, #0 8004fe8: d137 bne.n 800505a { huart->TxXferCount = 0x00U; 8004fea: 6bfb ldr r3, [r7, #60] @ 0x3c 8004fec: 2200 movs r2, #0 8004fee: 84da strh r2, [r3, #38] @ 0x26 /* Disable the DMA transfer for transmit request by setting the DMAT bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT); 8004ff0: 6bfb ldr r3, [r7, #60] @ 0x3c 8004ff2: 681b ldr r3, [r3, #0] 8004ff4: 3314 adds r3, #20 8004ff6: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8004ff8: 6a7b ldr r3, [r7, #36] @ 0x24 8004ffa: e853 3f00 ldrex r3, [r3] 8004ffe: 623b str r3, [r7, #32] return(result); 8005000: 6a3b ldr r3, [r7, #32] 8005002: f023 0380 bic.w r3, r3, #128 @ 0x80 8005006: 63bb str r3, [r7, #56] @ 0x38 8005008: 6bfb ldr r3, [r7, #60] @ 0x3c 800500a: 681b ldr r3, [r3, #0] 800500c: 3314 adds r3, #20 800500e: 6bba ldr r2, [r7, #56] @ 0x38 8005010: 633a str r2, [r7, #48] @ 0x30 8005012: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8005014: 6af9 ldr r1, [r7, #44] @ 0x2c 8005016: 6b3a ldr r2, [r7, #48] @ 0x30 8005018: e841 2300 strex r3, r2, [r1] 800501c: 62bb str r3, [r7, #40] @ 0x28 return(result); 800501e: 6abb ldr r3, [r7, #40] @ 0x28 8005020: 2b00 cmp r3, #0 8005022: d1e5 bne.n 8004ff0 /* Enable the UART Transmit Complete Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); 8005024: 6bfb ldr r3, [r7, #60] @ 0x3c 8005026: 681b ldr r3, [r3, #0] 8005028: 330c adds r3, #12 800502a: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 800502c: 693b ldr r3, [r7, #16] 800502e: e853 3f00 ldrex r3, [r3] 8005032: 60fb str r3, [r7, #12] return(result); 8005034: 68fb ldr r3, [r7, #12] 8005036: f043 0340 orr.w r3, r3, #64 @ 0x40 800503a: 637b str r3, [r7, #52] @ 0x34 800503c: 6bfb ldr r3, [r7, #60] @ 0x3c 800503e: 681b ldr r3, [r3, #0] 8005040: 330c adds r3, #12 8005042: 6b7a ldr r2, [r7, #52] @ 0x34 8005044: 61fa str r2, [r7, #28] 8005046: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8005048: 69b9 ldr r1, [r7, #24] 800504a: 69fa ldr r2, [r7, #28] 800504c: e841 2300 strex r3, r2, [r1] 8005050: 617b str r3, [r7, #20] return(result); 8005052: 697b ldr r3, [r7, #20] 8005054: 2b00 cmp r3, #0 8005056: d1e5 bne.n 8005024 #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } } 8005058: e002 b.n 8005060 HAL_UART_TxCpltCallback(huart); 800505a: 6bf8 ldr r0, [r7, #60] @ 0x3c 800505c: f7ff ff83 bl 8004f66 } 8005060: bf00 nop 8005062: 3740 adds r7, #64 @ 0x40 8005064: 46bd mov sp, r7 8005066: bd80 pop {r7, pc} 08005068 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) { 8005068: b580 push {r7, lr} 800506a: b084 sub sp, #16 800506c: af00 add r7, sp, #0 800506e: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 8005070: 687b ldr r3, [r7, #4] 8005072: 6b9b ldr r3, [r3, #56] @ 0x38 8005074: 60fb str r3, [r7, #12] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxHalfCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxHalfCpltCallback(huart); 8005076: 68f8 ldr r0, [r7, #12] 8005078: f7ff ff7f bl 8004f7a #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 800507c: bf00 nop 800507e: 3710 adds r7, #16 8005080: 46bd mov sp, r7 8005082: bd80 pop {r7, pc} 08005084 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) { 8005084: b580 push {r7, lr} 8005086: b09c sub sp, #112 @ 0x70 8005088: af00 add r7, sp, #0 800508a: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 800508c: 687b ldr r3, [r7, #4] 800508e: 6b9b ldr r3, [r3, #56] @ 0x38 8005090: 66fb str r3, [r7, #108] @ 0x6c /* DMA Normal mode*/ if ((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U) 8005092: 687b ldr r3, [r7, #4] 8005094: 681b ldr r3, [r3, #0] 8005096: 681b ldr r3, [r3, #0] 8005098: f403 7380 and.w r3, r3, #256 @ 0x100 800509c: 2b00 cmp r3, #0 800509e: d172 bne.n 8005186 { huart->RxXferCount = 0U; 80050a0: 6efb ldr r3, [r7, #108] @ 0x6c 80050a2: 2200 movs r2, #0 80050a4: 85da strh r2, [r3, #46] @ 0x2e /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); 80050a6: 6efb ldr r3, [r7, #108] @ 0x6c 80050a8: 681b ldr r3, [r3, #0] 80050aa: 330c adds r3, #12 80050ac: 64fb str r3, [r7, #76] @ 0x4c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80050ae: 6cfb ldr r3, [r7, #76] @ 0x4c 80050b0: e853 3f00 ldrex r3, [r3] 80050b4: 64bb str r3, [r7, #72] @ 0x48 return(result); 80050b6: 6cbb ldr r3, [r7, #72] @ 0x48 80050b8: f423 7380 bic.w r3, r3, #256 @ 0x100 80050bc: 66bb str r3, [r7, #104] @ 0x68 80050be: 6efb ldr r3, [r7, #108] @ 0x6c 80050c0: 681b ldr r3, [r3, #0] 80050c2: 330c adds r3, #12 80050c4: 6eba ldr r2, [r7, #104] @ 0x68 80050c6: 65ba str r2, [r7, #88] @ 0x58 80050c8: 657b str r3, [r7, #84] @ 0x54 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80050ca: 6d79 ldr r1, [r7, #84] @ 0x54 80050cc: 6dba ldr r2, [r7, #88] @ 0x58 80050ce: e841 2300 strex r3, r2, [r1] 80050d2: 653b str r3, [r7, #80] @ 0x50 return(result); 80050d4: 6d3b ldr r3, [r7, #80] @ 0x50 80050d6: 2b00 cmp r3, #0 80050d8: d1e5 bne.n 80050a6 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 80050da: 6efb ldr r3, [r7, #108] @ 0x6c 80050dc: 681b ldr r3, [r3, #0] 80050de: 3314 adds r3, #20 80050e0: 63bb str r3, [r7, #56] @ 0x38 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80050e2: 6bbb ldr r3, [r7, #56] @ 0x38 80050e4: e853 3f00 ldrex r3, [r3] 80050e8: 637b str r3, [r7, #52] @ 0x34 return(result); 80050ea: 6b7b ldr r3, [r7, #52] @ 0x34 80050ec: f023 0301 bic.w r3, r3, #1 80050f0: 667b str r3, [r7, #100] @ 0x64 80050f2: 6efb ldr r3, [r7, #108] @ 0x6c 80050f4: 681b ldr r3, [r3, #0] 80050f6: 3314 adds r3, #20 80050f8: 6e7a ldr r2, [r7, #100] @ 0x64 80050fa: 647a str r2, [r7, #68] @ 0x44 80050fc: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80050fe: 6c39 ldr r1, [r7, #64] @ 0x40 8005100: 6c7a ldr r2, [r7, #68] @ 0x44 8005102: e841 2300 strex r3, r2, [r1] 8005106: 63fb str r3, [r7, #60] @ 0x3c return(result); 8005108: 6bfb ldr r3, [r7, #60] @ 0x3c 800510a: 2b00 cmp r3, #0 800510c: d1e5 bne.n 80050da /* Disable the DMA transfer for the receiver request by setting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); 800510e: 6efb ldr r3, [r7, #108] @ 0x6c 8005110: 681b ldr r3, [r3, #0] 8005112: 3314 adds r3, #20 8005114: 627b str r3, [r7, #36] @ 0x24 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8005116: 6a7b ldr r3, [r7, #36] @ 0x24 8005118: e853 3f00 ldrex r3, [r3] 800511c: 623b str r3, [r7, #32] return(result); 800511e: 6a3b ldr r3, [r7, #32] 8005120: f023 0340 bic.w r3, r3, #64 @ 0x40 8005124: 663b str r3, [r7, #96] @ 0x60 8005126: 6efb ldr r3, [r7, #108] @ 0x6c 8005128: 681b ldr r3, [r3, #0] 800512a: 3314 adds r3, #20 800512c: 6e3a ldr r2, [r7, #96] @ 0x60 800512e: 633a str r2, [r7, #48] @ 0x30 8005130: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8005132: 6af9 ldr r1, [r7, #44] @ 0x2c 8005134: 6b3a ldr r2, [r7, #48] @ 0x30 8005136: e841 2300 strex r3, r2, [r1] 800513a: 62bb str r3, [r7, #40] @ 0x28 return(result); 800513c: 6abb ldr r3, [r7, #40] @ 0x28 800513e: 2b00 cmp r3, #0 8005140: d1e5 bne.n 800510e /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8005142: 6efb ldr r3, [r7, #108] @ 0x6c 8005144: 2220 movs r2, #32 8005146: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* If Reception till IDLE event has been selected, Disable IDLE Interrupt */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 800514a: 6efb ldr r3, [r7, #108] @ 0x6c 800514c: 6b1b ldr r3, [r3, #48] @ 0x30 800514e: 2b01 cmp r3, #1 8005150: d119 bne.n 8005186 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8005152: 6efb ldr r3, [r7, #108] @ 0x6c 8005154: 681b ldr r3, [r3, #0] 8005156: 330c adds r3, #12 8005158: 613b str r3, [r7, #16] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 800515a: 693b ldr r3, [r7, #16] 800515c: e853 3f00 ldrex r3, [r3] 8005160: 60fb str r3, [r7, #12] return(result); 8005162: 68fb ldr r3, [r7, #12] 8005164: f023 0310 bic.w r3, r3, #16 8005168: 65fb str r3, [r7, #92] @ 0x5c 800516a: 6efb ldr r3, [r7, #108] @ 0x6c 800516c: 681b ldr r3, [r3, #0] 800516e: 330c adds r3, #12 8005170: 6dfa ldr r2, [r7, #92] @ 0x5c 8005172: 61fa str r2, [r7, #28] 8005174: 61bb str r3, [r7, #24] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8005176: 69b9 ldr r1, [r7, #24] 8005178: 69fa ldr r2, [r7, #28] 800517a: e841 2300 strex r3, r2, [r1] 800517e: 617b str r3, [r7, #20] return(result); 8005180: 697b ldr r3, [r7, #20] 8005182: 2b00 cmp r3, #0 8005184: d1e5 bne.n 8005152 } } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Transfer Complete */ huart->RxEventType = HAL_UART_RXEVENT_TC; 8005186: 6efb ldr r3, [r7, #108] @ 0x6c 8005188: 2200 movs r2, #0 800518a: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : use Rx Event callback */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 800518c: 6efb ldr r3, [r7, #108] @ 0x6c 800518e: 6b1b ldr r3, [r3, #48] @ 0x30 8005190: 2b01 cmp r3, #1 8005192: d106 bne.n 80051a2 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize); 8005194: 6efb ldr r3, [r7, #108] @ 0x6c 8005196: 8d9b ldrh r3, [r3, #44] @ 0x2c 8005198: 4619 mov r1, r3 800519a: 6ef8 ldr r0, [r7, #108] @ 0x6c 800519c: f7ff ff0b bl 8004fb6 #else /*Call legacy weak Rx complete callback*/ HAL_UART_RxCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } } 80051a0: e002 b.n 80051a8 HAL_UART_RxCpltCallback(huart); 80051a2: 6ef8 ldr r0, [r7, #108] @ 0x6c 80051a4: f7fb fd0e bl 8000bc4 } 80051a8: bf00 nop 80051aa: 3770 adds r7, #112 @ 0x70 80051ac: 46bd mov sp, r7 80051ae: bd80 pop {r7, pc} 080051b0 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) { 80051b0: b580 push {r7, lr} 80051b2: b084 sub sp, #16 80051b4: af00 add r7, sp, #0 80051b6: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 80051b8: 687b ldr r3, [r7, #4] 80051ba: 6b9b ldr r3, [r3, #56] @ 0x38 80051bc: 60fb str r3, [r7, #12] /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Half Transfer */ huart->RxEventType = HAL_UART_RXEVENT_HT; 80051be: 68fb ldr r3, [r7, #12] 80051c0: 2201 movs r2, #1 80051c2: 635a str r2, [r3, #52] @ 0x34 /* Check current reception Mode : If Reception till IDLE event has been selected : use Rx Event callback */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 80051c4: 68fb ldr r3, [r7, #12] 80051c6: 6b1b ldr r3, [r3, #48] @ 0x30 80051c8: 2b01 cmp r3, #1 80051ca: d108 bne.n 80051de #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, huart->RxXferSize / 2U); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize / 2U); 80051cc: 68fb ldr r3, [r7, #12] 80051ce: 8d9b ldrh r3, [r3, #44] @ 0x2c 80051d0: 085b lsrs r3, r3, #1 80051d2: b29b uxth r3, r3 80051d4: 4619 mov r1, r3 80051d6: 68f8 ldr r0, [r7, #12] 80051d8: f7ff feed bl 8004fb6 #else /*Call legacy weak Rx Half complete callback*/ HAL_UART_RxHalfCpltCallback(huart); #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } } 80051dc: e002 b.n 80051e4 HAL_UART_RxHalfCpltCallback(huart); 80051de: 68f8 ldr r0, [r7, #12] 80051e0: f7ff fed5 bl 8004f8e } 80051e4: bf00 nop 80051e6: 3710 adds r7, #16 80051e8: 46bd mov sp, r7 80051ea: bd80 pop {r7, pc} 080051ec : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA module. * @retval None */ static void UART_DMAError(DMA_HandleTypeDef *hdma) { 80051ec: b580 push {r7, lr} 80051ee: b084 sub sp, #16 80051f0: af00 add r7, sp, #0 80051f2: 6078 str r0, [r7, #4] uint32_t dmarequest = 0x00U; 80051f4: 2300 movs r3, #0 80051f6: 60fb str r3, [r7, #12] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; 80051f8: 687b ldr r3, [r7, #4] 80051fa: 6b9b ldr r3, [r3, #56] @ 0x38 80051fc: 60bb str r3, [r7, #8] /* Stop UART DMA Tx request if ongoing */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT); 80051fe: 68bb ldr r3, [r7, #8] 8005200: 681b ldr r3, [r3, #0] 8005202: 695b ldr r3, [r3, #20] 8005204: f003 0380 and.w r3, r3, #128 @ 0x80 8005208: 2b80 cmp r3, #128 @ 0x80 800520a: bf0c ite eq 800520c: 2301 moveq r3, #1 800520e: 2300 movne r3, #0 8005210: b2db uxtb r3, r3 8005212: 60fb str r3, [r7, #12] if ((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest) 8005214: 68bb ldr r3, [r7, #8] 8005216: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800521a: b2db uxtb r3, r3 800521c: 2b21 cmp r3, #33 @ 0x21 800521e: d108 bne.n 8005232 8005220: 68fb ldr r3, [r7, #12] 8005222: 2b00 cmp r3, #0 8005224: d005 beq.n 8005232 { huart->TxXferCount = 0x00U; 8005226: 68bb ldr r3, [r7, #8] 8005228: 2200 movs r2, #0 800522a: 84da strh r2, [r3, #38] @ 0x26 UART_EndTxTransfer(huart); 800522c: 68b8 ldr r0, [r7, #8] 800522e: f000 f8cd bl 80053cc } /* Stop UART DMA Rx request if ongoing */ dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR); 8005232: 68bb ldr r3, [r7, #8] 8005234: 681b ldr r3, [r3, #0] 8005236: 695b ldr r3, [r3, #20] 8005238: f003 0340 and.w r3, r3, #64 @ 0x40 800523c: 2b40 cmp r3, #64 @ 0x40 800523e: bf0c ite eq 8005240: 2301 moveq r3, #1 8005242: 2300 movne r3, #0 8005244: b2db uxtb r3, r3 8005246: 60fb str r3, [r7, #12] if ((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest) 8005248: 68bb ldr r3, [r7, #8] 800524a: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 800524e: b2db uxtb r3, r3 8005250: 2b22 cmp r3, #34 @ 0x22 8005252: d108 bne.n 8005266 8005254: 68fb ldr r3, [r7, #12] 8005256: 2b00 cmp r3, #0 8005258: d005 beq.n 8005266 { huart->RxXferCount = 0x00U; 800525a: 68bb ldr r3, [r7, #8] 800525c: 2200 movs r2, #0 800525e: 85da strh r2, [r3, #46] @ 0x2e UART_EndRxTransfer(huart); 8005260: 68b8 ldr r0, [r7, #8] 8005262: f000 f8db bl 800541c } huart->ErrorCode |= HAL_UART_ERROR_DMA; 8005266: 68bb ldr r3, [r7, #8] 8005268: 6c5b ldr r3, [r3, #68] @ 0x44 800526a: f043 0210 orr.w r2, r3, #16 800526e: 68bb ldr r3, [r7, #8] 8005270: 645a str r2, [r3, #68] @ 0x44 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); 8005272: 68b8 ldr r0, [r7, #8] 8005274: f7ff fe95 bl 8004fa2 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } 8005278: bf00 nop 800527a: 3710 adds r7, #16 800527c: 46bd mov sp, r7 800527e: bd80 pop {r7, pc} 08005280 : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be received. * @retval HAL status */ HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size) { 8005280: b580 push {r7, lr} 8005282: b098 sub sp, #96 @ 0x60 8005284: af00 add r7, sp, #0 8005286: 60f8 str r0, [r7, #12] 8005288: 60b9 str r1, [r7, #8] 800528a: 4613 mov r3, r2 800528c: 80fb strh r3, [r7, #6] uint32_t *tmp; huart->pRxBuffPtr = pData; 800528e: 68ba ldr r2, [r7, #8] 8005290: 68fb ldr r3, [r7, #12] 8005292: 629a str r2, [r3, #40] @ 0x28 huart->RxXferSize = Size; 8005294: 68fb ldr r3, [r7, #12] 8005296: 88fa ldrh r2, [r7, #6] 8005298: 859a strh r2, [r3, #44] @ 0x2c huart->ErrorCode = HAL_UART_ERROR_NONE; 800529a: 68fb ldr r3, [r7, #12] 800529c: 2200 movs r2, #0 800529e: 645a str r2, [r3, #68] @ 0x44 huart->RxState = HAL_UART_STATE_BUSY_RX; 80052a0: 68fb ldr r3, [r7, #12] 80052a2: 2222 movs r2, #34 @ 0x22 80052a4: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Set the UART DMA transfer complete callback */ huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt; 80052a8: 68fb ldr r3, [r7, #12] 80052aa: 6bdb ldr r3, [r3, #60] @ 0x3c 80052ac: 4a44 ldr r2, [pc, #272] @ (80053c0 ) 80052ae: 63da str r2, [r3, #60] @ 0x3c /* Set the UART DMA Half transfer complete callback */ huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt; 80052b0: 68fb ldr r3, [r7, #12] 80052b2: 6bdb ldr r3, [r3, #60] @ 0x3c 80052b4: 4a43 ldr r2, [pc, #268] @ (80053c4 ) 80052b6: 641a str r2, [r3, #64] @ 0x40 /* Set the DMA error callback */ huart->hdmarx->XferErrorCallback = UART_DMAError; 80052b8: 68fb ldr r3, [r7, #12] 80052ba: 6bdb ldr r3, [r3, #60] @ 0x3c 80052bc: 4a42 ldr r2, [pc, #264] @ (80053c8 ) 80052be: 64da str r2, [r3, #76] @ 0x4c /* Set the DMA abort callback */ huart->hdmarx->XferAbortCallback = NULL; 80052c0: 68fb ldr r3, [r7, #12] 80052c2: 6bdb ldr r3, [r3, #60] @ 0x3c 80052c4: 2200 movs r2, #0 80052c6: 651a str r2, [r3, #80] @ 0x50 /* Enable the DMA stream */ tmp = (uint32_t *)&pData; 80052c8: f107 0308 add.w r3, r7, #8 80052cc: 65fb str r3, [r7, #92] @ 0x5c if (HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, *(uint32_t *)tmp, Size) != HAL_OK) 80052ce: 68fb ldr r3, [r7, #12] 80052d0: 6bd8 ldr r0, [r3, #60] @ 0x3c 80052d2: 68fb ldr r3, [r7, #12] 80052d4: 681b ldr r3, [r3, #0] 80052d6: 3304 adds r3, #4 80052d8: 4619 mov r1, r3 80052da: 6dfb ldr r3, [r7, #92] @ 0x5c 80052dc: 681a ldr r2, [r3, #0] 80052de: 88fb ldrh r3, [r7, #6] 80052e0: f7fc fa03 bl 80016ea 80052e4: 4603 mov r3, r0 80052e6: 2b00 cmp r3, #0 80052e8: d008 beq.n 80052fc { /* Set error code to DMA */ huart->ErrorCode = HAL_UART_ERROR_DMA; 80052ea: 68fb ldr r3, [r7, #12] 80052ec: 2210 movs r2, #16 80052ee: 645a str r2, [r3, #68] @ 0x44 /* Restore huart->RxState to ready */ huart->RxState = HAL_UART_STATE_READY; 80052f0: 68fb ldr r3, [r7, #12] 80052f2: 2220 movs r2, #32 80052f4: f883 2042 strb.w r2, [r3, #66] @ 0x42 return HAL_ERROR; 80052f8: 2301 movs r3, #1 80052fa: e05d b.n 80053b8 } /* Clear the Overrun flag just before enabling the DMA Rx request: can be mandatory for the second transfer */ __HAL_UART_CLEAR_OREFLAG(huart); 80052fc: 2300 movs r3, #0 80052fe: 613b str r3, [r7, #16] 8005300: 68fb ldr r3, [r7, #12] 8005302: 681b ldr r3, [r3, #0] 8005304: 681b ldr r3, [r3, #0] 8005306: 613b str r3, [r7, #16] 8005308: 68fb ldr r3, [r7, #12] 800530a: 681b ldr r3, [r3, #0] 800530c: 685b ldr r3, [r3, #4] 800530e: 613b str r3, [r7, #16] 8005310: 693b ldr r3, [r7, #16] if (huart->Init.Parity != UART_PARITY_NONE) 8005312: 68fb ldr r3, [r7, #12] 8005314: 691b ldr r3, [r3, #16] 8005316: 2b00 cmp r3, #0 8005318: d019 beq.n 800534e { /* Enable the UART Parity Error Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE); 800531a: 68fb ldr r3, [r7, #12] 800531c: 681b ldr r3, [r3, #0] 800531e: 330c adds r3, #12 8005320: 643b str r3, [r7, #64] @ 0x40 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8005322: 6c3b ldr r3, [r7, #64] @ 0x40 8005324: e853 3f00 ldrex r3, [r3] 8005328: 63fb str r3, [r7, #60] @ 0x3c return(result); 800532a: 6bfb ldr r3, [r7, #60] @ 0x3c 800532c: f443 7380 orr.w r3, r3, #256 @ 0x100 8005330: 65bb str r3, [r7, #88] @ 0x58 8005332: 68fb ldr r3, [r7, #12] 8005334: 681b ldr r3, [r3, #0] 8005336: 330c adds r3, #12 8005338: 6dba ldr r2, [r7, #88] @ 0x58 800533a: 64fa str r2, [r7, #76] @ 0x4c 800533c: 64bb str r3, [r7, #72] @ 0x48 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 800533e: 6cb9 ldr r1, [r7, #72] @ 0x48 8005340: 6cfa ldr r2, [r7, #76] @ 0x4c 8005342: e841 2300 strex r3, r2, [r1] 8005346: 647b str r3, [r7, #68] @ 0x44 return(result); 8005348: 6c7b ldr r3, [r7, #68] @ 0x44 800534a: 2b00 cmp r3, #0 800534c: d1e5 bne.n 800531a } /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE); 800534e: 68fb ldr r3, [r7, #12] 8005350: 681b ldr r3, [r3, #0] 8005352: 3314 adds r3, #20 8005354: 62fb str r3, [r7, #44] @ 0x2c __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8005356: 6afb ldr r3, [r7, #44] @ 0x2c 8005358: e853 3f00 ldrex r3, [r3] 800535c: 62bb str r3, [r7, #40] @ 0x28 return(result); 800535e: 6abb ldr r3, [r7, #40] @ 0x28 8005360: f043 0301 orr.w r3, r3, #1 8005364: 657b str r3, [r7, #84] @ 0x54 8005366: 68fb ldr r3, [r7, #12] 8005368: 681b ldr r3, [r3, #0] 800536a: 3314 adds r3, #20 800536c: 6d7a ldr r2, [r7, #84] @ 0x54 800536e: 63ba str r2, [r7, #56] @ 0x38 8005370: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8005372: 6b79 ldr r1, [r7, #52] @ 0x34 8005374: 6bba ldr r2, [r7, #56] @ 0x38 8005376: e841 2300 strex r3, r2, [r1] 800537a: 633b str r3, [r7, #48] @ 0x30 return(result); 800537c: 6b3b ldr r3, [r7, #48] @ 0x30 800537e: 2b00 cmp r3, #0 8005380: d1e5 bne.n 800534e /* Enable the DMA transfer for the receiver request by setting the DMAR bit in the UART CR3 register */ ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_DMAR); 8005382: 68fb ldr r3, [r7, #12] 8005384: 681b ldr r3, [r3, #0] 8005386: 3314 adds r3, #20 8005388: 61bb str r3, [r7, #24] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 800538a: 69bb ldr r3, [r7, #24] 800538c: e853 3f00 ldrex r3, [r3] 8005390: 617b str r3, [r7, #20] return(result); 8005392: 697b ldr r3, [r7, #20] 8005394: f043 0340 orr.w r3, r3, #64 @ 0x40 8005398: 653b str r3, [r7, #80] @ 0x50 800539a: 68fb ldr r3, [r7, #12] 800539c: 681b ldr r3, [r3, #0] 800539e: 3314 adds r3, #20 80053a0: 6d3a ldr r2, [r7, #80] @ 0x50 80053a2: 627a str r2, [r7, #36] @ 0x24 80053a4: 623b str r3, [r7, #32] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80053a6: 6a39 ldr r1, [r7, #32] 80053a8: 6a7a ldr r2, [r7, #36] @ 0x24 80053aa: e841 2300 strex r3, r2, [r1] 80053ae: 61fb str r3, [r7, #28] return(result); 80053b0: 69fb ldr r3, [r7, #28] 80053b2: 2b00 cmp r3, #0 80053b4: d1e5 bne.n 8005382 return HAL_OK; 80053b6: 2300 movs r3, #0 } 80053b8: 4618 mov r0, r3 80053ba: 3760 adds r7, #96 @ 0x60 80053bc: 46bd mov sp, r7 80053be: bd80 pop {r7, pc} 80053c0: 08005085 .word 0x08005085 80053c4: 080051b1 .word 0x080051b1 80053c8: 080051ed .word 0x080051ed 080053cc : * @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion). * @param huart UART handle. * @retval None */ static void UART_EndTxTransfer(UART_HandleTypeDef *huart) { 80053cc: b480 push {r7} 80053ce: b089 sub sp, #36 @ 0x24 80053d0: af00 add r7, sp, #0 80053d2: 6078 str r0, [r7, #4] /* Disable TXEIE and TCIE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE)); 80053d4: 687b ldr r3, [r7, #4] 80053d6: 681b ldr r3, [r3, #0] 80053d8: 330c adds r3, #12 80053da: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80053dc: 68fb ldr r3, [r7, #12] 80053de: e853 3f00 ldrex r3, [r3] 80053e2: 60bb str r3, [r7, #8] return(result); 80053e4: 68bb ldr r3, [r7, #8] 80053e6: f023 03c0 bic.w r3, r3, #192 @ 0xc0 80053ea: 61fb str r3, [r7, #28] 80053ec: 687b ldr r3, [r7, #4] 80053ee: 681b ldr r3, [r3, #0] 80053f0: 330c adds r3, #12 80053f2: 69fa ldr r2, [r7, #28] 80053f4: 61ba str r2, [r7, #24] 80053f6: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80053f8: 6979 ldr r1, [r7, #20] 80053fa: 69ba ldr r2, [r7, #24] 80053fc: e841 2300 strex r3, r2, [r1] 8005400: 613b str r3, [r7, #16] return(result); 8005402: 693b ldr r3, [r7, #16] 8005404: 2b00 cmp r3, #0 8005406: d1e5 bne.n 80053d4 /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8005408: 687b ldr r3, [r7, #4] 800540a: 2220 movs r2, #32 800540c: f883 2041 strb.w r2, [r3, #65] @ 0x41 } 8005410: bf00 nop 8005412: 3724 adds r7, #36 @ 0x24 8005414: 46bd mov sp, r7 8005416: f85d 7b04 ldr.w r7, [sp], #4 800541a: 4770 bx lr 0800541c : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 800541c: b480 push {r7} 800541e: b095 sub sp, #84 @ 0x54 8005420: af00 add r7, sp, #0 8005422: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 8005424: 687b ldr r3, [r7, #4] 8005426: 681b ldr r3, [r3, #0] 8005428: 330c adds r3, #12 800542a: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 800542c: 6b7b ldr r3, [r7, #52] @ 0x34 800542e: e853 3f00 ldrex r3, [r3] 8005432: 633b str r3, [r7, #48] @ 0x30 return(result); 8005434: 6b3b ldr r3, [r7, #48] @ 0x30 8005436: f423 7390 bic.w r3, r3, #288 @ 0x120 800543a: 64fb str r3, [r7, #76] @ 0x4c 800543c: 687b ldr r3, [r7, #4] 800543e: 681b ldr r3, [r3, #0] 8005440: 330c adds r3, #12 8005442: 6cfa ldr r2, [r7, #76] @ 0x4c 8005444: 643a str r2, [r7, #64] @ 0x40 8005446: 63fb str r3, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8005448: 6bf9 ldr r1, [r7, #60] @ 0x3c 800544a: 6c3a ldr r2, [r7, #64] @ 0x40 800544c: e841 2300 strex r3, r2, [r1] 8005450: 63bb str r3, [r7, #56] @ 0x38 return(result); 8005452: 6bbb ldr r3, [r7, #56] @ 0x38 8005454: 2b00 cmp r3, #0 8005456: d1e5 bne.n 8005424 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 8005458: 687b ldr r3, [r7, #4] 800545a: 681b ldr r3, [r3, #0] 800545c: 3314 adds r3, #20 800545e: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8005460: 6a3b ldr r3, [r7, #32] 8005462: e853 3f00 ldrex r3, [r3] 8005466: 61fb str r3, [r7, #28] return(result); 8005468: 69fb ldr r3, [r7, #28] 800546a: f023 0301 bic.w r3, r3, #1 800546e: 64bb str r3, [r7, #72] @ 0x48 8005470: 687b ldr r3, [r7, #4] 8005472: 681b ldr r3, [r3, #0] 8005474: 3314 adds r3, #20 8005476: 6cba ldr r2, [r7, #72] @ 0x48 8005478: 62fa str r2, [r7, #44] @ 0x2c 800547a: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 800547c: 6ab9 ldr r1, [r7, #40] @ 0x28 800547e: 6afa ldr r2, [r7, #44] @ 0x2c 8005480: e841 2300 strex r3, r2, [r1] 8005484: 627b str r3, [r7, #36] @ 0x24 return(result); 8005486: 6a7b ldr r3, [r7, #36] @ 0x24 8005488: 2b00 cmp r3, #0 800548a: d1e5 bne.n 8005458 /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 800548c: 687b ldr r3, [r7, #4] 800548e: 6b1b ldr r3, [r3, #48] @ 0x30 8005490: 2b01 cmp r3, #1 8005492: d119 bne.n 80054c8 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8005494: 687b ldr r3, [r7, #4] 8005496: 681b ldr r3, [r3, #0] 8005498: 330c adds r3, #12 800549a: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 800549c: 68fb ldr r3, [r7, #12] 800549e: e853 3f00 ldrex r3, [r3] 80054a2: 60bb str r3, [r7, #8] return(result); 80054a4: 68bb ldr r3, [r7, #8] 80054a6: f023 0310 bic.w r3, r3, #16 80054aa: 647b str r3, [r7, #68] @ 0x44 80054ac: 687b ldr r3, [r7, #4] 80054ae: 681b ldr r3, [r3, #0] 80054b0: 330c adds r3, #12 80054b2: 6c7a ldr r2, [r7, #68] @ 0x44 80054b4: 61ba str r2, [r7, #24] 80054b6: 617b str r3, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 80054b8: 6979 ldr r1, [r7, #20] 80054ba: 69ba ldr r2, [r7, #24] 80054bc: e841 2300 strex r3, r2, [r1] 80054c0: 613b str r3, [r7, #16] return(result); 80054c2: 693b ldr r3, [r7, #16] 80054c4: 2b00 cmp r3, #0 80054c6: d1e5 bne.n 8005494 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 80054c8: 687b ldr r3, [r7, #4] 80054ca: 2220 movs r2, #32 80054cc: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 80054d0: 687b ldr r3, [r7, #4] 80054d2: 2200 movs r2, #0 80054d4: 631a str r2, [r3, #48] @ 0x30 } 80054d6: bf00 nop 80054d8: 3754 adds r7, #84 @ 0x54 80054da: 46bd mov sp, r7 80054dc: f85d 7b04 ldr.w r7, [sp], #4 80054e0: 4770 bx lr ... 080054e4 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 80054e4: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 80054e8: b0c0 sub sp, #256 @ 0x100 80054ea: af00 add r7, sp, #0 80054ec: f8c7 00f4 str.w r0, [r7, #244] @ 0xf4 assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80054f0: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 80054f4: 681b ldr r3, [r3, #0] 80054f6: 691b ldr r3, [r3, #16] 80054f8: f423 5040 bic.w r0, r3, #12288 @ 0x3000 80054fc: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005500: 68d9 ldr r1, [r3, #12] 8005502: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005506: 681a ldr r2, [r3, #0] 8005508: ea40 0301 orr.w r3, r0, r1 800550c: 6113 str r3, [r2, #16] Set the M bits according to huart->Init.WordLength value Set PCE and PS bits according to huart->Init.Parity value Set TE and RE bits according to huart->Init.Mode value Set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; 800550e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005512: 689a ldr r2, [r3, #8] 8005514: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005518: 691b ldr r3, [r3, #16] 800551a: 431a orrs r2, r3 800551c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005520: 695b ldr r3, [r3, #20] 8005522: 431a orrs r2, r3 8005524: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005528: 69db ldr r3, [r3, #28] 800552a: 4313 orrs r3, r2 800552c: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 MODIFY_REG(huart->Instance->CR1, 8005530: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005534: 681b ldr r3, [r3, #0] 8005536: 68db ldr r3, [r3, #12] 8005538: f423 4116 bic.w r1, r3, #38400 @ 0x9600 800553c: f021 010c bic.w r1, r1, #12 8005540: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005544: 681a ldr r2, [r3, #0] 8005546: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 800554a: 430b orrs r3, r1 800554c: 60d3 str r3, [r2, #12] (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 800554e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005552: 681b ldr r3, [r3, #0] 8005554: 695b ldr r3, [r3, #20] 8005556: f423 7040 bic.w r0, r3, #768 @ 0x300 800555a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800555e: 6999 ldr r1, [r3, #24] 8005560: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005564: 681a ldr r2, [r3, #0] 8005566: ea40 0301 orr.w r3, r0, r1 800556a: 6153 str r3, [r2, #20] if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10)) { pclk = HAL_RCC_GetPCLK2Freq(); } #elif defined(USART6) if ((huart->Instance == USART1) || (huart->Instance == USART6)) 800556c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005570: 681a ldr r2, [r3, #0] 8005572: 4b8f ldr r3, [pc, #572] @ (80057b0 ) 8005574: 429a cmp r2, r3 8005576: d005 beq.n 8005584 8005578: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800557c: 681a ldr r2, [r3, #0] 800557e: 4b8d ldr r3, [pc, #564] @ (80057b4 ) 8005580: 429a cmp r2, r3 8005582: d104 bne.n 800558e { pclk = HAL_RCC_GetPCLK2Freq(); 8005584: f7fd ffce bl 8003524 8005588: f8c7 00fc str.w r0, [r7, #252] @ 0xfc 800558c: e003 b.n 8005596 pclk = HAL_RCC_GetPCLK2Freq(); } #endif /* USART6 */ else { pclk = HAL_RCC_GetPCLK1Freq(); 800558e: f7fd ffb5 bl 80034fc 8005592: f8c7 00fc str.w r0, [r7, #252] @ 0xfc } /*-------------------------- USART BRR Configuration ---------------------*/ if (huart->Init.OverSampling == UART_OVERSAMPLING_8) 8005596: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 800559a: 69db ldr r3, [r3, #28] 800559c: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 80055a0: f040 810c bne.w 80057bc { huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate); 80055a4: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 80055a8: 2200 movs r2, #0 80055aa: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 80055ae: f8c7 20ec str.w r2, [r7, #236] @ 0xec 80055b2: e9d7 453a ldrd r4, r5, [r7, #232] @ 0xe8 80055b6: 4622 mov r2, r4 80055b8: 462b mov r3, r5 80055ba: 1891 adds r1, r2, r2 80055bc: 65b9 str r1, [r7, #88] @ 0x58 80055be: 415b adcs r3, r3 80055c0: 65fb str r3, [r7, #92] @ 0x5c 80055c2: e9d7 2316 ldrd r2, r3, [r7, #88] @ 0x58 80055c6: 4621 mov r1, r4 80055c8: eb12 0801 adds.w r8, r2, r1 80055cc: 4629 mov r1, r5 80055ce: eb43 0901 adc.w r9, r3, r1 80055d2: f04f 0200 mov.w r2, #0 80055d6: f04f 0300 mov.w r3, #0 80055da: ea4f 03c9 mov.w r3, r9, lsl #3 80055de: ea43 7358 orr.w r3, r3, r8, lsr #29 80055e2: ea4f 02c8 mov.w r2, r8, lsl #3 80055e6: 4690 mov r8, r2 80055e8: 4699 mov r9, r3 80055ea: 4623 mov r3, r4 80055ec: eb18 0303 adds.w r3, r8, r3 80055f0: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 80055f4: 462b mov r3, r5 80055f6: eb49 0303 adc.w r3, r9, r3 80055fa: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 80055fe: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005602: 685b ldr r3, [r3, #4] 8005604: 2200 movs r2, #0 8005606: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 800560a: f8c7 20dc str.w r2, [r7, #220] @ 0xdc 800560e: e9d7 1236 ldrd r1, r2, [r7, #216] @ 0xd8 8005612: 460b mov r3, r1 8005614: 18db adds r3, r3, r3 8005616: 653b str r3, [r7, #80] @ 0x50 8005618: 4613 mov r3, r2 800561a: eb42 0303 adc.w r3, r2, r3 800561e: 657b str r3, [r7, #84] @ 0x54 8005620: e9d7 2314 ldrd r2, r3, [r7, #80] @ 0x50 8005624: e9d7 0138 ldrd r0, r1, [r7, #224] @ 0xe0 8005628: f7fa fdec bl 8000204 <__aeabi_uldivmod> 800562c: 4602 mov r2, r0 800562e: 460b mov r3, r1 8005630: 4b61 ldr r3, [pc, #388] @ (80057b8 ) 8005632: fba3 2302 umull r2, r3, r3, r2 8005636: 095b lsrs r3, r3, #5 8005638: 011c lsls r4, r3, #4 800563a: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 800563e: 2200 movs r2, #0 8005640: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 8005644: f8c7 20d4 str.w r2, [r7, #212] @ 0xd4 8005648: e9d7 8934 ldrd r8, r9, [r7, #208] @ 0xd0 800564c: 4642 mov r2, r8 800564e: 464b mov r3, r9 8005650: 1891 adds r1, r2, r2 8005652: 64b9 str r1, [r7, #72] @ 0x48 8005654: 415b adcs r3, r3 8005656: 64fb str r3, [r7, #76] @ 0x4c 8005658: e9d7 2312 ldrd r2, r3, [r7, #72] @ 0x48 800565c: 4641 mov r1, r8 800565e: eb12 0a01 adds.w sl, r2, r1 8005662: 4649 mov r1, r9 8005664: eb43 0b01 adc.w fp, r3, r1 8005668: f04f 0200 mov.w r2, #0 800566c: f04f 0300 mov.w r3, #0 8005670: ea4f 03cb mov.w r3, fp, lsl #3 8005674: ea43 735a orr.w r3, r3, sl, lsr #29 8005678: ea4f 02ca mov.w r2, sl, lsl #3 800567c: 4692 mov sl, r2 800567e: 469b mov fp, r3 8005680: 4643 mov r3, r8 8005682: eb1a 0303 adds.w r3, sl, r3 8005686: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 800568a: 464b mov r3, r9 800568c: eb4b 0303 adc.w r3, fp, r3 8005690: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 8005694: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005698: 685b ldr r3, [r3, #4] 800569a: 2200 movs r2, #0 800569c: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 80056a0: f8c7 20c4 str.w r2, [r7, #196] @ 0xc4 80056a4: e9d7 1230 ldrd r1, r2, [r7, #192] @ 0xc0 80056a8: 460b mov r3, r1 80056aa: 18db adds r3, r3, r3 80056ac: 643b str r3, [r7, #64] @ 0x40 80056ae: 4613 mov r3, r2 80056b0: eb42 0303 adc.w r3, r2, r3 80056b4: 647b str r3, [r7, #68] @ 0x44 80056b6: e9d7 2310 ldrd r2, r3, [r7, #64] @ 0x40 80056ba: e9d7 0132 ldrd r0, r1, [r7, #200] @ 0xc8 80056be: f7fa fda1 bl 8000204 <__aeabi_uldivmod> 80056c2: 4602 mov r2, r0 80056c4: 460b mov r3, r1 80056c6: 4611 mov r1, r2 80056c8: 4b3b ldr r3, [pc, #236] @ (80057b8 ) 80056ca: fba3 2301 umull r2, r3, r3, r1 80056ce: 095b lsrs r3, r3, #5 80056d0: 2264 movs r2, #100 @ 0x64 80056d2: fb02 f303 mul.w r3, r2, r3 80056d6: 1acb subs r3, r1, r3 80056d8: 00db lsls r3, r3, #3 80056da: f103 0232 add.w r2, r3, #50 @ 0x32 80056de: 4b36 ldr r3, [pc, #216] @ (80057b8 ) 80056e0: fba3 2302 umull r2, r3, r3, r2 80056e4: 095b lsrs r3, r3, #5 80056e6: 005b lsls r3, r3, #1 80056e8: f403 73f8 and.w r3, r3, #496 @ 0x1f0 80056ec: 441c add r4, r3 80056ee: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 80056f2: 2200 movs r2, #0 80056f4: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 80056f8: f8c7 20bc str.w r2, [r7, #188] @ 0xbc 80056fc: e9d7 892e ldrd r8, r9, [r7, #184] @ 0xb8 8005700: 4642 mov r2, r8 8005702: 464b mov r3, r9 8005704: 1891 adds r1, r2, r2 8005706: 63b9 str r1, [r7, #56] @ 0x38 8005708: 415b adcs r3, r3 800570a: 63fb str r3, [r7, #60] @ 0x3c 800570c: e9d7 230e ldrd r2, r3, [r7, #56] @ 0x38 8005710: 4641 mov r1, r8 8005712: 1851 adds r1, r2, r1 8005714: 6339 str r1, [r7, #48] @ 0x30 8005716: 4649 mov r1, r9 8005718: 414b adcs r3, r1 800571a: 637b str r3, [r7, #52] @ 0x34 800571c: f04f 0200 mov.w r2, #0 8005720: f04f 0300 mov.w r3, #0 8005724: e9d7 ab0c ldrd sl, fp, [r7, #48] @ 0x30 8005728: 4659 mov r1, fp 800572a: 00cb lsls r3, r1, #3 800572c: 4651 mov r1, sl 800572e: ea43 7351 orr.w r3, r3, r1, lsr #29 8005732: 4651 mov r1, sl 8005734: 00ca lsls r2, r1, #3 8005736: 4610 mov r0, r2 8005738: 4619 mov r1, r3 800573a: 4603 mov r3, r0 800573c: 4642 mov r2, r8 800573e: 189b adds r3, r3, r2 8005740: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 8005744: 464b mov r3, r9 8005746: 460a mov r2, r1 8005748: eb42 0303 adc.w r3, r2, r3 800574c: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8005750: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005754: 685b ldr r3, [r3, #4] 8005756: 2200 movs r2, #0 8005758: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 800575c: f8c7 20ac str.w r2, [r7, #172] @ 0xac 8005760: e9d7 122a ldrd r1, r2, [r7, #168] @ 0xa8 8005764: 460b mov r3, r1 8005766: 18db adds r3, r3, r3 8005768: 62bb str r3, [r7, #40] @ 0x28 800576a: 4613 mov r3, r2 800576c: eb42 0303 adc.w r3, r2, r3 8005770: 62fb str r3, [r7, #44] @ 0x2c 8005772: e9d7 230a ldrd r2, r3, [r7, #40] @ 0x28 8005776: e9d7 012c ldrd r0, r1, [r7, #176] @ 0xb0 800577a: f7fa fd43 bl 8000204 <__aeabi_uldivmod> 800577e: 4602 mov r2, r0 8005780: 460b mov r3, r1 8005782: 4b0d ldr r3, [pc, #52] @ (80057b8 ) 8005784: fba3 1302 umull r1, r3, r3, r2 8005788: 095b lsrs r3, r3, #5 800578a: 2164 movs r1, #100 @ 0x64 800578c: fb01 f303 mul.w r3, r1, r3 8005790: 1ad3 subs r3, r2, r3 8005792: 00db lsls r3, r3, #3 8005794: 3332 adds r3, #50 @ 0x32 8005796: 4a08 ldr r2, [pc, #32] @ (80057b8 ) 8005798: fba2 2303 umull r2, r3, r2, r3 800579c: 095b lsrs r3, r3, #5 800579e: f003 0207 and.w r2, r3, #7 80057a2: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 80057a6: 681b ldr r3, [r3, #0] 80057a8: 4422 add r2, r4 80057aa: 609a str r2, [r3, #8] } else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } } 80057ac: e106 b.n 80059bc 80057ae: bf00 nop 80057b0: 40011000 .word 0x40011000 80057b4: 40011400 .word 0x40011400 80057b8: 51eb851f .word 0x51eb851f huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 80057bc: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 80057c0: 2200 movs r2, #0 80057c2: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 80057c6: f8c7 20a4 str.w r2, [r7, #164] @ 0xa4 80057ca: e9d7 8928 ldrd r8, r9, [r7, #160] @ 0xa0 80057ce: 4642 mov r2, r8 80057d0: 464b mov r3, r9 80057d2: 1891 adds r1, r2, r2 80057d4: 6239 str r1, [r7, #32] 80057d6: 415b adcs r3, r3 80057d8: 627b str r3, [r7, #36] @ 0x24 80057da: e9d7 2308 ldrd r2, r3, [r7, #32] 80057de: 4641 mov r1, r8 80057e0: 1854 adds r4, r2, r1 80057e2: 4649 mov r1, r9 80057e4: eb43 0501 adc.w r5, r3, r1 80057e8: f04f 0200 mov.w r2, #0 80057ec: f04f 0300 mov.w r3, #0 80057f0: 00eb lsls r3, r5, #3 80057f2: ea43 7354 orr.w r3, r3, r4, lsr #29 80057f6: 00e2 lsls r2, r4, #3 80057f8: 4614 mov r4, r2 80057fa: 461d mov r5, r3 80057fc: 4643 mov r3, r8 80057fe: 18e3 adds r3, r4, r3 8005800: f8c7 3098 str.w r3, [r7, #152] @ 0x98 8005804: 464b mov r3, r9 8005806: eb45 0303 adc.w r3, r5, r3 800580a: f8c7 309c str.w r3, [r7, #156] @ 0x9c 800580e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005812: 685b ldr r3, [r3, #4] 8005814: 2200 movs r2, #0 8005816: f8c7 3090 str.w r3, [r7, #144] @ 0x90 800581a: f8c7 2094 str.w r2, [r7, #148] @ 0x94 800581e: f04f 0200 mov.w r2, #0 8005822: f04f 0300 mov.w r3, #0 8005826: e9d7 4524 ldrd r4, r5, [r7, #144] @ 0x90 800582a: 4629 mov r1, r5 800582c: 008b lsls r3, r1, #2 800582e: 4621 mov r1, r4 8005830: ea43 7391 orr.w r3, r3, r1, lsr #30 8005834: 4621 mov r1, r4 8005836: 008a lsls r2, r1, #2 8005838: e9d7 0126 ldrd r0, r1, [r7, #152] @ 0x98 800583c: f7fa fce2 bl 8000204 <__aeabi_uldivmod> 8005840: 4602 mov r2, r0 8005842: 460b mov r3, r1 8005844: 4b60 ldr r3, [pc, #384] @ (80059c8 ) 8005846: fba3 2302 umull r2, r3, r3, r2 800584a: 095b lsrs r3, r3, #5 800584c: 011c lsls r4, r3, #4 800584e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8005852: 2200 movs r2, #0 8005854: f8c7 3088 str.w r3, [r7, #136] @ 0x88 8005858: f8c7 208c str.w r2, [r7, #140] @ 0x8c 800585c: e9d7 8922 ldrd r8, r9, [r7, #136] @ 0x88 8005860: 4642 mov r2, r8 8005862: 464b mov r3, r9 8005864: 1891 adds r1, r2, r2 8005866: 61b9 str r1, [r7, #24] 8005868: 415b adcs r3, r3 800586a: 61fb str r3, [r7, #28] 800586c: e9d7 2306 ldrd r2, r3, [r7, #24] 8005870: 4641 mov r1, r8 8005872: 1851 adds r1, r2, r1 8005874: 6139 str r1, [r7, #16] 8005876: 4649 mov r1, r9 8005878: 414b adcs r3, r1 800587a: 617b str r3, [r7, #20] 800587c: f04f 0200 mov.w r2, #0 8005880: f04f 0300 mov.w r3, #0 8005884: e9d7 ab04 ldrd sl, fp, [r7, #16] 8005888: 4659 mov r1, fp 800588a: 00cb lsls r3, r1, #3 800588c: 4651 mov r1, sl 800588e: ea43 7351 orr.w r3, r3, r1, lsr #29 8005892: 4651 mov r1, sl 8005894: 00ca lsls r2, r1, #3 8005896: 4610 mov r0, r2 8005898: 4619 mov r1, r3 800589a: 4603 mov r3, r0 800589c: 4642 mov r2, r8 800589e: 189b adds r3, r3, r2 80058a0: f8c7 3080 str.w r3, [r7, #128] @ 0x80 80058a4: 464b mov r3, r9 80058a6: 460a mov r2, r1 80058a8: eb42 0303 adc.w r3, r2, r3 80058ac: f8c7 3084 str.w r3, [r7, #132] @ 0x84 80058b0: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 80058b4: 685b ldr r3, [r3, #4] 80058b6: 2200 movs r2, #0 80058b8: 67bb str r3, [r7, #120] @ 0x78 80058ba: 67fa str r2, [r7, #124] @ 0x7c 80058bc: f04f 0200 mov.w r2, #0 80058c0: f04f 0300 mov.w r3, #0 80058c4: e9d7 891e ldrd r8, r9, [r7, #120] @ 0x78 80058c8: 4649 mov r1, r9 80058ca: 008b lsls r3, r1, #2 80058cc: 4641 mov r1, r8 80058ce: ea43 7391 orr.w r3, r3, r1, lsr #30 80058d2: 4641 mov r1, r8 80058d4: 008a lsls r2, r1, #2 80058d6: e9d7 0120 ldrd r0, r1, [r7, #128] @ 0x80 80058da: f7fa fc93 bl 8000204 <__aeabi_uldivmod> 80058de: 4602 mov r2, r0 80058e0: 460b mov r3, r1 80058e2: 4611 mov r1, r2 80058e4: 4b38 ldr r3, [pc, #224] @ (80059c8 ) 80058e6: fba3 2301 umull r2, r3, r3, r1 80058ea: 095b lsrs r3, r3, #5 80058ec: 2264 movs r2, #100 @ 0x64 80058ee: fb02 f303 mul.w r3, r2, r3 80058f2: 1acb subs r3, r1, r3 80058f4: 011b lsls r3, r3, #4 80058f6: 3332 adds r3, #50 @ 0x32 80058f8: 4a33 ldr r2, [pc, #204] @ (80059c8 ) 80058fa: fba2 2303 umull r2, r3, r2, r3 80058fe: 095b lsrs r3, r3, #5 8005900: f003 03f0 and.w r3, r3, #240 @ 0xf0 8005904: 441c add r4, r3 8005906: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 800590a: 2200 movs r2, #0 800590c: 673b str r3, [r7, #112] @ 0x70 800590e: 677a str r2, [r7, #116] @ 0x74 8005910: e9d7 891c ldrd r8, r9, [r7, #112] @ 0x70 8005914: 4642 mov r2, r8 8005916: 464b mov r3, r9 8005918: 1891 adds r1, r2, r2 800591a: 60b9 str r1, [r7, #8] 800591c: 415b adcs r3, r3 800591e: 60fb str r3, [r7, #12] 8005920: e9d7 2302 ldrd r2, r3, [r7, #8] 8005924: 4641 mov r1, r8 8005926: 1851 adds r1, r2, r1 8005928: 6039 str r1, [r7, #0] 800592a: 4649 mov r1, r9 800592c: 414b adcs r3, r1 800592e: 607b str r3, [r7, #4] 8005930: f04f 0200 mov.w r2, #0 8005934: f04f 0300 mov.w r3, #0 8005938: e9d7 ab00 ldrd sl, fp, [r7] 800593c: 4659 mov r1, fp 800593e: 00cb lsls r3, r1, #3 8005940: 4651 mov r1, sl 8005942: ea43 7351 orr.w r3, r3, r1, lsr #29 8005946: 4651 mov r1, sl 8005948: 00ca lsls r2, r1, #3 800594a: 4610 mov r0, r2 800594c: 4619 mov r1, r3 800594e: 4603 mov r3, r0 8005950: 4642 mov r2, r8 8005952: 189b adds r3, r3, r2 8005954: 66bb str r3, [r7, #104] @ 0x68 8005956: 464b mov r3, r9 8005958: 460a mov r2, r1 800595a: eb42 0303 adc.w r3, r2, r3 800595e: 66fb str r3, [r7, #108] @ 0x6c 8005960: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8005964: 685b ldr r3, [r3, #4] 8005966: 2200 movs r2, #0 8005968: 663b str r3, [r7, #96] @ 0x60 800596a: 667a str r2, [r7, #100] @ 0x64 800596c: f04f 0200 mov.w r2, #0 8005970: f04f 0300 mov.w r3, #0 8005974: e9d7 8918 ldrd r8, r9, [r7, #96] @ 0x60 8005978: 4649 mov r1, r9 800597a: 008b lsls r3, r1, #2 800597c: 4641 mov r1, r8 800597e: ea43 7391 orr.w r3, r3, r1, lsr #30 8005982: 4641 mov r1, r8 8005984: 008a lsls r2, r1, #2 8005986: e9d7 011a ldrd r0, r1, [r7, #104] @ 0x68 800598a: f7fa fc3b bl 8000204 <__aeabi_uldivmod> 800598e: 4602 mov r2, r0 8005990: 460b mov r3, r1 8005992: 4b0d ldr r3, [pc, #52] @ (80059c8 ) 8005994: fba3 1302 umull r1, r3, r3, r2 8005998: 095b lsrs r3, r3, #5 800599a: 2164 movs r1, #100 @ 0x64 800599c: fb01 f303 mul.w r3, r1, r3 80059a0: 1ad3 subs r3, r2, r3 80059a2: 011b lsls r3, r3, #4 80059a4: 3332 adds r3, #50 @ 0x32 80059a6: 4a08 ldr r2, [pc, #32] @ (80059c8 ) 80059a8: fba2 2303 umull r2, r3, r2, r3 80059ac: 095b lsrs r3, r3, #5 80059ae: f003 020f and.w r2, r3, #15 80059b2: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 80059b6: 681b ldr r3, [r3, #0] 80059b8: 4422 add r2, r4 80059ba: 609a str r2, [r3, #8] } 80059bc: bf00 nop 80059be: f507 7780 add.w r7, r7, #256 @ 0x100 80059c2: 46bd mov sp, r7 80059c4: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 80059c8: 51eb851f .word 0x51eb851f 080059cc : * @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) { 80059cc: b084 sub sp, #16 80059ce: b580 push {r7, lr} 80059d0: b084 sub sp, #16 80059d2: af00 add r7, sp, #0 80059d4: 6078 str r0, [r7, #4] 80059d6: f107 001c add.w r0, r7, #28 80059da: e880 000e stmia.w r0, {r1, r2, r3} HAL_StatusTypeDef ret; if (cfg.phy_itface == USB_OTG_ULPI_PHY) 80059de: f897 3021 ldrb.w r3, [r7, #33] @ 0x21 80059e2: 2b01 cmp r3, #1 80059e4: d123 bne.n 8005a2e { USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN); 80059e6: 687b ldr r3, [r7, #4] 80059e8: 6b9b ldr r3, [r3, #56] @ 0x38 80059ea: f423 3280 bic.w r2, r3, #65536 @ 0x10000 80059ee: 687b ldr r3, [r7, #4] 80059f0: 639a str r2, [r3, #56] @ 0x38 /* Init The ULPI Interface */ USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL); 80059f2: 687b ldr r3, [r7, #4] 80059f4: 68db ldr r3, [r3, #12] 80059f6: f423 0384 bic.w r3, r3, #4325376 @ 0x420000 80059fa: f023 0340 bic.w r3, r3, #64 @ 0x40 80059fe: 687a ldr r2, [r7, #4] 8005a00: 60d3 str r3, [r2, #12] /* Select vbus source */ USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI); 8005a02: 687b ldr r3, [r7, #4] 8005a04: 68db ldr r3, [r3, #12] 8005a06: f423 1240 bic.w r2, r3, #3145728 @ 0x300000 8005a0a: 687b ldr r3, [r7, #4] 8005a0c: 60da str r2, [r3, #12] if (cfg.use_external_vbus == 1U) 8005a0e: f897 3028 ldrb.w r3, [r7, #40] @ 0x28 8005a12: 2b01 cmp r3, #1 8005a14: d105 bne.n 8005a22 { USBx->GUSBCFG |= USB_OTG_GUSBCFG_ULPIEVBUSD; 8005a16: 687b ldr r3, [r7, #4] 8005a18: 68db ldr r3, [r3, #12] 8005a1a: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 8005a1e: 687b ldr r3, [r7, #4] 8005a20: 60da str r2, [r3, #12] } /* Reset after a PHY select */ ret = USB_CoreReset(USBx); 8005a22: 6878 ldr r0, [r7, #4] 8005a24: f001 fae2 bl 8006fec 8005a28: 4603 mov r3, r0 8005a2a: 73fb strb r3, [r7, #15] 8005a2c: e01b b.n 8005a66 } else /* FS interface (embedded Phy) */ { /* Select FS Embedded PHY */ USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL; 8005a2e: 687b ldr r3, [r7, #4] 8005a30: 68db ldr r3, [r3, #12] 8005a32: f043 0240 orr.w r2, r3, #64 @ 0x40 8005a36: 687b ldr r3, [r7, #4] 8005a38: 60da str r2, [r3, #12] /* Reset after a PHY select */ ret = USB_CoreReset(USBx); 8005a3a: 6878 ldr r0, [r7, #4] 8005a3c: f001 fad6 bl 8006fec 8005a40: 4603 mov r3, r0 8005a42: 73fb strb r3, [r7, #15] if (cfg.battery_charging_enable == 0U) 8005a44: f897 3025 ldrb.w r3, [r7, #37] @ 0x25 8005a48: 2b00 cmp r3, #0 8005a4a: d106 bne.n 8005a5a { /* Activate the USB Transceiver */ USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN; 8005a4c: 687b ldr r3, [r7, #4] 8005a4e: 6b9b ldr r3, [r3, #56] @ 0x38 8005a50: f443 3280 orr.w r2, r3, #65536 @ 0x10000 8005a54: 687b ldr r3, [r7, #4] 8005a56: 639a str r2, [r3, #56] @ 0x38 8005a58: e005 b.n 8005a66 } else { /* Deactivate the USB Transceiver */ USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN); 8005a5a: 687b ldr r3, [r7, #4] 8005a5c: 6b9b ldr r3, [r3, #56] @ 0x38 8005a5e: f423 3280 bic.w r2, r3, #65536 @ 0x10000 8005a62: 687b ldr r3, [r7, #4] 8005a64: 639a str r2, [r3, #56] @ 0x38 } } if (cfg.dma_enable == 1U) 8005a66: 7fbb ldrb r3, [r7, #30] 8005a68: 2b01 cmp r3, #1 8005a6a: d10b bne.n 8005a84 { USBx->GAHBCFG |= USB_OTG_GAHBCFG_HBSTLEN_2; 8005a6c: 687b ldr r3, [r7, #4] 8005a6e: 689b ldr r3, [r3, #8] 8005a70: f043 0206 orr.w r2, r3, #6 8005a74: 687b ldr r3, [r7, #4] 8005a76: 609a str r2, [r3, #8] USBx->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN; 8005a78: 687b ldr r3, [r7, #4] 8005a7a: 689b ldr r3, [r3, #8] 8005a7c: f043 0220 orr.w r2, r3, #32 8005a80: 687b ldr r3, [r7, #4] 8005a82: 609a str r2, [r3, #8] } return ret; 8005a84: 7bfb ldrb r3, [r7, #15] } 8005a86: 4618 mov r0, r3 8005a88: 3710 adds r7, #16 8005a8a: 46bd mov sp, r7 8005a8c: e8bd 4080 ldmia.w sp!, {r7, lr} 8005a90: b004 add sp, #16 8005a92: 4770 bx lr 08005a94 : * @param hclk: AHB clock frequency * @retval USB turnaround time In PHY Clocks number */ HAL_StatusTypeDef USB_SetTurnaroundTime(USB_OTG_GlobalTypeDef *USBx, uint32_t hclk, uint8_t speed) { 8005a94: b480 push {r7} 8005a96: b087 sub sp, #28 8005a98: af00 add r7, sp, #0 8005a9a: 60f8 str r0, [r7, #12] 8005a9c: 60b9 str r1, [r7, #8] 8005a9e: 4613 mov r3, r2 8005aa0: 71fb strb r3, [r7, #7] /* The USBTRD is configured according to the tables below, depending on AHB frequency used by application. In the low AHB frequency range it is used to stretch enough the USB response time to IN tokens, the USB turnaround time, so to compensate for the longer AHB read access latency to the Data FIFO */ if (speed == USBD_FS_SPEED) 8005aa2: 79fb ldrb r3, [r7, #7] 8005aa4: 2b02 cmp r3, #2 8005aa6: d165 bne.n 8005b74 { if ((hclk >= 14200000U) && (hclk < 15000000U)) 8005aa8: 68bb ldr r3, [r7, #8] 8005aaa: 4a41 ldr r2, [pc, #260] @ (8005bb0 ) 8005aac: 4293 cmp r3, r2 8005aae: d906 bls.n 8005abe 8005ab0: 68bb ldr r3, [r7, #8] 8005ab2: 4a40 ldr r2, [pc, #256] @ (8005bb4 ) 8005ab4: 4293 cmp r3, r2 8005ab6: d202 bcs.n 8005abe { /* hclk Clock Range between 14.2-15 MHz */ UsbTrd = 0xFU; 8005ab8: 230f movs r3, #15 8005aba: 617b str r3, [r7, #20] 8005abc: e062 b.n 8005b84 } else if ((hclk >= 15000000U) && (hclk < 16000000U)) 8005abe: 68bb ldr r3, [r7, #8] 8005ac0: 4a3c ldr r2, [pc, #240] @ (8005bb4 ) 8005ac2: 4293 cmp r3, r2 8005ac4: d306 bcc.n 8005ad4 8005ac6: 68bb ldr r3, [r7, #8] 8005ac8: 4a3b ldr r2, [pc, #236] @ (8005bb8 ) 8005aca: 4293 cmp r3, r2 8005acc: d202 bcs.n 8005ad4 { /* hclk Clock Range between 15-16 MHz */ UsbTrd = 0xEU; 8005ace: 230e movs r3, #14 8005ad0: 617b str r3, [r7, #20] 8005ad2: e057 b.n 8005b84 } else if ((hclk >= 16000000U) && (hclk < 17200000U)) 8005ad4: 68bb ldr r3, [r7, #8] 8005ad6: 4a38 ldr r2, [pc, #224] @ (8005bb8 ) 8005ad8: 4293 cmp r3, r2 8005ada: d306 bcc.n 8005aea 8005adc: 68bb ldr r3, [r7, #8] 8005ade: 4a37 ldr r2, [pc, #220] @ (8005bbc ) 8005ae0: 4293 cmp r3, r2 8005ae2: d202 bcs.n 8005aea { /* hclk Clock Range between 16-17.2 MHz */ UsbTrd = 0xDU; 8005ae4: 230d movs r3, #13 8005ae6: 617b str r3, [r7, #20] 8005ae8: e04c b.n 8005b84 } else if ((hclk >= 17200000U) && (hclk < 18500000U)) 8005aea: 68bb ldr r3, [r7, #8] 8005aec: 4a33 ldr r2, [pc, #204] @ (8005bbc ) 8005aee: 4293 cmp r3, r2 8005af0: d306 bcc.n 8005b00 8005af2: 68bb ldr r3, [r7, #8] 8005af4: 4a32 ldr r2, [pc, #200] @ (8005bc0 ) 8005af6: 4293 cmp r3, r2 8005af8: d802 bhi.n 8005b00 { /* hclk Clock Range between 17.2-18.5 MHz */ UsbTrd = 0xCU; 8005afa: 230c movs r3, #12 8005afc: 617b str r3, [r7, #20] 8005afe: e041 b.n 8005b84 } else if ((hclk >= 18500000U) && (hclk < 20000000U)) 8005b00: 68bb ldr r3, [r7, #8] 8005b02: 4a2f ldr r2, [pc, #188] @ (8005bc0 ) 8005b04: 4293 cmp r3, r2 8005b06: d906 bls.n 8005b16 8005b08: 68bb ldr r3, [r7, #8] 8005b0a: 4a2e ldr r2, [pc, #184] @ (8005bc4 ) 8005b0c: 4293 cmp r3, r2 8005b0e: d802 bhi.n 8005b16 { /* hclk Clock Range between 18.5-20 MHz */ UsbTrd = 0xBU; 8005b10: 230b movs r3, #11 8005b12: 617b str r3, [r7, #20] 8005b14: e036 b.n 8005b84 } else if ((hclk >= 20000000U) && (hclk < 21800000U)) 8005b16: 68bb ldr r3, [r7, #8] 8005b18: 4a2a ldr r2, [pc, #168] @ (8005bc4 ) 8005b1a: 4293 cmp r3, r2 8005b1c: d906 bls.n 8005b2c 8005b1e: 68bb ldr r3, [r7, #8] 8005b20: 4a29 ldr r2, [pc, #164] @ (8005bc8 ) 8005b22: 4293 cmp r3, r2 8005b24: d802 bhi.n 8005b2c { /* hclk Clock Range between 20-21.8 MHz */ UsbTrd = 0xAU; 8005b26: 230a movs r3, #10 8005b28: 617b str r3, [r7, #20] 8005b2a: e02b b.n 8005b84 } else if ((hclk >= 21800000U) && (hclk < 24000000U)) 8005b2c: 68bb ldr r3, [r7, #8] 8005b2e: 4a26 ldr r2, [pc, #152] @ (8005bc8 ) 8005b30: 4293 cmp r3, r2 8005b32: d906 bls.n 8005b42 8005b34: 68bb ldr r3, [r7, #8] 8005b36: 4a25 ldr r2, [pc, #148] @ (8005bcc ) 8005b38: 4293 cmp r3, r2 8005b3a: d202 bcs.n 8005b42 { /* hclk Clock Range between 21.8-24 MHz */ UsbTrd = 0x9U; 8005b3c: 2309 movs r3, #9 8005b3e: 617b str r3, [r7, #20] 8005b40: e020 b.n 8005b84 } else if ((hclk >= 24000000U) && (hclk < 27700000U)) 8005b42: 68bb ldr r3, [r7, #8] 8005b44: 4a21 ldr r2, [pc, #132] @ (8005bcc ) 8005b46: 4293 cmp r3, r2 8005b48: d306 bcc.n 8005b58 8005b4a: 68bb ldr r3, [r7, #8] 8005b4c: 4a20 ldr r2, [pc, #128] @ (8005bd0 ) 8005b4e: 4293 cmp r3, r2 8005b50: d802 bhi.n 8005b58 { /* hclk Clock Range between 24-27.7 MHz */ UsbTrd = 0x8U; 8005b52: 2308 movs r3, #8 8005b54: 617b str r3, [r7, #20] 8005b56: e015 b.n 8005b84 } else if ((hclk >= 27700000U) && (hclk < 32000000U)) 8005b58: 68bb ldr r3, [r7, #8] 8005b5a: 4a1d ldr r2, [pc, #116] @ (8005bd0 ) 8005b5c: 4293 cmp r3, r2 8005b5e: d906 bls.n 8005b6e 8005b60: 68bb ldr r3, [r7, #8] 8005b62: 4a1c ldr r2, [pc, #112] @ (8005bd4 ) 8005b64: 4293 cmp r3, r2 8005b66: d202 bcs.n 8005b6e { /* hclk Clock Range between 27.7-32 MHz */ UsbTrd = 0x7U; 8005b68: 2307 movs r3, #7 8005b6a: 617b str r3, [r7, #20] 8005b6c: e00a b.n 8005b84 } else /* if(hclk >= 32000000) */ { /* hclk Clock Range between 32-200 MHz */ UsbTrd = 0x6U; 8005b6e: 2306 movs r3, #6 8005b70: 617b str r3, [r7, #20] 8005b72: e007 b.n 8005b84 } } else if (speed == USBD_HS_SPEED) 8005b74: 79fb ldrb r3, [r7, #7] 8005b76: 2b00 cmp r3, #0 8005b78: d102 bne.n 8005b80 { UsbTrd = USBD_HS_TRDT_VALUE; 8005b7a: 2309 movs r3, #9 8005b7c: 617b str r3, [r7, #20] 8005b7e: e001 b.n 8005b84 } else { UsbTrd = USBD_DEFAULT_TRDT_VALUE; 8005b80: 2309 movs r3, #9 8005b82: 617b str r3, [r7, #20] } USBx->GUSBCFG &= ~USB_OTG_GUSBCFG_TRDT; 8005b84: 68fb ldr r3, [r7, #12] 8005b86: 68db ldr r3, [r3, #12] 8005b88: f423 5270 bic.w r2, r3, #15360 @ 0x3c00 8005b8c: 68fb ldr r3, [r7, #12] 8005b8e: 60da str r2, [r3, #12] USBx->GUSBCFG |= (uint32_t)((UsbTrd << 10) & USB_OTG_GUSBCFG_TRDT); 8005b90: 68fb ldr r3, [r7, #12] 8005b92: 68da ldr r2, [r3, #12] 8005b94: 697b ldr r3, [r7, #20] 8005b96: 029b lsls r3, r3, #10 8005b98: f403 5370 and.w r3, r3, #15360 @ 0x3c00 8005b9c: 431a orrs r2, r3 8005b9e: 68fb ldr r3, [r7, #12] 8005ba0: 60da str r2, [r3, #12] return HAL_OK; 8005ba2: 2300 movs r3, #0 } 8005ba4: 4618 mov r0, r3 8005ba6: 371c adds r7, #28 8005ba8: 46bd mov sp, r7 8005baa: f85d 7b04 ldr.w r7, [sp], #4 8005bae: 4770 bx lr 8005bb0: 00d8acbf .word 0x00d8acbf 8005bb4: 00e4e1c0 .word 0x00e4e1c0 8005bb8: 00f42400 .word 0x00f42400 8005bbc: 01067380 .word 0x01067380 8005bc0: 011a499f .word 0x011a499f 8005bc4: 01312cff .word 0x01312cff 8005bc8: 014ca43f .word 0x014ca43f 8005bcc: 016e3600 .word 0x016e3600 8005bd0: 01a6ab1f .word 0x01a6ab1f 8005bd4: 01e84800 .word 0x01e84800 08005bd8 : * Enables the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx) { 8005bd8: b480 push {r7} 8005bda: b083 sub sp, #12 8005bdc: af00 add r7, sp, #0 8005bde: 6078 str r0, [r7, #4] USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT; 8005be0: 687b ldr r3, [r7, #4] 8005be2: 689b ldr r3, [r3, #8] 8005be4: f043 0201 orr.w r2, r3, #1 8005be8: 687b ldr r3, [r7, #4] 8005bea: 609a str r2, [r3, #8] return HAL_OK; 8005bec: 2300 movs r3, #0 } 8005bee: 4618 mov r0, r3 8005bf0: 370c adds r7, #12 8005bf2: 46bd mov sp, r7 8005bf4: f85d 7b04 ldr.w r7, [sp], #4 8005bf8: 4770 bx lr 08005bfa : * Disable the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx) { 8005bfa: b480 push {r7} 8005bfc: b083 sub sp, #12 8005bfe: af00 add r7, sp, #0 8005c00: 6078 str r0, [r7, #4] USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT; 8005c02: 687b ldr r3, [r7, #4] 8005c04: 689b ldr r3, [r3, #8] 8005c06: f023 0201 bic.w r2, r3, #1 8005c0a: 687b ldr r3, [r7, #4] 8005c0c: 609a str r2, [r3, #8] return HAL_OK; 8005c0e: 2300 movs r3, #0 } 8005c10: 4618 mov r0, r3 8005c12: 370c adds r7, #12 8005c14: 46bd mov sp, r7 8005c16: f85d 7b04 ldr.w r7, [sp], #4 8005c1a: 4770 bx lr 08005c1c : * @arg USB_DEVICE_MODE Peripheral mode * @arg USB_HOST_MODE Host mode * @retval HAL status */ HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode) { 8005c1c: b580 push {r7, lr} 8005c1e: b084 sub sp, #16 8005c20: af00 add r7, sp, #0 8005c22: 6078 str r0, [r7, #4] 8005c24: 460b mov r3, r1 8005c26: 70fb strb r3, [r7, #3] uint32_t ms = 0U; 8005c28: 2300 movs r3, #0 8005c2a: 60fb str r3, [r7, #12] USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD); 8005c2c: 687b ldr r3, [r7, #4] 8005c2e: 68db ldr r3, [r3, #12] 8005c30: f023 42c0 bic.w r2, r3, #1610612736 @ 0x60000000 8005c34: 687b ldr r3, [r7, #4] 8005c36: 60da str r2, [r3, #12] if (mode == USB_HOST_MODE) 8005c38: 78fb ldrb r3, [r7, #3] 8005c3a: 2b01 cmp r3, #1 8005c3c: d115 bne.n 8005c6a { USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD; 8005c3e: 687b ldr r3, [r7, #4] 8005c40: 68db ldr r3, [r3, #12] 8005c42: f043 5200 orr.w r2, r3, #536870912 @ 0x20000000 8005c46: 687b ldr r3, [r7, #4] 8005c48: 60da str r2, [r3, #12] do { HAL_Delay(10U); 8005c4a: 200a movs r0, #10 8005c4c: f7fb fc18 bl 8001480 ms += 10U; 8005c50: 68fb ldr r3, [r7, #12] 8005c52: 330a adds r3, #10 8005c54: 60fb str r3, [r7, #12] } while ((USB_GetMode(USBx) != (uint32_t)USB_HOST_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS)); 8005c56: 6878 ldr r0, [r7, #4] 8005c58: f001 f939 bl 8006ece 8005c5c: 4603 mov r3, r0 8005c5e: 2b01 cmp r3, #1 8005c60: d01e beq.n 8005ca0 8005c62: 68fb ldr r3, [r7, #12] 8005c64: 2bc7 cmp r3, #199 @ 0xc7 8005c66: d9f0 bls.n 8005c4a 8005c68: e01a b.n 8005ca0 } else if (mode == USB_DEVICE_MODE) 8005c6a: 78fb ldrb r3, [r7, #3] 8005c6c: 2b00 cmp r3, #0 8005c6e: d115 bne.n 8005c9c { USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; 8005c70: 687b ldr r3, [r7, #4] 8005c72: 68db ldr r3, [r3, #12] 8005c74: f043 4280 orr.w r2, r3, #1073741824 @ 0x40000000 8005c78: 687b ldr r3, [r7, #4] 8005c7a: 60da str r2, [r3, #12] do { HAL_Delay(10U); 8005c7c: 200a movs r0, #10 8005c7e: f7fb fbff bl 8001480 ms += 10U; 8005c82: 68fb ldr r3, [r7, #12] 8005c84: 330a adds r3, #10 8005c86: 60fb str r3, [r7, #12] } while ((USB_GetMode(USBx) != (uint32_t)USB_DEVICE_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS)); 8005c88: 6878 ldr r0, [r7, #4] 8005c8a: f001 f920 bl 8006ece 8005c8e: 4603 mov r3, r0 8005c90: 2b00 cmp r3, #0 8005c92: d005 beq.n 8005ca0 8005c94: 68fb ldr r3, [r7, #12] 8005c96: 2bc7 cmp r3, #199 @ 0xc7 8005c98: d9f0 bls.n 8005c7c 8005c9a: e001 b.n 8005ca0 } else { return HAL_ERROR; 8005c9c: 2301 movs r3, #1 8005c9e: e005 b.n 8005cac } if (ms == HAL_USB_CURRENT_MODE_MAX_DELAY_MS) 8005ca0: 68fb ldr r3, [r7, #12] 8005ca2: 2bc8 cmp r3, #200 @ 0xc8 8005ca4: d101 bne.n 8005caa { return HAL_ERROR; 8005ca6: 2301 movs r3, #1 8005ca8: e000 b.n 8005cac } return HAL_OK; 8005caa: 2300 movs r3, #0 } 8005cac: 4618 mov r0, r3 8005cae: 3710 adds r7, #16 8005cb0: 46bd mov sp, r7 8005cb2: bd80 pop {r7, pc} 08005cb4 : * @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) { 8005cb4: b084 sub sp, #16 8005cb6: b580 push {r7, lr} 8005cb8: b086 sub sp, #24 8005cba: af00 add r7, sp, #0 8005cbc: 6078 str r0, [r7, #4] 8005cbe: f107 0024 add.w r0, r7, #36 @ 0x24 8005cc2: e880 000e stmia.w r0, {r1, r2, r3} HAL_StatusTypeDef ret = HAL_OK; 8005cc6: 2300 movs r3, #0 8005cc8: 75fb strb r3, [r7, #23] uint32_t USBx_BASE = (uint32_t)USBx; 8005cca: 687b ldr r3, [r7, #4] 8005ccc: 60fb str r3, [r7, #12] uint32_t i; for (i = 0U; i < 15U; i++) 8005cce: 2300 movs r3, #0 8005cd0: 613b str r3, [r7, #16] 8005cd2: e009 b.n 8005ce8 { USBx->DIEPTXF[i] = 0U; 8005cd4: 687a ldr r2, [r7, #4] 8005cd6: 693b ldr r3, [r7, #16] 8005cd8: 3340 adds r3, #64 @ 0x40 8005cda: 009b lsls r3, r3, #2 8005cdc: 4413 add r3, r2 8005cde: 2200 movs r2, #0 8005ce0: 605a str r2, [r3, #4] for (i = 0U; i < 15U; i++) 8005ce2: 693b ldr r3, [r7, #16] 8005ce4: 3301 adds r3, #1 8005ce6: 613b str r3, [r7, #16] 8005ce8: 693b ldr r3, [r7, #16] 8005cea: 2b0e cmp r3, #14 8005cec: d9f2 bls.n 8005cd4 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \ || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \ || defined(STM32F423xx) /* VBUS Sensing setup */ if (cfg.vbus_sensing_enable == 0U) 8005cee: f897 302e ldrb.w r3, [r7, #46] @ 0x2e 8005cf2: 2b00 cmp r3, #0 8005cf4: d11c bne.n 8005d30 { USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS; 8005cf6: 68fb ldr r3, [r7, #12] 8005cf8: f503 6300 add.w r3, r3, #2048 @ 0x800 8005cfc: 685b ldr r3, [r3, #4] 8005cfe: 68fa ldr r2, [r7, #12] 8005d00: f502 6200 add.w r2, r2, #2048 @ 0x800 8005d04: f043 0302 orr.w r3, r3, #2 8005d08: 6053 str r3, [r2, #4] /* Deactivate VBUS Sensing B */ USBx->GCCFG &= ~USB_OTG_GCCFG_VBDEN; 8005d0a: 687b ldr r3, [r7, #4] 8005d0c: 6b9b ldr r3, [r3, #56] @ 0x38 8005d0e: f423 1200 bic.w r2, r3, #2097152 @ 0x200000 8005d12: 687b ldr r3, [r7, #4] 8005d14: 639a str r2, [r3, #56] @ 0x38 /* B-peripheral session valid override enable */ USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; 8005d16: 687b ldr r3, [r7, #4] 8005d18: 681b ldr r3, [r3, #0] 8005d1a: f043 0240 orr.w r2, r3, #64 @ 0x40 8005d1e: 687b ldr r3, [r7, #4] 8005d20: 601a str r2, [r3, #0] USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; 8005d22: 687b ldr r3, [r7, #4] 8005d24: 681b ldr r3, [r3, #0] 8005d26: f043 0280 orr.w r2, r3, #128 @ 0x80 8005d2a: 687b ldr r3, [r7, #4] 8005d2c: 601a str r2, [r3, #0] 8005d2e: e005 b.n 8005d3c } else { /* Enable HW VBUS sensing */ USBx->GCCFG |= USB_OTG_GCCFG_VBDEN; 8005d30: 687b ldr r3, [r7, #4] 8005d32: 6b9b ldr r3, [r3, #56] @ 0x38 8005d34: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 8005d38: 687b ldr r3, [r7, #4] 8005d3a: 639a str r2, [r3, #56] @ 0x38 #endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */ /* Restart the Phy Clock */ USBx_PCGCCTL = 0U; 8005d3c: 68fb ldr r3, [r7, #12] 8005d3e: f503 6360 add.w r3, r3, #3584 @ 0xe00 8005d42: 461a mov r2, r3 8005d44: 2300 movs r3, #0 8005d46: 6013 str r3, [r2, #0] if (cfg.phy_itface == USB_OTG_ULPI_PHY) 8005d48: f897 3029 ldrb.w r3, [r7, #41] @ 0x29 8005d4c: 2b01 cmp r3, #1 8005d4e: d10d bne.n 8005d6c { if (cfg.speed == USBD_HS_SPEED) 8005d50: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8005d54: 2b00 cmp r3, #0 8005d56: d104 bne.n 8005d62 { /* Set Core speed to High speed mode */ (void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_HIGH); 8005d58: 2100 movs r1, #0 8005d5a: 6878 ldr r0, [r7, #4] 8005d5c: f000 f968 bl 8006030 8005d60: e008 b.n 8005d74 } else { /* Set Core speed to Full speed mode */ (void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_HIGH_IN_FULL); 8005d62: 2101 movs r1, #1 8005d64: 6878 ldr r0, [r7, #4] 8005d66: f000 f963 bl 8006030 8005d6a: e003 b.n 8005d74 } } else { /* Set Core speed to Full speed mode */ (void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_FULL); 8005d6c: 2103 movs r1, #3 8005d6e: 6878 ldr r0, [r7, #4] 8005d70: f000 f95e bl 8006030 } /* Flush the FIFOs */ if (USB_FlushTxFifo(USBx, 0x10U) != HAL_OK) /* all Tx FIFOs */ 8005d74: 2110 movs r1, #16 8005d76: 6878 ldr r0, [r7, #4] 8005d78: f000 f8fa bl 8005f70 8005d7c: 4603 mov r3, r0 8005d7e: 2b00 cmp r3, #0 8005d80: d001 beq.n 8005d86 { ret = HAL_ERROR; 8005d82: 2301 movs r3, #1 8005d84: 75fb strb r3, [r7, #23] } if (USB_FlushRxFifo(USBx) != HAL_OK) 8005d86: 6878 ldr r0, [r7, #4] 8005d88: f000 f924 bl 8005fd4 8005d8c: 4603 mov r3, r0 8005d8e: 2b00 cmp r3, #0 8005d90: d001 beq.n 8005d96 { ret = HAL_ERROR; 8005d92: 2301 movs r3, #1 8005d94: 75fb strb r3, [r7, #23] } /* Clear all pending Device Interrupts */ USBx_DEVICE->DIEPMSK = 0U; 8005d96: 68fb ldr r3, [r7, #12] 8005d98: f503 6300 add.w r3, r3, #2048 @ 0x800 8005d9c: 461a mov r2, r3 8005d9e: 2300 movs r3, #0 8005da0: 6113 str r3, [r2, #16] USBx_DEVICE->DOEPMSK = 0U; 8005da2: 68fb ldr r3, [r7, #12] 8005da4: f503 6300 add.w r3, r3, #2048 @ 0x800 8005da8: 461a mov r2, r3 8005daa: 2300 movs r3, #0 8005dac: 6153 str r3, [r2, #20] USBx_DEVICE->DAINTMSK = 0U; 8005dae: 68fb ldr r3, [r7, #12] 8005db0: f503 6300 add.w r3, r3, #2048 @ 0x800 8005db4: 461a mov r2, r3 8005db6: 2300 movs r3, #0 8005db8: 61d3 str r3, [r2, #28] for (i = 0U; i < cfg.dev_endpoints; i++) 8005dba: 2300 movs r3, #0 8005dbc: 613b str r3, [r7, #16] 8005dbe: e043 b.n 8005e48 { if ((USBx_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) 8005dc0: 693b ldr r3, [r7, #16] 8005dc2: 015a lsls r2, r3, #5 8005dc4: 68fb ldr r3, [r7, #12] 8005dc6: 4413 add r3, r2 8005dc8: f503 6310 add.w r3, r3, #2304 @ 0x900 8005dcc: 681b ldr r3, [r3, #0] 8005dce: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 8005dd2: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8005dd6: d118 bne.n 8005e0a { if (i == 0U) 8005dd8: 693b ldr r3, [r7, #16] 8005dda: 2b00 cmp r3, #0 8005ddc: d10a bne.n 8005df4 { USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_SNAK; 8005dde: 693b ldr r3, [r7, #16] 8005de0: 015a lsls r2, r3, #5 8005de2: 68fb ldr r3, [r7, #12] 8005de4: 4413 add r3, r2 8005de6: f503 6310 add.w r3, r3, #2304 @ 0x900 8005dea: 461a mov r2, r3 8005dec: f04f 6300 mov.w r3, #134217728 @ 0x8000000 8005df0: 6013 str r3, [r2, #0] 8005df2: e013 b.n 8005e1c } else { USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK; 8005df4: 693b ldr r3, [r7, #16] 8005df6: 015a lsls r2, r3, #5 8005df8: 68fb ldr r3, [r7, #12] 8005dfa: 4413 add r3, r2 8005dfc: f503 6310 add.w r3, r3, #2304 @ 0x900 8005e00: 461a mov r2, r3 8005e02: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8005e06: 6013 str r3, [r2, #0] 8005e08: e008 b.n 8005e1c } } else { USBx_INEP(i)->DIEPCTL = 0U; 8005e0a: 693b ldr r3, [r7, #16] 8005e0c: 015a lsls r2, r3, #5 8005e0e: 68fb ldr r3, [r7, #12] 8005e10: 4413 add r3, r2 8005e12: f503 6310 add.w r3, r3, #2304 @ 0x900 8005e16: 461a mov r2, r3 8005e18: 2300 movs r3, #0 8005e1a: 6013 str r3, [r2, #0] } USBx_INEP(i)->DIEPTSIZ = 0U; 8005e1c: 693b ldr r3, [r7, #16] 8005e1e: 015a lsls r2, r3, #5 8005e20: 68fb ldr r3, [r7, #12] 8005e22: 4413 add r3, r2 8005e24: f503 6310 add.w r3, r3, #2304 @ 0x900 8005e28: 461a mov r2, r3 8005e2a: 2300 movs r3, #0 8005e2c: 6113 str r3, [r2, #16] USBx_INEP(i)->DIEPINT = 0xFB7FU; 8005e2e: 693b ldr r3, [r7, #16] 8005e30: 015a lsls r2, r3, #5 8005e32: 68fb ldr r3, [r7, #12] 8005e34: 4413 add r3, r2 8005e36: f503 6310 add.w r3, r3, #2304 @ 0x900 8005e3a: 461a mov r2, r3 8005e3c: f64f 337f movw r3, #64383 @ 0xfb7f 8005e40: 6093 str r3, [r2, #8] for (i = 0U; i < cfg.dev_endpoints; i++) 8005e42: 693b ldr r3, [r7, #16] 8005e44: 3301 adds r3, #1 8005e46: 613b str r3, [r7, #16] 8005e48: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 8005e4c: 461a mov r2, r3 8005e4e: 693b ldr r3, [r7, #16] 8005e50: 4293 cmp r3, r2 8005e52: d3b5 bcc.n 8005dc0 } for (i = 0U; i < cfg.dev_endpoints; i++) 8005e54: 2300 movs r3, #0 8005e56: 613b str r3, [r7, #16] 8005e58: e043 b.n 8005ee2 { if ((USBx_OUTEP(i)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) 8005e5a: 693b ldr r3, [r7, #16] 8005e5c: 015a lsls r2, r3, #5 8005e5e: 68fb ldr r3, [r7, #12] 8005e60: 4413 add r3, r2 8005e62: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005e66: 681b ldr r3, [r3, #0] 8005e68: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 8005e6c: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8005e70: d118 bne.n 8005ea4 { if (i == 0U) 8005e72: 693b ldr r3, [r7, #16] 8005e74: 2b00 cmp r3, #0 8005e76: d10a bne.n 8005e8e { USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_SNAK; 8005e78: 693b ldr r3, [r7, #16] 8005e7a: 015a lsls r2, r3, #5 8005e7c: 68fb ldr r3, [r7, #12] 8005e7e: 4413 add r3, r2 8005e80: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005e84: 461a mov r2, r3 8005e86: f04f 6300 mov.w r3, #134217728 @ 0x8000000 8005e8a: 6013 str r3, [r2, #0] 8005e8c: e013 b.n 8005eb6 } else { USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK; 8005e8e: 693b ldr r3, [r7, #16] 8005e90: 015a lsls r2, r3, #5 8005e92: 68fb ldr r3, [r7, #12] 8005e94: 4413 add r3, r2 8005e96: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005e9a: 461a mov r2, r3 8005e9c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8005ea0: 6013 str r3, [r2, #0] 8005ea2: e008 b.n 8005eb6 } } else { USBx_OUTEP(i)->DOEPCTL = 0U; 8005ea4: 693b ldr r3, [r7, #16] 8005ea6: 015a lsls r2, r3, #5 8005ea8: 68fb ldr r3, [r7, #12] 8005eaa: 4413 add r3, r2 8005eac: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005eb0: 461a mov r2, r3 8005eb2: 2300 movs r3, #0 8005eb4: 6013 str r3, [r2, #0] } USBx_OUTEP(i)->DOEPTSIZ = 0U; 8005eb6: 693b ldr r3, [r7, #16] 8005eb8: 015a lsls r2, r3, #5 8005eba: 68fb ldr r3, [r7, #12] 8005ebc: 4413 add r3, r2 8005ebe: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005ec2: 461a mov r2, r3 8005ec4: 2300 movs r3, #0 8005ec6: 6113 str r3, [r2, #16] USBx_OUTEP(i)->DOEPINT = 0xFB7FU; 8005ec8: 693b ldr r3, [r7, #16] 8005eca: 015a lsls r2, r3, #5 8005ecc: 68fb ldr r3, [r7, #12] 8005ece: 4413 add r3, r2 8005ed0: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005ed4: 461a mov r2, r3 8005ed6: f64f 337f movw r3, #64383 @ 0xfb7f 8005eda: 6093 str r3, [r2, #8] for (i = 0U; i < cfg.dev_endpoints; i++) 8005edc: 693b ldr r3, [r7, #16] 8005ede: 3301 adds r3, #1 8005ee0: 613b str r3, [r7, #16] 8005ee2: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 8005ee6: 461a mov r2, r3 8005ee8: 693b ldr r3, [r7, #16] 8005eea: 4293 cmp r3, r2 8005eec: d3b5 bcc.n 8005e5a } USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM); 8005eee: 68fb ldr r3, [r7, #12] 8005ef0: f503 6300 add.w r3, r3, #2048 @ 0x800 8005ef4: 691b ldr r3, [r3, #16] 8005ef6: 68fa ldr r2, [r7, #12] 8005ef8: f502 6200 add.w r2, r2, #2048 @ 0x800 8005efc: f423 7380 bic.w r3, r3, #256 @ 0x100 8005f00: 6113 str r3, [r2, #16] /* Disable all interrupts. */ USBx->GINTMSK = 0U; 8005f02: 687b ldr r3, [r7, #4] 8005f04: 2200 movs r2, #0 8005f06: 619a str r2, [r3, #24] /* Clear any pending interrupts */ USBx->GINTSTS = 0xBFFFFFFFU; 8005f08: 687b ldr r3, [r7, #4] 8005f0a: f06f 4280 mvn.w r2, #1073741824 @ 0x40000000 8005f0e: 615a str r2, [r3, #20] /* Enable the common interrupts */ if (cfg.dma_enable == 0U) 8005f10: f897 3026 ldrb.w r3, [r7, #38] @ 0x26 8005f14: 2b00 cmp r3, #0 8005f16: d105 bne.n 8005f24 { USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; 8005f18: 687b ldr r3, [r7, #4] 8005f1a: 699b ldr r3, [r3, #24] 8005f1c: f043 0210 orr.w r2, r3, #16 8005f20: 687b ldr r3, [r7, #4] 8005f22: 619a str r2, [r3, #24] } /* Enable interrupts matching to the Device mode ONLY */ USBx->GINTMSK |= USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST | 8005f24: 687b ldr r3, [r7, #4] 8005f26: 699a ldr r2, [r3, #24] 8005f28: 4b10 ldr r3, [pc, #64] @ (8005f6c ) 8005f2a: 4313 orrs r3, r2 8005f2c: 687a ldr r2, [r7, #4] 8005f2e: 6193 str r3, [r2, #24] USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT | USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM | USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM; if (cfg.Sof_enable != 0U) 8005f30: f897 302a ldrb.w r3, [r7, #42] @ 0x2a 8005f34: 2b00 cmp r3, #0 8005f36: d005 beq.n 8005f44 { USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM; 8005f38: 687b ldr r3, [r7, #4] 8005f3a: 699b ldr r3, [r3, #24] 8005f3c: f043 0208 orr.w r2, r3, #8 8005f40: 687b ldr r3, [r7, #4] 8005f42: 619a str r2, [r3, #24] } if (cfg.vbus_sensing_enable == 1U) 8005f44: f897 302e ldrb.w r3, [r7, #46] @ 0x2e 8005f48: 2b01 cmp r3, #1 8005f4a: d107 bne.n 8005f5c { USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT); 8005f4c: 687b ldr r3, [r7, #4] 8005f4e: 699b ldr r3, [r3, #24] 8005f50: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 8005f54: f043 0304 orr.w r3, r3, #4 8005f58: 687a ldr r2, [r7, #4] 8005f5a: 6193 str r3, [r2, #24] } return ret; 8005f5c: 7dfb ldrb r3, [r7, #23] } 8005f5e: 4618 mov r0, r3 8005f60: 3718 adds r7, #24 8005f62: 46bd mov sp, r7 8005f64: e8bd 4080 ldmia.w sp!, {r7, lr} 8005f68: b004 add sp, #16 8005f6a: 4770 bx lr 8005f6c: 803c3800 .word 0x803c3800 08005f70 : * This parameter can be a value from 1 to 15 15 means Flush all Tx FIFOs * @retval HAL status */ HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num) { 8005f70: b480 push {r7} 8005f72: b085 sub sp, #20 8005f74: af00 add r7, sp, #0 8005f76: 6078 str r0, [r7, #4] 8005f78: 6039 str r1, [r7, #0] __IO uint32_t count = 0U; 8005f7a: 2300 movs r3, #0 8005f7c: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; 8005f7e: 68fb ldr r3, [r7, #12] 8005f80: 3301 adds r3, #1 8005f82: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 8005f84: 68fb ldr r3, [r7, #12] 8005f86: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 8005f8a: d901 bls.n 8005f90 { return HAL_TIMEOUT; 8005f8c: 2303 movs r3, #3 8005f8e: e01b b.n 8005fc8 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); 8005f90: 687b ldr r3, [r7, #4] 8005f92: 691b ldr r3, [r3, #16] 8005f94: 2b00 cmp r3, #0 8005f96: daf2 bge.n 8005f7e /* Flush TX Fifo */ count = 0U; 8005f98: 2300 movs r3, #0 8005f9a: 60fb str r3, [r7, #12] USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6)); 8005f9c: 683b ldr r3, [r7, #0] 8005f9e: 019b lsls r3, r3, #6 8005fa0: f043 0220 orr.w r2, r3, #32 8005fa4: 687b ldr r3, [r7, #4] 8005fa6: 611a str r2, [r3, #16] do { count++; 8005fa8: 68fb ldr r3, [r7, #12] 8005faa: 3301 adds r3, #1 8005fac: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 8005fae: 68fb ldr r3, [r7, #12] 8005fb0: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 8005fb4: d901 bls.n 8005fba { return HAL_TIMEOUT; 8005fb6: 2303 movs r3, #3 8005fb8: e006 b.n 8005fc8 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH); 8005fba: 687b ldr r3, [r7, #4] 8005fbc: 691b ldr r3, [r3, #16] 8005fbe: f003 0320 and.w r3, r3, #32 8005fc2: 2b20 cmp r3, #32 8005fc4: d0f0 beq.n 8005fa8 return HAL_OK; 8005fc6: 2300 movs r3, #0 } 8005fc8: 4618 mov r0, r3 8005fca: 3714 adds r7, #20 8005fcc: 46bd mov sp, r7 8005fce: f85d 7b04 ldr.w r7, [sp], #4 8005fd2: 4770 bx lr 08005fd4 : * @brief USB_FlushRxFifo Flush Rx FIFO * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx) { 8005fd4: b480 push {r7} 8005fd6: b085 sub sp, #20 8005fd8: af00 add r7, sp, #0 8005fda: 6078 str r0, [r7, #4] __IO uint32_t count = 0U; 8005fdc: 2300 movs r3, #0 8005fde: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; 8005fe0: 68fb ldr r3, [r7, #12] 8005fe2: 3301 adds r3, #1 8005fe4: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 8005fe6: 68fb ldr r3, [r7, #12] 8005fe8: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 8005fec: d901 bls.n 8005ff2 { return HAL_TIMEOUT; 8005fee: 2303 movs r3, #3 8005ff0: e018 b.n 8006024 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); 8005ff2: 687b ldr r3, [r7, #4] 8005ff4: 691b ldr r3, [r3, #16] 8005ff6: 2b00 cmp r3, #0 8005ff8: daf2 bge.n 8005fe0 /* Flush RX Fifo */ count = 0U; 8005ffa: 2300 movs r3, #0 8005ffc: 60fb str r3, [r7, #12] USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH; 8005ffe: 687b ldr r3, [r7, #4] 8006000: 2210 movs r2, #16 8006002: 611a str r2, [r3, #16] do { count++; 8006004: 68fb ldr r3, [r7, #12] 8006006: 3301 adds r3, #1 8006008: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 800600a: 68fb ldr r3, [r7, #12] 800600c: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 8006010: d901 bls.n 8006016 { return HAL_TIMEOUT; 8006012: 2303 movs r3, #3 8006014: e006 b.n 8006024 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH); 8006016: 687b ldr r3, [r7, #4] 8006018: 691b ldr r3, [r3, #16] 800601a: f003 0310 and.w r3, r3, #16 800601e: 2b10 cmp r3, #16 8006020: d0f0 beq.n 8006004 return HAL_OK; 8006022: 2300 movs r3, #0 } 8006024: 4618 mov r0, r3 8006026: 3714 adds r7, #20 8006028: 46bd mov sp, r7 800602a: f85d 7b04 ldr.w r7, [sp], #4 800602e: 4770 bx lr 08006030 : * @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode * @arg USB_OTG_SPEED_FULL: Full speed mode * @retval Hal status */ HAL_StatusTypeDef USB_SetDevSpeed(const USB_OTG_GlobalTypeDef *USBx, uint8_t speed) { 8006030: b480 push {r7} 8006032: b085 sub sp, #20 8006034: af00 add r7, sp, #0 8006036: 6078 str r0, [r7, #4] 8006038: 460b mov r3, r1 800603a: 70fb strb r3, [r7, #3] uint32_t USBx_BASE = (uint32_t)USBx; 800603c: 687b ldr r3, [r7, #4] 800603e: 60fb str r3, [r7, #12] USBx_DEVICE->DCFG |= speed; 8006040: 68fb ldr r3, [r7, #12] 8006042: f503 6300 add.w r3, r3, #2048 @ 0x800 8006046: 681a ldr r2, [r3, #0] 8006048: 78fb ldrb r3, [r7, #3] 800604a: 68f9 ldr r1, [r7, #12] 800604c: f501 6100 add.w r1, r1, #2048 @ 0x800 8006050: 4313 orrs r3, r2 8006052: 600b str r3, [r1, #0] return HAL_OK; 8006054: 2300 movs r3, #0 } 8006056: 4618 mov r0, r3 8006058: 3714 adds r7, #20 800605a: 46bd mov sp, r7 800605c: f85d 7b04 ldr.w r7, [sp], #4 8006060: 4770 bx lr 08006062 : * This parameter can be one of these values: * @arg USBD_HS_SPEED: High speed mode * @arg USBD_FS_SPEED: Full speed mode */ uint8_t USB_GetDevSpeed(const USB_OTG_GlobalTypeDef *USBx) { 8006062: b480 push {r7} 8006064: b087 sub sp, #28 8006066: af00 add r7, sp, #0 8006068: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 800606a: 687b ldr r3, [r7, #4] 800606c: 613b str r3, [r7, #16] uint8_t speed; uint32_t DevEnumSpeed = USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD; 800606e: 693b ldr r3, [r7, #16] 8006070: f503 6300 add.w r3, r3, #2048 @ 0x800 8006074: 689b ldr r3, [r3, #8] 8006076: f003 0306 and.w r3, r3, #6 800607a: 60fb str r3, [r7, #12] if (DevEnumSpeed == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ) 800607c: 68fb ldr r3, [r7, #12] 800607e: 2b00 cmp r3, #0 8006080: d102 bne.n 8006088 { speed = USBD_HS_SPEED; 8006082: 2300 movs r3, #0 8006084: 75fb strb r3, [r7, #23] 8006086: e00a b.n 800609e } else if ((DevEnumSpeed == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ) || 8006088: 68fb ldr r3, [r7, #12] 800608a: 2b02 cmp r3, #2 800608c: d002 beq.n 8006094 800608e: 68fb ldr r3, [r7, #12] 8006090: 2b06 cmp r3, #6 8006092: d102 bne.n 800609a (DevEnumSpeed == DSTS_ENUMSPD_FS_PHY_48MHZ)) { speed = USBD_FS_SPEED; 8006094: 2302 movs r3, #2 8006096: 75fb strb r3, [r7, #23] 8006098: e001 b.n 800609e } else { speed = 0xFU; 800609a: 230f movs r3, #15 800609c: 75fb strb r3, [r7, #23] } return speed; 800609e: 7dfb ldrb r3, [r7, #23] } 80060a0: 4618 mov r0, r3 80060a2: 371c adds r7, #28 80060a4: 46bd mov sp, r7 80060a6: f85d 7b04 ldr.w r7, [sp], #4 80060aa: 4770 bx lr 080060ac : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_ActivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep) { 80060ac: b480 push {r7} 80060ae: b085 sub sp, #20 80060b0: af00 add r7, sp, #0 80060b2: 6078 str r0, [r7, #4] 80060b4: 6039 str r1, [r7, #0] uint32_t USBx_BASE = (uint32_t)USBx; 80060b6: 687b ldr r3, [r7, #4] 80060b8: 60fb str r3, [r7, #12] uint32_t epnum = (uint32_t)ep->num; 80060ba: 683b ldr r3, [r7, #0] 80060bc: 781b ldrb r3, [r3, #0] 80060be: 60bb str r3, [r7, #8] if (ep->is_in == 1U) 80060c0: 683b ldr r3, [r7, #0] 80060c2: 785b ldrb r3, [r3, #1] 80060c4: 2b01 cmp r3, #1 80060c6: d13a bne.n 800613e { USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK)); 80060c8: 68fb ldr r3, [r7, #12] 80060ca: f503 6300 add.w r3, r3, #2048 @ 0x800 80060ce: 69da ldr r2, [r3, #28] 80060d0: 683b ldr r3, [r7, #0] 80060d2: 781b ldrb r3, [r3, #0] 80060d4: f003 030f and.w r3, r3, #15 80060d8: 2101 movs r1, #1 80060da: fa01 f303 lsl.w r3, r1, r3 80060de: b29b uxth r3, r3 80060e0: 68f9 ldr r1, [r7, #12] 80060e2: f501 6100 add.w r1, r1, #2048 @ 0x800 80060e6: 4313 orrs r3, r2 80060e8: 61cb str r3, [r1, #28] if ((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_USBAEP) == 0U) 80060ea: 68bb ldr r3, [r7, #8] 80060ec: 015a lsls r2, r3, #5 80060ee: 68fb ldr r3, [r7, #12] 80060f0: 4413 add r3, r2 80060f2: f503 6310 add.w r3, r3, #2304 @ 0x900 80060f6: 681b ldr r3, [r3, #0] 80060f8: f403 4300 and.w r3, r3, #32768 @ 0x8000 80060fc: 2b00 cmp r3, #0 80060fe: d155 bne.n 80061ac { USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) | 8006100: 68bb ldr r3, [r7, #8] 8006102: 015a lsls r2, r3, #5 8006104: 68fb ldr r3, [r7, #12] 8006106: 4413 add r3, r2 8006108: f503 6310 add.w r3, r3, #2304 @ 0x900 800610c: 681a ldr r2, [r3, #0] 800610e: 683b ldr r3, [r7, #0] 8006110: 689b ldr r3, [r3, #8] 8006112: f3c3 010a ubfx r1, r3, #0, #11 ((uint32_t)ep->type << 18) | (epnum << 22) | 8006116: 683b ldr r3, [r7, #0] 8006118: 791b ldrb r3, [r3, #4] 800611a: 049b lsls r3, r3, #18 USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) | 800611c: 4319 orrs r1, r3 ((uint32_t)ep->type << 18) | (epnum << 22) | 800611e: 68bb ldr r3, [r7, #8] 8006120: 059b lsls r3, r3, #22 8006122: 430b orrs r3, r1 USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) | 8006124: 4313 orrs r3, r2 8006126: 68ba ldr r2, [r7, #8] 8006128: 0151 lsls r1, r2, #5 800612a: 68fa ldr r2, [r7, #12] 800612c: 440a add r2, r1 800612e: f502 6210 add.w r2, r2, #2304 @ 0x900 8006132: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8006136: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800613a: 6013 str r3, [r2, #0] 800613c: e036 b.n 80061ac USB_OTG_DIEPCTL_USBAEP; } } else { USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16); 800613e: 68fb ldr r3, [r7, #12] 8006140: f503 6300 add.w r3, r3, #2048 @ 0x800 8006144: 69da ldr r2, [r3, #28] 8006146: 683b ldr r3, [r7, #0] 8006148: 781b ldrb r3, [r3, #0] 800614a: f003 030f and.w r3, r3, #15 800614e: 2101 movs r1, #1 8006150: fa01 f303 lsl.w r3, r1, r3 8006154: 041b lsls r3, r3, #16 8006156: 68f9 ldr r1, [r7, #12] 8006158: f501 6100 add.w r1, r1, #2048 @ 0x800 800615c: 4313 orrs r3, r2 800615e: 61cb str r3, [r1, #28] if (((USBx_OUTEP(epnum)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) 8006160: 68bb ldr r3, [r7, #8] 8006162: 015a lsls r2, r3, #5 8006164: 68fb ldr r3, [r7, #12] 8006166: 4413 add r3, r2 8006168: f503 6330 add.w r3, r3, #2816 @ 0xb00 800616c: 681b ldr r3, [r3, #0] 800616e: f403 4300 and.w r3, r3, #32768 @ 0x8000 8006172: 2b00 cmp r3, #0 8006174: d11a bne.n 80061ac { USBx_OUTEP(epnum)->DOEPCTL |= (ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ) | 8006176: 68bb ldr r3, [r7, #8] 8006178: 015a lsls r2, r3, #5 800617a: 68fb ldr r3, [r7, #12] 800617c: 4413 add r3, r2 800617e: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006182: 681a ldr r2, [r3, #0] 8006184: 683b ldr r3, [r7, #0] 8006186: 689b ldr r3, [r3, #8] 8006188: f3c3 010a ubfx r1, r3, #0, #11 ((uint32_t)ep->type << 18) | 800618c: 683b ldr r3, [r7, #0] 800618e: 791b ldrb r3, [r3, #4] 8006190: 049b lsls r3, r3, #18 USBx_OUTEP(epnum)->DOEPCTL |= (ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ) | 8006192: 430b orrs r3, r1 8006194: 4313 orrs r3, r2 8006196: 68ba ldr r2, [r7, #8] 8006198: 0151 lsls r1, r2, #5 800619a: 68fa ldr r2, [r7, #12] 800619c: 440a add r2, r1 800619e: f502 6230 add.w r2, r2, #2816 @ 0xb00 80061a2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80061a6: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80061aa: 6013 str r3, [r2, #0] USB_OTG_DIEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_USBAEP; } } return HAL_OK; 80061ac: 2300 movs r3, #0 } 80061ae: 4618 mov r0, r3 80061b0: 3714 adds r7, #20 80061b2: 46bd mov sp, r7 80061b4: f85d 7b04 ldr.w r7, [sp], #4 80061b8: 4770 bx lr ... 080061bc : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_DeactivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep) { 80061bc: b480 push {r7} 80061be: b085 sub sp, #20 80061c0: af00 add r7, sp, #0 80061c2: 6078 str r0, [r7, #4] 80061c4: 6039 str r1, [r7, #0] uint32_t USBx_BASE = (uint32_t)USBx; 80061c6: 687b ldr r3, [r7, #4] 80061c8: 60fb str r3, [r7, #12] uint32_t epnum = (uint32_t)ep->num; 80061ca: 683b ldr r3, [r7, #0] 80061cc: 781b ldrb r3, [r3, #0] 80061ce: 60bb str r3, [r7, #8] /* Read DEPCTLn register */ if (ep->is_in == 1U) 80061d0: 683b ldr r3, [r7, #0] 80061d2: 785b ldrb r3, [r3, #1] 80061d4: 2b01 cmp r3, #1 80061d6: d161 bne.n 800629c { if ((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) 80061d8: 68bb ldr r3, [r7, #8] 80061da: 015a lsls r2, r3, #5 80061dc: 68fb ldr r3, [r7, #12] 80061de: 4413 add r3, r2 80061e0: f503 6310 add.w r3, r3, #2304 @ 0x900 80061e4: 681b ldr r3, [r3, #0] 80061e6: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 80061ea: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 80061ee: d11f bne.n 8006230 { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK; 80061f0: 68bb ldr r3, [r7, #8] 80061f2: 015a lsls r2, r3, #5 80061f4: 68fb ldr r3, [r7, #12] 80061f6: 4413 add r3, r2 80061f8: f503 6310 add.w r3, r3, #2304 @ 0x900 80061fc: 681b ldr r3, [r3, #0] 80061fe: 68ba ldr r2, [r7, #8] 8006200: 0151 lsls r1, r2, #5 8006202: 68fa ldr r2, [r7, #12] 8006204: 440a add r2, r1 8006206: f502 6210 add.w r2, r2, #2304 @ 0x900 800620a: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 800620e: 6013 str r3, [r2, #0] USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; 8006210: 68bb ldr r3, [r7, #8] 8006212: 015a lsls r2, r3, #5 8006214: 68fb ldr r3, [r7, #12] 8006216: 4413 add r3, r2 8006218: f503 6310 add.w r3, r3, #2304 @ 0x900 800621c: 681b ldr r3, [r3, #0] 800621e: 68ba ldr r2, [r7, #8] 8006220: 0151 lsls r1, r2, #5 8006222: 68fa ldr r2, [r7, #12] 8006224: 440a add r2, r1 8006226: f502 6210 add.w r2, r2, #2304 @ 0x900 800622a: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 800622e: 6013 str r3, [r2, #0] } USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK))); 8006230: 68fb ldr r3, [r7, #12] 8006232: f503 6300 add.w r3, r3, #2048 @ 0x800 8006236: 6bda ldr r2, [r3, #60] @ 0x3c 8006238: 683b ldr r3, [r7, #0] 800623a: 781b ldrb r3, [r3, #0] 800623c: f003 030f and.w r3, r3, #15 8006240: 2101 movs r1, #1 8006242: fa01 f303 lsl.w r3, r1, r3 8006246: b29b uxth r3, r3 8006248: 43db mvns r3, r3 800624a: 68f9 ldr r1, [r7, #12] 800624c: f501 6100 add.w r1, r1, #2048 @ 0x800 8006250: 4013 ands r3, r2 8006252: 63cb str r3, [r1, #60] @ 0x3c USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK))); 8006254: 68fb ldr r3, [r7, #12] 8006256: f503 6300 add.w r3, r3, #2048 @ 0x800 800625a: 69da ldr r2, [r3, #28] 800625c: 683b ldr r3, [r7, #0] 800625e: 781b ldrb r3, [r3, #0] 8006260: f003 030f and.w r3, r3, #15 8006264: 2101 movs r1, #1 8006266: fa01 f303 lsl.w r3, r1, r3 800626a: b29b uxth r3, r3 800626c: 43db mvns r3, r3 800626e: 68f9 ldr r1, [r7, #12] 8006270: f501 6100 add.w r1, r1, #2048 @ 0x800 8006274: 4013 ands r3, r2 8006276: 61cb str r3, [r1, #28] USBx_INEP(epnum)->DIEPCTL &= ~(USB_OTG_DIEPCTL_USBAEP | 8006278: 68bb ldr r3, [r7, #8] 800627a: 015a lsls r2, r3, #5 800627c: 68fb ldr r3, [r7, #12] 800627e: 4413 add r3, r2 8006280: f503 6310 add.w r3, r3, #2304 @ 0x900 8006284: 681a ldr r2, [r3, #0] 8006286: 68bb ldr r3, [r7, #8] 8006288: 0159 lsls r1, r3, #5 800628a: 68fb ldr r3, [r7, #12] 800628c: 440b add r3, r1 800628e: f503 6310 add.w r3, r3, #2304 @ 0x900 8006292: 4619 mov r1, r3 8006294: 4b35 ldr r3, [pc, #212] @ (800636c ) 8006296: 4013 ands r3, r2 8006298: 600b str r3, [r1, #0] 800629a: e060 b.n 800635e USB_OTG_DIEPCTL_SD0PID_SEVNFRM | USB_OTG_DIEPCTL_EPTYP); } else { if ((USBx_OUTEP(epnum)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) 800629c: 68bb ldr r3, [r7, #8] 800629e: 015a lsls r2, r3, #5 80062a0: 68fb ldr r3, [r7, #12] 80062a2: 4413 add r3, r2 80062a4: f503 6330 add.w r3, r3, #2816 @ 0xb00 80062a8: 681b ldr r3, [r3, #0] 80062aa: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 80062ae: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 80062b2: d11f bne.n 80062f4 { USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; 80062b4: 68bb ldr r3, [r7, #8] 80062b6: 015a lsls r2, r3, #5 80062b8: 68fb ldr r3, [r7, #12] 80062ba: 4413 add r3, r2 80062bc: f503 6330 add.w r3, r3, #2816 @ 0xb00 80062c0: 681b ldr r3, [r3, #0] 80062c2: 68ba ldr r2, [r7, #8] 80062c4: 0151 lsls r1, r2, #5 80062c6: 68fa ldr r2, [r7, #12] 80062c8: 440a add r2, r1 80062ca: f502 6230 add.w r2, r2, #2816 @ 0xb00 80062ce: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 80062d2: 6013 str r3, [r2, #0] USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; 80062d4: 68bb ldr r3, [r7, #8] 80062d6: 015a lsls r2, r3, #5 80062d8: 68fb ldr r3, [r7, #12] 80062da: 4413 add r3, r2 80062dc: f503 6330 add.w r3, r3, #2816 @ 0xb00 80062e0: 681b ldr r3, [r3, #0] 80062e2: 68ba ldr r2, [r7, #8] 80062e4: 0151 lsls r1, r2, #5 80062e6: 68fa ldr r2, [r7, #12] 80062e8: 440a add r2, r1 80062ea: f502 6230 add.w r2, r2, #2816 @ 0xb00 80062ee: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 80062f2: 6013 str r3, [r2, #0] } USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16)); 80062f4: 68fb ldr r3, [r7, #12] 80062f6: f503 6300 add.w r3, r3, #2048 @ 0x800 80062fa: 6bda ldr r2, [r3, #60] @ 0x3c 80062fc: 683b ldr r3, [r7, #0] 80062fe: 781b ldrb r3, [r3, #0] 8006300: f003 030f and.w r3, r3, #15 8006304: 2101 movs r1, #1 8006306: fa01 f303 lsl.w r3, r1, r3 800630a: 041b lsls r3, r3, #16 800630c: 43db mvns r3, r3 800630e: 68f9 ldr r1, [r7, #12] 8006310: f501 6100 add.w r1, r1, #2048 @ 0x800 8006314: 4013 ands r3, r2 8006316: 63cb str r3, [r1, #60] @ 0x3c USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16)); 8006318: 68fb ldr r3, [r7, #12] 800631a: f503 6300 add.w r3, r3, #2048 @ 0x800 800631e: 69da ldr r2, [r3, #28] 8006320: 683b ldr r3, [r7, #0] 8006322: 781b ldrb r3, [r3, #0] 8006324: f003 030f and.w r3, r3, #15 8006328: 2101 movs r1, #1 800632a: fa01 f303 lsl.w r3, r1, r3 800632e: 041b lsls r3, r3, #16 8006330: 43db mvns r3, r3 8006332: 68f9 ldr r1, [r7, #12] 8006334: f501 6100 add.w r1, r1, #2048 @ 0x800 8006338: 4013 ands r3, r2 800633a: 61cb str r3, [r1, #28] USBx_OUTEP(epnum)->DOEPCTL &= ~(USB_OTG_DOEPCTL_USBAEP | 800633c: 68bb ldr r3, [r7, #8] 800633e: 015a lsls r2, r3, #5 8006340: 68fb ldr r3, [r7, #12] 8006342: 4413 add r3, r2 8006344: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006348: 681a ldr r2, [r3, #0] 800634a: 68bb ldr r3, [r7, #8] 800634c: 0159 lsls r1, r3, #5 800634e: 68fb ldr r3, [r7, #12] 8006350: 440b add r3, r1 8006352: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006356: 4619 mov r1, r3 8006358: 4b05 ldr r3, [pc, #20] @ (8006370 ) 800635a: 4013 ands r3, r2 800635c: 600b str r3, [r1, #0] USB_OTG_DOEPCTL_MPSIZ | USB_OTG_DOEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_EPTYP); } return HAL_OK; 800635e: 2300 movs r3, #0 } 8006360: 4618 mov r0, r3 8006362: 3714 adds r7, #20 8006364: 46bd mov sp, r7 8006366: f85d 7b04 ldr.w r7, [sp], #4 800636a: 4770 bx lr 800636c: ec337800 .word 0xec337800 8006370: eff37800 .word 0xeff37800 08006374 : * 0 : DMA feature not used * 1 : DMA feature used * @retval HAL status */ HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma) { 8006374: b580 push {r7, lr} 8006376: b08a sub sp, #40 @ 0x28 8006378: af02 add r7, sp, #8 800637a: 60f8 str r0, [r7, #12] 800637c: 60b9 str r1, [r7, #8] 800637e: 4613 mov r3, r2 8006380: 71fb strb r3, [r7, #7] uint32_t USBx_BASE = (uint32_t)USBx; 8006382: 68fb ldr r3, [r7, #12] 8006384: 61fb str r3, [r7, #28] uint32_t epnum = (uint32_t)ep->num; 8006386: 68bb ldr r3, [r7, #8] 8006388: 781b ldrb r3, [r3, #0] 800638a: 61bb str r3, [r7, #24] uint16_t pktcnt; /* IN endpoint */ if (ep->is_in == 1U) 800638c: 68bb ldr r3, [r7, #8] 800638e: 785b ldrb r3, [r3, #1] 8006390: 2b01 cmp r3, #1 8006392: f040 817f bne.w 8006694 { /* Zero Length Packet? */ if (ep->xfer_len == 0U) 8006396: 68bb ldr r3, [r7, #8] 8006398: 691b ldr r3, [r3, #16] 800639a: 2b00 cmp r3, #0 800639c: d132 bne.n 8006404 { USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); 800639e: 69bb ldr r3, [r7, #24] 80063a0: 015a lsls r2, r3, #5 80063a2: 69fb ldr r3, [r7, #28] 80063a4: 4413 add r3, r2 80063a6: f503 6310 add.w r3, r3, #2304 @ 0x900 80063aa: 691b ldr r3, [r3, #16] 80063ac: 69ba ldr r2, [r7, #24] 80063ae: 0151 lsls r1, r2, #5 80063b0: 69fa ldr r2, [r7, #28] 80063b2: 440a add r2, r1 80063b4: f502 6210 add.w r2, r2, #2304 @ 0x900 80063b8: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000 80063bc: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000 80063c0: 6113 str r3, [r2, #16] USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19)); 80063c2: 69bb ldr r3, [r7, #24] 80063c4: 015a lsls r2, r3, #5 80063c6: 69fb ldr r3, [r7, #28] 80063c8: 4413 add r3, r2 80063ca: f503 6310 add.w r3, r3, #2304 @ 0x900 80063ce: 691b ldr r3, [r3, #16] 80063d0: 69ba ldr r2, [r7, #24] 80063d2: 0151 lsls r1, r2, #5 80063d4: 69fa ldr r2, [r7, #28] 80063d6: 440a add r2, r1 80063d8: f502 6210 add.w r2, r2, #2304 @ 0x900 80063dc: f443 2300 orr.w r3, r3, #524288 @ 0x80000 80063e0: 6113 str r3, [r2, #16] USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); 80063e2: 69bb ldr r3, [r7, #24] 80063e4: 015a lsls r2, r3, #5 80063e6: 69fb ldr r3, [r7, #28] 80063e8: 4413 add r3, r2 80063ea: f503 6310 add.w r3, r3, #2304 @ 0x900 80063ee: 691b ldr r3, [r3, #16] 80063f0: 69ba ldr r2, [r7, #24] 80063f2: 0151 lsls r1, r2, #5 80063f4: 69fa ldr r2, [r7, #28] 80063f6: 440a add r2, r1 80063f8: f502 6210 add.w r2, r2, #2304 @ 0x900 80063fc: 0cdb lsrs r3, r3, #19 80063fe: 04db lsls r3, r3, #19 8006400: 6113 str r3, [r2, #16] 8006402: e097 b.n 8006534 /* Program the transfer size and packet count * as follows: xfersize = N * maxpacket + * short_packet pktcnt = N + (short_packet * exist ? 1 : 0) */ USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); 8006404: 69bb ldr r3, [r7, #24] 8006406: 015a lsls r2, r3, #5 8006408: 69fb ldr r3, [r7, #28] 800640a: 4413 add r3, r2 800640c: f503 6310 add.w r3, r3, #2304 @ 0x900 8006410: 691b ldr r3, [r3, #16] 8006412: 69ba ldr r2, [r7, #24] 8006414: 0151 lsls r1, r2, #5 8006416: 69fa ldr r2, [r7, #28] 8006418: 440a add r2, r1 800641a: f502 6210 add.w r2, r2, #2304 @ 0x900 800641e: 0cdb lsrs r3, r3, #19 8006420: 04db lsls r3, r3, #19 8006422: 6113 str r3, [r2, #16] USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); 8006424: 69bb ldr r3, [r7, #24] 8006426: 015a lsls r2, r3, #5 8006428: 69fb ldr r3, [r7, #28] 800642a: 4413 add r3, r2 800642c: f503 6310 add.w r3, r3, #2304 @ 0x900 8006430: 691b ldr r3, [r3, #16] 8006432: 69ba ldr r2, [r7, #24] 8006434: 0151 lsls r1, r2, #5 8006436: 69fa ldr r2, [r7, #28] 8006438: 440a add r2, r1 800643a: f502 6210 add.w r2, r2, #2304 @ 0x900 800643e: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000 8006442: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000 8006446: 6113 str r3, [r2, #16] if (epnum == 0U) 8006448: 69bb ldr r3, [r7, #24] 800644a: 2b00 cmp r3, #0 800644c: d11a bne.n 8006484 { if (ep->xfer_len > ep->maxpacket) 800644e: 68bb ldr r3, [r7, #8] 8006450: 691a ldr r2, [r3, #16] 8006452: 68bb ldr r3, [r7, #8] 8006454: 689b ldr r3, [r3, #8] 8006456: 429a cmp r2, r3 8006458: d903 bls.n 8006462 { ep->xfer_len = ep->maxpacket; 800645a: 68bb ldr r3, [r7, #8] 800645c: 689a ldr r2, [r3, #8] 800645e: 68bb ldr r3, [r7, #8] 8006460: 611a str r2, [r3, #16] } USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19)); 8006462: 69bb ldr r3, [r7, #24] 8006464: 015a lsls r2, r3, #5 8006466: 69fb ldr r3, [r7, #28] 8006468: 4413 add r3, r2 800646a: f503 6310 add.w r3, r3, #2304 @ 0x900 800646e: 691b ldr r3, [r3, #16] 8006470: 69ba ldr r2, [r7, #24] 8006472: 0151 lsls r1, r2, #5 8006474: 69fa ldr r2, [r7, #28] 8006476: 440a add r2, r1 8006478: f502 6210 add.w r2, r2, #2304 @ 0x900 800647c: f443 2300 orr.w r3, r3, #524288 @ 0x80000 8006480: 6113 str r3, [r2, #16] 8006482: e044 b.n 800650e } else { pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket); 8006484: 68bb ldr r3, [r7, #8] 8006486: 691a ldr r2, [r3, #16] 8006488: 68bb ldr r3, [r7, #8] 800648a: 689b ldr r3, [r3, #8] 800648c: 4413 add r3, r2 800648e: 1e5a subs r2, r3, #1 8006490: 68bb ldr r3, [r7, #8] 8006492: 689b ldr r3, [r3, #8] 8006494: fbb2 f3f3 udiv r3, r2, r3 8006498: 82fb strh r3, [r7, #22] USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19)); 800649a: 69bb ldr r3, [r7, #24] 800649c: 015a lsls r2, r3, #5 800649e: 69fb ldr r3, [r7, #28] 80064a0: 4413 add r3, r2 80064a2: f503 6310 add.w r3, r3, #2304 @ 0x900 80064a6: 691a ldr r2, [r3, #16] 80064a8: 8afb ldrh r3, [r7, #22] 80064aa: 04d9 lsls r1, r3, #19 80064ac: 4ba4 ldr r3, [pc, #656] @ (8006740 ) 80064ae: 400b ands r3, r1 80064b0: 69b9 ldr r1, [r7, #24] 80064b2: 0148 lsls r0, r1, #5 80064b4: 69f9 ldr r1, [r7, #28] 80064b6: 4401 add r1, r0 80064b8: f501 6110 add.w r1, r1, #2304 @ 0x900 80064bc: 4313 orrs r3, r2 80064be: 610b str r3, [r1, #16] if (ep->type == EP_TYPE_ISOC) 80064c0: 68bb ldr r3, [r7, #8] 80064c2: 791b ldrb r3, [r3, #4] 80064c4: 2b01 cmp r3, #1 80064c6: d122 bne.n 800650e { USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT); 80064c8: 69bb ldr r3, [r7, #24] 80064ca: 015a lsls r2, r3, #5 80064cc: 69fb ldr r3, [r7, #28] 80064ce: 4413 add r3, r2 80064d0: f503 6310 add.w r3, r3, #2304 @ 0x900 80064d4: 691b ldr r3, [r3, #16] 80064d6: 69ba ldr r2, [r7, #24] 80064d8: 0151 lsls r1, r2, #5 80064da: 69fa ldr r2, [r7, #28] 80064dc: 440a add r2, r1 80064de: f502 6210 add.w r2, r2, #2304 @ 0x900 80064e2: f023 43c0 bic.w r3, r3, #1610612736 @ 0x60000000 80064e6: 6113 str r3, [r2, #16] USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & ((uint32_t)pktcnt << 29)); 80064e8: 69bb ldr r3, [r7, #24] 80064ea: 015a lsls r2, r3, #5 80064ec: 69fb ldr r3, [r7, #28] 80064ee: 4413 add r3, r2 80064f0: f503 6310 add.w r3, r3, #2304 @ 0x900 80064f4: 691a ldr r2, [r3, #16] 80064f6: 8afb ldrh r3, [r7, #22] 80064f8: 075b lsls r3, r3, #29 80064fa: f003 43c0 and.w r3, r3, #1610612736 @ 0x60000000 80064fe: 69b9 ldr r1, [r7, #24] 8006500: 0148 lsls r0, r1, #5 8006502: 69f9 ldr r1, [r7, #28] 8006504: 4401 add r1, r0 8006506: f501 6110 add.w r1, r1, #2304 @ 0x900 800650a: 4313 orrs r3, r2 800650c: 610b str r3, [r1, #16] } } USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len); 800650e: 69bb ldr r3, [r7, #24] 8006510: 015a lsls r2, r3, #5 8006512: 69fb ldr r3, [r7, #28] 8006514: 4413 add r3, r2 8006516: f503 6310 add.w r3, r3, #2304 @ 0x900 800651a: 691a ldr r2, [r3, #16] 800651c: 68bb ldr r3, [r7, #8] 800651e: 691b ldr r3, [r3, #16] 8006520: f3c3 0312 ubfx r3, r3, #0, #19 8006524: 69b9 ldr r1, [r7, #24] 8006526: 0148 lsls r0, r1, #5 8006528: 69f9 ldr r1, [r7, #28] 800652a: 4401 add r1, r0 800652c: f501 6110 add.w r1, r1, #2304 @ 0x900 8006530: 4313 orrs r3, r2 8006532: 610b str r3, [r1, #16] } if (dma == 1U) 8006534: 79fb ldrb r3, [r7, #7] 8006536: 2b01 cmp r3, #1 8006538: d14b bne.n 80065d2 { if ((uint32_t)ep->dma_addr != 0U) 800653a: 68bb ldr r3, [r7, #8] 800653c: 69db ldr r3, [r3, #28] 800653e: 2b00 cmp r3, #0 8006540: d009 beq.n 8006556 { USBx_INEP(epnum)->DIEPDMA = (uint32_t)(ep->dma_addr); 8006542: 69bb ldr r3, [r7, #24] 8006544: 015a lsls r2, r3, #5 8006546: 69fb ldr r3, [r7, #28] 8006548: 4413 add r3, r2 800654a: f503 6310 add.w r3, r3, #2304 @ 0x900 800654e: 461a mov r2, r3 8006550: 68bb ldr r3, [r7, #8] 8006552: 69db ldr r3, [r3, #28] 8006554: 6153 str r3, [r2, #20] } if (ep->type == EP_TYPE_ISOC) 8006556: 68bb ldr r3, [r7, #8] 8006558: 791b ldrb r3, [r3, #4] 800655a: 2b01 cmp r3, #1 800655c: d128 bne.n 80065b0 { if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U) 800655e: 69fb ldr r3, [r7, #28] 8006560: f503 6300 add.w r3, r3, #2048 @ 0x800 8006564: 689b ldr r3, [r3, #8] 8006566: f403 7380 and.w r3, r3, #256 @ 0x100 800656a: 2b00 cmp r3, #0 800656c: d110 bne.n 8006590 { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM; 800656e: 69bb ldr r3, [r7, #24] 8006570: 015a lsls r2, r3, #5 8006572: 69fb ldr r3, [r7, #28] 8006574: 4413 add r3, r2 8006576: f503 6310 add.w r3, r3, #2304 @ 0x900 800657a: 681b ldr r3, [r3, #0] 800657c: 69ba ldr r2, [r7, #24] 800657e: 0151 lsls r1, r2, #5 8006580: 69fa ldr r2, [r7, #28] 8006582: 440a add r2, r1 8006584: f502 6210 add.w r2, r2, #2304 @ 0x900 8006588: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000 800658c: 6013 str r3, [r2, #0] 800658e: e00f b.n 80065b0 } else { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; 8006590: 69bb ldr r3, [r7, #24] 8006592: 015a lsls r2, r3, #5 8006594: 69fb ldr r3, [r7, #28] 8006596: 4413 add r3, r2 8006598: f503 6310 add.w r3, r3, #2304 @ 0x900 800659c: 681b ldr r3, [r3, #0] 800659e: 69ba ldr r2, [r7, #24] 80065a0: 0151 lsls r1, r2, #5 80065a2: 69fa ldr r2, [r7, #28] 80065a4: 440a add r2, r1 80065a6: f502 6210 add.w r2, r2, #2304 @ 0x900 80065aa: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80065ae: 6013 str r3, [r2, #0] } } /* EP enable, IN data in FIFO */ USBx_INEP(epnum)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA); 80065b0: 69bb ldr r3, [r7, #24] 80065b2: 015a lsls r2, r3, #5 80065b4: 69fb ldr r3, [r7, #28] 80065b6: 4413 add r3, r2 80065b8: f503 6310 add.w r3, r3, #2304 @ 0x900 80065bc: 681b ldr r3, [r3, #0] 80065be: 69ba ldr r2, [r7, #24] 80065c0: 0151 lsls r1, r2, #5 80065c2: 69fa ldr r2, [r7, #28] 80065c4: 440a add r2, r1 80065c6: f502 6210 add.w r2, r2, #2304 @ 0x900 80065ca: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000 80065ce: 6013 str r3, [r2, #0] 80065d0: e166 b.n 80068a0 } else { /* EP enable, IN data in FIFO */ USBx_INEP(epnum)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA); 80065d2: 69bb ldr r3, [r7, #24] 80065d4: 015a lsls r2, r3, #5 80065d6: 69fb ldr r3, [r7, #28] 80065d8: 4413 add r3, r2 80065da: f503 6310 add.w r3, r3, #2304 @ 0x900 80065de: 681b ldr r3, [r3, #0] 80065e0: 69ba ldr r2, [r7, #24] 80065e2: 0151 lsls r1, r2, #5 80065e4: 69fa ldr r2, [r7, #28] 80065e6: 440a add r2, r1 80065e8: f502 6210 add.w r2, r2, #2304 @ 0x900 80065ec: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000 80065f0: 6013 str r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 80065f2: 68bb ldr r3, [r7, #8] 80065f4: 791b ldrb r3, [r3, #4] 80065f6: 2b01 cmp r3, #1 80065f8: d015 beq.n 8006626 { /* Enable the Tx FIFO Empty Interrupt for this EP */ if (ep->xfer_len > 0U) 80065fa: 68bb ldr r3, [r7, #8] 80065fc: 691b ldr r3, [r3, #16] 80065fe: 2b00 cmp r3, #0 8006600: f000 814e beq.w 80068a0 { USBx_DEVICE->DIEPEMPMSK |= 1UL << (ep->num & EP_ADDR_MSK); 8006604: 69fb ldr r3, [r7, #28] 8006606: f503 6300 add.w r3, r3, #2048 @ 0x800 800660a: 6b5a ldr r2, [r3, #52] @ 0x34 800660c: 68bb ldr r3, [r7, #8] 800660e: 781b ldrb r3, [r3, #0] 8006610: f003 030f and.w r3, r3, #15 8006614: 2101 movs r1, #1 8006616: fa01 f303 lsl.w r3, r1, r3 800661a: 69f9 ldr r1, [r7, #28] 800661c: f501 6100 add.w r1, r1, #2048 @ 0x800 8006620: 4313 orrs r3, r2 8006622: 634b str r3, [r1, #52] @ 0x34 8006624: e13c b.n 80068a0 } } else { if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U) 8006626: 69fb ldr r3, [r7, #28] 8006628: f503 6300 add.w r3, r3, #2048 @ 0x800 800662c: 689b ldr r3, [r3, #8] 800662e: f403 7380 and.w r3, r3, #256 @ 0x100 8006632: 2b00 cmp r3, #0 8006634: d110 bne.n 8006658 { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM; 8006636: 69bb ldr r3, [r7, #24] 8006638: 015a lsls r2, r3, #5 800663a: 69fb ldr r3, [r7, #28] 800663c: 4413 add r3, r2 800663e: f503 6310 add.w r3, r3, #2304 @ 0x900 8006642: 681b ldr r3, [r3, #0] 8006644: 69ba ldr r2, [r7, #24] 8006646: 0151 lsls r1, r2, #5 8006648: 69fa ldr r2, [r7, #28] 800664a: 440a add r2, r1 800664c: f502 6210 add.w r2, r2, #2304 @ 0x900 8006650: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000 8006654: 6013 str r3, [r2, #0] 8006656: e00f b.n 8006678 } else { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; 8006658: 69bb ldr r3, [r7, #24] 800665a: 015a lsls r2, r3, #5 800665c: 69fb ldr r3, [r7, #28] 800665e: 4413 add r3, r2 8006660: f503 6310 add.w r3, r3, #2304 @ 0x900 8006664: 681b ldr r3, [r3, #0] 8006666: 69ba ldr r2, [r7, #24] 8006668: 0151 lsls r1, r2, #5 800666a: 69fa ldr r2, [r7, #28] 800666c: 440a add r2, r1 800666e: f502 6210 add.w r2, r2, #2304 @ 0x900 8006672: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8006676: 6013 str r3, [r2, #0] } (void)USB_WritePacket(USBx, ep->xfer_buff, ep->num, (uint16_t)ep->xfer_len, dma); 8006678: 68bb ldr r3, [r7, #8] 800667a: 68d9 ldr r1, [r3, #12] 800667c: 68bb ldr r3, [r7, #8] 800667e: 781a ldrb r2, [r3, #0] 8006680: 68bb ldr r3, [r7, #8] 8006682: 691b ldr r3, [r3, #16] 8006684: b298 uxth r0, r3 8006686: 79fb ldrb r3, [r7, #7] 8006688: 9300 str r3, [sp, #0] 800668a: 4603 mov r3, r0 800668c: 68f8 ldr r0, [r7, #12] 800668e: f000 f9b9 bl 8006a04 8006692: e105 b.n 80068a0 { /* Program the transfer size and packet count as follows: * pktcnt = N * xfersize = N * maxpacket */ USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ); 8006694: 69bb ldr r3, [r7, #24] 8006696: 015a lsls r2, r3, #5 8006698: 69fb ldr r3, [r7, #28] 800669a: 4413 add r3, r2 800669c: f503 6330 add.w r3, r3, #2816 @ 0xb00 80066a0: 691b ldr r3, [r3, #16] 80066a2: 69ba ldr r2, [r7, #24] 80066a4: 0151 lsls r1, r2, #5 80066a6: 69fa ldr r2, [r7, #28] 80066a8: 440a add r2, r1 80066aa: f502 6230 add.w r2, r2, #2816 @ 0xb00 80066ae: 0cdb lsrs r3, r3, #19 80066b0: 04db lsls r3, r3, #19 80066b2: 6113 str r3, [r2, #16] USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT); 80066b4: 69bb ldr r3, [r7, #24] 80066b6: 015a lsls r2, r3, #5 80066b8: 69fb ldr r3, [r7, #28] 80066ba: 4413 add r3, r2 80066bc: f503 6330 add.w r3, r3, #2816 @ 0xb00 80066c0: 691b ldr r3, [r3, #16] 80066c2: 69ba ldr r2, [r7, #24] 80066c4: 0151 lsls r1, r2, #5 80066c6: 69fa ldr r2, [r7, #28] 80066c8: 440a add r2, r1 80066ca: f502 6230 add.w r2, r2, #2816 @ 0xb00 80066ce: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000 80066d2: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000 80066d6: 6113 str r3, [r2, #16] if (epnum == 0U) 80066d8: 69bb ldr r3, [r7, #24] 80066da: 2b00 cmp r3, #0 80066dc: d132 bne.n 8006744 { if (ep->xfer_len > 0U) 80066de: 68bb ldr r3, [r7, #8] 80066e0: 691b ldr r3, [r3, #16] 80066e2: 2b00 cmp r3, #0 80066e4: d003 beq.n 80066ee { ep->xfer_len = ep->maxpacket; 80066e6: 68bb ldr r3, [r7, #8] 80066e8: 689a ldr r2, [r3, #8] 80066ea: 68bb ldr r3, [r7, #8] 80066ec: 611a str r2, [r3, #16] } /* Store transfer size, for EP0 this is equal to endpoint max packet size */ ep->xfer_size = ep->maxpacket; 80066ee: 68bb ldr r3, [r7, #8] 80066f0: 689a ldr r2, [r3, #8] 80066f2: 68bb ldr r3, [r7, #8] 80066f4: 621a str r2, [r3, #32] USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size); 80066f6: 69bb ldr r3, [r7, #24] 80066f8: 015a lsls r2, r3, #5 80066fa: 69fb ldr r3, [r7, #28] 80066fc: 4413 add r3, r2 80066fe: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006702: 691a ldr r2, [r3, #16] 8006704: 68bb ldr r3, [r7, #8] 8006706: 6a1b ldr r3, [r3, #32] 8006708: f3c3 0312 ubfx r3, r3, #0, #19 800670c: 69b9 ldr r1, [r7, #24] 800670e: 0148 lsls r0, r1, #5 8006710: 69f9 ldr r1, [r7, #28] 8006712: 4401 add r1, r0 8006714: f501 6130 add.w r1, r1, #2816 @ 0xb00 8006718: 4313 orrs r3, r2 800671a: 610b str r3, [r1, #16] USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19)); 800671c: 69bb ldr r3, [r7, #24] 800671e: 015a lsls r2, r3, #5 8006720: 69fb ldr r3, [r7, #28] 8006722: 4413 add r3, r2 8006724: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006728: 691b ldr r3, [r3, #16] 800672a: 69ba ldr r2, [r7, #24] 800672c: 0151 lsls r1, r2, #5 800672e: 69fa ldr r2, [r7, #28] 8006730: 440a add r2, r1 8006732: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006736: f443 2300 orr.w r3, r3, #524288 @ 0x80000 800673a: 6113 str r3, [r2, #16] 800673c: e062 b.n 8006804 800673e: bf00 nop 8006740: 1ff80000 .word 0x1ff80000 } else { if (ep->xfer_len == 0U) 8006744: 68bb ldr r3, [r7, #8] 8006746: 691b ldr r3, [r3, #16] 8006748: 2b00 cmp r3, #0 800674a: d123 bne.n 8006794 { USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket); 800674c: 69bb ldr r3, [r7, #24] 800674e: 015a lsls r2, r3, #5 8006750: 69fb ldr r3, [r7, #28] 8006752: 4413 add r3, r2 8006754: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006758: 691a ldr r2, [r3, #16] 800675a: 68bb ldr r3, [r7, #8] 800675c: 689b ldr r3, [r3, #8] 800675e: f3c3 0312 ubfx r3, r3, #0, #19 8006762: 69b9 ldr r1, [r7, #24] 8006764: 0148 lsls r0, r1, #5 8006766: 69f9 ldr r1, [r7, #28] 8006768: 4401 add r1, r0 800676a: f501 6130 add.w r1, r1, #2816 @ 0xb00 800676e: 4313 orrs r3, r2 8006770: 610b str r3, [r1, #16] USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19)); 8006772: 69bb ldr r3, [r7, #24] 8006774: 015a lsls r2, r3, #5 8006776: 69fb ldr r3, [r7, #28] 8006778: 4413 add r3, r2 800677a: f503 6330 add.w r3, r3, #2816 @ 0xb00 800677e: 691b ldr r3, [r3, #16] 8006780: 69ba ldr r2, [r7, #24] 8006782: 0151 lsls r1, r2, #5 8006784: 69fa ldr r2, [r7, #28] 8006786: 440a add r2, r1 8006788: f502 6230 add.w r2, r2, #2816 @ 0xb00 800678c: f443 2300 orr.w r3, r3, #524288 @ 0x80000 8006790: 6113 str r3, [r2, #16] 8006792: e037 b.n 8006804 } else { pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket); 8006794: 68bb ldr r3, [r7, #8] 8006796: 691a ldr r2, [r3, #16] 8006798: 68bb ldr r3, [r7, #8] 800679a: 689b ldr r3, [r3, #8] 800679c: 4413 add r3, r2 800679e: 1e5a subs r2, r3, #1 80067a0: 68bb ldr r3, [r7, #8] 80067a2: 689b ldr r3, [r3, #8] 80067a4: fbb2 f3f3 udiv r3, r2, r3 80067a8: 82fb strh r3, [r7, #22] ep->xfer_size = ep->maxpacket * pktcnt; 80067aa: 68bb ldr r3, [r7, #8] 80067ac: 689b ldr r3, [r3, #8] 80067ae: 8afa ldrh r2, [r7, #22] 80067b0: fb03 f202 mul.w r2, r3, r2 80067b4: 68bb ldr r3, [r7, #8] 80067b6: 621a str r2, [r3, #32] USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19); 80067b8: 69bb ldr r3, [r7, #24] 80067ba: 015a lsls r2, r3, #5 80067bc: 69fb ldr r3, [r7, #28] 80067be: 4413 add r3, r2 80067c0: f503 6330 add.w r3, r3, #2816 @ 0xb00 80067c4: 691a ldr r2, [r3, #16] 80067c6: 8afb ldrh r3, [r7, #22] 80067c8: 04d9 lsls r1, r3, #19 80067ca: 4b38 ldr r3, [pc, #224] @ (80068ac ) 80067cc: 400b ands r3, r1 80067ce: 69b9 ldr r1, [r7, #24] 80067d0: 0148 lsls r0, r1, #5 80067d2: 69f9 ldr r1, [r7, #28] 80067d4: 4401 add r1, r0 80067d6: f501 6130 add.w r1, r1, #2816 @ 0xb00 80067da: 4313 orrs r3, r2 80067dc: 610b str r3, [r1, #16] USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size; 80067de: 69bb ldr r3, [r7, #24] 80067e0: 015a lsls r2, r3, #5 80067e2: 69fb ldr r3, [r7, #28] 80067e4: 4413 add r3, r2 80067e6: f503 6330 add.w r3, r3, #2816 @ 0xb00 80067ea: 691a ldr r2, [r3, #16] 80067ec: 68bb ldr r3, [r7, #8] 80067ee: 6a1b ldr r3, [r3, #32] 80067f0: f3c3 0312 ubfx r3, r3, #0, #19 80067f4: 69b9 ldr r1, [r7, #24] 80067f6: 0148 lsls r0, r1, #5 80067f8: 69f9 ldr r1, [r7, #28] 80067fa: 4401 add r1, r0 80067fc: f501 6130 add.w r1, r1, #2816 @ 0xb00 8006800: 4313 orrs r3, r2 8006802: 610b str r3, [r1, #16] } } if (dma == 1U) 8006804: 79fb ldrb r3, [r7, #7] 8006806: 2b01 cmp r3, #1 8006808: d10d bne.n 8006826 { if ((uint32_t)ep->xfer_buff != 0U) 800680a: 68bb ldr r3, [r7, #8] 800680c: 68db ldr r3, [r3, #12] 800680e: 2b00 cmp r3, #0 8006810: d009 beq.n 8006826 { USBx_OUTEP(epnum)->DOEPDMA = (uint32_t)(ep->xfer_buff); 8006812: 68bb ldr r3, [r7, #8] 8006814: 68d9 ldr r1, [r3, #12] 8006816: 69bb ldr r3, [r7, #24] 8006818: 015a lsls r2, r3, #5 800681a: 69fb ldr r3, [r7, #28] 800681c: 4413 add r3, r2 800681e: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006822: 460a mov r2, r1 8006824: 615a str r2, [r3, #20] } } if (ep->type == EP_TYPE_ISOC) 8006826: 68bb ldr r3, [r7, #8] 8006828: 791b ldrb r3, [r3, #4] 800682a: 2b01 cmp r3, #1 800682c: d128 bne.n 8006880 { if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U) 800682e: 69fb ldr r3, [r7, #28] 8006830: f503 6300 add.w r3, r3, #2048 @ 0x800 8006834: 689b ldr r3, [r3, #8] 8006836: f403 7380 and.w r3, r3, #256 @ 0x100 800683a: 2b00 cmp r3, #0 800683c: d110 bne.n 8006860 { USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM; 800683e: 69bb ldr r3, [r7, #24] 8006840: 015a lsls r2, r3, #5 8006842: 69fb ldr r3, [r7, #28] 8006844: 4413 add r3, r2 8006846: f503 6330 add.w r3, r3, #2816 @ 0xb00 800684a: 681b ldr r3, [r3, #0] 800684c: 69ba ldr r2, [r7, #24] 800684e: 0151 lsls r1, r2, #5 8006850: 69fa ldr r2, [r7, #28] 8006852: 440a add r2, r1 8006854: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006858: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000 800685c: 6013 str r3, [r2, #0] 800685e: e00f b.n 8006880 } else { USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; 8006860: 69bb ldr r3, [r7, #24] 8006862: 015a lsls r2, r3, #5 8006864: 69fb ldr r3, [r7, #28] 8006866: 4413 add r3, r2 8006868: f503 6330 add.w r3, r3, #2816 @ 0xb00 800686c: 681b ldr r3, [r3, #0] 800686e: 69ba ldr r2, [r7, #24] 8006870: 0151 lsls r1, r2, #5 8006872: 69fa ldr r2, [r7, #28] 8006874: 440a add r2, r1 8006876: f502 6230 add.w r2, r2, #2816 @ 0xb00 800687a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 800687e: 6013 str r3, [r2, #0] } } /* EP enable */ USBx_OUTEP(epnum)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA); 8006880: 69bb ldr r3, [r7, #24] 8006882: 015a lsls r2, r3, #5 8006884: 69fb ldr r3, [r7, #28] 8006886: 4413 add r3, r2 8006888: f503 6330 add.w r3, r3, #2816 @ 0xb00 800688c: 681b ldr r3, [r3, #0] 800688e: 69ba ldr r2, [r7, #24] 8006890: 0151 lsls r1, r2, #5 8006892: 69fa ldr r2, [r7, #28] 8006894: 440a add r2, r1 8006896: f502 6230 add.w r2, r2, #2816 @ 0xb00 800689a: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000 800689e: 6013 str r3, [r2, #0] } return HAL_OK; 80068a0: 2300 movs r3, #0 } 80068a2: 4618 mov r0, r3 80068a4: 3720 adds r7, #32 80068a6: 46bd mov sp, r7 80068a8: bd80 pop {r7, pc} 80068aa: bf00 nop 80068ac: 1ff80000 .word 0x1ff80000 080068b0 : * @param USBx usb device instance * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPStopXfer(const USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) { 80068b0: b480 push {r7} 80068b2: b087 sub sp, #28 80068b4: af00 add r7, sp, #0 80068b6: 6078 str r0, [r7, #4] 80068b8: 6039 str r1, [r7, #0] __IO uint32_t count = 0U; 80068ba: 2300 movs r3, #0 80068bc: 60fb str r3, [r7, #12] HAL_StatusTypeDef ret = HAL_OK; 80068be: 2300 movs r3, #0 80068c0: 75fb strb r3, [r7, #23] uint32_t USBx_BASE = (uint32_t)USBx; 80068c2: 687b ldr r3, [r7, #4] 80068c4: 613b str r3, [r7, #16] /* IN endpoint */ if (ep->is_in == 1U) 80068c6: 683b ldr r3, [r7, #0] 80068c8: 785b ldrb r3, [r3, #1] 80068ca: 2b01 cmp r3, #1 80068cc: d14a bne.n 8006964 { /* EP enable, IN data in FIFO */ if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) 80068ce: 683b ldr r3, [r7, #0] 80068d0: 781b ldrb r3, [r3, #0] 80068d2: 015a lsls r2, r3, #5 80068d4: 693b ldr r3, [r7, #16] 80068d6: 4413 add r3, r2 80068d8: f503 6310 add.w r3, r3, #2304 @ 0x900 80068dc: 681b ldr r3, [r3, #0] 80068de: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 80068e2: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 80068e6: f040 8086 bne.w 80069f6 { USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_SNAK); 80068ea: 683b ldr r3, [r7, #0] 80068ec: 781b ldrb r3, [r3, #0] 80068ee: 015a lsls r2, r3, #5 80068f0: 693b ldr r3, [r7, #16] 80068f2: 4413 add r3, r2 80068f4: f503 6310 add.w r3, r3, #2304 @ 0x900 80068f8: 681b ldr r3, [r3, #0] 80068fa: 683a ldr r2, [r7, #0] 80068fc: 7812 ldrb r2, [r2, #0] 80068fe: 0151 lsls r1, r2, #5 8006900: 693a ldr r2, [r7, #16] 8006902: 440a add r2, r1 8006904: f502 6210 add.w r2, r2, #2304 @ 0x900 8006908: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 800690c: 6013 str r3, [r2, #0] USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS); 800690e: 683b ldr r3, [r7, #0] 8006910: 781b ldrb r3, [r3, #0] 8006912: 015a lsls r2, r3, #5 8006914: 693b ldr r3, [r7, #16] 8006916: 4413 add r3, r2 8006918: f503 6310 add.w r3, r3, #2304 @ 0x900 800691c: 681b ldr r3, [r3, #0] 800691e: 683a ldr r2, [r7, #0] 8006920: 7812 ldrb r2, [r2, #0] 8006922: 0151 lsls r1, r2, #5 8006924: 693a ldr r2, [r7, #16] 8006926: 440a add r2, r1 8006928: f502 6210 add.w r2, r2, #2304 @ 0x900 800692c: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 8006930: 6013 str r3, [r2, #0] do { count++; 8006932: 68fb ldr r3, [r7, #12] 8006934: 3301 adds r3, #1 8006936: 60fb str r3, [r7, #12] if (count > 10000U) 8006938: 68fb ldr r3, [r7, #12] 800693a: f242 7210 movw r2, #10000 @ 0x2710 800693e: 4293 cmp r3, r2 8006940: d902 bls.n 8006948 { ret = HAL_ERROR; 8006942: 2301 movs r3, #1 8006944: 75fb strb r3, [r7, #23] break; 8006946: e056 b.n 80069f6 } } while (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA); 8006948: 683b ldr r3, [r7, #0] 800694a: 781b ldrb r3, [r3, #0] 800694c: 015a lsls r2, r3, #5 800694e: 693b ldr r3, [r7, #16] 8006950: 4413 add r3, r2 8006952: f503 6310 add.w r3, r3, #2304 @ 0x900 8006956: 681b ldr r3, [r3, #0] 8006958: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 800695c: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8006960: d0e7 beq.n 8006932 8006962: e048 b.n 80069f6 } } else /* OUT endpoint */ { if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) 8006964: 683b ldr r3, [r7, #0] 8006966: 781b ldrb r3, [r3, #0] 8006968: 015a lsls r2, r3, #5 800696a: 693b ldr r3, [r7, #16] 800696c: 4413 add r3, r2 800696e: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006972: 681b ldr r3, [r3, #0] 8006974: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 8006978: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 800697c: d13b bne.n 80069f6 { USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_SNAK); 800697e: 683b ldr r3, [r7, #0] 8006980: 781b ldrb r3, [r3, #0] 8006982: 015a lsls r2, r3, #5 8006984: 693b ldr r3, [r7, #16] 8006986: 4413 add r3, r2 8006988: f503 6330 add.w r3, r3, #2816 @ 0xb00 800698c: 681b ldr r3, [r3, #0] 800698e: 683a ldr r2, [r7, #0] 8006990: 7812 ldrb r2, [r2, #0] 8006992: 0151 lsls r1, r2, #5 8006994: 693a ldr r2, [r7, #16] 8006996: 440a add r2, r1 8006998: f502 6230 add.w r2, r2, #2816 @ 0xb00 800699c: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 80069a0: 6013 str r3, [r2, #0] USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS); 80069a2: 683b ldr r3, [r7, #0] 80069a4: 781b ldrb r3, [r3, #0] 80069a6: 015a lsls r2, r3, #5 80069a8: 693b ldr r3, [r7, #16] 80069aa: 4413 add r3, r2 80069ac: f503 6330 add.w r3, r3, #2816 @ 0xb00 80069b0: 681b ldr r3, [r3, #0] 80069b2: 683a ldr r2, [r7, #0] 80069b4: 7812 ldrb r2, [r2, #0] 80069b6: 0151 lsls r1, r2, #5 80069b8: 693a ldr r2, [r7, #16] 80069ba: 440a add r2, r1 80069bc: f502 6230 add.w r2, r2, #2816 @ 0xb00 80069c0: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 80069c4: 6013 str r3, [r2, #0] do { count++; 80069c6: 68fb ldr r3, [r7, #12] 80069c8: 3301 adds r3, #1 80069ca: 60fb str r3, [r7, #12] if (count > 10000U) 80069cc: 68fb ldr r3, [r7, #12] 80069ce: f242 7210 movw r2, #10000 @ 0x2710 80069d2: 4293 cmp r3, r2 80069d4: d902 bls.n 80069dc { ret = HAL_ERROR; 80069d6: 2301 movs r3, #1 80069d8: 75fb strb r3, [r7, #23] break; 80069da: e00c b.n 80069f6 } } while (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA); 80069dc: 683b ldr r3, [r7, #0] 80069de: 781b ldrb r3, [r3, #0] 80069e0: 015a lsls r2, r3, #5 80069e2: 693b ldr r3, [r7, #16] 80069e4: 4413 add r3, r2 80069e6: f503 6330 add.w r3, r3, #2816 @ 0xb00 80069ea: 681b ldr r3, [r3, #0] 80069ec: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 80069f0: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 80069f4: d0e7 beq.n 80069c6 } } return ret; 80069f6: 7dfb ldrb r3, [r7, #23] } 80069f8: 4618 mov r0, r3 80069fa: 371c adds r7, #28 80069fc: 46bd mov sp, r7 80069fe: f85d 7b04 ldr.w r7, [sp], #4 8006a02: 4770 bx lr 08006a04 : * 1 : DMA feature used * @retval HAL status */ HAL_StatusTypeDef USB_WritePacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma) { 8006a04: b480 push {r7} 8006a06: b089 sub sp, #36 @ 0x24 8006a08: af00 add r7, sp, #0 8006a0a: 60f8 str r0, [r7, #12] 8006a0c: 60b9 str r1, [r7, #8] 8006a0e: 4611 mov r1, r2 8006a10: 461a mov r2, r3 8006a12: 460b mov r3, r1 8006a14: 71fb strb r3, [r7, #7] 8006a16: 4613 mov r3, r2 8006a18: 80bb strh r3, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 8006a1a: 68fb ldr r3, [r7, #12] 8006a1c: 617b str r3, [r7, #20] uint8_t *pSrc = src; 8006a1e: 68bb ldr r3, [r7, #8] 8006a20: 61fb str r3, [r7, #28] uint32_t count32b; uint32_t i; if (dma == 0U) 8006a22: f897 3028 ldrb.w r3, [r7, #40] @ 0x28 8006a26: 2b00 cmp r3, #0 8006a28: d123 bne.n 8006a72 { count32b = ((uint32_t)len + 3U) / 4U; 8006a2a: 88bb ldrh r3, [r7, #4] 8006a2c: 3303 adds r3, #3 8006a2e: 089b lsrs r3, r3, #2 8006a30: 613b str r3, [r7, #16] for (i = 0U; i < count32b; i++) 8006a32: 2300 movs r3, #0 8006a34: 61bb str r3, [r7, #24] 8006a36: e018 b.n 8006a6a { USBx_DFIFO((uint32_t)ch_ep_num) = __UNALIGNED_UINT32_READ(pSrc); 8006a38: 79fb ldrb r3, [r7, #7] 8006a3a: 031a lsls r2, r3, #12 8006a3c: 697b ldr r3, [r7, #20] 8006a3e: 4413 add r3, r2 8006a40: f503 5380 add.w r3, r3, #4096 @ 0x1000 8006a44: 461a mov r2, r3 8006a46: 69fb ldr r3, [r7, #28] 8006a48: 681b ldr r3, [r3, #0] 8006a4a: 6013 str r3, [r2, #0] pSrc++; 8006a4c: 69fb ldr r3, [r7, #28] 8006a4e: 3301 adds r3, #1 8006a50: 61fb str r3, [r7, #28] pSrc++; 8006a52: 69fb ldr r3, [r7, #28] 8006a54: 3301 adds r3, #1 8006a56: 61fb str r3, [r7, #28] pSrc++; 8006a58: 69fb ldr r3, [r7, #28] 8006a5a: 3301 adds r3, #1 8006a5c: 61fb str r3, [r7, #28] pSrc++; 8006a5e: 69fb ldr r3, [r7, #28] 8006a60: 3301 adds r3, #1 8006a62: 61fb str r3, [r7, #28] for (i = 0U; i < count32b; i++) 8006a64: 69bb ldr r3, [r7, #24] 8006a66: 3301 adds r3, #1 8006a68: 61bb str r3, [r7, #24] 8006a6a: 69ba ldr r2, [r7, #24] 8006a6c: 693b ldr r3, [r7, #16] 8006a6e: 429a cmp r2, r3 8006a70: d3e2 bcc.n 8006a38 } } return HAL_OK; 8006a72: 2300 movs r3, #0 } 8006a74: 4618 mov r0, r3 8006a76: 3724 adds r7, #36 @ 0x24 8006a78: 46bd mov sp, r7 8006a7a: f85d 7b04 ldr.w r7, [sp], #4 8006a7e: 4770 bx lr 08006a80 : * @param dest source pointer * @param len Number of bytes to read * @retval pointer to destination buffer */ void *USB_ReadPacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len) { 8006a80: b480 push {r7} 8006a82: b08b sub sp, #44 @ 0x2c 8006a84: af00 add r7, sp, #0 8006a86: 60f8 str r0, [r7, #12] 8006a88: 60b9 str r1, [r7, #8] 8006a8a: 4613 mov r3, r2 8006a8c: 80fb strh r3, [r7, #6] uint32_t USBx_BASE = (uint32_t)USBx; 8006a8e: 68fb ldr r3, [r7, #12] 8006a90: 61bb str r3, [r7, #24] uint8_t *pDest = dest; 8006a92: 68bb ldr r3, [r7, #8] 8006a94: 627b str r3, [r7, #36] @ 0x24 uint32_t pData; uint32_t i; uint32_t count32b = (uint32_t)len >> 2U; 8006a96: 88fb ldrh r3, [r7, #6] 8006a98: 089b lsrs r3, r3, #2 8006a9a: b29b uxth r3, r3 8006a9c: 617b str r3, [r7, #20] uint16_t remaining_bytes = len % 4U; 8006a9e: 88fb ldrh r3, [r7, #6] 8006aa0: f003 0303 and.w r3, r3, #3 8006aa4: 83fb strh r3, [r7, #30] for (i = 0U; i < count32b; i++) 8006aa6: 2300 movs r3, #0 8006aa8: 623b str r3, [r7, #32] 8006aaa: e014 b.n 8006ad6 { __UNALIGNED_UINT32_WRITE(pDest, USBx_DFIFO(0U)); 8006aac: 69bb ldr r3, [r7, #24] 8006aae: f503 5380 add.w r3, r3, #4096 @ 0x1000 8006ab2: 681a ldr r2, [r3, #0] 8006ab4: 6a7b ldr r3, [r7, #36] @ 0x24 8006ab6: 601a str r2, [r3, #0] pDest++; 8006ab8: 6a7b ldr r3, [r7, #36] @ 0x24 8006aba: 3301 adds r3, #1 8006abc: 627b str r3, [r7, #36] @ 0x24 pDest++; 8006abe: 6a7b ldr r3, [r7, #36] @ 0x24 8006ac0: 3301 adds r3, #1 8006ac2: 627b str r3, [r7, #36] @ 0x24 pDest++; 8006ac4: 6a7b ldr r3, [r7, #36] @ 0x24 8006ac6: 3301 adds r3, #1 8006ac8: 627b str r3, [r7, #36] @ 0x24 pDest++; 8006aca: 6a7b ldr r3, [r7, #36] @ 0x24 8006acc: 3301 adds r3, #1 8006ace: 627b str r3, [r7, #36] @ 0x24 for (i = 0U; i < count32b; i++) 8006ad0: 6a3b ldr r3, [r7, #32] 8006ad2: 3301 adds r3, #1 8006ad4: 623b str r3, [r7, #32] 8006ad6: 6a3a ldr r2, [r7, #32] 8006ad8: 697b ldr r3, [r7, #20] 8006ada: 429a cmp r2, r3 8006adc: d3e6 bcc.n 8006aac } /* When Number of data is not word aligned, read the remaining byte */ if (remaining_bytes != 0U) 8006ade: 8bfb ldrh r3, [r7, #30] 8006ae0: 2b00 cmp r3, #0 8006ae2: d01e beq.n 8006b22 { i = 0U; 8006ae4: 2300 movs r3, #0 8006ae6: 623b str r3, [r7, #32] __UNALIGNED_UINT32_WRITE(&pData, USBx_DFIFO(0U)); 8006ae8: 69bb ldr r3, [r7, #24] 8006aea: f503 5380 add.w r3, r3, #4096 @ 0x1000 8006aee: 461a mov r2, r3 8006af0: f107 0310 add.w r3, r7, #16 8006af4: 6812 ldr r2, [r2, #0] 8006af6: 601a str r2, [r3, #0] do { *(uint8_t *)pDest = (uint8_t)(pData >> (8U * (uint8_t)(i))); 8006af8: 693a ldr r2, [r7, #16] 8006afa: 6a3b ldr r3, [r7, #32] 8006afc: b2db uxtb r3, r3 8006afe: 00db lsls r3, r3, #3 8006b00: fa22 f303 lsr.w r3, r2, r3 8006b04: b2da uxtb r2, r3 8006b06: 6a7b ldr r3, [r7, #36] @ 0x24 8006b08: 701a strb r2, [r3, #0] i++; 8006b0a: 6a3b ldr r3, [r7, #32] 8006b0c: 3301 adds r3, #1 8006b0e: 623b str r3, [r7, #32] pDest++; 8006b10: 6a7b ldr r3, [r7, #36] @ 0x24 8006b12: 3301 adds r3, #1 8006b14: 627b str r3, [r7, #36] @ 0x24 remaining_bytes--; 8006b16: 8bfb ldrh r3, [r7, #30] 8006b18: 3b01 subs r3, #1 8006b1a: 83fb strh r3, [r7, #30] } while (remaining_bytes != 0U); 8006b1c: 8bfb ldrh r3, [r7, #30] 8006b1e: 2b00 cmp r3, #0 8006b20: d1ea bne.n 8006af8 } return ((void *)pDest); 8006b22: 6a7b ldr r3, [r7, #36] @ 0x24 } 8006b24: 4618 mov r0, r3 8006b26: 372c adds r7, #44 @ 0x2c 8006b28: 46bd mov sp, r7 8006b2a: f85d 7b04 ldr.w r7, [sp], #4 8006b2e: 4770 bx lr 08006b30 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPSetStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep) { 8006b30: b480 push {r7} 8006b32: b085 sub sp, #20 8006b34: af00 add r7, sp, #0 8006b36: 6078 str r0, [r7, #4] 8006b38: 6039 str r1, [r7, #0] uint32_t USBx_BASE = (uint32_t)USBx; 8006b3a: 687b ldr r3, [r7, #4] 8006b3c: 60fb str r3, [r7, #12] uint32_t epnum = (uint32_t)ep->num; 8006b3e: 683b ldr r3, [r7, #0] 8006b40: 781b ldrb r3, [r3, #0] 8006b42: 60bb str r3, [r7, #8] if (ep->is_in == 1U) 8006b44: 683b ldr r3, [r7, #0] 8006b46: 785b ldrb r3, [r3, #1] 8006b48: 2b01 cmp r3, #1 8006b4a: d12c bne.n 8006ba6 { if (((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == 0U) && (epnum != 0U)) 8006b4c: 68bb ldr r3, [r7, #8] 8006b4e: 015a lsls r2, r3, #5 8006b50: 68fb ldr r3, [r7, #12] 8006b52: 4413 add r3, r2 8006b54: f503 6310 add.w r3, r3, #2304 @ 0x900 8006b58: 681b ldr r3, [r3, #0] 8006b5a: 2b00 cmp r3, #0 8006b5c: db12 blt.n 8006b84 8006b5e: 68bb ldr r3, [r7, #8] 8006b60: 2b00 cmp r3, #0 8006b62: d00f beq.n 8006b84 { USBx_INEP(epnum)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS); 8006b64: 68bb ldr r3, [r7, #8] 8006b66: 015a lsls r2, r3, #5 8006b68: 68fb ldr r3, [r7, #12] 8006b6a: 4413 add r3, r2 8006b6c: f503 6310 add.w r3, r3, #2304 @ 0x900 8006b70: 681b ldr r3, [r3, #0] 8006b72: 68ba ldr r2, [r7, #8] 8006b74: 0151 lsls r1, r2, #5 8006b76: 68fa ldr r2, [r7, #12] 8006b78: 440a add r2, r1 8006b7a: f502 6210 add.w r2, r2, #2304 @ 0x900 8006b7e: f023 4380 bic.w r3, r3, #1073741824 @ 0x40000000 8006b82: 6013 str r3, [r2, #0] } USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_STALL; 8006b84: 68bb ldr r3, [r7, #8] 8006b86: 015a lsls r2, r3, #5 8006b88: 68fb ldr r3, [r7, #12] 8006b8a: 4413 add r3, r2 8006b8c: f503 6310 add.w r3, r3, #2304 @ 0x900 8006b90: 681b ldr r3, [r3, #0] 8006b92: 68ba ldr r2, [r7, #8] 8006b94: 0151 lsls r1, r2, #5 8006b96: 68fa ldr r2, [r7, #12] 8006b98: 440a add r2, r1 8006b9a: f502 6210 add.w r2, r2, #2304 @ 0x900 8006b9e: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 8006ba2: 6013 str r3, [r2, #0] 8006ba4: e02b b.n 8006bfe } else { if (((USBx_OUTEP(epnum)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == 0U) && (epnum != 0U)) 8006ba6: 68bb ldr r3, [r7, #8] 8006ba8: 015a lsls r2, r3, #5 8006baa: 68fb ldr r3, [r7, #12] 8006bac: 4413 add r3, r2 8006bae: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006bb2: 681b ldr r3, [r3, #0] 8006bb4: 2b00 cmp r3, #0 8006bb6: db12 blt.n 8006bde 8006bb8: 68bb ldr r3, [r7, #8] 8006bba: 2b00 cmp r3, #0 8006bbc: d00f beq.n 8006bde { USBx_OUTEP(epnum)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS); 8006bbe: 68bb ldr r3, [r7, #8] 8006bc0: 015a lsls r2, r3, #5 8006bc2: 68fb ldr r3, [r7, #12] 8006bc4: 4413 add r3, r2 8006bc6: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006bca: 681b ldr r3, [r3, #0] 8006bcc: 68ba ldr r2, [r7, #8] 8006bce: 0151 lsls r1, r2, #5 8006bd0: 68fa ldr r2, [r7, #12] 8006bd2: 440a add r2, r1 8006bd4: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006bd8: f023 4380 bic.w r3, r3, #1073741824 @ 0x40000000 8006bdc: 6013 str r3, [r2, #0] } USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_STALL; 8006bde: 68bb ldr r3, [r7, #8] 8006be0: 015a lsls r2, r3, #5 8006be2: 68fb ldr r3, [r7, #12] 8006be4: 4413 add r3, r2 8006be6: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006bea: 681b ldr r3, [r3, #0] 8006bec: 68ba ldr r2, [r7, #8] 8006bee: 0151 lsls r1, r2, #5 8006bf0: 68fa ldr r2, [r7, #12] 8006bf2: 440a add r2, r1 8006bf4: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006bf8: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 8006bfc: 6013 str r3, [r2, #0] } return HAL_OK; 8006bfe: 2300 movs r3, #0 } 8006c00: 4618 mov r0, r3 8006c02: 3714 adds r7, #20 8006c04: 46bd mov sp, r7 8006c06: f85d 7b04 ldr.w r7, [sp], #4 8006c0a: 4770 bx lr 08006c0c : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPClearStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep) { 8006c0c: b480 push {r7} 8006c0e: b085 sub sp, #20 8006c10: af00 add r7, sp, #0 8006c12: 6078 str r0, [r7, #4] 8006c14: 6039 str r1, [r7, #0] uint32_t USBx_BASE = (uint32_t)USBx; 8006c16: 687b ldr r3, [r7, #4] 8006c18: 60fb str r3, [r7, #12] uint32_t epnum = (uint32_t)ep->num; 8006c1a: 683b ldr r3, [r7, #0] 8006c1c: 781b ldrb r3, [r3, #0] 8006c1e: 60bb str r3, [r7, #8] if (ep->is_in == 1U) 8006c20: 683b ldr r3, [r7, #0] 8006c22: 785b ldrb r3, [r3, #1] 8006c24: 2b01 cmp r3, #1 8006c26: d128 bne.n 8006c7a { USBx_INEP(epnum)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL; 8006c28: 68bb ldr r3, [r7, #8] 8006c2a: 015a lsls r2, r3, #5 8006c2c: 68fb ldr r3, [r7, #12] 8006c2e: 4413 add r3, r2 8006c30: f503 6310 add.w r3, r3, #2304 @ 0x900 8006c34: 681b ldr r3, [r3, #0] 8006c36: 68ba ldr r2, [r7, #8] 8006c38: 0151 lsls r1, r2, #5 8006c3a: 68fa ldr r2, [r7, #12] 8006c3c: 440a add r2, r1 8006c3e: f502 6210 add.w r2, r2, #2304 @ 0x900 8006c42: f423 1300 bic.w r3, r3, #2097152 @ 0x200000 8006c46: 6013 str r3, [r2, #0] if ((ep->type == EP_TYPE_INTR) || (ep->type == EP_TYPE_BULK)) 8006c48: 683b ldr r3, [r7, #0] 8006c4a: 791b ldrb r3, [r3, #4] 8006c4c: 2b03 cmp r3, #3 8006c4e: d003 beq.n 8006c58 8006c50: 683b ldr r3, [r7, #0] 8006c52: 791b ldrb r3, [r3, #4] 8006c54: 2b02 cmp r3, #2 8006c56: d138 bne.n 8006cca { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */ 8006c58: 68bb ldr r3, [r7, #8] 8006c5a: 015a lsls r2, r3, #5 8006c5c: 68fb ldr r3, [r7, #12] 8006c5e: 4413 add r3, r2 8006c60: f503 6310 add.w r3, r3, #2304 @ 0x900 8006c64: 681b ldr r3, [r3, #0] 8006c66: 68ba ldr r2, [r7, #8] 8006c68: 0151 lsls r1, r2, #5 8006c6a: 68fa ldr r2, [r7, #12] 8006c6c: 440a add r2, r1 8006c6e: f502 6210 add.w r2, r2, #2304 @ 0x900 8006c72: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8006c76: 6013 str r3, [r2, #0] 8006c78: e027 b.n 8006cca } } else { USBx_OUTEP(epnum)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL; 8006c7a: 68bb ldr r3, [r7, #8] 8006c7c: 015a lsls r2, r3, #5 8006c7e: 68fb ldr r3, [r7, #12] 8006c80: 4413 add r3, r2 8006c82: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006c86: 681b ldr r3, [r3, #0] 8006c88: 68ba ldr r2, [r7, #8] 8006c8a: 0151 lsls r1, r2, #5 8006c8c: 68fa ldr r2, [r7, #12] 8006c8e: 440a add r2, r1 8006c90: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006c94: f423 1300 bic.w r3, r3, #2097152 @ 0x200000 8006c98: 6013 str r3, [r2, #0] if ((ep->type == EP_TYPE_INTR) || (ep->type == EP_TYPE_BULK)) 8006c9a: 683b ldr r3, [r7, #0] 8006c9c: 791b ldrb r3, [r3, #4] 8006c9e: 2b03 cmp r3, #3 8006ca0: d003 beq.n 8006caa 8006ca2: 683b ldr r3, [r7, #0] 8006ca4: 791b ldrb r3, [r3, #4] 8006ca6: 2b02 cmp r3, #2 8006ca8: d10f bne.n 8006cca { USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */ 8006caa: 68bb ldr r3, [r7, #8] 8006cac: 015a lsls r2, r3, #5 8006cae: 68fb ldr r3, [r7, #12] 8006cb0: 4413 add r3, r2 8006cb2: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006cb6: 681b ldr r3, [r3, #0] 8006cb8: 68ba ldr r2, [r7, #8] 8006cba: 0151 lsls r1, r2, #5 8006cbc: 68fa ldr r2, [r7, #12] 8006cbe: 440a add r2, r1 8006cc0: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006cc4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8006cc8: 6013 str r3, [r2, #0] } } return HAL_OK; 8006cca: 2300 movs r3, #0 } 8006ccc: 4618 mov r0, r3 8006cce: 3714 adds r7, #20 8006cd0: 46bd mov sp, r7 8006cd2: f85d 7b04 ldr.w r7, [sp], #4 8006cd6: 4770 bx lr 08006cd8 : * @param address new device address to be assigned * This parameter can be a value from 0 to 255 * @retval HAL status */ HAL_StatusTypeDef USB_SetDevAddress(const USB_OTG_GlobalTypeDef *USBx, uint8_t address) { 8006cd8: b480 push {r7} 8006cda: b085 sub sp, #20 8006cdc: af00 add r7, sp, #0 8006cde: 6078 str r0, [r7, #4] 8006ce0: 460b mov r3, r1 8006ce2: 70fb strb r3, [r7, #3] uint32_t USBx_BASE = (uint32_t)USBx; 8006ce4: 687b ldr r3, [r7, #4] 8006ce6: 60fb str r3, [r7, #12] USBx_DEVICE->DCFG &= ~(USB_OTG_DCFG_DAD); 8006ce8: 68fb ldr r3, [r7, #12] 8006cea: f503 6300 add.w r3, r3, #2048 @ 0x800 8006cee: 681b ldr r3, [r3, #0] 8006cf0: 68fa ldr r2, [r7, #12] 8006cf2: f502 6200 add.w r2, r2, #2048 @ 0x800 8006cf6: f423 63fe bic.w r3, r3, #2032 @ 0x7f0 8006cfa: 6013 str r3, [r2, #0] USBx_DEVICE->DCFG |= ((uint32_t)address << 4) & USB_OTG_DCFG_DAD; 8006cfc: 68fb ldr r3, [r7, #12] 8006cfe: f503 6300 add.w r3, r3, #2048 @ 0x800 8006d02: 681a ldr r2, [r3, #0] 8006d04: 78fb ldrb r3, [r7, #3] 8006d06: 011b lsls r3, r3, #4 8006d08: f403 63fe and.w r3, r3, #2032 @ 0x7f0 8006d0c: 68f9 ldr r1, [r7, #12] 8006d0e: f501 6100 add.w r1, r1, #2048 @ 0x800 8006d12: 4313 orrs r3, r2 8006d14: 600b str r3, [r1, #0] return HAL_OK; 8006d16: 2300 movs r3, #0 } 8006d18: 4618 mov r0, r3 8006d1a: 3714 adds r7, #20 8006d1c: 46bd mov sp, r7 8006d1e: f85d 7b04 ldr.w r7, [sp], #4 8006d22: 4770 bx lr 08006d24 : * @brief USB_DevConnect : Connect the USB device by enabling Rpu * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevConnect(const USB_OTG_GlobalTypeDef *USBx) { 8006d24: b480 push {r7} 8006d26: b085 sub sp, #20 8006d28: af00 add r7, sp, #0 8006d2a: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 8006d2c: 687b ldr r3, [r7, #4] 8006d2e: 60fb str r3, [r7, #12] /* In case phy is stopped, ensure to ungate and restore the phy CLK */ USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK); 8006d30: 68fb ldr r3, [r7, #12] 8006d32: f503 6360 add.w r3, r3, #3584 @ 0xe00 8006d36: 681b ldr r3, [r3, #0] 8006d38: 68fa ldr r2, [r7, #12] 8006d3a: f502 6260 add.w r2, r2, #3584 @ 0xe00 8006d3e: f023 0303 bic.w r3, r3, #3 8006d42: 6013 str r3, [r2, #0] USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS; 8006d44: 68fb ldr r3, [r7, #12] 8006d46: f503 6300 add.w r3, r3, #2048 @ 0x800 8006d4a: 685b ldr r3, [r3, #4] 8006d4c: 68fa ldr r2, [r7, #12] 8006d4e: f502 6200 add.w r2, r2, #2048 @ 0x800 8006d52: f023 0302 bic.w r3, r3, #2 8006d56: 6053 str r3, [r2, #4] return HAL_OK; 8006d58: 2300 movs r3, #0 } 8006d5a: 4618 mov r0, r3 8006d5c: 3714 adds r7, #20 8006d5e: 46bd mov sp, r7 8006d60: f85d 7b04 ldr.w r7, [sp], #4 8006d64: 4770 bx lr 08006d66 : * @brief USB_DevDisconnect : Disconnect the USB device by disabling Rpu * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevDisconnect(const USB_OTG_GlobalTypeDef *USBx) { 8006d66: b480 push {r7} 8006d68: b085 sub sp, #20 8006d6a: af00 add r7, sp, #0 8006d6c: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 8006d6e: 687b ldr r3, [r7, #4] 8006d70: 60fb str r3, [r7, #12] /* In case phy is stopped, ensure to ungate and restore the phy CLK */ USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK); 8006d72: 68fb ldr r3, [r7, #12] 8006d74: f503 6360 add.w r3, r3, #3584 @ 0xe00 8006d78: 681b ldr r3, [r3, #0] 8006d7a: 68fa ldr r2, [r7, #12] 8006d7c: f502 6260 add.w r2, r2, #3584 @ 0xe00 8006d80: f023 0303 bic.w r3, r3, #3 8006d84: 6013 str r3, [r2, #0] USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS; 8006d86: 68fb ldr r3, [r7, #12] 8006d88: f503 6300 add.w r3, r3, #2048 @ 0x800 8006d8c: 685b ldr r3, [r3, #4] 8006d8e: 68fa ldr r2, [r7, #12] 8006d90: f502 6200 add.w r2, r2, #2048 @ 0x800 8006d94: f043 0302 orr.w r3, r3, #2 8006d98: 6053 str r3, [r2, #4] return HAL_OK; 8006d9a: 2300 movs r3, #0 } 8006d9c: 4618 mov r0, r3 8006d9e: 3714 adds r7, #20 8006da0: 46bd mov sp, r7 8006da2: f85d 7b04 ldr.w r7, [sp], #4 8006da6: 4770 bx lr 08006da8 : * @brief USB_ReadInterrupts: return the global USB interrupt status * @param USBx Selected device * @retval USB Global Interrupt status */ uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef const *USBx) { 8006da8: b480 push {r7} 8006daa: b085 sub sp, #20 8006dac: af00 add r7, sp, #0 8006dae: 6078 str r0, [r7, #4] uint32_t tmpreg; tmpreg = USBx->GINTSTS; 8006db0: 687b ldr r3, [r7, #4] 8006db2: 695b ldr r3, [r3, #20] 8006db4: 60fb str r3, [r7, #12] tmpreg &= USBx->GINTMSK; 8006db6: 687b ldr r3, [r7, #4] 8006db8: 699b ldr r3, [r3, #24] 8006dba: 68fa ldr r2, [r7, #12] 8006dbc: 4013 ands r3, r2 8006dbe: 60fb str r3, [r7, #12] return tmpreg; 8006dc0: 68fb ldr r3, [r7, #12] } 8006dc2: 4618 mov r0, r3 8006dc4: 3714 adds r7, #20 8006dc6: 46bd mov sp, r7 8006dc8: f85d 7b04 ldr.w r7, [sp], #4 8006dcc: 4770 bx lr 08006dce : * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status * @param USBx Selected device * @retval USB Device OUT EP interrupt status */ uint32_t USB_ReadDevAllOutEpInterrupt(const USB_OTG_GlobalTypeDef *USBx) { 8006dce: b480 push {r7} 8006dd0: b085 sub sp, #20 8006dd2: af00 add r7, sp, #0 8006dd4: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 8006dd6: 687b ldr r3, [r7, #4] 8006dd8: 60fb str r3, [r7, #12] uint32_t tmpreg; tmpreg = USBx_DEVICE->DAINT; 8006dda: 68fb ldr r3, [r7, #12] 8006ddc: f503 6300 add.w r3, r3, #2048 @ 0x800 8006de0: 699b ldr r3, [r3, #24] 8006de2: 60bb str r3, [r7, #8] tmpreg &= USBx_DEVICE->DAINTMSK; 8006de4: 68fb ldr r3, [r7, #12] 8006de6: f503 6300 add.w r3, r3, #2048 @ 0x800 8006dea: 69db ldr r3, [r3, #28] 8006dec: 68ba ldr r2, [r7, #8] 8006dee: 4013 ands r3, r2 8006df0: 60bb str r3, [r7, #8] return ((tmpreg & 0xffff0000U) >> 16); 8006df2: 68bb ldr r3, [r7, #8] 8006df4: 0c1b lsrs r3, r3, #16 } 8006df6: 4618 mov r0, r3 8006df8: 3714 adds r7, #20 8006dfa: 46bd mov sp, r7 8006dfc: f85d 7b04 ldr.w r7, [sp], #4 8006e00: 4770 bx lr 08006e02 : * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status * @param USBx Selected device * @retval USB Device IN EP interrupt status */ uint32_t USB_ReadDevAllInEpInterrupt(const USB_OTG_GlobalTypeDef *USBx) { 8006e02: b480 push {r7} 8006e04: b085 sub sp, #20 8006e06: af00 add r7, sp, #0 8006e08: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 8006e0a: 687b ldr r3, [r7, #4] 8006e0c: 60fb str r3, [r7, #12] uint32_t tmpreg; tmpreg = USBx_DEVICE->DAINT; 8006e0e: 68fb ldr r3, [r7, #12] 8006e10: f503 6300 add.w r3, r3, #2048 @ 0x800 8006e14: 699b ldr r3, [r3, #24] 8006e16: 60bb str r3, [r7, #8] tmpreg &= USBx_DEVICE->DAINTMSK; 8006e18: 68fb ldr r3, [r7, #12] 8006e1a: f503 6300 add.w r3, r3, #2048 @ 0x800 8006e1e: 69db ldr r3, [r3, #28] 8006e20: 68ba ldr r2, [r7, #8] 8006e22: 4013 ands r3, r2 8006e24: 60bb str r3, [r7, #8] return ((tmpreg & 0xFFFFU)); 8006e26: 68bb ldr r3, [r7, #8] 8006e28: b29b uxth r3, r3 } 8006e2a: 4618 mov r0, r3 8006e2c: 3714 adds r7, #20 8006e2e: 46bd mov sp, r7 8006e30: f85d 7b04 ldr.w r7, [sp], #4 8006e34: 4770 bx lr 08006e36 : * @param epnum endpoint number * This parameter can be a value from 0 to 15 * @retval Device OUT EP Interrupt register */ uint32_t USB_ReadDevOutEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum) { 8006e36: b480 push {r7} 8006e38: b085 sub sp, #20 8006e3a: af00 add r7, sp, #0 8006e3c: 6078 str r0, [r7, #4] 8006e3e: 460b mov r3, r1 8006e40: 70fb strb r3, [r7, #3] uint32_t USBx_BASE = (uint32_t)USBx; 8006e42: 687b ldr r3, [r7, #4] 8006e44: 60fb str r3, [r7, #12] uint32_t tmpreg; tmpreg = USBx_OUTEP((uint32_t)epnum)->DOEPINT; 8006e46: 78fb ldrb r3, [r7, #3] 8006e48: 015a lsls r2, r3, #5 8006e4a: 68fb ldr r3, [r7, #12] 8006e4c: 4413 add r3, r2 8006e4e: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006e52: 689b ldr r3, [r3, #8] 8006e54: 60bb str r3, [r7, #8] tmpreg &= USBx_DEVICE->DOEPMSK; 8006e56: 68fb ldr r3, [r7, #12] 8006e58: f503 6300 add.w r3, r3, #2048 @ 0x800 8006e5c: 695b ldr r3, [r3, #20] 8006e5e: 68ba ldr r2, [r7, #8] 8006e60: 4013 ands r3, r2 8006e62: 60bb str r3, [r7, #8] return tmpreg; 8006e64: 68bb ldr r3, [r7, #8] } 8006e66: 4618 mov r0, r3 8006e68: 3714 adds r7, #20 8006e6a: 46bd mov sp, r7 8006e6c: f85d 7b04 ldr.w r7, [sp], #4 8006e70: 4770 bx lr 08006e72 : * @param epnum endpoint number * This parameter can be a value from 0 to 15 * @retval Device IN EP Interrupt register */ uint32_t USB_ReadDevInEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum) { 8006e72: b480 push {r7} 8006e74: b087 sub sp, #28 8006e76: af00 add r7, sp, #0 8006e78: 6078 str r0, [r7, #4] 8006e7a: 460b mov r3, r1 8006e7c: 70fb strb r3, [r7, #3] uint32_t USBx_BASE = (uint32_t)USBx; 8006e7e: 687b ldr r3, [r7, #4] 8006e80: 617b str r3, [r7, #20] uint32_t tmpreg; uint32_t msk; uint32_t emp; msk = USBx_DEVICE->DIEPMSK; 8006e82: 697b ldr r3, [r7, #20] 8006e84: f503 6300 add.w r3, r3, #2048 @ 0x800 8006e88: 691b ldr r3, [r3, #16] 8006e8a: 613b str r3, [r7, #16] emp = USBx_DEVICE->DIEPEMPMSK; 8006e8c: 697b ldr r3, [r7, #20] 8006e8e: f503 6300 add.w r3, r3, #2048 @ 0x800 8006e92: 6b5b ldr r3, [r3, #52] @ 0x34 8006e94: 60fb str r3, [r7, #12] msk |= ((emp >> (epnum & EP_ADDR_MSK)) & 0x1U) << 7; 8006e96: 78fb ldrb r3, [r7, #3] 8006e98: f003 030f and.w r3, r3, #15 8006e9c: 68fa ldr r2, [r7, #12] 8006e9e: fa22 f303 lsr.w r3, r2, r3 8006ea2: 01db lsls r3, r3, #7 8006ea4: b2db uxtb r3, r3 8006ea6: 693a ldr r2, [r7, #16] 8006ea8: 4313 orrs r3, r2 8006eaa: 613b str r3, [r7, #16] tmpreg = USBx_INEP((uint32_t)epnum)->DIEPINT & msk; 8006eac: 78fb ldrb r3, [r7, #3] 8006eae: 015a lsls r2, r3, #5 8006eb0: 697b ldr r3, [r7, #20] 8006eb2: 4413 add r3, r2 8006eb4: f503 6310 add.w r3, r3, #2304 @ 0x900 8006eb8: 689b ldr r3, [r3, #8] 8006eba: 693a ldr r2, [r7, #16] 8006ebc: 4013 ands r3, r2 8006ebe: 60bb str r3, [r7, #8] return tmpreg; 8006ec0: 68bb ldr r3, [r7, #8] } 8006ec2: 4618 mov r0, r3 8006ec4: 371c adds r7, #28 8006ec6: 46bd mov sp, r7 8006ec8: f85d 7b04 ldr.w r7, [sp], #4 8006ecc: 4770 bx lr 08006ece : * This parameter can be one of these values: * 1 : Host * 0 : Device */ uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx) { 8006ece: b480 push {r7} 8006ed0: b083 sub sp, #12 8006ed2: af00 add r7, sp, #0 8006ed4: 6078 str r0, [r7, #4] return ((USBx->GINTSTS) & 0x1U); 8006ed6: 687b ldr r3, [r7, #4] 8006ed8: 695b ldr r3, [r3, #20] 8006eda: f003 0301 and.w r3, r3, #1 } 8006ede: 4618 mov r0, r3 8006ee0: 370c adds r7, #12 8006ee2: 46bd mov sp, r7 8006ee4: f85d 7b04 ldr.w r7, [sp], #4 8006ee8: 4770 bx lr 08006eea : * @brief Activate EP0 for Setup transactions * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_ActivateSetup(const USB_OTG_GlobalTypeDef *USBx) { 8006eea: b480 push {r7} 8006eec: b085 sub sp, #20 8006eee: af00 add r7, sp, #0 8006ef0: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 8006ef2: 687b ldr r3, [r7, #4] 8006ef4: 60fb str r3, [r7, #12] /* Set the MPS of the IN EP0 to 64 bytes */ USBx_INEP(0U)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ; 8006ef6: 68fb ldr r3, [r7, #12] 8006ef8: f503 6310 add.w r3, r3, #2304 @ 0x900 8006efc: 681b ldr r3, [r3, #0] 8006efe: 68fa ldr r2, [r7, #12] 8006f00: f502 6210 add.w r2, r2, #2304 @ 0x900 8006f04: f423 63ff bic.w r3, r3, #2040 @ 0x7f8 8006f08: f023 0307 bic.w r3, r3, #7 8006f0c: 6013 str r3, [r2, #0] USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK; 8006f0e: 68fb ldr r3, [r7, #12] 8006f10: f503 6300 add.w r3, r3, #2048 @ 0x800 8006f14: 685b ldr r3, [r3, #4] 8006f16: 68fa ldr r2, [r7, #12] 8006f18: f502 6200 add.w r2, r2, #2048 @ 0x800 8006f1c: f443 7380 orr.w r3, r3, #256 @ 0x100 8006f20: 6053 str r3, [r2, #4] return HAL_OK; 8006f22: 2300 movs r3, #0 } 8006f24: 4618 mov r0, r3 8006f26: 3714 adds r7, #20 8006f28: 46bd mov sp, r7 8006f2a: f85d 7b04 ldr.w r7, [sp], #4 8006f2e: 4770 bx lr 08006f30 : * 1 : DMA feature used * @param psetup pointer to setup packet * @retval HAL status */ HAL_StatusTypeDef USB_EP0_OutStart(const USB_OTG_GlobalTypeDef *USBx, uint8_t dma, const uint8_t *psetup) { 8006f30: b480 push {r7} 8006f32: b087 sub sp, #28 8006f34: af00 add r7, sp, #0 8006f36: 60f8 str r0, [r7, #12] 8006f38: 460b mov r3, r1 8006f3a: 607a str r2, [r7, #4] 8006f3c: 72fb strb r3, [r7, #11] uint32_t USBx_BASE = (uint32_t)USBx; 8006f3e: 68fb ldr r3, [r7, #12] 8006f40: 617b str r3, [r7, #20] uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U); 8006f42: 68fb ldr r3, [r7, #12] 8006f44: 333c adds r3, #60 @ 0x3c 8006f46: 3304 adds r3, #4 8006f48: 681b ldr r3, [r3, #0] 8006f4a: 613b str r3, [r7, #16] if (gSNPSiD > USB_OTG_CORE_ID_300A) 8006f4c: 693b ldr r3, [r7, #16] 8006f4e: 4a26 ldr r2, [pc, #152] @ (8006fe8 ) 8006f50: 4293 cmp r3, r2 8006f52: d90a bls.n 8006f6a { if ((USBx_OUTEP(0U)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) 8006f54: 697b ldr r3, [r7, #20] 8006f56: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006f5a: 681b ldr r3, [r3, #0] 8006f5c: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 8006f60: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8006f64: d101 bne.n 8006f6a { return HAL_OK; 8006f66: 2300 movs r3, #0 8006f68: e037 b.n 8006fda } } USBx_OUTEP(0U)->DOEPTSIZ = 0U; 8006f6a: 697b ldr r3, [r7, #20] 8006f6c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006f70: 461a mov r2, r3 8006f72: 2300 movs r3, #0 8006f74: 6113 str r3, [r2, #16] USBx_OUTEP(0U)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19)); 8006f76: 697b ldr r3, [r7, #20] 8006f78: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006f7c: 691b ldr r3, [r3, #16] 8006f7e: 697a ldr r2, [r7, #20] 8006f80: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006f84: f443 2300 orr.w r3, r3, #524288 @ 0x80000 8006f88: 6113 str r3, [r2, #16] USBx_OUTEP(0U)->DOEPTSIZ |= (3U * 8U); 8006f8a: 697b ldr r3, [r7, #20] 8006f8c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006f90: 691b ldr r3, [r3, #16] 8006f92: 697a ldr r2, [r7, #20] 8006f94: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006f98: f043 0318 orr.w r3, r3, #24 8006f9c: 6113 str r3, [r2, #16] USBx_OUTEP(0U)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT; 8006f9e: 697b ldr r3, [r7, #20] 8006fa0: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006fa4: 691b ldr r3, [r3, #16] 8006fa6: 697a ldr r2, [r7, #20] 8006fa8: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006fac: f043 43c0 orr.w r3, r3, #1610612736 @ 0x60000000 8006fb0: 6113 str r3, [r2, #16] if (dma == 1U) 8006fb2: 7afb ldrb r3, [r7, #11] 8006fb4: 2b01 cmp r3, #1 8006fb6: d10f bne.n 8006fd8 { USBx_OUTEP(0U)->DOEPDMA = (uint32_t)psetup; 8006fb8: 697b ldr r3, [r7, #20] 8006fba: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006fbe: 461a mov r2, r3 8006fc0: 687b ldr r3, [r7, #4] 8006fc2: 6153 str r3, [r2, #20] /* EP enable */ USBx_OUTEP(0U)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_USBAEP; 8006fc4: 697b ldr r3, [r7, #20] 8006fc6: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006fca: 681b ldr r3, [r3, #0] 8006fcc: 697a ldr r2, [r7, #20] 8006fce: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006fd2: f043 2380 orr.w r3, r3, #2147516416 @ 0x80008000 8006fd6: 6013 str r3, [r2, #0] } return HAL_OK; 8006fd8: 2300 movs r3, #0 } 8006fda: 4618 mov r0, r3 8006fdc: 371c adds r7, #28 8006fde: 46bd mov sp, r7 8006fe0: f85d 7b04 ldr.w r7, [sp], #4 8006fe4: 4770 bx lr 8006fe6: bf00 nop 8006fe8: 4f54300a .word 0x4f54300a 08006fec : * @brief Reset the USB Core (needed after USB clock settings change) * @param USBx Selected device * @retval HAL status */ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx) { 8006fec: b480 push {r7} 8006fee: b085 sub sp, #20 8006ff0: af00 add r7, sp, #0 8006ff2: 6078 str r0, [r7, #4] __IO uint32_t count = 0U; 8006ff4: 2300 movs r3, #0 8006ff6: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; 8006ff8: 68fb ldr r3, [r7, #12] 8006ffa: 3301 adds r3, #1 8006ffc: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 8006ffe: 68fb ldr r3, [r7, #12] 8007000: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 8007004: d901 bls.n 800700a { return HAL_TIMEOUT; 8007006: 2303 movs r3, #3 8007008: e022 b.n 8007050 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); 800700a: 687b ldr r3, [r7, #4] 800700c: 691b ldr r3, [r3, #16] 800700e: 2b00 cmp r3, #0 8007010: daf2 bge.n 8006ff8 count = 10U; 8007012: 230a movs r3, #10 8007014: 60fb str r3, [r7, #12] /* few cycles before setting core reset */ while (count > 0U) 8007016: e002 b.n 800701e { count--; 8007018: 68fb ldr r3, [r7, #12] 800701a: 3b01 subs r3, #1 800701c: 60fb str r3, [r7, #12] while (count > 0U) 800701e: 68fb ldr r3, [r7, #12] 8007020: 2b00 cmp r3, #0 8007022: d1f9 bne.n 8007018 } /* Core Soft Reset */ USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; 8007024: 687b ldr r3, [r7, #4] 8007026: 691b ldr r3, [r3, #16] 8007028: f043 0201 orr.w r2, r3, #1 800702c: 687b ldr r3, [r7, #4] 800702e: 611a str r2, [r3, #16] do { count++; 8007030: 68fb ldr r3, [r7, #12] 8007032: 3301 adds r3, #1 8007034: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 8007036: 68fb ldr r3, [r7, #12] 8007038: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 800703c: d901 bls.n 8007042 { return HAL_TIMEOUT; 800703e: 2303 movs r3, #3 8007040: e006 b.n 8007050 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); 8007042: 687b ldr r3, [r7, #4] 8007044: 691b ldr r3, [r3, #16] 8007046: f003 0301 and.w r3, r3, #1 800704a: 2b01 cmp r3, #1 800704c: d0f0 beq.n 8007030 return HAL_OK; 800704e: 2300 movs r3, #0 } 8007050: 4618 mov r0, r3 8007052: 3714 adds r7, #20 8007054: 46bd mov sp, r7 8007056: f85d 7b04 ldr.w r7, [sp], #4 800705a: 4770 bx lr 0800705c : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_HID_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800705c: b580 push {r7, lr} 800705e: b084 sub sp, #16 8007060: af00 add r7, sp, #0 8007062: 6078 str r0, [r7, #4] 8007064: 460b mov r3, r1 8007066: 70fb strb r3, [r7, #3] UNUSED(cfgidx); USBD_HID_HandleTypeDef *hhid; hhid = (USBD_HID_HandleTypeDef *)USBD_malloc(sizeof(USBD_HID_HandleTypeDef)); 8007068: 2010 movs r0, #16 800706a: f002 f9f7 bl 800945c 800706e: 60f8 str r0, [r7, #12] if (hhid == NULL) 8007070: 68fb ldr r3, [r7, #12] 8007072: 2b00 cmp r3, #0 8007074: d109 bne.n 800708a { pdev->pClassDataCmsit[pdev->classId] = NULL; 8007076: 687b ldr r3, [r7, #4] 8007078: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800707c: 687b ldr r3, [r7, #4] 800707e: 32b0 adds r2, #176 @ 0xb0 8007080: 2100 movs r1, #0 8007082: f843 1022 str.w r1, [r3, r2, lsl #2] return (uint8_t)USBD_EMEM; 8007086: 2302 movs r3, #2 8007088: e048 b.n 800711c } pdev->pClassDataCmsit[pdev->classId] = (void *)hhid; 800708a: 687b ldr r3, [r7, #4] 800708c: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8007090: 687b ldr r3, [r7, #4] 8007092: 32b0 adds r2, #176 @ 0xb0 8007094: 68f9 ldr r1, [r7, #12] 8007096: f843 1022 str.w r1, [r3, r2, lsl #2] pdev->pClassData = pdev->pClassDataCmsit[pdev->classId]; 800709a: 687b ldr r3, [r7, #4] 800709c: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80070a0: 687b ldr r3, [r7, #4] 80070a2: 32b0 adds r2, #176 @ 0xb0 80070a4: f853 2022 ldr.w r2, [r3, r2, lsl #2] 80070a8: 687b ldr r3, [r7, #4] 80070aa: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc #ifdef USE_USBD_COMPOSITE /* Get the Endpoints addresses allocated for this class instance */ HIDInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_INTR, (uint8_t)pdev->classId); #endif /* USE_USBD_COMPOSITE */ if (pdev->dev_speed == USBD_SPEED_HIGH) 80070ae: 687b ldr r3, [r7, #4] 80070b0: 7c1b ldrb r3, [r3, #16] 80070b2: 2b00 cmp r3, #0 80070b4: d10d bne.n 80070d2 { pdev->ep_in[HIDInEpAdd & 0xFU].bInterval = HID_HS_BINTERVAL; 80070b6: 4b1b ldr r3, [pc, #108] @ (8007124 ) 80070b8: 781b ldrb r3, [r3, #0] 80070ba: f003 020f and.w r2, r3, #15 80070be: 6879 ldr r1, [r7, #4] 80070c0: 4613 mov r3, r2 80070c2: 009b lsls r3, r3, #2 80070c4: 4413 add r3, r2 80070c6: 009b lsls r3, r3, #2 80070c8: 440b add r3, r1 80070ca: 331c adds r3, #28 80070cc: 2207 movs r2, #7 80070ce: 601a str r2, [r3, #0] 80070d0: e00c b.n 80070ec } else /* LOW and FULL-speed endpoints */ { pdev->ep_in[HIDInEpAdd & 0xFU].bInterval = HID_FS_BINTERVAL; 80070d2: 4b14 ldr r3, [pc, #80] @ (8007124 ) 80070d4: 781b ldrb r3, [r3, #0] 80070d6: f003 020f and.w r2, r3, #15 80070da: 6879 ldr r1, [r7, #4] 80070dc: 4613 mov r3, r2 80070de: 009b lsls r3, r3, #2 80070e0: 4413 add r3, r2 80070e2: 009b lsls r3, r3, #2 80070e4: 440b add r3, r1 80070e6: 331c adds r3, #28 80070e8: 220a movs r2, #10 80070ea: 601a str r2, [r3, #0] } /* Open EP IN */ (void)USBD_LL_OpenEP(pdev, HIDInEpAdd, USBD_EP_TYPE_INTR, HID_EPIN_SIZE); 80070ec: 4b0d ldr r3, [pc, #52] @ (8007124 ) 80070ee: 7819 ldrb r1, [r3, #0] 80070f0: 230e movs r3, #14 80070f2: 2203 movs r2, #3 80070f4: 6878 ldr r0, [r7, #4] 80070f6: f002 f852 bl 800919e pdev->ep_in[HIDInEpAdd & 0xFU].is_used = 1U; 80070fa: 4b0a ldr r3, [pc, #40] @ (8007124 ) 80070fc: 781b ldrb r3, [r3, #0] 80070fe: f003 020f and.w r2, r3, #15 8007102: 6879 ldr r1, [r7, #4] 8007104: 4613 mov r3, r2 8007106: 009b lsls r3, r3, #2 8007108: 4413 add r3, r2 800710a: 009b lsls r3, r3, #2 800710c: 440b add r3, r1 800710e: 3323 adds r3, #35 @ 0x23 8007110: 2201 movs r2, #1 8007112: 701a strb r2, [r3, #0] hhid->state = USBD_HID_IDLE; 8007114: 68fb ldr r3, [r7, #12] 8007116: 2200 movs r2, #0 8007118: 731a strb r2, [r3, #12] return (uint8_t)USBD_OK; 800711a: 2300 movs r3, #0 } 800711c: 4618 mov r0, r3 800711e: 3710 adds r7, #16 8007120: 46bd mov sp, r7 8007122: bd80 pop {r7, pc} 8007124: 200000d1 .word 0x200000d1 08007128 : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_HID_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8007128: b580 push {r7, lr} 800712a: b082 sub sp, #8 800712c: af00 add r7, sp, #0 800712e: 6078 str r0, [r7, #4] 8007130: 460b mov r3, r1 8007132: 70fb strb r3, [r7, #3] /* Get the Endpoints addresses allocated for this class instance */ HIDInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_INTR, (uint8_t)pdev->classId); #endif /* USE_USBD_COMPOSITE */ /* Close HID EPs */ (void)USBD_LL_CloseEP(pdev, HIDInEpAdd); 8007134: 4b1f ldr r3, [pc, #124] @ (80071b4 ) 8007136: 781b ldrb r3, [r3, #0] 8007138: 4619 mov r1, r3 800713a: 6878 ldr r0, [r7, #4] 800713c: f002 f855 bl 80091ea pdev->ep_in[HIDInEpAdd & 0xFU].is_used = 0U; 8007140: 4b1c ldr r3, [pc, #112] @ (80071b4 ) 8007142: 781b ldrb r3, [r3, #0] 8007144: f003 020f and.w r2, r3, #15 8007148: 6879 ldr r1, [r7, #4] 800714a: 4613 mov r3, r2 800714c: 009b lsls r3, r3, #2 800714e: 4413 add r3, r2 8007150: 009b lsls r3, r3, #2 8007152: 440b add r3, r1 8007154: 3323 adds r3, #35 @ 0x23 8007156: 2200 movs r2, #0 8007158: 701a strb r2, [r3, #0] pdev->ep_in[HIDInEpAdd & 0xFU].bInterval = 0U; 800715a: 4b16 ldr r3, [pc, #88] @ (80071b4 ) 800715c: 781b ldrb r3, [r3, #0] 800715e: f003 020f and.w r2, r3, #15 8007162: 6879 ldr r1, [r7, #4] 8007164: 4613 mov r3, r2 8007166: 009b lsls r3, r3, #2 8007168: 4413 add r3, r2 800716a: 009b lsls r3, r3, #2 800716c: 440b add r3, r1 800716e: 331c adds r3, #28 8007170: 2200 movs r2, #0 8007172: 601a str r2, [r3, #0] /* Free allocated memory */ if (pdev->pClassDataCmsit[pdev->classId] != NULL) 8007174: 687b ldr r3, [r7, #4] 8007176: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800717a: 687b ldr r3, [r7, #4] 800717c: 32b0 adds r2, #176 @ 0xb0 800717e: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007182: 2b00 cmp r3, #0 8007184: d011 beq.n 80071aa { (void)USBD_free(pdev->pClassDataCmsit[pdev->classId]); 8007186: 687b ldr r3, [r7, #4] 8007188: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800718c: 687b ldr r3, [r7, #4] 800718e: 32b0 adds r2, #176 @ 0xb0 8007190: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007194: 4618 mov r0, r3 8007196: f002 f96f bl 8009478 pdev->pClassDataCmsit[pdev->classId] = NULL; 800719a: 687b ldr r3, [r7, #4] 800719c: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80071a0: 687b ldr r3, [r7, #4] 80071a2: 32b0 adds r2, #176 @ 0xb0 80071a4: 2100 movs r1, #0 80071a6: f843 1022 str.w r1, [r3, r2, lsl #2] } return (uint8_t)USBD_OK; 80071aa: 2300 movs r3, #0 } 80071ac: 4618 mov r0, r3 80071ae: 3708 adds r7, #8 80071b0: 46bd mov sp, r7 80071b2: bd80 pop {r7, pc} 80071b4: 200000d1 .word 0x200000d1 080071b8 : * @param pdev: instance * @param req: usb requests * @retval status */ static uint8_t USBD_HID_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 80071b8: b580 push {r7, lr} 80071ba: b086 sub sp, #24 80071bc: af00 add r7, sp, #0 80071be: 6078 str r0, [r7, #4] 80071c0: 6039 str r1, [r7, #0] USBD_HID_HandleTypeDef *hhid = (USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId]; 80071c2: 687b ldr r3, [r7, #4] 80071c4: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80071c8: 687b ldr r3, [r7, #4] 80071ca: 32b0 adds r2, #176 @ 0xb0 80071cc: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80071d0: 60fb str r3, [r7, #12] USBD_StatusTypeDef ret = USBD_OK; 80071d2: 2300 movs r3, #0 80071d4: 75fb strb r3, [r7, #23] uint16_t len; uint8_t *pbuf; uint16_t status_info = 0U; 80071d6: 2300 movs r3, #0 80071d8: 817b strh r3, [r7, #10] if (hhid == NULL) 80071da: 68fb ldr r3, [r7, #12] 80071dc: 2b00 cmp r3, #0 80071de: d101 bne.n 80071e4 { return (uint8_t)USBD_FAIL; 80071e0: 2303 movs r3, #3 80071e2: e0e8 b.n 80073b6 } switch (req->bmRequest & USB_REQ_TYPE_MASK) 80071e4: 683b ldr r3, [r7, #0] 80071e6: 781b ldrb r3, [r3, #0] 80071e8: f003 0360 and.w r3, r3, #96 @ 0x60 80071ec: 2b00 cmp r3, #0 80071ee: d046 beq.n 800727e 80071f0: 2b20 cmp r3, #32 80071f2: f040 80d8 bne.w 80073a6 { case USB_REQ_TYPE_CLASS : switch (req->bRequest) 80071f6: 683b ldr r3, [r7, #0] 80071f8: 785b ldrb r3, [r3, #1] 80071fa: 3b02 subs r3, #2 80071fc: 2b09 cmp r3, #9 80071fe: d836 bhi.n 800726e 8007200: a201 add r2, pc, #4 @ (adr r2, 8007208 ) 8007202: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8007206: bf00 nop 8007208: 0800725f .word 0x0800725f 800720c: 0800723f .word 0x0800723f 8007210: 0800726f .word 0x0800726f 8007214: 0800726f .word 0x0800726f 8007218: 0800726f .word 0x0800726f 800721c: 0800726f .word 0x0800726f 8007220: 0800726f .word 0x0800726f 8007224: 0800726f .word 0x0800726f 8007228: 0800724d .word 0x0800724d 800722c: 08007231 .word 0x08007231 { case USBD_HID_REQ_SET_PROTOCOL: hhid->Protocol = (uint8_t)(req->wValue); 8007230: 683b ldr r3, [r7, #0] 8007232: 885b ldrh r3, [r3, #2] 8007234: b2db uxtb r3, r3 8007236: 461a mov r2, r3 8007238: 68fb ldr r3, [r7, #12] 800723a: 601a str r2, [r3, #0] break; 800723c: e01e b.n 800727c case USBD_HID_REQ_GET_PROTOCOL: (void)USBD_CtlSendData(pdev, (uint8_t *)&hhid->Protocol, 1U); 800723e: 68fb ldr r3, [r7, #12] 8007240: 2201 movs r2, #1 8007242: 4619 mov r1, r3 8007244: 6878 ldr r0, [r7, #4] 8007246: f001 fc39 bl 8008abc break; 800724a: e017 b.n 800727c case USBD_HID_REQ_SET_IDLE: hhid->IdleState = (uint8_t)(req->wValue >> 8); 800724c: 683b ldr r3, [r7, #0] 800724e: 885b ldrh r3, [r3, #2] 8007250: 0a1b lsrs r3, r3, #8 8007252: b29b uxth r3, r3 8007254: b2db uxtb r3, r3 8007256: 461a mov r2, r3 8007258: 68fb ldr r3, [r7, #12] 800725a: 605a str r2, [r3, #4] break; 800725c: e00e b.n 800727c case USBD_HID_REQ_GET_IDLE: (void)USBD_CtlSendData(pdev, (uint8_t *)&hhid->IdleState, 1U); 800725e: 68fb ldr r3, [r7, #12] 8007260: 3304 adds r3, #4 8007262: 2201 movs r2, #1 8007264: 4619 mov r1, r3 8007266: 6878 ldr r0, [r7, #4] 8007268: f001 fc28 bl 8008abc break; 800726c: e006 b.n 800727c default: USBD_CtlError(pdev, req); 800726e: 6839 ldr r1, [r7, #0] 8007270: 6878 ldr r0, [r7, #4] 8007272: f001 fba6 bl 80089c2 ret = USBD_FAIL; 8007276: 2303 movs r3, #3 8007278: 75fb strb r3, [r7, #23] break; 800727a: bf00 nop } break; 800727c: e09a b.n 80073b4 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 800727e: 683b ldr r3, [r7, #0] 8007280: 785b ldrb r3, [r3, #1] 8007282: 2b0b cmp r3, #11 8007284: f200 8086 bhi.w 8007394 8007288: a201 add r2, pc, #4 @ (adr r2, 8007290 ) 800728a: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800728e: bf00 nop 8007290: 080072c1 .word 0x080072c1 8007294: 080073a3 .word 0x080073a3 8007298: 08007395 .word 0x08007395 800729c: 08007395 .word 0x08007395 80072a0: 08007395 .word 0x08007395 80072a4: 08007395 .word 0x08007395 80072a8: 080072eb .word 0x080072eb 80072ac: 08007395 .word 0x08007395 80072b0: 08007395 .word 0x08007395 80072b4: 08007395 .word 0x08007395 80072b8: 08007343 .word 0x08007343 80072bc: 0800736d .word 0x0800736d { case USB_REQ_GET_STATUS: if (pdev->dev_state == USBD_STATE_CONFIGURED) 80072c0: 687b ldr r3, [r7, #4] 80072c2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80072c6: b2db uxtb r3, r3 80072c8: 2b03 cmp r3, #3 80072ca: d107 bne.n 80072dc { (void)USBD_CtlSendData(pdev, (uint8_t *)&status_info, 2U); 80072cc: f107 030a add.w r3, r7, #10 80072d0: 2202 movs r2, #2 80072d2: 4619 mov r1, r3 80072d4: 6878 ldr r0, [r7, #4] 80072d6: f001 fbf1 bl 8008abc else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 80072da: e063 b.n 80073a4 USBD_CtlError(pdev, req); 80072dc: 6839 ldr r1, [r7, #0] 80072de: 6878 ldr r0, [r7, #4] 80072e0: f001 fb6f bl 80089c2 ret = USBD_FAIL; 80072e4: 2303 movs r3, #3 80072e6: 75fb strb r3, [r7, #23] break; 80072e8: e05c b.n 80073a4 case USB_REQ_GET_DESCRIPTOR: if ((req->wValue >> 8) == HID_REPORT_DESC) 80072ea: 683b ldr r3, [r7, #0] 80072ec: 885b ldrh r3, [r3, #2] 80072ee: 0a1b lsrs r3, r3, #8 80072f0: b29b uxth r3, r3 80072f2: 2b22 cmp r3, #34 @ 0x22 80072f4: d108 bne.n 8007308 { len = MIN(HID_MOUSE_REPORT_DESC_SIZE, req->wLength); 80072f6: 683b ldr r3, [r7, #0] 80072f8: 88db ldrh r3, [r3, #6] 80072fa: 2b2d cmp r3, #45 @ 0x2d 80072fc: bf28 it cs 80072fe: 232d movcs r3, #45 @ 0x2d 8007300: 82bb strh r3, [r7, #20] pbuf = HID_MOUSE_ReportDesc; 8007302: 4b2f ldr r3, [pc, #188] @ (80073c0 ) 8007304: 613b str r3, [r7, #16] 8007306: e015 b.n 8007334 } else if ((req->wValue >> 8) == HID_DESCRIPTOR_TYPE) 8007308: 683b ldr r3, [r7, #0] 800730a: 885b ldrh r3, [r3, #2] 800730c: 0a1b lsrs r3, r3, #8 800730e: b29b uxth r3, r3 8007310: 2b21 cmp r3, #33 @ 0x21 8007312: d108 bne.n 8007326 { pbuf = USBD_HID_Desc; 8007314: 4b2b ldr r3, [pc, #172] @ (80073c4 ) 8007316: 613b str r3, [r7, #16] len = MIN(USB_HID_DESC_SIZ, req->wLength); 8007318: 683b ldr r3, [r7, #0] 800731a: 88db ldrh r3, [r3, #6] 800731c: 2b09 cmp r3, #9 800731e: bf28 it cs 8007320: 2309 movcs r3, #9 8007322: 82bb strh r3, [r7, #20] 8007324: e006 b.n 8007334 } else { USBD_CtlError(pdev, req); 8007326: 6839 ldr r1, [r7, #0] 8007328: 6878 ldr r0, [r7, #4] 800732a: f001 fb4a bl 80089c2 ret = USBD_FAIL; 800732e: 2303 movs r3, #3 8007330: 75fb strb r3, [r7, #23] break; 8007332: e037 b.n 80073a4 } (void)USBD_CtlSendData(pdev, pbuf, len); 8007334: 8abb ldrh r3, [r7, #20] 8007336: 461a mov r2, r3 8007338: 6939 ldr r1, [r7, #16] 800733a: 6878 ldr r0, [r7, #4] 800733c: f001 fbbe bl 8008abc break; 8007340: e030 b.n 80073a4 case USB_REQ_GET_INTERFACE : if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007342: 687b ldr r3, [r7, #4] 8007344: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007348: b2db uxtb r3, r3 800734a: 2b03 cmp r3, #3 800734c: d107 bne.n 800735e { (void)USBD_CtlSendData(pdev, (uint8_t *)&hhid->AltSetting, 1U); 800734e: 68fb ldr r3, [r7, #12] 8007350: 3308 adds r3, #8 8007352: 2201 movs r2, #1 8007354: 4619 mov r1, r3 8007356: 6878 ldr r0, [r7, #4] 8007358: f001 fbb0 bl 8008abc else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 800735c: e022 b.n 80073a4 USBD_CtlError(pdev, req); 800735e: 6839 ldr r1, [r7, #0] 8007360: 6878 ldr r0, [r7, #4] 8007362: f001 fb2e bl 80089c2 ret = USBD_FAIL; 8007366: 2303 movs r3, #3 8007368: 75fb strb r3, [r7, #23] break; 800736a: e01b b.n 80073a4 case USB_REQ_SET_INTERFACE: if (pdev->dev_state == USBD_STATE_CONFIGURED) 800736c: 687b ldr r3, [r7, #4] 800736e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007372: b2db uxtb r3, r3 8007374: 2b03 cmp r3, #3 8007376: d106 bne.n 8007386 { hhid->AltSetting = (uint8_t)(req->wValue); 8007378: 683b ldr r3, [r7, #0] 800737a: 885b ldrh r3, [r3, #2] 800737c: b2db uxtb r3, r3 800737e: 461a mov r2, r3 8007380: 68fb ldr r3, [r7, #12] 8007382: 609a str r2, [r3, #8] else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 8007384: e00e b.n 80073a4 USBD_CtlError(pdev, req); 8007386: 6839 ldr r1, [r7, #0] 8007388: 6878 ldr r0, [r7, #4] 800738a: f001 fb1a bl 80089c2 ret = USBD_FAIL; 800738e: 2303 movs r3, #3 8007390: 75fb strb r3, [r7, #23] break; 8007392: e007 b.n 80073a4 case USB_REQ_CLEAR_FEATURE: break; default: USBD_CtlError(pdev, req); 8007394: 6839 ldr r1, [r7, #0] 8007396: 6878 ldr r0, [r7, #4] 8007398: f001 fb13 bl 80089c2 ret = USBD_FAIL; 800739c: 2303 movs r3, #3 800739e: 75fb strb r3, [r7, #23] break; 80073a0: e000 b.n 80073a4 break; 80073a2: bf00 nop } break; 80073a4: e006 b.n 80073b4 default: USBD_CtlError(pdev, req); 80073a6: 6839 ldr r1, [r7, #0] 80073a8: 6878 ldr r0, [r7, #4] 80073aa: f001 fb0a bl 80089c2 ret = USBD_FAIL; 80073ae: 2303 movs r3, #3 80073b0: 75fb strb r3, [r7, #23] break; 80073b2: bf00 nop } return (uint8_t)ret; 80073b4: 7dfb ldrb r3, [r7, #23] } 80073b6: 4618 mov r0, r3 80073b8: 3718 adds r7, #24 80073ba: 46bd mov sp, r7 80073bc: bd80 pop {r7, pc} 80073be: bf00 nop 80073c0: 200000a4 .word 0x200000a4 80073c4: 2000008c .word 0x2000008c 080073c8 : uint8_t USBD_HID_SendReport(USBD_HandleTypeDef *pdev, uint8_t *report, uint16_t len, uint8_t ClassId) { USBD_HID_HandleTypeDef *hhid = (USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[ClassId]; #else uint8_t USBD_HID_SendReport(USBD_HandleTypeDef *pdev, uint8_t *report, uint16_t len) { 80073c8: b580 push {r7, lr} 80073ca: b086 sub sp, #24 80073cc: af00 add r7, sp, #0 80073ce: 60f8 str r0, [r7, #12] 80073d0: 60b9 str r1, [r7, #8] 80073d2: 4613 mov r3, r2 80073d4: 80fb strh r3, [r7, #6] USBD_HID_HandleTypeDef *hhid = (USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId]; 80073d6: 68fb ldr r3, [r7, #12] 80073d8: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80073dc: 68fb ldr r3, [r7, #12] 80073de: 32b0 adds r2, #176 @ 0xb0 80073e0: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80073e4: 617b str r3, [r7, #20] #endif /* USE_USBD_COMPOSITE */ if (hhid == NULL) 80073e6: 697b ldr r3, [r7, #20] 80073e8: 2b00 cmp r3, #0 80073ea: d101 bne.n 80073f0 { return (uint8_t)USBD_FAIL; 80073ec: 2303 movs r3, #3 80073ee: e014 b.n 800741a #ifdef USE_USBD_COMPOSITE /* Get the Endpoints addresses allocated for this class instance */ HIDInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_INTR, ClassId); #endif /* USE_USBD_COMPOSITE */ if (pdev->dev_state == USBD_STATE_CONFIGURED) 80073f0: 68fb ldr r3, [r7, #12] 80073f2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80073f6: b2db uxtb r3, r3 80073f8: 2b03 cmp r3, #3 80073fa: d10d bne.n 8007418 { if (hhid->state == USBD_HID_IDLE) 80073fc: 697b ldr r3, [r7, #20] 80073fe: 7b1b ldrb r3, [r3, #12] 8007400: 2b00 cmp r3, #0 8007402: d109 bne.n 8007418 { hhid->state = USBD_HID_BUSY; 8007404: 697b ldr r3, [r7, #20] 8007406: 2201 movs r2, #1 8007408: 731a strb r2, [r3, #12] (void)USBD_LL_Transmit(pdev, HIDInEpAdd, report, len); 800740a: 4b06 ldr r3, [pc, #24] @ (8007424 ) 800740c: 7819 ldrb r1, [r3, #0] 800740e: 88fb ldrh r3, [r7, #6] 8007410: 68ba ldr r2, [r7, #8] 8007412: 68f8 ldr r0, [r7, #12] 8007414: f001 ff91 bl 800933a } } return (uint8_t)USBD_OK; 8007418: 2300 movs r3, #0 } 800741a: 4618 mov r0, r3 800741c: 3718 adds r7, #24 800741e: 46bd mov sp, r7 8007420: bd80 pop {r7, pc} 8007422: bf00 nop 8007424: 200000d1 .word 0x200000d1 08007428 : * return polling interval from endpoint descriptor * @param pdev: device instance * @retval polling interval */ uint32_t USBD_HID_GetPollingInterval(USBD_HandleTypeDef *pdev) { 8007428: b480 push {r7} 800742a: b085 sub sp, #20 800742c: af00 add r7, sp, #0 800742e: 6078 str r0, [r7, #4] uint32_t polling_interval; /* HIGH-speed endpoints */ if (pdev->dev_speed == USBD_SPEED_HIGH) 8007430: 687b ldr r3, [r7, #4] 8007432: 7c1b ldrb r3, [r3, #16] 8007434: 2b00 cmp r3, #0 8007436: d102 bne.n 800743e { /* Sets the data transfer polling interval for high speed transfers. Values between 1..16 are allowed. Values correspond to interval of 2 ^ (bInterval-1). This option (8 ms, corresponds to HID_HS_BINTERVAL */ polling_interval = (((1U << (HID_HS_BINTERVAL - 1U))) / 8U); 8007438: 2308 movs r3, #8 800743a: 60fb str r3, [r7, #12] 800743c: e001 b.n 8007442 } else /* LOW and FULL-speed endpoints */ { /* Sets the data transfer polling interval for low and full speed transfers */ polling_interval = HID_FS_BINTERVAL; 800743e: 230a movs r3, #10 8007440: 60fb str r3, [r7, #12] } return ((uint32_t)(polling_interval)); 8007442: 68fb ldr r3, [r7, #12] } 8007444: 4618 mov r0, r3 8007446: 3714 adds r7, #20 8007448: 46bd mov sp, r7 800744a: f85d 7b04 ldr.w r7, [sp], #4 800744e: 4770 bx lr 08007450 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_HID_GetFSCfgDesc(uint16_t *length) { 8007450: b580 push {r7, lr} 8007452: b084 sub sp, #16 8007454: af00 add r7, sp, #0 8007456: 6078 str r0, [r7, #4] USBD_EpDescTypeDef *pEpDesc = USBD_GetEpDesc(USBD_HID_CfgDesc, HID_EPIN_ADDR); 8007458: 2181 movs r1, #129 @ 0x81 800745a: 4809 ldr r0, [pc, #36] @ (8007480 ) 800745c: f000 fc4e bl 8007cfc 8007460: 60f8 str r0, [r7, #12] if (pEpDesc != NULL) 8007462: 68fb ldr r3, [r7, #12] 8007464: 2b00 cmp r3, #0 8007466: d002 beq.n 800746e { pEpDesc->bInterval = HID_FS_BINTERVAL; 8007468: 68fb ldr r3, [r7, #12] 800746a: 220a movs r2, #10 800746c: 719a strb r2, [r3, #6] } *length = (uint16_t)sizeof(USBD_HID_CfgDesc); 800746e: 687b ldr r3, [r7, #4] 8007470: 2222 movs r2, #34 @ 0x22 8007472: 801a strh r2, [r3, #0] return USBD_HID_CfgDesc; 8007474: 4b02 ldr r3, [pc, #8] @ (8007480 ) } 8007476: 4618 mov r0, r3 8007478: 3710 adds r7, #16 800747a: 46bd mov sp, r7 800747c: bd80 pop {r7, pc} 800747e: bf00 nop 8007480: 20000068 .word 0x20000068 08007484 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_HID_GetHSCfgDesc(uint16_t *length) { 8007484: b580 push {r7, lr} 8007486: b084 sub sp, #16 8007488: af00 add r7, sp, #0 800748a: 6078 str r0, [r7, #4] USBD_EpDescTypeDef *pEpDesc = USBD_GetEpDesc(USBD_HID_CfgDesc, HID_EPIN_ADDR); 800748c: 2181 movs r1, #129 @ 0x81 800748e: 4809 ldr r0, [pc, #36] @ (80074b4 ) 8007490: f000 fc34 bl 8007cfc 8007494: 60f8 str r0, [r7, #12] if (pEpDesc != NULL) 8007496: 68fb ldr r3, [r7, #12] 8007498: 2b00 cmp r3, #0 800749a: d002 beq.n 80074a2 { pEpDesc->bInterval = HID_HS_BINTERVAL; 800749c: 68fb ldr r3, [r7, #12] 800749e: 2207 movs r2, #7 80074a0: 719a strb r2, [r3, #6] } *length = (uint16_t)sizeof(USBD_HID_CfgDesc); 80074a2: 687b ldr r3, [r7, #4] 80074a4: 2222 movs r2, #34 @ 0x22 80074a6: 801a strh r2, [r3, #0] return USBD_HID_CfgDesc; 80074a8: 4b02 ldr r3, [pc, #8] @ (80074b4 ) } 80074aa: 4618 mov r0, r3 80074ac: 3710 adds r7, #16 80074ae: 46bd mov sp, r7 80074b0: bd80 pop {r7, pc} 80074b2: bf00 nop 80074b4: 20000068 .word 0x20000068 080074b8 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_HID_GetOtherSpeedCfgDesc(uint16_t *length) { 80074b8: b580 push {r7, lr} 80074ba: b084 sub sp, #16 80074bc: af00 add r7, sp, #0 80074be: 6078 str r0, [r7, #4] USBD_EpDescTypeDef *pEpDesc = USBD_GetEpDesc(USBD_HID_CfgDesc, HID_EPIN_ADDR); 80074c0: 2181 movs r1, #129 @ 0x81 80074c2: 4809 ldr r0, [pc, #36] @ (80074e8 ) 80074c4: f000 fc1a bl 8007cfc 80074c8: 60f8 str r0, [r7, #12] if (pEpDesc != NULL) 80074ca: 68fb ldr r3, [r7, #12] 80074cc: 2b00 cmp r3, #0 80074ce: d002 beq.n 80074d6 { pEpDesc->bInterval = HID_FS_BINTERVAL; 80074d0: 68fb ldr r3, [r7, #12] 80074d2: 220a movs r2, #10 80074d4: 719a strb r2, [r3, #6] } *length = (uint16_t)sizeof(USBD_HID_CfgDesc); 80074d6: 687b ldr r3, [r7, #4] 80074d8: 2222 movs r2, #34 @ 0x22 80074da: 801a strh r2, [r3, #0] return USBD_HID_CfgDesc; 80074dc: 4b02 ldr r3, [pc, #8] @ (80074e8 ) } 80074de: 4618 mov r0, r3 80074e0: 3710 adds r7, #16 80074e2: 46bd mov sp, r7 80074e4: bd80 pop {r7, pc} 80074e6: bf00 nop 80074e8: 20000068 .word 0x20000068 080074ec : * @param pdev: device instance * @param epnum: endpoint index * @retval status */ static uint8_t USBD_HID_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) { 80074ec: b480 push {r7} 80074ee: b083 sub sp, #12 80074f0: af00 add r7, sp, #0 80074f2: 6078 str r0, [r7, #4] 80074f4: 460b mov r3, r1 80074f6: 70fb strb r3, [r7, #3] UNUSED(epnum); /* Ensure that the FIFO is empty before a new transfer, this condition could be caused by a new transfer before the end of the previous transfer */ ((USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId])->state = USBD_HID_IDLE; 80074f8: 687b ldr r3, [r7, #4] 80074fa: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80074fe: 687b ldr r3, [r7, #4] 8007500: 32b0 adds r2, #176 @ 0xb0 8007502: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007506: 2200 movs r2, #0 8007508: 731a strb r2, [r3, #12] return (uint8_t)USBD_OK; 800750a: 2300 movs r3, #0 } 800750c: 4618 mov r0, r3 800750e: 370c adds r7, #12 8007510: 46bd mov sp, r7 8007512: f85d 7b04 ldr.w r7, [sp], #4 8007516: 4770 bx lr 08007518 : * return Device Qualifier descriptor * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_HID_GetDeviceQualifierDesc(uint16_t *length) { 8007518: b480 push {r7} 800751a: b083 sub sp, #12 800751c: af00 add r7, sp, #0 800751e: 6078 str r0, [r7, #4] *length = (uint16_t)sizeof(USBD_HID_DeviceQualifierDesc); 8007520: 687b ldr r3, [r7, #4] 8007522: 220a movs r2, #10 8007524: 801a strh r2, [r3, #0] return USBD_HID_DeviceQualifierDesc; 8007526: 4b03 ldr r3, [pc, #12] @ (8007534 ) } 8007528: 4618 mov r0, r3 800752a: 370c adds r7, #12 800752c: 46bd mov sp, r7 800752e: f85d 7b04 ldr.w r7, [sp], #4 8007532: 4770 bx lr 8007534: 20000098 .word 0x20000098 08007538 : * @param id: Low level core index * @retval status: USBD Status */ USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) { 8007538: b580 push {r7, lr} 800753a: b086 sub sp, #24 800753c: af00 add r7, sp, #0 800753e: 60f8 str r0, [r7, #12] 8007540: 60b9 str r1, [r7, #8] 8007542: 4613 mov r3, r2 8007544: 71fb strb r3, [r7, #7] USBD_StatusTypeDef ret; /* Check whether the USB Host handle is valid */ if (pdev == NULL) 8007546: 68fb ldr r3, [r7, #12] 8007548: 2b00 cmp r3, #0 800754a: d101 bne.n 8007550 { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Device handle"); #endif /* (USBD_DEBUG_LEVEL > 1U) */ return USBD_FAIL; 800754c: 2303 movs r3, #3 800754e: e01f b.n 8007590 pdev->NumClasses = 0; pdev->classId = 0; } #else /* Unlink previous class*/ pdev->pClass[0] = NULL; 8007550: 68fb ldr r3, [r7, #12] 8007552: 2200 movs r2, #0 8007554: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 pdev->pUserData[0] = NULL; 8007558: 68fb ldr r3, [r7, #12] 800755a: 2200 movs r2, #0 800755c: f8c3 22c4 str.w r2, [r3, #708] @ 0x2c4 #endif /* USE_USBD_COMPOSITE */ pdev->pConfDesc = NULL; 8007560: 68fb ldr r3, [r7, #12] 8007562: 2200 movs r2, #0 8007564: f8c3 22d0 str.w r2, [r3, #720] @ 0x2d0 /* Assign USBD Descriptors */ if (pdesc != NULL) 8007568: 68bb ldr r3, [r7, #8] 800756a: 2b00 cmp r3, #0 800756c: d003 beq.n 8007576 { pdev->pDesc = pdesc; 800756e: 68fb ldr r3, [r7, #12] 8007570: 68ba ldr r2, [r7, #8] 8007572: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 } /* Set Device initial State */ pdev->dev_state = USBD_STATE_DEFAULT; 8007576: 68fb ldr r3, [r7, #12] 8007578: 2201 movs r2, #1 800757a: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->id = id; 800757e: 68fb ldr r3, [r7, #12] 8007580: 79fa ldrb r2, [r7, #7] 8007582: 701a strb r2, [r3, #0] /* Initialize low level driver */ ret = USBD_LL_Init(pdev); 8007584: 68f8 ldr r0, [r7, #12] 8007586: f001 fda3 bl 80090d0 800758a: 4603 mov r3, r0 800758c: 75fb strb r3, [r7, #23] return ret; 800758e: 7dfb ldrb r3, [r7, #23] } 8007590: 4618 mov r0, r3 8007592: 3718 adds r7, #24 8007594: 46bd mov sp, r7 8007596: bd80 pop {r7, pc} 08007598 : * @param pdev: Device Handle * @param pclass: Class handle * @retval USBD Status */ USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass) { 8007598: b580 push {r7, lr} 800759a: b084 sub sp, #16 800759c: af00 add r7, sp, #0 800759e: 6078 str r0, [r7, #4] 80075a0: 6039 str r1, [r7, #0] uint16_t len = 0U; 80075a2: 2300 movs r3, #0 80075a4: 81fb strh r3, [r7, #14] if (pclass == NULL) 80075a6: 683b ldr r3, [r7, #0] 80075a8: 2b00 cmp r3, #0 80075aa: d101 bne.n 80075b0 { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Class handle"); #endif /* (USBD_DEBUG_LEVEL > 1U) */ return USBD_FAIL; 80075ac: 2303 movs r3, #3 80075ae: e025 b.n 80075fc } /* link the class to the USB Device handle */ pdev->pClass[0] = pclass; 80075b0: 687b ldr r3, [r7, #4] 80075b2: 683a ldr r2, [r7, #0] 80075b4: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 if (pdev->pClass[pdev->classId]->GetHSConfigDescriptor != NULL) { pdev->pConfDesc = (void *)pdev->pClass[pdev->classId]->GetHSConfigDescriptor(&len); } #else /* Default USE_USB_FS */ if (pdev->pClass[pdev->classId]->GetFSConfigDescriptor != NULL) 80075b8: 687b ldr r3, [r7, #4] 80075ba: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80075be: 687b ldr r3, [r7, #4] 80075c0: 32ae adds r2, #174 @ 0xae 80075c2: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80075c6: 6adb ldr r3, [r3, #44] @ 0x2c 80075c8: 2b00 cmp r3, #0 80075ca: d00f beq.n 80075ec { pdev->pConfDesc = (void *)pdev->pClass[pdev->classId]->GetFSConfigDescriptor(&len); 80075cc: 687b ldr r3, [r7, #4] 80075ce: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80075d2: 687b ldr r3, [r7, #4] 80075d4: 32ae adds r2, #174 @ 0xae 80075d6: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80075da: 6adb ldr r3, [r3, #44] @ 0x2c 80075dc: f107 020e add.w r2, r7, #14 80075e0: 4610 mov r0, r2 80075e2: 4798 blx r3 80075e4: 4602 mov r2, r0 80075e6: 687b ldr r3, [r7, #4] 80075e8: f8c3 22d0 str.w r2, [r3, #720] @ 0x2d0 } #endif /* USE_USB_FS */ /* Increment the NumClasses */ pdev->NumClasses++; 80075ec: 687b ldr r3, [r7, #4] 80075ee: f8d3 32d8 ldr.w r3, [r3, #728] @ 0x2d8 80075f2: 1c5a adds r2, r3, #1 80075f4: 687b ldr r3, [r7, #4] 80075f6: f8c3 22d8 str.w r2, [r3, #728] @ 0x2d8 return USBD_OK; 80075fa: 2300 movs r3, #0 } 80075fc: 4618 mov r0, r3 80075fe: 3710 adds r7, #16 8007600: 46bd mov sp, r7 8007602: bd80 pop {r7, pc} 08007604 : * Start the USB Device Core. * @param pdev: Device Handle * @retval USBD Status */ USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev) { 8007604: b580 push {r7, lr} 8007606: b082 sub sp, #8 8007608: af00 add r7, sp, #0 800760a: 6078 str r0, [r7, #4] #ifdef USE_USBD_COMPOSITE pdev->classId = 0U; #endif /* USE_USBD_COMPOSITE */ /* Start the low level driver */ return USBD_LL_Start(pdev); 800760c: 6878 ldr r0, [r7, #4] 800760e: f001 fdab bl 8009168 8007612: 4603 mov r3, r0 } 8007614: 4618 mov r0, r3 8007616: 3708 adds r7, #8 8007618: 46bd mov sp, r7 800761a: bd80 pop {r7, pc} 0800761c : * Launch test mode process * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev) { 800761c: b480 push {r7} 800761e: b083 sub sp, #12 8007620: af00 add r7, sp, #0 8007622: 6078 str r0, [r7, #4] return ret; #else /* Prevent unused argument compilation warning */ UNUSED(pdev); return USBD_OK; 8007624: 2300 movs r3, #0 #endif /* USBD_HS_TESTMODE_ENABLE */ } 8007626: 4618 mov r0, r3 8007628: 370c adds r7, #12 800762a: 46bd mov sp, r7 800762c: f85d 7b04 ldr.w r7, [sp], #4 8007630: 4770 bx lr 08007632 : * @param cfgidx: configuration index * @retval status */ USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8007632: b580 push {r7, lr} 8007634: b084 sub sp, #16 8007636: af00 add r7, sp, #0 8007638: 6078 str r0, [r7, #4] 800763a: 460b mov r3, r1 800763c: 70fb strb r3, [r7, #3] USBD_StatusTypeDef ret = USBD_OK; 800763e: 2300 movs r3, #0 8007640: 73fb strb r3, [r7, #15] } } } } #else if (pdev->pClass[0] != NULL) 8007642: 687b ldr r3, [r7, #4] 8007644: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007648: 2b00 cmp r3, #0 800764a: d009 beq.n 8007660 { /* Set configuration and Start the Class */ ret = (USBD_StatusTypeDef)pdev->pClass[0]->Init(pdev, cfgidx); 800764c: 687b ldr r3, [r7, #4] 800764e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007652: 681b ldr r3, [r3, #0] 8007654: 78fa ldrb r2, [r7, #3] 8007656: 4611 mov r1, r2 8007658: 6878 ldr r0, [r7, #4] 800765a: 4798 blx r3 800765c: 4603 mov r3, r0 800765e: 73fb strb r3, [r7, #15] } #endif /* USE_USBD_COMPOSITE */ return ret; 8007660: 7bfb ldrb r3, [r7, #15] } 8007662: 4618 mov r0, r3 8007664: 3710 adds r7, #16 8007666: 46bd mov sp, r7 8007668: bd80 pop {r7, pc} 0800766a : * @param pdev: device instance * @param cfgidx: configuration index * @retval status */ USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800766a: b580 push {r7, lr} 800766c: b084 sub sp, #16 800766e: af00 add r7, sp, #0 8007670: 6078 str r0, [r7, #4] 8007672: 460b mov r3, r1 8007674: 70fb strb r3, [r7, #3] USBD_StatusTypeDef ret = USBD_OK; 8007676: 2300 movs r3, #0 8007678: 73fb strb r3, [r7, #15] } } } #else /* Clear configuration and De-initialize the Class process */ if (pdev->pClass[0]->DeInit(pdev, cfgidx) != 0U) 800767a: 687b ldr r3, [r7, #4] 800767c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007680: 685b ldr r3, [r3, #4] 8007682: 78fa ldrb r2, [r7, #3] 8007684: 4611 mov r1, r2 8007686: 6878 ldr r0, [r7, #4] 8007688: 4798 blx r3 800768a: 4603 mov r3, r0 800768c: 2b00 cmp r3, #0 800768e: d001 beq.n 8007694 { ret = USBD_FAIL; 8007690: 2303 movs r3, #3 8007692: 73fb strb r3, [r7, #15] } #endif /* USE_USBD_COMPOSITE */ return ret; 8007694: 7bfb ldrb r3, [r7, #15] } 8007696: 4618 mov r0, r3 8007698: 3710 adds r7, #16 800769a: 46bd mov sp, r7 800769c: bd80 pop {r7, pc} 0800769e : * @param pdev: device instance * @param psetup: setup packet buffer pointer * @retval status */ USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) { 800769e: b580 push {r7, lr} 80076a0: b084 sub sp, #16 80076a2: af00 add r7, sp, #0 80076a4: 6078 str r0, [r7, #4] 80076a6: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret; USBD_ParseSetupRequest(&pdev->request, psetup); 80076a8: 687b ldr r3, [r7, #4] 80076aa: f203 23aa addw r3, r3, #682 @ 0x2aa 80076ae: 6839 ldr r1, [r7, #0] 80076b0: 4618 mov r0, r3 80076b2: f001 f94c bl 800894e pdev->ep0_state = USBD_EP0_SETUP; 80076b6: 687b ldr r3, [r7, #4] 80076b8: 2201 movs r2, #1 80076ba: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep0_data_len = pdev->request.wLength; 80076be: 687b ldr r3, [r7, #4] 80076c0: f8b3 32b0 ldrh.w r3, [r3, #688] @ 0x2b0 80076c4: 461a mov r2, r3 80076c6: 687b ldr r3, [r7, #4] 80076c8: f8c3 2298 str.w r2, [r3, #664] @ 0x298 switch (pdev->request.bmRequest & 0x1FU) 80076cc: 687b ldr r3, [r7, #4] 80076ce: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa 80076d2: f003 031f and.w r3, r3, #31 80076d6: 2b02 cmp r3, #2 80076d8: d01a beq.n 8007710 80076da: 2b02 cmp r3, #2 80076dc: d822 bhi.n 8007724 80076de: 2b00 cmp r3, #0 80076e0: d002 beq.n 80076e8 80076e2: 2b01 cmp r3, #1 80076e4: d00a beq.n 80076fc 80076e6: e01d b.n 8007724 { case USB_REQ_RECIPIENT_DEVICE: ret = USBD_StdDevReq(pdev, &pdev->request); 80076e8: 687b ldr r3, [r7, #4] 80076ea: f203 23aa addw r3, r3, #682 @ 0x2aa 80076ee: 4619 mov r1, r3 80076f0: 6878 ldr r0, [r7, #4] 80076f2: f000 fb77 bl 8007de4 80076f6: 4603 mov r3, r0 80076f8: 73fb strb r3, [r7, #15] break; 80076fa: e020 b.n 800773e case USB_REQ_RECIPIENT_INTERFACE: ret = USBD_StdItfReq(pdev, &pdev->request); 80076fc: 687b ldr r3, [r7, #4] 80076fe: f203 23aa addw r3, r3, #682 @ 0x2aa 8007702: 4619 mov r1, r3 8007704: 6878 ldr r0, [r7, #4] 8007706: f000 fbdf bl 8007ec8 800770a: 4603 mov r3, r0 800770c: 73fb strb r3, [r7, #15] break; 800770e: e016 b.n 800773e case USB_REQ_RECIPIENT_ENDPOINT: ret = USBD_StdEPReq(pdev, &pdev->request); 8007710: 687b ldr r3, [r7, #4] 8007712: f203 23aa addw r3, r3, #682 @ 0x2aa 8007716: 4619 mov r1, r3 8007718: 6878 ldr r0, [r7, #4] 800771a: f000 fc41 bl 8007fa0 800771e: 4603 mov r3, r0 8007720: 73fb strb r3, [r7, #15] break; 8007722: e00c b.n 800773e default: ret = USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U)); 8007724: 687b ldr r3, [r7, #4] 8007726: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa 800772a: f023 037f bic.w r3, r3, #127 @ 0x7f 800772e: b2db uxtb r3, r3 8007730: 4619 mov r1, r3 8007732: 6878 ldr r0, [r7, #4] 8007734: f001 fd78 bl 8009228 8007738: 4603 mov r3, r0 800773a: 73fb strb r3, [r7, #15] break; 800773c: bf00 nop } return ret; 800773e: 7bfb ldrb r3, [r7, #15] } 8007740: 4618 mov r0, r3 8007742: 3710 adds r7, #16 8007744: 46bd mov sp, r7 8007746: bd80 pop {r7, pc} 08007748 : * @param pdata: data pointer * @retval status */ USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 8007748: b580 push {r7, lr} 800774a: b086 sub sp, #24 800774c: af00 add r7, sp, #0 800774e: 60f8 str r0, [r7, #12] 8007750: 460b mov r3, r1 8007752: 607a str r2, [r7, #4] 8007754: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; USBD_StatusTypeDef ret = USBD_OK; 8007756: 2300 movs r3, #0 8007758: 75fb strb r3, [r7, #23] uint8_t idx; UNUSED(pdata); if (epnum == 0U) 800775a: 7afb ldrb r3, [r7, #11] 800775c: 2b00 cmp r3, #0 800775e: d177 bne.n 8007850 { pep = &pdev->ep_out[0]; 8007760: 68fb ldr r3, [r7, #12] 8007762: f503 73aa add.w r3, r3, #340 @ 0x154 8007766: 613b str r3, [r7, #16] if (pdev->ep0_state == USBD_EP0_DATA_OUT) 8007768: 68fb ldr r3, [r7, #12] 800776a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 800776e: 2b03 cmp r3, #3 8007770: f040 80a1 bne.w 80078b6 { if (pep->rem_length > pep->maxpacket) 8007774: 693b ldr r3, [r7, #16] 8007776: 685b ldr r3, [r3, #4] 8007778: 693a ldr r2, [r7, #16] 800777a: 8992 ldrh r2, [r2, #12] 800777c: 4293 cmp r3, r2 800777e: d91c bls.n 80077ba { pep->rem_length -= pep->maxpacket; 8007780: 693b ldr r3, [r7, #16] 8007782: 685b ldr r3, [r3, #4] 8007784: 693a ldr r2, [r7, #16] 8007786: 8992 ldrh r2, [r2, #12] 8007788: 1a9a subs r2, r3, r2 800778a: 693b ldr r3, [r7, #16] 800778c: 605a str r2, [r3, #4] pep->pbuffer += pep->maxpacket; 800778e: 693b ldr r3, [r7, #16] 8007790: 691b ldr r3, [r3, #16] 8007792: 693a ldr r2, [r7, #16] 8007794: 8992 ldrh r2, [r2, #12] 8007796: 441a add r2, r3 8007798: 693b ldr r3, [r7, #16] 800779a: 611a str r2, [r3, #16] (void)USBD_CtlContinueRx(pdev, pep->pbuffer, MAX(pep->rem_length, pep->maxpacket)); 800779c: 693b ldr r3, [r7, #16] 800779e: 6919 ldr r1, [r3, #16] 80077a0: 693b ldr r3, [r7, #16] 80077a2: 899b ldrh r3, [r3, #12] 80077a4: 461a mov r2, r3 80077a6: 693b ldr r3, [r7, #16] 80077a8: 685b ldr r3, [r3, #4] 80077aa: 4293 cmp r3, r2 80077ac: bf38 it cc 80077ae: 4613 movcc r3, r2 80077b0: 461a mov r2, r3 80077b2: 68f8 ldr r0, [r7, #12] 80077b4: f001 f9b1 bl 8008b1a 80077b8: e07d b.n 80078b6 } else { /* Find the class ID relative to the current request */ switch (pdev->request.bmRequest & 0x1FU) 80077ba: 68fb ldr r3, [r7, #12] 80077bc: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa 80077c0: f003 031f and.w r3, r3, #31 80077c4: 2b02 cmp r3, #2 80077c6: d014 beq.n 80077f2 80077c8: 2b02 cmp r3, #2 80077ca: d81d bhi.n 8007808 80077cc: 2b00 cmp r3, #0 80077ce: d002 beq.n 80077d6 80077d0: 2b01 cmp r3, #1 80077d2: d003 beq.n 80077dc 80077d4: e018 b.n 8007808 { case USB_REQ_RECIPIENT_DEVICE: /* Device requests must be managed by the first instantiated class (or duplicated by all classes for simplicity) */ idx = 0U; 80077d6: 2300 movs r3, #0 80077d8: 75bb strb r3, [r7, #22] break; 80077da: e018 b.n 800780e case USB_REQ_RECIPIENT_INTERFACE: idx = USBD_CoreFindIF(pdev, LOBYTE(pdev->request.wIndex)); 80077dc: 68fb ldr r3, [r7, #12] 80077de: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae 80077e2: b2db uxtb r3, r3 80077e4: 4619 mov r1, r3 80077e6: 68f8 ldr r0, [r7, #12] 80077e8: f000 fa6e bl 8007cc8 80077ec: 4603 mov r3, r0 80077ee: 75bb strb r3, [r7, #22] break; 80077f0: e00d b.n 800780e case USB_REQ_RECIPIENT_ENDPOINT: idx = USBD_CoreFindEP(pdev, LOBYTE(pdev->request.wIndex)); 80077f2: 68fb ldr r3, [r7, #12] 80077f4: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae 80077f8: b2db uxtb r3, r3 80077fa: 4619 mov r1, r3 80077fc: 68f8 ldr r0, [r7, #12] 80077fe: f000 fa70 bl 8007ce2 8007802: 4603 mov r3, r0 8007804: 75bb strb r3, [r7, #22] break; 8007806: e002 b.n 800780e default: /* Back to the first class in case of doubt */ idx = 0U; 8007808: 2300 movs r3, #0 800780a: 75bb strb r3, [r7, #22] break; 800780c: bf00 nop } if (idx < USBD_MAX_SUPPORTED_CLASS) 800780e: 7dbb ldrb r3, [r7, #22] 8007810: 2b00 cmp r3, #0 8007812: d119 bne.n 8007848 { /* Setup the class ID and route the request to the relative class function */ if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007814: 68fb ldr r3, [r7, #12] 8007816: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800781a: b2db uxtb r3, r3 800781c: 2b03 cmp r3, #3 800781e: d113 bne.n 8007848 { if (pdev->pClass[idx]->EP0_RxReady != NULL) 8007820: 7dba ldrb r2, [r7, #22] 8007822: 68fb ldr r3, [r7, #12] 8007824: 32ae adds r2, #174 @ 0xae 8007826: f853 3022 ldr.w r3, [r3, r2, lsl #2] 800782a: 691b ldr r3, [r3, #16] 800782c: 2b00 cmp r3, #0 800782e: d00b beq.n 8007848 { pdev->classId = idx; 8007830: 7dba ldrb r2, [r7, #22] 8007832: 68fb ldr r3, [r7, #12] 8007834: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 pdev->pClass[idx]->EP0_RxReady(pdev); 8007838: 7dba ldrb r2, [r7, #22] 800783a: 68fb ldr r3, [r7, #12] 800783c: 32ae adds r2, #174 @ 0xae 800783e: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007842: 691b ldr r3, [r3, #16] 8007844: 68f8 ldr r0, [r7, #12] 8007846: 4798 blx r3 } } } (void)USBD_CtlSendStatus(pdev); 8007848: 68f8 ldr r0, [r7, #12] 800784a: f001 f977 bl 8008b3c 800784e: e032 b.n 80078b6 } } else { /* Get the class index relative to this interface */ idx = USBD_CoreFindEP(pdev, (epnum & 0x7FU)); 8007850: 7afb ldrb r3, [r7, #11] 8007852: f003 037f and.w r3, r3, #127 @ 0x7f 8007856: b2db uxtb r3, r3 8007858: 4619 mov r1, r3 800785a: 68f8 ldr r0, [r7, #12] 800785c: f000 fa41 bl 8007ce2 8007860: 4603 mov r3, r0 8007862: 75bb strb r3, [r7, #22] if (((uint16_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS)) 8007864: 7dbb ldrb r3, [r7, #22] 8007866: 2bff cmp r3, #255 @ 0xff 8007868: d025 beq.n 80078b6 800786a: 7dbb ldrb r3, [r7, #22] 800786c: 2b00 cmp r3, #0 800786e: d122 bne.n 80078b6 { /* Call the class data out function to manage the request */ if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007870: 68fb ldr r3, [r7, #12] 8007872: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007876: b2db uxtb r3, r3 8007878: 2b03 cmp r3, #3 800787a: d117 bne.n 80078ac { if (pdev->pClass[idx]->DataOut != NULL) 800787c: 7dba ldrb r2, [r7, #22] 800787e: 68fb ldr r3, [r7, #12] 8007880: 32ae adds r2, #174 @ 0xae 8007882: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007886: 699b ldr r3, [r3, #24] 8007888: 2b00 cmp r3, #0 800788a: d00f beq.n 80078ac { pdev->classId = idx; 800788c: 7dba ldrb r2, [r7, #22] 800788e: 68fb ldr r3, [r7, #12] 8007890: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 ret = (USBD_StatusTypeDef)pdev->pClass[idx]->DataOut(pdev, epnum); 8007894: 7dba ldrb r2, [r7, #22] 8007896: 68fb ldr r3, [r7, #12] 8007898: 32ae adds r2, #174 @ 0xae 800789a: f853 3022 ldr.w r3, [r3, r2, lsl #2] 800789e: 699b ldr r3, [r3, #24] 80078a0: 7afa ldrb r2, [r7, #11] 80078a2: 4611 mov r1, r2 80078a4: 68f8 ldr r0, [r7, #12] 80078a6: 4798 blx r3 80078a8: 4603 mov r3, r0 80078aa: 75fb strb r3, [r7, #23] } } if (ret != USBD_OK) 80078ac: 7dfb ldrb r3, [r7, #23] 80078ae: 2b00 cmp r3, #0 80078b0: d001 beq.n 80078b6 { return ret; 80078b2: 7dfb ldrb r3, [r7, #23] 80078b4: e000 b.n 80078b8 } } } return USBD_OK; 80078b6: 2300 movs r3, #0 } 80078b8: 4618 mov r0, r3 80078ba: 3718 adds r7, #24 80078bc: 46bd mov sp, r7 80078be: bd80 pop {r7, pc} 080078c0 : * @param pdata: data pointer * @retval status */ USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 80078c0: b580 push {r7, lr} 80078c2: b086 sub sp, #24 80078c4: af00 add r7, sp, #0 80078c6: 60f8 str r0, [r7, #12] 80078c8: 460b mov r3, r1 80078ca: 607a str r2, [r7, #4] 80078cc: 72fb strb r3, [r7, #11] USBD_StatusTypeDef ret; uint8_t idx; UNUSED(pdata); if (epnum == 0U) 80078ce: 7afb ldrb r3, [r7, #11] 80078d0: 2b00 cmp r3, #0 80078d2: d178 bne.n 80079c6 { pep = &pdev->ep_in[0]; 80078d4: 68fb ldr r3, [r7, #12] 80078d6: 3314 adds r3, #20 80078d8: 613b str r3, [r7, #16] if (pdev->ep0_state == USBD_EP0_DATA_IN) 80078da: 68fb ldr r3, [r7, #12] 80078dc: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 80078e0: 2b02 cmp r3, #2 80078e2: d163 bne.n 80079ac { if (pep->rem_length > pep->maxpacket) 80078e4: 693b ldr r3, [r7, #16] 80078e6: 685b ldr r3, [r3, #4] 80078e8: 693a ldr r2, [r7, #16] 80078ea: 8992 ldrh r2, [r2, #12] 80078ec: 4293 cmp r3, r2 80078ee: d91c bls.n 800792a { pep->rem_length -= pep->maxpacket; 80078f0: 693b ldr r3, [r7, #16] 80078f2: 685b ldr r3, [r3, #4] 80078f4: 693a ldr r2, [r7, #16] 80078f6: 8992 ldrh r2, [r2, #12] 80078f8: 1a9a subs r2, r3, r2 80078fa: 693b ldr r3, [r7, #16] 80078fc: 605a str r2, [r3, #4] pep->pbuffer += pep->maxpacket; 80078fe: 693b ldr r3, [r7, #16] 8007900: 691b ldr r3, [r3, #16] 8007902: 693a ldr r2, [r7, #16] 8007904: 8992 ldrh r2, [r2, #12] 8007906: 441a add r2, r3 8007908: 693b ldr r3, [r7, #16] 800790a: 611a str r2, [r3, #16] (void)USBD_CtlContinueSendData(pdev, pep->pbuffer, pep->rem_length); 800790c: 693b ldr r3, [r7, #16] 800790e: 6919 ldr r1, [r3, #16] 8007910: 693b ldr r3, [r7, #16] 8007912: 685b ldr r3, [r3, #4] 8007914: 461a mov r2, r3 8007916: 68f8 ldr r0, [r7, #12] 8007918: f001 f8ee bl 8008af8 /* Prepare endpoint for premature end of transfer */ (void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800791c: 2300 movs r3, #0 800791e: 2200 movs r2, #0 8007920: 2100 movs r1, #0 8007922: 68f8 ldr r0, [r7, #12] 8007924: f001 fd2a bl 800937c 8007928: e040 b.n 80079ac } else { /* last packet is MPS multiple, so send ZLP packet */ if ((pep->maxpacket == pep->rem_length) && 800792a: 693b ldr r3, [r7, #16] 800792c: 899b ldrh r3, [r3, #12] 800792e: 461a mov r2, r3 8007930: 693b ldr r3, [r7, #16] 8007932: 685b ldr r3, [r3, #4] 8007934: 429a cmp r2, r3 8007936: d11c bne.n 8007972 (pep->total_length >= pep->maxpacket) && 8007938: 693b ldr r3, [r7, #16] 800793a: 681b ldr r3, [r3, #0] 800793c: 693a ldr r2, [r7, #16] 800793e: 8992 ldrh r2, [r2, #12] if ((pep->maxpacket == pep->rem_length) && 8007940: 4293 cmp r3, r2 8007942: d316 bcc.n 8007972 (pep->total_length < pdev->ep0_data_len)) 8007944: 693b ldr r3, [r7, #16] 8007946: 681a ldr r2, [r3, #0] 8007948: 68fb ldr r3, [r7, #12] 800794a: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298 (pep->total_length >= pep->maxpacket) && 800794e: 429a cmp r2, r3 8007950: d20f bcs.n 8007972 { (void)USBD_CtlContinueSendData(pdev, NULL, 0U); 8007952: 2200 movs r2, #0 8007954: 2100 movs r1, #0 8007956: 68f8 ldr r0, [r7, #12] 8007958: f001 f8ce bl 8008af8 pdev->ep0_data_len = 0U; 800795c: 68fb ldr r3, [r7, #12] 800795e: 2200 movs r2, #0 8007960: f8c3 2298 str.w r2, [r3, #664] @ 0x298 /* Prepare endpoint for premature end of transfer */ (void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 8007964: 2300 movs r3, #0 8007966: 2200 movs r2, #0 8007968: 2100 movs r1, #0 800796a: 68f8 ldr r0, [r7, #12] 800796c: f001 fd06 bl 800937c 8007970: e01c b.n 80079ac } else { if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007972: 68fb ldr r3, [r7, #12] 8007974: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007978: b2db uxtb r3, r3 800797a: 2b03 cmp r3, #3 800797c: d10f bne.n 800799e { if (pdev->pClass[0]->EP0_TxSent != NULL) 800797e: 68fb ldr r3, [r7, #12] 8007980: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007984: 68db ldr r3, [r3, #12] 8007986: 2b00 cmp r3, #0 8007988: d009 beq.n 800799e { pdev->classId = 0U; 800798a: 68fb ldr r3, [r7, #12] 800798c: 2200 movs r2, #0 800798e: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 pdev->pClass[0]->EP0_TxSent(pdev); 8007992: 68fb ldr r3, [r7, #12] 8007994: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007998: 68db ldr r3, [r3, #12] 800799a: 68f8 ldr r0, [r7, #12] 800799c: 4798 blx r3 } } (void)USBD_LL_StallEP(pdev, 0x80U); 800799e: 2180 movs r1, #128 @ 0x80 80079a0: 68f8 ldr r0, [r7, #12] 80079a2: f001 fc41 bl 8009228 (void)USBD_CtlReceiveStatus(pdev); 80079a6: 68f8 ldr r0, [r7, #12] 80079a8: f001 f8db bl 8008b62 } } } if (pdev->dev_test_mode != 0U) 80079ac: 68fb ldr r3, [r7, #12] 80079ae: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0 80079b2: 2b00 cmp r3, #0 80079b4: d03a beq.n 8007a2c { (void)USBD_RunTestMode(pdev); 80079b6: 68f8 ldr r0, [r7, #12] 80079b8: f7ff fe30 bl 800761c pdev->dev_test_mode = 0U; 80079bc: 68fb ldr r3, [r7, #12] 80079be: 2200 movs r2, #0 80079c0: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 80079c4: e032 b.n 8007a2c } } else { /* Get the class index relative to this interface */ idx = USBD_CoreFindEP(pdev, ((uint8_t)epnum | 0x80U)); 80079c6: 7afb ldrb r3, [r7, #11] 80079c8: f063 037f orn r3, r3, #127 @ 0x7f 80079cc: b2db uxtb r3, r3 80079ce: 4619 mov r1, r3 80079d0: 68f8 ldr r0, [r7, #12] 80079d2: f000 f986 bl 8007ce2 80079d6: 4603 mov r3, r0 80079d8: 75fb strb r3, [r7, #23] if (((uint16_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS)) 80079da: 7dfb ldrb r3, [r7, #23] 80079dc: 2bff cmp r3, #255 @ 0xff 80079de: d025 beq.n 8007a2c 80079e0: 7dfb ldrb r3, [r7, #23] 80079e2: 2b00 cmp r3, #0 80079e4: d122 bne.n 8007a2c { /* Call the class data out function to manage the request */ if (pdev->dev_state == USBD_STATE_CONFIGURED) 80079e6: 68fb ldr r3, [r7, #12] 80079e8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80079ec: b2db uxtb r3, r3 80079ee: 2b03 cmp r3, #3 80079f0: d11c bne.n 8007a2c { if (pdev->pClass[idx]->DataIn != NULL) 80079f2: 7dfa ldrb r2, [r7, #23] 80079f4: 68fb ldr r3, [r7, #12] 80079f6: 32ae adds r2, #174 @ 0xae 80079f8: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80079fc: 695b ldr r3, [r3, #20] 80079fe: 2b00 cmp r3, #0 8007a00: d014 beq.n 8007a2c { pdev->classId = idx; 8007a02: 7dfa ldrb r2, [r7, #23] 8007a04: 68fb ldr r3, [r7, #12] 8007a06: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 ret = (USBD_StatusTypeDef)pdev->pClass[idx]->DataIn(pdev, epnum); 8007a0a: 7dfa ldrb r2, [r7, #23] 8007a0c: 68fb ldr r3, [r7, #12] 8007a0e: 32ae adds r2, #174 @ 0xae 8007a10: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007a14: 695b ldr r3, [r3, #20] 8007a16: 7afa ldrb r2, [r7, #11] 8007a18: 4611 mov r1, r2 8007a1a: 68f8 ldr r0, [r7, #12] 8007a1c: 4798 blx r3 8007a1e: 4603 mov r3, r0 8007a20: 75bb strb r3, [r7, #22] if (ret != USBD_OK) 8007a22: 7dbb ldrb r3, [r7, #22] 8007a24: 2b00 cmp r3, #0 8007a26: d001 beq.n 8007a2c { return ret; 8007a28: 7dbb ldrb r3, [r7, #22] 8007a2a: e000 b.n 8007a2e } } } } return USBD_OK; 8007a2c: 2300 movs r3, #0 } 8007a2e: 4618 mov r0, r3 8007a30: 3718 adds r7, #24 8007a32: 46bd mov sp, r7 8007a34: bd80 pop {r7, pc} 08007a36 : * Handle Reset event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) { 8007a36: b580 push {r7, lr} 8007a38: b084 sub sp, #16 8007a3a: af00 add r7, sp, #0 8007a3c: 6078 str r0, [r7, #4] USBD_StatusTypeDef ret = USBD_OK; 8007a3e: 2300 movs r3, #0 8007a40: 73fb strb r3, [r7, #15] /* Upon Reset call user call back */ pdev->dev_state = USBD_STATE_DEFAULT; 8007a42: 687b ldr r3, [r7, #4] 8007a44: 2201 movs r2, #1 8007a46: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->ep0_state = USBD_EP0_IDLE; 8007a4a: 687b ldr r3, [r7, #4] 8007a4c: 2200 movs r2, #0 8007a4e: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->dev_config = 0U; 8007a52: 687b ldr r3, [r7, #4] 8007a54: 2200 movs r2, #0 8007a56: 605a str r2, [r3, #4] pdev->dev_remote_wakeup = 0U; 8007a58: 687b ldr r3, [r7, #4] 8007a5a: 2200 movs r2, #0 8007a5c: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 pdev->dev_test_mode = 0U; 8007a60: 687b ldr r3, [r7, #4] 8007a62: 2200 movs r2, #0 8007a64: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 } } } #else if (pdev->pClass[0] != NULL) 8007a68: 687b ldr r3, [r7, #4] 8007a6a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007a6e: 2b00 cmp r3, #0 8007a70: d014 beq.n 8007a9c { if (pdev->pClass[0]->DeInit != NULL) 8007a72: 687b ldr r3, [r7, #4] 8007a74: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007a78: 685b ldr r3, [r3, #4] 8007a7a: 2b00 cmp r3, #0 8007a7c: d00e beq.n 8007a9c { if (pdev->pClass[0]->DeInit(pdev, (uint8_t)pdev->dev_config) != USBD_OK) 8007a7e: 687b ldr r3, [r7, #4] 8007a80: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007a84: 685b ldr r3, [r3, #4] 8007a86: 687a ldr r2, [r7, #4] 8007a88: 6852 ldr r2, [r2, #4] 8007a8a: b2d2 uxtb r2, r2 8007a8c: 4611 mov r1, r2 8007a8e: 6878 ldr r0, [r7, #4] 8007a90: 4798 blx r3 8007a92: 4603 mov r3, r0 8007a94: 2b00 cmp r3, #0 8007a96: d001 beq.n 8007a9c { ret = USBD_FAIL; 8007a98: 2303 movs r3, #3 8007a9a: 73fb strb r3, [r7, #15] } } #endif /* USE_USBD_COMPOSITE */ /* Open EP0 OUT */ (void)USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 8007a9c: 2340 movs r3, #64 @ 0x40 8007a9e: 2200 movs r2, #0 8007aa0: 2100 movs r1, #0 8007aa2: 6878 ldr r0, [r7, #4] 8007aa4: f001 fb7b bl 800919e pdev->ep_out[0x00U & 0xFU].is_used = 1U; 8007aa8: 687b ldr r3, [r7, #4] 8007aaa: 2201 movs r2, #1 8007aac: f883 2163 strb.w r2, [r3, #355] @ 0x163 pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; 8007ab0: 687b ldr r3, [r7, #4] 8007ab2: 2240 movs r2, #64 @ 0x40 8007ab4: f8a3 2160 strh.w r2, [r3, #352] @ 0x160 /* Open EP0 IN */ (void)USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 8007ab8: 2340 movs r3, #64 @ 0x40 8007aba: 2200 movs r2, #0 8007abc: 2180 movs r1, #128 @ 0x80 8007abe: 6878 ldr r0, [r7, #4] 8007ac0: f001 fb6d bl 800919e pdev->ep_in[0x80U & 0xFU].is_used = 1U; 8007ac4: 687b ldr r3, [r7, #4] 8007ac6: 2201 movs r2, #1 8007ac8: f883 2023 strb.w r2, [r3, #35] @ 0x23 pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; 8007acc: 687b ldr r3, [r7, #4] 8007ace: 2240 movs r2, #64 @ 0x40 8007ad0: 841a strh r2, [r3, #32] return ret; 8007ad2: 7bfb ldrb r3, [r7, #15] } 8007ad4: 4618 mov r0, r3 8007ad6: 3710 adds r7, #16 8007ad8: 46bd mov sp, r7 8007ada: bd80 pop {r7, pc} 08007adc : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) { 8007adc: b480 push {r7} 8007ade: b083 sub sp, #12 8007ae0: af00 add r7, sp, #0 8007ae2: 6078 str r0, [r7, #4] 8007ae4: 460b mov r3, r1 8007ae6: 70fb strb r3, [r7, #3] pdev->dev_speed = speed; 8007ae8: 687b ldr r3, [r7, #4] 8007aea: 78fa ldrb r2, [r7, #3] 8007aec: 741a strb r2, [r3, #16] return USBD_OK; 8007aee: 2300 movs r3, #0 } 8007af0: 4618 mov r0, r3 8007af2: 370c adds r7, #12 8007af4: 46bd mov sp, r7 8007af6: f85d 7b04 ldr.w r7, [sp], #4 8007afa: 4770 bx lr 08007afc : * Handle Suspend event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) { 8007afc: b480 push {r7} 8007afe: b083 sub sp, #12 8007b00: af00 add r7, sp, #0 8007b02: 6078 str r0, [r7, #4] if (pdev->dev_state != USBD_STATE_SUSPENDED) 8007b04: 687b ldr r3, [r7, #4] 8007b06: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007b0a: b2db uxtb r3, r3 8007b0c: 2b04 cmp r3, #4 8007b0e: d006 beq.n 8007b1e { pdev->dev_old_state = pdev->dev_state; 8007b10: 687b ldr r3, [r7, #4] 8007b12: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007b16: b2da uxtb r2, r3 8007b18: 687b ldr r3, [r7, #4] 8007b1a: f883 229d strb.w r2, [r3, #669] @ 0x29d } pdev->dev_state = USBD_STATE_SUSPENDED; 8007b1e: 687b ldr r3, [r7, #4] 8007b20: 2204 movs r2, #4 8007b22: f883 229c strb.w r2, [r3, #668] @ 0x29c return USBD_OK; 8007b26: 2300 movs r3, #0 } 8007b28: 4618 mov r0, r3 8007b2a: 370c adds r7, #12 8007b2c: 46bd mov sp, r7 8007b2e: f85d 7b04 ldr.w r7, [sp], #4 8007b32: 4770 bx lr 08007b34 : * Handle Resume event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) { 8007b34: b480 push {r7} 8007b36: b083 sub sp, #12 8007b38: af00 add r7, sp, #0 8007b3a: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_SUSPENDED) 8007b3c: 687b ldr r3, [r7, #4] 8007b3e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007b42: b2db uxtb r3, r3 8007b44: 2b04 cmp r3, #4 8007b46: d106 bne.n 8007b56 { pdev->dev_state = pdev->dev_old_state; 8007b48: 687b ldr r3, [r7, #4] 8007b4a: f893 329d ldrb.w r3, [r3, #669] @ 0x29d 8007b4e: b2da uxtb r2, r3 8007b50: 687b ldr r3, [r7, #4] 8007b52: f883 229c strb.w r2, [r3, #668] @ 0x29c } return USBD_OK; 8007b56: 2300 movs r3, #0 } 8007b58: 4618 mov r0, r3 8007b5a: 370c adds r7, #12 8007b5c: 46bd mov sp, r7 8007b5e: f85d 7b04 ldr.w r7, [sp], #4 8007b62: 4770 bx lr 08007b64 : * Handle SOF event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) { 8007b64: b580 push {r7, lr} 8007b66: b082 sub sp, #8 8007b68: af00 add r7, sp, #0 8007b6a: 6078 str r0, [r7, #4] /* The SOF event can be distributed for all classes that support it */ if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007b6c: 687b ldr r3, [r7, #4] 8007b6e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007b72: b2db uxtb r3, r3 8007b74: 2b03 cmp r3, #3 8007b76: d110 bne.n 8007b9a } } } } #else if (pdev->pClass[0] != NULL) 8007b78: 687b ldr r3, [r7, #4] 8007b7a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007b7e: 2b00 cmp r3, #0 8007b80: d00b beq.n 8007b9a { if (pdev->pClass[0]->SOF != NULL) 8007b82: 687b ldr r3, [r7, #4] 8007b84: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007b88: 69db ldr r3, [r3, #28] 8007b8a: 2b00 cmp r3, #0 8007b8c: d005 beq.n 8007b9a { (void)pdev->pClass[0]->SOF(pdev); 8007b8e: 687b ldr r3, [r7, #4] 8007b90: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007b94: 69db ldr r3, [r3, #28] 8007b96: 6878 ldr r0, [r7, #4] 8007b98: 4798 blx r3 } } #endif /* USE_USBD_COMPOSITE */ } return USBD_OK; 8007b9a: 2300 movs r3, #0 } 8007b9c: 4618 mov r0, r3 8007b9e: 3708 adds r7, #8 8007ba0: 46bd mov sp, r7 8007ba2: bd80 pop {r7, pc} 08007ba4 : * @param epnum: Endpoint number * @retval status */ USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) { 8007ba4: b580 push {r7, lr} 8007ba6: b082 sub sp, #8 8007ba8: af00 add r7, sp, #0 8007baa: 6078 str r0, [r7, #4] 8007bac: 460b mov r3, r1 8007bae: 70fb strb r3, [r7, #3] if (pdev->pClass[pdev->classId] == NULL) 8007bb0: 687b ldr r3, [r7, #4] 8007bb2: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8007bb6: 687b ldr r3, [r7, #4] 8007bb8: 32ae adds r2, #174 @ 0xae 8007bba: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007bbe: 2b00 cmp r3, #0 8007bc0: d101 bne.n 8007bc6 { return USBD_FAIL; 8007bc2: 2303 movs r3, #3 8007bc4: e01c b.n 8007c00 } if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007bc6: 687b ldr r3, [r7, #4] 8007bc8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007bcc: b2db uxtb r3, r3 8007bce: 2b03 cmp r3, #3 8007bd0: d115 bne.n 8007bfe { if (pdev->pClass[pdev->classId]->IsoINIncomplete != NULL) 8007bd2: 687b ldr r3, [r7, #4] 8007bd4: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8007bd8: 687b ldr r3, [r7, #4] 8007bda: 32ae adds r2, #174 @ 0xae 8007bdc: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007be0: 6a1b ldr r3, [r3, #32] 8007be2: 2b00 cmp r3, #0 8007be4: d00b beq.n 8007bfe { (void)pdev->pClass[pdev->classId]->IsoINIncomplete(pdev, epnum); 8007be6: 687b ldr r3, [r7, #4] 8007be8: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8007bec: 687b ldr r3, [r7, #4] 8007bee: 32ae adds r2, #174 @ 0xae 8007bf0: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007bf4: 6a1b ldr r3, [r3, #32] 8007bf6: 78fa ldrb r2, [r7, #3] 8007bf8: 4611 mov r1, r2 8007bfa: 6878 ldr r0, [r7, #4] 8007bfc: 4798 blx r3 } } return USBD_OK; 8007bfe: 2300 movs r3, #0 } 8007c00: 4618 mov r0, r3 8007c02: 3708 adds r7, #8 8007c04: 46bd mov sp, r7 8007c06: bd80 pop {r7, pc} 08007c08 : * @param epnum: Endpoint number * @retval status */ USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) { 8007c08: b580 push {r7, lr} 8007c0a: b082 sub sp, #8 8007c0c: af00 add r7, sp, #0 8007c0e: 6078 str r0, [r7, #4] 8007c10: 460b mov r3, r1 8007c12: 70fb strb r3, [r7, #3] if (pdev->pClass[pdev->classId] == NULL) 8007c14: 687b ldr r3, [r7, #4] 8007c16: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8007c1a: 687b ldr r3, [r7, #4] 8007c1c: 32ae adds r2, #174 @ 0xae 8007c1e: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007c22: 2b00 cmp r3, #0 8007c24: d101 bne.n 8007c2a { return USBD_FAIL; 8007c26: 2303 movs r3, #3 8007c28: e01c b.n 8007c64 } if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007c2a: 687b ldr r3, [r7, #4] 8007c2c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007c30: b2db uxtb r3, r3 8007c32: 2b03 cmp r3, #3 8007c34: d115 bne.n 8007c62 { if (pdev->pClass[pdev->classId]->IsoOUTIncomplete != NULL) 8007c36: 687b ldr r3, [r7, #4] 8007c38: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8007c3c: 687b ldr r3, [r7, #4] 8007c3e: 32ae adds r2, #174 @ 0xae 8007c40: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007c44: 6a5b ldr r3, [r3, #36] @ 0x24 8007c46: 2b00 cmp r3, #0 8007c48: d00b beq.n 8007c62 { (void)pdev->pClass[pdev->classId]->IsoOUTIncomplete(pdev, epnum); 8007c4a: 687b ldr r3, [r7, #4] 8007c4c: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8007c50: 687b ldr r3, [r7, #4] 8007c52: 32ae adds r2, #174 @ 0xae 8007c54: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007c58: 6a5b ldr r3, [r3, #36] @ 0x24 8007c5a: 78fa ldrb r2, [r7, #3] 8007c5c: 4611 mov r1, r2 8007c5e: 6878 ldr r0, [r7, #4] 8007c60: 4798 blx r3 } } return USBD_OK; 8007c62: 2300 movs r3, #0 } 8007c64: 4618 mov r0, r3 8007c66: 3708 adds r7, #8 8007c68: 46bd mov sp, r7 8007c6a: bd80 pop {r7, pc} 08007c6c : * Handle device connection event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev) { 8007c6c: b480 push {r7} 8007c6e: b083 sub sp, #12 8007c70: af00 add r7, sp, #0 8007c72: 6078 str r0, [r7, #4] /* Prevent unused argument compilation warning */ UNUSED(pdev); return USBD_OK; 8007c74: 2300 movs r3, #0 } 8007c76: 4618 mov r0, r3 8007c78: 370c adds r7, #12 8007c7a: 46bd mov sp, r7 8007c7c: f85d 7b04 ldr.w r7, [sp], #4 8007c80: 4770 bx lr 08007c82 : * Handle device disconnection event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev) { 8007c82: b580 push {r7, lr} 8007c84: b084 sub sp, #16 8007c86: af00 add r7, sp, #0 8007c88: 6078 str r0, [r7, #4] USBD_StatusTypeDef ret = USBD_OK; 8007c8a: 2300 movs r3, #0 8007c8c: 73fb strb r3, [r7, #15] /* Free Class Resources */ pdev->dev_state = USBD_STATE_DEFAULT; 8007c8e: 687b ldr r3, [r7, #4] 8007c90: 2201 movs r2, #1 8007c92: f883 229c strb.w r2, [r3, #668] @ 0x29c } } } } #else if (pdev->pClass[0] != NULL) 8007c96: 687b ldr r3, [r7, #4] 8007c98: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007c9c: 2b00 cmp r3, #0 8007c9e: d00e beq.n 8007cbe { if (pdev->pClass[0]->DeInit(pdev, (uint8_t)pdev->dev_config) != 0U) 8007ca0: 687b ldr r3, [r7, #4] 8007ca2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007ca6: 685b ldr r3, [r3, #4] 8007ca8: 687a ldr r2, [r7, #4] 8007caa: 6852 ldr r2, [r2, #4] 8007cac: b2d2 uxtb r2, r2 8007cae: 4611 mov r1, r2 8007cb0: 6878 ldr r0, [r7, #4] 8007cb2: 4798 blx r3 8007cb4: 4603 mov r3, r0 8007cb6: 2b00 cmp r3, #0 8007cb8: d001 beq.n 8007cbe { ret = USBD_FAIL; 8007cba: 2303 movs r3, #3 8007cbc: 73fb strb r3, [r7, #15] } } #endif /* USE_USBD_COMPOSITE */ return ret; 8007cbe: 7bfb ldrb r3, [r7, #15] } 8007cc0: 4618 mov r0, r3 8007cc2: 3710 adds r7, #16 8007cc4: 46bd mov sp, r7 8007cc6: bd80 pop {r7, pc} 08007cc8 : * @param pdev: device instance * @param index : selected interface number * @retval index of the class using the selected interface number. OxFF if no class found. */ uint8_t USBD_CoreFindIF(USBD_HandleTypeDef *pdev, uint8_t index) { 8007cc8: b480 push {r7} 8007cca: b083 sub sp, #12 8007ccc: af00 add r7, sp, #0 8007cce: 6078 str r0, [r7, #4] 8007cd0: 460b mov r3, r1 8007cd2: 70fb strb r3, [r7, #3] return 0xFFU; #else UNUSED(pdev); UNUSED(index); return 0x00U; 8007cd4: 2300 movs r3, #0 #endif /* USE_USBD_COMPOSITE */ } 8007cd6: 4618 mov r0, r3 8007cd8: 370c adds r7, #12 8007cda: 46bd mov sp, r7 8007cdc: f85d 7b04 ldr.w r7, [sp], #4 8007ce0: 4770 bx lr 08007ce2 : * @param pdev: device instance * @param index : selected endpoint number * @retval index of the class using the selected endpoint number. 0xFF if no class found. */ uint8_t USBD_CoreFindEP(USBD_HandleTypeDef *pdev, uint8_t index) { 8007ce2: b480 push {r7} 8007ce4: b083 sub sp, #12 8007ce6: af00 add r7, sp, #0 8007ce8: 6078 str r0, [r7, #4] 8007cea: 460b mov r3, r1 8007cec: 70fb strb r3, [r7, #3] return 0xFFU; #else UNUSED(pdev); UNUSED(index); return 0x00U; 8007cee: 2300 movs r3, #0 #endif /* USE_USBD_COMPOSITE */ } 8007cf0: 4618 mov r0, r3 8007cf2: 370c adds r7, #12 8007cf4: 46bd mov sp, r7 8007cf6: f85d 7b04 ldr.w r7, [sp], #4 8007cfa: 4770 bx lr 08007cfc : * @param pConfDesc: pointer to Bos descriptor * @param EpAddr: endpoint address * @retval pointer to video endpoint descriptor */ void *USBD_GetEpDesc(uint8_t *pConfDesc, uint8_t EpAddr) { 8007cfc: b580 push {r7, lr} 8007cfe: b086 sub sp, #24 8007d00: af00 add r7, sp, #0 8007d02: 6078 str r0, [r7, #4] 8007d04: 460b mov r3, r1 8007d06: 70fb strb r3, [r7, #3] USBD_DescHeaderTypeDef *pdesc = (USBD_DescHeaderTypeDef *)(void *)pConfDesc; 8007d08: 687b ldr r3, [r7, #4] 8007d0a: 617b str r3, [r7, #20] USBD_ConfigDescTypeDef *desc = (USBD_ConfigDescTypeDef *)(void *)pConfDesc; 8007d0c: 687b ldr r3, [r7, #4] 8007d0e: 60fb str r3, [r7, #12] USBD_EpDescTypeDef *pEpDesc = NULL; 8007d10: 2300 movs r3, #0 8007d12: 613b str r3, [r7, #16] uint16_t ptr; if (desc->wTotalLength > desc->bLength) 8007d14: 68fb ldr r3, [r7, #12] 8007d16: 885b ldrh r3, [r3, #2] 8007d18: b29b uxth r3, r3 8007d1a: 68fa ldr r2, [r7, #12] 8007d1c: 7812 ldrb r2, [r2, #0] 8007d1e: 4293 cmp r3, r2 8007d20: d91f bls.n 8007d62 { ptr = desc->bLength; 8007d22: 68fb ldr r3, [r7, #12] 8007d24: 781b ldrb r3, [r3, #0] 8007d26: 817b strh r3, [r7, #10] while (ptr < desc->wTotalLength) 8007d28: e013 b.n 8007d52 { pdesc = USBD_GetNextDesc((uint8_t *)pdesc, &ptr); 8007d2a: f107 030a add.w r3, r7, #10 8007d2e: 4619 mov r1, r3 8007d30: 6978 ldr r0, [r7, #20] 8007d32: f000 f81b bl 8007d6c 8007d36: 6178 str r0, [r7, #20] if (pdesc->bDescriptorType == USB_DESC_TYPE_ENDPOINT) 8007d38: 697b ldr r3, [r7, #20] 8007d3a: 785b ldrb r3, [r3, #1] 8007d3c: 2b05 cmp r3, #5 8007d3e: d108 bne.n 8007d52 { pEpDesc = (USBD_EpDescTypeDef *)(void *)pdesc; 8007d40: 697b ldr r3, [r7, #20] 8007d42: 613b str r3, [r7, #16] if (pEpDesc->bEndpointAddress == EpAddr) 8007d44: 693b ldr r3, [r7, #16] 8007d46: 789b ldrb r3, [r3, #2] 8007d48: 78fa ldrb r2, [r7, #3] 8007d4a: 429a cmp r2, r3 8007d4c: d008 beq.n 8007d60 { break; } else { pEpDesc = NULL; 8007d4e: 2300 movs r3, #0 8007d50: 613b str r3, [r7, #16] while (ptr < desc->wTotalLength) 8007d52: 68fb ldr r3, [r7, #12] 8007d54: 885b ldrh r3, [r3, #2] 8007d56: b29a uxth r2, r3 8007d58: 897b ldrh r3, [r7, #10] 8007d5a: 429a cmp r2, r3 8007d5c: d8e5 bhi.n 8007d2a 8007d5e: e000 b.n 8007d62 break; 8007d60: bf00 nop } } } } return (void *)pEpDesc; 8007d62: 693b ldr r3, [r7, #16] } 8007d64: 4618 mov r0, r3 8007d66: 3718 adds r7, #24 8007d68: 46bd mov sp, r7 8007d6a: bd80 pop {r7, pc} 08007d6c : * @param buf: Buffer where the descriptor is available * @param ptr: data pointer inside the descriptor * @retval next header */ USBD_DescHeaderTypeDef *USBD_GetNextDesc(uint8_t *pbuf, uint16_t *ptr) { 8007d6c: b480 push {r7} 8007d6e: b085 sub sp, #20 8007d70: af00 add r7, sp, #0 8007d72: 6078 str r0, [r7, #4] 8007d74: 6039 str r1, [r7, #0] USBD_DescHeaderTypeDef *pnext = (USBD_DescHeaderTypeDef *)(void *)pbuf; 8007d76: 687b ldr r3, [r7, #4] 8007d78: 60fb str r3, [r7, #12] *ptr += pnext->bLength; 8007d7a: 683b ldr r3, [r7, #0] 8007d7c: 881b ldrh r3, [r3, #0] 8007d7e: 68fa ldr r2, [r7, #12] 8007d80: 7812 ldrb r2, [r2, #0] 8007d82: 4413 add r3, r2 8007d84: b29a uxth r2, r3 8007d86: 683b ldr r3, [r7, #0] 8007d88: 801a strh r2, [r3, #0] pnext = (USBD_DescHeaderTypeDef *)(void *)(pbuf + pnext->bLength); 8007d8a: 68fb ldr r3, [r7, #12] 8007d8c: 781b ldrb r3, [r3, #0] 8007d8e: 461a mov r2, r3 8007d90: 687b ldr r3, [r7, #4] 8007d92: 4413 add r3, r2 8007d94: 60fb str r3, [r7, #12] return (pnext); 8007d96: 68fb ldr r3, [r7, #12] } 8007d98: 4618 mov r0, r3 8007d9a: 3714 adds r7, #20 8007d9c: 46bd mov sp, r7 8007d9e: f85d 7b04 ldr.w r7, [sp], #4 8007da2: 4770 bx lr 08007da4 : /** @defgroup USBD_DEF_Exported_Macros * @{ */ __STATIC_INLINE uint16_t SWAPBYTE(uint8_t *addr) { 8007da4: b480 push {r7} 8007da6: b087 sub sp, #28 8007da8: af00 add r7, sp, #0 8007daa: 6078 str r0, [r7, #4] uint16_t _SwapVal; uint16_t _Byte1; uint16_t _Byte2; uint8_t *_pbuff = addr; 8007dac: 687b ldr r3, [r7, #4] 8007dae: 617b str r3, [r7, #20] _Byte1 = *(uint8_t *)_pbuff; 8007db0: 697b ldr r3, [r7, #20] 8007db2: 781b ldrb r3, [r3, #0] 8007db4: 827b strh r3, [r7, #18] _pbuff++; 8007db6: 697b ldr r3, [r7, #20] 8007db8: 3301 adds r3, #1 8007dba: 617b str r3, [r7, #20] _Byte2 = *(uint8_t *)_pbuff; 8007dbc: 697b ldr r3, [r7, #20] 8007dbe: 781b ldrb r3, [r3, #0] 8007dc0: 823b strh r3, [r7, #16] _SwapVal = (_Byte2 << 8) | _Byte1; 8007dc2: f9b7 3010 ldrsh.w r3, [r7, #16] 8007dc6: 021b lsls r3, r3, #8 8007dc8: b21a sxth r2, r3 8007dca: f9b7 3012 ldrsh.w r3, [r7, #18] 8007dce: 4313 orrs r3, r2 8007dd0: b21b sxth r3, r3 8007dd2: 81fb strh r3, [r7, #14] return _SwapVal; 8007dd4: 89fb ldrh r3, [r7, #14] } 8007dd6: 4618 mov r0, r3 8007dd8: 371c adds r7, #28 8007dda: 46bd mov sp, r7 8007ddc: f85d 7b04 ldr.w r7, [sp], #4 8007de0: 4770 bx lr ... 08007de4 : * @param pdev: device instance * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007de4: b580 push {r7, lr} 8007de6: b084 sub sp, #16 8007de8: af00 add r7, sp, #0 8007dea: 6078 str r0, [r7, #4] 8007dec: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 8007dee: 2300 movs r3, #0 8007df0: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 8007df2: 683b ldr r3, [r7, #0] 8007df4: 781b ldrb r3, [r3, #0] 8007df6: f003 0360 and.w r3, r3, #96 @ 0x60 8007dfa: 2b40 cmp r3, #64 @ 0x40 8007dfc: d005 beq.n 8007e0a 8007dfe: 2b40 cmp r3, #64 @ 0x40 8007e00: d857 bhi.n 8007eb2 8007e02: 2b00 cmp r3, #0 8007e04: d00f beq.n 8007e26 8007e06: 2b20 cmp r3, #32 8007e08: d153 bne.n 8007eb2 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: ret = (USBD_StatusTypeDef)pdev->pClass[pdev->classId]->Setup(pdev, req); 8007e0a: 687b ldr r3, [r7, #4] 8007e0c: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8007e10: 687b ldr r3, [r7, #4] 8007e12: 32ae adds r2, #174 @ 0xae 8007e14: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007e18: 689b ldr r3, [r3, #8] 8007e1a: 6839 ldr r1, [r7, #0] 8007e1c: 6878 ldr r0, [r7, #4] 8007e1e: 4798 blx r3 8007e20: 4603 mov r3, r0 8007e22: 73fb strb r3, [r7, #15] break; 8007e24: e04a b.n 8007ebc case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 8007e26: 683b ldr r3, [r7, #0] 8007e28: 785b ldrb r3, [r3, #1] 8007e2a: 2b09 cmp r3, #9 8007e2c: d83b bhi.n 8007ea6 8007e2e: a201 add r2, pc, #4 @ (adr r2, 8007e34 ) 8007e30: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8007e34: 08007e89 .word 0x08007e89 8007e38: 08007e9d .word 0x08007e9d 8007e3c: 08007ea7 .word 0x08007ea7 8007e40: 08007e93 .word 0x08007e93 8007e44: 08007ea7 .word 0x08007ea7 8007e48: 08007e67 .word 0x08007e67 8007e4c: 08007e5d .word 0x08007e5d 8007e50: 08007ea7 .word 0x08007ea7 8007e54: 08007e7f .word 0x08007e7f 8007e58: 08007e71 .word 0x08007e71 { case USB_REQ_GET_DESCRIPTOR: USBD_GetDescriptor(pdev, req); 8007e5c: 6839 ldr r1, [r7, #0] 8007e5e: 6878 ldr r0, [r7, #4] 8007e60: f000 fa3e bl 80082e0 break; 8007e64: e024 b.n 8007eb0 case USB_REQ_SET_ADDRESS: USBD_SetAddress(pdev, req); 8007e66: 6839 ldr r1, [r7, #0] 8007e68: 6878 ldr r0, [r7, #4] 8007e6a: f000 fbcd bl 8008608 break; 8007e6e: e01f b.n 8007eb0 case USB_REQ_SET_CONFIGURATION: ret = USBD_SetConfig(pdev, req); 8007e70: 6839 ldr r1, [r7, #0] 8007e72: 6878 ldr r0, [r7, #4] 8007e74: f000 fc0c bl 8008690 8007e78: 4603 mov r3, r0 8007e7a: 73fb strb r3, [r7, #15] break; 8007e7c: e018 b.n 8007eb0 case USB_REQ_GET_CONFIGURATION: USBD_GetConfig(pdev, req); 8007e7e: 6839 ldr r1, [r7, #0] 8007e80: 6878 ldr r0, [r7, #4] 8007e82: f000 fcaf bl 80087e4 break; 8007e86: e013 b.n 8007eb0 case USB_REQ_GET_STATUS: USBD_GetStatus(pdev, req); 8007e88: 6839 ldr r1, [r7, #0] 8007e8a: 6878 ldr r0, [r7, #4] 8007e8c: f000 fce0 bl 8008850 break; 8007e90: e00e b.n 8007eb0 case USB_REQ_SET_FEATURE: USBD_SetFeature(pdev, req); 8007e92: 6839 ldr r1, [r7, #0] 8007e94: 6878 ldr r0, [r7, #4] 8007e96: f000 fd0f bl 80088b8 break; 8007e9a: e009 b.n 8007eb0 case USB_REQ_CLEAR_FEATURE: USBD_ClrFeature(pdev, req); 8007e9c: 6839 ldr r1, [r7, #0] 8007e9e: 6878 ldr r0, [r7, #4] 8007ea0: f000 fd33 bl 800890a break; 8007ea4: e004 b.n 8007eb0 default: USBD_CtlError(pdev, req); 8007ea6: 6839 ldr r1, [r7, #0] 8007ea8: 6878 ldr r0, [r7, #4] 8007eaa: f000 fd8a bl 80089c2 break; 8007eae: bf00 nop } break; 8007eb0: e004 b.n 8007ebc default: USBD_CtlError(pdev, req); 8007eb2: 6839 ldr r1, [r7, #0] 8007eb4: 6878 ldr r0, [r7, #4] 8007eb6: f000 fd84 bl 80089c2 break; 8007eba: bf00 nop } return ret; 8007ebc: 7bfb ldrb r3, [r7, #15] } 8007ebe: 4618 mov r0, r3 8007ec0: 3710 adds r7, #16 8007ec2: 46bd mov sp, r7 8007ec4: bd80 pop {r7, pc} 8007ec6: bf00 nop 08007ec8 : * @param pdev: device instance * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007ec8: b580 push {r7, lr} 8007eca: b084 sub sp, #16 8007ecc: af00 add r7, sp, #0 8007ece: 6078 str r0, [r7, #4] 8007ed0: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 8007ed2: 2300 movs r3, #0 8007ed4: 73fb strb r3, [r7, #15] uint8_t idx; switch (req->bmRequest & USB_REQ_TYPE_MASK) 8007ed6: 683b ldr r3, [r7, #0] 8007ed8: 781b ldrb r3, [r3, #0] 8007eda: f003 0360 and.w r3, r3, #96 @ 0x60 8007ede: 2b40 cmp r3, #64 @ 0x40 8007ee0: d005 beq.n 8007eee 8007ee2: 2b40 cmp r3, #64 @ 0x40 8007ee4: d852 bhi.n 8007f8c 8007ee6: 2b00 cmp r3, #0 8007ee8: d001 beq.n 8007eee 8007eea: 2b20 cmp r3, #32 8007eec: d14e bne.n 8007f8c { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: case USB_REQ_TYPE_STANDARD: switch (pdev->dev_state) 8007eee: 687b ldr r3, [r7, #4] 8007ef0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007ef4: b2db uxtb r3, r3 8007ef6: 3b01 subs r3, #1 8007ef8: 2b02 cmp r3, #2 8007efa: d840 bhi.n 8007f7e { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) 8007efc: 683b ldr r3, [r7, #0] 8007efe: 889b ldrh r3, [r3, #4] 8007f00: b2db uxtb r3, r3 8007f02: 2b01 cmp r3, #1 8007f04: d836 bhi.n 8007f74 { /* Get the class index relative to this interface */ idx = USBD_CoreFindIF(pdev, LOBYTE(req->wIndex)); 8007f06: 683b ldr r3, [r7, #0] 8007f08: 889b ldrh r3, [r3, #4] 8007f0a: b2db uxtb r3, r3 8007f0c: 4619 mov r1, r3 8007f0e: 6878 ldr r0, [r7, #4] 8007f10: f7ff feda bl 8007cc8 8007f14: 4603 mov r3, r0 8007f16: 73bb strb r3, [r7, #14] if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS)) 8007f18: 7bbb ldrb r3, [r7, #14] 8007f1a: 2bff cmp r3, #255 @ 0xff 8007f1c: d01d beq.n 8007f5a 8007f1e: 7bbb ldrb r3, [r7, #14] 8007f20: 2b00 cmp r3, #0 8007f22: d11a bne.n 8007f5a { /* Call the class data out function to manage the request */ if (pdev->pClass[idx]->Setup != NULL) 8007f24: 7bba ldrb r2, [r7, #14] 8007f26: 687b ldr r3, [r7, #4] 8007f28: 32ae adds r2, #174 @ 0xae 8007f2a: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007f2e: 689b ldr r3, [r3, #8] 8007f30: 2b00 cmp r3, #0 8007f32: d00f beq.n 8007f54 { pdev->classId = idx; 8007f34: 7bba ldrb r2, [r7, #14] 8007f36: 687b ldr r3, [r7, #4] 8007f38: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 ret = (USBD_StatusTypeDef)(pdev->pClass[idx]->Setup(pdev, req)); 8007f3c: 7bba ldrb r2, [r7, #14] 8007f3e: 687b ldr r3, [r7, #4] 8007f40: 32ae adds r2, #174 @ 0xae 8007f42: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007f46: 689b ldr r3, [r3, #8] 8007f48: 6839 ldr r1, [r7, #0] 8007f4a: 6878 ldr r0, [r7, #4] 8007f4c: 4798 blx r3 8007f4e: 4603 mov r3, r0 8007f50: 73fb strb r3, [r7, #15] if (pdev->pClass[idx]->Setup != NULL) 8007f52: e004 b.n 8007f5e } else { /* should never reach this condition */ ret = USBD_FAIL; 8007f54: 2303 movs r3, #3 8007f56: 73fb strb r3, [r7, #15] if (pdev->pClass[idx]->Setup != NULL) 8007f58: e001 b.n 8007f5e } } else { /* No relative interface found */ ret = USBD_FAIL; 8007f5a: 2303 movs r3, #3 8007f5c: 73fb strb r3, [r7, #15] } if ((req->wLength == 0U) && (ret == USBD_OK)) 8007f5e: 683b ldr r3, [r7, #0] 8007f60: 88db ldrh r3, [r3, #6] 8007f62: 2b00 cmp r3, #0 8007f64: d110 bne.n 8007f88 8007f66: 7bfb ldrb r3, [r7, #15] 8007f68: 2b00 cmp r3, #0 8007f6a: d10d bne.n 8007f88 { (void)USBD_CtlSendStatus(pdev); 8007f6c: 6878 ldr r0, [r7, #4] 8007f6e: f000 fde5 bl 8008b3c } else { USBD_CtlError(pdev, req); } break; 8007f72: e009 b.n 8007f88 USBD_CtlError(pdev, req); 8007f74: 6839 ldr r1, [r7, #0] 8007f76: 6878 ldr r0, [r7, #4] 8007f78: f000 fd23 bl 80089c2 break; 8007f7c: e004 b.n 8007f88 default: USBD_CtlError(pdev, req); 8007f7e: 6839 ldr r1, [r7, #0] 8007f80: 6878 ldr r0, [r7, #4] 8007f82: f000 fd1e bl 80089c2 break; 8007f86: e000 b.n 8007f8a break; 8007f88: bf00 nop } break; 8007f8a: e004 b.n 8007f96 default: USBD_CtlError(pdev, req); 8007f8c: 6839 ldr r1, [r7, #0] 8007f8e: 6878 ldr r0, [r7, #4] 8007f90: f000 fd17 bl 80089c2 break; 8007f94: bf00 nop } return ret; 8007f96: 7bfb ldrb r3, [r7, #15] } 8007f98: 4618 mov r0, r3 8007f9a: 3710 adds r7, #16 8007f9c: 46bd mov sp, r7 8007f9e: bd80 pop {r7, pc} 08007fa0 : * @param pdev: device instance * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007fa0: b580 push {r7, lr} 8007fa2: b084 sub sp, #16 8007fa4: af00 add r7, sp, #0 8007fa6: 6078 str r0, [r7, #4] 8007fa8: 6039 str r1, [r7, #0] USBD_EndpointTypeDef *pep; uint8_t ep_addr; uint8_t idx; USBD_StatusTypeDef ret = USBD_OK; 8007faa: 2300 movs r3, #0 8007fac: 73fb strb r3, [r7, #15] ep_addr = LOBYTE(req->wIndex); 8007fae: 683b ldr r3, [r7, #0] 8007fb0: 889b ldrh r3, [r3, #4] 8007fb2: 73bb strb r3, [r7, #14] switch (req->bmRequest & USB_REQ_TYPE_MASK) 8007fb4: 683b ldr r3, [r7, #0] 8007fb6: 781b ldrb r3, [r3, #0] 8007fb8: f003 0360 and.w r3, r3, #96 @ 0x60 8007fbc: 2b40 cmp r3, #64 @ 0x40 8007fbe: d007 beq.n 8007fd0 8007fc0: 2b40 cmp r3, #64 @ 0x40 8007fc2: f200 8181 bhi.w 80082c8 8007fc6: 2b00 cmp r3, #0 8007fc8: d02a beq.n 8008020 8007fca: 2b20 cmp r3, #32 8007fcc: f040 817c bne.w 80082c8 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: /* Get the class index relative to this endpoint */ idx = USBD_CoreFindEP(pdev, ep_addr); 8007fd0: 7bbb ldrb r3, [r7, #14] 8007fd2: 4619 mov r1, r3 8007fd4: 6878 ldr r0, [r7, #4] 8007fd6: f7ff fe84 bl 8007ce2 8007fda: 4603 mov r3, r0 8007fdc: 737b strb r3, [r7, #13] if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS)) 8007fde: 7b7b ldrb r3, [r7, #13] 8007fe0: 2bff cmp r3, #255 @ 0xff 8007fe2: f000 8176 beq.w 80082d2 8007fe6: 7b7b ldrb r3, [r7, #13] 8007fe8: 2b00 cmp r3, #0 8007fea: f040 8172 bne.w 80082d2 { pdev->classId = idx; 8007fee: 7b7a ldrb r2, [r7, #13] 8007ff0: 687b ldr r3, [r7, #4] 8007ff2: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 /* Call the class data out function to manage the request */ if (pdev->pClass[idx]->Setup != NULL) 8007ff6: 7b7a ldrb r2, [r7, #13] 8007ff8: 687b ldr r3, [r7, #4] 8007ffa: 32ae adds r2, #174 @ 0xae 8007ffc: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8008000: 689b ldr r3, [r3, #8] 8008002: 2b00 cmp r3, #0 8008004: f000 8165 beq.w 80082d2 { ret = (USBD_StatusTypeDef)pdev->pClass[idx]->Setup(pdev, req); 8008008: 7b7a ldrb r2, [r7, #13] 800800a: 687b ldr r3, [r7, #4] 800800c: 32ae adds r2, #174 @ 0xae 800800e: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8008012: 689b ldr r3, [r3, #8] 8008014: 6839 ldr r1, [r7, #0] 8008016: 6878 ldr r0, [r7, #4] 8008018: 4798 blx r3 800801a: 4603 mov r3, r0 800801c: 73fb strb r3, [r7, #15] } } break; 800801e: e158 b.n 80082d2 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 8008020: 683b ldr r3, [r7, #0] 8008022: 785b ldrb r3, [r3, #1] 8008024: 2b03 cmp r3, #3 8008026: d008 beq.n 800803a 8008028: 2b03 cmp r3, #3 800802a: f300 8147 bgt.w 80082bc 800802e: 2b00 cmp r3, #0 8008030: f000 809b beq.w 800816a 8008034: 2b01 cmp r3, #1 8008036: d03c beq.n 80080b2 8008038: e140 b.n 80082bc { case USB_REQ_SET_FEATURE: switch (pdev->dev_state) 800803a: 687b ldr r3, [r7, #4] 800803c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8008040: b2db uxtb r3, r3 8008042: 2b02 cmp r3, #2 8008044: d002 beq.n 800804c 8008046: 2b03 cmp r3, #3 8008048: d016 beq.n 8008078 800804a: e02c b.n 80080a6 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800804c: 7bbb ldrb r3, [r7, #14] 800804e: 2b00 cmp r3, #0 8008050: d00d beq.n 800806e 8008052: 7bbb ldrb r3, [r7, #14] 8008054: 2b80 cmp r3, #128 @ 0x80 8008056: d00a beq.n 800806e { (void)USBD_LL_StallEP(pdev, ep_addr); 8008058: 7bbb ldrb r3, [r7, #14] 800805a: 4619 mov r1, r3 800805c: 6878 ldr r0, [r7, #4] 800805e: f001 f8e3 bl 8009228 (void)USBD_LL_StallEP(pdev, 0x80U); 8008062: 2180 movs r1, #128 @ 0x80 8008064: 6878 ldr r0, [r7, #4] 8008066: f001 f8df bl 8009228 800806a: bf00 nop } else { USBD_CtlError(pdev, req); } break; 800806c: e020 b.n 80080b0 USBD_CtlError(pdev, req); 800806e: 6839 ldr r1, [r7, #0] 8008070: 6878 ldr r0, [r7, #4] 8008072: f000 fca6 bl 80089c2 break; 8008076: e01b b.n 80080b0 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 8008078: 683b ldr r3, [r7, #0] 800807a: 885b ldrh r3, [r3, #2] 800807c: 2b00 cmp r3, #0 800807e: d10e bne.n 800809e { if ((ep_addr != 0x00U) && (ep_addr != 0x80U) && (req->wLength == 0x00U)) 8008080: 7bbb ldrb r3, [r7, #14] 8008082: 2b00 cmp r3, #0 8008084: d00b beq.n 800809e 8008086: 7bbb ldrb r3, [r7, #14] 8008088: 2b80 cmp r3, #128 @ 0x80 800808a: d008 beq.n 800809e 800808c: 683b ldr r3, [r7, #0] 800808e: 88db ldrh r3, [r3, #6] 8008090: 2b00 cmp r3, #0 8008092: d104 bne.n 800809e { (void)USBD_LL_StallEP(pdev, ep_addr); 8008094: 7bbb ldrb r3, [r7, #14] 8008096: 4619 mov r1, r3 8008098: 6878 ldr r0, [r7, #4] 800809a: f001 f8c5 bl 8009228 } } (void)USBD_CtlSendStatus(pdev); 800809e: 6878 ldr r0, [r7, #4] 80080a0: f000 fd4c bl 8008b3c break; 80080a4: e004 b.n 80080b0 default: USBD_CtlError(pdev, req); 80080a6: 6839 ldr r1, [r7, #0] 80080a8: 6878 ldr r0, [r7, #4] 80080aa: f000 fc8a bl 80089c2 break; 80080ae: bf00 nop } break; 80080b0: e109 b.n 80082c6 case USB_REQ_CLEAR_FEATURE: switch (pdev->dev_state) 80080b2: 687b ldr r3, [r7, #4] 80080b4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80080b8: b2db uxtb r3, r3 80080ba: 2b02 cmp r3, #2 80080bc: d002 beq.n 80080c4 80080be: 2b03 cmp r3, #3 80080c0: d016 beq.n 80080f0 80080c2: e04b b.n 800815c { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 80080c4: 7bbb ldrb r3, [r7, #14] 80080c6: 2b00 cmp r3, #0 80080c8: d00d beq.n 80080e6 80080ca: 7bbb ldrb r3, [r7, #14] 80080cc: 2b80 cmp r3, #128 @ 0x80 80080ce: d00a beq.n 80080e6 { (void)USBD_LL_StallEP(pdev, ep_addr); 80080d0: 7bbb ldrb r3, [r7, #14] 80080d2: 4619 mov r1, r3 80080d4: 6878 ldr r0, [r7, #4] 80080d6: f001 f8a7 bl 8009228 (void)USBD_LL_StallEP(pdev, 0x80U); 80080da: 2180 movs r1, #128 @ 0x80 80080dc: 6878 ldr r0, [r7, #4] 80080de: f001 f8a3 bl 8009228 80080e2: bf00 nop } else { USBD_CtlError(pdev, req); } break; 80080e4: e040 b.n 8008168 USBD_CtlError(pdev, req); 80080e6: 6839 ldr r1, [r7, #0] 80080e8: 6878 ldr r0, [r7, #4] 80080ea: f000 fc6a bl 80089c2 break; 80080ee: e03b b.n 8008168 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 80080f0: 683b ldr r3, [r7, #0] 80080f2: 885b ldrh r3, [r3, #2] 80080f4: 2b00 cmp r3, #0 80080f6: d136 bne.n 8008166 { if ((ep_addr & 0x7FU) != 0x00U) 80080f8: 7bbb ldrb r3, [r7, #14] 80080fa: f003 037f and.w r3, r3, #127 @ 0x7f 80080fe: 2b00 cmp r3, #0 8008100: d004 beq.n 800810c { (void)USBD_LL_ClearStallEP(pdev, ep_addr); 8008102: 7bbb ldrb r3, [r7, #14] 8008104: 4619 mov r1, r3 8008106: 6878 ldr r0, [r7, #4] 8008108: f001 f8ad bl 8009266 } (void)USBD_CtlSendStatus(pdev); 800810c: 6878 ldr r0, [r7, #4] 800810e: f000 fd15 bl 8008b3c /* Get the class index relative to this interface */ idx = USBD_CoreFindEP(pdev, ep_addr); 8008112: 7bbb ldrb r3, [r7, #14] 8008114: 4619 mov r1, r3 8008116: 6878 ldr r0, [r7, #4] 8008118: f7ff fde3 bl 8007ce2 800811c: 4603 mov r3, r0 800811e: 737b strb r3, [r7, #13] if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS)) 8008120: 7b7b ldrb r3, [r7, #13] 8008122: 2bff cmp r3, #255 @ 0xff 8008124: d01f beq.n 8008166 8008126: 7b7b ldrb r3, [r7, #13] 8008128: 2b00 cmp r3, #0 800812a: d11c bne.n 8008166 { pdev->classId = idx; 800812c: 7b7a ldrb r2, [r7, #13] 800812e: 687b ldr r3, [r7, #4] 8008130: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 /* Call the class data out function to manage the request */ if (pdev->pClass[idx]->Setup != NULL) 8008134: 7b7a ldrb r2, [r7, #13] 8008136: 687b ldr r3, [r7, #4] 8008138: 32ae adds r2, #174 @ 0xae 800813a: f853 3022 ldr.w r3, [r3, r2, lsl #2] 800813e: 689b ldr r3, [r3, #8] 8008140: 2b00 cmp r3, #0 8008142: d010 beq.n 8008166 { ret = (USBD_StatusTypeDef)(pdev->pClass[idx]->Setup(pdev, req)); 8008144: 7b7a ldrb r2, [r7, #13] 8008146: 687b ldr r3, [r7, #4] 8008148: 32ae adds r2, #174 @ 0xae 800814a: f853 3022 ldr.w r3, [r3, r2, lsl #2] 800814e: 689b ldr r3, [r3, #8] 8008150: 6839 ldr r1, [r7, #0] 8008152: 6878 ldr r0, [r7, #4] 8008154: 4798 blx r3 8008156: 4603 mov r3, r0 8008158: 73fb strb r3, [r7, #15] } } } break; 800815a: e004 b.n 8008166 default: USBD_CtlError(pdev, req); 800815c: 6839 ldr r1, [r7, #0] 800815e: 6878 ldr r0, [r7, #4] 8008160: f000 fc2f bl 80089c2 break; 8008164: e000 b.n 8008168 break; 8008166: bf00 nop } break; 8008168: e0ad b.n 80082c6 case USB_REQ_GET_STATUS: switch (pdev->dev_state) 800816a: 687b ldr r3, [r7, #4] 800816c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8008170: b2db uxtb r3, r3 8008172: 2b02 cmp r3, #2 8008174: d002 beq.n 800817c 8008176: 2b03 cmp r3, #3 8008178: d033 beq.n 80081e2 800817a: e099 b.n 80082b0 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800817c: 7bbb ldrb r3, [r7, #14] 800817e: 2b00 cmp r3, #0 8008180: d007 beq.n 8008192 8008182: 7bbb ldrb r3, [r7, #14] 8008184: 2b80 cmp r3, #128 @ 0x80 8008186: d004 beq.n 8008192 { USBD_CtlError(pdev, req); 8008188: 6839 ldr r1, [r7, #0] 800818a: 6878 ldr r0, [r7, #4] 800818c: f000 fc19 bl 80089c2 break; 8008190: e093 b.n 80082ba } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 8008192: f997 300e ldrsb.w r3, [r7, #14] 8008196: 2b00 cmp r3, #0 8008198: da0b bge.n 80081b2 800819a: 7bbb ldrb r3, [r7, #14] 800819c: f003 027f and.w r2, r3, #127 @ 0x7f 80081a0: 4613 mov r3, r2 80081a2: 009b lsls r3, r3, #2 80081a4: 4413 add r3, r2 80081a6: 009b lsls r3, r3, #2 80081a8: 3310 adds r3, #16 80081aa: 687a ldr r2, [r7, #4] 80081ac: 4413 add r3, r2 80081ae: 3304 adds r3, #4 80081b0: e00b b.n 80081ca &pdev->ep_out[ep_addr & 0x7FU]; 80081b2: 7bbb ldrb r3, [r7, #14] 80081b4: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 80081b8: 4613 mov r3, r2 80081ba: 009b lsls r3, r3, #2 80081bc: 4413 add r3, r2 80081be: 009b lsls r3, r3, #2 80081c0: f503 73a8 add.w r3, r3, #336 @ 0x150 80081c4: 687a ldr r2, [r7, #4] 80081c6: 4413 add r3, r2 80081c8: 3304 adds r3, #4 80081ca: 60bb str r3, [r7, #8] pep->status = 0x0000U; 80081cc: 68bb ldr r3, [r7, #8] 80081ce: 2200 movs r2, #0 80081d0: 739a strb r2, [r3, #14] (void)USBD_CtlSendData(pdev, (uint8_t *)&pep->status, 2U); 80081d2: 68bb ldr r3, [r7, #8] 80081d4: 330e adds r3, #14 80081d6: 2202 movs r2, #2 80081d8: 4619 mov r1, r3 80081da: 6878 ldr r0, [r7, #4] 80081dc: f000 fc6e bl 8008abc break; 80081e0: e06b b.n 80082ba case USBD_STATE_CONFIGURED: if ((ep_addr & 0x80U) == 0x80U) 80081e2: f997 300e ldrsb.w r3, [r7, #14] 80081e6: 2b00 cmp r3, #0 80081e8: da11 bge.n 800820e { if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U) 80081ea: 7bbb ldrb r3, [r7, #14] 80081ec: f003 020f and.w r2, r3, #15 80081f0: 6879 ldr r1, [r7, #4] 80081f2: 4613 mov r3, r2 80081f4: 009b lsls r3, r3, #2 80081f6: 4413 add r3, r2 80081f8: 009b lsls r3, r3, #2 80081fa: 440b add r3, r1 80081fc: 3323 adds r3, #35 @ 0x23 80081fe: 781b ldrb r3, [r3, #0] 8008200: 2b00 cmp r3, #0 8008202: d117 bne.n 8008234 { USBD_CtlError(pdev, req); 8008204: 6839 ldr r1, [r7, #0] 8008206: 6878 ldr r0, [r7, #4] 8008208: f000 fbdb bl 80089c2 break; 800820c: e055 b.n 80082ba } } else { if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U) 800820e: 7bbb ldrb r3, [r7, #14] 8008210: f003 020f and.w r2, r3, #15 8008214: 6879 ldr r1, [r7, #4] 8008216: 4613 mov r3, r2 8008218: 009b lsls r3, r3, #2 800821a: 4413 add r3, r2 800821c: 009b lsls r3, r3, #2 800821e: 440b add r3, r1 8008220: f203 1363 addw r3, r3, #355 @ 0x163 8008224: 781b ldrb r3, [r3, #0] 8008226: 2b00 cmp r3, #0 8008228: d104 bne.n 8008234 { USBD_CtlError(pdev, req); 800822a: 6839 ldr r1, [r7, #0] 800822c: 6878 ldr r0, [r7, #4] 800822e: f000 fbc8 bl 80089c2 break; 8008232: e042 b.n 80082ba } } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 8008234: f997 300e ldrsb.w r3, [r7, #14] 8008238: 2b00 cmp r3, #0 800823a: da0b bge.n 8008254 800823c: 7bbb ldrb r3, [r7, #14] 800823e: f003 027f and.w r2, r3, #127 @ 0x7f 8008242: 4613 mov r3, r2 8008244: 009b lsls r3, r3, #2 8008246: 4413 add r3, r2 8008248: 009b lsls r3, r3, #2 800824a: 3310 adds r3, #16 800824c: 687a ldr r2, [r7, #4] 800824e: 4413 add r3, r2 8008250: 3304 adds r3, #4 8008252: e00b b.n 800826c &pdev->ep_out[ep_addr & 0x7FU]; 8008254: 7bbb ldrb r3, [r7, #14] 8008256: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800825a: 4613 mov r3, r2 800825c: 009b lsls r3, r3, #2 800825e: 4413 add r3, r2 8008260: 009b lsls r3, r3, #2 8008262: f503 73a8 add.w r3, r3, #336 @ 0x150 8008266: 687a ldr r2, [r7, #4] 8008268: 4413 add r3, r2 800826a: 3304 adds r3, #4 800826c: 60bb str r3, [r7, #8] if ((ep_addr == 0x00U) || (ep_addr == 0x80U)) 800826e: 7bbb ldrb r3, [r7, #14] 8008270: 2b00 cmp r3, #0 8008272: d002 beq.n 800827a 8008274: 7bbb ldrb r3, [r7, #14] 8008276: 2b80 cmp r3, #128 @ 0x80 8008278: d103 bne.n 8008282 { pep->status = 0x0000U; 800827a: 68bb ldr r3, [r7, #8] 800827c: 2200 movs r2, #0 800827e: 739a strb r2, [r3, #14] 8008280: e00e b.n 80082a0 } else if (USBD_LL_IsStallEP(pdev, ep_addr) != 0U) 8008282: 7bbb ldrb r3, [r7, #14] 8008284: 4619 mov r1, r3 8008286: 6878 ldr r0, [r7, #4] 8008288: f001 f80c bl 80092a4 800828c: 4603 mov r3, r0 800828e: 2b00 cmp r3, #0 8008290: d003 beq.n 800829a { pep->status = 0x0001U; 8008292: 68bb ldr r3, [r7, #8] 8008294: 2201 movs r2, #1 8008296: 739a strb r2, [r3, #14] 8008298: e002 b.n 80082a0 } else { pep->status = 0x0000U; 800829a: 68bb ldr r3, [r7, #8] 800829c: 2200 movs r2, #0 800829e: 739a strb r2, [r3, #14] } (void)USBD_CtlSendData(pdev, (uint8_t *)&pep->status, 2U); 80082a0: 68bb ldr r3, [r7, #8] 80082a2: 330e adds r3, #14 80082a4: 2202 movs r2, #2 80082a6: 4619 mov r1, r3 80082a8: 6878 ldr r0, [r7, #4] 80082aa: f000 fc07 bl 8008abc break; 80082ae: e004 b.n 80082ba default: USBD_CtlError(pdev, req); 80082b0: 6839 ldr r1, [r7, #0] 80082b2: 6878 ldr r0, [r7, #4] 80082b4: f000 fb85 bl 80089c2 break; 80082b8: bf00 nop } break; 80082ba: e004 b.n 80082c6 default: USBD_CtlError(pdev, req); 80082bc: 6839 ldr r1, [r7, #0] 80082be: 6878 ldr r0, [r7, #4] 80082c0: f000 fb7f bl 80089c2 break; 80082c4: bf00 nop } break; 80082c6: e005 b.n 80082d4 default: USBD_CtlError(pdev, req); 80082c8: 6839 ldr r1, [r7, #0] 80082ca: 6878 ldr r0, [r7, #4] 80082cc: f000 fb79 bl 80089c2 break; 80082d0: e000 b.n 80082d4 break; 80082d2: bf00 nop } return ret; 80082d4: 7bfb ldrb r3, [r7, #15] } 80082d6: 4618 mov r0, r3 80082d8: 3710 adds r7, #16 80082da: 46bd mov sp, r7 80082dc: bd80 pop {r7, pc} ... 080082e0 : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 80082e0: b580 push {r7, lr} 80082e2: b084 sub sp, #16 80082e4: af00 add r7, sp, #0 80082e6: 6078 str r0, [r7, #4] 80082e8: 6039 str r1, [r7, #0] uint16_t len = 0U; 80082ea: 2300 movs r3, #0 80082ec: 813b strh r3, [r7, #8] uint8_t *pbuf = NULL; 80082ee: 2300 movs r3, #0 80082f0: 60fb str r3, [r7, #12] uint8_t err = 0U; 80082f2: 2300 movs r3, #0 80082f4: 72fb strb r3, [r7, #11] switch (req->wValue >> 8) 80082f6: 683b ldr r3, [r7, #0] 80082f8: 885b ldrh r3, [r3, #2] 80082fa: 0a1b lsrs r3, r3, #8 80082fc: b29b uxth r3, r3 80082fe: 3b01 subs r3, #1 8008300: 2b0e cmp r3, #14 8008302: f200 8152 bhi.w 80085aa 8008306: a201 add r2, pc, #4 @ (adr r2, 800830c ) 8008308: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800830c: 0800837d .word 0x0800837d 8008310: 08008395 .word 0x08008395 8008314: 080083d5 .word 0x080083d5 8008318: 080085ab .word 0x080085ab 800831c: 080085ab .word 0x080085ab 8008320: 0800854b .word 0x0800854b 8008324: 08008577 .word 0x08008577 8008328: 080085ab .word 0x080085ab 800832c: 080085ab .word 0x080085ab 8008330: 080085ab .word 0x080085ab 8008334: 080085ab .word 0x080085ab 8008338: 080085ab .word 0x080085ab 800833c: 080085ab .word 0x080085ab 8008340: 080085ab .word 0x080085ab 8008344: 08008349 .word 0x08008349 { #if ((USBD_LPM_ENABLED == 1U) || (USBD_CLASS_BOS_ENABLED == 1U)) case USB_DESC_TYPE_BOS: if (pdev->pDesc->GetBOSDescriptor != NULL) 8008348: 687b ldr r3, [r7, #4] 800834a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800834e: 69db ldr r3, [r3, #28] 8008350: 2b00 cmp r3, #0 8008352: d00b beq.n 800836c { pbuf = pdev->pDesc->GetBOSDescriptor(pdev->dev_speed, &len); 8008354: 687b ldr r3, [r7, #4] 8008356: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800835a: 69db ldr r3, [r3, #28] 800835c: 687a ldr r2, [r7, #4] 800835e: 7c12 ldrb r2, [r2, #16] 8008360: f107 0108 add.w r1, r7, #8 8008364: 4610 mov r0, r2 8008366: 4798 blx r3 8008368: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800836a: e126 b.n 80085ba USBD_CtlError(pdev, req); 800836c: 6839 ldr r1, [r7, #0] 800836e: 6878 ldr r0, [r7, #4] 8008370: f000 fb27 bl 80089c2 err++; 8008374: 7afb ldrb r3, [r7, #11] 8008376: 3301 adds r3, #1 8008378: 72fb strb r3, [r7, #11] break; 800837a: e11e b.n 80085ba #endif /* (USBD_LPM_ENABLED == 1U) || (USBD_CLASS_BOS_ENABLED == 1U) */ case USB_DESC_TYPE_DEVICE: pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); 800837c: 687b ldr r3, [r7, #4] 800837e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8008382: 681b ldr r3, [r3, #0] 8008384: 687a ldr r2, [r7, #4] 8008386: 7c12 ldrb r2, [r2, #16] 8008388: f107 0108 add.w r1, r7, #8 800838c: 4610 mov r0, r2 800838e: 4798 blx r3 8008390: 60f8 str r0, [r7, #12] break; 8008392: e112 b.n 80085ba case USB_DESC_TYPE_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 8008394: 687b ldr r3, [r7, #4] 8008396: 7c1b ldrb r3, [r3, #16] 8008398: 2b00 cmp r3, #0 800839a: d10d bne.n 80083b8 pbuf = (uint8_t *)USBD_CMPSIT.GetHSConfigDescriptor(&len); } else #endif /* USE_USBD_COMPOSITE */ { pbuf = (uint8_t *)pdev->pClass[0]->GetHSConfigDescriptor(&len); 800839c: 687b ldr r3, [r7, #4] 800839e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80083a2: 6a9b ldr r3, [r3, #40] @ 0x28 80083a4: f107 0208 add.w r2, r7, #8 80083a8: 4610 mov r0, r2 80083aa: 4798 blx r3 80083ac: 60f8 str r0, [r7, #12] } pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 80083ae: 68fb ldr r3, [r7, #12] 80083b0: 3301 adds r3, #1 80083b2: 2202 movs r2, #2 80083b4: 701a strb r2, [r3, #0] { pbuf = (uint8_t *)pdev->pClass[0]->GetFSConfigDescriptor(&len); } pbuf[1] = USB_DESC_TYPE_CONFIGURATION; } break; 80083b6: e100 b.n 80085ba pbuf = (uint8_t *)pdev->pClass[0]->GetFSConfigDescriptor(&len); 80083b8: 687b ldr r3, [r7, #4] 80083ba: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 80083be: 6adb ldr r3, [r3, #44] @ 0x2c 80083c0: f107 0208 add.w r2, r7, #8 80083c4: 4610 mov r0, r2 80083c6: 4798 blx r3 80083c8: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 80083ca: 68fb ldr r3, [r7, #12] 80083cc: 3301 adds r3, #1 80083ce: 2202 movs r2, #2 80083d0: 701a strb r2, [r3, #0] break; 80083d2: e0f2 b.n 80085ba case USB_DESC_TYPE_STRING: switch ((uint8_t)(req->wValue)) 80083d4: 683b ldr r3, [r7, #0] 80083d6: 885b ldrh r3, [r3, #2] 80083d8: b2db uxtb r3, r3 80083da: 2b05 cmp r3, #5 80083dc: f200 80ac bhi.w 8008538 80083e0: a201 add r2, pc, #4 @ (adr r2, 80083e8 ) 80083e2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80083e6: bf00 nop 80083e8: 08008401 .word 0x08008401 80083ec: 08008435 .word 0x08008435 80083f0: 08008469 .word 0x08008469 80083f4: 0800849d .word 0x0800849d 80083f8: 080084d1 .word 0x080084d1 80083fc: 08008505 .word 0x08008505 { case USBD_IDX_LANGID_STR: if (pdev->pDesc->GetLangIDStrDescriptor != NULL) 8008400: 687b ldr r3, [r7, #4] 8008402: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8008406: 685b ldr r3, [r3, #4] 8008408: 2b00 cmp r3, #0 800840a: d00b beq.n 8008424 { pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); 800840c: 687b ldr r3, [r7, #4] 800840e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8008412: 685b ldr r3, [r3, #4] 8008414: 687a ldr r2, [r7, #4] 8008416: 7c12 ldrb r2, [r2, #16] 8008418: f107 0108 add.w r1, r7, #8 800841c: 4610 mov r0, r2 800841e: 4798 blx r3 8008420: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 8008422: e091 b.n 8008548 USBD_CtlError(pdev, req); 8008424: 6839 ldr r1, [r7, #0] 8008426: 6878 ldr r0, [r7, #4] 8008428: f000 facb bl 80089c2 err++; 800842c: 7afb ldrb r3, [r7, #11] 800842e: 3301 adds r3, #1 8008430: 72fb strb r3, [r7, #11] break; 8008432: e089 b.n 8008548 case USBD_IDX_MFC_STR: if (pdev->pDesc->GetManufacturerStrDescriptor != NULL) 8008434: 687b ldr r3, [r7, #4] 8008436: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800843a: 689b ldr r3, [r3, #8] 800843c: 2b00 cmp r3, #0 800843e: d00b beq.n 8008458 { pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); 8008440: 687b ldr r3, [r7, #4] 8008442: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8008446: 689b ldr r3, [r3, #8] 8008448: 687a ldr r2, [r7, #4] 800844a: 7c12 ldrb r2, [r2, #16] 800844c: f107 0108 add.w r1, r7, #8 8008450: 4610 mov r0, r2 8008452: 4798 blx r3 8008454: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 8008456: e077 b.n 8008548 USBD_CtlError(pdev, req); 8008458: 6839 ldr r1, [r7, #0] 800845a: 6878 ldr r0, [r7, #4] 800845c: f000 fab1 bl 80089c2 err++; 8008460: 7afb ldrb r3, [r7, #11] 8008462: 3301 adds r3, #1 8008464: 72fb strb r3, [r7, #11] break; 8008466: e06f b.n 8008548 case USBD_IDX_PRODUCT_STR: if (pdev->pDesc->GetProductStrDescriptor != NULL) 8008468: 687b ldr r3, [r7, #4] 800846a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800846e: 68db ldr r3, [r3, #12] 8008470: 2b00 cmp r3, #0 8008472: d00b beq.n 800848c { pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); 8008474: 687b ldr r3, [r7, #4] 8008476: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800847a: 68db ldr r3, [r3, #12] 800847c: 687a ldr r2, [r7, #4] 800847e: 7c12 ldrb r2, [r2, #16] 8008480: f107 0108 add.w r1, r7, #8 8008484: 4610 mov r0, r2 8008486: 4798 blx r3 8008488: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800848a: e05d b.n 8008548 USBD_CtlError(pdev, req); 800848c: 6839 ldr r1, [r7, #0] 800848e: 6878 ldr r0, [r7, #4] 8008490: f000 fa97 bl 80089c2 err++; 8008494: 7afb ldrb r3, [r7, #11] 8008496: 3301 adds r3, #1 8008498: 72fb strb r3, [r7, #11] break; 800849a: e055 b.n 8008548 case USBD_IDX_SERIAL_STR: if (pdev->pDesc->GetSerialStrDescriptor != NULL) 800849c: 687b ldr r3, [r7, #4] 800849e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80084a2: 691b ldr r3, [r3, #16] 80084a4: 2b00 cmp r3, #0 80084a6: d00b beq.n 80084c0 { pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); 80084a8: 687b ldr r3, [r7, #4] 80084aa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80084ae: 691b ldr r3, [r3, #16] 80084b0: 687a ldr r2, [r7, #4] 80084b2: 7c12 ldrb r2, [r2, #16] 80084b4: f107 0108 add.w r1, r7, #8 80084b8: 4610 mov r0, r2 80084ba: 4798 blx r3 80084bc: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 80084be: e043 b.n 8008548 USBD_CtlError(pdev, req); 80084c0: 6839 ldr r1, [r7, #0] 80084c2: 6878 ldr r0, [r7, #4] 80084c4: f000 fa7d bl 80089c2 err++; 80084c8: 7afb ldrb r3, [r7, #11] 80084ca: 3301 adds r3, #1 80084cc: 72fb strb r3, [r7, #11] break; 80084ce: e03b b.n 8008548 case USBD_IDX_CONFIG_STR: if (pdev->pDesc->GetConfigurationStrDescriptor != NULL) 80084d0: 687b ldr r3, [r7, #4] 80084d2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80084d6: 695b ldr r3, [r3, #20] 80084d8: 2b00 cmp r3, #0 80084da: d00b beq.n 80084f4 { pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); 80084dc: 687b ldr r3, [r7, #4] 80084de: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80084e2: 695b ldr r3, [r3, #20] 80084e4: 687a ldr r2, [r7, #4] 80084e6: 7c12 ldrb r2, [r2, #16] 80084e8: f107 0108 add.w r1, r7, #8 80084ec: 4610 mov r0, r2 80084ee: 4798 blx r3 80084f0: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 80084f2: e029 b.n 8008548 USBD_CtlError(pdev, req); 80084f4: 6839 ldr r1, [r7, #0] 80084f6: 6878 ldr r0, [r7, #4] 80084f8: f000 fa63 bl 80089c2 err++; 80084fc: 7afb ldrb r3, [r7, #11] 80084fe: 3301 adds r3, #1 8008500: 72fb strb r3, [r7, #11] break; 8008502: e021 b.n 8008548 case USBD_IDX_INTERFACE_STR: if (pdev->pDesc->GetInterfaceStrDescriptor != NULL) 8008504: 687b ldr r3, [r7, #4] 8008506: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800850a: 699b ldr r3, [r3, #24] 800850c: 2b00 cmp r3, #0 800850e: d00b beq.n 8008528 { pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); 8008510: 687b ldr r3, [r7, #4] 8008512: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8008516: 699b ldr r3, [r3, #24] 8008518: 687a ldr r2, [r7, #4] 800851a: 7c12 ldrb r2, [r2, #16] 800851c: f107 0108 add.w r1, r7, #8 8008520: 4610 mov r0, r2 8008522: 4798 blx r3 8008524: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 8008526: e00f b.n 8008548 USBD_CtlError(pdev, req); 8008528: 6839 ldr r1, [r7, #0] 800852a: 6878 ldr r0, [r7, #4] 800852c: f000 fa49 bl 80089c2 err++; 8008530: 7afb ldrb r3, [r7, #11] 8008532: 3301 adds r3, #1 8008534: 72fb strb r3, [r7, #11] break; 8008536: e007 b.n 8008548 err++; } #endif /* USBD_SUPPORT_USER_STRING_DESC */ #if ((USBD_CLASS_USER_STRING_DESC == 0U) && (USBD_SUPPORT_USER_STRING_DESC == 0U)) USBD_CtlError(pdev, req); 8008538: 6839 ldr r1, [r7, #0] 800853a: 6878 ldr r0, [r7, #4] 800853c: f000 fa41 bl 80089c2 err++; 8008540: 7afb ldrb r3, [r7, #11] 8008542: 3301 adds r3, #1 8008544: 72fb strb r3, [r7, #11] #endif /* (USBD_CLASS_USER_STRING_DESC == 0U) && (USBD_SUPPORT_USER_STRING_DESC == 0U) */ break; 8008546: bf00 nop } break; 8008548: e037 b.n 80085ba case USB_DESC_TYPE_DEVICE_QUALIFIER: if (pdev->dev_speed == USBD_SPEED_HIGH) 800854a: 687b ldr r3, [r7, #4] 800854c: 7c1b ldrb r3, [r3, #16] 800854e: 2b00 cmp r3, #0 8008550: d109 bne.n 8008566 pbuf = (uint8_t *)USBD_CMPSIT.GetDeviceQualifierDescriptor(&len); } else #endif /* USE_USBD_COMPOSITE */ { pbuf = (uint8_t *)pdev->pClass[0]->GetDeviceQualifierDescriptor(&len); 8008552: 687b ldr r3, [r7, #4] 8008554: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8008558: 6b5b ldr r3, [r3, #52] @ 0x34 800855a: f107 0208 add.w r2, r7, #8 800855e: 4610 mov r0, r2 8008560: 4798 blx r3 8008562: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 8008564: e029 b.n 80085ba USBD_CtlError(pdev, req); 8008566: 6839 ldr r1, [r7, #0] 8008568: 6878 ldr r0, [r7, #4] 800856a: f000 fa2a bl 80089c2 err++; 800856e: 7afb ldrb r3, [r7, #11] 8008570: 3301 adds r3, #1 8008572: 72fb strb r3, [r7, #11] break; 8008574: e021 b.n 80085ba case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 8008576: 687b ldr r3, [r7, #4] 8008578: 7c1b ldrb r3, [r3, #16] 800857a: 2b00 cmp r3, #0 800857c: d10d bne.n 800859a pbuf = (uint8_t *)USBD_CMPSIT.GetOtherSpeedConfigDescriptor(&len); } else #endif /* USE_USBD_COMPOSITE */ { pbuf = (uint8_t *)pdev->pClass[0]->GetOtherSpeedConfigDescriptor(&len); 800857e: 687b ldr r3, [r7, #4] 8008580: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8008584: 6b1b ldr r3, [r3, #48] @ 0x30 8008586: f107 0208 add.w r2, r7, #8 800858a: 4610 mov r0, r2 800858c: 4798 blx r3 800858e: 60f8 str r0, [r7, #12] } pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; 8008590: 68fb ldr r3, [r7, #12] 8008592: 3301 adds r3, #1 8008594: 2207 movs r2, #7 8008596: 701a strb r2, [r3, #0] else { USBD_CtlError(pdev, req); err++; } break; 8008598: e00f b.n 80085ba USBD_CtlError(pdev, req); 800859a: 6839 ldr r1, [r7, #0] 800859c: 6878 ldr r0, [r7, #4] 800859e: f000 fa10 bl 80089c2 err++; 80085a2: 7afb ldrb r3, [r7, #11] 80085a4: 3301 adds r3, #1 80085a6: 72fb strb r3, [r7, #11] break; 80085a8: e007 b.n 80085ba default: USBD_CtlError(pdev, req); 80085aa: 6839 ldr r1, [r7, #0] 80085ac: 6878 ldr r0, [r7, #4] 80085ae: f000 fa08 bl 80089c2 err++; 80085b2: 7afb ldrb r3, [r7, #11] 80085b4: 3301 adds r3, #1 80085b6: 72fb strb r3, [r7, #11] break; 80085b8: bf00 nop } if (err != 0U) 80085ba: 7afb ldrb r3, [r7, #11] 80085bc: 2b00 cmp r3, #0 80085be: d11e bne.n 80085fe { return; } if (req->wLength != 0U) 80085c0: 683b ldr r3, [r7, #0] 80085c2: 88db ldrh r3, [r3, #6] 80085c4: 2b00 cmp r3, #0 80085c6: d016 beq.n 80085f6 { if (len != 0U) 80085c8: 893b ldrh r3, [r7, #8] 80085ca: 2b00 cmp r3, #0 80085cc: d00e beq.n 80085ec { len = MIN(len, req->wLength); 80085ce: 683b ldr r3, [r7, #0] 80085d0: 88da ldrh r2, [r3, #6] 80085d2: 893b ldrh r3, [r7, #8] 80085d4: 4293 cmp r3, r2 80085d6: bf28 it cs 80085d8: 4613 movcs r3, r2 80085da: b29b uxth r3, r3 80085dc: 813b strh r3, [r7, #8] (void)USBD_CtlSendData(pdev, pbuf, len); 80085de: 893b ldrh r3, [r7, #8] 80085e0: 461a mov r2, r3 80085e2: 68f9 ldr r1, [r7, #12] 80085e4: 6878 ldr r0, [r7, #4] 80085e6: f000 fa69 bl 8008abc 80085ea: e009 b.n 8008600 } else { USBD_CtlError(pdev, req); 80085ec: 6839 ldr r1, [r7, #0] 80085ee: 6878 ldr r0, [r7, #4] 80085f0: f000 f9e7 bl 80089c2 80085f4: e004 b.n 8008600 } } else { (void)USBD_CtlSendStatus(pdev); 80085f6: 6878 ldr r0, [r7, #4] 80085f8: f000 faa0 bl 8008b3c 80085fc: e000 b.n 8008600 return; 80085fe: bf00 nop } } 8008600: 3710 adds r7, #16 8008602: 46bd mov sp, r7 8008604: bd80 pop {r7, pc} 8008606: bf00 nop 08008608 : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_SetAddress(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8008608: b580 push {r7, lr} 800860a: b084 sub sp, #16 800860c: af00 add r7, sp, #0 800860e: 6078 str r0, [r7, #4] 8008610: 6039 str r1, [r7, #0] uint8_t dev_addr; if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U)) 8008612: 683b ldr r3, [r7, #0] 8008614: 889b ldrh r3, [r3, #4] 8008616: 2b00 cmp r3, #0 8008618: d131 bne.n 800867e 800861a: 683b ldr r3, [r7, #0] 800861c: 88db ldrh r3, [r3, #6] 800861e: 2b00 cmp r3, #0 8008620: d12d bne.n 800867e 8008622: 683b ldr r3, [r7, #0] 8008624: 885b ldrh r3, [r3, #2] 8008626: 2b7f cmp r3, #127 @ 0x7f 8008628: d829 bhi.n 800867e { dev_addr = (uint8_t)(req->wValue) & 0x7FU; 800862a: 683b ldr r3, [r7, #0] 800862c: 885b ldrh r3, [r3, #2] 800862e: b2db uxtb r3, r3 8008630: f003 037f and.w r3, r3, #127 @ 0x7f 8008634: 73fb strb r3, [r7, #15] if (pdev->dev_state == USBD_STATE_CONFIGURED) 8008636: 687b ldr r3, [r7, #4] 8008638: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800863c: b2db uxtb r3, r3 800863e: 2b03 cmp r3, #3 8008640: d104 bne.n 800864c { USBD_CtlError(pdev, req); 8008642: 6839 ldr r1, [r7, #0] 8008644: 6878 ldr r0, [r7, #4] 8008646: f000 f9bc bl 80089c2 if (pdev->dev_state == USBD_STATE_CONFIGURED) 800864a: e01d b.n 8008688 } else { pdev->dev_address = dev_addr; 800864c: 687b ldr r3, [r7, #4] 800864e: 7bfa ldrb r2, [r7, #15] 8008650: f883 229e strb.w r2, [r3, #670] @ 0x29e (void)USBD_LL_SetUSBAddress(pdev, dev_addr); 8008654: 7bfb ldrb r3, [r7, #15] 8008656: 4619 mov r1, r3 8008658: 6878 ldr r0, [r7, #4] 800865a: f000 fe4f bl 80092fc (void)USBD_CtlSendStatus(pdev); 800865e: 6878 ldr r0, [r7, #4] 8008660: f000 fa6c bl 8008b3c if (dev_addr != 0U) 8008664: 7bfb ldrb r3, [r7, #15] 8008666: 2b00 cmp r3, #0 8008668: d004 beq.n 8008674 { pdev->dev_state = USBD_STATE_ADDRESSED; 800866a: 687b ldr r3, [r7, #4] 800866c: 2202 movs r2, #2 800866e: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 8008672: e009 b.n 8008688 } else { pdev->dev_state = USBD_STATE_DEFAULT; 8008674: 687b ldr r3, [r7, #4] 8008676: 2201 movs r2, #1 8008678: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 800867c: e004 b.n 8008688 } } } else { USBD_CtlError(pdev, req); 800867e: 6839 ldr r1, [r7, #0] 8008680: 6878 ldr r0, [r7, #4] 8008682: f000 f99e bl 80089c2 } } 8008686: bf00 nop 8008688: bf00 nop 800868a: 3710 adds r7, #16 800868c: 46bd mov sp, r7 800868e: bd80 pop {r7, pc} 08008690 : * @param pdev: device instance * @param req: usb request * @retval status */ static USBD_StatusTypeDef USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8008690: b580 push {r7, lr} 8008692: b084 sub sp, #16 8008694: af00 add r7, sp, #0 8008696: 6078 str r0, [r7, #4] 8008698: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 800869a: 2300 movs r3, #0 800869c: 73fb strb r3, [r7, #15] static uint8_t cfgidx; cfgidx = (uint8_t)(req->wValue); 800869e: 683b ldr r3, [r7, #0] 80086a0: 885b ldrh r3, [r3, #2] 80086a2: b2da uxtb r2, r3 80086a4: 4b4e ldr r3, [pc, #312] @ (80087e0 ) 80086a6: 701a strb r2, [r3, #0] if (cfgidx > USBD_MAX_NUM_CONFIGURATION) 80086a8: 4b4d ldr r3, [pc, #308] @ (80087e0 ) 80086aa: 781b ldrb r3, [r3, #0] 80086ac: 2b01 cmp r3, #1 80086ae: d905 bls.n 80086bc { USBD_CtlError(pdev, req); 80086b0: 6839 ldr r1, [r7, #0] 80086b2: 6878 ldr r0, [r7, #4] 80086b4: f000 f985 bl 80089c2 return USBD_FAIL; 80086b8: 2303 movs r3, #3 80086ba: e08c b.n 80087d6 } switch (pdev->dev_state) 80086bc: 687b ldr r3, [r7, #4] 80086be: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80086c2: b2db uxtb r3, r3 80086c4: 2b02 cmp r3, #2 80086c6: d002 beq.n 80086ce 80086c8: 2b03 cmp r3, #3 80086ca: d029 beq.n 8008720 80086cc: e075 b.n 80087ba { case USBD_STATE_ADDRESSED: if (cfgidx != 0U) 80086ce: 4b44 ldr r3, [pc, #272] @ (80087e0 ) 80086d0: 781b ldrb r3, [r3, #0] 80086d2: 2b00 cmp r3, #0 80086d4: d020 beq.n 8008718 { pdev->dev_config = cfgidx; 80086d6: 4b42 ldr r3, [pc, #264] @ (80087e0 ) 80086d8: 781b ldrb r3, [r3, #0] 80086da: 461a mov r2, r3 80086dc: 687b ldr r3, [r7, #4] 80086de: 605a str r2, [r3, #4] ret = USBD_SetClassConfig(pdev, cfgidx); 80086e0: 4b3f ldr r3, [pc, #252] @ (80087e0 ) 80086e2: 781b ldrb r3, [r3, #0] 80086e4: 4619 mov r1, r3 80086e6: 6878 ldr r0, [r7, #4] 80086e8: f7fe ffa3 bl 8007632 80086ec: 4603 mov r3, r0 80086ee: 73fb strb r3, [r7, #15] if (ret != USBD_OK) 80086f0: 7bfb ldrb r3, [r7, #15] 80086f2: 2b00 cmp r3, #0 80086f4: d008 beq.n 8008708 { USBD_CtlError(pdev, req); 80086f6: 6839 ldr r1, [r7, #0] 80086f8: 6878 ldr r0, [r7, #4] 80086fa: f000 f962 bl 80089c2 pdev->dev_state = USBD_STATE_ADDRESSED; 80086fe: 687b ldr r3, [r7, #4] 8008700: 2202 movs r2, #2 8008702: f883 229c strb.w r2, [r3, #668] @ 0x29c } else { (void)USBD_CtlSendStatus(pdev); } break; 8008706: e065 b.n 80087d4 (void)USBD_CtlSendStatus(pdev); 8008708: 6878 ldr r0, [r7, #4] 800870a: f000 fa17 bl 8008b3c pdev->dev_state = USBD_STATE_CONFIGURED; 800870e: 687b ldr r3, [r7, #4] 8008710: 2203 movs r2, #3 8008712: f883 229c strb.w r2, [r3, #668] @ 0x29c break; 8008716: e05d b.n 80087d4 (void)USBD_CtlSendStatus(pdev); 8008718: 6878 ldr r0, [r7, #4] 800871a: f000 fa0f bl 8008b3c break; 800871e: e059 b.n 80087d4 case USBD_STATE_CONFIGURED: if (cfgidx == 0U) 8008720: 4b2f ldr r3, [pc, #188] @ (80087e0 ) 8008722: 781b ldrb r3, [r3, #0] 8008724: 2b00 cmp r3, #0 8008726: d112 bne.n 800874e { pdev->dev_state = USBD_STATE_ADDRESSED; 8008728: 687b ldr r3, [r7, #4] 800872a: 2202 movs r2, #2 800872c: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->dev_config = cfgidx; 8008730: 4b2b ldr r3, [pc, #172] @ (80087e0 ) 8008732: 781b ldrb r3, [r3, #0] 8008734: 461a mov r2, r3 8008736: 687b ldr r3, [r7, #4] 8008738: 605a str r2, [r3, #4] (void)USBD_ClrClassConfig(pdev, cfgidx); 800873a: 4b29 ldr r3, [pc, #164] @ (80087e0 ) 800873c: 781b ldrb r3, [r3, #0] 800873e: 4619 mov r1, r3 8008740: 6878 ldr r0, [r7, #4] 8008742: f7fe ff92 bl 800766a (void)USBD_CtlSendStatus(pdev); 8008746: 6878 ldr r0, [r7, #4] 8008748: f000 f9f8 bl 8008b3c } else { (void)USBD_CtlSendStatus(pdev); } break; 800874c: e042 b.n 80087d4 else if (cfgidx != pdev->dev_config) 800874e: 4b24 ldr r3, [pc, #144] @ (80087e0 ) 8008750: 781b ldrb r3, [r3, #0] 8008752: 461a mov r2, r3 8008754: 687b ldr r3, [r7, #4] 8008756: 685b ldr r3, [r3, #4] 8008758: 429a cmp r2, r3 800875a: d02a beq.n 80087b2 (void)USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config); 800875c: 687b ldr r3, [r7, #4] 800875e: 685b ldr r3, [r3, #4] 8008760: b2db uxtb r3, r3 8008762: 4619 mov r1, r3 8008764: 6878 ldr r0, [r7, #4] 8008766: f7fe ff80 bl 800766a pdev->dev_config = cfgidx; 800876a: 4b1d ldr r3, [pc, #116] @ (80087e0 ) 800876c: 781b ldrb r3, [r3, #0] 800876e: 461a mov r2, r3 8008770: 687b ldr r3, [r7, #4] 8008772: 605a str r2, [r3, #4] ret = USBD_SetClassConfig(pdev, cfgidx); 8008774: 4b1a ldr r3, [pc, #104] @ (80087e0 ) 8008776: 781b ldrb r3, [r3, #0] 8008778: 4619 mov r1, r3 800877a: 6878 ldr r0, [r7, #4] 800877c: f7fe ff59 bl 8007632 8008780: 4603 mov r3, r0 8008782: 73fb strb r3, [r7, #15] if (ret != USBD_OK) 8008784: 7bfb ldrb r3, [r7, #15] 8008786: 2b00 cmp r3, #0 8008788: d00f beq.n 80087aa USBD_CtlError(pdev, req); 800878a: 6839 ldr r1, [r7, #0] 800878c: 6878 ldr r0, [r7, #4] 800878e: f000 f918 bl 80089c2 (void)USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config); 8008792: 687b ldr r3, [r7, #4] 8008794: 685b ldr r3, [r3, #4] 8008796: b2db uxtb r3, r3 8008798: 4619 mov r1, r3 800879a: 6878 ldr r0, [r7, #4] 800879c: f7fe ff65 bl 800766a pdev->dev_state = USBD_STATE_ADDRESSED; 80087a0: 687b ldr r3, [r7, #4] 80087a2: 2202 movs r2, #2 80087a4: f883 229c strb.w r2, [r3, #668] @ 0x29c break; 80087a8: e014 b.n 80087d4 (void)USBD_CtlSendStatus(pdev); 80087aa: 6878 ldr r0, [r7, #4] 80087ac: f000 f9c6 bl 8008b3c break; 80087b0: e010 b.n 80087d4 (void)USBD_CtlSendStatus(pdev); 80087b2: 6878 ldr r0, [r7, #4] 80087b4: f000 f9c2 bl 8008b3c break; 80087b8: e00c b.n 80087d4 default: USBD_CtlError(pdev, req); 80087ba: 6839 ldr r1, [r7, #0] 80087bc: 6878 ldr r0, [r7, #4] 80087be: f000 f900 bl 80089c2 (void)USBD_ClrClassConfig(pdev, cfgidx); 80087c2: 4b07 ldr r3, [pc, #28] @ (80087e0 ) 80087c4: 781b ldrb r3, [r3, #0] 80087c6: 4619 mov r1, r3 80087c8: 6878 ldr r0, [r7, #4] 80087ca: f7fe ff4e bl 800766a ret = USBD_FAIL; 80087ce: 2303 movs r3, #3 80087d0: 73fb strb r3, [r7, #15] break; 80087d2: bf00 nop } return ret; 80087d4: 7bfb ldrb r3, [r7, #15] } 80087d6: 4618 mov r0, r3 80087d8: 3710 adds r7, #16 80087da: 46bd mov sp, r7 80087dc: bd80 pop {r7, pc} 80087de: bf00 nop 80087e0: 200004b4 .word 0x200004b4 080087e4 : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 80087e4: b580 push {r7, lr} 80087e6: b082 sub sp, #8 80087e8: af00 add r7, sp, #0 80087ea: 6078 str r0, [r7, #4] 80087ec: 6039 str r1, [r7, #0] if (req->wLength != 1U) 80087ee: 683b ldr r3, [r7, #0] 80087f0: 88db ldrh r3, [r3, #6] 80087f2: 2b01 cmp r3, #1 80087f4: d004 beq.n 8008800 { USBD_CtlError(pdev, req); 80087f6: 6839 ldr r1, [r7, #0] 80087f8: 6878 ldr r0, [r7, #4] 80087fa: f000 f8e2 bl 80089c2 default: USBD_CtlError(pdev, req); break; } } } 80087fe: e023 b.n 8008848 switch (pdev->dev_state) 8008800: 687b ldr r3, [r7, #4] 8008802: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8008806: b2db uxtb r3, r3 8008808: 2b02 cmp r3, #2 800880a: dc02 bgt.n 8008812 800880c: 2b00 cmp r3, #0 800880e: dc03 bgt.n 8008818 8008810: e015 b.n 800883e 8008812: 2b03 cmp r3, #3 8008814: d00b beq.n 800882e 8008816: e012 b.n 800883e pdev->dev_default_config = 0U; 8008818: 687b ldr r3, [r7, #4] 800881a: 2200 movs r2, #0 800881c: 609a str r2, [r3, #8] (void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_default_config, 1U); 800881e: 687b ldr r3, [r7, #4] 8008820: 3308 adds r3, #8 8008822: 2201 movs r2, #1 8008824: 4619 mov r1, r3 8008826: 6878 ldr r0, [r7, #4] 8008828: f000 f948 bl 8008abc break; 800882c: e00c b.n 8008848 (void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_config, 1U); 800882e: 687b ldr r3, [r7, #4] 8008830: 3304 adds r3, #4 8008832: 2201 movs r2, #1 8008834: 4619 mov r1, r3 8008836: 6878 ldr r0, [r7, #4] 8008838: f000 f940 bl 8008abc break; 800883c: e004 b.n 8008848 USBD_CtlError(pdev, req); 800883e: 6839 ldr r1, [r7, #0] 8008840: 6878 ldr r0, [r7, #4] 8008842: f000 f8be bl 80089c2 break; 8008846: bf00 nop } 8008848: bf00 nop 800884a: 3708 adds r7, #8 800884c: 46bd mov sp, r7 800884e: bd80 pop {r7, pc} 08008850 : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8008850: b580 push {r7, lr} 8008852: b082 sub sp, #8 8008854: af00 add r7, sp, #0 8008856: 6078 str r0, [r7, #4] 8008858: 6039 str r1, [r7, #0] switch (pdev->dev_state) 800885a: 687b ldr r3, [r7, #4] 800885c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8008860: b2db uxtb r3, r3 8008862: 3b01 subs r3, #1 8008864: 2b02 cmp r3, #2 8008866: d81e bhi.n 80088a6 { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wLength != 0x2U) 8008868: 683b ldr r3, [r7, #0] 800886a: 88db ldrh r3, [r3, #6] 800886c: 2b02 cmp r3, #2 800886e: d004 beq.n 800887a { USBD_CtlError(pdev, req); 8008870: 6839 ldr r1, [r7, #0] 8008872: 6878 ldr r0, [r7, #4] 8008874: f000 f8a5 bl 80089c2 break; 8008878: e01a b.n 80088b0 } #if (USBD_SELF_POWERED == 1U) pdev->dev_config_status = USB_CONFIG_SELF_POWERED; 800887a: 687b ldr r3, [r7, #4] 800887c: 2201 movs r2, #1 800887e: 60da str r2, [r3, #12] #else pdev->dev_config_status = 0U; #endif /* USBD_SELF_POWERED */ if (pdev->dev_remote_wakeup != 0U) 8008880: 687b ldr r3, [r7, #4] 8008882: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4 8008886: 2b00 cmp r3, #0 8008888: d005 beq.n 8008896 { pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; 800888a: 687b ldr r3, [r7, #4] 800888c: 68db ldr r3, [r3, #12] 800888e: f043 0202 orr.w r2, r3, #2 8008892: 687b ldr r3, [r7, #4] 8008894: 60da str r2, [r3, #12] } (void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_config_status, 2U); 8008896: 687b ldr r3, [r7, #4] 8008898: 330c adds r3, #12 800889a: 2202 movs r2, #2 800889c: 4619 mov r1, r3 800889e: 6878 ldr r0, [r7, #4] 80088a0: f000 f90c bl 8008abc break; 80088a4: e004 b.n 80088b0 default: USBD_CtlError(pdev, req); 80088a6: 6839 ldr r1, [r7, #0] 80088a8: 6878 ldr r0, [r7, #4] 80088aa: f000 f88a bl 80089c2 break; 80088ae: bf00 nop } } 80088b0: bf00 nop 80088b2: 3708 adds r7, #8 80088b4: 46bd mov sp, r7 80088b6: bd80 pop {r7, pc} 080088b8 : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_SetFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 80088b8: b580 push {r7, lr} 80088ba: b082 sub sp, #8 80088bc: af00 add r7, sp, #0 80088be: 6078 str r0, [r7, #4] 80088c0: 6039 str r1, [r7, #0] if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 80088c2: 683b ldr r3, [r7, #0] 80088c4: 885b ldrh r3, [r3, #2] 80088c6: 2b01 cmp r3, #1 80088c8: d107 bne.n 80088da { pdev->dev_remote_wakeup = 1U; 80088ca: 687b ldr r3, [r7, #4] 80088cc: 2201 movs r2, #1 80088ce: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 (void)USBD_CtlSendStatus(pdev); 80088d2: 6878 ldr r0, [r7, #4] 80088d4: f000 f932 bl 8008b3c } else { USBD_CtlError(pdev, req); } } 80088d8: e013 b.n 8008902 else if (req->wValue == USB_FEATURE_TEST_MODE) 80088da: 683b ldr r3, [r7, #0] 80088dc: 885b ldrh r3, [r3, #2] 80088de: 2b02 cmp r3, #2 80088e0: d10b bne.n 80088fa pdev->dev_test_mode = (uint8_t)(req->wIndex >> 8); 80088e2: 683b ldr r3, [r7, #0] 80088e4: 889b ldrh r3, [r3, #4] 80088e6: 0a1b lsrs r3, r3, #8 80088e8: b29b uxth r3, r3 80088ea: b2da uxtb r2, r3 80088ec: 687b ldr r3, [r7, #4] 80088ee: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 (void)USBD_CtlSendStatus(pdev); 80088f2: 6878 ldr r0, [r7, #4] 80088f4: f000 f922 bl 8008b3c } 80088f8: e003 b.n 8008902 USBD_CtlError(pdev, req); 80088fa: 6839 ldr r1, [r7, #0] 80088fc: 6878 ldr r0, [r7, #4] 80088fe: f000 f860 bl 80089c2 } 8008902: bf00 nop 8008904: 3708 adds r7, #8 8008906: 46bd mov sp, r7 8008908: bd80 pop {r7, pc} 0800890a : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_ClrFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 800890a: b580 push {r7, lr} 800890c: b082 sub sp, #8 800890e: af00 add r7, sp, #0 8008910: 6078 str r0, [r7, #4] 8008912: 6039 str r1, [r7, #0] switch (pdev->dev_state) 8008914: 687b ldr r3, [r7, #4] 8008916: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800891a: b2db uxtb r3, r3 800891c: 3b01 subs r3, #1 800891e: 2b02 cmp r3, #2 8008920: d80b bhi.n 800893a { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 8008922: 683b ldr r3, [r7, #0] 8008924: 885b ldrh r3, [r3, #2] 8008926: 2b01 cmp r3, #1 8008928: d10c bne.n 8008944 { pdev->dev_remote_wakeup = 0U; 800892a: 687b ldr r3, [r7, #4] 800892c: 2200 movs r2, #0 800892e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 (void)USBD_CtlSendStatus(pdev); 8008932: 6878 ldr r0, [r7, #4] 8008934: f000 f902 bl 8008b3c } break; 8008938: e004 b.n 8008944 default: USBD_CtlError(pdev, req); 800893a: 6839 ldr r1, [r7, #0] 800893c: 6878 ldr r0, [r7, #4] 800893e: f000 f840 bl 80089c2 break; 8008942: e000 b.n 8008946 break; 8008944: bf00 nop } } 8008946: bf00 nop 8008948: 3708 adds r7, #8 800894a: 46bd mov sp, r7 800894c: bd80 pop {r7, pc} 0800894e : * @param req: usb request * @param pdata: setup data pointer * @retval None */ void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) { 800894e: b580 push {r7, lr} 8008950: b084 sub sp, #16 8008952: af00 add r7, sp, #0 8008954: 6078 str r0, [r7, #4] 8008956: 6039 str r1, [r7, #0] uint8_t *pbuff = pdata; 8008958: 683b ldr r3, [r7, #0] 800895a: 60fb str r3, [r7, #12] req->bmRequest = *(uint8_t *)(pbuff); 800895c: 68fb ldr r3, [r7, #12] 800895e: 781a ldrb r2, [r3, #0] 8008960: 687b ldr r3, [r7, #4] 8008962: 701a strb r2, [r3, #0] pbuff++; 8008964: 68fb ldr r3, [r7, #12] 8008966: 3301 adds r3, #1 8008968: 60fb str r3, [r7, #12] req->bRequest = *(uint8_t *)(pbuff); 800896a: 68fb ldr r3, [r7, #12] 800896c: 781a ldrb r2, [r3, #0] 800896e: 687b ldr r3, [r7, #4] 8008970: 705a strb r2, [r3, #1] pbuff++; 8008972: 68fb ldr r3, [r7, #12] 8008974: 3301 adds r3, #1 8008976: 60fb str r3, [r7, #12] req->wValue = SWAPBYTE(pbuff); 8008978: 68f8 ldr r0, [r7, #12] 800897a: f7ff fa13 bl 8007da4 800897e: 4603 mov r3, r0 8008980: 461a mov r2, r3 8008982: 687b ldr r3, [r7, #4] 8008984: 805a strh r2, [r3, #2] pbuff++; 8008986: 68fb ldr r3, [r7, #12] 8008988: 3301 adds r3, #1 800898a: 60fb str r3, [r7, #12] pbuff++; 800898c: 68fb ldr r3, [r7, #12] 800898e: 3301 adds r3, #1 8008990: 60fb str r3, [r7, #12] req->wIndex = SWAPBYTE(pbuff); 8008992: 68f8 ldr r0, [r7, #12] 8008994: f7ff fa06 bl 8007da4 8008998: 4603 mov r3, r0 800899a: 461a mov r2, r3 800899c: 687b ldr r3, [r7, #4] 800899e: 809a strh r2, [r3, #4] pbuff++; 80089a0: 68fb ldr r3, [r7, #12] 80089a2: 3301 adds r3, #1 80089a4: 60fb str r3, [r7, #12] pbuff++; 80089a6: 68fb ldr r3, [r7, #12] 80089a8: 3301 adds r3, #1 80089aa: 60fb str r3, [r7, #12] req->wLength = SWAPBYTE(pbuff); 80089ac: 68f8 ldr r0, [r7, #12] 80089ae: f7ff f9f9 bl 8007da4 80089b2: 4603 mov r3, r0 80089b4: 461a mov r2, r3 80089b6: 687b ldr r3, [r7, #4] 80089b8: 80da strh r2, [r3, #6] } 80089ba: bf00 nop 80089bc: 3710 adds r7, #16 80089be: 46bd mov sp, r7 80089c0: bd80 pop {r7, pc} 080089c2 : * @param pdev: device instance * @param req: usb request * @retval None */ void USBD_CtlError(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 80089c2: b580 push {r7, lr} 80089c4: b082 sub sp, #8 80089c6: af00 add r7, sp, #0 80089c8: 6078 str r0, [r7, #4] 80089ca: 6039 str r1, [r7, #0] UNUSED(req); (void)USBD_LL_StallEP(pdev, 0x80U); 80089cc: 2180 movs r1, #128 @ 0x80 80089ce: 6878 ldr r0, [r7, #4] 80089d0: f000 fc2a bl 8009228 (void)USBD_LL_StallEP(pdev, 0U); 80089d4: 2100 movs r1, #0 80089d6: 6878 ldr r0, [r7, #4] 80089d8: f000 fc26 bl 8009228 } 80089dc: bf00 nop 80089de: 3708 adds r7, #8 80089e0: 46bd mov sp, r7 80089e2: bd80 pop {r7, pc} 080089e4 : * @param unicode : Formatted string buffer (unicode) * @param len : descriptor length * @retval None */ void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) { 80089e4: b580 push {r7, lr} 80089e6: b086 sub sp, #24 80089e8: af00 add r7, sp, #0 80089ea: 60f8 str r0, [r7, #12] 80089ec: 60b9 str r1, [r7, #8] 80089ee: 607a str r2, [r7, #4] uint8_t idx = 0U; 80089f0: 2300 movs r3, #0 80089f2: 75fb strb r3, [r7, #23] uint8_t *pdesc; if (desc == NULL) 80089f4: 68fb ldr r3, [r7, #12] 80089f6: 2b00 cmp r3, #0 80089f8: d042 beq.n 8008a80 { return; } pdesc = desc; 80089fa: 68fb ldr r3, [r7, #12] 80089fc: 613b str r3, [r7, #16] *len = MIN(USBD_MAX_STR_DESC_SIZ, ((uint16_t)USBD_GetLen(pdesc) * 2U) + 2U); 80089fe: 6938 ldr r0, [r7, #16] 8008a00: f000 f842 bl 8008a88 8008a04: 4603 mov r3, r0 8008a06: 3301 adds r3, #1 8008a08: 005b lsls r3, r3, #1 8008a0a: f5b3 7f00 cmp.w r3, #512 @ 0x200 8008a0e: d808 bhi.n 8008a22 8008a10: 6938 ldr r0, [r7, #16] 8008a12: f000 f839 bl 8008a88 8008a16: 4603 mov r3, r0 8008a18: 3301 adds r3, #1 8008a1a: b29b uxth r3, r3 8008a1c: 005b lsls r3, r3, #1 8008a1e: b29a uxth r2, r3 8008a20: e001 b.n 8008a26 8008a22: f44f 7200 mov.w r2, #512 @ 0x200 8008a26: 687b ldr r3, [r7, #4] 8008a28: 801a strh r2, [r3, #0] unicode[idx] = *(uint8_t *)len; 8008a2a: 7dfb ldrb r3, [r7, #23] 8008a2c: 68ba ldr r2, [r7, #8] 8008a2e: 4413 add r3, r2 8008a30: 687a ldr r2, [r7, #4] 8008a32: 7812 ldrb r2, [r2, #0] 8008a34: 701a strb r2, [r3, #0] idx++; 8008a36: 7dfb ldrb r3, [r7, #23] 8008a38: 3301 adds r3, #1 8008a3a: 75fb strb r3, [r7, #23] unicode[idx] = USB_DESC_TYPE_STRING; 8008a3c: 7dfb ldrb r3, [r7, #23] 8008a3e: 68ba ldr r2, [r7, #8] 8008a40: 4413 add r3, r2 8008a42: 2203 movs r2, #3 8008a44: 701a strb r2, [r3, #0] idx++; 8008a46: 7dfb ldrb r3, [r7, #23] 8008a48: 3301 adds r3, #1 8008a4a: 75fb strb r3, [r7, #23] while (*pdesc != (uint8_t)'\0') 8008a4c: e013 b.n 8008a76 { unicode[idx] = *pdesc; 8008a4e: 7dfb ldrb r3, [r7, #23] 8008a50: 68ba ldr r2, [r7, #8] 8008a52: 4413 add r3, r2 8008a54: 693a ldr r2, [r7, #16] 8008a56: 7812 ldrb r2, [r2, #0] 8008a58: 701a strb r2, [r3, #0] pdesc++; 8008a5a: 693b ldr r3, [r7, #16] 8008a5c: 3301 adds r3, #1 8008a5e: 613b str r3, [r7, #16] idx++; 8008a60: 7dfb ldrb r3, [r7, #23] 8008a62: 3301 adds r3, #1 8008a64: 75fb strb r3, [r7, #23] unicode[idx] = 0U; 8008a66: 7dfb ldrb r3, [r7, #23] 8008a68: 68ba ldr r2, [r7, #8] 8008a6a: 4413 add r3, r2 8008a6c: 2200 movs r2, #0 8008a6e: 701a strb r2, [r3, #0] idx++; 8008a70: 7dfb ldrb r3, [r7, #23] 8008a72: 3301 adds r3, #1 8008a74: 75fb strb r3, [r7, #23] while (*pdesc != (uint8_t)'\0') 8008a76: 693b ldr r3, [r7, #16] 8008a78: 781b ldrb r3, [r3, #0] 8008a7a: 2b00 cmp r3, #0 8008a7c: d1e7 bne.n 8008a4e 8008a7e: e000 b.n 8008a82 return; 8008a80: bf00 nop } } 8008a82: 3718 adds r7, #24 8008a84: 46bd mov sp, r7 8008a86: bd80 pop {r7, pc} 08008a88 : * return the string length * @param buf : pointer to the ascii string buffer * @retval string length */ static uint8_t USBD_GetLen(uint8_t *buf) { 8008a88: b480 push {r7} 8008a8a: b085 sub sp, #20 8008a8c: af00 add r7, sp, #0 8008a8e: 6078 str r0, [r7, #4] uint8_t len = 0U; 8008a90: 2300 movs r3, #0 8008a92: 73fb strb r3, [r7, #15] uint8_t *pbuff = buf; 8008a94: 687b ldr r3, [r7, #4] 8008a96: 60bb str r3, [r7, #8] while (*pbuff != (uint8_t)'\0') 8008a98: e005 b.n 8008aa6 { len++; 8008a9a: 7bfb ldrb r3, [r7, #15] 8008a9c: 3301 adds r3, #1 8008a9e: 73fb strb r3, [r7, #15] pbuff++; 8008aa0: 68bb ldr r3, [r7, #8] 8008aa2: 3301 adds r3, #1 8008aa4: 60bb str r3, [r7, #8] while (*pbuff != (uint8_t)'\0') 8008aa6: 68bb ldr r3, [r7, #8] 8008aa8: 781b ldrb r3, [r3, #0] 8008aaa: 2b00 cmp r3, #0 8008aac: d1f5 bne.n 8008a9a } return len; 8008aae: 7bfb ldrb r3, [r7, #15] } 8008ab0: 4618 mov r0, r3 8008ab2: 3714 adds r7, #20 8008ab4: 46bd mov sp, r7 8008ab6: f85d 7b04 ldr.w r7, [sp], #4 8008aba: 4770 bx lr 08008abc : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint32_t len) { 8008abc: b580 push {r7, lr} 8008abe: b084 sub sp, #16 8008ac0: af00 add r7, sp, #0 8008ac2: 60f8 str r0, [r7, #12] 8008ac4: 60b9 str r1, [r7, #8] 8008ac6: 607a str r2, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_IN; 8008ac8: 68fb ldr r3, [r7, #12] 8008aca: 2202 movs r2, #2 8008acc: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_in[0].total_length = len; 8008ad0: 68fb ldr r3, [r7, #12] 8008ad2: 687a ldr r2, [r7, #4] 8008ad4: 615a str r2, [r3, #20] pdev->ep_in[0].pbuffer = pbuf; 8008ad6: 68fb ldr r3, [r7, #12] 8008ad8: 68ba ldr r2, [r7, #8] 8008ada: 625a str r2, [r3, #36] @ 0x24 #ifdef USBD_AVOID_PACKET_SPLIT_MPS pdev->ep_in[0].rem_length = 0U; #else pdev->ep_in[0].rem_length = len; 8008adc: 68fb ldr r3, [r7, #12] 8008ade: 687a ldr r2, [r7, #4] 8008ae0: 619a str r2, [r3, #24] #endif /* USBD_AVOID_PACKET_SPLIT_MPS */ /* Start the transfer */ (void)USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 8008ae2: 687b ldr r3, [r7, #4] 8008ae4: 68ba ldr r2, [r7, #8] 8008ae6: 2100 movs r1, #0 8008ae8: 68f8 ldr r0, [r7, #12] 8008aea: f000 fc26 bl 800933a return USBD_OK; 8008aee: 2300 movs r3, #0 } 8008af0: 4618 mov r0, r3 8008af2: 3710 adds r7, #16 8008af4: 46bd mov sp, r7 8008af6: bd80 pop {r7, pc} 08008af8 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint32_t len) { 8008af8: b580 push {r7, lr} 8008afa: b084 sub sp, #16 8008afc: af00 add r7, sp, #0 8008afe: 60f8 str r0, [r7, #12] 8008b00: 60b9 str r1, [r7, #8] 8008b02: 607a str r2, [r7, #4] /* Start the next transfer */ (void)USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 8008b04: 687b ldr r3, [r7, #4] 8008b06: 68ba ldr r2, [r7, #8] 8008b08: 2100 movs r1, #0 8008b0a: 68f8 ldr r0, [r7, #12] 8008b0c: f000 fc15 bl 800933a return USBD_OK; 8008b10: 2300 movs r3, #0 } 8008b12: 4618 mov r0, r3 8008b14: 3710 adds r7, #16 8008b16: 46bd mov sp, r7 8008b18: bd80 pop {r7, pc} 08008b1a : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint32_t len) { 8008b1a: b580 push {r7, lr} 8008b1c: b084 sub sp, #16 8008b1e: af00 add r7, sp, #0 8008b20: 60f8 str r0, [r7, #12] 8008b22: 60b9 str r1, [r7, #8] 8008b24: 607a str r2, [r7, #4] (void)USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 8008b26: 687b ldr r3, [r7, #4] 8008b28: 68ba ldr r2, [r7, #8] 8008b2a: 2100 movs r1, #0 8008b2c: 68f8 ldr r0, [r7, #12] 8008b2e: f000 fc25 bl 800937c return USBD_OK; 8008b32: 2300 movs r3, #0 } 8008b34: 4618 mov r0, r3 8008b36: 3710 adds r7, #16 8008b38: 46bd mov sp, r7 8008b3a: bd80 pop {r7, pc} 08008b3c : * send zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev) { 8008b3c: b580 push {r7, lr} 8008b3e: b082 sub sp, #8 8008b40: af00 add r7, sp, #0 8008b42: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_IN; 8008b44: 687b ldr r3, [r7, #4] 8008b46: 2204 movs r2, #4 8008b48: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ (void)USBD_LL_Transmit(pdev, 0x00U, NULL, 0U); 8008b4c: 2300 movs r3, #0 8008b4e: 2200 movs r2, #0 8008b50: 2100 movs r1, #0 8008b52: 6878 ldr r0, [r7, #4] 8008b54: f000 fbf1 bl 800933a return USBD_OK; 8008b58: 2300 movs r3, #0 } 8008b5a: 4618 mov r0, r3 8008b5c: 3708 adds r7, #8 8008b5e: 46bd mov sp, r7 8008b60: bd80 pop {r7, pc} 08008b62 : * receive zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev) { 8008b62: b580 push {r7, lr} 8008b64: b082 sub sp, #8 8008b66: af00 add r7, sp, #0 8008b68: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_OUT; 8008b6a: 687b ldr r3, [r7, #4] 8008b6c: 2205 movs r2, #5 8008b6e: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ (void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 8008b72: 2300 movs r3, #0 8008b74: 2200 movs r2, #0 8008b76: 2100 movs r1, #0 8008b78: 6878 ldr r0, [r7, #4] 8008b7a: f000 fbff bl 800937c return USBD_OK; 8008b7e: 2300 movs r3, #0 } 8008b80: 4618 mov r0, r3 8008b82: 3708 adds r7, #8 8008b84: 46bd mov sp, r7 8008b86: bd80 pop {r7, pc} 08008b88 : /** * Init USB device Library, add supported class and start the library * @retval None */ void MX_USB_DEVICE_Init(void) { 8008b88: b580 push {r7, lr} 8008b8a: af00 add r7, sp, #0 /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ /* USER CODE END USB_DEVICE_Init_PreTreatment */ /* Init Device Library, add supported class and start the library. */ if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK) 8008b8c: 2200 movs r2, #0 8008b8e: 490e ldr r1, [pc, #56] @ (8008bc8 ) 8008b90: 480e ldr r0, [pc, #56] @ (8008bcc ) 8008b92: f7fe fcd1 bl 8007538 8008b96: 4603 mov r3, r0 8008b98: 2b00 cmp r3, #0 8008b9a: d001 beq.n 8008ba0 { Error_Handler(); 8008b9c: f7f8 f936 bl 8000e0c } if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_HID) != USBD_OK) 8008ba0: 490b ldr r1, [pc, #44] @ (8008bd0 ) 8008ba2: 480a ldr r0, [pc, #40] @ (8008bcc ) 8008ba4: f7fe fcf8 bl 8007598 8008ba8: 4603 mov r3, r0 8008baa: 2b00 cmp r3, #0 8008bac: d001 beq.n 8008bb2 { Error_Handler(); 8008bae: f7f8 f92d bl 8000e0c } if (USBD_Start(&hUsbDeviceFS) != USBD_OK) 8008bb2: 4806 ldr r0, [pc, #24] @ (8008bcc ) 8008bb4: f7fe fd26 bl 8007604 8008bb8: 4603 mov r3, r0 8008bba: 2b00 cmp r3, #0 8008bbc: d001 beq.n 8008bc2 { Error_Handler(); 8008bbe: f7f8 f925 bl 8000e0c } /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ /* USER CODE END USB_DEVICE_Init_PostTreatment */ } 8008bc2: bf00 nop 8008bc4: bd80 pop {r7, pc} 8008bc6: bf00 nop 8008bc8: 200000d4 .word 0x200000d4 8008bcc: 200004b8 .word 0x200004b8 8008bd0: 20000030 .word 0x20000030 08008bd4 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 8008bd4: b480 push {r7} 8008bd6: b083 sub sp, #12 8008bd8: af00 add r7, sp, #0 8008bda: 4603 mov r3, r0 8008bdc: 6039 str r1, [r7, #0] 8008bde: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_FS_DeviceDesc); 8008be0: 683b ldr r3, [r7, #0] 8008be2: 2212 movs r2, #18 8008be4: 801a strh r2, [r3, #0] return USBD_FS_DeviceDesc; 8008be6: 4b03 ldr r3, [pc, #12] @ (8008bf4 ) } 8008be8: 4618 mov r0, r3 8008bea: 370c adds r7, #12 8008bec: 46bd mov sp, r7 8008bee: f85d 7b04 ldr.w r7, [sp], #4 8008bf2: 4770 bx lr 8008bf4: 200000f4 .word 0x200000f4 08008bf8 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 8008bf8: b480 push {r7} 8008bfa: b083 sub sp, #12 8008bfc: af00 add r7, sp, #0 8008bfe: 4603 mov r3, r0 8008c00: 6039 str r1, [r7, #0] 8008c02: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_LangIDDesc); 8008c04: 683b ldr r3, [r7, #0] 8008c06: 2204 movs r2, #4 8008c08: 801a strh r2, [r3, #0] return USBD_LangIDDesc; 8008c0a: 4b03 ldr r3, [pc, #12] @ (8008c18 ) } 8008c0c: 4618 mov r0, r3 8008c0e: 370c adds r7, #12 8008c10: 46bd mov sp, r7 8008c12: f85d 7b04 ldr.w r7, [sp], #4 8008c16: 4770 bx lr 8008c18: 20000114 .word 0x20000114 08008c1c : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 8008c1c: b580 push {r7, lr} 8008c1e: b082 sub sp, #8 8008c20: af00 add r7, sp, #0 8008c22: 4603 mov r3, r0 8008c24: 6039 str r1, [r7, #0] 8008c26: 71fb strb r3, [r7, #7] if(speed == 0) 8008c28: 79fb ldrb r3, [r7, #7] 8008c2a: 2b00 cmp r3, #0 8008c2c: d105 bne.n 8008c3a { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 8008c2e: 683a ldr r2, [r7, #0] 8008c30: 4907 ldr r1, [pc, #28] @ (8008c50 ) 8008c32: 4808 ldr r0, [pc, #32] @ (8008c54 ) 8008c34: f7ff fed6 bl 80089e4 8008c38: e004 b.n 8008c44 } else { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 8008c3a: 683a ldr r2, [r7, #0] 8008c3c: 4904 ldr r1, [pc, #16] @ (8008c50 ) 8008c3e: 4805 ldr r0, [pc, #20] @ (8008c54 ) 8008c40: f7ff fed0 bl 80089e4 } return USBD_StrDesc; 8008c44: 4b02 ldr r3, [pc, #8] @ (8008c50 ) } 8008c46: 4618 mov r0, r3 8008c48: 3708 adds r7, #8 8008c4a: 46bd mov sp, r7 8008c4c: bd80 pop {r7, pc} 8008c4e: bf00 nop 8008c50: 20000794 .word 0x20000794 8008c54: 08009554 .word 0x08009554 08008c58 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 8008c58: b580 push {r7, lr} 8008c5a: b082 sub sp, #8 8008c5c: af00 add r7, sp, #0 8008c5e: 4603 mov r3, r0 8008c60: 6039 str r1, [r7, #0] 8008c62: 71fb strb r3, [r7, #7] UNUSED(speed); USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); 8008c64: 683a ldr r2, [r7, #0] 8008c66: 4904 ldr r1, [pc, #16] @ (8008c78 ) 8008c68: 4804 ldr r0, [pc, #16] @ (8008c7c ) 8008c6a: f7ff febb bl 80089e4 return USBD_StrDesc; 8008c6e: 4b02 ldr r3, [pc, #8] @ (8008c78 ) } 8008c70: 4618 mov r0, r3 8008c72: 3708 adds r7, #8 8008c74: 46bd mov sp, r7 8008c76: bd80 pop {r7, pc} 8008c78: 20000794 .word 0x20000794 8008c7c: 08009568 .word 0x08009568 08008c80 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 8008c80: b580 push {r7, lr} 8008c82: b082 sub sp, #8 8008c84: af00 add r7, sp, #0 8008c86: 4603 mov r3, r0 8008c88: 6039 str r1, [r7, #0] 8008c8a: 71fb strb r3, [r7, #7] UNUSED(speed); *length = USB_SIZ_STRING_SERIAL; 8008c8c: 683b ldr r3, [r7, #0] 8008c8e: 221a movs r2, #26 8008c90: 801a strh r2, [r3, #0] /* Update the serial number string descriptor with the data from the unique * ID */ Get_SerialNum(); 8008c92: f000 f855 bl 8008d40 /* USER CODE BEGIN USBD_FS_SerialStrDescriptor */ /* USER CODE END USBD_FS_SerialStrDescriptor */ return (uint8_t *) USBD_StringSerial; 8008c96: 4b02 ldr r3, [pc, #8] @ (8008ca0 ) } 8008c98: 4618 mov r0, r3 8008c9a: 3708 adds r7, #8 8008c9c: 46bd mov sp, r7 8008c9e: bd80 pop {r7, pc} 8008ca0: 20000118 .word 0x20000118 08008ca4 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 8008ca4: b580 push {r7, lr} 8008ca6: b082 sub sp, #8 8008ca8: af00 add r7, sp, #0 8008caa: 4603 mov r3, r0 8008cac: 6039 str r1, [r7, #0] 8008cae: 71fb strb r3, [r7, #7] if(speed == USBD_SPEED_HIGH) 8008cb0: 79fb ldrb r3, [r7, #7] 8008cb2: 2b00 cmp r3, #0 8008cb4: d105 bne.n 8008cc2 { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 8008cb6: 683a ldr r2, [r7, #0] 8008cb8: 4907 ldr r1, [pc, #28] @ (8008cd8 ) 8008cba: 4808 ldr r0, [pc, #32] @ (8008cdc ) 8008cbc: f7ff fe92 bl 80089e4 8008cc0: e004 b.n 8008ccc } else { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 8008cc2: 683a ldr r2, [r7, #0] 8008cc4: 4904 ldr r1, [pc, #16] @ (8008cd8 ) 8008cc6: 4805 ldr r0, [pc, #20] @ (8008cdc ) 8008cc8: f7ff fe8c bl 80089e4 } return USBD_StrDesc; 8008ccc: 4b02 ldr r3, [pc, #8] @ (8008cd8 ) } 8008cce: 4618 mov r0, r3 8008cd0: 3708 adds r7, #8 8008cd2: 46bd mov sp, r7 8008cd4: bd80 pop {r7, pc} 8008cd6: bf00 nop 8008cd8: 20000794 .word 0x20000794 8008cdc: 08009574 .word 0x08009574 08008ce0 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 8008ce0: b580 push {r7, lr} 8008ce2: b082 sub sp, #8 8008ce4: af00 add r7, sp, #0 8008ce6: 4603 mov r3, r0 8008ce8: 6039 str r1, [r7, #0] 8008cea: 71fb strb r3, [r7, #7] if(speed == 0) 8008cec: 79fb ldrb r3, [r7, #7] 8008cee: 2b00 cmp r3, #0 8008cf0: d105 bne.n 8008cfe { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 8008cf2: 683a ldr r2, [r7, #0] 8008cf4: 4907 ldr r1, [pc, #28] @ (8008d14 ) 8008cf6: 4808 ldr r0, [pc, #32] @ (8008d18 ) 8008cf8: f7ff fe74 bl 80089e4 8008cfc: e004 b.n 8008d08 } else { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 8008cfe: 683a ldr r2, [r7, #0] 8008d00: 4904 ldr r1, [pc, #16] @ (8008d14 ) 8008d02: 4805 ldr r0, [pc, #20] @ (8008d18 ) 8008d04: f7ff fe6e bl 80089e4 } return USBD_StrDesc; 8008d08: 4b02 ldr r3, [pc, #8] @ (8008d14 ) } 8008d0a: 4618 mov r0, r3 8008d0c: 3708 adds r7, #8 8008d0e: 46bd mov sp, r7 8008d10: bd80 pop {r7, pc} 8008d12: bf00 nop 8008d14: 20000794 .word 0x20000794 8008d18: 08009580 .word 0x08009580 08008d1c : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 8008d1c: b480 push {r7} 8008d1e: b083 sub sp, #12 8008d20: af00 add r7, sp, #0 8008d22: 4603 mov r3, r0 8008d24: 6039 str r1, [r7, #0] 8008d26: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_FS_BOSDesc); 8008d28: 683b ldr r3, [r7, #0] 8008d2a: 220c movs r2, #12 8008d2c: 801a strh r2, [r3, #0] return (uint8_t*)USBD_FS_BOSDesc; 8008d2e: 4b03 ldr r3, [pc, #12] @ (8008d3c ) } 8008d30: 4618 mov r0, r3 8008d32: 370c adds r7, #12 8008d34: 46bd mov sp, r7 8008d36: f85d 7b04 ldr.w r7, [sp], #4 8008d3a: 4770 bx lr 8008d3c: 20000108 .word 0x20000108 08008d40 : * @brief Create the serial number string descriptor * @param None * @retval None */ static void Get_SerialNum(void) { 8008d40: b580 push {r7, lr} 8008d42: b084 sub sp, #16 8008d44: af00 add r7, sp, #0 uint32_t deviceserial0; uint32_t deviceserial1; uint32_t deviceserial2; deviceserial0 = *(uint32_t *) DEVICE_ID1; 8008d46: 4b0f ldr r3, [pc, #60] @ (8008d84 ) 8008d48: 681b ldr r3, [r3, #0] 8008d4a: 60fb str r3, [r7, #12] deviceserial1 = *(uint32_t *) DEVICE_ID2; 8008d4c: 4b0e ldr r3, [pc, #56] @ (8008d88 ) 8008d4e: 681b ldr r3, [r3, #0] 8008d50: 60bb str r3, [r7, #8] deviceserial2 = *(uint32_t *) DEVICE_ID3; 8008d52: 4b0e ldr r3, [pc, #56] @ (8008d8c ) 8008d54: 681b ldr r3, [r3, #0] 8008d56: 607b str r3, [r7, #4] deviceserial0 += deviceserial2; 8008d58: 68fa ldr r2, [r7, #12] 8008d5a: 687b ldr r3, [r7, #4] 8008d5c: 4413 add r3, r2 8008d5e: 60fb str r3, [r7, #12] if (deviceserial0 != 0) 8008d60: 68fb ldr r3, [r7, #12] 8008d62: 2b00 cmp r3, #0 8008d64: d009 beq.n 8008d7a { IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8); 8008d66: 2208 movs r2, #8 8008d68: 4909 ldr r1, [pc, #36] @ (8008d90 ) 8008d6a: 68f8 ldr r0, [r7, #12] 8008d6c: f000 f814 bl 8008d98 IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4); 8008d70: 2204 movs r2, #4 8008d72: 4908 ldr r1, [pc, #32] @ (8008d94 ) 8008d74: 68b8 ldr r0, [r7, #8] 8008d76: f000 f80f bl 8008d98 } } 8008d7a: bf00 nop 8008d7c: 3710 adds r7, #16 8008d7e: 46bd mov sp, r7 8008d80: bd80 pop {r7, pc} 8008d82: bf00 nop 8008d84: 1fff7a10 .word 0x1fff7a10 8008d88: 1fff7a14 .word 0x1fff7a14 8008d8c: 1fff7a18 .word 0x1fff7a18 8008d90: 2000011a .word 0x2000011a 8008d94: 2000012a .word 0x2000012a 08008d98 : * @param pbuf: pointer to the buffer * @param len: buffer length * @retval None */ static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len) { 8008d98: b480 push {r7} 8008d9a: b087 sub sp, #28 8008d9c: af00 add r7, sp, #0 8008d9e: 60f8 str r0, [r7, #12] 8008da0: 60b9 str r1, [r7, #8] 8008da2: 4613 mov r3, r2 8008da4: 71fb strb r3, [r7, #7] uint8_t idx = 0; 8008da6: 2300 movs r3, #0 8008da8: 75fb strb r3, [r7, #23] for (idx = 0; idx < len; idx++) 8008daa: 2300 movs r3, #0 8008dac: 75fb strb r3, [r7, #23] 8008dae: e027 b.n 8008e00 { if (((value >> 28)) < 0xA) 8008db0: 68fb ldr r3, [r7, #12] 8008db2: 0f1b lsrs r3, r3, #28 8008db4: 2b09 cmp r3, #9 8008db6: d80b bhi.n 8008dd0 { pbuf[2 * idx] = (value >> 28) + '0'; 8008db8: 68fb ldr r3, [r7, #12] 8008dba: 0f1b lsrs r3, r3, #28 8008dbc: b2da uxtb r2, r3 8008dbe: 7dfb ldrb r3, [r7, #23] 8008dc0: 005b lsls r3, r3, #1 8008dc2: 4619 mov r1, r3 8008dc4: 68bb ldr r3, [r7, #8] 8008dc6: 440b add r3, r1 8008dc8: 3230 adds r2, #48 @ 0x30 8008dca: b2d2 uxtb r2, r2 8008dcc: 701a strb r2, [r3, #0] 8008dce: e00a b.n 8008de6 } else { pbuf[2 * idx] = (value >> 28) + 'A' - 10; 8008dd0: 68fb ldr r3, [r7, #12] 8008dd2: 0f1b lsrs r3, r3, #28 8008dd4: b2da uxtb r2, r3 8008dd6: 7dfb ldrb r3, [r7, #23] 8008dd8: 005b lsls r3, r3, #1 8008dda: 4619 mov r1, r3 8008ddc: 68bb ldr r3, [r7, #8] 8008dde: 440b add r3, r1 8008de0: 3237 adds r2, #55 @ 0x37 8008de2: b2d2 uxtb r2, r2 8008de4: 701a strb r2, [r3, #0] } value = value << 4; 8008de6: 68fb ldr r3, [r7, #12] 8008de8: 011b lsls r3, r3, #4 8008dea: 60fb str r3, [r7, #12] pbuf[2 * idx + 1] = 0; 8008dec: 7dfb ldrb r3, [r7, #23] 8008dee: 005b lsls r3, r3, #1 8008df0: 3301 adds r3, #1 8008df2: 68ba ldr r2, [r7, #8] 8008df4: 4413 add r3, r2 8008df6: 2200 movs r2, #0 8008df8: 701a strb r2, [r3, #0] for (idx = 0; idx < len; idx++) 8008dfa: 7dfb ldrb r3, [r7, #23] 8008dfc: 3301 adds r3, #1 8008dfe: 75fb strb r3, [r7, #23] 8008e00: 7dfa ldrb r2, [r7, #23] 8008e02: 79fb ldrb r3, [r7, #7] 8008e04: 429a cmp r2, r3 8008e06: d3d3 bcc.n 8008db0 } } 8008e08: bf00 nop 8008e0a: bf00 nop 8008e0c: 371c adds r7, #28 8008e0e: 46bd mov sp, r7 8008e10: f85d 7b04 ldr.w r7, [sp], #4 8008e14: 4770 bx lr ... 08008e18 : LL Driver Callbacks (PCD -> USB Device Library) *******************************************************************************/ /* MSP Init */ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) { 8008e18: b580 push {r7, lr} 8008e1a: b0a0 sub sp, #128 @ 0x80 8008e1c: af00 add r7, sp, #0 8008e1e: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8008e20: f107 036c add.w r3, r7, #108 @ 0x6c 8008e24: 2200 movs r2, #0 8008e26: 601a str r2, [r3, #0] 8008e28: 605a str r2, [r3, #4] 8008e2a: 609a str r2, [r3, #8] 8008e2c: 60da str r2, [r3, #12] 8008e2e: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 8008e30: f107 0310 add.w r3, r7, #16 8008e34: 225c movs r2, #92 @ 0x5c 8008e36: 2100 movs r1, #0 8008e38: 4618 mov r0, r3 8008e3a: f000 fb53 bl 80094e4 if(pcdHandle->Instance==USB_OTG_FS) 8008e3e: 687b ldr r3, [r7, #4] 8008e40: 681b ldr r3, [r3, #0] 8008e42: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000 8008e46: d149 bne.n 8008edc /* USER CODE END USB_OTG_FS_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; 8008e48: f44f 7380 mov.w r3, #256 @ 0x100 8008e4c: 613b str r3, [r7, #16] PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLQ; 8008e4e: 2300 movs r3, #0 8008e50: 667b str r3, [r7, #100] @ 0x64 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8008e52: f107 0310 add.w r3, r7, #16 8008e56: 4618 mov r0, r3 8008e58: f7fa fb78 bl 800354c 8008e5c: 4603 mov r3, r0 8008e5e: 2b00 cmp r3, #0 8008e60: d001 beq.n 8008e66 { Error_Handler(); 8008e62: f7f7 ffd3 bl 8000e0c } __HAL_RCC_GPIOA_CLK_ENABLE(); 8008e66: 2300 movs r3, #0 8008e68: 60fb str r3, [r7, #12] 8008e6a: 4b1e ldr r3, [pc, #120] @ (8008ee4 ) 8008e6c: 6b1b ldr r3, [r3, #48] @ 0x30 8008e6e: 4a1d ldr r2, [pc, #116] @ (8008ee4 ) 8008e70: f043 0301 orr.w r3, r3, #1 8008e74: 6313 str r3, [r2, #48] @ 0x30 8008e76: 4b1b ldr r3, [pc, #108] @ (8008ee4 ) 8008e78: 6b1b ldr r3, [r3, #48] @ 0x30 8008e7a: f003 0301 and.w r3, r3, #1 8008e7e: 60fb str r3, [r7, #12] 8008e80: 68fb ldr r3, [r7, #12] /**USB_OTG_FS GPIO Configuration PA11 ------> USB_OTG_FS_DM PA12 ------> USB_OTG_FS_DP */ GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; 8008e82: f44f 53c0 mov.w r3, #6144 @ 0x1800 8008e86: 66fb str r3, [r7, #108] @ 0x6c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8008e88: 2302 movs r3, #2 8008e8a: 673b str r3, [r7, #112] @ 0x70 GPIO_InitStruct.Pull = GPIO_NOPULL; 8008e8c: 2300 movs r3, #0 8008e8e: 677b str r3, [r7, #116] @ 0x74 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8008e90: 2303 movs r3, #3 8008e92: 67bb str r3, [r7, #120] @ 0x78 GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; 8008e94: 230a movs r3, #10 8008e96: 67fb str r3, [r7, #124] @ 0x7c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008e98: f107 036c add.w r3, r7, #108 @ 0x6c 8008e9c: 4619 mov r1, r3 8008e9e: 4812 ldr r0, [pc, #72] @ (8008ee8 ) 8008ea0: f7f8 fcaa bl 80017f8 /* Peripheral clock enable */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); 8008ea4: 4b0f ldr r3, [pc, #60] @ (8008ee4 ) 8008ea6: 6b5b ldr r3, [r3, #52] @ 0x34 8008ea8: 4a0e ldr r2, [pc, #56] @ (8008ee4 ) 8008eaa: f043 0380 orr.w r3, r3, #128 @ 0x80 8008eae: 6353 str r3, [r2, #52] @ 0x34 8008eb0: 2300 movs r3, #0 8008eb2: 60bb str r3, [r7, #8] 8008eb4: 4b0b ldr r3, [pc, #44] @ (8008ee4 ) 8008eb6: 6c5b ldr r3, [r3, #68] @ 0x44 8008eb8: 4a0a ldr r2, [pc, #40] @ (8008ee4 ) 8008eba: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8008ebe: 6453 str r3, [r2, #68] @ 0x44 8008ec0: 4b08 ldr r3, [pc, #32] @ (8008ee4 ) 8008ec2: 6c5b ldr r3, [r3, #68] @ 0x44 8008ec4: f403 4380 and.w r3, r3, #16384 @ 0x4000 8008ec8: 60bb str r3, [r7, #8] 8008eca: 68bb ldr r3, [r7, #8] /* Peripheral interrupt init */ HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0); 8008ecc: 2200 movs r2, #0 8008ece: 2100 movs r1, #0 8008ed0: 2043 movs r0, #67 @ 0x43 8008ed2: f7f8 fbd4 bl 800167e HAL_NVIC_EnableIRQ(OTG_FS_IRQn); 8008ed6: 2043 movs r0, #67 @ 0x43 8008ed8: f7f8 fbed bl 80016b6 /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */ /* USER CODE END USB_OTG_FS_MspInit 1 */ } } 8008edc: bf00 nop 8008ede: 3780 adds r7, #128 @ 0x80 8008ee0: 46bd mov sp, r7 8008ee2: bd80 pop {r7, pc} 8008ee4: 40023800 .word 0x40023800 8008ee8: 40020000 .word 0x40020000 08008eec : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8008eec: b580 push {r7, lr} 8008eee: b082 sub sp, #8 8008ef0: af00 add r7, sp, #0 8008ef2: 6078 str r0, [r7, #4] USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); 8008ef4: 687b ldr r3, [r7, #4] 8008ef6: f8d3 24e0 ldr.w r2, [r3, #1248] @ 0x4e0 8008efa: 687b ldr r3, [r7, #4] 8008efc: f203 439c addw r3, r3, #1180 @ 0x49c 8008f00: 4619 mov r1, r3 8008f02: 4610 mov r0, r2 8008f04: f7fe fbcb bl 800769e } 8008f08: bf00 nop 8008f0a: 3708 adds r7, #8 8008f0c: 46bd mov sp, r7 8008f0e: bd80 pop {r7, pc} 08008f10 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8008f10: b580 push {r7, lr} 8008f12: b082 sub sp, #8 8008f14: af00 add r7, sp, #0 8008f16: 6078 str r0, [r7, #4] 8008f18: 460b mov r3, r1 8008f1a: 70fb strb r3, [r7, #3] USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); 8008f1c: 687b ldr r3, [r7, #4] 8008f1e: f8d3 04e0 ldr.w r0, [r3, #1248] @ 0x4e0 8008f22: 78fa ldrb r2, [r7, #3] 8008f24: 6879 ldr r1, [r7, #4] 8008f26: 4613 mov r3, r2 8008f28: 00db lsls r3, r3, #3 8008f2a: 4413 add r3, r2 8008f2c: 009b lsls r3, r3, #2 8008f2e: 440b add r3, r1 8008f30: f503 7318 add.w r3, r3, #608 @ 0x260 8008f34: 681a ldr r2, [r3, #0] 8008f36: 78fb ldrb r3, [r7, #3] 8008f38: 4619 mov r1, r3 8008f3a: f7fe fc05 bl 8007748 } 8008f3e: bf00 nop 8008f40: 3708 adds r7, #8 8008f42: 46bd mov sp, r7 8008f44: bd80 pop {r7, pc} 08008f46 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8008f46: b580 push {r7, lr} 8008f48: b082 sub sp, #8 8008f4a: af00 add r7, sp, #0 8008f4c: 6078 str r0, [r7, #4] 8008f4e: 460b mov r3, r1 8008f50: 70fb strb r3, [r7, #3] USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); 8008f52: 687b ldr r3, [r7, #4] 8008f54: f8d3 04e0 ldr.w r0, [r3, #1248] @ 0x4e0 8008f58: 78fa ldrb r2, [r7, #3] 8008f5a: 6879 ldr r1, [r7, #4] 8008f5c: 4613 mov r3, r2 8008f5e: 00db lsls r3, r3, #3 8008f60: 4413 add r3, r2 8008f62: 009b lsls r3, r3, #2 8008f64: 440b add r3, r1 8008f66: 3320 adds r3, #32 8008f68: 681a ldr r2, [r3, #0] 8008f6a: 78fb ldrb r3, [r7, #3] 8008f6c: 4619 mov r1, r3 8008f6e: f7fe fca7 bl 80078c0 } 8008f72: bf00 nop 8008f74: 3708 adds r7, #8 8008f76: 46bd mov sp, r7 8008f78: bd80 pop {r7, pc} 08008f7a : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8008f7a: b580 push {r7, lr} 8008f7c: b082 sub sp, #8 8008f7e: af00 add r7, sp, #0 8008f80: 6078 str r0, [r7, #4] USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); 8008f82: 687b ldr r3, [r7, #4] 8008f84: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 8008f88: 4618 mov r0, r3 8008f8a: f7fe fdeb bl 8007b64 } 8008f8e: bf00 nop 8008f90: 3708 adds r7, #8 8008f92: 46bd mov sp, r7 8008f94: bd80 pop {r7, pc} 08008f96 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8008f96: b580 push {r7, lr} 8008f98: b084 sub sp, #16 8008f9a: af00 add r7, sp, #0 8008f9c: 6078 str r0, [r7, #4] USBD_SpeedTypeDef speed = USBD_SPEED_FULL; 8008f9e: 2301 movs r3, #1 8008fa0: 73fb strb r3, [r7, #15] if ( hpcd->Init.speed == PCD_SPEED_HIGH) 8008fa2: 687b ldr r3, [r7, #4] 8008fa4: 79db ldrb r3, [r3, #7] 8008fa6: 2b00 cmp r3, #0 8008fa8: d102 bne.n 8008fb0 { speed = USBD_SPEED_HIGH; 8008faa: 2300 movs r3, #0 8008fac: 73fb strb r3, [r7, #15] 8008fae: e008 b.n 8008fc2 } else if ( hpcd->Init.speed == PCD_SPEED_FULL) 8008fb0: 687b ldr r3, [r7, #4] 8008fb2: 79db ldrb r3, [r3, #7] 8008fb4: 2b02 cmp r3, #2 8008fb6: d102 bne.n 8008fbe { speed = USBD_SPEED_FULL; 8008fb8: 2301 movs r3, #1 8008fba: 73fb strb r3, [r7, #15] 8008fbc: e001 b.n 8008fc2 } else { Error_Handler(); 8008fbe: f7f7 ff25 bl 8000e0c } /* Set Speed. */ USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); 8008fc2: 687b ldr r3, [r7, #4] 8008fc4: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 8008fc8: 7bfa ldrb r2, [r7, #15] 8008fca: 4611 mov r1, r2 8008fcc: 4618 mov r0, r3 8008fce: f7fe fd85 bl 8007adc /* Reset Device. */ USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); 8008fd2: 687b ldr r3, [r7, #4] 8008fd4: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 8008fd8: 4618 mov r0, r3 8008fda: f7fe fd2c bl 8007a36 } 8008fde: bf00 nop 8008fe0: 3710 adds r7, #16 8008fe2: 46bd mov sp, r7 8008fe4: bd80 pop {r7, pc} ... 08008fe8 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8008fe8: b580 push {r7, lr} 8008fea: b082 sub sp, #8 8008fec: af00 add r7, sp, #0 8008fee: 6078 str r0, [r7, #4] /* Inform USB library that core enters in suspend Mode. */ USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); 8008ff0: 687b ldr r3, [r7, #4] 8008ff2: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 8008ff6: 4618 mov r0, r3 8008ff8: f7fe fd80 bl 8007afc __HAL_PCD_GATE_PHYCLOCK(hpcd); 8008ffc: 687b ldr r3, [r7, #4] 8008ffe: 681b ldr r3, [r3, #0] 8009000: f503 6360 add.w r3, r3, #3584 @ 0xe00 8009004: 681b ldr r3, [r3, #0] 8009006: 687a ldr r2, [r7, #4] 8009008: 6812 ldr r2, [r2, #0] 800900a: f502 6260 add.w r2, r2, #3584 @ 0xe00 800900e: f043 0301 orr.w r3, r3, #1 8009012: 6013 str r3, [r2, #0] /* Enter in STOP mode. */ /* USER CODE BEGIN 2 */ if (hpcd->Init.low_power_enable) 8009014: 687b ldr r3, [r7, #4] 8009016: 7adb ldrb r3, [r3, #11] 8009018: 2b00 cmp r3, #0 800901a: d005 beq.n 8009028 { /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 800901c: 4b04 ldr r3, [pc, #16] @ (8009030 ) 800901e: 691b ldr r3, [r3, #16] 8009020: 4a03 ldr r2, [pc, #12] @ (8009030 ) 8009022: f043 0306 orr.w r3, r3, #6 8009026: 6113 str r3, [r2, #16] } /* USER CODE END 2 */ } 8009028: bf00 nop 800902a: 3708 adds r7, #8 800902c: 46bd mov sp, r7 800902e: bd80 pop {r7, pc} 8009030: e000ed00 .word 0xe000ed00 08009034 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8009034: b580 push {r7, lr} 8009036: b082 sub sp, #8 8009038: af00 add r7, sp, #0 800903a: 6078 str r0, [r7, #4] /* USER CODE BEGIN 3 */ /* USER CODE END 3 */ USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); 800903c: 687b ldr r3, [r7, #4] 800903e: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 8009042: 4618 mov r0, r3 8009044: f7fe fd76 bl 8007b34 } 8009048: bf00 nop 800904a: 3708 adds r7, #8 800904c: 46bd mov sp, r7 800904e: bd80 pop {r7, pc} 08009050 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8009050: b580 push {r7, lr} 8009052: b082 sub sp, #8 8009054: af00 add r7, sp, #0 8009056: 6078 str r0, [r7, #4] 8009058: 460b mov r3, r1 800905a: 70fb strb r3, [r7, #3] USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); 800905c: 687b ldr r3, [r7, #4] 800905e: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 8009062: 78fa ldrb r2, [r7, #3] 8009064: 4611 mov r1, r2 8009066: 4618 mov r0, r3 8009068: f7fe fdce bl 8007c08 } 800906c: bf00 nop 800906e: 3708 adds r7, #8 8009070: 46bd mov sp, r7 8009072: bd80 pop {r7, pc} 08009074 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8009074: b580 push {r7, lr} 8009076: b082 sub sp, #8 8009078: af00 add r7, sp, #0 800907a: 6078 str r0, [r7, #4] 800907c: 460b mov r3, r1 800907e: 70fb strb r3, [r7, #3] USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); 8009080: 687b ldr r3, [r7, #4] 8009082: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 8009086: 78fa ldrb r2, [r7, #3] 8009088: 4611 mov r1, r2 800908a: 4618 mov r0, r3 800908c: f7fe fd8a bl 8007ba4 } 8009090: bf00 nop 8009092: 3708 adds r7, #8 8009094: 46bd mov sp, r7 8009096: bd80 pop {r7, pc} 08009098 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8009098: b580 push {r7, lr} 800909a: b082 sub sp, #8 800909c: af00 add r7, sp, #0 800909e: 6078 str r0, [r7, #4] USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData); 80090a0: 687b ldr r3, [r7, #4] 80090a2: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 80090a6: 4618 mov r0, r3 80090a8: f7fe fde0 bl 8007c6c } 80090ac: bf00 nop 80090ae: 3708 adds r7, #8 80090b0: 46bd mov sp, r7 80090b2: bd80 pop {r7, pc} 080090b4 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 80090b4: b580 push {r7, lr} 80090b6: b082 sub sp, #8 80090b8: af00 add r7, sp, #0 80090ba: 6078 str r0, [r7, #4] USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData); 80090bc: 687b ldr r3, [r7, #4] 80090be: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 80090c2: 4618 mov r0, r3 80090c4: f7fe fddd bl 8007c82 } 80090c8: bf00 nop 80090ca: 3708 adds r7, #8 80090cc: 46bd mov sp, r7 80090ce: bd80 pop {r7, pc} 080090d0 : * @brief Initializes the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) { 80090d0: b580 push {r7, lr} 80090d2: b082 sub sp, #8 80090d4: af00 add r7, sp, #0 80090d6: 6078 str r0, [r7, #4] /* Init USB Ip. */ if (pdev->id == DEVICE_FS) { 80090d8: 687b ldr r3, [r7, #4] 80090da: 781b ldrb r3, [r3, #0] 80090dc: 2b00 cmp r3, #0 80090de: d13c bne.n 800915a /* Link the driver to the stack. */ hpcd_USB_OTG_FS.pData = pdev; 80090e0: 4a20 ldr r2, [pc, #128] @ (8009164 ) 80090e2: 687b ldr r3, [r7, #4] 80090e4: f8c2 34e0 str.w r3, [r2, #1248] @ 0x4e0 pdev->pData = &hpcd_USB_OTG_FS; 80090e8: 687b ldr r3, [r7, #4] 80090ea: 4a1e ldr r2, [pc, #120] @ (8009164 ) 80090ec: f8c3 22c8 str.w r2, [r3, #712] @ 0x2c8 hpcd_USB_OTG_FS.Instance = USB_OTG_FS; 80090f0: 4b1c ldr r3, [pc, #112] @ (8009164 ) 80090f2: f04f 42a0 mov.w r2, #1342177280 @ 0x50000000 80090f6: 601a str r2, [r3, #0] hpcd_USB_OTG_FS.Init.dev_endpoints = 6; 80090f8: 4b1a ldr r3, [pc, #104] @ (8009164 ) 80090fa: 2206 movs r2, #6 80090fc: 711a strb r2, [r3, #4] hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; 80090fe: 4b19 ldr r3, [pc, #100] @ (8009164 ) 8009100: 2202 movs r2, #2 8009102: 71da strb r2, [r3, #7] hpcd_USB_OTG_FS.Init.dma_enable = DISABLE; 8009104: 4b17 ldr r3, [pc, #92] @ (8009164 ) 8009106: 2200 movs r2, #0 8009108: 719a strb r2, [r3, #6] hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; 800910a: 4b16 ldr r3, [pc, #88] @ (8009164 ) 800910c: 2202 movs r2, #2 800910e: 725a strb r2, [r3, #9] hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE; 8009110: 4b14 ldr r3, [pc, #80] @ (8009164 ) 8009112: 2200 movs r2, #0 8009114: 729a strb r2, [r3, #10] hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; 8009116: 4b13 ldr r3, [pc, #76] @ (8009164 ) 8009118: 2200 movs r2, #0 800911a: 72da strb r2, [r3, #11] hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; 800911c: 4b11 ldr r3, [pc, #68] @ (8009164 ) 800911e: 2200 movs r2, #0 8009120: 731a strb r2, [r3, #12] hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE; 8009122: 4b10 ldr r3, [pc, #64] @ (8009164 ) 8009124: 2200 movs r2, #0 8009126: 739a strb r2, [r3, #14] hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; 8009128: 4b0e ldr r3, [pc, #56] @ (8009164 ) 800912a: 2200 movs r2, #0 800912c: 73da strb r2, [r3, #15] if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) 800912e: 480d ldr r0, [pc, #52] @ (8009164 ) 8009130: f7f8 fe6c bl 8001e0c 8009134: 4603 mov r3, r0 8009136: 2b00 cmp r3, #0 8009138: d001 beq.n 800913e { Error_Handler( ); 800913a: f7f7 fe67 bl 8000e0c HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_OTG_FS, PCD_DataOutStageCallback); HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_OTG_FS, PCD_DataInStageCallback); HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback); HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80); 800913e: 2180 movs r1, #128 @ 0x80 8009140: 4808 ldr r0, [pc, #32] @ (8009164 ) 8009142: f7fa f8b4 bl 80032ae HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40); 8009146: 2240 movs r2, #64 @ 0x40 8009148: 2100 movs r1, #0 800914a: 4806 ldr r0, [pc, #24] @ (8009164 ) 800914c: f7fa f868 bl 8003220 HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80); 8009150: 2280 movs r2, #128 @ 0x80 8009152: 2101 movs r1, #1 8009154: 4803 ldr r0, [pc, #12] @ (8009164 ) 8009156: f7fa f863 bl 8003220 } return USBD_OK; 800915a: 2300 movs r3, #0 } 800915c: 4618 mov r0, r3 800915e: 3708 adds r7, #8 8009160: 46bd mov sp, r7 8009162: bd80 pop {r7, pc} 8009164: 20000994 .word 0x20000994 08009168 : * @brief Starts the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) { 8009168: b580 push {r7, lr} 800916a: b084 sub sp, #16 800916c: af00 add r7, sp, #0 800916e: 6078 str r0, [r7, #4] HAL_StatusTypeDef hal_status = HAL_OK; 8009170: 2300 movs r3, #0 8009172: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 8009174: 2300 movs r3, #0 8009176: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_Start(pdev->pData); 8009178: 687b ldr r3, [r7, #4] 800917a: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 800917e: 4618 mov r0, r3 8009180: f7f8 ff5a bl 8002038 8009184: 4603 mov r3, r0 8009186: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 8009188: 7bfb ldrb r3, [r7, #15] 800918a: 4618 mov r0, r3 800918c: f000 f97e bl 800948c 8009190: 4603 mov r3, r0 8009192: 73bb strb r3, [r7, #14] return usb_status; 8009194: 7bbb ldrb r3, [r7, #14] } 8009196: 4618 mov r0, r3 8009198: 3710 adds r7, #16 800919a: 46bd mov sp, r7 800919c: bd80 pop {r7, pc} 0800919e : * @param ep_type: Endpoint type * @param ep_mps: Endpoint max packet size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) { 800919e: b580 push {r7, lr} 80091a0: b084 sub sp, #16 80091a2: af00 add r7, sp, #0 80091a4: 6078 str r0, [r7, #4] 80091a6: 4608 mov r0, r1 80091a8: 4611 mov r1, r2 80091aa: 461a mov r2, r3 80091ac: 4603 mov r3, r0 80091ae: 70fb strb r3, [r7, #3] 80091b0: 460b mov r3, r1 80091b2: 70bb strb r3, [r7, #2] 80091b4: 4613 mov r3, r2 80091b6: 803b strh r3, [r7, #0] HAL_StatusTypeDef hal_status = HAL_OK; 80091b8: 2300 movs r3, #0 80091ba: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 80091bc: 2300 movs r3, #0 80091be: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); 80091c0: 687b ldr r3, [r7, #4] 80091c2: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8 80091c6: 78bb ldrb r3, [r7, #2] 80091c8: 883a ldrh r2, [r7, #0] 80091ca: 78f9 ldrb r1, [r7, #3] 80091cc: f7f9 fc5b bl 8002a86 80091d0: 4603 mov r3, r0 80091d2: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 80091d4: 7bfb ldrb r3, [r7, #15] 80091d6: 4618 mov r0, r3 80091d8: f000 f958 bl 800948c 80091dc: 4603 mov r3, r0 80091de: 73bb strb r3, [r7, #14] return usb_status; 80091e0: 7bbb ldrb r3, [r7, #14] } 80091e2: 4618 mov r0, r3 80091e4: 3710 adds r7, #16 80091e6: 46bd mov sp, r7 80091e8: bd80 pop {r7, pc} 080091ea : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 80091ea: b580 push {r7, lr} 80091ec: b084 sub sp, #16 80091ee: af00 add r7, sp, #0 80091f0: 6078 str r0, [r7, #4] 80091f2: 460b mov r3, r1 80091f4: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 80091f6: 2300 movs r3, #0 80091f8: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 80091fa: 2300 movs r3, #0 80091fc: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); 80091fe: 687b ldr r3, [r7, #4] 8009200: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 8009204: 78fa ldrb r2, [r7, #3] 8009206: 4611 mov r1, r2 8009208: 4618 mov r0, r3 800920a: f7f9 fca6 bl 8002b5a 800920e: 4603 mov r3, r0 8009210: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 8009212: 7bfb ldrb r3, [r7, #15] 8009214: 4618 mov r0, r3 8009216: f000 f939 bl 800948c 800921a: 4603 mov r3, r0 800921c: 73bb strb r3, [r7, #14] return usb_status; 800921e: 7bbb ldrb r3, [r7, #14] } 8009220: 4618 mov r0, r3 8009222: 3710 adds r7, #16 8009224: 46bd mov sp, r7 8009226: bd80 pop {r7, pc} 08009228 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 8009228: b580 push {r7, lr} 800922a: b084 sub sp, #16 800922c: af00 add r7, sp, #0 800922e: 6078 str r0, [r7, #4] 8009230: 460b mov r3, r1 8009232: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 8009234: 2300 movs r3, #0 8009236: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 8009238: 2300 movs r3, #0 800923a: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); 800923c: 687b ldr r3, [r7, #4] 800923e: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 8009242: 78fa ldrb r2, [r7, #3] 8009244: 4611 mov r1, r2 8009246: 4618 mov r0, r3 8009248: f7f9 fd46 bl 8002cd8 800924c: 4603 mov r3, r0 800924e: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 8009250: 7bfb ldrb r3, [r7, #15] 8009252: 4618 mov r0, r3 8009254: f000 f91a bl 800948c 8009258: 4603 mov r3, r0 800925a: 73bb strb r3, [r7, #14] return usb_status; 800925c: 7bbb ldrb r3, [r7, #14] } 800925e: 4618 mov r0, r3 8009260: 3710 adds r7, #16 8009262: 46bd mov sp, r7 8009264: bd80 pop {r7, pc} 08009266 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 8009266: b580 push {r7, lr} 8009268: b084 sub sp, #16 800926a: af00 add r7, sp, #0 800926c: 6078 str r0, [r7, #4] 800926e: 460b mov r3, r1 8009270: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 8009272: 2300 movs r3, #0 8009274: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 8009276: 2300 movs r3, #0 8009278: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); 800927a: 687b ldr r3, [r7, #4] 800927c: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 8009280: 78fa ldrb r2, [r7, #3] 8009282: 4611 mov r1, r2 8009284: 4618 mov r0, r3 8009286: f7f9 fd8a bl 8002d9e 800928a: 4603 mov r3, r0 800928c: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800928e: 7bfb ldrb r3, [r7, #15] 8009290: 4618 mov r0, r3 8009292: f000 f8fb bl 800948c 8009296: 4603 mov r3, r0 8009298: 73bb strb r3, [r7, #14] return usb_status; 800929a: 7bbb ldrb r3, [r7, #14] } 800929c: 4618 mov r0, r3 800929e: 3710 adds r7, #16 80092a0: 46bd mov sp, r7 80092a2: bd80 pop {r7, pc} 080092a4 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Stall (1: Yes, 0: No) */ uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 80092a4: b480 push {r7} 80092a6: b085 sub sp, #20 80092a8: af00 add r7, sp, #0 80092aa: 6078 str r0, [r7, #4] 80092ac: 460b mov r3, r1 80092ae: 70fb strb r3, [r7, #3] PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; 80092b0: 687b ldr r3, [r7, #4] 80092b2: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 80092b6: 60fb str r3, [r7, #12] if((ep_addr & 0x80) == 0x80) 80092b8: f997 3003 ldrsb.w r3, [r7, #3] 80092bc: 2b00 cmp r3, #0 80092be: da0b bge.n 80092d8 { return hpcd->IN_ep[ep_addr & 0x7F].is_stall; 80092c0: 78fb ldrb r3, [r7, #3] 80092c2: f003 027f and.w r2, r3, #127 @ 0x7f 80092c6: 68f9 ldr r1, [r7, #12] 80092c8: 4613 mov r3, r2 80092ca: 00db lsls r3, r3, #3 80092cc: 4413 add r3, r2 80092ce: 009b lsls r3, r3, #2 80092d0: 440b add r3, r1 80092d2: 3316 adds r3, #22 80092d4: 781b ldrb r3, [r3, #0] 80092d6: e00b b.n 80092f0 } else { return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; 80092d8: 78fb ldrb r3, [r7, #3] 80092da: f003 027f and.w r2, r3, #127 @ 0x7f 80092de: 68f9 ldr r1, [r7, #12] 80092e0: 4613 mov r3, r2 80092e2: 00db lsls r3, r3, #3 80092e4: 4413 add r3, r2 80092e6: 009b lsls r3, r3, #2 80092e8: 440b add r3, r1 80092ea: f203 2356 addw r3, r3, #598 @ 0x256 80092ee: 781b ldrb r3, [r3, #0] } } 80092f0: 4618 mov r0, r3 80092f2: 3714 adds r7, #20 80092f4: 46bd mov sp, r7 80092f6: f85d 7b04 ldr.w r7, [sp], #4 80092fa: 4770 bx lr 080092fc : * @param pdev: Device handle * @param dev_addr: Device address * @retval USBD status */ USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) { 80092fc: b580 push {r7, lr} 80092fe: b084 sub sp, #16 8009300: af00 add r7, sp, #0 8009302: 6078 str r0, [r7, #4] 8009304: 460b mov r3, r1 8009306: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 8009308: 2300 movs r3, #0 800930a: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800930c: 2300 movs r3, #0 800930e: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); 8009310: 687b ldr r3, [r7, #4] 8009312: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 8009316: 78fa ldrb r2, [r7, #3] 8009318: 4611 mov r1, r2 800931a: 4618 mov r0, r3 800931c: f7f9 fb8f bl 8002a3e 8009320: 4603 mov r3, r0 8009322: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 8009324: 7bfb ldrb r3, [r7, #15] 8009326: 4618 mov r0, r3 8009328: f000 f8b0 bl 800948c 800932c: 4603 mov r3, r0 800932e: 73bb strb r3, [r7, #14] return usb_status; 8009330: 7bbb ldrb r3, [r7, #14] } 8009332: 4618 mov r0, r3 8009334: 3710 adds r7, #16 8009336: 46bd mov sp, r7 8009338: bd80 pop {r7, pc} 0800933a : * @param pbuf: Pointer to data to be sent * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size) { 800933a: b580 push {r7, lr} 800933c: b086 sub sp, #24 800933e: af00 add r7, sp, #0 8009340: 60f8 str r0, [r7, #12] 8009342: 607a str r2, [r7, #4] 8009344: 603b str r3, [r7, #0] 8009346: 460b mov r3, r1 8009348: 72fb strb r3, [r7, #11] HAL_StatusTypeDef hal_status = HAL_OK; 800934a: 2300 movs r3, #0 800934c: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 800934e: 2300 movs r3, #0 8009350: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); 8009352: 68fb ldr r3, [r7, #12] 8009354: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8 8009358: 7af9 ldrb r1, [r7, #11] 800935a: 683b ldr r3, [r7, #0] 800935c: 687a ldr r2, [r7, #4] 800935e: f7f9 fc81 bl 8002c64 8009362: 4603 mov r3, r0 8009364: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 8009366: 7dfb ldrb r3, [r7, #23] 8009368: 4618 mov r0, r3 800936a: f000 f88f bl 800948c 800936e: 4603 mov r3, r0 8009370: 75bb strb r3, [r7, #22] return usb_status; 8009372: 7dbb ldrb r3, [r7, #22] } 8009374: 4618 mov r0, r3 8009376: 3718 adds r7, #24 8009378: 46bd mov sp, r7 800937a: bd80 pop {r7, pc} 0800937c : * @param pbuf: Pointer to data to be received * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size) { 800937c: b580 push {r7, lr} 800937e: b086 sub sp, #24 8009380: af00 add r7, sp, #0 8009382: 60f8 str r0, [r7, #12] 8009384: 607a str r2, [r7, #4] 8009386: 603b str r3, [r7, #0] 8009388: 460b mov r3, r1 800938a: 72fb strb r3, [r7, #11] HAL_StatusTypeDef hal_status = HAL_OK; 800938c: 2300 movs r3, #0 800938e: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 8009390: 2300 movs r3, #0 8009392: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); 8009394: 68fb ldr r3, [r7, #12] 8009396: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8 800939a: 7af9 ldrb r1, [r7, #11] 800939c: 683b ldr r3, [r7, #0] 800939e: 687a ldr r2, [r7, #4] 80093a0: f7f9 fc25 bl 8002bee 80093a4: 4603 mov r3, r0 80093a6: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 80093a8: 7dfb ldrb r3, [r7, #23] 80093aa: 4618 mov r0, r3 80093ac: f000 f86e bl 800948c 80093b0: 4603 mov r3, r0 80093b2: 75bb strb r3, [r7, #22] return usb_status; 80093b4: 7dbb ldrb r3, [r7, #22] } 80093b6: 4618 mov r0, r3 80093b8: 3718 adds r7, #24 80093ba: 46bd mov sp, r7 80093bc: bd80 pop {r7, pc} ... 080093c0 : * @param hpcd: PCD handle * @param msg: LPM message * @retval None */ void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) { 80093c0: b580 push {r7, lr} 80093c2: b082 sub sp, #8 80093c4: af00 add r7, sp, #0 80093c6: 6078 str r0, [r7, #4] 80093c8: 460b mov r3, r1 80093ca: 70fb strb r3, [r7, #3] switch (msg) 80093cc: 78fb ldrb r3, [r7, #3] 80093ce: 2b00 cmp r3, #0 80093d0: d002 beq.n 80093d8 80093d2: 2b01 cmp r3, #1 80093d4: d01f beq.n 8009416 /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); } break; } } 80093d6: e03b b.n 8009450 if (hpcd->Init.low_power_enable) 80093d8: 687b ldr r3, [r7, #4] 80093da: 7adb ldrb r3, [r3, #11] 80093dc: 2b00 cmp r3, #0 80093de: d007 beq.n 80093f0 SystemClock_Config(); 80093e0: f7f7 f938 bl 8000654 SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 80093e4: 4b1c ldr r3, [pc, #112] @ (8009458 ) 80093e6: 691b ldr r3, [r3, #16] 80093e8: 4a1b ldr r2, [pc, #108] @ (8009458 ) 80093ea: f023 0306 bic.w r3, r3, #6 80093ee: 6113 str r3, [r2, #16] __HAL_PCD_UNGATE_PHYCLOCK(hpcd); 80093f0: 687b ldr r3, [r7, #4] 80093f2: 681b ldr r3, [r3, #0] 80093f4: f503 6360 add.w r3, r3, #3584 @ 0xe00 80093f8: 681b ldr r3, [r3, #0] 80093fa: 687a ldr r2, [r7, #4] 80093fc: 6812 ldr r2, [r2, #0] 80093fe: f502 6260 add.w r2, r2, #3584 @ 0xe00 8009402: f023 0301 bic.w r3, r3, #1 8009406: 6013 str r3, [r2, #0] USBD_LL_Resume(hpcd->pData); 8009408: 687b ldr r3, [r7, #4] 800940a: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 800940e: 4618 mov r0, r3 8009410: f7fe fb90 bl 8007b34 break; 8009414: e01c b.n 8009450 __HAL_PCD_GATE_PHYCLOCK(hpcd); 8009416: 687b ldr r3, [r7, #4] 8009418: 681b ldr r3, [r3, #0] 800941a: f503 6360 add.w r3, r3, #3584 @ 0xe00 800941e: 681b ldr r3, [r3, #0] 8009420: 687a ldr r2, [r7, #4] 8009422: 6812 ldr r2, [r2, #0] 8009424: f502 6260 add.w r2, r2, #3584 @ 0xe00 8009428: f043 0301 orr.w r3, r3, #1 800942c: 6013 str r3, [r2, #0] USBD_LL_Suspend(hpcd->pData); 800942e: 687b ldr r3, [r7, #4] 8009430: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 8009434: 4618 mov r0, r3 8009436: f7fe fb61 bl 8007afc if (hpcd->Init.low_power_enable) 800943a: 687b ldr r3, [r7, #4] 800943c: 7adb ldrb r3, [r3, #11] 800943e: 2b00 cmp r3, #0 8009440: d005 beq.n 800944e SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 8009442: 4b05 ldr r3, [pc, #20] @ (8009458 ) 8009444: 691b ldr r3, [r3, #16] 8009446: 4a04 ldr r2, [pc, #16] @ (8009458 ) 8009448: f043 0306 orr.w r3, r3, #6 800944c: 6113 str r3, [r2, #16] break; 800944e: bf00 nop } 8009450: bf00 nop 8009452: 3708 adds r7, #8 8009454: 46bd mov sp, r7 8009456: bd80 pop {r7, pc} 8009458: e000ed00 .word 0xe000ed00 0800945c : * @brief Static single allocation. * @param size: Size of allocated memory * @retval None */ void *USBD_static_malloc(uint32_t size) { 800945c: b480 push {r7} 800945e: b083 sub sp, #12 8009460: af00 add r7, sp, #0 8009462: 6078 str r0, [r7, #4] static uint32_t mem[(sizeof(USBD_HID_HandleTypeDef)/4)+1];/* On 32-bit boundary */ return mem; 8009464: 4b03 ldr r3, [pc, #12] @ (8009474 ) } 8009466: 4618 mov r0, r3 8009468: 370c adds r7, #12 800946a: 46bd mov sp, r7 800946c: f85d 7b04 ldr.w r7, [sp], #4 8009470: 4770 bx lr 8009472: bf00 nop 8009474: 20000e78 .word 0x20000e78 08009478 : * @brief Dummy memory free * @param p: Pointer to allocated memory address * @retval None */ void USBD_static_free(void *p) { 8009478: b480 push {r7} 800947a: b083 sub sp, #12 800947c: af00 add r7, sp, #0 800947e: 6078 str r0, [r7, #4] } 8009480: bf00 nop 8009482: 370c adds r7, #12 8009484: 46bd mov sp, r7 8009486: f85d 7b04 ldr.w r7, [sp], #4 800948a: 4770 bx lr 0800948c : * @brief Returns the USB status depending on the HAL status: * @param hal_status: HAL status * @retval USB status */ USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status) { 800948c: b480 push {r7} 800948e: b085 sub sp, #20 8009490: af00 add r7, sp, #0 8009492: 4603 mov r3, r0 8009494: 71fb strb r3, [r7, #7] USBD_StatusTypeDef usb_status = USBD_OK; 8009496: 2300 movs r3, #0 8009498: 73fb strb r3, [r7, #15] switch (hal_status) 800949a: 79fb ldrb r3, [r7, #7] 800949c: 2b03 cmp r3, #3 800949e: d817 bhi.n 80094d0 80094a0: a201 add r2, pc, #4 @ (adr r2, 80094a8 ) 80094a2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80094a6: bf00 nop 80094a8: 080094b9 .word 0x080094b9 80094ac: 080094bf .word 0x080094bf 80094b0: 080094c5 .word 0x080094c5 80094b4: 080094cb .word 0x080094cb { case HAL_OK : usb_status = USBD_OK; 80094b8: 2300 movs r3, #0 80094ba: 73fb strb r3, [r7, #15] break; 80094bc: e00b b.n 80094d6 case HAL_ERROR : usb_status = USBD_FAIL; 80094be: 2303 movs r3, #3 80094c0: 73fb strb r3, [r7, #15] break; 80094c2: e008 b.n 80094d6 case HAL_BUSY : usb_status = USBD_BUSY; 80094c4: 2301 movs r3, #1 80094c6: 73fb strb r3, [r7, #15] break; 80094c8: e005 b.n 80094d6 case HAL_TIMEOUT : usb_status = USBD_FAIL; 80094ca: 2303 movs r3, #3 80094cc: 73fb strb r3, [r7, #15] break; 80094ce: e002 b.n 80094d6 default : usb_status = USBD_FAIL; 80094d0: 2303 movs r3, #3 80094d2: 73fb strb r3, [r7, #15] break; 80094d4: bf00 nop } return usb_status; 80094d6: 7bfb ldrb r3, [r7, #15] } 80094d8: 4618 mov r0, r3 80094da: 3714 adds r7, #20 80094dc: 46bd mov sp, r7 80094de: f85d 7b04 ldr.w r7, [sp], #4 80094e2: 4770 bx lr 080094e4 : 80094e4: 4402 add r2, r0 80094e6: 4603 mov r3, r0 80094e8: 4293 cmp r3, r2 80094ea: d100 bne.n 80094ee 80094ec: 4770 bx lr 80094ee: f803 1b01 strb.w r1, [r3], #1 80094f2: e7f9 b.n 80094e8 080094f4 <__libc_init_array>: 80094f4: b570 push {r4, r5, r6, lr} 80094f6: 4d0d ldr r5, [pc, #52] @ (800952c <__libc_init_array+0x38>) 80094f8: 4c0d ldr r4, [pc, #52] @ (8009530 <__libc_init_array+0x3c>) 80094fa: 1b64 subs r4, r4, r5 80094fc: 10a4 asrs r4, r4, #2 80094fe: 2600 movs r6, #0 8009500: 42a6 cmp r6, r4 8009502: d109 bne.n 8009518 <__libc_init_array+0x24> 8009504: 4d0b ldr r5, [pc, #44] @ (8009534 <__libc_init_array+0x40>) 8009506: 4c0c ldr r4, [pc, #48] @ (8009538 <__libc_init_array+0x44>) 8009508: f000 f818 bl 800953c <_init> 800950c: 1b64 subs r4, r4, r5 800950e: 10a4 asrs r4, r4, #2 8009510: 2600 movs r6, #0 8009512: 42a6 cmp r6, r4 8009514: d105 bne.n 8009522 <__libc_init_array+0x2e> 8009516: bd70 pop {r4, r5, r6, pc} 8009518: f855 3b04 ldr.w r3, [r5], #4 800951c: 4798 blx r3 800951e: 3601 adds r6, #1 8009520: e7ee b.n 8009500 <__libc_init_array+0xc> 8009522: f855 3b04 ldr.w r3, [r5], #4 8009526: 4798 blx r3 8009528: 3601 adds r6, #1 800952a: e7f2 b.n 8009512 <__libc_init_array+0x1e> 800952c: 080095b0 .word 0x080095b0 8009530: 080095b0 .word 0x080095b0 8009534: 080095b0 .word 0x080095b0 8009538: 080095b4 .word 0x080095b4 0800953c <_init>: 800953c: b5f8 push {r3, r4, r5, r6, r7, lr} 800953e: bf00 nop 8009540: bcf8 pop {r3, r4, r5, r6, r7} 8009542: bc08 pop {r3} 8009544: 469e mov lr, r3 8009546: 4770 bx lr 08009548 <_fini>: 8009548: b5f8 push {r3, r4, r5, r6, r7, lr} 800954a: bf00 nop 800954c: bcf8 pop {r3, r4, r5, r6, r7} 800954e: bc08 pop {r3} 8009550: 469e mov lr, r3 8009552: 4770 bx lr