modularkbd.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001c4 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00008858 080001c4 080001c4 000011c4 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00000054 08008a1c 08008a1c 00009a1c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 08008a70 08008a70 0000a120 2**0 CONTENTS, READONLY 4 .ARM 00000008 08008a70 08008a70 00009a70 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 08008a78 08008a78 0000a120 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 08008a78 08008a78 00009a78 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 08008a7c 08008a7c 00009a7c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 00000120 20000000 08008a80 0000a000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 00000c4c 20000120 08008ba0 0000a120 2**2 ALLOC 10 ._user_heap_stack 00000604 20000d6c 08008ba0 0000ad6c 2**0 ALLOC 11 .ARM.attributes 00000030 00000000 00000000 0000a120 2**0 CONTENTS, READONLY 12 .debug_info 00018840 00000000 00000000 0000a150 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 000035c3 00000000 00000000 00022990 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 000015e8 00000000 00000000 00025f58 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 0000111c 00000000 00000000 00027540 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 00024d01 00000000 00000000 0002865c 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0001af7a 00000000 00000000 0004d35d 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000d71df 00000000 00000000 000682d7 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 0013f4b6 2**0 CONTENTS, READONLY 20 .debug_frame 00005dc8 00000000 00000000 0013f4fc 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 00000062 00000000 00000000 001452c4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080001c4 <__do_global_dtors_aux>: 80001c4: b510 push {r4, lr} 80001c6: 4c05 ldr r4, [pc, #20] @ (80001dc <__do_global_dtors_aux+0x18>) 80001c8: 7823 ldrb r3, [r4, #0] 80001ca: b933 cbnz r3, 80001da <__do_global_dtors_aux+0x16> 80001cc: 4b04 ldr r3, [pc, #16] @ (80001e0 <__do_global_dtors_aux+0x1c>) 80001ce: b113 cbz r3, 80001d6 <__do_global_dtors_aux+0x12> 80001d0: 4804 ldr r0, [pc, #16] @ (80001e4 <__do_global_dtors_aux+0x20>) 80001d2: f3af 8000 nop.w 80001d6: 2301 movs r3, #1 80001d8: 7023 strb r3, [r4, #0] 80001da: bd10 pop {r4, pc} 80001dc: 20000120 .word 0x20000120 80001e0: 00000000 .word 0x00000000 80001e4: 08008a04 .word 0x08008a04 080001e8 : 80001e8: b508 push {r3, lr} 80001ea: 4b03 ldr r3, [pc, #12] @ (80001f8 ) 80001ec: b11b cbz r3, 80001f6 80001ee: 4903 ldr r1, [pc, #12] @ (80001fc ) 80001f0: 4803 ldr r0, [pc, #12] @ (8000200 ) 80001f2: f3af 8000 nop.w 80001f6: bd08 pop {r3, pc} 80001f8: 00000000 .word 0x00000000 80001fc: 20000124 .word 0x20000124 8000200: 08008a04 .word 0x08008a04 08000204 <__aeabi_uldivmod>: 8000204: b953 cbnz r3, 800021c <__aeabi_uldivmod+0x18> 8000206: b94a cbnz r2, 800021c <__aeabi_uldivmod+0x18> 8000208: 2900 cmp r1, #0 800020a: bf08 it eq 800020c: 2800 cmpeq r0, #0 800020e: bf1c itt ne 8000210: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff 8000214: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 8000218: f000 b988 b.w 800052c <__aeabi_idiv0> 800021c: f1ad 0c08 sub.w ip, sp, #8 8000220: e96d ce04 strd ip, lr, [sp, #-16]! 8000224: f000 f806 bl 8000234 <__udivmoddi4> 8000228: f8dd e004 ldr.w lr, [sp, #4] 800022c: e9dd 2302 ldrd r2, r3, [sp, #8] 8000230: b004 add sp, #16 8000232: 4770 bx lr 08000234 <__udivmoddi4>: 8000234: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8000238: 9d08 ldr r5, [sp, #32] 800023a: 468e mov lr, r1 800023c: 4604 mov r4, r0 800023e: 4688 mov r8, r1 8000240: 2b00 cmp r3, #0 8000242: d14a bne.n 80002da <__udivmoddi4+0xa6> 8000244: 428a cmp r2, r1 8000246: 4617 mov r7, r2 8000248: d962 bls.n 8000310 <__udivmoddi4+0xdc> 800024a: fab2 f682 clz r6, r2 800024e: b14e cbz r6, 8000264 <__udivmoddi4+0x30> 8000250: f1c6 0320 rsb r3, r6, #32 8000254: fa01 f806 lsl.w r8, r1, r6 8000258: fa20 f303 lsr.w r3, r0, r3 800025c: 40b7 lsls r7, r6 800025e: ea43 0808 orr.w r8, r3, r8 8000262: 40b4 lsls r4, r6 8000264: ea4f 4e17 mov.w lr, r7, lsr #16 8000268: fa1f fc87 uxth.w ip, r7 800026c: fbb8 f1fe udiv r1, r8, lr 8000270: 0c23 lsrs r3, r4, #16 8000272: fb0e 8811 mls r8, lr, r1, r8 8000276: ea43 4308 orr.w r3, r3, r8, lsl #16 800027a: fb01 f20c mul.w r2, r1, ip 800027e: 429a cmp r2, r3 8000280: d909 bls.n 8000296 <__udivmoddi4+0x62> 8000282: 18fb adds r3, r7, r3 8000284: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff 8000288: f080 80ea bcs.w 8000460 <__udivmoddi4+0x22c> 800028c: 429a cmp r2, r3 800028e: f240 80e7 bls.w 8000460 <__udivmoddi4+0x22c> 8000292: 3902 subs r1, #2 8000294: 443b add r3, r7 8000296: 1a9a subs r2, r3, r2 8000298: b2a3 uxth r3, r4 800029a: fbb2 f0fe udiv r0, r2, lr 800029e: fb0e 2210 mls r2, lr, r0, r2 80002a2: ea43 4302 orr.w r3, r3, r2, lsl #16 80002a6: fb00 fc0c mul.w ip, r0, ip 80002aa: 459c cmp ip, r3 80002ac: d909 bls.n 80002c2 <__udivmoddi4+0x8e> 80002ae: 18fb adds r3, r7, r3 80002b0: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff 80002b4: f080 80d6 bcs.w 8000464 <__udivmoddi4+0x230> 80002b8: 459c cmp ip, r3 80002ba: f240 80d3 bls.w 8000464 <__udivmoddi4+0x230> 80002be: 443b add r3, r7 80002c0: 3802 subs r0, #2 80002c2: ea40 4001 orr.w r0, r0, r1, lsl #16 80002c6: eba3 030c sub.w r3, r3, ip 80002ca: 2100 movs r1, #0 80002cc: b11d cbz r5, 80002d6 <__udivmoddi4+0xa2> 80002ce: 40f3 lsrs r3, r6 80002d0: 2200 movs r2, #0 80002d2: e9c5 3200 strd r3, r2, [r5] 80002d6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80002da: 428b cmp r3, r1 80002dc: d905 bls.n 80002ea <__udivmoddi4+0xb6> 80002de: b10d cbz r5, 80002e4 <__udivmoddi4+0xb0> 80002e0: e9c5 0100 strd r0, r1, [r5] 80002e4: 2100 movs r1, #0 80002e6: 4608 mov r0, r1 80002e8: e7f5 b.n 80002d6 <__udivmoddi4+0xa2> 80002ea: fab3 f183 clz r1, r3 80002ee: 2900 cmp r1, #0 80002f0: d146 bne.n 8000380 <__udivmoddi4+0x14c> 80002f2: 4573 cmp r3, lr 80002f4: d302 bcc.n 80002fc <__udivmoddi4+0xc8> 80002f6: 4282 cmp r2, r0 80002f8: f200 8105 bhi.w 8000506 <__udivmoddi4+0x2d2> 80002fc: 1a84 subs r4, r0, r2 80002fe: eb6e 0203 sbc.w r2, lr, r3 8000302: 2001 movs r0, #1 8000304: 4690 mov r8, r2 8000306: 2d00 cmp r5, #0 8000308: d0e5 beq.n 80002d6 <__udivmoddi4+0xa2> 800030a: e9c5 4800 strd r4, r8, [r5] 800030e: e7e2 b.n 80002d6 <__udivmoddi4+0xa2> 8000310: 2a00 cmp r2, #0 8000312: f000 8090 beq.w 8000436 <__udivmoddi4+0x202> 8000316: fab2 f682 clz r6, r2 800031a: 2e00 cmp r6, #0 800031c: f040 80a4 bne.w 8000468 <__udivmoddi4+0x234> 8000320: 1a8a subs r2, r1, r2 8000322: 0c03 lsrs r3, r0, #16 8000324: ea4f 4e17 mov.w lr, r7, lsr #16 8000328: b280 uxth r0, r0 800032a: b2bc uxth r4, r7 800032c: 2101 movs r1, #1 800032e: fbb2 fcfe udiv ip, r2, lr 8000332: fb0e 221c mls r2, lr, ip, r2 8000336: ea43 4302 orr.w r3, r3, r2, lsl #16 800033a: fb04 f20c mul.w r2, r4, ip 800033e: 429a cmp r2, r3 8000340: d907 bls.n 8000352 <__udivmoddi4+0x11e> 8000342: 18fb adds r3, r7, r3 8000344: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff 8000348: d202 bcs.n 8000350 <__udivmoddi4+0x11c> 800034a: 429a cmp r2, r3 800034c: f200 80e0 bhi.w 8000510 <__udivmoddi4+0x2dc> 8000350: 46c4 mov ip, r8 8000352: 1a9b subs r3, r3, r2 8000354: fbb3 f2fe udiv r2, r3, lr 8000358: fb0e 3312 mls r3, lr, r2, r3 800035c: ea40 4303 orr.w r3, r0, r3, lsl #16 8000360: fb02 f404 mul.w r4, r2, r4 8000364: 429c cmp r4, r3 8000366: d907 bls.n 8000378 <__udivmoddi4+0x144> 8000368: 18fb adds r3, r7, r3 800036a: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff 800036e: d202 bcs.n 8000376 <__udivmoddi4+0x142> 8000370: 429c cmp r4, r3 8000372: f200 80ca bhi.w 800050a <__udivmoddi4+0x2d6> 8000376: 4602 mov r2, r0 8000378: 1b1b subs r3, r3, r4 800037a: ea42 400c orr.w r0, r2, ip, lsl #16 800037e: e7a5 b.n 80002cc <__udivmoddi4+0x98> 8000380: f1c1 0620 rsb r6, r1, #32 8000384: 408b lsls r3, r1 8000386: fa22 f706 lsr.w r7, r2, r6 800038a: 431f orrs r7, r3 800038c: fa0e f401 lsl.w r4, lr, r1 8000390: fa20 f306 lsr.w r3, r0, r6 8000394: fa2e fe06 lsr.w lr, lr, r6 8000398: ea4f 4917 mov.w r9, r7, lsr #16 800039c: 4323 orrs r3, r4 800039e: fa00 f801 lsl.w r8, r0, r1 80003a2: fa1f fc87 uxth.w ip, r7 80003a6: fbbe f0f9 udiv r0, lr, r9 80003aa: 0c1c lsrs r4, r3, #16 80003ac: fb09 ee10 mls lr, r9, r0, lr 80003b0: ea44 440e orr.w r4, r4, lr, lsl #16 80003b4: fb00 fe0c mul.w lr, r0, ip 80003b8: 45a6 cmp lr, r4 80003ba: fa02 f201 lsl.w r2, r2, r1 80003be: d909 bls.n 80003d4 <__udivmoddi4+0x1a0> 80003c0: 193c adds r4, r7, r4 80003c2: f100 3aff add.w sl, r0, #4294967295 @ 0xffffffff 80003c6: f080 809c bcs.w 8000502 <__udivmoddi4+0x2ce> 80003ca: 45a6 cmp lr, r4 80003cc: f240 8099 bls.w 8000502 <__udivmoddi4+0x2ce> 80003d0: 3802 subs r0, #2 80003d2: 443c add r4, r7 80003d4: eba4 040e sub.w r4, r4, lr 80003d8: fa1f fe83 uxth.w lr, r3 80003dc: fbb4 f3f9 udiv r3, r4, r9 80003e0: fb09 4413 mls r4, r9, r3, r4 80003e4: ea4e 4404 orr.w r4, lr, r4, lsl #16 80003e8: fb03 fc0c mul.w ip, r3, ip 80003ec: 45a4 cmp ip, r4 80003ee: d908 bls.n 8000402 <__udivmoddi4+0x1ce> 80003f0: 193c adds r4, r7, r4 80003f2: f103 3eff add.w lr, r3, #4294967295 @ 0xffffffff 80003f6: f080 8082 bcs.w 80004fe <__udivmoddi4+0x2ca> 80003fa: 45a4 cmp ip, r4 80003fc: d97f bls.n 80004fe <__udivmoddi4+0x2ca> 80003fe: 3b02 subs r3, #2 8000400: 443c add r4, r7 8000402: ea43 4000 orr.w r0, r3, r0, lsl #16 8000406: eba4 040c sub.w r4, r4, ip 800040a: fba0 ec02 umull lr, ip, r0, r2 800040e: 4564 cmp r4, ip 8000410: 4673 mov r3, lr 8000412: 46e1 mov r9, ip 8000414: d362 bcc.n 80004dc <__udivmoddi4+0x2a8> 8000416: d05f beq.n 80004d8 <__udivmoddi4+0x2a4> 8000418: b15d cbz r5, 8000432 <__udivmoddi4+0x1fe> 800041a: ebb8 0203 subs.w r2, r8, r3 800041e: eb64 0409 sbc.w r4, r4, r9 8000422: fa04 f606 lsl.w r6, r4, r6 8000426: fa22 f301 lsr.w r3, r2, r1 800042a: 431e orrs r6, r3 800042c: 40cc lsrs r4, r1 800042e: e9c5 6400 strd r6, r4, [r5] 8000432: 2100 movs r1, #0 8000434: e74f b.n 80002d6 <__udivmoddi4+0xa2> 8000436: fbb1 fcf2 udiv ip, r1, r2 800043a: 0c01 lsrs r1, r0, #16 800043c: ea41 410e orr.w r1, r1, lr, lsl #16 8000440: b280 uxth r0, r0 8000442: ea40 4201 orr.w r2, r0, r1, lsl #16 8000446: 463b mov r3, r7 8000448: 4638 mov r0, r7 800044a: 463c mov r4, r7 800044c: 46b8 mov r8, r7 800044e: 46be mov lr, r7 8000450: 2620 movs r6, #32 8000452: fbb1 f1f7 udiv r1, r1, r7 8000456: eba2 0208 sub.w r2, r2, r8 800045a: ea41 410c orr.w r1, r1, ip, lsl #16 800045e: e766 b.n 800032e <__udivmoddi4+0xfa> 8000460: 4601 mov r1, r0 8000462: e718 b.n 8000296 <__udivmoddi4+0x62> 8000464: 4610 mov r0, r2 8000466: e72c b.n 80002c2 <__udivmoddi4+0x8e> 8000468: f1c6 0220 rsb r2, r6, #32 800046c: fa2e f302 lsr.w r3, lr, r2 8000470: 40b7 lsls r7, r6 8000472: 40b1 lsls r1, r6 8000474: fa20 f202 lsr.w r2, r0, r2 8000478: ea4f 4e17 mov.w lr, r7, lsr #16 800047c: 430a orrs r2, r1 800047e: fbb3 f8fe udiv r8, r3, lr 8000482: b2bc uxth r4, r7 8000484: fb0e 3318 mls r3, lr, r8, r3 8000488: 0c11 lsrs r1, r2, #16 800048a: ea41 4103 orr.w r1, r1, r3, lsl #16 800048e: fb08 f904 mul.w r9, r8, r4 8000492: 40b0 lsls r0, r6 8000494: 4589 cmp r9, r1 8000496: ea4f 4310 mov.w r3, r0, lsr #16 800049a: b280 uxth r0, r0 800049c: d93e bls.n 800051c <__udivmoddi4+0x2e8> 800049e: 1879 adds r1, r7, r1 80004a0: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff 80004a4: d201 bcs.n 80004aa <__udivmoddi4+0x276> 80004a6: 4589 cmp r9, r1 80004a8: d81f bhi.n 80004ea <__udivmoddi4+0x2b6> 80004aa: eba1 0109 sub.w r1, r1, r9 80004ae: fbb1 f9fe udiv r9, r1, lr 80004b2: fb09 f804 mul.w r8, r9, r4 80004b6: fb0e 1119 mls r1, lr, r9, r1 80004ba: b292 uxth r2, r2 80004bc: ea42 4201 orr.w r2, r2, r1, lsl #16 80004c0: 4542 cmp r2, r8 80004c2: d229 bcs.n 8000518 <__udivmoddi4+0x2e4> 80004c4: 18ba adds r2, r7, r2 80004c6: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff 80004ca: d2c4 bcs.n 8000456 <__udivmoddi4+0x222> 80004cc: 4542 cmp r2, r8 80004ce: d2c2 bcs.n 8000456 <__udivmoddi4+0x222> 80004d0: f1a9 0102 sub.w r1, r9, #2 80004d4: 443a add r2, r7 80004d6: e7be b.n 8000456 <__udivmoddi4+0x222> 80004d8: 45f0 cmp r8, lr 80004da: d29d bcs.n 8000418 <__udivmoddi4+0x1e4> 80004dc: ebbe 0302 subs.w r3, lr, r2 80004e0: eb6c 0c07 sbc.w ip, ip, r7 80004e4: 3801 subs r0, #1 80004e6: 46e1 mov r9, ip 80004e8: e796 b.n 8000418 <__udivmoddi4+0x1e4> 80004ea: eba7 0909 sub.w r9, r7, r9 80004ee: 4449 add r1, r9 80004f0: f1a8 0c02 sub.w ip, r8, #2 80004f4: fbb1 f9fe udiv r9, r1, lr 80004f8: fb09 f804 mul.w r8, r9, r4 80004fc: e7db b.n 80004b6 <__udivmoddi4+0x282> 80004fe: 4673 mov r3, lr 8000500: e77f b.n 8000402 <__udivmoddi4+0x1ce> 8000502: 4650 mov r0, sl 8000504: e766 b.n 80003d4 <__udivmoddi4+0x1a0> 8000506: 4608 mov r0, r1 8000508: e6fd b.n 8000306 <__udivmoddi4+0xd2> 800050a: 443b add r3, r7 800050c: 3a02 subs r2, #2 800050e: e733 b.n 8000378 <__udivmoddi4+0x144> 8000510: f1ac 0c02 sub.w ip, ip, #2 8000514: 443b add r3, r7 8000516: e71c b.n 8000352 <__udivmoddi4+0x11e> 8000518: 4649 mov r1, r9 800051a: e79c b.n 8000456 <__udivmoddi4+0x222> 800051c: eba1 0109 sub.w r1, r1, r9 8000520: 46c4 mov ip, r8 8000522: fbb1 f9fe udiv r9, r1, lr 8000526: fb09 f804 mul.w r8, r9, r4 800052a: e7c4 b.n 80004b6 <__udivmoddi4+0x282> 0800052c <__aeabi_idiv0>: 800052c: 4770 bx lr 800052e: bf00 nop 08000530
: /** * @brief The application entry point. * @retval int */ int main(void) { 8000530: b580 push {r7, lr} 8000532: af00 add r7, sp, #0 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8000534: f000 fda8 bl 8001088 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8000538: f000 f826 bl 8000588 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 800053c: f000 fa3c bl 80009b8 MX_TIM2_Init(); 8000540: f000 f8bc bl 80006bc MX_TIM3_Init(); 8000544: f000 f912 bl 800076c MX_UART4_Init(); 8000548: f000 f964 bl 8000814 MX_UART5_Init(); 800054c: f000 f98c bl 8000868 MX_USART1_UART_Init(); 8000550: f000 f9b4 bl 80008bc MX_USART2_UART_Init(); 8000554: f000 f9dc bl 8000910 MX_I2C1_Init(); 8000558: f000 f882 bl 8000660 MX_USART3_UART_Init(); 800055c: f000 fa02 bl 8000964 MX_USB_DEVICE_Init(); 8000560: f007 fd76 bl 8008050 /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { USBREPORT.KEYCODE1 = 0x0A; 8000564: 4b06 ldr r3, [pc, #24] @ (8000580 ) 8000566: 220a movs r2, #10 8000568: 709a strb r2, [r3, #2] USBD_HID_SendReport(&hUsbDeviceFS, &USBREPORT, sizeof(USBREPORT)); 800056a: 2208 movs r2, #8 800056c: 4904 ldr r1, [pc, #16] @ (8000580 ) 800056e: 4805 ldr r0, [pc, #20] @ (8000584 ) 8000570: f006 f9a2 bl 80068b8 HAL_Delay(1000); 8000574: f44f 707a mov.w r0, #1000 @ 0x3e8 8000578: f000 fdf8 bl 800116c USBREPORT.KEYCODE1 = 0x0A; 800057c: bf00 nop 800057e: e7f1 b.n 8000564 8000580: 2000013c .word 0x2000013c 8000584: 20000398 .word 0x20000398 08000588 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 8000588: b580 push {r7, lr} 800058a: b094 sub sp, #80 @ 0x50 800058c: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 800058e: f107 031c add.w r3, r7, #28 8000592: 2234 movs r2, #52 @ 0x34 8000594: 2100 movs r1, #0 8000596: 4618 mov r0, r3 8000598: f008 fa08 bl 80089ac RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 800059c: f107 0308 add.w r3, r7, #8 80005a0: 2200 movs r2, #0 80005a2: 601a str r2, [r3, #0] 80005a4: 605a str r2, [r3, #4] 80005a6: 609a str r2, [r3, #8] 80005a8: 60da str r2, [r3, #12] 80005aa: 611a str r2, [r3, #16] /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); 80005ac: 2300 movs r3, #0 80005ae: 607b str r3, [r7, #4] 80005b0: 4b29 ldr r3, [pc, #164] @ (8000658 ) 80005b2: 6c1b ldr r3, [r3, #64] @ 0x40 80005b4: 4a28 ldr r2, [pc, #160] @ (8000658 ) 80005b6: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80005ba: 6413 str r3, [r2, #64] @ 0x40 80005bc: 4b26 ldr r3, [pc, #152] @ (8000658 ) 80005be: 6c1b ldr r3, [r3, #64] @ 0x40 80005c0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80005c4: 607b str r3, [r7, #4] 80005c6: 687b ldr r3, [r7, #4] __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3); 80005c8: 2300 movs r3, #0 80005ca: 603b str r3, [r7, #0] 80005cc: 4b23 ldr r3, [pc, #140] @ (800065c ) 80005ce: 681b ldr r3, [r3, #0] 80005d0: f423 4340 bic.w r3, r3, #49152 @ 0xc000 80005d4: 4a21 ldr r2, [pc, #132] @ (800065c ) 80005d6: f443 4380 orr.w r3, r3, #16384 @ 0x4000 80005da: 6013 str r3, [r2, #0] 80005dc: 4b1f ldr r3, [pc, #124] @ (800065c ) 80005de: 681b ldr r3, [r3, #0] 80005e0: f403 4340 and.w r3, r3, #49152 @ 0xc000 80005e4: 603b str r3, [r7, #0] 80005e6: 683b ldr r3, [r7, #0] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 80005e8: 2301 movs r3, #1 80005ea: 61fb str r3, [r7, #28] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 80005ec: f44f 3380 mov.w r3, #65536 @ 0x10000 80005f0: 623b str r3, [r7, #32] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 80005f2: 2302 movs r3, #2 80005f4: 637b str r3, [r7, #52] @ 0x34 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 80005f6: f44f 0380 mov.w r3, #4194304 @ 0x400000 80005fa: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.PLL.PLLM = 4; 80005fc: 2304 movs r3, #4 80005fe: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLN = 96; 8000600: 2360 movs r3, #96 @ 0x60 8000602: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 8000604: 2302 movs r3, #2 8000606: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.PLL.PLLQ = 4; 8000608: 2304 movs r3, #4 800060a: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.PLL.PLLR = 2; 800060c: 2302 movs r3, #2 800060e: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8000610: f107 031c add.w r3, r7, #28 8000614: 4618 mov r0, r3 8000616: f003 facb bl 8003bb0 800061a: 4603 mov r3, r0 800061c: 2b00 cmp r3, #0 800061e: d001 beq.n 8000624 { Error_Handler(); 8000620: f000 fa6a bl 8000af8 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8000624: 230f movs r3, #15 8000626: 60bb str r3, [r7, #8] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8000628: 2302 movs r3, #2 800062a: 60fb str r3, [r7, #12] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2; 800062c: 2380 movs r3, #128 @ 0x80 800062e: 613b str r3, [r7, #16] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; 8000630: f44f 5380 mov.w r3, #4096 @ 0x1000 8000634: 617b str r3, [r7, #20] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 8000636: 2300 movs r3, #0 8000638: 61bb str r3, [r7, #24] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) 800063a: f107 0308 add.w r3, r7, #8 800063e: 2101 movs r1, #1 8000640: 4618 mov r0, r3 8000642: f002 fc41 bl 8002ec8 8000646: 4603 mov r3, r0 8000648: 2b00 cmp r3, #0 800064a: d001 beq.n 8000650 { Error_Handler(); 800064c: f000 fa54 bl 8000af8 } } 8000650: bf00 nop 8000652: 3750 adds r7, #80 @ 0x50 8000654: 46bd mov sp, r7 8000656: bd80 pop {r7, pc} 8000658: 40023800 .word 0x40023800 800065c: 40007000 .word 0x40007000 08000660 : * @brief I2C1 Initialization Function * @param None * @retval None */ static void MX_I2C1_Init(void) { 8000660: b580 push {r7, lr} 8000662: af00 add r7, sp, #0 /* USER CODE END I2C1_Init 0 */ /* USER CODE BEGIN I2C1_Init 1 */ /* USER CODE END I2C1_Init 1 */ hi2c1.Instance = I2C1; 8000664: 4b12 ldr r3, [pc, #72] @ (80006b0 ) 8000666: 4a13 ldr r2, [pc, #76] @ (80006b4 ) 8000668: 601a str r2, [r3, #0] hi2c1.Init.ClockSpeed = 100000; 800066a: 4b11 ldr r3, [pc, #68] @ (80006b0 ) 800066c: 4a12 ldr r2, [pc, #72] @ (80006b8 ) 800066e: 605a str r2, [r3, #4] hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2; 8000670: 4b0f ldr r3, [pc, #60] @ (80006b0 ) 8000672: 2200 movs r2, #0 8000674: 609a str r2, [r3, #8] hi2c1.Init.OwnAddress1 = 0; 8000676: 4b0e ldr r3, [pc, #56] @ (80006b0 ) 8000678: 2200 movs r2, #0 800067a: 60da str r2, [r3, #12] hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 800067c: 4b0c ldr r3, [pc, #48] @ (80006b0 ) 800067e: f44f 4280 mov.w r2, #16384 @ 0x4000 8000682: 611a str r2, [r3, #16] hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 8000684: 4b0a ldr r3, [pc, #40] @ (80006b0 ) 8000686: 2200 movs r2, #0 8000688: 615a str r2, [r3, #20] hi2c1.Init.OwnAddress2 = 0; 800068a: 4b09 ldr r3, [pc, #36] @ (80006b0 ) 800068c: 2200 movs r2, #0 800068e: 619a str r2, [r3, #24] hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 8000690: 4b07 ldr r3, [pc, #28] @ (80006b0 ) 8000692: 2200 movs r2, #0 8000694: 61da str r2, [r3, #28] hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 8000696: 4b06 ldr r3, [pc, #24] @ (80006b0 ) 8000698: 2200 movs r2, #0 800069a: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c1) != HAL_OK) 800069c: 4804 ldr r0, [pc, #16] @ (80006b0 ) 800069e: f001 f849 bl 8001734 80006a2: 4603 mov r3, r0 80006a4: 2b00 cmp r3, #0 80006a6: d001 beq.n 80006ac { Error_Handler(); 80006a8: f000 fa26 bl 8000af8 } /* USER CODE BEGIN I2C1_Init 2 */ /* USER CODE END I2C1_Init 2 */ } 80006ac: bf00 nop 80006ae: bd80 pop {r7, pc} 80006b0: 20000144 .word 0x20000144 80006b4: 40005400 .word 0x40005400 80006b8: 000186a0 .word 0x000186a0 080006bc : * @brief TIM2 Initialization Function * @param None * @retval None */ static void MX_TIM2_Init(void) { 80006bc: b580 push {r7, lr} 80006be: b08a sub sp, #40 @ 0x28 80006c0: af00 add r7, sp, #0 /* USER CODE BEGIN TIM2_Init 0 */ /* USER CODE END TIM2_Init 0 */ TIM_MasterConfigTypeDef sMasterConfig = {0}; 80006c2: f107 0320 add.w r3, r7, #32 80006c6: 2200 movs r2, #0 80006c8: 601a str r2, [r3, #0] 80006ca: 605a str r2, [r3, #4] TIM_OC_InitTypeDef sConfigOC = {0}; 80006cc: 1d3b adds r3, r7, #4 80006ce: 2200 movs r2, #0 80006d0: 601a str r2, [r3, #0] 80006d2: 605a str r2, [r3, #4] 80006d4: 609a str r2, [r3, #8] 80006d6: 60da str r2, [r3, #12] 80006d8: 611a str r2, [r3, #16] 80006da: 615a str r2, [r3, #20] 80006dc: 619a str r2, [r3, #24] /* USER CODE BEGIN TIM2_Init 1 */ /* USER CODE END TIM2_Init 1 */ htim2.Instance = TIM2; 80006de: 4b22 ldr r3, [pc, #136] @ (8000768 ) 80006e0: f04f 4280 mov.w r2, #1073741824 @ 0x40000000 80006e4: 601a str r2, [r3, #0] htim2.Init.Prescaler = 0; 80006e6: 4b20 ldr r3, [pc, #128] @ (8000768 ) 80006e8: 2200 movs r2, #0 80006ea: 605a str r2, [r3, #4] htim2.Init.CounterMode = TIM_COUNTERMODE_UP; 80006ec: 4b1e ldr r3, [pc, #120] @ (8000768 ) 80006ee: 2200 movs r2, #0 80006f0: 609a str r2, [r3, #8] htim2.Init.Period = 4294967295; 80006f2: 4b1d ldr r3, [pc, #116] @ (8000768 ) 80006f4: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80006f8: 60da str r2, [r3, #12] htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 80006fa: 4b1b ldr r3, [pc, #108] @ (8000768 ) 80006fc: 2200 movs r2, #0 80006fe: 611a str r2, [r3, #16] htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8000700: 4b19 ldr r3, [pc, #100] @ (8000768 ) 8000702: 2200 movs r2, #0 8000704: 619a str r2, [r3, #24] if (HAL_TIM_OC_Init(&htim2) != HAL_OK) 8000706: 4818 ldr r0, [pc, #96] @ (8000768 ) 8000708: f003 fcf0 bl 80040ec 800070c: 4603 mov r3, r0 800070e: 2b00 cmp r3, #0 8000710: d001 beq.n 8000716 { Error_Handler(); 8000712: f000 f9f1 bl 8000af8 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 8000716: 2300 movs r3, #0 8000718: 623b str r3, [r7, #32] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 800071a: 2300 movs r3, #0 800071c: 627b str r3, [r7, #36] @ 0x24 if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK) 800071e: f107 0320 add.w r3, r7, #32 8000722: 4619 mov r1, r3 8000724: 4810 ldr r0, [pc, #64] @ (8000768 ) 8000726: f004 f889 bl 800483c 800072a: 4603 mov r3, r0 800072c: 2b00 cmp r3, #0 800072e: d001 beq.n 8000734 { Error_Handler(); 8000730: f000 f9e2 bl 8000af8 } sConfigOC.OCMode = TIM_OCMODE_FORCED_ACTIVE; 8000734: 2350 movs r3, #80 @ 0x50 8000736: 607b str r3, [r7, #4] sConfigOC.Pulse = 0; 8000738: 2300 movs r3, #0 800073a: 60bb str r3, [r7, #8] sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; 800073c: 2300 movs r3, #0 800073e: 60fb str r3, [r7, #12] sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; 8000740: 2300 movs r3, #0 8000742: 617b str r3, [r7, #20] if (HAL_TIM_OC_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) 8000744: 1d3b adds r3, r7, #4 8000746: 2200 movs r2, #0 8000748: 4619 mov r1, r3 800074a: 4807 ldr r0, [pc, #28] @ (8000768 ) 800074c: f003 fdc4 bl 80042d8 8000750: 4603 mov r3, r0 8000752: 2b00 cmp r3, #0 8000754: d001 beq.n 800075a { Error_Handler(); 8000756: f000 f9cf bl 8000af8 } /* USER CODE BEGIN TIM2_Init 2 */ /* USER CODE END TIM2_Init 2 */ HAL_TIM_MspPostInit(&htim2); 800075a: 4803 ldr r0, [pc, #12] @ (8000768 ) 800075c: f000 faaa bl 8000cb4 } 8000760: bf00 nop 8000762: 3728 adds r7, #40 @ 0x28 8000764: 46bd mov sp, r7 8000766: bd80 pop {r7, pc} 8000768: 20000198 .word 0x20000198 0800076c : * @brief TIM3 Initialization Function * @param None * @retval None */ static void MX_TIM3_Init(void) { 800076c: b580 push {r7, lr} 800076e: b08c sub sp, #48 @ 0x30 8000770: af00 add r7, sp, #0 /* USER CODE BEGIN TIM3_Init 0 */ /* USER CODE END TIM3_Init 0 */ TIM_Encoder_InitTypeDef sConfig = {0}; 8000772: f107 030c add.w r3, r7, #12 8000776: 2224 movs r2, #36 @ 0x24 8000778: 2100 movs r1, #0 800077a: 4618 mov r0, r3 800077c: f008 f916 bl 80089ac TIM_MasterConfigTypeDef sMasterConfig = {0}; 8000780: 1d3b adds r3, r7, #4 8000782: 2200 movs r2, #0 8000784: 601a str r2, [r3, #0] 8000786: 605a str r2, [r3, #4] /* USER CODE BEGIN TIM3_Init 1 */ /* USER CODE END TIM3_Init 1 */ htim3.Instance = TIM3; 8000788: 4b20 ldr r3, [pc, #128] @ (800080c ) 800078a: 4a21 ldr r2, [pc, #132] @ (8000810 ) 800078c: 601a str r2, [r3, #0] htim3.Init.Prescaler = 0; 800078e: 4b1f ldr r3, [pc, #124] @ (800080c ) 8000790: 2200 movs r2, #0 8000792: 605a str r2, [r3, #4] htim3.Init.CounterMode = TIM_COUNTERMODE_UP; 8000794: 4b1d ldr r3, [pc, #116] @ (800080c ) 8000796: 2200 movs r2, #0 8000798: 609a str r2, [r3, #8] htim3.Init.Period = 65535; 800079a: 4b1c ldr r3, [pc, #112] @ (800080c ) 800079c: f64f 72ff movw r2, #65535 @ 0xffff 80007a0: 60da str r2, [r3, #12] htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; 80007a2: 4b1a ldr r3, [pc, #104] @ (800080c ) 80007a4: 2200 movs r2, #0 80007a6: 611a str r2, [r3, #16] htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 80007a8: 4b18 ldr r3, [pc, #96] @ (800080c ) 80007aa: 2200 movs r2, #0 80007ac: 619a str r2, [r3, #24] sConfig.EncoderMode = TIM_ENCODERMODE_TI1; 80007ae: 2301 movs r3, #1 80007b0: 60fb str r3, [r7, #12] sConfig.IC1Polarity = TIM_ICPOLARITY_RISING; 80007b2: 2300 movs r3, #0 80007b4: 613b str r3, [r7, #16] sConfig.IC1Selection = TIM_ICSELECTION_DIRECTTI; 80007b6: 2301 movs r3, #1 80007b8: 617b str r3, [r7, #20] sConfig.IC1Prescaler = TIM_ICPSC_DIV1; 80007ba: 2300 movs r3, #0 80007bc: 61bb str r3, [r7, #24] sConfig.IC1Filter = 0; 80007be: 2300 movs r3, #0 80007c0: 61fb str r3, [r7, #28] sConfig.IC2Polarity = TIM_ICPOLARITY_RISING; 80007c2: 2300 movs r3, #0 80007c4: 623b str r3, [r7, #32] sConfig.IC2Selection = TIM_ICSELECTION_DIRECTTI; 80007c6: 2301 movs r3, #1 80007c8: 627b str r3, [r7, #36] @ 0x24 sConfig.IC2Prescaler = TIM_ICPSC_DIV1; 80007ca: 2300 movs r3, #0 80007cc: 62bb str r3, [r7, #40] @ 0x28 sConfig.IC2Filter = 0; 80007ce: 2300 movs r3, #0 80007d0: 62fb str r3, [r7, #44] @ 0x2c if (HAL_TIM_Encoder_Init(&htim3, &sConfig) != HAL_OK) 80007d2: f107 030c add.w r3, r7, #12 80007d6: 4619 mov r1, r3 80007d8: 480c ldr r0, [pc, #48] @ (800080c ) 80007da: f003 fcd6 bl 800418a 80007de: 4603 mov r3, r0 80007e0: 2b00 cmp r3, #0 80007e2: d001 beq.n 80007e8 { Error_Handler(); 80007e4: f000 f988 bl 8000af8 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; 80007e8: 2300 movs r3, #0 80007ea: 607b str r3, [r7, #4] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; 80007ec: 2300 movs r3, #0 80007ee: 60bb str r3, [r7, #8] if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK) 80007f0: 1d3b adds r3, r7, #4 80007f2: 4619 mov r1, r3 80007f4: 4805 ldr r0, [pc, #20] @ (800080c ) 80007f6: f004 f821 bl 800483c 80007fa: 4603 mov r3, r0 80007fc: 2b00 cmp r3, #0 80007fe: d001 beq.n 8000804 { Error_Handler(); 8000800: f000 f97a bl 8000af8 } /* USER CODE BEGIN TIM3_Init 2 */ /* USER CODE END TIM3_Init 2 */ } 8000804: bf00 nop 8000806: 3730 adds r7, #48 @ 0x30 8000808: 46bd mov sp, r7 800080a: bd80 pop {r7, pc} 800080c: 200001e0 .word 0x200001e0 8000810: 40000400 .word 0x40000400 08000814 : * @brief UART4 Initialization Function * @param None * @retval None */ static void MX_UART4_Init(void) { 8000814: b580 push {r7, lr} 8000816: af00 add r7, sp, #0 /* USER CODE END UART4_Init 0 */ /* USER CODE BEGIN UART4_Init 1 */ /* USER CODE END UART4_Init 1 */ huart4.Instance = UART4; 8000818: 4b11 ldr r3, [pc, #68] @ (8000860 ) 800081a: 4a12 ldr r2, [pc, #72] @ (8000864 ) 800081c: 601a str r2, [r3, #0] huart4.Init.BaudRate = 115200; 800081e: 4b10 ldr r3, [pc, #64] @ (8000860 ) 8000820: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8000824: 605a str r2, [r3, #4] huart4.Init.WordLength = UART_WORDLENGTH_8B; 8000826: 4b0e ldr r3, [pc, #56] @ (8000860 ) 8000828: 2200 movs r2, #0 800082a: 609a str r2, [r3, #8] huart4.Init.StopBits = UART_STOPBITS_1; 800082c: 4b0c ldr r3, [pc, #48] @ (8000860 ) 800082e: 2200 movs r2, #0 8000830: 60da str r2, [r3, #12] huart4.Init.Parity = UART_PARITY_NONE; 8000832: 4b0b ldr r3, [pc, #44] @ (8000860 ) 8000834: 2200 movs r2, #0 8000836: 611a str r2, [r3, #16] huart4.Init.Mode = UART_MODE_TX_RX; 8000838: 4b09 ldr r3, [pc, #36] @ (8000860 ) 800083a: 220c movs r2, #12 800083c: 615a str r2, [r3, #20] huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800083e: 4b08 ldr r3, [pc, #32] @ (8000860 ) 8000840: 2200 movs r2, #0 8000842: 619a str r2, [r3, #24] huart4.Init.OverSampling = UART_OVERSAMPLING_16; 8000844: 4b06 ldr r3, [pc, #24] @ (8000860 ) 8000846: 2200 movs r2, #0 8000848: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart4) != HAL_OK) 800084a: 4805 ldr r0, [pc, #20] @ (8000860 ) 800084c: f004 f872 bl 8004934 8000850: 4603 mov r3, r0 8000852: 2b00 cmp r3, #0 8000854: d001 beq.n 800085a { Error_Handler(); 8000856: f000 f94f bl 8000af8 } /* USER CODE BEGIN UART4_Init 2 */ /* USER CODE END UART4_Init 2 */ } 800085a: bf00 nop 800085c: bd80 pop {r7, pc} 800085e: bf00 nop 8000860: 20000228 .word 0x20000228 8000864: 40004c00 .word 0x40004c00 08000868 : * @brief UART5 Initialization Function * @param None * @retval None */ static void MX_UART5_Init(void) { 8000868: b580 push {r7, lr} 800086a: af00 add r7, sp, #0 /* USER CODE END UART5_Init 0 */ /* USER CODE BEGIN UART5_Init 1 */ /* USER CODE END UART5_Init 1 */ huart5.Instance = UART5; 800086c: 4b11 ldr r3, [pc, #68] @ (80008b4 ) 800086e: 4a12 ldr r2, [pc, #72] @ (80008b8 ) 8000870: 601a str r2, [r3, #0] huart5.Init.BaudRate = 115200; 8000872: 4b10 ldr r3, [pc, #64] @ (80008b4 ) 8000874: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8000878: 605a str r2, [r3, #4] huart5.Init.WordLength = UART_WORDLENGTH_8B; 800087a: 4b0e ldr r3, [pc, #56] @ (80008b4 ) 800087c: 2200 movs r2, #0 800087e: 609a str r2, [r3, #8] huart5.Init.StopBits = UART_STOPBITS_1; 8000880: 4b0c ldr r3, [pc, #48] @ (80008b4 ) 8000882: 2200 movs r2, #0 8000884: 60da str r2, [r3, #12] huart5.Init.Parity = UART_PARITY_NONE; 8000886: 4b0b ldr r3, [pc, #44] @ (80008b4 ) 8000888: 2200 movs r2, #0 800088a: 611a str r2, [r3, #16] huart5.Init.Mode = UART_MODE_TX_RX; 800088c: 4b09 ldr r3, [pc, #36] @ (80008b4 ) 800088e: 220c movs r2, #12 8000890: 615a str r2, [r3, #20] huart5.Init.HwFlowCtl = UART_HWCONTROL_NONE; 8000892: 4b08 ldr r3, [pc, #32] @ (80008b4 ) 8000894: 2200 movs r2, #0 8000896: 619a str r2, [r3, #24] huart5.Init.OverSampling = UART_OVERSAMPLING_16; 8000898: 4b06 ldr r3, [pc, #24] @ (80008b4 ) 800089a: 2200 movs r2, #0 800089c: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart5) != HAL_OK) 800089e: 4805 ldr r0, [pc, #20] @ (80008b4 ) 80008a0: f004 f848 bl 8004934 80008a4: 4603 mov r3, r0 80008a6: 2b00 cmp r3, #0 80008a8: d001 beq.n 80008ae { Error_Handler(); 80008aa: f000 f925 bl 8000af8 } /* USER CODE BEGIN UART5_Init 2 */ /* USER CODE END UART5_Init 2 */ } 80008ae: bf00 nop 80008b0: bd80 pop {r7, pc} 80008b2: bf00 nop 80008b4: 20000270 .word 0x20000270 80008b8: 40005000 .word 0x40005000 080008bc : * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { 80008bc: b580 push {r7, lr} 80008be: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; 80008c0: 4b11 ldr r3, [pc, #68] @ (8000908 ) 80008c2: 4a12 ldr r2, [pc, #72] @ (800090c ) 80008c4: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; 80008c6: 4b10 ldr r3, [pc, #64] @ (8000908 ) 80008c8: f44f 32e1 mov.w r2, #115200 @ 0x1c200 80008cc: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; 80008ce: 4b0e ldr r3, [pc, #56] @ (8000908 ) 80008d0: 2200 movs r2, #0 80008d2: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; 80008d4: 4b0c ldr r3, [pc, #48] @ (8000908 ) 80008d6: 2200 movs r2, #0 80008d8: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; 80008da: 4b0b ldr r3, [pc, #44] @ (8000908 ) 80008dc: 2200 movs r2, #0 80008de: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; 80008e0: 4b09 ldr r3, [pc, #36] @ (8000908 ) 80008e2: 220c movs r2, #12 80008e4: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; 80008e6: 4b08 ldr r3, [pc, #32] @ (8000908 ) 80008e8: 2200 movs r2, #0 80008ea: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; 80008ec: 4b06 ldr r3, [pc, #24] @ (8000908 ) 80008ee: 2200 movs r2, #0 80008f0: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart1) != HAL_OK) 80008f2: 4805 ldr r0, [pc, #20] @ (8000908 ) 80008f4: f004 f81e bl 8004934 80008f8: 4603 mov r3, r0 80008fa: 2b00 cmp r3, #0 80008fc: d001 beq.n 8000902 { Error_Handler(); 80008fe: f000 f8fb bl 8000af8 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } 8000902: bf00 nop 8000904: bd80 pop {r7, pc} 8000906: bf00 nop 8000908: 200002b8 .word 0x200002b8 800090c: 40011000 .word 0x40011000 08000910 : * @brief USART2 Initialization Function * @param None * @retval None */ static void MX_USART2_UART_Init(void) { 8000910: b580 push {r7, lr} 8000912: af00 add r7, sp, #0 /* USER CODE END USART2_Init 0 */ /* USER CODE BEGIN USART2_Init 1 */ /* USER CODE END USART2_Init 1 */ huart2.Instance = USART2; 8000914: 4b11 ldr r3, [pc, #68] @ (800095c ) 8000916: 4a12 ldr r2, [pc, #72] @ (8000960 ) 8000918: 601a str r2, [r3, #0] huart2.Init.BaudRate = 115200; 800091a: 4b10 ldr r3, [pc, #64] @ (800095c ) 800091c: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8000920: 605a str r2, [r3, #4] huart2.Init.WordLength = UART_WORDLENGTH_8B; 8000922: 4b0e ldr r3, [pc, #56] @ (800095c ) 8000924: 2200 movs r2, #0 8000926: 609a str r2, [r3, #8] huart2.Init.StopBits = UART_STOPBITS_1; 8000928: 4b0c ldr r3, [pc, #48] @ (800095c ) 800092a: 2200 movs r2, #0 800092c: 60da str r2, [r3, #12] huart2.Init.Parity = UART_PARITY_NONE; 800092e: 4b0b ldr r3, [pc, #44] @ (800095c ) 8000930: 2200 movs r2, #0 8000932: 611a str r2, [r3, #16] huart2.Init.Mode = UART_MODE_TX_RX; 8000934: 4b09 ldr r3, [pc, #36] @ (800095c ) 8000936: 220c movs r2, #12 8000938: 615a str r2, [r3, #20] huart2.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800093a: 4b08 ldr r3, [pc, #32] @ (800095c ) 800093c: 2200 movs r2, #0 800093e: 619a str r2, [r3, #24] huart2.Init.OverSampling = UART_OVERSAMPLING_16; 8000940: 4b06 ldr r3, [pc, #24] @ (800095c ) 8000942: 2200 movs r2, #0 8000944: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart2) != HAL_OK) 8000946: 4805 ldr r0, [pc, #20] @ (800095c ) 8000948: f003 fff4 bl 8004934 800094c: 4603 mov r3, r0 800094e: 2b00 cmp r3, #0 8000950: d001 beq.n 8000956 { Error_Handler(); 8000952: f000 f8d1 bl 8000af8 } /* USER CODE BEGIN USART2_Init 2 */ /* USER CODE END USART2_Init 2 */ } 8000956: bf00 nop 8000958: bd80 pop {r7, pc} 800095a: bf00 nop 800095c: 20000300 .word 0x20000300 8000960: 40004400 .word 0x40004400 08000964 : * @brief USART3 Initialization Function * @param None * @retval None */ static void MX_USART3_UART_Init(void) { 8000964: b580 push {r7, lr} 8000966: af00 add r7, sp, #0 /* USER CODE END USART3_Init 0 */ /* USER CODE BEGIN USART3_Init 1 */ /* USER CODE END USART3_Init 1 */ huart3.Instance = USART3; 8000968: 4b11 ldr r3, [pc, #68] @ (80009b0 ) 800096a: 4a12 ldr r2, [pc, #72] @ (80009b4 ) 800096c: 601a str r2, [r3, #0] huart3.Init.BaudRate = 115200; 800096e: 4b10 ldr r3, [pc, #64] @ (80009b0 ) 8000970: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8000974: 605a str r2, [r3, #4] huart3.Init.WordLength = UART_WORDLENGTH_8B; 8000976: 4b0e ldr r3, [pc, #56] @ (80009b0 ) 8000978: 2200 movs r2, #0 800097a: 609a str r2, [r3, #8] huart3.Init.StopBits = UART_STOPBITS_1; 800097c: 4b0c ldr r3, [pc, #48] @ (80009b0 ) 800097e: 2200 movs r2, #0 8000980: 60da str r2, [r3, #12] huart3.Init.Parity = UART_PARITY_NONE; 8000982: 4b0b ldr r3, [pc, #44] @ (80009b0 ) 8000984: 2200 movs r2, #0 8000986: 611a str r2, [r3, #16] huart3.Init.Mode = UART_MODE_TX_RX; 8000988: 4b09 ldr r3, [pc, #36] @ (80009b0 ) 800098a: 220c movs r2, #12 800098c: 615a str r2, [r3, #20] huart3.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800098e: 4b08 ldr r3, [pc, #32] @ (80009b0 ) 8000990: 2200 movs r2, #0 8000992: 619a str r2, [r3, #24] huart3.Init.OverSampling = UART_OVERSAMPLING_16; 8000994: 4b06 ldr r3, [pc, #24] @ (80009b0 ) 8000996: 2200 movs r2, #0 8000998: 61da str r2, [r3, #28] if (HAL_UART_Init(&huart3) != HAL_OK) 800099a: 4805 ldr r0, [pc, #20] @ (80009b0 ) 800099c: f003 ffca bl 8004934 80009a0: 4603 mov r3, r0 80009a2: 2b00 cmp r3, #0 80009a4: d001 beq.n 80009aa { Error_Handler(); 80009a6: f000 f8a7 bl 8000af8 } /* USER CODE BEGIN USART3_Init 2 */ /* USER CODE END USART3_Init 2 */ } 80009aa: bf00 nop 80009ac: bd80 pop {r7, pc} 80009ae: bf00 nop 80009b0: 20000348 .word 0x20000348 80009b4: 40004800 .word 0x40004800 080009b8 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 80009b8: b580 push {r7, lr} 80009ba: b08a sub sp, #40 @ 0x28 80009bc: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 80009be: f107 0314 add.w r3, r7, #20 80009c2: 2200 movs r2, #0 80009c4: 601a str r2, [r3, #0] 80009c6: 605a str r2, [r3, #4] 80009c8: 609a str r2, [r3, #8] 80009ca: 60da str r2, [r3, #12] 80009cc: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOH_CLK_ENABLE(); 80009ce: 2300 movs r3, #0 80009d0: 613b str r3, [r7, #16] 80009d2: 4b45 ldr r3, [pc, #276] @ (8000ae8 ) 80009d4: 6b1b ldr r3, [r3, #48] @ 0x30 80009d6: 4a44 ldr r2, [pc, #272] @ (8000ae8 ) 80009d8: f043 0380 orr.w r3, r3, #128 @ 0x80 80009dc: 6313 str r3, [r2, #48] @ 0x30 80009de: 4b42 ldr r3, [pc, #264] @ (8000ae8 ) 80009e0: 6b1b ldr r3, [r3, #48] @ 0x30 80009e2: f003 0380 and.w r3, r3, #128 @ 0x80 80009e6: 613b str r3, [r7, #16] 80009e8: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 80009ea: 2300 movs r3, #0 80009ec: 60fb str r3, [r7, #12] 80009ee: 4b3e ldr r3, [pc, #248] @ (8000ae8 ) 80009f0: 6b1b ldr r3, [r3, #48] @ 0x30 80009f2: 4a3d ldr r2, [pc, #244] @ (8000ae8 ) 80009f4: f043 0301 orr.w r3, r3, #1 80009f8: 6313 str r3, [r2, #48] @ 0x30 80009fa: 4b3b ldr r3, [pc, #236] @ (8000ae8 ) 80009fc: 6b1b ldr r3, [r3, #48] @ 0x30 80009fe: f003 0301 and.w r3, r3, #1 8000a02: 60fb str r3, [r7, #12] 8000a04: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOC_CLK_ENABLE(); 8000a06: 2300 movs r3, #0 8000a08: 60bb str r3, [r7, #8] 8000a0a: 4b37 ldr r3, [pc, #220] @ (8000ae8 ) 8000a0c: 6b1b ldr r3, [r3, #48] @ 0x30 8000a0e: 4a36 ldr r2, [pc, #216] @ (8000ae8 ) 8000a10: f043 0304 orr.w r3, r3, #4 8000a14: 6313 str r3, [r2, #48] @ 0x30 8000a16: 4b34 ldr r3, [pc, #208] @ (8000ae8 ) 8000a18: 6b1b ldr r3, [r3, #48] @ 0x30 8000a1a: f003 0304 and.w r3, r3, #4 8000a1e: 60bb str r3, [r7, #8] 8000a20: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); 8000a22: 2300 movs r3, #0 8000a24: 607b str r3, [r7, #4] 8000a26: 4b30 ldr r3, [pc, #192] @ (8000ae8 ) 8000a28: 6b1b ldr r3, [r3, #48] @ 0x30 8000a2a: 4a2f ldr r2, [pc, #188] @ (8000ae8 ) 8000a2c: f043 0302 orr.w r3, r3, #2 8000a30: 6313 str r3, [r2, #48] @ 0x30 8000a32: 4b2d ldr r3, [pc, #180] @ (8000ae8 ) 8000a34: 6b1b ldr r3, [r3, #48] @ 0x30 8000a36: f003 0302 and.w r3, r3, #2 8000a3a: 607b str r3, [r7, #4] 8000a3c: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); 8000a3e: 2300 movs r3, #0 8000a40: 603b str r3, [r7, #0] 8000a42: 4b29 ldr r3, [pc, #164] @ (8000ae8 ) 8000a44: 6b1b ldr r3, [r3, #48] @ 0x30 8000a46: 4a28 ldr r2, [pc, #160] @ (8000ae8 ) 8000a48: f043 0308 orr.w r3, r3, #8 8000a4c: 6313 str r3, [r2, #48] @ 0x30 8000a4e: 4b26 ldr r3, [pc, #152] @ (8000ae8 ) 8000a50: 6b1b ldr r3, [r3, #48] @ 0x30 8000a52: f003 0308 and.w r3, r3, #8 8000a56: 603b str r3, [r7, #0] 8000a58: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9, GPIO_PIN_RESET); 8000a5a: 2200 movs r2, #0 8000a5c: f44f 7170 mov.w r1, #960 @ 0x3c0 8000a60: 4822 ldr r0, [pc, #136] @ (8000aec ) 8000a62: f000 fe4d bl 8001700 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET); 8000a66: 2200 movs r2, #0 8000a68: f44f 7180 mov.w r1, #256 @ 0x100 8000a6c: 4820 ldr r0, [pc, #128] @ (8000af0 ) 8000a6e: f000 fe47 bl 8001700 /*Configure GPIO pins : PC4 PC5 */ GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5; 8000a72: 2330 movs r3, #48 @ 0x30 8000a74: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8000a76: 2300 movs r3, #0 8000a78: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000a7a: 2300 movs r3, #0 8000a7c: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8000a7e: f107 0314 add.w r3, r7, #20 8000a82: 4619 mov r1, r3 8000a84: 4819 ldr r0, [pc, #100] @ (8000aec ) 8000a86: f000 fca7 bl 80013d8 /*Configure GPIO pins : PB0 PB1 PB2 PB10 */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_10; 8000a8a: f240 4307 movw r3, #1031 @ 0x407 8000a8e: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8000a90: 2300 movs r3, #0 8000a92: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000a94: 2300 movs r3, #0 8000a96: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8000a98: f107 0314 add.w r3, r7, #20 8000a9c: 4619 mov r1, r3 8000a9e: 4815 ldr r0, [pc, #84] @ (8000af4 ) 8000aa0: f000 fc9a bl 80013d8 /*Configure GPIO pins : PC6 PC7 PC8 PC9 */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9; 8000aa4: f44f 7370 mov.w r3, #960 @ 0x3c0 8000aa8: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8000aaa: 2301 movs r3, #1 8000aac: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000aae: 2300 movs r3, #0 8000ab0: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000ab2: 2300 movs r3, #0 8000ab4: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8000ab6: f107 0314 add.w r3, r7, #20 8000aba: 4619 mov r1, r3 8000abc: 480b ldr r0, [pc, #44] @ (8000aec ) 8000abe: f000 fc8b bl 80013d8 /*Configure GPIO pin : PA8 */ GPIO_InitStruct.Pin = GPIO_PIN_8; 8000ac2: f44f 7380 mov.w r3, #256 @ 0x100 8000ac6: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8000ac8: 2301 movs r3, #1 8000aca: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000acc: 2300 movs r3, #0 8000ace: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000ad0: 2300 movs r3, #0 8000ad2: 623b str r3, [r7, #32] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000ad4: f107 0314 add.w r3, r7, #20 8000ad8: 4619 mov r1, r3 8000ada: 4805 ldr r0, [pc, #20] @ (8000af0 ) 8000adc: f000 fc7c bl 80013d8 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 8000ae0: bf00 nop 8000ae2: 3728 adds r7, #40 @ 0x28 8000ae4: 46bd mov sp, r7 8000ae6: bd80 pop {r7, pc} 8000ae8: 40023800 .word 0x40023800 8000aec: 40020800 .word 0x40020800 8000af0: 40020000 .word 0x40020000 8000af4: 40020400 .word 0x40020400 08000af8 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8000af8: b480 push {r7} 8000afa: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting special-purpose register PRIMASK. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); 8000afc: b672 cpsid i } 8000afe: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8000b00: bf00 nop 8000b02: e7fd b.n 8000b00 08000b04 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim); /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8000b04: b480 push {r7} 8000b06: b083 sub sp, #12 8000b08: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 8000b0a: 2300 movs r3, #0 8000b0c: 607b str r3, [r7, #4] 8000b0e: 4b10 ldr r3, [pc, #64] @ (8000b50 ) 8000b10: 6c5b ldr r3, [r3, #68] @ 0x44 8000b12: 4a0f ldr r2, [pc, #60] @ (8000b50 ) 8000b14: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8000b18: 6453 str r3, [r2, #68] @ 0x44 8000b1a: 4b0d ldr r3, [pc, #52] @ (8000b50 ) 8000b1c: 6c5b ldr r3, [r3, #68] @ 0x44 8000b1e: f403 4380 and.w r3, r3, #16384 @ 0x4000 8000b22: 607b str r3, [r7, #4] 8000b24: 687b ldr r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); 8000b26: 2300 movs r3, #0 8000b28: 603b str r3, [r7, #0] 8000b2a: 4b09 ldr r3, [pc, #36] @ (8000b50 ) 8000b2c: 6c1b ldr r3, [r3, #64] @ 0x40 8000b2e: 4a08 ldr r2, [pc, #32] @ (8000b50 ) 8000b30: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8000b34: 6413 str r3, [r2, #64] @ 0x40 8000b36: 4b06 ldr r3, [pc, #24] @ (8000b50 ) 8000b38: 6c1b ldr r3, [r3, #64] @ 0x40 8000b3a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8000b3e: 603b str r3, [r7, #0] 8000b40: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8000b42: bf00 nop 8000b44: 370c adds r7, #12 8000b46: 46bd mov sp, r7 8000b48: f85d 7b04 ldr.w r7, [sp], #4 8000b4c: 4770 bx lr 8000b4e: bf00 nop 8000b50: 40023800 .word 0x40023800 08000b54 : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8000b54: b580 push {r7, lr} 8000b56: b08a sub sp, #40 @ 0x28 8000b58: af00 add r7, sp, #0 8000b5a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000b5c: f107 0314 add.w r3, r7, #20 8000b60: 2200 movs r2, #0 8000b62: 601a str r2, [r3, #0] 8000b64: 605a str r2, [r3, #4] 8000b66: 609a str r2, [r3, #8] 8000b68: 60da str r2, [r3, #12] 8000b6a: 611a str r2, [r3, #16] if(hi2c->Instance==I2C1) 8000b6c: 687b ldr r3, [r7, #4] 8000b6e: 681b ldr r3, [r3, #0] 8000b70: 4a19 ldr r2, [pc, #100] @ (8000bd8 ) 8000b72: 4293 cmp r3, r2 8000b74: d12b bne.n 8000bce { /* USER CODE BEGIN I2C1_MspInit 0 */ /* USER CODE END I2C1_MspInit 0 */ __HAL_RCC_GPIOB_CLK_ENABLE(); 8000b76: 2300 movs r3, #0 8000b78: 613b str r3, [r7, #16] 8000b7a: 4b18 ldr r3, [pc, #96] @ (8000bdc ) 8000b7c: 6b1b ldr r3, [r3, #48] @ 0x30 8000b7e: 4a17 ldr r2, [pc, #92] @ (8000bdc ) 8000b80: f043 0302 orr.w r3, r3, #2 8000b84: 6313 str r3, [r2, #48] @ 0x30 8000b86: 4b15 ldr r3, [pc, #84] @ (8000bdc ) 8000b88: 6b1b ldr r3, [r3, #48] @ 0x30 8000b8a: f003 0302 and.w r3, r3, #2 8000b8e: 613b str r3, [r7, #16] 8000b90: 693b ldr r3, [r7, #16] /**I2C1 GPIO Configuration PB6 ------> I2C1_SCL PB7 ------> I2C1_SDA */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 8000b92: 23c0 movs r3, #192 @ 0xc0 8000b94: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8000b96: 2312 movs r3, #18 8000b98: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000b9a: 2300 movs r3, #0 8000b9c: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000b9e: 2303 movs r3, #3 8000ba0: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 8000ba2: 2304 movs r3, #4 8000ba4: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8000ba6: f107 0314 add.w r3, r7, #20 8000baa: 4619 mov r1, r3 8000bac: 480c ldr r0, [pc, #48] @ (8000be0 ) 8000bae: f000 fc13 bl 80013d8 /* Peripheral clock enable */ __HAL_RCC_I2C1_CLK_ENABLE(); 8000bb2: 2300 movs r3, #0 8000bb4: 60fb str r3, [r7, #12] 8000bb6: 4b09 ldr r3, [pc, #36] @ (8000bdc ) 8000bb8: 6c1b ldr r3, [r3, #64] @ 0x40 8000bba: 4a08 ldr r2, [pc, #32] @ (8000bdc ) 8000bbc: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 8000bc0: 6413 str r3, [r2, #64] @ 0x40 8000bc2: 4b06 ldr r3, [pc, #24] @ (8000bdc ) 8000bc4: 6c1b ldr r3, [r3, #64] @ 0x40 8000bc6: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8000bca: 60fb str r3, [r7, #12] 8000bcc: 68fb ldr r3, [r7, #12] /* USER CODE END I2C1_MspInit 1 */ } } 8000bce: bf00 nop 8000bd0: 3728 adds r7, #40 @ 0x28 8000bd2: 46bd mov sp, r7 8000bd4: bd80 pop {r7, pc} 8000bd6: bf00 nop 8000bd8: 40005400 .word 0x40005400 8000bdc: 40023800 .word 0x40023800 8000be0: 40020400 .word 0x40020400 08000be4 : * This function configures the hardware resources used in this example * @param htim_oc: TIM_OC handle pointer * @retval None */ void HAL_TIM_OC_MspInit(TIM_HandleTypeDef* htim_oc) { 8000be4: b480 push {r7} 8000be6: b085 sub sp, #20 8000be8: af00 add r7, sp, #0 8000bea: 6078 str r0, [r7, #4] if(htim_oc->Instance==TIM2) 8000bec: 687b ldr r3, [r7, #4] 8000bee: 681b ldr r3, [r3, #0] 8000bf0: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8000bf4: d10d bne.n 8000c12 { /* USER CODE BEGIN TIM2_MspInit 0 */ /* USER CODE END TIM2_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM2_CLK_ENABLE(); 8000bf6: 2300 movs r3, #0 8000bf8: 60fb str r3, [r7, #12] 8000bfa: 4b09 ldr r3, [pc, #36] @ (8000c20 ) 8000bfc: 6c1b ldr r3, [r3, #64] @ 0x40 8000bfe: 4a08 ldr r2, [pc, #32] @ (8000c20 ) 8000c00: f043 0301 orr.w r3, r3, #1 8000c04: 6413 str r3, [r2, #64] @ 0x40 8000c06: 4b06 ldr r3, [pc, #24] @ (8000c20 ) 8000c08: 6c1b ldr r3, [r3, #64] @ 0x40 8000c0a: f003 0301 and.w r3, r3, #1 8000c0e: 60fb str r3, [r7, #12] 8000c10: 68fb ldr r3, [r7, #12] /* USER CODE END TIM2_MspInit 1 */ } } 8000c12: bf00 nop 8000c14: 3714 adds r7, #20 8000c16: 46bd mov sp, r7 8000c18: f85d 7b04 ldr.w r7, [sp], #4 8000c1c: 4770 bx lr 8000c1e: bf00 nop 8000c20: 40023800 .word 0x40023800 08000c24 : * This function configures the hardware resources used in this example * @param htim_encoder: TIM_Encoder handle pointer * @retval None */ void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef* htim_encoder) { 8000c24: b580 push {r7, lr} 8000c26: b08a sub sp, #40 @ 0x28 8000c28: af00 add r7, sp, #0 8000c2a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000c2c: f107 0314 add.w r3, r7, #20 8000c30: 2200 movs r2, #0 8000c32: 601a str r2, [r3, #0] 8000c34: 605a str r2, [r3, #4] 8000c36: 609a str r2, [r3, #8] 8000c38: 60da str r2, [r3, #12] 8000c3a: 611a str r2, [r3, #16] if(htim_encoder->Instance==TIM3) 8000c3c: 687b ldr r3, [r7, #4] 8000c3e: 681b ldr r3, [r3, #0] 8000c40: 4a19 ldr r2, [pc, #100] @ (8000ca8 ) 8000c42: 4293 cmp r3, r2 8000c44: d12b bne.n 8000c9e { /* USER CODE BEGIN TIM3_MspInit 0 */ /* USER CODE END TIM3_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM3_CLK_ENABLE(); 8000c46: 2300 movs r3, #0 8000c48: 613b str r3, [r7, #16] 8000c4a: 4b18 ldr r3, [pc, #96] @ (8000cac ) 8000c4c: 6c1b ldr r3, [r3, #64] @ 0x40 8000c4e: 4a17 ldr r2, [pc, #92] @ (8000cac ) 8000c50: f043 0302 orr.w r3, r3, #2 8000c54: 6413 str r3, [r2, #64] @ 0x40 8000c56: 4b15 ldr r3, [pc, #84] @ (8000cac ) 8000c58: 6c1b ldr r3, [r3, #64] @ 0x40 8000c5a: f003 0302 and.w r3, r3, #2 8000c5e: 613b str r3, [r7, #16] 8000c60: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 8000c62: 2300 movs r3, #0 8000c64: 60fb str r3, [r7, #12] 8000c66: 4b11 ldr r3, [pc, #68] @ (8000cac ) 8000c68: 6b1b ldr r3, [r3, #48] @ 0x30 8000c6a: 4a10 ldr r2, [pc, #64] @ (8000cac ) 8000c6c: f043 0301 orr.w r3, r3, #1 8000c70: 6313 str r3, [r2, #48] @ 0x30 8000c72: 4b0e ldr r3, [pc, #56] @ (8000cac ) 8000c74: 6b1b ldr r3, [r3, #48] @ 0x30 8000c76: f003 0301 and.w r3, r3, #1 8000c7a: 60fb str r3, [r7, #12] 8000c7c: 68fb ldr r3, [r7, #12] /**TIM3 GPIO Configuration PA6 ------> TIM3_CH1 PA7 ------> TIM3_CH2 */ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7; 8000c7e: 23c0 movs r3, #192 @ 0xc0 8000c80: 617b str r3, [r7, #20] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000c82: 2302 movs r3, #2 8000c84: 61bb str r3, [r7, #24] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000c86: 2300 movs r3, #0 8000c88: 61fb str r3, [r7, #28] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000c8a: 2300 movs r3, #0 8000c8c: 623b str r3, [r7, #32] GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; 8000c8e: 2302 movs r3, #2 8000c90: 627b str r3, [r7, #36] @ 0x24 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000c92: f107 0314 add.w r3, r7, #20 8000c96: 4619 mov r1, r3 8000c98: 4805 ldr r0, [pc, #20] @ (8000cb0 ) 8000c9a: f000 fb9d bl 80013d8 /* USER CODE END TIM3_MspInit 1 */ } } 8000c9e: bf00 nop 8000ca0: 3728 adds r7, #40 @ 0x28 8000ca2: 46bd mov sp, r7 8000ca4: bd80 pop {r7, pc} 8000ca6: bf00 nop 8000ca8: 40000400 .word 0x40000400 8000cac: 40023800 .word 0x40023800 8000cb0: 40020000 .word 0x40020000 08000cb4 : void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) { 8000cb4: b580 push {r7, lr} 8000cb6: b088 sub sp, #32 8000cb8: af00 add r7, sp, #0 8000cba: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000cbc: f107 030c add.w r3, r7, #12 8000cc0: 2200 movs r2, #0 8000cc2: 601a str r2, [r3, #0] 8000cc4: 605a str r2, [r3, #4] 8000cc6: 609a str r2, [r3, #8] 8000cc8: 60da str r2, [r3, #12] 8000cca: 611a str r2, [r3, #16] if(htim->Instance==TIM2) 8000ccc: 687b ldr r3, [r7, #4] 8000cce: 681b ldr r3, [r3, #0] 8000cd0: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8000cd4: d11d bne.n 8000d12 { /* USER CODE BEGIN TIM2_MspPostInit 0 */ /* USER CODE END TIM2_MspPostInit 0 */ __HAL_RCC_GPIOA_CLK_ENABLE(); 8000cd6: 2300 movs r3, #0 8000cd8: 60bb str r3, [r7, #8] 8000cda: 4b10 ldr r3, [pc, #64] @ (8000d1c ) 8000cdc: 6b1b ldr r3, [r3, #48] @ 0x30 8000cde: 4a0f ldr r2, [pc, #60] @ (8000d1c ) 8000ce0: f043 0301 orr.w r3, r3, #1 8000ce4: 6313 str r3, [r2, #48] @ 0x30 8000ce6: 4b0d ldr r3, [pc, #52] @ (8000d1c ) 8000ce8: 6b1b ldr r3, [r3, #48] @ 0x30 8000cea: f003 0301 and.w r3, r3, #1 8000cee: 60bb str r3, [r7, #8] 8000cf0: 68bb ldr r3, [r7, #8] /**TIM2 GPIO Configuration PA5 ------> TIM2_CH1 */ GPIO_InitStruct.Pin = GPIO_PIN_5; 8000cf2: 2320 movs r3, #32 8000cf4: 60fb str r3, [r7, #12] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000cf6: 2302 movs r3, #2 8000cf8: 613b str r3, [r7, #16] GPIO_InitStruct.Pull = GPIO_NOPULL; 8000cfa: 2300 movs r3, #0 8000cfc: 617b str r3, [r7, #20] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8000cfe: 2300 movs r3, #0 8000d00: 61bb str r3, [r7, #24] GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 8000d02: 2301 movs r3, #1 8000d04: 61fb str r3, [r7, #28] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000d06: f107 030c add.w r3, r7, #12 8000d0a: 4619 mov r1, r3 8000d0c: 4804 ldr r0, [pc, #16] @ (8000d20 ) 8000d0e: f000 fb63 bl 80013d8 /* USER CODE BEGIN TIM2_MspPostInit 1 */ /* USER CODE END TIM2_MspPostInit 1 */ } } 8000d12: bf00 nop 8000d14: 3720 adds r7, #32 8000d16: 46bd mov sp, r7 8000d18: bd80 pop {r7, pc} 8000d1a: bf00 nop 8000d1c: 40023800 .word 0x40023800 8000d20: 40020000 .word 0x40020000 08000d24 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8000d24: b580 push {r7, lr} 8000d26: b092 sub sp, #72 @ 0x48 8000d28: af00 add r7, sp, #0 8000d2a: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8000d2c: f107 0334 add.w r3, r7, #52 @ 0x34 8000d30: 2200 movs r2, #0 8000d32: 601a str r2, [r3, #0] 8000d34: 605a str r2, [r3, #4] 8000d36: 609a str r2, [r3, #8] 8000d38: 60da str r2, [r3, #12] 8000d3a: 611a str r2, [r3, #16] if(huart->Instance==UART4) 8000d3c: 687b ldr r3, [r7, #4] 8000d3e: 681b ldr r3, [r3, #0] 8000d40: 4a8d ldr r2, [pc, #564] @ (8000f78 ) 8000d42: 4293 cmp r3, r2 8000d44: d12c bne.n 8000da0 { /* USER CODE BEGIN UART4_MspInit 0 */ /* USER CODE END UART4_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_UART4_CLK_ENABLE(); 8000d46: 2300 movs r3, #0 8000d48: 633b str r3, [r7, #48] @ 0x30 8000d4a: 4b8c ldr r3, [pc, #560] @ (8000f7c ) 8000d4c: 6c1b ldr r3, [r3, #64] @ 0x40 8000d4e: 4a8b ldr r2, [pc, #556] @ (8000f7c ) 8000d50: f443 2300 orr.w r3, r3, #524288 @ 0x80000 8000d54: 6413 str r3, [r2, #64] @ 0x40 8000d56: 4b89 ldr r3, [pc, #548] @ (8000f7c ) 8000d58: 6c1b ldr r3, [r3, #64] @ 0x40 8000d5a: f403 2300 and.w r3, r3, #524288 @ 0x80000 8000d5e: 633b str r3, [r7, #48] @ 0x30 8000d60: 6b3b ldr r3, [r7, #48] @ 0x30 __HAL_RCC_GPIOA_CLK_ENABLE(); 8000d62: 2300 movs r3, #0 8000d64: 62fb str r3, [r7, #44] @ 0x2c 8000d66: 4b85 ldr r3, [pc, #532] @ (8000f7c ) 8000d68: 6b1b ldr r3, [r3, #48] @ 0x30 8000d6a: 4a84 ldr r2, [pc, #528] @ (8000f7c ) 8000d6c: f043 0301 orr.w r3, r3, #1 8000d70: 6313 str r3, [r2, #48] @ 0x30 8000d72: 4b82 ldr r3, [pc, #520] @ (8000f7c ) 8000d74: 6b1b ldr r3, [r3, #48] @ 0x30 8000d76: f003 0301 and.w r3, r3, #1 8000d7a: 62fb str r3, [r7, #44] @ 0x2c 8000d7c: 6afb ldr r3, [r7, #44] @ 0x2c /**UART4 GPIO Configuration PA0-WKUP ------> UART4_TX PA1 ------> UART4_RX */ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1; 8000d7e: 2303 movs r3, #3 8000d80: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000d82: 2302 movs r3, #2 8000d84: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 8000d86: 2300 movs r3, #0 8000d88: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000d8a: 2303 movs r3, #3 8000d8c: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF8_UART4; 8000d8e: 2308 movs r3, #8 8000d90: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000d92: f107 0334 add.w r3, r7, #52 @ 0x34 8000d96: 4619 mov r1, r3 8000d98: 4879 ldr r0, [pc, #484] @ (8000f80 ) 8000d9a: f000 fb1d bl 80013d8 /* USER CODE BEGIN USART3_MspInit 1 */ /* USER CODE END USART3_MspInit 1 */ } } 8000d9e: e0e7 b.n 8000f70 else if(huart->Instance==UART5) 8000da0: 687b ldr r3, [r7, #4] 8000da2: 681b ldr r3, [r3, #0] 8000da4: 4a77 ldr r2, [pc, #476] @ (8000f84 ) 8000da6: 4293 cmp r3, r2 8000da8: d14b bne.n 8000e42 __HAL_RCC_UART5_CLK_ENABLE(); 8000daa: 2300 movs r3, #0 8000dac: 62bb str r3, [r7, #40] @ 0x28 8000dae: 4b73 ldr r3, [pc, #460] @ (8000f7c ) 8000db0: 6c1b ldr r3, [r3, #64] @ 0x40 8000db2: 4a72 ldr r2, [pc, #456] @ (8000f7c ) 8000db4: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 8000db8: 6413 str r3, [r2, #64] @ 0x40 8000dba: 4b70 ldr r3, [pc, #448] @ (8000f7c ) 8000dbc: 6c1b ldr r3, [r3, #64] @ 0x40 8000dbe: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8000dc2: 62bb str r3, [r7, #40] @ 0x28 8000dc4: 6abb ldr r3, [r7, #40] @ 0x28 __HAL_RCC_GPIOC_CLK_ENABLE(); 8000dc6: 2300 movs r3, #0 8000dc8: 627b str r3, [r7, #36] @ 0x24 8000dca: 4b6c ldr r3, [pc, #432] @ (8000f7c ) 8000dcc: 6b1b ldr r3, [r3, #48] @ 0x30 8000dce: 4a6b ldr r2, [pc, #428] @ (8000f7c ) 8000dd0: f043 0304 orr.w r3, r3, #4 8000dd4: 6313 str r3, [r2, #48] @ 0x30 8000dd6: 4b69 ldr r3, [pc, #420] @ (8000f7c ) 8000dd8: 6b1b ldr r3, [r3, #48] @ 0x30 8000dda: f003 0304 and.w r3, r3, #4 8000dde: 627b str r3, [r7, #36] @ 0x24 8000de0: 6a7b ldr r3, [r7, #36] @ 0x24 __HAL_RCC_GPIOD_CLK_ENABLE(); 8000de2: 2300 movs r3, #0 8000de4: 623b str r3, [r7, #32] 8000de6: 4b65 ldr r3, [pc, #404] @ (8000f7c ) 8000de8: 6b1b ldr r3, [r3, #48] @ 0x30 8000dea: 4a64 ldr r2, [pc, #400] @ (8000f7c ) 8000dec: f043 0308 orr.w r3, r3, #8 8000df0: 6313 str r3, [r2, #48] @ 0x30 8000df2: 4b62 ldr r3, [pc, #392] @ (8000f7c ) 8000df4: 6b1b ldr r3, [r3, #48] @ 0x30 8000df6: f003 0308 and.w r3, r3, #8 8000dfa: 623b str r3, [r7, #32] 8000dfc: 6a3b ldr r3, [r7, #32] GPIO_InitStruct.Pin = GPIO_PIN_12; 8000dfe: f44f 5380 mov.w r3, #4096 @ 0x1000 8000e02: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000e04: 2302 movs r3, #2 8000e06: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 8000e08: 2300 movs r3, #0 8000e0a: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000e0c: 2303 movs r3, #3 8000e0e: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF8_UART5; 8000e10: 2308 movs r3, #8 8000e12: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8000e14: f107 0334 add.w r3, r7, #52 @ 0x34 8000e18: 4619 mov r1, r3 8000e1a: 485b ldr r0, [pc, #364] @ (8000f88 ) 8000e1c: f000 fadc bl 80013d8 GPIO_InitStruct.Pin = GPIO_PIN_2; 8000e20: 2304 movs r3, #4 8000e22: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000e24: 2302 movs r3, #2 8000e26: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 8000e28: 2300 movs r3, #0 8000e2a: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000e2c: 2303 movs r3, #3 8000e2e: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF8_UART5; 8000e30: 2308 movs r3, #8 8000e32: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8000e34: f107 0334 add.w r3, r7, #52 @ 0x34 8000e38: 4619 mov r1, r3 8000e3a: 4854 ldr r0, [pc, #336] @ (8000f8c ) 8000e3c: f000 facc bl 80013d8 } 8000e40: e096 b.n 8000f70 else if(huart->Instance==USART1) 8000e42: 687b ldr r3, [r7, #4] 8000e44: 681b ldr r3, [r3, #0] 8000e46: 4a52 ldr r2, [pc, #328] @ (8000f90 ) 8000e48: 4293 cmp r3, r2 8000e4a: d12d bne.n 8000ea8 __HAL_RCC_USART1_CLK_ENABLE(); 8000e4c: 2300 movs r3, #0 8000e4e: 61fb str r3, [r7, #28] 8000e50: 4b4a ldr r3, [pc, #296] @ (8000f7c ) 8000e52: 6c5b ldr r3, [r3, #68] @ 0x44 8000e54: 4a49 ldr r2, [pc, #292] @ (8000f7c ) 8000e56: f043 0310 orr.w r3, r3, #16 8000e5a: 6453 str r3, [r2, #68] @ 0x44 8000e5c: 4b47 ldr r3, [pc, #284] @ (8000f7c ) 8000e5e: 6c5b ldr r3, [r3, #68] @ 0x44 8000e60: f003 0310 and.w r3, r3, #16 8000e64: 61fb str r3, [r7, #28] 8000e66: 69fb ldr r3, [r7, #28] __HAL_RCC_GPIOA_CLK_ENABLE(); 8000e68: 2300 movs r3, #0 8000e6a: 61bb str r3, [r7, #24] 8000e6c: 4b43 ldr r3, [pc, #268] @ (8000f7c ) 8000e6e: 6b1b ldr r3, [r3, #48] @ 0x30 8000e70: 4a42 ldr r2, [pc, #264] @ (8000f7c ) 8000e72: f043 0301 orr.w r3, r3, #1 8000e76: 6313 str r3, [r2, #48] @ 0x30 8000e78: 4b40 ldr r3, [pc, #256] @ (8000f7c ) 8000e7a: 6b1b ldr r3, [r3, #48] @ 0x30 8000e7c: f003 0301 and.w r3, r3, #1 8000e80: 61bb str r3, [r7, #24] 8000e82: 69bb ldr r3, [r7, #24] GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; 8000e84: f44f 63c0 mov.w r3, #1536 @ 0x600 8000e88: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000e8a: 2302 movs r3, #2 8000e8c: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 8000e8e: 2300 movs r3, #0 8000e90: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000e92: 2303 movs r3, #3 8000e94: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF7_USART1; 8000e96: 2307 movs r3, #7 8000e98: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000e9a: f107 0334 add.w r3, r7, #52 @ 0x34 8000e9e: 4619 mov r1, r3 8000ea0: 4837 ldr r0, [pc, #220] @ (8000f80 ) 8000ea2: f000 fa99 bl 80013d8 } 8000ea6: e063 b.n 8000f70 else if(huart->Instance==USART2) 8000ea8: 687b ldr r3, [r7, #4] 8000eaa: 681b ldr r3, [r3, #0] 8000eac: 4a39 ldr r2, [pc, #228] @ (8000f94 ) 8000eae: 4293 cmp r3, r2 8000eb0: d12c bne.n 8000f0c __HAL_RCC_USART2_CLK_ENABLE(); 8000eb2: 2300 movs r3, #0 8000eb4: 617b str r3, [r7, #20] 8000eb6: 4b31 ldr r3, [pc, #196] @ (8000f7c ) 8000eb8: 6c1b ldr r3, [r3, #64] @ 0x40 8000eba: 4a30 ldr r2, [pc, #192] @ (8000f7c ) 8000ebc: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8000ec0: 6413 str r3, [r2, #64] @ 0x40 8000ec2: 4b2e ldr r3, [pc, #184] @ (8000f7c ) 8000ec4: 6c1b ldr r3, [r3, #64] @ 0x40 8000ec6: f403 3300 and.w r3, r3, #131072 @ 0x20000 8000eca: 617b str r3, [r7, #20] 8000ecc: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOA_CLK_ENABLE(); 8000ece: 2300 movs r3, #0 8000ed0: 613b str r3, [r7, #16] 8000ed2: 4b2a ldr r3, [pc, #168] @ (8000f7c ) 8000ed4: 6b1b ldr r3, [r3, #48] @ 0x30 8000ed6: 4a29 ldr r2, [pc, #164] @ (8000f7c ) 8000ed8: f043 0301 orr.w r3, r3, #1 8000edc: 6313 str r3, [r2, #48] @ 0x30 8000ede: 4b27 ldr r3, [pc, #156] @ (8000f7c ) 8000ee0: 6b1b ldr r3, [r3, #48] @ 0x30 8000ee2: f003 0301 and.w r3, r3, #1 8000ee6: 613b str r3, [r7, #16] 8000ee8: 693b ldr r3, [r7, #16] GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3; 8000eea: 230c movs r3, #12 8000eec: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000eee: 2302 movs r3, #2 8000ef0: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 8000ef2: 2300 movs r3, #0 8000ef4: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000ef6: 2303 movs r3, #3 8000ef8: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 8000efa: 2307 movs r3, #7 8000efc: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8000efe: f107 0334 add.w r3, r7, #52 @ 0x34 8000f02: 4619 mov r1, r3 8000f04: 481e ldr r0, [pc, #120] @ (8000f80 ) 8000f06: f000 fa67 bl 80013d8 } 8000f0a: e031 b.n 8000f70 else if(huart->Instance==USART3) 8000f0c: 687b ldr r3, [r7, #4] 8000f0e: 681b ldr r3, [r3, #0] 8000f10: 4a21 ldr r2, [pc, #132] @ (8000f98 ) 8000f12: 4293 cmp r3, r2 8000f14: d12c bne.n 8000f70 __HAL_RCC_USART3_CLK_ENABLE(); 8000f16: 2300 movs r3, #0 8000f18: 60fb str r3, [r7, #12] 8000f1a: 4b18 ldr r3, [pc, #96] @ (8000f7c ) 8000f1c: 6c1b ldr r3, [r3, #64] @ 0x40 8000f1e: 4a17 ldr r2, [pc, #92] @ (8000f7c ) 8000f20: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8000f24: 6413 str r3, [r2, #64] @ 0x40 8000f26: 4b15 ldr r3, [pc, #84] @ (8000f7c ) 8000f28: 6c1b ldr r3, [r3, #64] @ 0x40 8000f2a: f403 2380 and.w r3, r3, #262144 @ 0x40000 8000f2e: 60fb str r3, [r7, #12] 8000f30: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOC_CLK_ENABLE(); 8000f32: 2300 movs r3, #0 8000f34: 60bb str r3, [r7, #8] 8000f36: 4b11 ldr r3, [pc, #68] @ (8000f7c ) 8000f38: 6b1b ldr r3, [r3, #48] @ 0x30 8000f3a: 4a10 ldr r2, [pc, #64] @ (8000f7c ) 8000f3c: f043 0304 orr.w r3, r3, #4 8000f40: 6313 str r3, [r2, #48] @ 0x30 8000f42: 4b0e ldr r3, [pc, #56] @ (8000f7c ) 8000f44: 6b1b ldr r3, [r3, #48] @ 0x30 8000f46: f003 0304 and.w r3, r3, #4 8000f4a: 60bb str r3, [r7, #8] 8000f4c: 68bb ldr r3, [r7, #8] GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; 8000f4e: f44f 6340 mov.w r3, #3072 @ 0xc00 8000f52: 637b str r3, [r7, #52] @ 0x34 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8000f54: 2302 movs r3, #2 8000f56: 63bb str r3, [r7, #56] @ 0x38 GPIO_InitStruct.Pull = GPIO_NOPULL; 8000f58: 2300 movs r3, #0 8000f5a: 63fb str r3, [r7, #60] @ 0x3c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8000f5c: 2303 movs r3, #3 8000f5e: 643b str r3, [r7, #64] @ 0x40 GPIO_InitStruct.Alternate = GPIO_AF7_USART3; 8000f60: 2307 movs r3, #7 8000f62: 647b str r3, [r7, #68] @ 0x44 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8000f64: f107 0334 add.w r3, r7, #52 @ 0x34 8000f68: 4619 mov r1, r3 8000f6a: 4807 ldr r0, [pc, #28] @ (8000f88 ) 8000f6c: f000 fa34 bl 80013d8 } 8000f70: bf00 nop 8000f72: 3748 adds r7, #72 @ 0x48 8000f74: 46bd mov sp, r7 8000f76: bd80 pop {r7, pc} 8000f78: 40004c00 .word 0x40004c00 8000f7c: 40023800 .word 0x40023800 8000f80: 40020000 .word 0x40020000 8000f84: 40005000 .word 0x40005000 8000f88: 40020800 .word 0x40020800 8000f8c: 40020c00 .word 0x40020c00 8000f90: 40011000 .word 0x40011000 8000f94: 40004400 .word 0x40004400 8000f98: 40004800 .word 0x40004800 08000f9c : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8000f9c: b480 push {r7} 8000f9e: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8000fa0: bf00 nop 8000fa2: e7fd b.n 8000fa0 08000fa4 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8000fa4: b480 push {r7} 8000fa6: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8000fa8: bf00 nop 8000faa: e7fd b.n 8000fa8 08000fac : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8000fac: b480 push {r7} 8000fae: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8000fb0: bf00 nop 8000fb2: e7fd b.n 8000fb0 08000fb4 : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { 8000fb4: b480 push {r7} 8000fb6: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8000fb8: bf00 nop 8000fba: e7fd b.n 8000fb8 08000fbc : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8000fbc: b480 push {r7} 8000fbe: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8000fc0: bf00 nop 8000fc2: e7fd b.n 8000fc0 08000fc4 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { 8000fc4: b480 push {r7} 8000fc6: af00 add r7, sp, #0 /* USER CODE END SVCall_IRQn 0 */ /* USER CODE BEGIN SVCall_IRQn 1 */ /* USER CODE END SVCall_IRQn 1 */ } 8000fc8: bf00 nop 8000fca: 46bd mov sp, r7 8000fcc: f85d 7b04 ldr.w r7, [sp], #4 8000fd0: 4770 bx lr 08000fd2 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8000fd2: b480 push {r7} 8000fd4: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8000fd6: bf00 nop 8000fd8: 46bd mov sp, r7 8000fda: f85d 7b04 ldr.w r7, [sp], #4 8000fde: 4770 bx lr 08000fe0 : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { 8000fe0: b480 push {r7} 8000fe2: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } 8000fe4: bf00 nop 8000fe6: 46bd mov sp, r7 8000fe8: f85d 7b04 ldr.w r7, [sp], #4 8000fec: 4770 bx lr 08000fee : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { 8000fee: b580 push {r7, lr} 8000ff0: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); 8000ff2: f000 f89b bl 800112c /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } 8000ff6: bf00 nop 8000ff8: bd80 pop {r7, pc} ... 08000ffc : /** * @brief This function handles USB On The Go FS global interrupt. */ void OTG_FS_IRQHandler(void) { 8000ffc: b580 push {r7, lr} 8000ffe: af00 add r7, sp, #0 /* USER CODE BEGIN OTG_FS_IRQn 0 */ /* USER CODE END OTG_FS_IRQn 0 */ HAL_PCD_IRQHandler(&hpcd_USB_OTG_FS); 8001000: 4802 ldr r0, [pc, #8] @ (800100c ) 8001002: f000 fe26 bl 8001c52 /* USER CODE BEGIN OTG_FS_IRQn 1 */ /* USER CODE END OTG_FS_IRQn 1 */ } 8001006: bf00 nop 8001008: bd80 pop {r7, pc} 800100a: bf00 nop 800100c: 20000874 .word 0x20000874 08001010 : * configuration. * @param None * @retval None */ void SystemInit(void) { 8001010: b480 push {r7} 8001012: af00 add r7, sp, #0 /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ 8001014: 4b06 ldr r3, [pc, #24] @ (8001030 ) 8001016: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 800101a: 4a05 ldr r2, [pc, #20] @ (8001030 ) 800101c: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 8001020: f8c2 3088 str.w r3, [r2, #136] @ 0x88 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ } 8001024: bf00 nop 8001026: 46bd mov sp, r7 8001028: f85d 7b04 ldr.w r7, [sp], #4 800102c: 4770 bx lr 800102e: bf00 nop 8001030: e000ed00 .word 0xe000ed00 08001034 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ 8001034: f8df d034 ldr.w sp, [pc, #52] @ 800106c /* Call the clock system initialization function.*/ bl SystemInit 8001038: f7ff ffea bl 8001010 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 800103c: 480c ldr r0, [pc, #48] @ (8001070 ) ldr r1, =_edata 800103e: 490d ldr r1, [pc, #52] @ (8001074 ) ldr r2, =_sidata 8001040: 4a0d ldr r2, [pc, #52] @ (8001078 ) movs r3, #0 8001042: 2300 movs r3, #0 b LoopCopyDataInit 8001044: e002 b.n 800104c 08001046 : CopyDataInit: ldr r4, [r2, r3] 8001046: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 8001048: 50c4 str r4, [r0, r3] adds r3, r3, #4 800104a: 3304 adds r3, #4 0800104c : LoopCopyDataInit: adds r4, r0, r3 800104c: 18c4 adds r4, r0, r3 cmp r4, r1 800104e: 428c cmp r4, r1 bcc CopyDataInit 8001050: d3f9 bcc.n 8001046 /* Zero fill the bss segment. */ ldr r2, =_sbss 8001052: 4a0a ldr r2, [pc, #40] @ (800107c ) ldr r4, =_ebss 8001054: 4c0a ldr r4, [pc, #40] @ (8001080 ) movs r3, #0 8001056: 2300 movs r3, #0 b LoopFillZerobss 8001058: e001 b.n 800105e 0800105a : FillZerobss: str r3, [r2] 800105a: 6013 str r3, [r2, #0] adds r2, r2, #4 800105c: 3204 adds r2, #4 0800105e : LoopFillZerobss: cmp r2, r4 800105e: 42a2 cmp r2, r4 bcc FillZerobss 8001060: d3fb bcc.n 800105a /* Call static constructors */ bl __libc_init_array 8001062: f007 fcab bl 80089bc <__libc_init_array> /* Call the application's entry point.*/ bl main 8001066: f7ff fa63 bl 8000530
bx lr 800106a: 4770 bx lr ldr sp, =_estack /* set stack pointer */ 800106c: 20020000 .word 0x20020000 ldr r0, =_sdata 8001070: 20000000 .word 0x20000000 ldr r1, =_edata 8001074: 20000120 .word 0x20000120 ldr r2, =_sidata 8001078: 08008a80 .word 0x08008a80 ldr r2, =_sbss 800107c: 20000120 .word 0x20000120 ldr r4, =_ebss 8001080: 20000d6c .word 0x20000d6c 08001084 : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8001084: e7fe b.n 8001084 ... 08001088 : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 8001088: b580 push {r7, lr} 800108a: af00 add r7, sp, #0 /* Configure Flash prefetch, Instruction cache, Data cache */ #if (INSTRUCTION_CACHE_ENABLE != 0U) __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); 800108c: 4b0e ldr r3, [pc, #56] @ (80010c8 ) 800108e: 681b ldr r3, [r3, #0] 8001090: 4a0d ldr r2, [pc, #52] @ (80010c8 ) 8001092: f443 7300 orr.w r3, r3, #512 @ 0x200 8001096: 6013 str r3, [r2, #0] #endif /* INSTRUCTION_CACHE_ENABLE */ #if (DATA_CACHE_ENABLE != 0U) __HAL_FLASH_DATA_CACHE_ENABLE(); 8001098: 4b0b ldr r3, [pc, #44] @ (80010c8 ) 800109a: 681b ldr r3, [r3, #0] 800109c: 4a0a ldr r2, [pc, #40] @ (80010c8 ) 800109e: f443 6380 orr.w r3, r3, #1024 @ 0x400 80010a2: 6013 str r3, [r2, #0] #endif /* DATA_CACHE_ENABLE */ #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); 80010a4: 4b08 ldr r3, [pc, #32] @ (80010c8 ) 80010a6: 681b ldr r3, [r3, #0] 80010a8: 4a07 ldr r2, [pc, #28] @ (80010c8 ) 80010aa: f443 7380 orr.w r3, r3, #256 @ 0x100 80010ae: 6013 str r3, [r2, #0] #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 80010b0: 2003 movs r0, #3 80010b2: f000 f94f bl 8001354 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 80010b6: 200f movs r0, #15 80010b8: f000 f808 bl 80010cc /* Init the low level hardware */ HAL_MspInit(); 80010bc: f7ff fd22 bl 8000b04 /* Return function status */ return HAL_OK; 80010c0: 2300 movs r3, #0 } 80010c2: 4618 mov r0, r3 80010c4: bd80 pop {r7, pc} 80010c6: bf00 nop 80010c8: 40023c00 .word 0x40023c00 080010cc : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 80010cc: b580 push {r7, lr} 80010ce: b082 sub sp, #8 80010d0: af00 add r7, sp, #0 80010d2: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) 80010d4: 4b12 ldr r3, [pc, #72] @ (8001120 ) 80010d6: 681a ldr r2, [r3, #0] 80010d8: 4b12 ldr r3, [pc, #72] @ (8001124 ) 80010da: 781b ldrb r3, [r3, #0] 80010dc: 4619 mov r1, r3 80010de: f44f 737a mov.w r3, #1000 @ 0x3e8 80010e2: fbb3 f3f1 udiv r3, r3, r1 80010e6: fbb2 f3f3 udiv r3, r2, r3 80010ea: 4618 mov r0, r3 80010ec: f000 f967 bl 80013be 80010f0: 4603 mov r3, r0 80010f2: 2b00 cmp r3, #0 80010f4: d001 beq.n 80010fa { return HAL_ERROR; 80010f6: 2301 movs r3, #1 80010f8: e00e b.n 8001118 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 80010fa: 687b ldr r3, [r7, #4] 80010fc: 2b0f cmp r3, #15 80010fe: d80a bhi.n 8001116 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); 8001100: 2200 movs r2, #0 8001102: 6879 ldr r1, [r7, #4] 8001104: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8001108: f000 f92f bl 800136a uwTickPrio = TickPriority; 800110c: 4a06 ldr r2, [pc, #24] @ (8001128 ) 800110e: 687b ldr r3, [r7, #4] 8001110: 6013 str r3, [r2, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; 8001112: 2300 movs r3, #0 8001114: e000 b.n 8001118 return HAL_ERROR; 8001116: 2301 movs r3, #1 } 8001118: 4618 mov r0, r3 800111a: 3708 adds r7, #8 800111c: 46bd mov sp, r7 800111e: bd80 pop {r7, pc} 8001120: 20000000 .word 0x20000000 8001124: 20000008 .word 0x20000008 8001128: 20000004 .word 0x20000004 0800112c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 800112c: b480 push {r7} 800112e: af00 add r7, sp, #0 uwTick += uwTickFreq; 8001130: 4b06 ldr r3, [pc, #24] @ (800114c ) 8001132: 781b ldrb r3, [r3, #0] 8001134: 461a mov r2, r3 8001136: 4b06 ldr r3, [pc, #24] @ (8001150 ) 8001138: 681b ldr r3, [r3, #0] 800113a: 4413 add r3, r2 800113c: 4a04 ldr r2, [pc, #16] @ (8001150 ) 800113e: 6013 str r3, [r2, #0] } 8001140: bf00 nop 8001142: 46bd mov sp, r7 8001144: f85d 7b04 ldr.w r7, [sp], #4 8001148: 4770 bx lr 800114a: bf00 nop 800114c: 20000008 .word 0x20000008 8001150: 20000390 .word 0x20000390 08001154 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 8001154: b480 push {r7} 8001156: af00 add r7, sp, #0 return uwTick; 8001158: 4b03 ldr r3, [pc, #12] @ (8001168 ) 800115a: 681b ldr r3, [r3, #0] } 800115c: 4618 mov r0, r3 800115e: 46bd mov sp, r7 8001160: f85d 7b04 ldr.w r7, [sp], #4 8001164: 4770 bx lr 8001166: bf00 nop 8001168: 20000390 .word 0x20000390 0800116c : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 800116c: b580 push {r7, lr} 800116e: b084 sub sp, #16 8001170: af00 add r7, sp, #0 8001172: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 8001174: f7ff ffee bl 8001154 8001178: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 800117a: 687b ldr r3, [r7, #4] 800117c: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 800117e: 68fb ldr r3, [r7, #12] 8001180: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8001184: d005 beq.n 8001192 { wait += (uint32_t)(uwTickFreq); 8001186: 4b0a ldr r3, [pc, #40] @ (80011b0 ) 8001188: 781b ldrb r3, [r3, #0] 800118a: 461a mov r2, r3 800118c: 68fb ldr r3, [r7, #12] 800118e: 4413 add r3, r2 8001190: 60fb str r3, [r7, #12] } while((HAL_GetTick() - tickstart) < wait) 8001192: bf00 nop 8001194: f7ff ffde bl 8001154 8001198: 4602 mov r2, r0 800119a: 68bb ldr r3, [r7, #8] 800119c: 1ad3 subs r3, r2, r3 800119e: 68fa ldr r2, [r7, #12] 80011a0: 429a cmp r2, r3 80011a2: d8f7 bhi.n 8001194 { } } 80011a4: bf00 nop 80011a6: bf00 nop 80011a8: 3710 adds r7, #16 80011aa: 46bd mov sp, r7 80011ac: bd80 pop {r7, pc} 80011ae: bf00 nop 80011b0: 20000008 .word 0x20000008 080011b4 <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 80011b4: b480 push {r7} 80011b6: b085 sub sp, #20 80011b8: af00 add r7, sp, #0 80011ba: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80011bc: 687b ldr r3, [r7, #4] 80011be: f003 0307 and.w r3, r3, #7 80011c2: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 80011c4: 4b0c ldr r3, [pc, #48] @ (80011f8 <__NVIC_SetPriorityGrouping+0x44>) 80011c6: 68db ldr r3, [r3, #12] 80011c8: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 80011ca: 68ba ldr r2, [r7, #8] 80011cc: f64f 03ff movw r3, #63743 @ 0xf8ff 80011d0: 4013 ands r3, r2 80011d2: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 80011d4: 68fb ldr r3, [r7, #12] 80011d6: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 80011d8: 68bb ldr r3, [r7, #8] 80011da: 4313 orrs r3, r2 reg_value = (reg_value | 80011dc: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000 80011e0: f443 3300 orr.w r3, r3, #131072 @ 0x20000 80011e4: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 80011e6: 4a04 ldr r2, [pc, #16] @ (80011f8 <__NVIC_SetPriorityGrouping+0x44>) 80011e8: 68bb ldr r3, [r7, #8] 80011ea: 60d3 str r3, [r2, #12] } 80011ec: bf00 nop 80011ee: 3714 adds r7, #20 80011f0: 46bd mov sp, r7 80011f2: f85d 7b04 ldr.w r7, [sp], #4 80011f6: 4770 bx lr 80011f8: e000ed00 .word 0xe000ed00 080011fc <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 80011fc: b480 push {r7} 80011fe: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8001200: 4b04 ldr r3, [pc, #16] @ (8001214 <__NVIC_GetPriorityGrouping+0x18>) 8001202: 68db ldr r3, [r3, #12] 8001204: 0a1b lsrs r3, r3, #8 8001206: f003 0307 and.w r3, r3, #7 } 800120a: 4618 mov r0, r3 800120c: 46bd mov sp, r7 800120e: f85d 7b04 ldr.w r7, [sp], #4 8001212: 4770 bx lr 8001214: e000ed00 .word 0xe000ed00 08001218 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8001218: b480 push {r7} 800121a: b083 sub sp, #12 800121c: af00 add r7, sp, #0 800121e: 4603 mov r3, r0 8001220: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001222: f997 3007 ldrsb.w r3, [r7, #7] 8001226: 2b00 cmp r3, #0 8001228: db0b blt.n 8001242 <__NVIC_EnableIRQ+0x2a> { __COMPILER_BARRIER(); NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 800122a: 79fb ldrb r3, [r7, #7] 800122c: f003 021f and.w r2, r3, #31 8001230: 4907 ldr r1, [pc, #28] @ (8001250 <__NVIC_EnableIRQ+0x38>) 8001232: f997 3007 ldrsb.w r3, [r7, #7] 8001236: 095b lsrs r3, r3, #5 8001238: 2001 movs r0, #1 800123a: fa00 f202 lsl.w r2, r0, r2 800123e: f841 2023 str.w r2, [r1, r3, lsl #2] __COMPILER_BARRIER(); } } 8001242: bf00 nop 8001244: 370c adds r7, #12 8001246: 46bd mov sp, r7 8001248: f85d 7b04 ldr.w r7, [sp], #4 800124c: 4770 bx lr 800124e: bf00 nop 8001250: e000e100 .word 0xe000e100 08001254 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 8001254: b480 push {r7} 8001256: b083 sub sp, #12 8001258: af00 add r7, sp, #0 800125a: 4603 mov r3, r0 800125c: 6039 str r1, [r7, #0] 800125e: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 8001260: f997 3007 ldrsb.w r3, [r7, #7] 8001264: 2b00 cmp r3, #0 8001266: db0a blt.n 800127e <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 8001268: 683b ldr r3, [r7, #0] 800126a: b2da uxtb r2, r3 800126c: 490c ldr r1, [pc, #48] @ (80012a0 <__NVIC_SetPriority+0x4c>) 800126e: f997 3007 ldrsb.w r3, [r7, #7] 8001272: 0112 lsls r2, r2, #4 8001274: b2d2 uxtb r2, r2 8001276: 440b add r3, r1 8001278: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 800127c: e00a b.n 8001294 <__NVIC_SetPriority+0x40> SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 800127e: 683b ldr r3, [r7, #0] 8001280: b2da uxtb r2, r3 8001282: 4908 ldr r1, [pc, #32] @ (80012a4 <__NVIC_SetPriority+0x50>) 8001284: 79fb ldrb r3, [r7, #7] 8001286: f003 030f and.w r3, r3, #15 800128a: 3b04 subs r3, #4 800128c: 0112 lsls r2, r2, #4 800128e: b2d2 uxtb r2, r2 8001290: 440b add r3, r1 8001292: 761a strb r2, [r3, #24] } 8001294: bf00 nop 8001296: 370c adds r7, #12 8001298: 46bd mov sp, r7 800129a: f85d 7b04 ldr.w r7, [sp], #4 800129e: 4770 bx lr 80012a0: e000e100 .word 0xe000e100 80012a4: e000ed00 .word 0xe000ed00 080012a8 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 80012a8: b480 push {r7} 80012aa: b089 sub sp, #36 @ 0x24 80012ac: af00 add r7, sp, #0 80012ae: 60f8 str r0, [r7, #12] 80012b0: 60b9 str r1, [r7, #8] 80012b2: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 80012b4: 68fb ldr r3, [r7, #12] 80012b6: f003 0307 and.w r3, r3, #7 80012ba: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 80012bc: 69fb ldr r3, [r7, #28] 80012be: f1c3 0307 rsb r3, r3, #7 80012c2: 2b04 cmp r3, #4 80012c4: bf28 it cs 80012c6: 2304 movcs r3, #4 80012c8: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 80012ca: 69fb ldr r3, [r7, #28] 80012cc: 3304 adds r3, #4 80012ce: 2b06 cmp r3, #6 80012d0: d902 bls.n 80012d8 80012d2: 69fb ldr r3, [r7, #28] 80012d4: 3b03 subs r3, #3 80012d6: e000 b.n 80012da 80012d8: 2300 movs r3, #0 80012da: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 80012dc: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80012e0: 69bb ldr r3, [r7, #24] 80012e2: fa02 f303 lsl.w r3, r2, r3 80012e6: 43da mvns r2, r3 80012e8: 68bb ldr r3, [r7, #8] 80012ea: 401a ands r2, r3 80012ec: 697b ldr r3, [r7, #20] 80012ee: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 80012f0: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 80012f4: 697b ldr r3, [r7, #20] 80012f6: fa01 f303 lsl.w r3, r1, r3 80012fa: 43d9 mvns r1, r3 80012fc: 687b ldr r3, [r7, #4] 80012fe: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8001300: 4313 orrs r3, r2 ); } 8001302: 4618 mov r0, r3 8001304: 3724 adds r7, #36 @ 0x24 8001306: 46bd mov sp, r7 8001308: f85d 7b04 ldr.w r7, [sp], #4 800130c: 4770 bx lr ... 08001310 : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { 8001310: b580 push {r7, lr} 8001312: b082 sub sp, #8 8001314: af00 add r7, sp, #0 8001316: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) 8001318: 687b ldr r3, [r7, #4] 800131a: 3b01 subs r3, #1 800131c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000 8001320: d301 bcc.n 8001326 { return (1UL); /* Reload value impossible */ 8001322: 2301 movs r3, #1 8001324: e00f b.n 8001346 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ 8001326: 4a0a ldr r2, [pc, #40] @ (8001350 ) 8001328: 687b ldr r3, [r7, #4] 800132a: 3b01 subs r3, #1 800132c: 6053 str r3, [r2, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ 800132e: 210f movs r1, #15 8001330: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8001334: f7ff ff8e bl 8001254 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ 8001338: 4b05 ldr r3, [pc, #20] @ (8001350 ) 800133a: 2200 movs r2, #0 800133c: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | 800133e: 4b04 ldr r3, [pc, #16] @ (8001350 ) 8001340: 2207 movs r2, #7 8001342: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ 8001344: 2300 movs r3, #0 } 8001346: 4618 mov r0, r3 8001348: 3708 adds r7, #8 800134a: 46bd mov sp, r7 800134c: bd80 pop {r7, pc} 800134e: bf00 nop 8001350: e000e010 .word 0xe000e010 08001354 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8001354: b580 push {r7, lr} 8001356: b082 sub sp, #8 8001358: af00 add r7, sp, #0 800135a: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 800135c: 6878 ldr r0, [r7, #4] 800135e: f7ff ff29 bl 80011b4 <__NVIC_SetPriorityGrouping> } 8001362: bf00 nop 8001364: 3708 adds r7, #8 8001366: 46bd mov sp, r7 8001368: bd80 pop {r7, pc} 0800136a : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 800136a: b580 push {r7, lr} 800136c: b086 sub sp, #24 800136e: af00 add r7, sp, #0 8001370: 4603 mov r3, r0 8001372: 60b9 str r1, [r7, #8] 8001374: 607a str r2, [r7, #4] 8001376: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00U; 8001378: 2300 movs r3, #0 800137a: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 800137c: f7ff ff3e bl 80011fc <__NVIC_GetPriorityGrouping> 8001380: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8001382: 687a ldr r2, [r7, #4] 8001384: 68b9 ldr r1, [r7, #8] 8001386: 6978 ldr r0, [r7, #20] 8001388: f7ff ff8e bl 80012a8 800138c: 4602 mov r2, r0 800138e: f997 300f ldrsb.w r3, [r7, #15] 8001392: 4611 mov r1, r2 8001394: 4618 mov r0, r3 8001396: f7ff ff5d bl 8001254 <__NVIC_SetPriority> } 800139a: bf00 nop 800139c: 3718 adds r7, #24 800139e: 46bd mov sp, r7 80013a0: bd80 pop {r7, pc} 080013a2 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f4xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80013a2: b580 push {r7, lr} 80013a4: b082 sub sp, #8 80013a6: af00 add r7, sp, #0 80013a8: 4603 mov r3, r0 80013aa: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80013ac: f997 3007 ldrsb.w r3, [r7, #7] 80013b0: 4618 mov r0, r3 80013b2: f7ff ff31 bl 8001218 <__NVIC_EnableIRQ> } 80013b6: bf00 nop 80013b8: 3708 adds r7, #8 80013ba: 46bd mov sp, r7 80013bc: bd80 pop {r7, pc} 080013be : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { 80013be: b580 push {r7, lr} 80013c0: b082 sub sp, #8 80013c2: af00 add r7, sp, #0 80013c4: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); 80013c6: 6878 ldr r0, [r7, #4] 80013c8: f7ff ffa2 bl 8001310 80013cc: 4603 mov r3, r0 } 80013ce: 4618 mov r0, r3 80013d0: 3708 adds r7, #8 80013d2: 46bd mov sp, r7 80013d4: bd80 pop {r7, pc} ... 080013d8 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80013d8: b480 push {r7} 80013da: b089 sub sp, #36 @ 0x24 80013dc: af00 add r7, sp, #0 80013de: 6078 str r0, [r7, #4] 80013e0: 6039 str r1, [r7, #0] uint32_t position; uint32_t ioposition = 0x00U; 80013e2: 2300 movs r3, #0 80013e4: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; 80013e6: 2300 movs r3, #0 80013e8: 613b str r3, [r7, #16] uint32_t temp = 0x00U; 80013ea: 2300 movs r3, #0 80013ec: 61bb str r3, [r7, #24] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for(position = 0U; position < GPIO_NUMBER; position++) 80013ee: 2300 movs r3, #0 80013f0: 61fb str r3, [r7, #28] 80013f2: e165 b.n 80016c0 { /* Get the IO position */ ioposition = 0x01U << position; 80013f4: 2201 movs r2, #1 80013f6: 69fb ldr r3, [r7, #28] 80013f8: fa02 f303 lsl.w r3, r2, r3 80013fc: 617b str r3, [r7, #20] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80013fe: 683b ldr r3, [r7, #0] 8001400: 681b ldr r3, [r3, #0] 8001402: 697a ldr r2, [r7, #20] 8001404: 4013 ands r3, r2 8001406: 613b str r3, [r7, #16] if(iocurrent == ioposition) 8001408: 693a ldr r2, [r7, #16] 800140a: 697b ldr r3, [r7, #20] 800140c: 429a cmp r2, r3 800140e: f040 8154 bne.w 80016ba { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ 8001412: 683b ldr r3, [r7, #0] 8001414: 685b ldr r3, [r3, #4] 8001416: f003 0303 and.w r3, r3, #3 800141a: 2b01 cmp r3, #1 800141c: d005 beq.n 800142a (GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 800141e: 683b ldr r3, [r7, #0] 8001420: 685b ldr r3, [r3, #4] 8001422: f003 0303 and.w r3, r3, #3 if(((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || \ 8001426: 2b02 cmp r3, #2 8001428: d130 bne.n 800148c { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; 800142a: 687b ldr r3, [r7, #4] 800142c: 689b ldr r3, [r3, #8] 800142e: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U)); 8001430: 69fb ldr r3, [r7, #28] 8001432: 005b lsls r3, r3, #1 8001434: 2203 movs r2, #3 8001436: fa02 f303 lsl.w r3, r2, r3 800143a: 43db mvns r3, r3 800143c: 69ba ldr r2, [r7, #24] 800143e: 4013 ands r3, r2 8001440: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2U)); 8001442: 683b ldr r3, [r7, #0] 8001444: 68da ldr r2, [r3, #12] 8001446: 69fb ldr r3, [r7, #28] 8001448: 005b lsls r3, r3, #1 800144a: fa02 f303 lsl.w r3, r2, r3 800144e: 69ba ldr r2, [r7, #24] 8001450: 4313 orrs r3, r2 8001452: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; 8001454: 687b ldr r3, [r7, #4] 8001456: 69ba ldr r2, [r7, #24] 8001458: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; 800145a: 687b ldr r3, [r7, #4] 800145c: 685b ldr r3, [r3, #4] 800145e: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT_0 << position) ; 8001460: 2201 movs r2, #1 8001462: 69fb ldr r3, [r7, #28] 8001464: fa02 f303 lsl.w r3, r2, r3 8001468: 43db mvns r3, r3 800146a: 69ba ldr r2, [r7, #24] 800146c: 4013 ands r3, r2 800146e: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 8001470: 683b ldr r3, [r7, #0] 8001472: 685b ldr r3, [r3, #4] 8001474: 091b lsrs r3, r3, #4 8001476: f003 0201 and.w r2, r3, #1 800147a: 69fb ldr r3, [r7, #28] 800147c: fa02 f303 lsl.w r3, r2, r3 8001480: 69ba ldr r2, [r7, #24] 8001482: 4313 orrs r3, r2 8001484: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; 8001486: 687b ldr r3, [r7, #4] 8001488: 69ba ldr r2, [r7, #24] 800148a: 605a str r2, [r3, #4] } if((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) 800148c: 683b ldr r3, [r7, #0] 800148e: 685b ldr r3, [r3, #4] 8001490: f003 0303 and.w r3, r3, #3 8001494: 2b03 cmp r3, #3 8001496: d017 beq.n 80014c8 { /* Check the parameters */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; 8001498: 687b ldr r3, [r7, #4] 800149a: 68db ldr r3, [r3, #12] 800149c: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); 800149e: 69fb ldr r3, [r7, #28] 80014a0: 005b lsls r3, r3, #1 80014a2: 2203 movs r2, #3 80014a4: fa02 f303 lsl.w r3, r2, r3 80014a8: 43db mvns r3, r3 80014aa: 69ba ldr r2, [r7, #24] 80014ac: 4013 ands r3, r2 80014ae: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2U)); 80014b0: 683b ldr r3, [r7, #0] 80014b2: 689a ldr r2, [r3, #8] 80014b4: 69fb ldr r3, [r7, #28] 80014b6: 005b lsls r3, r3, #1 80014b8: fa02 f303 lsl.w r3, r2, r3 80014bc: 69ba ldr r2, [r7, #24] 80014be: 4313 orrs r3, r2 80014c0: 61bb str r3, [r7, #24] GPIOx->PUPDR = temp; 80014c2: 687b ldr r3, [r7, #4] 80014c4: 69ba ldr r2, [r7, #24] 80014c6: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 80014c8: 683b ldr r3, [r7, #0] 80014ca: 685b ldr r3, [r3, #4] 80014cc: f003 0303 and.w r3, r3, #3 80014d0: 2b02 cmp r3, #2 80014d2: d123 bne.n 800151c { /* Check the Alternate function parameter */ assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; 80014d4: 69fb ldr r3, [r7, #28] 80014d6: 08da lsrs r2, r3, #3 80014d8: 687b ldr r3, [r7, #4] 80014da: 3208 adds r2, #8 80014dc: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80014e0: 61bb str r3, [r7, #24] temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ; 80014e2: 69fb ldr r3, [r7, #28] 80014e4: f003 0307 and.w r3, r3, #7 80014e8: 009b lsls r3, r3, #2 80014ea: 220f movs r2, #15 80014ec: fa02 f303 lsl.w r3, r2, r3 80014f0: 43db mvns r3, r3 80014f2: 69ba ldr r2, [r7, #24] 80014f4: 4013 ands r3, r2 80014f6: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U)); 80014f8: 683b ldr r3, [r7, #0] 80014fa: 691a ldr r2, [r3, #16] 80014fc: 69fb ldr r3, [r7, #28] 80014fe: f003 0307 and.w r3, r3, #7 8001502: 009b lsls r3, r3, #2 8001504: fa02 f303 lsl.w r3, r2, r3 8001508: 69ba ldr r2, [r7, #24] 800150a: 4313 orrs r3, r2 800150c: 61bb str r3, [r7, #24] GPIOx->AFR[position >> 3U] = temp; 800150e: 69fb ldr r3, [r7, #28] 8001510: 08da lsrs r2, r3, #3 8001512: 687b ldr r3, [r7, #4] 8001514: 3208 adds r2, #8 8001516: 69b9 ldr r1, [r7, #24] 8001518: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; 800151c: 687b ldr r3, [r7, #4] 800151e: 681b ldr r3, [r3, #0] 8001520: 61bb str r3, [r7, #24] temp &= ~(GPIO_MODER_MODER0 << (position * 2U)); 8001522: 69fb ldr r3, [r7, #28] 8001524: 005b lsls r3, r3, #1 8001526: 2203 movs r2, #3 8001528: fa02 f303 lsl.w r3, r2, r3 800152c: 43db mvns r3, r3 800152e: 69ba ldr r2, [r7, #24] 8001530: 4013 ands r3, r2 8001532: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); 8001534: 683b ldr r3, [r7, #0] 8001536: 685b ldr r3, [r3, #4] 8001538: f003 0203 and.w r2, r3, #3 800153c: 69fb ldr r3, [r7, #28] 800153e: 005b lsls r3, r3, #1 8001540: fa02 f303 lsl.w r3, r2, r3 8001544: 69ba ldr r2, [r7, #24] 8001546: 4313 orrs r3, r2 8001548: 61bb str r3, [r7, #24] GPIOx->MODER = temp; 800154a: 687b ldr r3, [r7, #4] 800154c: 69ba ldr r2, [r7, #24] 800154e: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) != 0x00U) 8001550: 683b ldr r3, [r7, #0] 8001552: 685b ldr r3, [r3, #4] 8001554: f403 3340 and.w r3, r3, #196608 @ 0x30000 8001558: 2b00 cmp r3, #0 800155a: f000 80ae beq.w 80016ba { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 800155e: 2300 movs r3, #0 8001560: 60fb str r3, [r7, #12] 8001562: 4b5d ldr r3, [pc, #372] @ (80016d8 ) 8001564: 6c5b ldr r3, [r3, #68] @ 0x44 8001566: 4a5c ldr r2, [pc, #368] @ (80016d8 ) 8001568: f443 4380 orr.w r3, r3, #16384 @ 0x4000 800156c: 6453 str r3, [r2, #68] @ 0x44 800156e: 4b5a ldr r3, [pc, #360] @ (80016d8 ) 8001570: 6c5b ldr r3, [r3, #68] @ 0x44 8001572: f403 4380 and.w r3, r3, #16384 @ 0x4000 8001576: 60fb str r3, [r7, #12] 8001578: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2U]; 800157a: 4a58 ldr r2, [pc, #352] @ (80016dc ) 800157c: 69fb ldr r3, [r7, #28] 800157e: 089b lsrs r3, r3, #2 8001580: 3302 adds r3, #2 8001582: f852 3023 ldr.w r3, [r2, r3, lsl #2] 8001586: 61bb str r3, [r7, #24] temp &= ~(0x0FU << (4U * (position & 0x03U))); 8001588: 69fb ldr r3, [r7, #28] 800158a: f003 0303 and.w r3, r3, #3 800158e: 009b lsls r3, r3, #2 8001590: 220f movs r2, #15 8001592: fa02 f303 lsl.w r3, r2, r3 8001596: 43db mvns r3, r3 8001598: 69ba ldr r2, [r7, #24] 800159a: 4013 ands r3, r2 800159c: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))); 800159e: 687b ldr r3, [r7, #4] 80015a0: 4a4f ldr r2, [pc, #316] @ (80016e0 ) 80015a2: 4293 cmp r3, r2 80015a4: d025 beq.n 80015f2 80015a6: 687b ldr r3, [r7, #4] 80015a8: 4a4e ldr r2, [pc, #312] @ (80016e4 ) 80015aa: 4293 cmp r3, r2 80015ac: d01f beq.n 80015ee 80015ae: 687b ldr r3, [r7, #4] 80015b0: 4a4d ldr r2, [pc, #308] @ (80016e8 ) 80015b2: 4293 cmp r3, r2 80015b4: d019 beq.n 80015ea 80015b6: 687b ldr r3, [r7, #4] 80015b8: 4a4c ldr r2, [pc, #304] @ (80016ec ) 80015ba: 4293 cmp r3, r2 80015bc: d013 beq.n 80015e6 80015be: 687b ldr r3, [r7, #4] 80015c0: 4a4b ldr r2, [pc, #300] @ (80016f0 ) 80015c2: 4293 cmp r3, r2 80015c4: d00d beq.n 80015e2 80015c6: 687b ldr r3, [r7, #4] 80015c8: 4a4a ldr r2, [pc, #296] @ (80016f4 ) 80015ca: 4293 cmp r3, r2 80015cc: d007 beq.n 80015de 80015ce: 687b ldr r3, [r7, #4] 80015d0: 4a49 ldr r2, [pc, #292] @ (80016f8 ) 80015d2: 4293 cmp r3, r2 80015d4: d101 bne.n 80015da 80015d6: 2306 movs r3, #6 80015d8: e00c b.n 80015f4 80015da: 2307 movs r3, #7 80015dc: e00a b.n 80015f4 80015de: 2305 movs r3, #5 80015e0: e008 b.n 80015f4 80015e2: 2304 movs r3, #4 80015e4: e006 b.n 80015f4 80015e6: 2303 movs r3, #3 80015e8: e004 b.n 80015f4 80015ea: 2302 movs r3, #2 80015ec: e002 b.n 80015f4 80015ee: 2301 movs r3, #1 80015f0: e000 b.n 80015f4 80015f2: 2300 movs r3, #0 80015f4: 69fa ldr r2, [r7, #28] 80015f6: f002 0203 and.w r2, r2, #3 80015fa: 0092 lsls r2, r2, #2 80015fc: 4093 lsls r3, r2 80015fe: 69ba ldr r2, [r7, #24] 8001600: 4313 orrs r3, r2 8001602: 61bb str r3, [r7, #24] SYSCFG->EXTICR[position >> 2U] = temp; 8001604: 4935 ldr r1, [pc, #212] @ (80016dc ) 8001606: 69fb ldr r3, [r7, #28] 8001608: 089b lsrs r3, r3, #2 800160a: 3302 adds r3, #2 800160c: 69ba ldr r2, [r7, #24] 800160e: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; 8001612: 4b3a ldr r3, [pc, #232] @ (80016fc ) 8001614: 689b ldr r3, [r3, #8] 8001616: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8001618: 693b ldr r3, [r7, #16] 800161a: 43db mvns r3, r3 800161c: 69ba ldr r2, [r7, #24] 800161e: 4013 ands r3, r2 8001620: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) 8001622: 683b ldr r3, [r7, #0] 8001624: 685b ldr r3, [r3, #4] 8001626: f403 1380 and.w r3, r3, #1048576 @ 0x100000 800162a: 2b00 cmp r3, #0 800162c: d003 beq.n 8001636 { temp |= iocurrent; 800162e: 69ba ldr r2, [r7, #24] 8001630: 693b ldr r3, [r7, #16] 8001632: 4313 orrs r3, r2 8001634: 61bb str r3, [r7, #24] } EXTI->RTSR = temp; 8001636: 4a31 ldr r2, [pc, #196] @ (80016fc ) 8001638: 69bb ldr r3, [r7, #24] 800163a: 6093 str r3, [r2, #8] temp = EXTI->FTSR; 800163c: 4b2f ldr r3, [pc, #188] @ (80016fc ) 800163e: 68db ldr r3, [r3, #12] 8001640: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8001642: 693b ldr r3, [r7, #16] 8001644: 43db mvns r3, r3 8001646: 69ba ldr r2, [r7, #24] 8001648: 4013 ands r3, r2 800164a: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) 800164c: 683b ldr r3, [r7, #0] 800164e: 685b ldr r3, [r3, #4] 8001650: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8001654: 2b00 cmp r3, #0 8001656: d003 beq.n 8001660 { temp |= iocurrent; 8001658: 69ba ldr r2, [r7, #24] 800165a: 693b ldr r3, [r7, #16] 800165c: 4313 orrs r3, r2 800165e: 61bb str r3, [r7, #24] } EXTI->FTSR = temp; 8001660: 4a26 ldr r2, [pc, #152] @ (80016fc ) 8001662: 69bb ldr r3, [r7, #24] 8001664: 60d3 str r3, [r2, #12] temp = EXTI->EMR; 8001666: 4b25 ldr r3, [pc, #148] @ (80016fc ) 8001668: 685b ldr r3, [r3, #4] 800166a: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 800166c: 693b ldr r3, [r7, #16] 800166e: 43db mvns r3, r3 8001670: 69ba ldr r2, [r7, #24] 8001672: 4013 ands r3, r2 8001674: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_EVT) != 0x00U) 8001676: 683b ldr r3, [r7, #0] 8001678: 685b ldr r3, [r3, #4] 800167a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800167e: 2b00 cmp r3, #0 8001680: d003 beq.n 800168a { temp |= iocurrent; 8001682: 69ba ldr r2, [r7, #24] 8001684: 693b ldr r3, [r7, #16] 8001686: 4313 orrs r3, r2 8001688: 61bb str r3, [r7, #24] } EXTI->EMR = temp; 800168a: 4a1c ldr r2, [pc, #112] @ (80016fc ) 800168c: 69bb ldr r3, [r7, #24] 800168e: 6053 str r3, [r2, #4] /* Clear EXTI line configuration */ temp = EXTI->IMR; 8001690: 4b1a ldr r3, [pc, #104] @ (80016fc ) 8001692: 681b ldr r3, [r3, #0] 8001694: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8001696: 693b ldr r3, [r7, #16] 8001698: 43db mvns r3, r3 800169a: 69ba ldr r2, [r7, #24] 800169c: 4013 ands r3, r2 800169e: 61bb str r3, [r7, #24] if((GPIO_Init->Mode & EXTI_IT) != 0x00U) 80016a0: 683b ldr r3, [r7, #0] 80016a2: 685b ldr r3, [r3, #4] 80016a4: f403 3380 and.w r3, r3, #65536 @ 0x10000 80016a8: 2b00 cmp r3, #0 80016aa: d003 beq.n 80016b4 { temp |= iocurrent; 80016ac: 69ba ldr r2, [r7, #24] 80016ae: 693b ldr r3, [r7, #16] 80016b0: 4313 orrs r3, r2 80016b2: 61bb str r3, [r7, #24] } EXTI->IMR = temp; 80016b4: 4a11 ldr r2, [pc, #68] @ (80016fc ) 80016b6: 69bb ldr r3, [r7, #24] 80016b8: 6013 str r3, [r2, #0] for(position = 0U; position < GPIO_NUMBER; position++) 80016ba: 69fb ldr r3, [r7, #28] 80016bc: 3301 adds r3, #1 80016be: 61fb str r3, [r7, #28] 80016c0: 69fb ldr r3, [r7, #28] 80016c2: 2b0f cmp r3, #15 80016c4: f67f ae96 bls.w 80013f4 } } } } 80016c8: bf00 nop 80016ca: bf00 nop 80016cc: 3724 adds r7, #36 @ 0x24 80016ce: 46bd mov sp, r7 80016d0: f85d 7b04 ldr.w r7, [sp], #4 80016d4: 4770 bx lr 80016d6: bf00 nop 80016d8: 40023800 .word 0x40023800 80016dc: 40013800 .word 0x40013800 80016e0: 40020000 .word 0x40020000 80016e4: 40020400 .word 0x40020400 80016e8: 40020800 .word 0x40020800 80016ec: 40020c00 .word 0x40020c00 80016f0: 40021000 .word 0x40021000 80016f4: 40021400 .word 0x40021400 80016f8: 40021800 .word 0x40021800 80016fc: 40013c00 .word 0x40013c00 08001700 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8001700: b480 push {r7} 8001702: b083 sub sp, #12 8001704: af00 add r7, sp, #0 8001706: 6078 str r0, [r7, #4] 8001708: 460b mov r3, r1 800170a: 807b strh r3, [r7, #2] 800170c: 4613 mov r3, r2 800170e: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if(PinState != GPIO_PIN_RESET) 8001710: 787b ldrb r3, [r7, #1] 8001712: 2b00 cmp r3, #0 8001714: d003 beq.n 800171e { GPIOx->BSRR = GPIO_Pin; 8001716: 887a ldrh r2, [r7, #2] 8001718: 687b ldr r3, [r7, #4] 800171a: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; } } 800171c: e003 b.n 8001726 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U; 800171e: 887b ldrh r3, [r7, #2] 8001720: 041a lsls r2, r3, #16 8001722: 687b ldr r3, [r7, #4] 8001724: 619a str r2, [r3, #24] } 8001726: bf00 nop 8001728: 370c adds r7, #12 800172a: 46bd mov sp, r7 800172c: f85d 7b04 ldr.w r7, [sp], #4 8001730: 4770 bx lr ... 08001734 : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 8001734: b580 push {r7, lr} 8001736: b084 sub sp, #16 8001738: af00 add r7, sp, #0 800173a: 6078 str r0, [r7, #4] uint32_t freqrange; uint32_t pclk1; /* Check the I2C handle allocation */ if (hi2c == NULL) 800173c: 687b ldr r3, [r7, #4] 800173e: 2b00 cmp r3, #0 8001740: d101 bne.n 8001746 { return HAL_ERROR; 8001742: 2301 movs r3, #1 8001744: e12b b.n 800199e assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 8001746: 687b ldr r3, [r7, #4] 8001748: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 800174c: b2db uxtb r3, r3 800174e: 2b00 cmp r3, #0 8001750: d106 bne.n 8001760 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 8001752: 687b ldr r3, [r7, #4] 8001754: 2200 movs r2, #0 8001756: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Init the low level hardware : GPIO, CLOCK, NVIC */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_I2C_MspInit(hi2c); 800175a: 6878 ldr r0, [r7, #4] 800175c: f7ff f9fa bl 8000b54 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 8001760: 687b ldr r3, [r7, #4] 8001762: 2224 movs r2, #36 @ 0x24 8001764: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8001768: 687b ldr r3, [r7, #4] 800176a: 681b ldr r3, [r3, #0] 800176c: 681a ldr r2, [r3, #0] 800176e: 687b ldr r3, [r7, #4] 8001770: 681b ldr r3, [r3, #0] 8001772: f022 0201 bic.w r2, r2, #1 8001776: 601a str r2, [r3, #0] /*Reset I2C*/ hi2c->Instance->CR1 |= I2C_CR1_SWRST; 8001778: 687b ldr r3, [r7, #4] 800177a: 681b ldr r3, [r3, #0] 800177c: 681a ldr r2, [r3, #0] 800177e: 687b ldr r3, [r7, #4] 8001780: 681b ldr r3, [r3, #0] 8001782: f442 4200 orr.w r2, r2, #32768 @ 0x8000 8001786: 601a str r2, [r3, #0] hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; 8001788: 687b ldr r3, [r7, #4] 800178a: 681b ldr r3, [r3, #0] 800178c: 681a ldr r2, [r3, #0] 800178e: 687b ldr r3, [r7, #4] 8001790: 681b ldr r3, [r3, #0] 8001792: f422 4200 bic.w r2, r2, #32768 @ 0x8000 8001796: 601a str r2, [r3, #0] /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); 8001798: f001 fc88 bl 80030ac 800179c: 60f8 str r0, [r7, #12] /* Check the minimum allowed PCLK1 frequency */ if (I2C_MIN_PCLK_FREQ(pclk1, hi2c->Init.ClockSpeed) == 1U) 800179e: 687b ldr r3, [r7, #4] 80017a0: 685b ldr r3, [r3, #4] 80017a2: 4a81 ldr r2, [pc, #516] @ (80019a8 ) 80017a4: 4293 cmp r3, r2 80017a6: d807 bhi.n 80017b8 80017a8: 68fb ldr r3, [r7, #12] 80017aa: 4a80 ldr r2, [pc, #512] @ (80019ac ) 80017ac: 4293 cmp r3, r2 80017ae: bf94 ite ls 80017b0: 2301 movls r3, #1 80017b2: 2300 movhi r3, #0 80017b4: b2db uxtb r3, r3 80017b6: e006 b.n 80017c6 80017b8: 68fb ldr r3, [r7, #12] 80017ba: 4a7d ldr r2, [pc, #500] @ (80019b0 ) 80017bc: 4293 cmp r3, r2 80017be: bf94 ite ls 80017c0: 2301 movls r3, #1 80017c2: 2300 movhi r3, #0 80017c4: b2db uxtb r3, r3 80017c6: 2b00 cmp r3, #0 80017c8: d001 beq.n 80017ce { return HAL_ERROR; 80017ca: 2301 movs r3, #1 80017cc: e0e7 b.n 800199e } /* Calculate frequency range */ freqrange = I2C_FREQRANGE(pclk1); 80017ce: 68fb ldr r3, [r7, #12] 80017d0: 4a78 ldr r2, [pc, #480] @ (80019b4 ) 80017d2: fba2 2303 umull r2, r3, r2, r3 80017d6: 0c9b lsrs r3, r3, #18 80017d8: 60bb str r3, [r7, #8] /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Frequency range */ MODIFY_REG(hi2c->Instance->CR2, I2C_CR2_FREQ, freqrange); 80017da: 687b ldr r3, [r7, #4] 80017dc: 681b ldr r3, [r3, #0] 80017de: 685b ldr r3, [r3, #4] 80017e0: f023 013f bic.w r1, r3, #63 @ 0x3f 80017e4: 687b ldr r3, [r7, #4] 80017e6: 681b ldr r3, [r3, #0] 80017e8: 68ba ldr r2, [r7, #8] 80017ea: 430a orrs r2, r1 80017ec: 605a str r2, [r3, #4] /*---------------------------- I2Cx TRISE Configuration --------------------*/ /* Configure I2Cx: Rise Time */ MODIFY_REG(hi2c->Instance->TRISE, I2C_TRISE_TRISE, I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed)); 80017ee: 687b ldr r3, [r7, #4] 80017f0: 681b ldr r3, [r3, #0] 80017f2: 6a1b ldr r3, [r3, #32] 80017f4: f023 013f bic.w r1, r3, #63 @ 0x3f 80017f8: 687b ldr r3, [r7, #4] 80017fa: 685b ldr r3, [r3, #4] 80017fc: 4a6a ldr r2, [pc, #424] @ (80019a8 ) 80017fe: 4293 cmp r3, r2 8001800: d802 bhi.n 8001808 8001802: 68bb ldr r3, [r7, #8] 8001804: 3301 adds r3, #1 8001806: e009 b.n 800181c 8001808: 68bb ldr r3, [r7, #8] 800180a: f44f 7296 mov.w r2, #300 @ 0x12c 800180e: fb02 f303 mul.w r3, r2, r3 8001812: 4a69 ldr r2, [pc, #420] @ (80019b8 ) 8001814: fba2 2303 umull r2, r3, r2, r3 8001818: 099b lsrs r3, r3, #6 800181a: 3301 adds r3, #1 800181c: 687a ldr r2, [r7, #4] 800181e: 6812 ldr r2, [r2, #0] 8001820: 430b orrs r3, r1 8001822: 6213 str r3, [r2, #32] /*---------------------------- I2Cx CCR Configuration ----------------------*/ /* Configure I2Cx: Speed */ MODIFY_REG(hi2c->Instance->CCR, (I2C_CCR_FS | I2C_CCR_DUTY | I2C_CCR_CCR), I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle)); 8001824: 687b ldr r3, [r7, #4] 8001826: 681b ldr r3, [r3, #0] 8001828: 69db ldr r3, [r3, #28] 800182a: f423 424f bic.w r2, r3, #52992 @ 0xcf00 800182e: f022 02ff bic.w r2, r2, #255 @ 0xff 8001832: 687b ldr r3, [r7, #4] 8001834: 685b ldr r3, [r3, #4] 8001836: 495c ldr r1, [pc, #368] @ (80019a8 ) 8001838: 428b cmp r3, r1 800183a: d819 bhi.n 8001870 800183c: 68fb ldr r3, [r7, #12] 800183e: 1e59 subs r1, r3, #1 8001840: 687b ldr r3, [r7, #4] 8001842: 685b ldr r3, [r3, #4] 8001844: 005b lsls r3, r3, #1 8001846: fbb1 f3f3 udiv r3, r1, r3 800184a: 1c59 adds r1, r3, #1 800184c: f640 73fc movw r3, #4092 @ 0xffc 8001850: 400b ands r3, r1 8001852: 2b00 cmp r3, #0 8001854: d00a beq.n 800186c 8001856: 68fb ldr r3, [r7, #12] 8001858: 1e59 subs r1, r3, #1 800185a: 687b ldr r3, [r7, #4] 800185c: 685b ldr r3, [r3, #4] 800185e: 005b lsls r3, r3, #1 8001860: fbb1 f3f3 udiv r3, r1, r3 8001864: 3301 adds r3, #1 8001866: f3c3 030b ubfx r3, r3, #0, #12 800186a: e051 b.n 8001910 800186c: 2304 movs r3, #4 800186e: e04f b.n 8001910 8001870: 687b ldr r3, [r7, #4] 8001872: 689b ldr r3, [r3, #8] 8001874: 2b00 cmp r3, #0 8001876: d111 bne.n 800189c 8001878: 68fb ldr r3, [r7, #12] 800187a: 1e58 subs r0, r3, #1 800187c: 687b ldr r3, [r7, #4] 800187e: 6859 ldr r1, [r3, #4] 8001880: 460b mov r3, r1 8001882: 005b lsls r3, r3, #1 8001884: 440b add r3, r1 8001886: fbb0 f3f3 udiv r3, r0, r3 800188a: 3301 adds r3, #1 800188c: f3c3 030b ubfx r3, r3, #0, #12 8001890: 2b00 cmp r3, #0 8001892: bf0c ite eq 8001894: 2301 moveq r3, #1 8001896: 2300 movne r3, #0 8001898: b2db uxtb r3, r3 800189a: e012 b.n 80018c2 800189c: 68fb ldr r3, [r7, #12] 800189e: 1e58 subs r0, r3, #1 80018a0: 687b ldr r3, [r7, #4] 80018a2: 6859 ldr r1, [r3, #4] 80018a4: 460b mov r3, r1 80018a6: 009b lsls r3, r3, #2 80018a8: 440b add r3, r1 80018aa: 0099 lsls r1, r3, #2 80018ac: 440b add r3, r1 80018ae: fbb0 f3f3 udiv r3, r0, r3 80018b2: 3301 adds r3, #1 80018b4: f3c3 030b ubfx r3, r3, #0, #12 80018b8: 2b00 cmp r3, #0 80018ba: bf0c ite eq 80018bc: 2301 moveq r3, #1 80018be: 2300 movne r3, #0 80018c0: b2db uxtb r3, r3 80018c2: 2b00 cmp r3, #0 80018c4: d001 beq.n 80018ca 80018c6: 2301 movs r3, #1 80018c8: e022 b.n 8001910 80018ca: 687b ldr r3, [r7, #4] 80018cc: 689b ldr r3, [r3, #8] 80018ce: 2b00 cmp r3, #0 80018d0: d10e bne.n 80018f0 80018d2: 68fb ldr r3, [r7, #12] 80018d4: 1e58 subs r0, r3, #1 80018d6: 687b ldr r3, [r7, #4] 80018d8: 6859 ldr r1, [r3, #4] 80018da: 460b mov r3, r1 80018dc: 005b lsls r3, r3, #1 80018de: 440b add r3, r1 80018e0: fbb0 f3f3 udiv r3, r0, r3 80018e4: 3301 adds r3, #1 80018e6: f3c3 030b ubfx r3, r3, #0, #12 80018ea: f443 4300 orr.w r3, r3, #32768 @ 0x8000 80018ee: e00f b.n 8001910 80018f0: 68fb ldr r3, [r7, #12] 80018f2: 1e58 subs r0, r3, #1 80018f4: 687b ldr r3, [r7, #4] 80018f6: 6859 ldr r1, [r3, #4] 80018f8: 460b mov r3, r1 80018fa: 009b lsls r3, r3, #2 80018fc: 440b add r3, r1 80018fe: 0099 lsls r1, r3, #2 8001900: 440b add r3, r1 8001902: fbb0 f3f3 udiv r3, r0, r3 8001906: 3301 adds r3, #1 8001908: f3c3 030b ubfx r3, r3, #0, #12 800190c: f443 4340 orr.w r3, r3, #49152 @ 0xc000 8001910: 6879 ldr r1, [r7, #4] 8001912: 6809 ldr r1, [r1, #0] 8001914: 4313 orrs r3, r2 8001916: 61cb str r3, [r1, #28] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ MODIFY_REG(hi2c->Instance->CR1, (I2C_CR1_ENGC | I2C_CR1_NOSTRETCH), (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode)); 8001918: 687b ldr r3, [r7, #4] 800191a: 681b ldr r3, [r3, #0] 800191c: 681b ldr r3, [r3, #0] 800191e: f023 01c0 bic.w r1, r3, #192 @ 0xc0 8001922: 687b ldr r3, [r7, #4] 8001924: 69da ldr r2, [r3, #28] 8001926: 687b ldr r3, [r7, #4] 8001928: 6a1b ldr r3, [r3, #32] 800192a: 431a orrs r2, r3 800192c: 687b ldr r3, [r7, #4] 800192e: 681b ldr r3, [r3, #0] 8001930: 430a orrs r2, r1 8001932: 601a str r2, [r3, #0] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Configure I2Cx: Own Address1 and addressing mode */ MODIFY_REG(hi2c->Instance->OAR1, (I2C_OAR1_ADDMODE | I2C_OAR1_ADD8_9 | I2C_OAR1_ADD1_7 | I2C_OAR1_ADD0), (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1)); 8001934: 687b ldr r3, [r7, #4] 8001936: 681b ldr r3, [r3, #0] 8001938: 689b ldr r3, [r3, #8] 800193a: f423 4303 bic.w r3, r3, #33536 @ 0x8300 800193e: f023 03ff bic.w r3, r3, #255 @ 0xff 8001942: 687a ldr r2, [r7, #4] 8001944: 6911 ldr r1, [r2, #16] 8001946: 687a ldr r2, [r7, #4] 8001948: 68d2 ldr r2, [r2, #12] 800194a: 4311 orrs r1, r2 800194c: 687a ldr r2, [r7, #4] 800194e: 6812 ldr r2, [r2, #0] 8001950: 430b orrs r3, r1 8001952: 6093 str r3, [r2, #8] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Configure I2Cx: Dual mode and Own Address2 */ MODIFY_REG(hi2c->Instance->OAR2, (I2C_OAR2_ENDUAL | I2C_OAR2_ADD2), (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2)); 8001954: 687b ldr r3, [r7, #4] 8001956: 681b ldr r3, [r3, #0] 8001958: 68db ldr r3, [r3, #12] 800195a: f023 01ff bic.w r1, r3, #255 @ 0xff 800195e: 687b ldr r3, [r7, #4] 8001960: 695a ldr r2, [r3, #20] 8001962: 687b ldr r3, [r7, #4] 8001964: 699b ldr r3, [r3, #24] 8001966: 431a orrs r2, r3 8001968: 687b ldr r3, [r7, #4] 800196a: 681b ldr r3, [r3, #0] 800196c: 430a orrs r2, r1 800196e: 60da str r2, [r3, #12] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8001970: 687b ldr r3, [r7, #4] 8001972: 681b ldr r3, [r3, #0] 8001974: 681a ldr r2, [r3, #0] 8001976: 687b ldr r3, [r7, #4] 8001978: 681b ldr r3, [r3, #0] 800197a: f042 0201 orr.w r2, r2, #1 800197e: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8001980: 687b ldr r3, [r7, #4] 8001982: 2200 movs r2, #0 8001984: 641a str r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_READY; 8001986: 687b ldr r3, [r7, #4] 8001988: 2220 movs r2, #32 800198a: f883 203d strb.w r2, [r3, #61] @ 0x3d hi2c->PreviousState = I2C_STATE_NONE; 800198e: 687b ldr r3, [r7, #4] 8001990: 2200 movs r2, #0 8001992: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 8001994: 687b ldr r3, [r7, #4] 8001996: 2200 movs r2, #0 8001998: f883 203e strb.w r2, [r3, #62] @ 0x3e return HAL_OK; 800199c: 2300 movs r3, #0 } 800199e: 4618 mov r0, r3 80019a0: 3710 adds r7, #16 80019a2: 46bd mov sp, r7 80019a4: bd80 pop {r7, pc} 80019a6: bf00 nop 80019a8: 000186a0 .word 0x000186a0 80019ac: 001e847f .word 0x001e847f 80019b0: 003d08ff .word 0x003d08ff 80019b4: 431bde83 .word 0x431bde83 80019b8: 10624dd3 .word 0x10624dd3 080019bc : * parameters in the PCD_InitTypeDef and initialize the associated handle. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) { 80019bc: b580 push {r7, lr} 80019be: b086 sub sp, #24 80019c0: af02 add r7, sp, #8 80019c2: 6078 str r0, [r7, #4] const USB_OTG_GlobalTypeDef *USBx; #endif /* defined (USB_OTG_FS) */ uint8_t i; /* Check the PCD handle allocation */ if (hpcd == NULL) 80019c4: 687b ldr r3, [r7, #4] 80019c6: 2b00 cmp r3, #0 80019c8: d101 bne.n 80019ce { return HAL_ERROR; 80019ca: 2301 movs r3, #1 80019cc: e108 b.n 8001be0 /* Check the parameters */ assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); #if defined (USB_OTG_FS) USBx = hpcd->Instance; 80019ce: 687b ldr r3, [r7, #4] 80019d0: 681b ldr r3, [r3, #0] 80019d2: 60bb str r3, [r7, #8] #endif /* defined (USB_OTG_FS) */ if (hpcd->State == HAL_PCD_STATE_RESET) 80019d4: 687b ldr r3, [r7, #4] 80019d6: f893 3495 ldrb.w r3, [r3, #1173] @ 0x495 80019da: b2db uxtb r3, r3 80019dc: 2b00 cmp r3, #0 80019de: d106 bne.n 80019ee { /* Allocate lock resource and initialize it */ hpcd->Lock = HAL_UNLOCKED; 80019e0: 687b ldr r3, [r7, #4] 80019e2: 2200 movs r2, #0 80019e4: f883 2494 strb.w r2, [r3, #1172] @ 0x494 /* Init the low level hardware */ hpcd->MspInitCallback(hpcd); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_PCD_MspInit(hpcd); 80019e8: 6878 ldr r0, [r7, #4] 80019ea: f006 fc79 bl 80082e0 #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ } hpcd->State = HAL_PCD_STATE_BUSY; 80019ee: 687b ldr r3, [r7, #4] 80019f0: 2203 movs r2, #3 80019f2: f883 2495 strb.w r2, [r3, #1173] @ 0x495 #if defined (USB_OTG_FS) /* Disable DMA mode for FS instance */ if (USBx == USB_OTG_FS) 80019f6: 68bb ldr r3, [r7, #8] 80019f8: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000 80019fc: d102 bne.n 8001a04 { hpcd->Init.dma_enable = 0U; 80019fe: 687b ldr r3, [r7, #4] 8001a00: 2200 movs r2, #0 8001a02: 719a strb r2, [r3, #6] } #endif /* defined (USB_OTG_FS) */ /* Disable the Interrupts */ __HAL_PCD_DISABLE(hpcd); 8001a04: 687b ldr r3, [r7, #4] 8001a06: 681b ldr r3, [r3, #0] 8001a08: 4618 mov r0, r3 8001a0a: f003 fb6e bl 80050ea /*Init the Core (common init.) */ if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK) 8001a0e: 687b ldr r3, [r7, #4] 8001a10: 6818 ldr r0, [r3, #0] 8001a12: 687b ldr r3, [r7, #4] 8001a14: 7c1a ldrb r2, [r3, #16] 8001a16: f88d 2000 strb.w r2, [sp] 8001a1a: 3304 adds r3, #4 8001a1c: cb0e ldmia r3, {r1, r2, r3} 8001a1e: f003 fa4d bl 8004ebc 8001a22: 4603 mov r3, r0 8001a24: 2b00 cmp r3, #0 8001a26: d005 beq.n 8001a34 { hpcd->State = HAL_PCD_STATE_ERROR; 8001a28: 687b ldr r3, [r7, #4] 8001a2a: 2202 movs r2, #2 8001a2c: f883 2495 strb.w r2, [r3, #1173] @ 0x495 return HAL_ERROR; 8001a30: 2301 movs r3, #1 8001a32: e0d5 b.n 8001be0 } /* Force Device Mode */ if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK) 8001a34: 687b ldr r3, [r7, #4] 8001a36: 681b ldr r3, [r3, #0] 8001a38: 2100 movs r1, #0 8001a3a: 4618 mov r0, r3 8001a3c: f003 fb66 bl 800510c 8001a40: 4603 mov r3, r0 8001a42: 2b00 cmp r3, #0 8001a44: d005 beq.n 8001a52 { hpcd->State = HAL_PCD_STATE_ERROR; 8001a46: 687b ldr r3, [r7, #4] 8001a48: 2202 movs r2, #2 8001a4a: f883 2495 strb.w r2, [r3, #1173] @ 0x495 return HAL_ERROR; 8001a4e: 2301 movs r3, #1 8001a50: e0c6 b.n 8001be0 } /* Init endpoints structures */ for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8001a52: 2300 movs r3, #0 8001a54: 73fb strb r3, [r7, #15] 8001a56: e04a b.n 8001aee { /* Init ep structure */ hpcd->IN_ep[i].is_in = 1U; 8001a58: 7bfa ldrb r2, [r7, #15] 8001a5a: 6879 ldr r1, [r7, #4] 8001a5c: 4613 mov r3, r2 8001a5e: 00db lsls r3, r3, #3 8001a60: 4413 add r3, r2 8001a62: 009b lsls r3, r3, #2 8001a64: 440b add r3, r1 8001a66: 3315 adds r3, #21 8001a68: 2201 movs r2, #1 8001a6a: 701a strb r2, [r3, #0] hpcd->IN_ep[i].num = i; 8001a6c: 7bfa ldrb r2, [r7, #15] 8001a6e: 6879 ldr r1, [r7, #4] 8001a70: 4613 mov r3, r2 8001a72: 00db lsls r3, r3, #3 8001a74: 4413 add r3, r2 8001a76: 009b lsls r3, r3, #2 8001a78: 440b add r3, r1 8001a7a: 3314 adds r3, #20 8001a7c: 7bfa ldrb r2, [r7, #15] 8001a7e: 701a strb r2, [r3, #0] hpcd->IN_ep[i].tx_fifo_num = i; 8001a80: 7bfa ldrb r2, [r7, #15] 8001a82: 7bfb ldrb r3, [r7, #15] 8001a84: b298 uxth r0, r3 8001a86: 6879 ldr r1, [r7, #4] 8001a88: 4613 mov r3, r2 8001a8a: 00db lsls r3, r3, #3 8001a8c: 4413 add r3, r2 8001a8e: 009b lsls r3, r3, #2 8001a90: 440b add r3, r1 8001a92: 332e adds r3, #46 @ 0x2e 8001a94: 4602 mov r2, r0 8001a96: 801a strh r2, [r3, #0] /* Control until ep is activated */ hpcd->IN_ep[i].type = EP_TYPE_CTRL; 8001a98: 7bfa ldrb r2, [r7, #15] 8001a9a: 6879 ldr r1, [r7, #4] 8001a9c: 4613 mov r3, r2 8001a9e: 00db lsls r3, r3, #3 8001aa0: 4413 add r3, r2 8001aa2: 009b lsls r3, r3, #2 8001aa4: 440b add r3, r1 8001aa6: 3318 adds r3, #24 8001aa8: 2200 movs r2, #0 8001aaa: 701a strb r2, [r3, #0] hpcd->IN_ep[i].maxpacket = 0U; 8001aac: 7bfa ldrb r2, [r7, #15] 8001aae: 6879 ldr r1, [r7, #4] 8001ab0: 4613 mov r3, r2 8001ab2: 00db lsls r3, r3, #3 8001ab4: 4413 add r3, r2 8001ab6: 009b lsls r3, r3, #2 8001ab8: 440b add r3, r1 8001aba: 331c adds r3, #28 8001abc: 2200 movs r2, #0 8001abe: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_buff = 0U; 8001ac0: 7bfa ldrb r2, [r7, #15] 8001ac2: 6879 ldr r1, [r7, #4] 8001ac4: 4613 mov r3, r2 8001ac6: 00db lsls r3, r3, #3 8001ac8: 4413 add r3, r2 8001aca: 009b lsls r3, r3, #2 8001acc: 440b add r3, r1 8001ace: 3320 adds r3, #32 8001ad0: 2200 movs r2, #0 8001ad2: 601a str r2, [r3, #0] hpcd->IN_ep[i].xfer_len = 0U; 8001ad4: 7bfa ldrb r2, [r7, #15] 8001ad6: 6879 ldr r1, [r7, #4] 8001ad8: 4613 mov r3, r2 8001ada: 00db lsls r3, r3, #3 8001adc: 4413 add r3, r2 8001ade: 009b lsls r3, r3, #2 8001ae0: 440b add r3, r1 8001ae2: 3324 adds r3, #36 @ 0x24 8001ae4: 2200 movs r2, #0 8001ae6: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8001ae8: 7bfb ldrb r3, [r7, #15] 8001aea: 3301 adds r3, #1 8001aec: 73fb strb r3, [r7, #15] 8001aee: 687b ldr r3, [r7, #4] 8001af0: 791b ldrb r3, [r3, #4] 8001af2: 7bfa ldrb r2, [r7, #15] 8001af4: 429a cmp r2, r3 8001af6: d3af bcc.n 8001a58 } for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8001af8: 2300 movs r3, #0 8001afa: 73fb strb r3, [r7, #15] 8001afc: e044 b.n 8001b88 { hpcd->OUT_ep[i].is_in = 0U; 8001afe: 7bfa ldrb r2, [r7, #15] 8001b00: 6879 ldr r1, [r7, #4] 8001b02: 4613 mov r3, r2 8001b04: 00db lsls r3, r3, #3 8001b06: 4413 add r3, r2 8001b08: 009b lsls r3, r3, #2 8001b0a: 440b add r3, r1 8001b0c: f203 2355 addw r3, r3, #597 @ 0x255 8001b10: 2200 movs r2, #0 8001b12: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].num = i; 8001b14: 7bfa ldrb r2, [r7, #15] 8001b16: 6879 ldr r1, [r7, #4] 8001b18: 4613 mov r3, r2 8001b1a: 00db lsls r3, r3, #3 8001b1c: 4413 add r3, r2 8001b1e: 009b lsls r3, r3, #2 8001b20: 440b add r3, r1 8001b22: f503 7315 add.w r3, r3, #596 @ 0x254 8001b26: 7bfa ldrb r2, [r7, #15] 8001b28: 701a strb r2, [r3, #0] /* Control until ep is activated */ hpcd->OUT_ep[i].type = EP_TYPE_CTRL; 8001b2a: 7bfa ldrb r2, [r7, #15] 8001b2c: 6879 ldr r1, [r7, #4] 8001b2e: 4613 mov r3, r2 8001b30: 00db lsls r3, r3, #3 8001b32: 4413 add r3, r2 8001b34: 009b lsls r3, r3, #2 8001b36: 440b add r3, r1 8001b38: f503 7316 add.w r3, r3, #600 @ 0x258 8001b3c: 2200 movs r2, #0 8001b3e: 701a strb r2, [r3, #0] hpcd->OUT_ep[i].maxpacket = 0U; 8001b40: 7bfa ldrb r2, [r7, #15] 8001b42: 6879 ldr r1, [r7, #4] 8001b44: 4613 mov r3, r2 8001b46: 00db lsls r3, r3, #3 8001b48: 4413 add r3, r2 8001b4a: 009b lsls r3, r3, #2 8001b4c: 440b add r3, r1 8001b4e: f503 7317 add.w r3, r3, #604 @ 0x25c 8001b52: 2200 movs r2, #0 8001b54: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_buff = 0U; 8001b56: 7bfa ldrb r2, [r7, #15] 8001b58: 6879 ldr r1, [r7, #4] 8001b5a: 4613 mov r3, r2 8001b5c: 00db lsls r3, r3, #3 8001b5e: 4413 add r3, r2 8001b60: 009b lsls r3, r3, #2 8001b62: 440b add r3, r1 8001b64: f503 7318 add.w r3, r3, #608 @ 0x260 8001b68: 2200 movs r2, #0 8001b6a: 601a str r2, [r3, #0] hpcd->OUT_ep[i].xfer_len = 0U; 8001b6c: 7bfa ldrb r2, [r7, #15] 8001b6e: 6879 ldr r1, [r7, #4] 8001b70: 4613 mov r3, r2 8001b72: 00db lsls r3, r3, #3 8001b74: 4413 add r3, r2 8001b76: 009b lsls r3, r3, #2 8001b78: 440b add r3, r1 8001b7a: f503 7319 add.w r3, r3, #612 @ 0x264 8001b7e: 2200 movs r2, #0 8001b80: 601a str r2, [r3, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8001b82: 7bfb ldrb r3, [r7, #15] 8001b84: 3301 adds r3, #1 8001b86: 73fb strb r3, [r7, #15] 8001b88: 687b ldr r3, [r7, #4] 8001b8a: 791b ldrb r3, [r3, #4] 8001b8c: 7bfa ldrb r2, [r7, #15] 8001b8e: 429a cmp r2, r3 8001b90: d3b5 bcc.n 8001afe } /* Init Device */ if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK) 8001b92: 687b ldr r3, [r7, #4] 8001b94: 6818 ldr r0, [r3, #0] 8001b96: 687b ldr r3, [r7, #4] 8001b98: 7c1a ldrb r2, [r3, #16] 8001b9a: f88d 2000 strb.w r2, [sp] 8001b9e: 3304 adds r3, #4 8001ba0: cb0e ldmia r3, {r1, r2, r3} 8001ba2: f003 faff bl 80051a4 8001ba6: 4603 mov r3, r0 8001ba8: 2b00 cmp r3, #0 8001baa: d005 beq.n 8001bb8 { hpcd->State = HAL_PCD_STATE_ERROR; 8001bac: 687b ldr r3, [r7, #4] 8001bae: 2202 movs r2, #2 8001bb0: f883 2495 strb.w r2, [r3, #1173] @ 0x495 return HAL_ERROR; 8001bb4: 2301 movs r3, #1 8001bb6: e013 b.n 8001be0 } hpcd->USB_Address = 0U; 8001bb8: 687b ldr r3, [r7, #4] 8001bba: 2200 movs r2, #0 8001bbc: 745a strb r2, [r3, #17] hpcd->State = HAL_PCD_STATE_READY; 8001bbe: 687b ldr r3, [r7, #4] 8001bc0: 2201 movs r2, #1 8001bc2: f883 2495 strb.w r2, [r3, #1173] @ 0x495 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \ || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \ || defined(STM32F423xx) /* Activate LPM */ if (hpcd->Init.lpm_enable == 1U) 8001bc6: 687b ldr r3, [r7, #4] 8001bc8: 7b1b ldrb r3, [r3, #12] 8001bca: 2b01 cmp r3, #1 8001bcc: d102 bne.n 8001bd4 { (void)HAL_PCDEx_ActivateLPM(hpcd); 8001bce: 6878 ldr r0, [r7, #4] 8001bd0: f001 f956 bl 8002e80 } #endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */ (void)USB_DevDisconnect(hpcd->Instance); 8001bd4: 687b ldr r3, [r7, #4] 8001bd6: 681b ldr r3, [r3, #0] 8001bd8: 4618 mov r0, r3 8001bda: f004 fb3c bl 8006256 return HAL_OK; 8001bde: 2300 movs r3, #0 } 8001be0: 4618 mov r0, r3 8001be2: 3710 adds r7, #16 8001be4: 46bd mov sp, r7 8001be6: bd80 pop {r7, pc} 08001be8 : * @brief Start the USB device * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) { 8001be8: b580 push {r7, lr} 8001bea: b084 sub sp, #16 8001bec: af00 add r7, sp, #0 8001bee: 6078 str r0, [r7, #4] USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 8001bf0: 687b ldr r3, [r7, #4] 8001bf2: 681b ldr r3, [r3, #0] 8001bf4: 60fb str r3, [r7, #12] __HAL_LOCK(hpcd); 8001bf6: 687b ldr r3, [r7, #4] 8001bf8: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 8001bfc: 2b01 cmp r3, #1 8001bfe: d101 bne.n 8001c04 8001c00: 2302 movs r3, #2 8001c02: e022 b.n 8001c4a 8001c04: 687b ldr r3, [r7, #4] 8001c06: 2201 movs r2, #1 8001c08: f883 2494 strb.w r2, [r3, #1172] @ 0x494 if (((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) != 0U) && 8001c0c: 68fb ldr r3, [r7, #12] 8001c0e: 68db ldr r3, [r3, #12] 8001c10: f003 0340 and.w r3, r3, #64 @ 0x40 8001c14: 2b00 cmp r3, #0 8001c16: d009 beq.n 8001c2c (hpcd->Init.battery_charging_enable == 1U)) 8001c18: 687b ldr r3, [r7, #4] 8001c1a: 7b5b ldrb r3, [r3, #13] if (((USBx->GUSBCFG & USB_OTG_GUSBCFG_PHYSEL) != 0U) && 8001c1c: 2b01 cmp r3, #1 8001c1e: d105 bne.n 8001c2c { /* Enable USB Transceiver */ USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN; 8001c20: 68fb ldr r3, [r7, #12] 8001c22: 6b9b ldr r3, [r3, #56] @ 0x38 8001c24: f443 3280 orr.w r2, r3, #65536 @ 0x10000 8001c28: 68fb ldr r3, [r7, #12] 8001c2a: 639a str r2, [r3, #56] @ 0x38 } __HAL_PCD_ENABLE(hpcd); 8001c2c: 687b ldr r3, [r7, #4] 8001c2e: 681b ldr r3, [r3, #0] 8001c30: 4618 mov r0, r3 8001c32: f003 fa49 bl 80050c8 (void)USB_DevConnect(hpcd->Instance); 8001c36: 687b ldr r3, [r7, #4] 8001c38: 681b ldr r3, [r3, #0] 8001c3a: 4618 mov r0, r3 8001c3c: f004 faea bl 8006214 __HAL_UNLOCK(hpcd); 8001c40: 687b ldr r3, [r7, #4] 8001c42: 2200 movs r2, #0 8001c44: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return HAL_OK; 8001c48: 2300 movs r3, #0 } 8001c4a: 4618 mov r0, r3 8001c4c: 3710 adds r7, #16 8001c4e: 46bd mov sp, r7 8001c50: bd80 pop {r7, pc} 08001c52 : * @brief Handles PCD interrupt request. * @param hpcd PCD handle * @retval HAL status */ void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) { 8001c52: b590 push {r4, r7, lr} 8001c54: b08d sub sp, #52 @ 0x34 8001c56: af00 add r7, sp, #0 8001c58: 6078 str r0, [r7, #4] USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 8001c5a: 687b ldr r3, [r7, #4] 8001c5c: 681b ldr r3, [r3, #0] 8001c5e: 623b str r3, [r7, #32] uint32_t USBx_BASE = (uint32_t)USBx; 8001c60: 6a3b ldr r3, [r7, #32] 8001c62: 61fb str r3, [r7, #28] uint32_t epnum; uint32_t fifoemptymsk; uint32_t RegVal; /* ensure that we are in device mode */ if (USB_GetMode(hpcd->Instance) == USB_OTG_MODE_DEVICE) 8001c64: 687b ldr r3, [r7, #4] 8001c66: 681b ldr r3, [r3, #0] 8001c68: 4618 mov r0, r3 8001c6a: f004 fba8 bl 80063be 8001c6e: 4603 mov r3, r0 8001c70: 2b00 cmp r3, #0 8001c72: f040 84b9 bne.w 80025e8 { /* avoid spurious interrupt */ if (__HAL_PCD_IS_INVALID_INTERRUPT(hpcd)) 8001c76: 687b ldr r3, [r7, #4] 8001c78: 681b ldr r3, [r3, #0] 8001c7a: 4618 mov r0, r3 8001c7c: f004 fb0c bl 8006298 8001c80: 4603 mov r3, r0 8001c82: 2b00 cmp r3, #0 8001c84: f000 84af beq.w 80025e6 { return; } /* store current frame number */ hpcd->FrameNumber = (USBx_DEVICE->DSTS & USB_OTG_DSTS_FNSOF_Msk) >> USB_OTG_DSTS_FNSOF_Pos; 8001c88: 69fb ldr r3, [r7, #28] 8001c8a: f503 6300 add.w r3, r3, #2048 @ 0x800 8001c8e: 689b ldr r3, [r3, #8] 8001c90: 0a1b lsrs r3, r3, #8 8001c92: f3c3 020d ubfx r2, r3, #0, #14 8001c96: 687b ldr r3, [r7, #4] 8001c98: f8c3 24d4 str.w r2, [r3, #1236] @ 0x4d4 if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_MMIS)) 8001c9c: 687b ldr r3, [r7, #4] 8001c9e: 681b ldr r3, [r3, #0] 8001ca0: 4618 mov r0, r3 8001ca2: f004 faf9 bl 8006298 8001ca6: 4603 mov r3, r0 8001ca8: f003 0302 and.w r3, r3, #2 8001cac: 2b02 cmp r3, #2 8001cae: d107 bne.n 8001cc0 { /* incorrect mode, acknowledge the interrupt */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS); 8001cb0: 687b ldr r3, [r7, #4] 8001cb2: 681b ldr r3, [r3, #0] 8001cb4: 695a ldr r2, [r3, #20] 8001cb6: 687b ldr r3, [r7, #4] 8001cb8: 681b ldr r3, [r3, #0] 8001cba: f002 0202 and.w r2, r2, #2 8001cbe: 615a str r2, [r3, #20] } /* Handle RxQLevel Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) 8001cc0: 687b ldr r3, [r7, #4] 8001cc2: 681b ldr r3, [r3, #0] 8001cc4: 4618 mov r0, r3 8001cc6: f004 fae7 bl 8006298 8001cca: 4603 mov r3, r0 8001ccc: f003 0310 and.w r3, r3, #16 8001cd0: 2b10 cmp r3, #16 8001cd2: d161 bne.n 8001d98 { USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); 8001cd4: 687b ldr r3, [r7, #4] 8001cd6: 681b ldr r3, [r3, #0] 8001cd8: 699a ldr r2, [r3, #24] 8001cda: 687b ldr r3, [r7, #4] 8001cdc: 681b ldr r3, [r3, #0] 8001cde: f022 0210 bic.w r2, r2, #16 8001ce2: 619a str r2, [r3, #24] RegVal = USBx->GRXSTSP; 8001ce4: 6a3b ldr r3, [r7, #32] 8001ce6: 6a1b ldr r3, [r3, #32] 8001ce8: 61bb str r3, [r7, #24] ep = &hpcd->OUT_ep[RegVal & USB_OTG_GRXSTSP_EPNUM]; 8001cea: 69bb ldr r3, [r7, #24] 8001cec: f003 020f and.w r2, r3, #15 8001cf0: 4613 mov r3, r2 8001cf2: 00db lsls r3, r3, #3 8001cf4: 4413 add r3, r2 8001cf6: 009b lsls r3, r3, #2 8001cf8: f503 7314 add.w r3, r3, #592 @ 0x250 8001cfc: 687a ldr r2, [r7, #4] 8001cfe: 4413 add r3, r2 8001d00: 3304 adds r3, #4 8001d02: 617b str r3, [r7, #20] if (((RegVal & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT) 8001d04: 69bb ldr r3, [r7, #24] 8001d06: f403 13f0 and.w r3, r3, #1966080 @ 0x1e0000 8001d0a: f5b3 2f80 cmp.w r3, #262144 @ 0x40000 8001d0e: d124 bne.n 8001d5a { if ((RegVal & USB_OTG_GRXSTSP_BCNT) != 0U) 8001d10: 69ba ldr r2, [r7, #24] 8001d12: f647 73f0 movw r3, #32752 @ 0x7ff0 8001d16: 4013 ands r3, r2 8001d18: 2b00 cmp r3, #0 8001d1a: d035 beq.n 8001d88 { (void)USB_ReadPacket(USBx, ep->xfer_buff, 8001d1c: 697b ldr r3, [r7, #20] 8001d1e: 68d9 ldr r1, [r3, #12] (uint16_t)((RegVal & USB_OTG_GRXSTSP_BCNT) >> 4)); 8001d20: 69bb ldr r3, [r7, #24] 8001d22: 091b lsrs r3, r3, #4 8001d24: b29b uxth r3, r3 (void)USB_ReadPacket(USBx, ep->xfer_buff, 8001d26: f3c3 030a ubfx r3, r3, #0, #11 8001d2a: b29b uxth r3, r3 8001d2c: 461a mov r2, r3 8001d2e: 6a38 ldr r0, [r7, #32] 8001d30: f004 f91e bl 8005f70 ep->xfer_buff += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4; 8001d34: 697b ldr r3, [r7, #20] 8001d36: 68da ldr r2, [r3, #12] 8001d38: 69bb ldr r3, [r7, #24] 8001d3a: 091b lsrs r3, r3, #4 8001d3c: f3c3 030a ubfx r3, r3, #0, #11 8001d40: 441a add r2, r3 8001d42: 697b ldr r3, [r7, #20] 8001d44: 60da str r2, [r3, #12] ep->xfer_count += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4; 8001d46: 697b ldr r3, [r7, #20] 8001d48: 695a ldr r2, [r3, #20] 8001d4a: 69bb ldr r3, [r7, #24] 8001d4c: 091b lsrs r3, r3, #4 8001d4e: f3c3 030a ubfx r3, r3, #0, #11 8001d52: 441a add r2, r3 8001d54: 697b ldr r3, [r7, #20] 8001d56: 615a str r2, [r3, #20] 8001d58: e016 b.n 8001d88 } } else if (((RegVal & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT) 8001d5a: 69bb ldr r3, [r7, #24] 8001d5c: f403 13f0 and.w r3, r3, #1966080 @ 0x1e0000 8001d60: f5b3 2f40 cmp.w r3, #786432 @ 0xc0000 8001d64: d110 bne.n 8001d88 { (void)USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8U); 8001d66: 687b ldr r3, [r7, #4] 8001d68: f203 439c addw r3, r3, #1180 @ 0x49c 8001d6c: 2208 movs r2, #8 8001d6e: 4619 mov r1, r3 8001d70: 6a38 ldr r0, [r7, #32] 8001d72: f004 f8fd bl 8005f70 ep->xfer_count += (RegVal & USB_OTG_GRXSTSP_BCNT) >> 4; 8001d76: 697b ldr r3, [r7, #20] 8001d78: 695a ldr r2, [r3, #20] 8001d7a: 69bb ldr r3, [r7, #24] 8001d7c: 091b lsrs r3, r3, #4 8001d7e: f3c3 030a ubfx r3, r3, #0, #11 8001d82: 441a add r2, r3 8001d84: 697b ldr r3, [r7, #20] 8001d86: 615a str r2, [r3, #20] else { /* ... */ } USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); 8001d88: 687b ldr r3, [r7, #4] 8001d8a: 681b ldr r3, [r3, #0] 8001d8c: 699a ldr r2, [r3, #24] 8001d8e: 687b ldr r3, [r7, #4] 8001d90: 681b ldr r3, [r3, #0] 8001d92: f042 0210 orr.w r2, r2, #16 8001d96: 619a str r2, [r3, #24] } if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OEPINT)) 8001d98: 687b ldr r3, [r7, #4] 8001d9a: 681b ldr r3, [r3, #0] 8001d9c: 4618 mov r0, r3 8001d9e: f004 fa7b bl 8006298 8001da2: 4603 mov r3, r0 8001da4: f403 2300 and.w r3, r3, #524288 @ 0x80000 8001da8: f5b3 2f00 cmp.w r3, #524288 @ 0x80000 8001dac: f040 80a7 bne.w 8001efe { epnum = 0U; 8001db0: 2300 movs r3, #0 8001db2: 627b str r3, [r7, #36] @ 0x24 /* Read in the device interrupt bits */ ep_intr = USB_ReadDevAllOutEpInterrupt(hpcd->Instance); 8001db4: 687b ldr r3, [r7, #4] 8001db6: 681b ldr r3, [r3, #0] 8001db8: 4618 mov r0, r3 8001dba: f004 fa80 bl 80062be 8001dbe: 62b8 str r0, [r7, #40] @ 0x28 while (ep_intr != 0U) 8001dc0: e099 b.n 8001ef6 { if ((ep_intr & 0x1U) != 0U) 8001dc2: 6abb ldr r3, [r7, #40] @ 0x28 8001dc4: f003 0301 and.w r3, r3, #1 8001dc8: 2b00 cmp r3, #0 8001dca: f000 808e beq.w 8001eea { epint = USB_ReadDevOutEPInterrupt(hpcd->Instance, (uint8_t)epnum); 8001dce: 687b ldr r3, [r7, #4] 8001dd0: 681b ldr r3, [r3, #0] 8001dd2: 6a7a ldr r2, [r7, #36] @ 0x24 8001dd4: b2d2 uxtb r2, r2 8001dd6: 4611 mov r1, r2 8001dd8: 4618 mov r0, r3 8001dda: f004 faa4 bl 8006326 8001dde: 6138 str r0, [r7, #16] if ((epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) 8001de0: 693b ldr r3, [r7, #16] 8001de2: f003 0301 and.w r3, r3, #1 8001de6: 2b00 cmp r3, #0 8001de8: d00c beq.n 8001e04 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_XFRC); 8001dea: 6a7b ldr r3, [r7, #36] @ 0x24 8001dec: 015a lsls r2, r3, #5 8001dee: 69fb ldr r3, [r7, #28] 8001df0: 4413 add r3, r2 8001df2: f503 6330 add.w r3, r3, #2816 @ 0xb00 8001df6: 461a mov r2, r3 8001df8: 2301 movs r3, #1 8001dfa: 6093 str r3, [r2, #8] (void)PCD_EP_OutXfrComplete_int(hpcd, epnum); 8001dfc: 6a79 ldr r1, [r7, #36] @ 0x24 8001dfe: 6878 ldr r0, [r7, #4] 8001e00: f000 feb8 bl 8002b74 } if ((epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) 8001e04: 693b ldr r3, [r7, #16] 8001e06: f003 0308 and.w r3, r3, #8 8001e0a: 2b00 cmp r3, #0 8001e0c: d00c beq.n 8001e28 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP); 8001e0e: 6a7b ldr r3, [r7, #36] @ 0x24 8001e10: 015a lsls r2, r3, #5 8001e12: 69fb ldr r3, [r7, #28] 8001e14: 4413 add r3, r2 8001e16: f503 6330 add.w r3, r3, #2816 @ 0xb00 8001e1a: 461a mov r2, r3 8001e1c: 2308 movs r3, #8 8001e1e: 6093 str r3, [r2, #8] /* Class B setup phase done for previous decoded setup */ (void)PCD_EP_OutSetupPacket_int(hpcd, epnum); 8001e20: 6a79 ldr r1, [r7, #36] @ 0x24 8001e22: 6878 ldr r0, [r7, #4] 8001e24: f000 ff8e bl 8002d44 } if ((epint & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS) 8001e28: 693b ldr r3, [r7, #16] 8001e2a: f003 0310 and.w r3, r3, #16 8001e2e: 2b00 cmp r3, #0 8001e30: d008 beq.n 8001e44 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPDIS); 8001e32: 6a7b ldr r3, [r7, #36] @ 0x24 8001e34: 015a lsls r2, r3, #5 8001e36: 69fb ldr r3, [r7, #28] 8001e38: 4413 add r3, r2 8001e3a: f503 6330 add.w r3, r3, #2816 @ 0xb00 8001e3e: 461a mov r2, r3 8001e40: 2310 movs r3, #16 8001e42: 6093 str r3, [r2, #8] } /* Clear OUT Endpoint disable interrupt */ if ((epint & USB_OTG_DOEPINT_EPDISD) == USB_OTG_DOEPINT_EPDISD) 8001e44: 693b ldr r3, [r7, #16] 8001e46: f003 0302 and.w r3, r3, #2 8001e4a: 2b00 cmp r3, #0 8001e4c: d030 beq.n 8001eb0 { if ((USBx->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF) == USB_OTG_GINTSTS_BOUTNAKEFF) 8001e4e: 6a3b ldr r3, [r7, #32] 8001e50: 695b ldr r3, [r3, #20] 8001e52: f003 0380 and.w r3, r3, #128 @ 0x80 8001e56: 2b80 cmp r3, #128 @ 0x80 8001e58: d109 bne.n 8001e6e { USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGONAK; 8001e5a: 69fb ldr r3, [r7, #28] 8001e5c: f503 6300 add.w r3, r3, #2048 @ 0x800 8001e60: 685b ldr r3, [r3, #4] 8001e62: 69fa ldr r2, [r7, #28] 8001e64: f502 6200 add.w r2, r2, #2048 @ 0x800 8001e68: f443 6380 orr.w r3, r3, #1024 @ 0x400 8001e6c: 6053 str r3, [r2, #4] } ep = &hpcd->OUT_ep[epnum]; 8001e6e: 6a7a ldr r2, [r7, #36] @ 0x24 8001e70: 4613 mov r3, r2 8001e72: 00db lsls r3, r3, #3 8001e74: 4413 add r3, r2 8001e76: 009b lsls r3, r3, #2 8001e78: f503 7314 add.w r3, r3, #592 @ 0x250 8001e7c: 687a ldr r2, [r7, #4] 8001e7e: 4413 add r3, r2 8001e80: 3304 adds r3, #4 8001e82: 617b str r3, [r7, #20] if (ep->is_iso_incomplete == 1U) 8001e84: 697b ldr r3, [r7, #20] 8001e86: 78db ldrb r3, [r3, #3] 8001e88: 2b01 cmp r3, #1 8001e8a: d108 bne.n 8001e9e { ep->is_iso_incomplete = 0U; 8001e8c: 697b ldr r3, [r7, #20] 8001e8e: 2200 movs r2, #0 8001e90: 70da strb r2, [r3, #3] #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_ISOOUTIncompleteCallback(hpcd, (uint8_t)epnum); 8001e92: 6a7b ldr r3, [r7, #36] @ 0x24 8001e94: b2db uxtb r3, r3 8001e96: 4619 mov r1, r3 8001e98: 6878 ldr r0, [r7, #4] 8001e9a: f006 fb3d bl 8008518 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_EPDISD); 8001e9e: 6a7b ldr r3, [r7, #36] @ 0x24 8001ea0: 015a lsls r2, r3, #5 8001ea2: 69fb ldr r3, [r7, #28] 8001ea4: 4413 add r3, r2 8001ea6: f503 6330 add.w r3, r3, #2816 @ 0xb00 8001eaa: 461a mov r2, r3 8001eac: 2302 movs r3, #2 8001eae: 6093 str r3, [r2, #8] } /* Clear Status Phase Received interrupt */ if ((epint & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR) 8001eb0: 693b ldr r3, [r7, #16] 8001eb2: f003 0320 and.w r3, r3, #32 8001eb6: 2b00 cmp r3, #0 8001eb8: d008 beq.n 8001ecc { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR); 8001eba: 6a7b ldr r3, [r7, #36] @ 0x24 8001ebc: 015a lsls r2, r3, #5 8001ebe: 69fb ldr r3, [r7, #28] 8001ec0: 4413 add r3, r2 8001ec2: f503 6330 add.w r3, r3, #2816 @ 0xb00 8001ec6: 461a mov r2, r3 8001ec8: 2320 movs r3, #32 8001eca: 6093 str r3, [r2, #8] } /* Clear OUT NAK interrupt */ if ((epint & USB_OTG_DOEPINT_NAK) == USB_OTG_DOEPINT_NAK) 8001ecc: 693b ldr r3, [r7, #16] 8001ece: f403 5300 and.w r3, r3, #8192 @ 0x2000 8001ed2: 2b00 cmp r3, #0 8001ed4: d009 beq.n 8001eea { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_NAK); 8001ed6: 6a7b ldr r3, [r7, #36] @ 0x24 8001ed8: 015a lsls r2, r3, #5 8001eda: 69fb ldr r3, [r7, #28] 8001edc: 4413 add r3, r2 8001ede: f503 6330 add.w r3, r3, #2816 @ 0xb00 8001ee2: 461a mov r2, r3 8001ee4: f44f 5300 mov.w r3, #8192 @ 0x2000 8001ee8: 6093 str r3, [r2, #8] } } epnum++; 8001eea: 6a7b ldr r3, [r7, #36] @ 0x24 8001eec: 3301 adds r3, #1 8001eee: 627b str r3, [r7, #36] @ 0x24 ep_intr >>= 1U; 8001ef0: 6abb ldr r3, [r7, #40] @ 0x28 8001ef2: 085b lsrs r3, r3, #1 8001ef4: 62bb str r3, [r7, #40] @ 0x28 while (ep_intr != 0U) 8001ef6: 6abb ldr r3, [r7, #40] @ 0x28 8001ef8: 2b00 cmp r3, #0 8001efa: f47f af62 bne.w 8001dc2 } } if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IEPINT)) 8001efe: 687b ldr r3, [r7, #4] 8001f00: 681b ldr r3, [r3, #0] 8001f02: 4618 mov r0, r3 8001f04: f004 f9c8 bl 8006298 8001f08: 4603 mov r3, r0 8001f0a: f403 2380 and.w r3, r3, #262144 @ 0x40000 8001f0e: f5b3 2f80 cmp.w r3, #262144 @ 0x40000 8001f12: f040 80db bne.w 80020cc { /* Read in the device interrupt bits */ ep_intr = USB_ReadDevAllInEpInterrupt(hpcd->Instance); 8001f16: 687b ldr r3, [r7, #4] 8001f18: 681b ldr r3, [r3, #0] 8001f1a: 4618 mov r0, r3 8001f1c: f004 f9e9 bl 80062f2 8001f20: 62b8 str r0, [r7, #40] @ 0x28 epnum = 0U; 8001f22: 2300 movs r3, #0 8001f24: 627b str r3, [r7, #36] @ 0x24 while (ep_intr != 0U) 8001f26: e0cd b.n 80020c4 { if ((ep_intr & 0x1U) != 0U) /* In ITR */ 8001f28: 6abb ldr r3, [r7, #40] @ 0x28 8001f2a: f003 0301 and.w r3, r3, #1 8001f2e: 2b00 cmp r3, #0 8001f30: f000 80c2 beq.w 80020b8 { epint = USB_ReadDevInEPInterrupt(hpcd->Instance, (uint8_t)epnum); 8001f34: 687b ldr r3, [r7, #4] 8001f36: 681b ldr r3, [r3, #0] 8001f38: 6a7a ldr r2, [r7, #36] @ 0x24 8001f3a: b2d2 uxtb r2, r2 8001f3c: 4611 mov r1, r2 8001f3e: 4618 mov r0, r3 8001f40: f004 fa0f bl 8006362 8001f44: 6138 str r0, [r7, #16] if ((epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) 8001f46: 693b ldr r3, [r7, #16] 8001f48: f003 0301 and.w r3, r3, #1 8001f4c: 2b00 cmp r3, #0 8001f4e: d057 beq.n 8002000 { fifoemptymsk = (uint32_t)(0x1UL << (epnum & EP_ADDR_MSK)); 8001f50: 6a7b ldr r3, [r7, #36] @ 0x24 8001f52: f003 030f and.w r3, r3, #15 8001f56: 2201 movs r2, #1 8001f58: fa02 f303 lsl.w r3, r2, r3 8001f5c: 60fb str r3, [r7, #12] USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk; 8001f5e: 69fb ldr r3, [r7, #28] 8001f60: f503 6300 add.w r3, r3, #2048 @ 0x800 8001f64: 6b5a ldr r2, [r3, #52] @ 0x34 8001f66: 68fb ldr r3, [r7, #12] 8001f68: 43db mvns r3, r3 8001f6a: 69f9 ldr r1, [r7, #28] 8001f6c: f501 6100 add.w r1, r1, #2048 @ 0x800 8001f70: 4013 ands r3, r2 8001f72: 634b str r3, [r1, #52] @ 0x34 CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC); 8001f74: 6a7b ldr r3, [r7, #36] @ 0x24 8001f76: 015a lsls r2, r3, #5 8001f78: 69fb ldr r3, [r7, #28] 8001f7a: 4413 add r3, r2 8001f7c: f503 6310 add.w r3, r3, #2304 @ 0x900 8001f80: 461a mov r2, r3 8001f82: 2301 movs r3, #1 8001f84: 6093 str r3, [r2, #8] if (hpcd->Init.dma_enable == 1U) 8001f86: 687b ldr r3, [r7, #4] 8001f88: 799b ldrb r3, [r3, #6] 8001f8a: 2b01 cmp r3, #1 8001f8c: d132 bne.n 8001ff4 { hpcd->IN_ep[epnum].xfer_buff += hpcd->IN_ep[epnum].maxpacket; 8001f8e: 6879 ldr r1, [r7, #4] 8001f90: 6a7a ldr r2, [r7, #36] @ 0x24 8001f92: 4613 mov r3, r2 8001f94: 00db lsls r3, r3, #3 8001f96: 4413 add r3, r2 8001f98: 009b lsls r3, r3, #2 8001f9a: 440b add r3, r1 8001f9c: 3320 adds r3, #32 8001f9e: 6819 ldr r1, [r3, #0] 8001fa0: 6878 ldr r0, [r7, #4] 8001fa2: 6a7a ldr r2, [r7, #36] @ 0x24 8001fa4: 4613 mov r3, r2 8001fa6: 00db lsls r3, r3, #3 8001fa8: 4413 add r3, r2 8001faa: 009b lsls r3, r3, #2 8001fac: 4403 add r3, r0 8001fae: 331c adds r3, #28 8001fb0: 681b ldr r3, [r3, #0] 8001fb2: 4419 add r1, r3 8001fb4: 6878 ldr r0, [r7, #4] 8001fb6: 6a7a ldr r2, [r7, #36] @ 0x24 8001fb8: 4613 mov r3, r2 8001fba: 00db lsls r3, r3, #3 8001fbc: 4413 add r3, r2 8001fbe: 009b lsls r3, r3, #2 8001fc0: 4403 add r3, r0 8001fc2: 3320 adds r3, #32 8001fc4: 6019 str r1, [r3, #0] /* this is ZLP, so prepare EP0 for next setup */ if ((epnum == 0U) && (hpcd->IN_ep[epnum].xfer_len == 0U)) 8001fc6: 6a7b ldr r3, [r7, #36] @ 0x24 8001fc8: 2b00 cmp r3, #0 8001fca: d113 bne.n 8001ff4 8001fcc: 6879 ldr r1, [r7, #4] 8001fce: 6a7a ldr r2, [r7, #36] @ 0x24 8001fd0: 4613 mov r3, r2 8001fd2: 00db lsls r3, r3, #3 8001fd4: 4413 add r3, r2 8001fd6: 009b lsls r3, r3, #2 8001fd8: 440b add r3, r1 8001fda: 3324 adds r3, #36 @ 0x24 8001fdc: 681b ldr r3, [r3, #0] 8001fde: 2b00 cmp r3, #0 8001fe0: d108 bne.n 8001ff4 { /* prepare to rx more setup packets */ (void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup); 8001fe2: 687b ldr r3, [r7, #4] 8001fe4: 6818 ldr r0, [r3, #0] 8001fe6: 687b ldr r3, [r7, #4] 8001fe8: f203 439c addw r3, r3, #1180 @ 0x49c 8001fec: 461a mov r2, r3 8001fee: 2101 movs r1, #1 8001ff0: f004 fa16 bl 8006420 } #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataInStageCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_DataInStageCallback(hpcd, (uint8_t)epnum); 8001ff4: 6a7b ldr r3, [r7, #36] @ 0x24 8001ff6: b2db uxtb r3, r3 8001ff8: 4619 mov r1, r3 8001ffa: 6878 ldr r0, [r7, #4] 8001ffc: f006 fa07 bl 800840e #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } if ((epint & USB_OTG_DIEPINT_TOC) == USB_OTG_DIEPINT_TOC) 8002000: 693b ldr r3, [r7, #16] 8002002: f003 0308 and.w r3, r3, #8 8002006: 2b00 cmp r3, #0 8002008: d008 beq.n 800201c { CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_TOC); 800200a: 6a7b ldr r3, [r7, #36] @ 0x24 800200c: 015a lsls r2, r3, #5 800200e: 69fb ldr r3, [r7, #28] 8002010: 4413 add r3, r2 8002012: f503 6310 add.w r3, r3, #2304 @ 0x900 8002016: 461a mov r2, r3 8002018: 2308 movs r3, #8 800201a: 6093 str r3, [r2, #8] } if ((epint & USB_OTG_DIEPINT_ITTXFE) == USB_OTG_DIEPINT_ITTXFE) 800201c: 693b ldr r3, [r7, #16] 800201e: f003 0310 and.w r3, r3, #16 8002022: 2b00 cmp r3, #0 8002024: d008 beq.n 8002038 { CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_ITTXFE); 8002026: 6a7b ldr r3, [r7, #36] @ 0x24 8002028: 015a lsls r2, r3, #5 800202a: 69fb ldr r3, [r7, #28] 800202c: 4413 add r3, r2 800202e: f503 6310 add.w r3, r3, #2304 @ 0x900 8002032: 461a mov r2, r3 8002034: 2310 movs r3, #16 8002036: 6093 str r3, [r2, #8] } if ((epint & USB_OTG_DIEPINT_INEPNE) == USB_OTG_DIEPINT_INEPNE) 8002038: 693b ldr r3, [r7, #16] 800203a: f003 0340 and.w r3, r3, #64 @ 0x40 800203e: 2b00 cmp r3, #0 8002040: d008 beq.n 8002054 { CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_INEPNE); 8002042: 6a7b ldr r3, [r7, #36] @ 0x24 8002044: 015a lsls r2, r3, #5 8002046: 69fb ldr r3, [r7, #28] 8002048: 4413 add r3, r2 800204a: f503 6310 add.w r3, r3, #2304 @ 0x900 800204e: 461a mov r2, r3 8002050: 2340 movs r3, #64 @ 0x40 8002052: 6093 str r3, [r2, #8] } if ((epint & USB_OTG_DIEPINT_EPDISD) == USB_OTG_DIEPINT_EPDISD) 8002054: 693b ldr r3, [r7, #16] 8002056: f003 0302 and.w r3, r3, #2 800205a: 2b00 cmp r3, #0 800205c: d023 beq.n 80020a6 { (void)USB_FlushTxFifo(USBx, epnum); 800205e: 6a79 ldr r1, [r7, #36] @ 0x24 8002060: 6a38 ldr r0, [r7, #32] 8002062: f003 f9fd bl 8005460 ep = &hpcd->IN_ep[epnum]; 8002066: 6a7a ldr r2, [r7, #36] @ 0x24 8002068: 4613 mov r3, r2 800206a: 00db lsls r3, r3, #3 800206c: 4413 add r3, r2 800206e: 009b lsls r3, r3, #2 8002070: 3310 adds r3, #16 8002072: 687a ldr r2, [r7, #4] 8002074: 4413 add r3, r2 8002076: 3304 adds r3, #4 8002078: 617b str r3, [r7, #20] if (ep->is_iso_incomplete == 1U) 800207a: 697b ldr r3, [r7, #20] 800207c: 78db ldrb r3, [r3, #3] 800207e: 2b01 cmp r3, #1 8002080: d108 bne.n 8002094 { ep->is_iso_incomplete = 0U; 8002082: 697b ldr r3, [r7, #20] 8002084: 2200 movs r2, #0 8002086: 70da strb r2, [r3, #3] #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ISOINIncompleteCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_ISOINIncompleteCallback(hpcd, (uint8_t)epnum); 8002088: 6a7b ldr r3, [r7, #36] @ 0x24 800208a: b2db uxtb r3, r3 800208c: 4619 mov r1, r3 800208e: 6878 ldr r0, [r7, #4] 8002090: f006 fa54 bl 800853c #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_EPDISD); 8002094: 6a7b ldr r3, [r7, #36] @ 0x24 8002096: 015a lsls r2, r3, #5 8002098: 69fb ldr r3, [r7, #28] 800209a: 4413 add r3, r2 800209c: f503 6310 add.w r3, r3, #2304 @ 0x900 80020a0: 461a mov r2, r3 80020a2: 2302 movs r3, #2 80020a4: 6093 str r3, [r2, #8] } if ((epint & USB_OTG_DIEPINT_TXFE) == USB_OTG_DIEPINT_TXFE) 80020a6: 693b ldr r3, [r7, #16] 80020a8: f003 0380 and.w r3, r3, #128 @ 0x80 80020ac: 2b00 cmp r3, #0 80020ae: d003 beq.n 80020b8 { (void)PCD_WriteEmptyTxFifo(hpcd, epnum); 80020b0: 6a79 ldr r1, [r7, #36] @ 0x24 80020b2: 6878 ldr r0, [r7, #4] 80020b4: f000 fcd2 bl 8002a5c } } epnum++; 80020b8: 6a7b ldr r3, [r7, #36] @ 0x24 80020ba: 3301 adds r3, #1 80020bc: 627b str r3, [r7, #36] @ 0x24 ep_intr >>= 1U; 80020be: 6abb ldr r3, [r7, #40] @ 0x28 80020c0: 085b lsrs r3, r3, #1 80020c2: 62bb str r3, [r7, #40] @ 0x28 while (ep_intr != 0U) 80020c4: 6abb ldr r3, [r7, #40] @ 0x28 80020c6: 2b00 cmp r3, #0 80020c8: f47f af2e bne.w 8001f28 } } /* Handle Resume Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT)) 80020cc: 687b ldr r3, [r7, #4] 80020ce: 681b ldr r3, [r3, #0] 80020d0: 4618 mov r0, r3 80020d2: f004 f8e1 bl 8006298 80020d6: 4603 mov r3, r0 80020d8: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 80020dc: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 80020e0: d122 bne.n 8002128 { /* Clear the Remote Wake-up Signaling */ USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG; 80020e2: 69fb ldr r3, [r7, #28] 80020e4: f503 6300 add.w r3, r3, #2048 @ 0x800 80020e8: 685b ldr r3, [r3, #4] 80020ea: 69fa ldr r2, [r7, #28] 80020ec: f502 6200 add.w r2, r2, #2048 @ 0x800 80020f0: f023 0301 bic.w r3, r3, #1 80020f4: 6053 str r3, [r2, #4] if (hpcd->LPM_State == LPM_L1) 80020f6: 687b ldr r3, [r7, #4] 80020f8: f893 34cc ldrb.w r3, [r3, #1228] @ 0x4cc 80020fc: 2b01 cmp r3, #1 80020fe: d108 bne.n 8002112 { hpcd->LPM_State = LPM_L0; 8002100: 687b ldr r3, [r7, #4] 8002102: 2200 movs r2, #0 8002104: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->LPMCallback(hpcd, PCD_LPM_L0_ACTIVE); #else HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE); 8002108: 2100 movs r1, #0 800210a: 6878 ldr r0, [r7, #4] 800210c: f006 fbbc bl 8008888 8002110: e002 b.n 8002118 else { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResumeCallback(hpcd); #else HAL_PCD_ResumeCallback(hpcd); 8002112: 6878 ldr r0, [r7, #4] 8002114: f006 f9f2 bl 80084fc #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT); 8002118: 687b ldr r3, [r7, #4] 800211a: 681b ldr r3, [r3, #0] 800211c: 695a ldr r2, [r3, #20] 800211e: 687b ldr r3, [r7, #4] 8002120: 681b ldr r3, [r3, #0] 8002122: f002 4200 and.w r2, r2, #2147483648 @ 0x80000000 8002126: 615a str r2, [r3, #20] } /* Handle Suspend Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP)) 8002128: 687b ldr r3, [r7, #4] 800212a: 681b ldr r3, [r3, #0] 800212c: 4618 mov r0, r3 800212e: f004 f8b3 bl 8006298 8002132: 4603 mov r3, r0 8002134: f403 6300 and.w r3, r3, #2048 @ 0x800 8002138: f5b3 6f00 cmp.w r3, #2048 @ 0x800 800213c: d112 bne.n 8002164 { if ((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS) 800213e: 69fb ldr r3, [r7, #28] 8002140: f503 6300 add.w r3, r3, #2048 @ 0x800 8002144: 689b ldr r3, [r3, #8] 8002146: f003 0301 and.w r3, r3, #1 800214a: 2b01 cmp r3, #1 800214c: d102 bne.n 8002154 { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SuspendCallback(hpcd); #else HAL_PCD_SuspendCallback(hpcd); 800214e: 6878 ldr r0, [r7, #4] 8002150: f006 f9ae bl 80084b0 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP); 8002154: 687b ldr r3, [r7, #4] 8002156: 681b ldr r3, [r3, #0] 8002158: 695a ldr r2, [r3, #20] 800215a: 687b ldr r3, [r7, #4] 800215c: 681b ldr r3, [r3, #0] 800215e: f402 6200 and.w r2, r2, #2048 @ 0x800 8002162: 615a str r2, [r3, #20] } #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \ || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \ || defined(STM32F423xx) /* Handle LPM Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT)) 8002164: 687b ldr r3, [r7, #4] 8002166: 681b ldr r3, [r3, #0] 8002168: 4618 mov r0, r3 800216a: f004 f895 bl 8006298 800216e: 4603 mov r3, r0 8002170: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8002174: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 8002178: d121 bne.n 80021be { __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT); 800217a: 687b ldr r3, [r7, #4] 800217c: 681b ldr r3, [r3, #0] 800217e: 695a ldr r2, [r3, #20] 8002180: 687b ldr r3, [r7, #4] 8002182: 681b ldr r3, [r3, #0] 8002184: f002 6200 and.w r2, r2, #134217728 @ 0x8000000 8002188: 615a str r2, [r3, #20] if (hpcd->LPM_State == LPM_L0) 800218a: 687b ldr r3, [r7, #4] 800218c: f893 34cc ldrb.w r3, [r3, #1228] @ 0x4cc 8002190: 2b00 cmp r3, #0 8002192: d111 bne.n 80021b8 { hpcd->LPM_State = LPM_L1; 8002194: 687b ldr r3, [r7, #4] 8002196: 2201 movs r2, #1 8002198: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc hpcd->BESL = (hpcd->Instance->GLPMCFG & USB_OTG_GLPMCFG_BESL) >> 2U; 800219c: 687b ldr r3, [r7, #4] 800219e: 681b ldr r3, [r3, #0] 80021a0: 6d5b ldr r3, [r3, #84] @ 0x54 80021a2: 089b lsrs r3, r3, #2 80021a4: f003 020f and.w r2, r3, #15 80021a8: 687b ldr r3, [r7, #4] 80021aa: f8c3 24d0 str.w r2, [r3, #1232] @ 0x4d0 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->LPMCallback(hpcd, PCD_LPM_L1_ACTIVE); #else HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE); 80021ae: 2101 movs r1, #1 80021b0: 6878 ldr r0, [r7, #4] 80021b2: f006 fb69 bl 8008888 80021b6: e002 b.n 80021be else { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SuspendCallback(hpcd); #else HAL_PCD_SuspendCallback(hpcd); 80021b8: 6878 ldr r0, [r7, #4] 80021ba: f006 f979 bl 80084b0 } #endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */ /* Handle Reset Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBRST)) 80021be: 687b ldr r3, [r7, #4] 80021c0: 681b ldr r3, [r3, #0] 80021c2: 4618 mov r0, r3 80021c4: f004 f868 bl 8006298 80021c8: 4603 mov r3, r0 80021ca: f403 5380 and.w r3, r3, #4096 @ 0x1000 80021ce: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 80021d2: f040 80b7 bne.w 8002344 { USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG; 80021d6: 69fb ldr r3, [r7, #28] 80021d8: f503 6300 add.w r3, r3, #2048 @ 0x800 80021dc: 685b ldr r3, [r3, #4] 80021de: 69fa ldr r2, [r7, #28] 80021e0: f502 6200 add.w r2, r2, #2048 @ 0x800 80021e4: f023 0301 bic.w r3, r3, #1 80021e8: 6053 str r3, [r2, #4] (void)USB_FlushTxFifo(hpcd->Instance, 0x10U); 80021ea: 687b ldr r3, [r7, #4] 80021ec: 681b ldr r3, [r3, #0] 80021ee: 2110 movs r1, #16 80021f0: 4618 mov r0, r3 80021f2: f003 f935 bl 8005460 for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 80021f6: 2300 movs r3, #0 80021f8: 62fb str r3, [r7, #44] @ 0x2c 80021fa: e046 b.n 800228a { USBx_INEP(i)->DIEPINT = 0xFB7FU; 80021fc: 6afb ldr r3, [r7, #44] @ 0x2c 80021fe: 015a lsls r2, r3, #5 8002200: 69fb ldr r3, [r7, #28] 8002202: 4413 add r3, r2 8002204: f503 6310 add.w r3, r3, #2304 @ 0x900 8002208: 461a mov r2, r3 800220a: f64f 337f movw r3, #64383 @ 0xfb7f 800220e: 6093 str r3, [r2, #8] USBx_INEP(i)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL; 8002210: 6afb ldr r3, [r7, #44] @ 0x2c 8002212: 015a lsls r2, r3, #5 8002214: 69fb ldr r3, [r7, #28] 8002216: 4413 add r3, r2 8002218: f503 6310 add.w r3, r3, #2304 @ 0x900 800221c: 681b ldr r3, [r3, #0] 800221e: 6afa ldr r2, [r7, #44] @ 0x2c 8002220: 0151 lsls r1, r2, #5 8002222: 69fa ldr r2, [r7, #28] 8002224: 440a add r2, r1 8002226: f502 6210 add.w r2, r2, #2304 @ 0x900 800222a: f423 1300 bic.w r3, r3, #2097152 @ 0x200000 800222e: 6013 str r3, [r2, #0] USBx_OUTEP(i)->DOEPINT = 0xFB7FU; 8002230: 6afb ldr r3, [r7, #44] @ 0x2c 8002232: 015a lsls r2, r3, #5 8002234: 69fb ldr r3, [r7, #28] 8002236: 4413 add r3, r2 8002238: f503 6330 add.w r3, r3, #2816 @ 0xb00 800223c: 461a mov r2, r3 800223e: f64f 337f movw r3, #64383 @ 0xfb7f 8002242: 6093 str r3, [r2, #8] USBx_OUTEP(i)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL; 8002244: 6afb ldr r3, [r7, #44] @ 0x2c 8002246: 015a lsls r2, r3, #5 8002248: 69fb ldr r3, [r7, #28] 800224a: 4413 add r3, r2 800224c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002250: 681b ldr r3, [r3, #0] 8002252: 6afa ldr r2, [r7, #44] @ 0x2c 8002254: 0151 lsls r1, r2, #5 8002256: 69fa ldr r2, [r7, #28] 8002258: 440a add r2, r1 800225a: f502 6230 add.w r2, r2, #2816 @ 0xb00 800225e: f423 1300 bic.w r3, r3, #2097152 @ 0x200000 8002262: 6013 str r3, [r2, #0] USBx_OUTEP(i)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; 8002264: 6afb ldr r3, [r7, #44] @ 0x2c 8002266: 015a lsls r2, r3, #5 8002268: 69fb ldr r3, [r7, #28] 800226a: 4413 add r3, r2 800226c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002270: 681b ldr r3, [r3, #0] 8002272: 6afa ldr r2, [r7, #44] @ 0x2c 8002274: 0151 lsls r1, r2, #5 8002276: 69fa ldr r2, [r7, #28] 8002278: 440a add r2, r1 800227a: f502 6230 add.w r2, r2, #2816 @ 0xb00 800227e: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 8002282: 6013 str r3, [r2, #0] for (i = 0U; i < hpcd->Init.dev_endpoints; i++) 8002284: 6afb ldr r3, [r7, #44] @ 0x2c 8002286: 3301 adds r3, #1 8002288: 62fb str r3, [r7, #44] @ 0x2c 800228a: 687b ldr r3, [r7, #4] 800228c: 791b ldrb r3, [r3, #4] 800228e: 461a mov r2, r3 8002290: 6afb ldr r3, [r7, #44] @ 0x2c 8002292: 4293 cmp r3, r2 8002294: d3b2 bcc.n 80021fc } USBx_DEVICE->DAINTMSK |= 0x10001U; 8002296: 69fb ldr r3, [r7, #28] 8002298: f503 6300 add.w r3, r3, #2048 @ 0x800 800229c: 69db ldr r3, [r3, #28] 800229e: 69fa ldr r2, [r7, #28] 80022a0: f502 6200 add.w r2, r2, #2048 @ 0x800 80022a4: f043 1301 orr.w r3, r3, #65537 @ 0x10001 80022a8: 61d3 str r3, [r2, #28] if (hpcd->Init.use_dedicated_ep1 != 0U) 80022aa: 687b ldr r3, [r7, #4] 80022ac: 7bdb ldrb r3, [r3, #15] 80022ae: 2b00 cmp r3, #0 80022b0: d016 beq.n 80022e0 { USBx_DEVICE->DOUTEP1MSK |= USB_OTG_DOEPMSK_STUPM | 80022b2: 69fb ldr r3, [r7, #28] 80022b4: f503 6300 add.w r3, r3, #2048 @ 0x800 80022b8: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 80022bc: 69fa ldr r2, [r7, #28] 80022be: f502 6200 add.w r2, r2, #2048 @ 0x800 80022c2: f043 030b orr.w r3, r3, #11 80022c6: f8c2 3084 str.w r3, [r2, #132] @ 0x84 USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM; USBx_DEVICE->DINEP1MSK |= USB_OTG_DIEPMSK_TOM | 80022ca: 69fb ldr r3, [r7, #28] 80022cc: f503 6300 add.w r3, r3, #2048 @ 0x800 80022d0: 6c5b ldr r3, [r3, #68] @ 0x44 80022d2: 69fa ldr r2, [r7, #28] 80022d4: f502 6200 add.w r2, r2, #2048 @ 0x800 80022d8: f043 030b orr.w r3, r3, #11 80022dc: 6453 str r3, [r2, #68] @ 0x44 80022de: e015 b.n 800230c USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM; } else { USBx_DEVICE->DOEPMSK |= USB_OTG_DOEPMSK_STUPM | 80022e0: 69fb ldr r3, [r7, #28] 80022e2: f503 6300 add.w r3, r3, #2048 @ 0x800 80022e6: 695b ldr r3, [r3, #20] 80022e8: 69fa ldr r2, [r7, #28] 80022ea: f502 6200 add.w r2, r2, #2048 @ 0x800 80022ee: f443 5300 orr.w r3, r3, #8192 @ 0x2000 80022f2: f043 032b orr.w r3, r3, #43 @ 0x2b 80022f6: 6153 str r3, [r2, #20] USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM | USB_OTG_DOEPMSK_OTEPSPRM | USB_OTG_DOEPMSK_NAKM; USBx_DEVICE->DIEPMSK |= USB_OTG_DIEPMSK_TOM | 80022f8: 69fb ldr r3, [r7, #28] 80022fa: f503 6300 add.w r3, r3, #2048 @ 0x800 80022fe: 691b ldr r3, [r3, #16] 8002300: 69fa ldr r2, [r7, #28] 8002302: f502 6200 add.w r2, r2, #2048 @ 0x800 8002306: f043 030b orr.w r3, r3, #11 800230a: 6113 str r3, [r2, #16] USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM; } /* Set Default Address to 0 */ USBx_DEVICE->DCFG &= ~USB_OTG_DCFG_DAD; 800230c: 69fb ldr r3, [r7, #28] 800230e: f503 6300 add.w r3, r3, #2048 @ 0x800 8002312: 681b ldr r3, [r3, #0] 8002314: 69fa ldr r2, [r7, #28] 8002316: f502 6200 add.w r2, r2, #2048 @ 0x800 800231a: f423 63fe bic.w r3, r3, #2032 @ 0x7f0 800231e: 6013 str r3, [r2, #0] /* setup EP0 to receive SETUP packets */ (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable, 8002320: 687b ldr r3, [r7, #4] 8002322: 6818 ldr r0, [r3, #0] 8002324: 687b ldr r3, [r7, #4] 8002326: 7999 ldrb r1, [r3, #6] (uint8_t *)hpcd->Setup); 8002328: 687b ldr r3, [r7, #4] 800232a: f203 439c addw r3, r3, #1180 @ 0x49c (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable, 800232e: 461a mov r2, r3 8002330: f004 f876 bl 8006420 __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBRST); 8002334: 687b ldr r3, [r7, #4] 8002336: 681b ldr r3, [r3, #0] 8002338: 695a ldr r2, [r3, #20] 800233a: 687b ldr r3, [r7, #4] 800233c: 681b ldr r3, [r3, #0] 800233e: f402 5280 and.w r2, r2, #4096 @ 0x1000 8002342: 615a str r2, [r3, #20] } /* Handle Enumeration done Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE)) 8002344: 687b ldr r3, [r7, #4] 8002346: 681b ldr r3, [r3, #0] 8002348: 4618 mov r0, r3 800234a: f003 ffa5 bl 8006298 800234e: 4603 mov r3, r0 8002350: f403 5300 and.w r3, r3, #8192 @ 0x2000 8002354: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8002358: d123 bne.n 80023a2 { (void)USB_ActivateSetup(hpcd->Instance); 800235a: 687b ldr r3, [r7, #4] 800235c: 681b ldr r3, [r3, #0] 800235e: 4618 mov r0, r3 8002360: f004 f83b bl 80063da hpcd->Init.speed = USB_GetDevSpeed(hpcd->Instance); 8002364: 687b ldr r3, [r7, #4] 8002366: 681b ldr r3, [r3, #0] 8002368: 4618 mov r0, r3 800236a: f003 f8f2 bl 8005552 800236e: 4603 mov r3, r0 8002370: 461a mov r2, r3 8002372: 687b ldr r3, [r7, #4] 8002374: 71da strb r2, [r3, #7] /* Set USB Turnaround time */ (void)USB_SetTurnaroundTime(hpcd->Instance, 8002376: 687b ldr r3, [r7, #4] 8002378: 681c ldr r4, [r3, #0] 800237a: f000 fe8b bl 8003094 800237e: 4601 mov r1, r0 HAL_RCC_GetHCLKFreq(), (uint8_t)hpcd->Init.speed); 8002380: 687b ldr r3, [r7, #4] 8002382: 79db ldrb r3, [r3, #7] (void)USB_SetTurnaroundTime(hpcd->Instance, 8002384: 461a mov r2, r3 8002386: 4620 mov r0, r4 8002388: f002 fdfc bl 8004f84 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ResetCallback(hpcd); #else HAL_PCD_ResetCallback(hpcd); 800238c: 6878 ldr r0, [r7, #4] 800238e: f006 f866 bl 800845e #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE); 8002392: 687b ldr r3, [r7, #4] 8002394: 681b ldr r3, [r3, #0] 8002396: 695a ldr r2, [r3, #20] 8002398: 687b ldr r3, [r7, #4] 800239a: 681b ldr r3, [r3, #0] 800239c: f402 5200 and.w r2, r2, #8192 @ 0x2000 80023a0: 615a str r2, [r3, #20] } /* Handle SOF Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SOF)) 80023a2: 687b ldr r3, [r7, #4] 80023a4: 681b ldr r3, [r3, #0] 80023a6: 4618 mov r0, r3 80023a8: f003 ff76 bl 8006298 80023ac: 4603 mov r3, r0 80023ae: f003 0308 and.w r3, r3, #8 80023b2: 2b08 cmp r3, #8 80023b4: d10a bne.n 80023cc { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SOFCallback(hpcd); #else HAL_PCD_SOFCallback(hpcd); 80023b6: 6878 ldr r0, [r7, #4] 80023b8: f006 f843 bl 8008442 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SOF); 80023bc: 687b ldr r3, [r7, #4] 80023be: 681b ldr r3, [r3, #0] 80023c0: 695a ldr r2, [r3, #20] 80023c2: 687b ldr r3, [r7, #4] 80023c4: 681b ldr r3, [r3, #0] 80023c6: f002 0208 and.w r2, r2, #8 80023ca: 615a str r2, [r3, #20] } /* Handle Global OUT NAK effective Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_BOUTNAKEFF)) 80023cc: 687b ldr r3, [r7, #4] 80023ce: 681b ldr r3, [r3, #0] 80023d0: 4618 mov r0, r3 80023d2: f003 ff61 bl 8006298 80023d6: 4603 mov r3, r0 80023d8: f003 0380 and.w r3, r3, #128 @ 0x80 80023dc: 2b80 cmp r3, #128 @ 0x80 80023de: d123 bne.n 8002428 { USBx->GINTMSK &= ~USB_OTG_GINTMSK_GONAKEFFM; 80023e0: 6a3b ldr r3, [r7, #32] 80023e2: 699b ldr r3, [r3, #24] 80023e4: f023 0280 bic.w r2, r3, #128 @ 0x80 80023e8: 6a3b ldr r3, [r7, #32] 80023ea: 619a str r2, [r3, #24] for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 80023ec: 2301 movs r3, #1 80023ee: 627b str r3, [r7, #36] @ 0x24 80023f0: e014 b.n 800241c { if (hpcd->OUT_ep[epnum].is_iso_incomplete == 1U) 80023f2: 6879 ldr r1, [r7, #4] 80023f4: 6a7a ldr r2, [r7, #36] @ 0x24 80023f6: 4613 mov r3, r2 80023f8: 00db lsls r3, r3, #3 80023fa: 4413 add r3, r2 80023fc: 009b lsls r3, r3, #2 80023fe: 440b add r3, r1 8002400: f203 2357 addw r3, r3, #599 @ 0x257 8002404: 781b ldrb r3, [r3, #0] 8002406: 2b01 cmp r3, #1 8002408: d105 bne.n 8002416 { /* Abort current transaction and disable the EP */ (void)HAL_PCD_EP_Abort(hpcd, (uint8_t)epnum); 800240a: 6a7b ldr r3, [r7, #36] @ 0x24 800240c: b2db uxtb r3, r3 800240e: 4619 mov r1, r3 8002410: 6878 ldr r0, [r7, #4] 8002412: f000 faf2 bl 80029fa for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 8002416: 6a7b ldr r3, [r7, #36] @ 0x24 8002418: 3301 adds r3, #1 800241a: 627b str r3, [r7, #36] @ 0x24 800241c: 687b ldr r3, [r7, #4] 800241e: 791b ldrb r3, [r3, #4] 8002420: 461a mov r2, r3 8002422: 6a7b ldr r3, [r7, #36] @ 0x24 8002424: 4293 cmp r3, r2 8002426: d3e4 bcc.n 80023f2 } } } /* Handle Incomplete ISO IN Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR)) 8002428: 687b ldr r3, [r7, #4] 800242a: 681b ldr r3, [r3, #0] 800242c: 4618 mov r0, r3 800242e: f003 ff33 bl 8006298 8002432: 4603 mov r3, r0 8002434: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8002438: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 800243c: d13c bne.n 80024b8 { for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 800243e: 2301 movs r3, #1 8002440: 627b str r3, [r7, #36] @ 0x24 8002442: e02b b.n 800249c { RegVal = USBx_INEP(epnum)->DIEPCTL; 8002444: 6a7b ldr r3, [r7, #36] @ 0x24 8002446: 015a lsls r2, r3, #5 8002448: 69fb ldr r3, [r7, #28] 800244a: 4413 add r3, r2 800244c: f503 6310 add.w r3, r3, #2304 @ 0x900 8002450: 681b ldr r3, [r3, #0] 8002452: 61bb str r3, [r7, #24] if ((hpcd->IN_ep[epnum].type == EP_TYPE_ISOC) && 8002454: 6879 ldr r1, [r7, #4] 8002456: 6a7a ldr r2, [r7, #36] @ 0x24 8002458: 4613 mov r3, r2 800245a: 00db lsls r3, r3, #3 800245c: 4413 add r3, r2 800245e: 009b lsls r3, r3, #2 8002460: 440b add r3, r1 8002462: 3318 adds r3, #24 8002464: 781b ldrb r3, [r3, #0] 8002466: 2b01 cmp r3, #1 8002468: d115 bne.n 8002496 ((RegVal & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)) 800246a: 69bb ldr r3, [r7, #24] if ((hpcd->IN_ep[epnum].type == EP_TYPE_ISOC) && 800246c: 2b00 cmp r3, #0 800246e: da12 bge.n 8002496 { hpcd->IN_ep[epnum].is_iso_incomplete = 1U; 8002470: 6879 ldr r1, [r7, #4] 8002472: 6a7a ldr r2, [r7, #36] @ 0x24 8002474: 4613 mov r3, r2 8002476: 00db lsls r3, r3, #3 8002478: 4413 add r3, r2 800247a: 009b lsls r3, r3, #2 800247c: 440b add r3, r1 800247e: 3317 adds r3, #23 8002480: 2201 movs r2, #1 8002482: 701a strb r2, [r3, #0] /* Abort current transaction and disable the EP */ (void)HAL_PCD_EP_Abort(hpcd, (uint8_t)(epnum | 0x80U)); 8002484: 6a7b ldr r3, [r7, #36] @ 0x24 8002486: b2db uxtb r3, r3 8002488: f063 037f orn r3, r3, #127 @ 0x7f 800248c: b2db uxtb r3, r3 800248e: 4619 mov r1, r3 8002490: 6878 ldr r0, [r7, #4] 8002492: f000 fab2 bl 80029fa for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 8002496: 6a7b ldr r3, [r7, #36] @ 0x24 8002498: 3301 adds r3, #1 800249a: 627b str r3, [r7, #36] @ 0x24 800249c: 687b ldr r3, [r7, #4] 800249e: 791b ldrb r3, [r3, #4] 80024a0: 461a mov r2, r3 80024a2: 6a7b ldr r3, [r7, #36] @ 0x24 80024a4: 4293 cmp r3, r2 80024a6: d3cd bcc.n 8002444 } } __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR); 80024a8: 687b ldr r3, [r7, #4] 80024aa: 681b ldr r3, [r3, #0] 80024ac: 695a ldr r2, [r3, #20] 80024ae: 687b ldr r3, [r7, #4] 80024b0: 681b ldr r3, [r3, #0] 80024b2: f402 1280 and.w r2, r2, #1048576 @ 0x100000 80024b6: 615a str r2, [r3, #20] } /* Handle Incomplete ISO OUT Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT)) 80024b8: 687b ldr r3, [r7, #4] 80024ba: 681b ldr r3, [r3, #0] 80024bc: 4618 mov r0, r3 80024be: f003 feeb bl 8006298 80024c2: 4603 mov r3, r0 80024c4: f403 1300 and.w r3, r3, #2097152 @ 0x200000 80024c8: f5b3 1f00 cmp.w r3, #2097152 @ 0x200000 80024cc: d156 bne.n 800257c { for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 80024ce: 2301 movs r3, #1 80024d0: 627b str r3, [r7, #36] @ 0x24 80024d2: e045 b.n 8002560 { RegVal = USBx_OUTEP(epnum)->DOEPCTL; 80024d4: 6a7b ldr r3, [r7, #36] @ 0x24 80024d6: 015a lsls r2, r3, #5 80024d8: 69fb ldr r3, [r7, #28] 80024da: 4413 add r3, r2 80024dc: f503 6330 add.w r3, r3, #2816 @ 0xb00 80024e0: 681b ldr r3, [r3, #0] 80024e2: 61bb str r3, [r7, #24] if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) && 80024e4: 6879 ldr r1, [r7, #4] 80024e6: 6a7a ldr r2, [r7, #36] @ 0x24 80024e8: 4613 mov r3, r2 80024ea: 00db lsls r3, r3, #3 80024ec: 4413 add r3, r2 80024ee: 009b lsls r3, r3, #2 80024f0: 440b add r3, r1 80024f2: f503 7316 add.w r3, r3, #600 @ 0x258 80024f6: 781b ldrb r3, [r3, #0] 80024f8: 2b01 cmp r3, #1 80024fa: d12e bne.n 800255a ((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) && 80024fc: 69bb ldr r3, [r7, #24] if ((hpcd->OUT_ep[epnum].type == EP_TYPE_ISOC) && 80024fe: 2b00 cmp r3, #0 8002500: da2b bge.n 800255a (((RegVal & (0x1U << 16)) >> 16U) == (hpcd->FrameNumber & 0x1U))) 8002502: 69bb ldr r3, [r7, #24] 8002504: 0c1a lsrs r2, r3, #16 8002506: 687b ldr r3, [r7, #4] 8002508: f8d3 34d4 ldr.w r3, [r3, #1236] @ 0x4d4 800250c: 4053 eors r3, r2 800250e: f003 0301 and.w r3, r3, #1 ((RegVal & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) && 8002512: 2b00 cmp r3, #0 8002514: d121 bne.n 800255a { hpcd->OUT_ep[epnum].is_iso_incomplete = 1U; 8002516: 6879 ldr r1, [r7, #4] 8002518: 6a7a ldr r2, [r7, #36] @ 0x24 800251a: 4613 mov r3, r2 800251c: 00db lsls r3, r3, #3 800251e: 4413 add r3, r2 8002520: 009b lsls r3, r3, #2 8002522: 440b add r3, r1 8002524: f203 2357 addw r3, r3, #599 @ 0x257 8002528: 2201 movs r2, #1 800252a: 701a strb r2, [r3, #0] USBx->GINTMSK |= USB_OTG_GINTMSK_GONAKEFFM; 800252c: 6a3b ldr r3, [r7, #32] 800252e: 699b ldr r3, [r3, #24] 8002530: f043 0280 orr.w r2, r3, #128 @ 0x80 8002534: 6a3b ldr r3, [r7, #32] 8002536: 619a str r2, [r3, #24] if ((USBx->GINTSTS & USB_OTG_GINTSTS_BOUTNAKEFF) == 0U) 8002538: 6a3b ldr r3, [r7, #32] 800253a: 695b ldr r3, [r3, #20] 800253c: f003 0380 and.w r3, r3, #128 @ 0x80 8002540: 2b00 cmp r3, #0 8002542: d10a bne.n 800255a { USBx_DEVICE->DCTL |= USB_OTG_DCTL_SGONAK; 8002544: 69fb ldr r3, [r7, #28] 8002546: f503 6300 add.w r3, r3, #2048 @ 0x800 800254a: 685b ldr r3, [r3, #4] 800254c: 69fa ldr r2, [r7, #28] 800254e: f502 6200 add.w r2, r2, #2048 @ 0x800 8002552: f443 7300 orr.w r3, r3, #512 @ 0x200 8002556: 6053 str r3, [r2, #4] break; 8002558: e008 b.n 800256c for (epnum = 1U; epnum < hpcd->Init.dev_endpoints; epnum++) 800255a: 6a7b ldr r3, [r7, #36] @ 0x24 800255c: 3301 adds r3, #1 800255e: 627b str r3, [r7, #36] @ 0x24 8002560: 687b ldr r3, [r7, #4] 8002562: 791b ldrb r3, [r3, #4] 8002564: 461a mov r2, r3 8002566: 6a7b ldr r3, [r7, #36] @ 0x24 8002568: 4293 cmp r3, r2 800256a: d3b3 bcc.n 80024d4 } } } __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT); 800256c: 687b ldr r3, [r7, #4] 800256e: 681b ldr r3, [r3, #0] 8002570: 695a ldr r2, [r3, #20] 8002572: 687b ldr r3, [r7, #4] 8002574: 681b ldr r3, [r3, #0] 8002576: f402 1200 and.w r2, r2, #2097152 @ 0x200000 800257a: 615a str r2, [r3, #20] } /* Handle Connection event Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT)) 800257c: 687b ldr r3, [r7, #4] 800257e: 681b ldr r3, [r3, #0] 8002580: 4618 mov r0, r3 8002582: f003 fe89 bl 8006298 8002586: 4603 mov r3, r0 8002588: f003 4380 and.w r3, r3, #1073741824 @ 0x40000000 800258c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8002590: d10a bne.n 80025a8 { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->ConnectCallback(hpcd); #else HAL_PCD_ConnectCallback(hpcd); 8002592: 6878 ldr r0, [r7, #4] 8002594: f005 ffe4 bl 8008560 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT); 8002598: 687b ldr r3, [r7, #4] 800259a: 681b ldr r3, [r3, #0] 800259c: 695a ldr r2, [r3, #20] 800259e: 687b ldr r3, [r7, #4] 80025a0: 681b ldr r3, [r3, #0] 80025a2: f002 4280 and.w r2, r2, #1073741824 @ 0x40000000 80025a6: 615a str r2, [r3, #20] } /* Handle Disconnection event Interrupt */ if (__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OTGINT)) 80025a8: 687b ldr r3, [r7, #4] 80025aa: 681b ldr r3, [r3, #0] 80025ac: 4618 mov r0, r3 80025ae: f003 fe73 bl 8006298 80025b2: 4603 mov r3, r0 80025b4: f003 0304 and.w r3, r3, #4 80025b8: 2b04 cmp r3, #4 80025ba: d115 bne.n 80025e8 { RegVal = hpcd->Instance->GOTGINT; 80025bc: 687b ldr r3, [r7, #4] 80025be: 681b ldr r3, [r3, #0] 80025c0: 685b ldr r3, [r3, #4] 80025c2: 61bb str r3, [r7, #24] if ((RegVal & USB_OTG_GOTGINT_SEDET) == USB_OTG_GOTGINT_SEDET) 80025c4: 69bb ldr r3, [r7, #24] 80025c6: f003 0304 and.w r3, r3, #4 80025ca: 2b00 cmp r3, #0 80025cc: d002 beq.n 80025d4 { #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DisconnectCallback(hpcd); #else HAL_PCD_DisconnectCallback(hpcd); 80025ce: 6878 ldr r0, [r7, #4] 80025d0: f005 ffd4 bl 800857c #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } hpcd->Instance->GOTGINT |= RegVal; 80025d4: 687b ldr r3, [r7, #4] 80025d6: 681b ldr r3, [r3, #0] 80025d8: 6859 ldr r1, [r3, #4] 80025da: 687b ldr r3, [r7, #4] 80025dc: 681b ldr r3, [r3, #0] 80025de: 69ba ldr r2, [r7, #24] 80025e0: 430a orrs r2, r1 80025e2: 605a str r2, [r3, #4] 80025e4: e000 b.n 80025e8 return; 80025e6: bf00 nop } } } 80025e8: 3734 adds r7, #52 @ 0x34 80025ea: 46bd mov sp, r7 80025ec: bd90 pop {r4, r7, pc} 080025ee : * @param hpcd PCD handle * @param address new device address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) { 80025ee: b580 push {r7, lr} 80025f0: b082 sub sp, #8 80025f2: af00 add r7, sp, #0 80025f4: 6078 str r0, [r7, #4] 80025f6: 460b mov r3, r1 80025f8: 70fb strb r3, [r7, #3] __HAL_LOCK(hpcd); 80025fa: 687b ldr r3, [r7, #4] 80025fc: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 8002600: 2b01 cmp r3, #1 8002602: d101 bne.n 8002608 8002604: 2302 movs r3, #2 8002606: e012 b.n 800262e 8002608: 687b ldr r3, [r7, #4] 800260a: 2201 movs r2, #1 800260c: f883 2494 strb.w r2, [r3, #1172] @ 0x494 hpcd->USB_Address = address; 8002610: 687b ldr r3, [r7, #4] 8002612: 78fa ldrb r2, [r7, #3] 8002614: 745a strb r2, [r3, #17] (void)USB_SetDevAddress(hpcd->Instance, address); 8002616: 687b ldr r3, [r7, #4] 8002618: 681b ldr r3, [r3, #0] 800261a: 78fa ldrb r2, [r7, #3] 800261c: 4611 mov r1, r2 800261e: 4618 mov r0, r3 8002620: f003 fdd2 bl 80061c8 __HAL_UNLOCK(hpcd); 8002624: 687b ldr r3, [r7, #4] 8002626: 2200 movs r2, #0 8002628: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return HAL_OK; 800262c: 2300 movs r3, #0 } 800262e: 4618 mov r0, r3 8002630: 3708 adds r7, #8 8002632: 46bd mov sp, r7 8002634: bd80 pop {r7, pc} 08002636 : * @param ep_type endpoint type * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) { 8002636: b580 push {r7, lr} 8002638: b084 sub sp, #16 800263a: af00 add r7, sp, #0 800263c: 6078 str r0, [r7, #4] 800263e: 4608 mov r0, r1 8002640: 4611 mov r1, r2 8002642: 461a mov r2, r3 8002644: 4603 mov r3, r0 8002646: 70fb strb r3, [r7, #3] 8002648: 460b mov r3, r1 800264a: 803b strh r3, [r7, #0] 800264c: 4613 mov r3, r2 800264e: 70bb strb r3, [r7, #2] HAL_StatusTypeDef ret = HAL_OK; 8002650: 2300 movs r3, #0 8002652: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8002654: f997 3003 ldrsb.w r3, [r7, #3] 8002658: 2b00 cmp r3, #0 800265a: da0f bge.n 800267c { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 800265c: 78fb ldrb r3, [r7, #3] 800265e: f003 020f and.w r2, r3, #15 8002662: 4613 mov r3, r2 8002664: 00db lsls r3, r3, #3 8002666: 4413 add r3, r2 8002668: 009b lsls r3, r3, #2 800266a: 3310 adds r3, #16 800266c: 687a ldr r2, [r7, #4] 800266e: 4413 add r3, r2 8002670: 3304 adds r3, #4 8002672: 60fb str r3, [r7, #12] ep->is_in = 1U; 8002674: 68fb ldr r3, [r7, #12] 8002676: 2201 movs r2, #1 8002678: 705a strb r2, [r3, #1] 800267a: e00f b.n 800269c } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 800267c: 78fb ldrb r3, [r7, #3] 800267e: f003 020f and.w r2, r3, #15 8002682: 4613 mov r3, r2 8002684: 00db lsls r3, r3, #3 8002686: 4413 add r3, r2 8002688: 009b lsls r3, r3, #2 800268a: f503 7314 add.w r3, r3, #592 @ 0x250 800268e: 687a ldr r2, [r7, #4] 8002690: 4413 add r3, r2 8002692: 3304 adds r3, #4 8002694: 60fb str r3, [r7, #12] ep->is_in = 0U; 8002696: 68fb ldr r3, [r7, #12] 8002698: 2200 movs r2, #0 800269a: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 800269c: 78fb ldrb r3, [r7, #3] 800269e: f003 030f and.w r3, r3, #15 80026a2: b2da uxtb r2, r3 80026a4: 68fb ldr r3, [r7, #12] 80026a6: 701a strb r2, [r3, #0] ep->maxpacket = (uint32_t)ep_mps & 0x7FFU; 80026a8: 883b ldrh r3, [r7, #0] 80026aa: f3c3 020a ubfx r2, r3, #0, #11 80026ae: 68fb ldr r3, [r7, #12] 80026b0: 609a str r2, [r3, #8] ep->type = ep_type; 80026b2: 68fb ldr r3, [r7, #12] 80026b4: 78ba ldrb r2, [r7, #2] 80026b6: 711a strb r2, [r3, #4] if (ep->is_in != 0U) 80026b8: 68fb ldr r3, [r7, #12] 80026ba: 785b ldrb r3, [r3, #1] 80026bc: 2b00 cmp r3, #0 80026be: d004 beq.n 80026ca { /* Assign a Tx FIFO */ ep->tx_fifo_num = ep->num; 80026c0: 68fb ldr r3, [r7, #12] 80026c2: 781b ldrb r3, [r3, #0] 80026c4: 461a mov r2, r3 80026c6: 68fb ldr r3, [r7, #12] 80026c8: 835a strh r2, [r3, #26] } /* Set initial data PID. */ if (ep_type == EP_TYPE_BULK) 80026ca: 78bb ldrb r3, [r7, #2] 80026cc: 2b02 cmp r3, #2 80026ce: d102 bne.n 80026d6 { ep->data_pid_start = 0U; 80026d0: 68fb ldr r3, [r7, #12] 80026d2: 2200 movs r2, #0 80026d4: 715a strb r2, [r3, #5] } __HAL_LOCK(hpcd); 80026d6: 687b ldr r3, [r7, #4] 80026d8: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 80026dc: 2b01 cmp r3, #1 80026de: d101 bne.n 80026e4 80026e0: 2302 movs r3, #2 80026e2: e00e b.n 8002702 80026e4: 687b ldr r3, [r7, #4] 80026e6: 2201 movs r2, #1 80026e8: f883 2494 strb.w r2, [r3, #1172] @ 0x494 (void)USB_ActivateEndpoint(hpcd->Instance, ep); 80026ec: 687b ldr r3, [r7, #4] 80026ee: 681b ldr r3, [r3, #0] 80026f0: 68f9 ldr r1, [r7, #12] 80026f2: 4618 mov r0, r3 80026f4: f002 ff52 bl 800559c __HAL_UNLOCK(hpcd); 80026f8: 687b ldr r3, [r7, #4] 80026fa: 2200 movs r2, #0 80026fc: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return ret; 8002700: 7afb ldrb r3, [r7, #11] } 8002702: 4618 mov r0, r3 8002704: 3710 adds r7, #16 8002706: 46bd mov sp, r7 8002708: bd80 pop {r7, pc} 0800270a : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 800270a: b580 push {r7, lr} 800270c: b084 sub sp, #16 800270e: af00 add r7, sp, #0 8002710: 6078 str r0, [r7, #4] 8002712: 460b mov r3, r1 8002714: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if ((ep_addr & 0x80U) == 0x80U) 8002716: f997 3003 ldrsb.w r3, [r7, #3] 800271a: 2b00 cmp r3, #0 800271c: da0f bge.n 800273e { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 800271e: 78fb ldrb r3, [r7, #3] 8002720: f003 020f and.w r2, r3, #15 8002724: 4613 mov r3, r2 8002726: 00db lsls r3, r3, #3 8002728: 4413 add r3, r2 800272a: 009b lsls r3, r3, #2 800272c: 3310 adds r3, #16 800272e: 687a ldr r2, [r7, #4] 8002730: 4413 add r3, r2 8002732: 3304 adds r3, #4 8002734: 60fb str r3, [r7, #12] ep->is_in = 1U; 8002736: 68fb ldr r3, [r7, #12] 8002738: 2201 movs r2, #1 800273a: 705a strb r2, [r3, #1] 800273c: e00f b.n 800275e } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 800273e: 78fb ldrb r3, [r7, #3] 8002740: f003 020f and.w r2, r3, #15 8002744: 4613 mov r3, r2 8002746: 00db lsls r3, r3, #3 8002748: 4413 add r3, r2 800274a: 009b lsls r3, r3, #2 800274c: f503 7314 add.w r3, r3, #592 @ 0x250 8002750: 687a ldr r2, [r7, #4] 8002752: 4413 add r3, r2 8002754: 3304 adds r3, #4 8002756: 60fb str r3, [r7, #12] ep->is_in = 0U; 8002758: 68fb ldr r3, [r7, #12] 800275a: 2200 movs r2, #0 800275c: 705a strb r2, [r3, #1] } ep->num = ep_addr & EP_ADDR_MSK; 800275e: 78fb ldrb r3, [r7, #3] 8002760: f003 030f and.w r3, r3, #15 8002764: b2da uxtb r2, r3 8002766: 68fb ldr r3, [r7, #12] 8002768: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 800276a: 687b ldr r3, [r7, #4] 800276c: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 8002770: 2b01 cmp r3, #1 8002772: d101 bne.n 8002778 8002774: 2302 movs r3, #2 8002776: e00e b.n 8002796 8002778: 687b ldr r3, [r7, #4] 800277a: 2201 movs r2, #1 800277c: f883 2494 strb.w r2, [r3, #1172] @ 0x494 (void)USB_DeactivateEndpoint(hpcd->Instance, ep); 8002780: 687b ldr r3, [r7, #4] 8002782: 681b ldr r3, [r3, #0] 8002784: 68f9 ldr r1, [r7, #12] 8002786: 4618 mov r0, r3 8002788: f002 ff90 bl 80056ac __HAL_UNLOCK(hpcd); 800278c: 687b ldr r3, [r7, #4] 800278e: 2200 movs r2, #0 8002790: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return HAL_OK; 8002794: 2300 movs r3, #0 } 8002796: 4618 mov r0, r3 8002798: 3710 adds r7, #16 800279a: 46bd mov sp, r7 800279c: bd80 pop {r7, pc} 0800279e : * @param pBuf pointer to the reception buffer * @param len amount of data to be received * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 800279e: b580 push {r7, lr} 80027a0: b086 sub sp, #24 80027a2: af00 add r7, sp, #0 80027a4: 60f8 str r0, [r7, #12] 80027a6: 607a str r2, [r7, #4] 80027a8: 603b str r3, [r7, #0] 80027aa: 460b mov r3, r1 80027ac: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 80027ae: 7afb ldrb r3, [r7, #11] 80027b0: f003 020f and.w r2, r3, #15 80027b4: 4613 mov r3, r2 80027b6: 00db lsls r3, r3, #3 80027b8: 4413 add r3, r2 80027ba: 009b lsls r3, r3, #2 80027bc: f503 7314 add.w r3, r3, #592 @ 0x250 80027c0: 68fa ldr r2, [r7, #12] 80027c2: 4413 add r3, r2 80027c4: 3304 adds r3, #4 80027c6: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 80027c8: 697b ldr r3, [r7, #20] 80027ca: 687a ldr r2, [r7, #4] 80027cc: 60da str r2, [r3, #12] ep->xfer_len = len; 80027ce: 697b ldr r3, [r7, #20] 80027d0: 683a ldr r2, [r7, #0] 80027d2: 611a str r2, [r3, #16] ep->xfer_count = 0U; 80027d4: 697b ldr r3, [r7, #20] 80027d6: 2200 movs r2, #0 80027d8: 615a str r2, [r3, #20] ep->is_in = 0U; 80027da: 697b ldr r3, [r7, #20] 80027dc: 2200 movs r2, #0 80027de: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 80027e0: 7afb ldrb r3, [r7, #11] 80027e2: f003 030f and.w r3, r3, #15 80027e6: b2da uxtb r2, r3 80027e8: 697b ldr r3, [r7, #20] 80027ea: 701a strb r2, [r3, #0] if (hpcd->Init.dma_enable == 1U) 80027ec: 68fb ldr r3, [r7, #12] 80027ee: 799b ldrb r3, [r3, #6] 80027f0: 2b01 cmp r3, #1 80027f2: d102 bne.n 80027fa { ep->dma_addr = (uint32_t)pBuf; 80027f4: 687a ldr r2, [r7, #4] 80027f6: 697b ldr r3, [r7, #20] 80027f8: 61da str r2, [r3, #28] } (void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable); 80027fa: 68fb ldr r3, [r7, #12] 80027fc: 6818 ldr r0, [r3, #0] 80027fe: 68fb ldr r3, [r7, #12] 8002800: 799b ldrb r3, [r3, #6] 8002802: 461a mov r2, r3 8002804: 6979 ldr r1, [r7, #20] 8002806: f003 f82d bl 8005864 return HAL_OK; 800280a: 2300 movs r3, #0 } 800280c: 4618 mov r0, r3 800280e: 3718 adds r7, #24 8002810: 46bd mov sp, r7 8002812: bd80 pop {r7, pc} 08002814 : * @param pBuf pointer to the transmission buffer * @param len amount of data to be sent * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) { 8002814: b580 push {r7, lr} 8002816: b086 sub sp, #24 8002818: af00 add r7, sp, #0 800281a: 60f8 str r0, [r7, #12] 800281c: 607a str r2, [r7, #4] 800281e: 603b str r3, [r7, #0] 8002820: 460b mov r3, r1 8002822: 72fb strb r3, [r7, #11] PCD_EPTypeDef *ep; ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8002824: 7afb ldrb r3, [r7, #11] 8002826: f003 020f and.w r2, r3, #15 800282a: 4613 mov r3, r2 800282c: 00db lsls r3, r3, #3 800282e: 4413 add r3, r2 8002830: 009b lsls r3, r3, #2 8002832: 3310 adds r3, #16 8002834: 68fa ldr r2, [r7, #12] 8002836: 4413 add r3, r2 8002838: 3304 adds r3, #4 800283a: 617b str r3, [r7, #20] /*setup and start the Xfer */ ep->xfer_buff = pBuf; 800283c: 697b ldr r3, [r7, #20] 800283e: 687a ldr r2, [r7, #4] 8002840: 60da str r2, [r3, #12] ep->xfer_len = len; 8002842: 697b ldr r3, [r7, #20] 8002844: 683a ldr r2, [r7, #0] 8002846: 611a str r2, [r3, #16] ep->xfer_count = 0U; 8002848: 697b ldr r3, [r7, #20] 800284a: 2200 movs r2, #0 800284c: 615a str r2, [r3, #20] ep->is_in = 1U; 800284e: 697b ldr r3, [r7, #20] 8002850: 2201 movs r2, #1 8002852: 705a strb r2, [r3, #1] ep->num = ep_addr & EP_ADDR_MSK; 8002854: 7afb ldrb r3, [r7, #11] 8002856: f003 030f and.w r3, r3, #15 800285a: b2da uxtb r2, r3 800285c: 697b ldr r3, [r7, #20] 800285e: 701a strb r2, [r3, #0] if (hpcd->Init.dma_enable == 1U) 8002860: 68fb ldr r3, [r7, #12] 8002862: 799b ldrb r3, [r3, #6] 8002864: 2b01 cmp r3, #1 8002866: d102 bne.n 800286e { ep->dma_addr = (uint32_t)pBuf; 8002868: 687a ldr r2, [r7, #4] 800286a: 697b ldr r3, [r7, #20] 800286c: 61da str r2, [r3, #28] } (void)USB_EPStartXfer(hpcd->Instance, ep, (uint8_t)hpcd->Init.dma_enable); 800286e: 68fb ldr r3, [r7, #12] 8002870: 6818 ldr r0, [r3, #0] 8002872: 68fb ldr r3, [r7, #12] 8002874: 799b ldrb r3, [r3, #6] 8002876: 461a mov r2, r3 8002878: 6979 ldr r1, [r7, #20] 800287a: f002 fff3 bl 8005864 return HAL_OK; 800287e: 2300 movs r3, #0 } 8002880: 4618 mov r0, r3 8002882: 3718 adds r7, #24 8002884: 46bd mov sp, r7 8002886: bd80 pop {r7, pc} 08002888 : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 8002888: b580 push {r7, lr} 800288a: b084 sub sp, #16 800288c: af00 add r7, sp, #0 800288e: 6078 str r0, [r7, #4] 8002890: 460b mov r3, r1 8002892: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints) 8002894: 78fb ldrb r3, [r7, #3] 8002896: f003 030f and.w r3, r3, #15 800289a: 687a ldr r2, [r7, #4] 800289c: 7912 ldrb r2, [r2, #4] 800289e: 4293 cmp r3, r2 80028a0: d901 bls.n 80028a6 { return HAL_ERROR; 80028a2: 2301 movs r3, #1 80028a4: e04f b.n 8002946 } if ((0x80U & ep_addr) == 0x80U) 80028a6: f997 3003 ldrsb.w r3, [r7, #3] 80028aa: 2b00 cmp r3, #0 80028ac: da0f bge.n 80028ce { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 80028ae: 78fb ldrb r3, [r7, #3] 80028b0: f003 020f and.w r2, r3, #15 80028b4: 4613 mov r3, r2 80028b6: 00db lsls r3, r3, #3 80028b8: 4413 add r3, r2 80028ba: 009b lsls r3, r3, #2 80028bc: 3310 adds r3, #16 80028be: 687a ldr r2, [r7, #4] 80028c0: 4413 add r3, r2 80028c2: 3304 adds r3, #4 80028c4: 60fb str r3, [r7, #12] ep->is_in = 1U; 80028c6: 68fb ldr r3, [r7, #12] 80028c8: 2201 movs r2, #1 80028ca: 705a strb r2, [r3, #1] 80028cc: e00d b.n 80028ea } else { ep = &hpcd->OUT_ep[ep_addr]; 80028ce: 78fa ldrb r2, [r7, #3] 80028d0: 4613 mov r3, r2 80028d2: 00db lsls r3, r3, #3 80028d4: 4413 add r3, r2 80028d6: 009b lsls r3, r3, #2 80028d8: f503 7314 add.w r3, r3, #592 @ 0x250 80028dc: 687a ldr r2, [r7, #4] 80028de: 4413 add r3, r2 80028e0: 3304 adds r3, #4 80028e2: 60fb str r3, [r7, #12] ep->is_in = 0U; 80028e4: 68fb ldr r3, [r7, #12] 80028e6: 2200 movs r2, #0 80028e8: 705a strb r2, [r3, #1] } ep->is_stall = 1U; 80028ea: 68fb ldr r3, [r7, #12] 80028ec: 2201 movs r2, #1 80028ee: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 80028f0: 78fb ldrb r3, [r7, #3] 80028f2: f003 030f and.w r3, r3, #15 80028f6: b2da uxtb r2, r3 80028f8: 68fb ldr r3, [r7, #12] 80028fa: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 80028fc: 687b ldr r3, [r7, #4] 80028fe: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 8002902: 2b01 cmp r3, #1 8002904: d101 bne.n 800290a 8002906: 2302 movs r3, #2 8002908: e01d b.n 8002946 800290a: 687b ldr r3, [r7, #4] 800290c: 2201 movs r2, #1 800290e: f883 2494 strb.w r2, [r3, #1172] @ 0x494 (void)USB_EPSetStall(hpcd->Instance, ep); 8002912: 687b ldr r3, [r7, #4] 8002914: 681b ldr r3, [r3, #0] 8002916: 68f9 ldr r1, [r7, #12] 8002918: 4618 mov r0, r3 800291a: f003 fb81 bl 8006020 if ((ep_addr & EP_ADDR_MSK) == 0U) 800291e: 78fb ldrb r3, [r7, #3] 8002920: f003 030f and.w r3, r3, #15 8002924: 2b00 cmp r3, #0 8002926: d109 bne.n 800293c { (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t)hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup); 8002928: 687b ldr r3, [r7, #4] 800292a: 6818 ldr r0, [r3, #0] 800292c: 687b ldr r3, [r7, #4] 800292e: 7999 ldrb r1, [r3, #6] 8002930: 687b ldr r3, [r7, #4] 8002932: f203 439c addw r3, r3, #1180 @ 0x49c 8002936: 461a mov r2, r3 8002938: f003 fd72 bl 8006420 } __HAL_UNLOCK(hpcd); 800293c: 687b ldr r3, [r7, #4] 800293e: 2200 movs r2, #0 8002940: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return HAL_OK; 8002944: 2300 movs r3, #0 } 8002946: 4618 mov r0, r3 8002948: 3710 adds r7, #16 800294a: 46bd mov sp, r7 800294c: bd80 pop {r7, pc} 0800294e : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 800294e: b580 push {r7, lr} 8002950: b084 sub sp, #16 8002952: af00 add r7, sp, #0 8002954: 6078 str r0, [r7, #4] 8002956: 460b mov r3, r1 8002958: 70fb strb r3, [r7, #3] PCD_EPTypeDef *ep; if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints) 800295a: 78fb ldrb r3, [r7, #3] 800295c: f003 030f and.w r3, r3, #15 8002960: 687a ldr r2, [r7, #4] 8002962: 7912 ldrb r2, [r2, #4] 8002964: 4293 cmp r3, r2 8002966: d901 bls.n 800296c { return HAL_ERROR; 8002968: 2301 movs r3, #1 800296a: e042 b.n 80029f2 } if ((0x80U & ep_addr) == 0x80U) 800296c: f997 3003 ldrsb.w r3, [r7, #3] 8002970: 2b00 cmp r3, #0 8002972: da0f bge.n 8002994 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8002974: 78fb ldrb r3, [r7, #3] 8002976: f003 020f and.w r2, r3, #15 800297a: 4613 mov r3, r2 800297c: 00db lsls r3, r3, #3 800297e: 4413 add r3, r2 8002980: 009b lsls r3, r3, #2 8002982: 3310 adds r3, #16 8002984: 687a ldr r2, [r7, #4] 8002986: 4413 add r3, r2 8002988: 3304 adds r3, #4 800298a: 60fb str r3, [r7, #12] ep->is_in = 1U; 800298c: 68fb ldr r3, [r7, #12] 800298e: 2201 movs r2, #1 8002990: 705a strb r2, [r3, #1] 8002992: e00f b.n 80029b4 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8002994: 78fb ldrb r3, [r7, #3] 8002996: f003 020f and.w r2, r3, #15 800299a: 4613 mov r3, r2 800299c: 00db lsls r3, r3, #3 800299e: 4413 add r3, r2 80029a0: 009b lsls r3, r3, #2 80029a2: f503 7314 add.w r3, r3, #592 @ 0x250 80029a6: 687a ldr r2, [r7, #4] 80029a8: 4413 add r3, r2 80029aa: 3304 adds r3, #4 80029ac: 60fb str r3, [r7, #12] ep->is_in = 0U; 80029ae: 68fb ldr r3, [r7, #12] 80029b0: 2200 movs r2, #0 80029b2: 705a strb r2, [r3, #1] } ep->is_stall = 0U; 80029b4: 68fb ldr r3, [r7, #12] 80029b6: 2200 movs r2, #0 80029b8: 709a strb r2, [r3, #2] ep->num = ep_addr & EP_ADDR_MSK; 80029ba: 78fb ldrb r3, [r7, #3] 80029bc: f003 030f and.w r3, r3, #15 80029c0: b2da uxtb r2, r3 80029c2: 68fb ldr r3, [r7, #12] 80029c4: 701a strb r2, [r3, #0] __HAL_LOCK(hpcd); 80029c6: 687b ldr r3, [r7, #4] 80029c8: f893 3494 ldrb.w r3, [r3, #1172] @ 0x494 80029cc: 2b01 cmp r3, #1 80029ce: d101 bne.n 80029d4 80029d0: 2302 movs r3, #2 80029d2: e00e b.n 80029f2 80029d4: 687b ldr r3, [r7, #4] 80029d6: 2201 movs r2, #1 80029d8: f883 2494 strb.w r2, [r3, #1172] @ 0x494 (void)USB_EPClearStall(hpcd->Instance, ep); 80029dc: 687b ldr r3, [r7, #4] 80029de: 681b ldr r3, [r3, #0] 80029e0: 68f9 ldr r1, [r7, #12] 80029e2: 4618 mov r0, r3 80029e4: f003 fb8a bl 80060fc __HAL_UNLOCK(hpcd); 80029e8: 687b ldr r3, [r7, #4] 80029ea: 2200 movs r2, #0 80029ec: f883 2494 strb.w r2, [r3, #1172] @ 0x494 return HAL_OK; 80029f0: 2300 movs r3, #0 } 80029f2: 4618 mov r0, r3 80029f4: 3710 adds r7, #16 80029f6: 46bd mov sp, r7 80029f8: bd80 pop {r7, pc} 080029fa : * @param hpcd PCD handle * @param ep_addr endpoint address * @retval HAL status */ HAL_StatusTypeDef HAL_PCD_EP_Abort(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) { 80029fa: b580 push {r7, lr} 80029fc: b084 sub sp, #16 80029fe: af00 add r7, sp, #0 8002a00: 6078 str r0, [r7, #4] 8002a02: 460b mov r3, r1 8002a04: 70fb strb r3, [r7, #3] HAL_StatusTypeDef ret; PCD_EPTypeDef *ep; if ((0x80U & ep_addr) == 0x80U) 8002a06: f997 3003 ldrsb.w r3, [r7, #3] 8002a0a: 2b00 cmp r3, #0 8002a0c: da0c bge.n 8002a28 { ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; 8002a0e: 78fb ldrb r3, [r7, #3] 8002a10: f003 020f and.w r2, r3, #15 8002a14: 4613 mov r3, r2 8002a16: 00db lsls r3, r3, #3 8002a18: 4413 add r3, r2 8002a1a: 009b lsls r3, r3, #2 8002a1c: 3310 adds r3, #16 8002a1e: 687a ldr r2, [r7, #4] 8002a20: 4413 add r3, r2 8002a22: 3304 adds r3, #4 8002a24: 60fb str r3, [r7, #12] 8002a26: e00c b.n 8002a42 } else { ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; 8002a28: 78fb ldrb r3, [r7, #3] 8002a2a: f003 020f and.w r2, r3, #15 8002a2e: 4613 mov r3, r2 8002a30: 00db lsls r3, r3, #3 8002a32: 4413 add r3, r2 8002a34: 009b lsls r3, r3, #2 8002a36: f503 7314 add.w r3, r3, #592 @ 0x250 8002a3a: 687a ldr r2, [r7, #4] 8002a3c: 4413 add r3, r2 8002a3e: 3304 adds r3, #4 8002a40: 60fb str r3, [r7, #12] } /* Stop Xfer */ ret = USB_EPStopXfer(hpcd->Instance, ep); 8002a42: 687b ldr r3, [r7, #4] 8002a44: 681b ldr r3, [r3, #0] 8002a46: 68f9 ldr r1, [r7, #12] 8002a48: 4618 mov r0, r3 8002a4a: f003 f9a9 bl 8005da0 8002a4e: 4603 mov r3, r0 8002a50: 72fb strb r3, [r7, #11] return ret; 8002a52: 7afb ldrb r3, [r7, #11] } 8002a54: 4618 mov r0, r3 8002a56: 3710 adds r7, #16 8002a58: 46bd mov sp, r7 8002a5a: bd80 pop {r7, pc} 08002a5c : * @param hpcd PCD handle * @param epnum endpoint number * @retval HAL status */ static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum) { 8002a5c: b580 push {r7, lr} 8002a5e: b08a sub sp, #40 @ 0x28 8002a60: af02 add r7, sp, #8 8002a62: 6078 str r0, [r7, #4] 8002a64: 6039 str r1, [r7, #0] USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 8002a66: 687b ldr r3, [r7, #4] 8002a68: 681b ldr r3, [r3, #0] 8002a6a: 617b str r3, [r7, #20] uint32_t USBx_BASE = (uint32_t)USBx; 8002a6c: 697b ldr r3, [r7, #20] 8002a6e: 613b str r3, [r7, #16] USB_OTG_EPTypeDef *ep; uint32_t len; uint32_t len32b; uint32_t fifoemptymsk; ep = &hpcd->IN_ep[epnum]; 8002a70: 683a ldr r2, [r7, #0] 8002a72: 4613 mov r3, r2 8002a74: 00db lsls r3, r3, #3 8002a76: 4413 add r3, r2 8002a78: 009b lsls r3, r3, #2 8002a7a: 3310 adds r3, #16 8002a7c: 687a ldr r2, [r7, #4] 8002a7e: 4413 add r3, r2 8002a80: 3304 adds r3, #4 8002a82: 60fb str r3, [r7, #12] if (ep->xfer_count > ep->xfer_len) 8002a84: 68fb ldr r3, [r7, #12] 8002a86: 695a ldr r2, [r3, #20] 8002a88: 68fb ldr r3, [r7, #12] 8002a8a: 691b ldr r3, [r3, #16] 8002a8c: 429a cmp r2, r3 8002a8e: d901 bls.n 8002a94 { return HAL_ERROR; 8002a90: 2301 movs r3, #1 8002a92: e06b b.n 8002b6c } len = ep->xfer_len - ep->xfer_count; 8002a94: 68fb ldr r3, [r7, #12] 8002a96: 691a ldr r2, [r3, #16] 8002a98: 68fb ldr r3, [r7, #12] 8002a9a: 695b ldr r3, [r3, #20] 8002a9c: 1ad3 subs r3, r2, r3 8002a9e: 61fb str r3, [r7, #28] if (len > ep->maxpacket) 8002aa0: 68fb ldr r3, [r7, #12] 8002aa2: 689b ldr r3, [r3, #8] 8002aa4: 69fa ldr r2, [r7, #28] 8002aa6: 429a cmp r2, r3 8002aa8: d902 bls.n 8002ab0 { len = ep->maxpacket; 8002aaa: 68fb ldr r3, [r7, #12] 8002aac: 689b ldr r3, [r3, #8] 8002aae: 61fb str r3, [r7, #28] } len32b = (len + 3U) / 4U; 8002ab0: 69fb ldr r3, [r7, #28] 8002ab2: 3303 adds r3, #3 8002ab4: 089b lsrs r3, r3, #2 8002ab6: 61bb str r3, [r7, #24] while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) && 8002ab8: e02a b.n 8002b10 (ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U)) { /* Write the FIFO */ len = ep->xfer_len - ep->xfer_count; 8002aba: 68fb ldr r3, [r7, #12] 8002abc: 691a ldr r2, [r3, #16] 8002abe: 68fb ldr r3, [r7, #12] 8002ac0: 695b ldr r3, [r3, #20] 8002ac2: 1ad3 subs r3, r2, r3 8002ac4: 61fb str r3, [r7, #28] if (len > ep->maxpacket) 8002ac6: 68fb ldr r3, [r7, #12] 8002ac8: 689b ldr r3, [r3, #8] 8002aca: 69fa ldr r2, [r7, #28] 8002acc: 429a cmp r2, r3 8002ace: d902 bls.n 8002ad6 { len = ep->maxpacket; 8002ad0: 68fb ldr r3, [r7, #12] 8002ad2: 689b ldr r3, [r3, #8] 8002ad4: 61fb str r3, [r7, #28] } len32b = (len + 3U) / 4U; 8002ad6: 69fb ldr r3, [r7, #28] 8002ad8: 3303 adds r3, #3 8002ada: 089b lsrs r3, r3, #2 8002adc: 61bb str r3, [r7, #24] (void)USB_WritePacket(USBx, ep->xfer_buff, (uint8_t)epnum, (uint16_t)len, 8002ade: 68fb ldr r3, [r7, #12] 8002ae0: 68d9 ldr r1, [r3, #12] 8002ae2: 683b ldr r3, [r7, #0] 8002ae4: b2da uxtb r2, r3 8002ae6: 69fb ldr r3, [r7, #28] 8002ae8: b298 uxth r0, r3 (uint8_t)hpcd->Init.dma_enable); 8002aea: 687b ldr r3, [r7, #4] 8002aec: 799b ldrb r3, [r3, #6] (void)USB_WritePacket(USBx, ep->xfer_buff, (uint8_t)epnum, (uint16_t)len, 8002aee: 9300 str r3, [sp, #0] 8002af0: 4603 mov r3, r0 8002af2: 6978 ldr r0, [r7, #20] 8002af4: f003 f9fe bl 8005ef4 ep->xfer_buff += len; 8002af8: 68fb ldr r3, [r7, #12] 8002afa: 68da ldr r2, [r3, #12] 8002afc: 69fb ldr r3, [r7, #28] 8002afe: 441a add r2, r3 8002b00: 68fb ldr r3, [r7, #12] 8002b02: 60da str r2, [r3, #12] ep->xfer_count += len; 8002b04: 68fb ldr r3, [r7, #12] 8002b06: 695a ldr r2, [r3, #20] 8002b08: 69fb ldr r3, [r7, #28] 8002b0a: 441a add r2, r3 8002b0c: 68fb ldr r3, [r7, #12] 8002b0e: 615a str r2, [r3, #20] while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) && 8002b10: 683b ldr r3, [r7, #0] 8002b12: 015a lsls r2, r3, #5 8002b14: 693b ldr r3, [r7, #16] 8002b16: 4413 add r3, r2 8002b18: f503 6310 add.w r3, r3, #2304 @ 0x900 8002b1c: 699b ldr r3, [r3, #24] 8002b1e: b29b uxth r3, r3 (ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U)) 8002b20: 69ba ldr r2, [r7, #24] 8002b22: 429a cmp r2, r3 8002b24: d809 bhi.n 8002b3a 8002b26: 68fb ldr r3, [r7, #12] 8002b28: 695a ldr r2, [r3, #20] 8002b2a: 68fb ldr r3, [r7, #12] 8002b2c: 691b ldr r3, [r3, #16] while (((USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) >= len32b) && 8002b2e: 429a cmp r2, r3 8002b30: d203 bcs.n 8002b3a (ep->xfer_count < ep->xfer_len) && (ep->xfer_len != 0U)) 8002b32: 68fb ldr r3, [r7, #12] 8002b34: 691b ldr r3, [r3, #16] 8002b36: 2b00 cmp r3, #0 8002b38: d1bf bne.n 8002aba } if (ep->xfer_len <= ep->xfer_count) 8002b3a: 68fb ldr r3, [r7, #12] 8002b3c: 691a ldr r2, [r3, #16] 8002b3e: 68fb ldr r3, [r7, #12] 8002b40: 695b ldr r3, [r3, #20] 8002b42: 429a cmp r2, r3 8002b44: d811 bhi.n 8002b6a { fifoemptymsk = (uint32_t)(0x1UL << (epnum & EP_ADDR_MSK)); 8002b46: 683b ldr r3, [r7, #0] 8002b48: f003 030f and.w r3, r3, #15 8002b4c: 2201 movs r2, #1 8002b4e: fa02 f303 lsl.w r3, r2, r3 8002b52: 60bb str r3, [r7, #8] USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk; 8002b54: 693b ldr r3, [r7, #16] 8002b56: f503 6300 add.w r3, r3, #2048 @ 0x800 8002b5a: 6b5a ldr r2, [r3, #52] @ 0x34 8002b5c: 68bb ldr r3, [r7, #8] 8002b5e: 43db mvns r3, r3 8002b60: 6939 ldr r1, [r7, #16] 8002b62: f501 6100 add.w r1, r1, #2048 @ 0x800 8002b66: 4013 ands r3, r2 8002b68: 634b str r3, [r1, #52] @ 0x34 } return HAL_OK; 8002b6a: 2300 movs r3, #0 } 8002b6c: 4618 mov r0, r3 8002b6e: 3720 adds r7, #32 8002b70: 46bd mov sp, r7 8002b72: bd80 pop {r7, pc} 08002b74 : * @param hpcd PCD handle * @param epnum endpoint number * @retval HAL status */ static HAL_StatusTypeDef PCD_EP_OutXfrComplete_int(PCD_HandleTypeDef *hpcd, uint32_t epnum) { 8002b74: b580 push {r7, lr} 8002b76: b088 sub sp, #32 8002b78: af00 add r7, sp, #0 8002b7a: 6078 str r0, [r7, #4] 8002b7c: 6039 str r1, [r7, #0] USB_OTG_EPTypeDef *ep; const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 8002b7e: 687b ldr r3, [r7, #4] 8002b80: 681b ldr r3, [r3, #0] 8002b82: 61fb str r3, [r7, #28] uint32_t USBx_BASE = (uint32_t)USBx; 8002b84: 69fb ldr r3, [r7, #28] 8002b86: 61bb str r3, [r7, #24] uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U); 8002b88: 69fb ldr r3, [r7, #28] 8002b8a: 333c adds r3, #60 @ 0x3c 8002b8c: 3304 adds r3, #4 8002b8e: 681b ldr r3, [r3, #0] 8002b90: 617b str r3, [r7, #20] uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT; 8002b92: 683b ldr r3, [r7, #0] 8002b94: 015a lsls r2, r3, #5 8002b96: 69bb ldr r3, [r7, #24] 8002b98: 4413 add r3, r2 8002b9a: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002b9e: 689b ldr r3, [r3, #8] 8002ba0: 613b str r3, [r7, #16] if (hpcd->Init.dma_enable == 1U) 8002ba2: 687b ldr r3, [r7, #4] 8002ba4: 799b ldrb r3, [r3, #6] 8002ba6: 2b01 cmp r3, #1 8002ba8: d17b bne.n 8002ca2 { if ((DoepintReg & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) /* Class C */ 8002baa: 693b ldr r3, [r7, #16] 8002bac: f003 0308 and.w r3, r3, #8 8002bb0: 2b00 cmp r3, #0 8002bb2: d015 beq.n 8002be0 { /* StupPktRcvd = 1 this is a setup packet */ if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 8002bb4: 697b ldr r3, [r7, #20] 8002bb6: 4a61 ldr r2, [pc, #388] @ (8002d3c ) 8002bb8: 4293 cmp r3, r2 8002bba: f240 80b9 bls.w 8002d30 ((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX)) 8002bbe: 693b ldr r3, [r7, #16] 8002bc0: f403 4300 and.w r3, r3, #32768 @ 0x8000 if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 8002bc4: 2b00 cmp r3, #0 8002bc6: f000 80b3 beq.w 8002d30 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX); 8002bca: 683b ldr r3, [r7, #0] 8002bcc: 015a lsls r2, r3, #5 8002bce: 69bb ldr r3, [r7, #24] 8002bd0: 4413 add r3, r2 8002bd2: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002bd6: 461a mov r2, r3 8002bd8: f44f 4300 mov.w r3, #32768 @ 0x8000 8002bdc: 6093 str r3, [r2, #8] 8002bde: e0a7 b.n 8002d30 } } else if ((DoepintReg & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR) /* Class E */ 8002be0: 693b ldr r3, [r7, #16] 8002be2: f003 0320 and.w r3, r3, #32 8002be6: 2b00 cmp r3, #0 8002be8: d009 beq.n 8002bfe { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR); 8002bea: 683b ldr r3, [r7, #0] 8002bec: 015a lsls r2, r3, #5 8002bee: 69bb ldr r3, [r7, #24] 8002bf0: 4413 add r3, r2 8002bf2: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002bf6: 461a mov r2, r3 8002bf8: 2320 movs r3, #32 8002bfa: 6093 str r3, [r2, #8] 8002bfc: e098 b.n 8002d30 } else if ((DoepintReg & (USB_OTG_DOEPINT_STUP | USB_OTG_DOEPINT_OTEPSPR)) == 0U) 8002bfe: 693b ldr r3, [r7, #16] 8002c00: f003 0328 and.w r3, r3, #40 @ 0x28 8002c04: 2b00 cmp r3, #0 8002c06: f040 8093 bne.w 8002d30 { /* StupPktRcvd = 1 this is a setup packet */ if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 8002c0a: 697b ldr r3, [r7, #20] 8002c0c: 4a4b ldr r2, [pc, #300] @ (8002d3c ) 8002c0e: 4293 cmp r3, r2 8002c10: d90f bls.n 8002c32 ((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX)) 8002c12: 693b ldr r3, [r7, #16] 8002c14: f403 4300 and.w r3, r3, #32768 @ 0x8000 if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 8002c18: 2b00 cmp r3, #0 8002c1a: d00a beq.n 8002c32 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX); 8002c1c: 683b ldr r3, [r7, #0] 8002c1e: 015a lsls r2, r3, #5 8002c20: 69bb ldr r3, [r7, #24] 8002c22: 4413 add r3, r2 8002c24: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002c28: 461a mov r2, r3 8002c2a: f44f 4300 mov.w r3, #32768 @ 0x8000 8002c2e: 6093 str r3, [r2, #8] 8002c30: e07e b.n 8002d30 } else { ep = &hpcd->OUT_ep[epnum]; 8002c32: 683a ldr r2, [r7, #0] 8002c34: 4613 mov r3, r2 8002c36: 00db lsls r3, r3, #3 8002c38: 4413 add r3, r2 8002c3a: 009b lsls r3, r3, #2 8002c3c: f503 7314 add.w r3, r3, #592 @ 0x250 8002c40: 687a ldr r2, [r7, #4] 8002c42: 4413 add r3, r2 8002c44: 3304 adds r3, #4 8002c46: 60fb str r3, [r7, #12] /* out data packet received over EP */ ep->xfer_count = ep->xfer_size - (USBx_OUTEP(epnum)->DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ); 8002c48: 68fb ldr r3, [r7, #12] 8002c4a: 6a1a ldr r2, [r3, #32] 8002c4c: 683b ldr r3, [r7, #0] 8002c4e: 0159 lsls r1, r3, #5 8002c50: 69bb ldr r3, [r7, #24] 8002c52: 440b add r3, r1 8002c54: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002c58: 691b ldr r3, [r3, #16] 8002c5a: f3c3 0312 ubfx r3, r3, #0, #19 8002c5e: 1ad2 subs r2, r2, r3 8002c60: 68fb ldr r3, [r7, #12] 8002c62: 615a str r2, [r3, #20] if (epnum == 0U) 8002c64: 683b ldr r3, [r7, #0] 8002c66: 2b00 cmp r3, #0 8002c68: d114 bne.n 8002c94 { if (ep->xfer_len == 0U) 8002c6a: 68fb ldr r3, [r7, #12] 8002c6c: 691b ldr r3, [r3, #16] 8002c6e: 2b00 cmp r3, #0 8002c70: d109 bne.n 8002c86 { /* this is ZLP, so prepare EP0 for next setup */ (void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup); 8002c72: 687b ldr r3, [r7, #4] 8002c74: 6818 ldr r0, [r3, #0] 8002c76: 687b ldr r3, [r7, #4] 8002c78: f203 439c addw r3, r3, #1180 @ 0x49c 8002c7c: 461a mov r2, r3 8002c7e: 2101 movs r1, #1 8002c80: f003 fbce bl 8006420 8002c84: e006 b.n 8002c94 } else { ep->xfer_buff += ep->xfer_count; 8002c86: 68fb ldr r3, [r7, #12] 8002c88: 68da ldr r2, [r3, #12] 8002c8a: 68fb ldr r3, [r7, #12] 8002c8c: 695b ldr r3, [r3, #20] 8002c8e: 441a add r2, r3 8002c90: 68fb ldr r3, [r7, #12] 8002c92: 60da str r2, [r3, #12] } #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum); 8002c94: 683b ldr r3, [r7, #0] 8002c96: b2db uxtb r3, r3 8002c98: 4619 mov r1, r3 8002c9a: 6878 ldr r0, [r7, #4] 8002c9c: f005 fb9c bl 80083d8 8002ca0: e046 b.n 8002d30 /* ... */ } } else { if (gSNPSiD == USB_OTG_CORE_ID_310A) 8002ca2: 697b ldr r3, [r7, #20] 8002ca4: 4a26 ldr r2, [pc, #152] @ (8002d40 ) 8002ca6: 4293 cmp r3, r2 8002ca8: d124 bne.n 8002cf4 { /* StupPktRcvd = 1 this is a setup packet */ if ((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX) 8002caa: 693b ldr r3, [r7, #16] 8002cac: f403 4300 and.w r3, r3, #32768 @ 0x8000 8002cb0: 2b00 cmp r3, #0 8002cb2: d00a beq.n 8002cca { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX); 8002cb4: 683b ldr r3, [r7, #0] 8002cb6: 015a lsls r2, r3, #5 8002cb8: 69bb ldr r3, [r7, #24] 8002cba: 4413 add r3, r2 8002cbc: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002cc0: 461a mov r2, r3 8002cc2: f44f 4300 mov.w r3, #32768 @ 0x8000 8002cc6: 6093 str r3, [r2, #8] 8002cc8: e032 b.n 8002d30 } else { if ((DoepintReg & USB_OTG_DOEPINT_OTEPSPR) == USB_OTG_DOEPINT_OTEPSPR) 8002cca: 693b ldr r3, [r7, #16] 8002ccc: f003 0320 and.w r3, r3, #32 8002cd0: 2b00 cmp r3, #0 8002cd2: d008 beq.n 8002ce6 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPSPR); 8002cd4: 683b ldr r3, [r7, #0] 8002cd6: 015a lsls r2, r3, #5 8002cd8: 69bb ldr r3, [r7, #24] 8002cda: 4413 add r3, r2 8002cdc: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002ce0: 461a mov r2, r3 8002ce2: 2320 movs r3, #32 8002ce4: 6093 str r3, [r2, #8] } #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum); 8002ce6: 683b ldr r3, [r7, #0] 8002ce8: b2db uxtb r3, r3 8002cea: 4619 mov r1, r3 8002cec: 6878 ldr r0, [r7, #4] 8002cee: f005 fb73 bl 80083d8 8002cf2: e01d b.n 8002d30 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } } else { if ((epnum == 0U) && (hpcd->OUT_ep[epnum].xfer_len == 0U)) 8002cf4: 683b ldr r3, [r7, #0] 8002cf6: 2b00 cmp r3, #0 8002cf8: d114 bne.n 8002d24 8002cfa: 6879 ldr r1, [r7, #4] 8002cfc: 683a ldr r2, [r7, #0] 8002cfe: 4613 mov r3, r2 8002d00: 00db lsls r3, r3, #3 8002d02: 4413 add r3, r2 8002d04: 009b lsls r3, r3, #2 8002d06: 440b add r3, r1 8002d08: f503 7319 add.w r3, r3, #612 @ 0x264 8002d0c: 681b ldr r3, [r3, #0] 8002d0e: 2b00 cmp r3, #0 8002d10: d108 bne.n 8002d24 { /* this is ZLP, so prepare EP0 for next setup */ (void)USB_EP0_OutStart(hpcd->Instance, 0U, (uint8_t *)hpcd->Setup); 8002d12: 687b ldr r3, [r7, #4] 8002d14: 6818 ldr r0, [r3, #0] 8002d16: 687b ldr r3, [r7, #4] 8002d18: f203 439c addw r3, r3, #1180 @ 0x49c 8002d1c: 461a mov r2, r3 8002d1e: 2100 movs r1, #0 8002d20: f003 fb7e bl 8006420 } #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->DataOutStageCallback(hpcd, (uint8_t)epnum); #else HAL_PCD_DataOutStageCallback(hpcd, (uint8_t)epnum); 8002d24: 683b ldr r3, [r7, #0] 8002d26: b2db uxtb r3, r3 8002d28: 4619 mov r1, r3 8002d2a: 6878 ldr r0, [r7, #4] 8002d2c: f005 fb54 bl 80083d8 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ } } return HAL_OK; 8002d30: 2300 movs r3, #0 } 8002d32: 4618 mov r0, r3 8002d34: 3720 adds r7, #32 8002d36: 46bd mov sp, r7 8002d38: bd80 pop {r7, pc} 8002d3a: bf00 nop 8002d3c: 4f54300a .word 0x4f54300a 8002d40: 4f54310a .word 0x4f54310a 08002d44 : * @param hpcd PCD handle * @param epnum endpoint number * @retval HAL status */ static HAL_StatusTypeDef PCD_EP_OutSetupPacket_int(PCD_HandleTypeDef *hpcd, uint32_t epnum) { 8002d44: b580 push {r7, lr} 8002d46: b086 sub sp, #24 8002d48: af00 add r7, sp, #0 8002d4a: 6078 str r0, [r7, #4] 8002d4c: 6039 str r1, [r7, #0] const USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 8002d4e: 687b ldr r3, [r7, #4] 8002d50: 681b ldr r3, [r3, #0] 8002d52: 617b str r3, [r7, #20] uint32_t USBx_BASE = (uint32_t)USBx; 8002d54: 697b ldr r3, [r7, #20] 8002d56: 613b str r3, [r7, #16] uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U); 8002d58: 697b ldr r3, [r7, #20] 8002d5a: 333c adds r3, #60 @ 0x3c 8002d5c: 3304 adds r3, #4 8002d5e: 681b ldr r3, [r3, #0] 8002d60: 60fb str r3, [r7, #12] uint32_t DoepintReg = USBx_OUTEP(epnum)->DOEPINT; 8002d62: 683b ldr r3, [r7, #0] 8002d64: 015a lsls r2, r3, #5 8002d66: 693b ldr r3, [r7, #16] 8002d68: 4413 add r3, r2 8002d6a: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002d6e: 689b ldr r3, [r3, #8] 8002d70: 60bb str r3, [r7, #8] if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 8002d72: 68fb ldr r3, [r7, #12] 8002d74: 4a15 ldr r2, [pc, #84] @ (8002dcc ) 8002d76: 4293 cmp r3, r2 8002d78: d90e bls.n 8002d98 ((DoepintReg & USB_OTG_DOEPINT_STPKTRX) == USB_OTG_DOEPINT_STPKTRX)) 8002d7a: 68bb ldr r3, [r7, #8] 8002d7c: f403 4300 and.w r3, r3, #32768 @ 0x8000 if ((gSNPSiD > USB_OTG_CORE_ID_300A) && 8002d80: 2b00 cmp r3, #0 8002d82: d009 beq.n 8002d98 { CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STPKTRX); 8002d84: 683b ldr r3, [r7, #0] 8002d86: 015a lsls r2, r3, #5 8002d88: 693b ldr r3, [r7, #16] 8002d8a: 4413 add r3, r2 8002d8c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8002d90: 461a mov r2, r3 8002d92: f44f 4300 mov.w r3, #32768 @ 0x8000 8002d96: 6093 str r3, [r2, #8] /* Inform the upper layer that a setup packet is available */ #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) hpcd->SetupStageCallback(hpcd); #else HAL_PCD_SetupStageCallback(hpcd); 8002d98: 6878 ldr r0, [r7, #4] 8002d9a: f005 fb0b bl 80083b4 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ if ((gSNPSiD > USB_OTG_CORE_ID_300A) && (hpcd->Init.dma_enable == 1U)) 8002d9e: 68fb ldr r3, [r7, #12] 8002da0: 4a0a ldr r2, [pc, #40] @ (8002dcc ) 8002da2: 4293 cmp r3, r2 8002da4: d90c bls.n 8002dc0 8002da6: 687b ldr r3, [r7, #4] 8002da8: 799b ldrb r3, [r3, #6] 8002daa: 2b01 cmp r3, #1 8002dac: d108 bne.n 8002dc0 { (void)USB_EP0_OutStart(hpcd->Instance, 1U, (uint8_t *)hpcd->Setup); 8002dae: 687b ldr r3, [r7, #4] 8002db0: 6818 ldr r0, [r3, #0] 8002db2: 687b ldr r3, [r7, #4] 8002db4: f203 439c addw r3, r3, #1180 @ 0x49c 8002db8: 461a mov r2, r3 8002dba: 2101 movs r1, #1 8002dbc: f003 fb30 bl 8006420 } return HAL_OK; 8002dc0: 2300 movs r3, #0 } 8002dc2: 4618 mov r0, r3 8002dc4: 3718 adds r7, #24 8002dc6: 46bd mov sp, r7 8002dc8: bd80 pop {r7, pc} 8002dca: bf00 nop 8002dcc: 4f54300a .word 0x4f54300a 08002dd0 : * @param fifo The number of Tx fifo * @param size Fifo size * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size) { 8002dd0: b480 push {r7} 8002dd2: b085 sub sp, #20 8002dd4: af00 add r7, sp, #0 8002dd6: 6078 str r0, [r7, #4] 8002dd8: 460b mov r3, r1 8002dda: 70fb strb r3, [r7, #3] 8002ddc: 4613 mov r3, r2 8002dde: 803b strh r3, [r7, #0] --> Txn should be configured with the minimum space of 16 words The FIFO is used optimally when used TxFIFOs are allocated in the top of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones. When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */ Tx_Offset = hpcd->Instance->GRXFSIZ; 8002de0: 687b ldr r3, [r7, #4] 8002de2: 681b ldr r3, [r3, #0] 8002de4: 6a5b ldr r3, [r3, #36] @ 0x24 8002de6: 60bb str r3, [r7, #8] if (fifo == 0U) 8002de8: 78fb ldrb r3, [r7, #3] 8002dea: 2b00 cmp r3, #0 8002dec: d107 bne.n 8002dfe { hpcd->Instance->DIEPTXF0_HNPTXFSIZ = ((uint32_t)size << 16) | Tx_Offset; 8002dee: 883b ldrh r3, [r7, #0] 8002df0: 0419 lsls r1, r3, #16 8002df2: 687b ldr r3, [r7, #4] 8002df4: 681b ldr r3, [r3, #0] 8002df6: 68ba ldr r2, [r7, #8] 8002df8: 430a orrs r2, r1 8002dfa: 629a str r2, [r3, #40] @ 0x28 8002dfc: e028 b.n 8002e50 } else { Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16; 8002dfe: 687b ldr r3, [r7, #4] 8002e00: 681b ldr r3, [r3, #0] 8002e02: 6a9b ldr r3, [r3, #40] @ 0x28 8002e04: 0c1b lsrs r3, r3, #16 8002e06: 68ba ldr r2, [r7, #8] 8002e08: 4413 add r3, r2 8002e0a: 60bb str r3, [r7, #8] for (i = 0U; i < (fifo - 1U); i++) 8002e0c: 2300 movs r3, #0 8002e0e: 73fb strb r3, [r7, #15] 8002e10: e00d b.n 8002e2e { Tx_Offset += (hpcd->Instance->DIEPTXF[i] >> 16); 8002e12: 687b ldr r3, [r7, #4] 8002e14: 681a ldr r2, [r3, #0] 8002e16: 7bfb ldrb r3, [r7, #15] 8002e18: 3340 adds r3, #64 @ 0x40 8002e1a: 009b lsls r3, r3, #2 8002e1c: 4413 add r3, r2 8002e1e: 685b ldr r3, [r3, #4] 8002e20: 0c1b lsrs r3, r3, #16 8002e22: 68ba ldr r2, [r7, #8] 8002e24: 4413 add r3, r2 8002e26: 60bb str r3, [r7, #8] for (i = 0U; i < (fifo - 1U); i++) 8002e28: 7bfb ldrb r3, [r7, #15] 8002e2a: 3301 adds r3, #1 8002e2c: 73fb strb r3, [r7, #15] 8002e2e: 7bfa ldrb r2, [r7, #15] 8002e30: 78fb ldrb r3, [r7, #3] 8002e32: 3b01 subs r3, #1 8002e34: 429a cmp r2, r3 8002e36: d3ec bcc.n 8002e12 } /* Multiply Tx_Size by 2 to get higher performance */ hpcd->Instance->DIEPTXF[fifo - 1U] = ((uint32_t)size << 16) | Tx_Offset; 8002e38: 883b ldrh r3, [r7, #0] 8002e3a: 0418 lsls r0, r3, #16 8002e3c: 687b ldr r3, [r7, #4] 8002e3e: 6819 ldr r1, [r3, #0] 8002e40: 78fb ldrb r3, [r7, #3] 8002e42: 3b01 subs r3, #1 8002e44: 68ba ldr r2, [r7, #8] 8002e46: 4302 orrs r2, r0 8002e48: 3340 adds r3, #64 @ 0x40 8002e4a: 009b lsls r3, r3, #2 8002e4c: 440b add r3, r1 8002e4e: 605a str r2, [r3, #4] } return HAL_OK; 8002e50: 2300 movs r3, #0 } 8002e52: 4618 mov r0, r3 8002e54: 3714 adds r7, #20 8002e56: 46bd mov sp, r7 8002e58: f85d 7b04 ldr.w r7, [sp], #4 8002e5c: 4770 bx lr 08002e5e : * @param hpcd PCD handle * @param size Size of Rx fifo * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size) { 8002e5e: b480 push {r7} 8002e60: b083 sub sp, #12 8002e62: af00 add r7, sp, #0 8002e64: 6078 str r0, [r7, #4] 8002e66: 460b mov r3, r1 8002e68: 807b strh r3, [r7, #2] hpcd->Instance->GRXFSIZ = size; 8002e6a: 687b ldr r3, [r7, #4] 8002e6c: 681b ldr r3, [r3, #0] 8002e6e: 887a ldrh r2, [r7, #2] 8002e70: 625a str r2, [r3, #36] @ 0x24 return HAL_OK; 8002e72: 2300 movs r3, #0 } 8002e74: 4618 mov r0, r3 8002e76: 370c adds r7, #12 8002e78: 46bd mov sp, r7 8002e7a: f85d 7b04 ldr.w r7, [sp], #4 8002e7e: 4770 bx lr 08002e80 : * @brief Activate LPM feature. * @param hpcd PCD handle * @retval HAL status */ HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) { 8002e80: b480 push {r7} 8002e82: b085 sub sp, #20 8002e84: af00 add r7, sp, #0 8002e86: 6078 str r0, [r7, #4] USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; 8002e88: 687b ldr r3, [r7, #4] 8002e8a: 681b ldr r3, [r3, #0] 8002e8c: 60fb str r3, [r7, #12] hpcd->lpm_active = 1U; 8002e8e: 687b ldr r3, [r7, #4] 8002e90: 2201 movs r2, #1 8002e92: f8c3 24d8 str.w r2, [r3, #1240] @ 0x4d8 hpcd->LPM_State = LPM_L0; 8002e96: 687b ldr r3, [r7, #4] 8002e98: 2200 movs r2, #0 8002e9a: f883 24cc strb.w r2, [r3, #1228] @ 0x4cc USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM; 8002e9e: 68fb ldr r3, [r7, #12] 8002ea0: 699b ldr r3, [r3, #24] 8002ea2: f043 6200 orr.w r2, r3, #134217728 @ 0x8000000 8002ea6: 68fb ldr r3, [r7, #12] 8002ea8: 619a str r2, [r3, #24] USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); 8002eaa: 68fb ldr r3, [r7, #12] 8002eac: 6d5b ldr r3, [r3, #84] @ 0x54 8002eae: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8002eb2: f043 0303 orr.w r3, r3, #3 8002eb6: 68fa ldr r2, [r7, #12] 8002eb8: 6553 str r3, [r2, #84] @ 0x54 return HAL_OK; 8002eba: 2300 movs r3, #0 } 8002ebc: 4618 mov r0, r3 8002ebe: 3714 adds r7, #20 8002ec0: 46bd mov sp, r7 8002ec2: f85d 7b04 ldr.w r7, [sp], #4 8002ec6: 4770 bx lr 08002ec8 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 8002ec8: b580 push {r7, lr} 8002eca: b084 sub sp, #16 8002ecc: af00 add r7, sp, #0 8002ece: 6078 str r0, [r7, #4] 8002ed0: 6039 str r1, [r7, #0] uint32_t tickstart; /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 8002ed2: 687b ldr r3, [r7, #4] 8002ed4: 2b00 cmp r3, #0 8002ed6: d101 bne.n 8002edc { return HAL_ERROR; 8002ed8: 2301 movs r3, #1 8002eda: e0cc b.n 8003076 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 8002edc: 4b68 ldr r3, [pc, #416] @ (8003080 ) 8002ede: 681b ldr r3, [r3, #0] 8002ee0: f003 030f and.w r3, r3, #15 8002ee4: 683a ldr r2, [r7, #0] 8002ee6: 429a cmp r2, r3 8002ee8: d90c bls.n 8002f04 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8002eea: 4b65 ldr r3, [pc, #404] @ (8003080 ) 8002eec: 683a ldr r2, [r7, #0] 8002eee: b2d2 uxtb r2, r2 8002ef0: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8002ef2: 4b63 ldr r3, [pc, #396] @ (8003080 ) 8002ef4: 681b ldr r3, [r3, #0] 8002ef6: f003 030f and.w r3, r3, #15 8002efa: 683a ldr r2, [r7, #0] 8002efc: 429a cmp r2, r3 8002efe: d001 beq.n 8002f04 { return HAL_ERROR; 8002f00: 2301 movs r3, #1 8002f02: e0b8 b.n 8003076 } } /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8002f04: 687b ldr r3, [r7, #4] 8002f06: 681b ldr r3, [r3, #0] 8002f08: f003 0302 and.w r3, r3, #2 8002f0c: 2b00 cmp r3, #0 8002f0e: d020 beq.n 8002f52 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8002f10: 687b ldr r3, [r7, #4] 8002f12: 681b ldr r3, [r3, #0] 8002f14: f003 0304 and.w r3, r3, #4 8002f18: 2b00 cmp r3, #0 8002f1a: d005 beq.n 8002f28 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 8002f1c: 4b59 ldr r3, [pc, #356] @ (8003084 ) 8002f1e: 689b ldr r3, [r3, #8] 8002f20: 4a58 ldr r2, [pc, #352] @ (8003084 ) 8002f22: f443 53e0 orr.w r3, r3, #7168 @ 0x1c00 8002f26: 6093 str r3, [r2, #8] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8002f28: 687b ldr r3, [r7, #4] 8002f2a: 681b ldr r3, [r3, #0] 8002f2c: f003 0308 and.w r3, r3, #8 8002f30: 2b00 cmp r3, #0 8002f32: d005 beq.n 8002f40 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8002f34: 4b53 ldr r3, [pc, #332] @ (8003084 ) 8002f36: 689b ldr r3, [r3, #8] 8002f38: 4a52 ldr r2, [pc, #328] @ (8003084 ) 8002f3a: f443 4360 orr.w r3, r3, #57344 @ 0xe000 8002f3e: 6093 str r3, [r2, #8] } assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8002f40: 4b50 ldr r3, [pc, #320] @ (8003084 ) 8002f42: 689b ldr r3, [r3, #8] 8002f44: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8002f48: 687b ldr r3, [r7, #4] 8002f4a: 689b ldr r3, [r3, #8] 8002f4c: 494d ldr r1, [pc, #308] @ (8003084 ) 8002f4e: 4313 orrs r3, r2 8002f50: 608b str r3, [r1, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8002f52: 687b ldr r3, [r7, #4] 8002f54: 681b ldr r3, [r3, #0] 8002f56: f003 0301 and.w r3, r3, #1 8002f5a: 2b00 cmp r3, #0 8002f5c: d044 beq.n 8002fe8 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 8002f5e: 687b ldr r3, [r7, #4] 8002f60: 685b ldr r3, [r3, #4] 8002f62: 2b01 cmp r3, #1 8002f64: d107 bne.n 8002f76 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8002f66: 4b47 ldr r3, [pc, #284] @ (8003084 ) 8002f68: 681b ldr r3, [r3, #0] 8002f6a: f403 3300 and.w r3, r3, #131072 @ 0x20000 8002f6e: 2b00 cmp r3, #0 8002f70: d119 bne.n 8002fa6 { return HAL_ERROR; 8002f72: 2301 movs r3, #1 8002f74: e07f b.n 8003076 } } /* PLL is selected as System Clock Source */ else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || 8002f76: 687b ldr r3, [r7, #4] 8002f78: 685b ldr r3, [r3, #4] 8002f7a: 2b02 cmp r3, #2 8002f7c: d003 beq.n 8002f86 (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLRCLK)) 8002f7e: 687b ldr r3, [r7, #4] 8002f80: 685b ldr r3, [r3, #4] else if ((RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) || 8002f82: 2b03 cmp r3, #3 8002f84: d107 bne.n 8002f96 { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8002f86: 4b3f ldr r3, [pc, #252] @ (8003084 ) 8002f88: 681b ldr r3, [r3, #0] 8002f8a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8002f8e: 2b00 cmp r3, #0 8002f90: d109 bne.n 8002fa6 { return HAL_ERROR; 8002f92: 2301 movs r3, #1 8002f94: e06f b.n 8003076 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8002f96: 4b3b ldr r3, [pc, #236] @ (8003084 ) 8002f98: 681b ldr r3, [r3, #0] 8002f9a: f003 0302 and.w r3, r3, #2 8002f9e: 2b00 cmp r3, #0 8002fa0: d101 bne.n 8002fa6 { return HAL_ERROR; 8002fa2: 2301 movs r3, #1 8002fa4: e067 b.n 8003076 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 8002fa6: 4b37 ldr r3, [pc, #220] @ (8003084 ) 8002fa8: 689b ldr r3, [r3, #8] 8002faa: f023 0203 bic.w r2, r3, #3 8002fae: 687b ldr r3, [r7, #4] 8002fb0: 685b ldr r3, [r3, #4] 8002fb2: 4934 ldr r1, [pc, #208] @ (8003084 ) 8002fb4: 4313 orrs r3, r2 8002fb6: 608b str r3, [r1, #8] /* Get Start Tick */ tickstart = HAL_GetTick(); 8002fb8: f7fe f8cc bl 8001154 8002fbc: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8002fbe: e00a b.n 8002fd6 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 8002fc0: f7fe f8c8 bl 8001154 8002fc4: 4602 mov r2, r0 8002fc6: 68fb ldr r3, [r7, #12] 8002fc8: 1ad3 subs r3, r2, r3 8002fca: f241 3288 movw r2, #5000 @ 0x1388 8002fce: 4293 cmp r3, r2 8002fd0: d901 bls.n 8002fd6 { return HAL_TIMEOUT; 8002fd2: 2303 movs r3, #3 8002fd4: e04f b.n 8003076 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 8002fd6: 4b2b ldr r3, [pc, #172] @ (8003084 ) 8002fd8: 689b ldr r3, [r3, #8] 8002fda: f003 020c and.w r2, r3, #12 8002fde: 687b ldr r3, [r7, #4] 8002fe0: 685b ldr r3, [r3, #4] 8002fe2: 009b lsls r3, r3, #2 8002fe4: 429a cmp r2, r3 8002fe6: d1eb bne.n 8002fc0 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 8002fe8: 4b25 ldr r3, [pc, #148] @ (8003080 ) 8002fea: 681b ldr r3, [r3, #0] 8002fec: f003 030f and.w r3, r3, #15 8002ff0: 683a ldr r2, [r7, #0] 8002ff2: 429a cmp r2, r3 8002ff4: d20c bcs.n 8003010 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 8002ff6: 4b22 ldr r3, [pc, #136] @ (8003080 ) 8002ff8: 683a ldr r2, [r7, #0] 8002ffa: b2d2 uxtb r2, r2 8002ffc: 701a strb r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 8002ffe: 4b20 ldr r3, [pc, #128] @ (8003080 ) 8003000: 681b ldr r3, [r3, #0] 8003002: f003 030f and.w r3, r3, #15 8003006: 683a ldr r2, [r7, #0] 8003008: 429a cmp r2, r3 800300a: d001 beq.n 8003010 { return HAL_ERROR; 800300c: 2301 movs r3, #1 800300e: e032 b.n 8003076 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8003010: 687b ldr r3, [r7, #4] 8003012: 681b ldr r3, [r3, #0] 8003014: f003 0304 and.w r3, r3, #4 8003018: 2b00 cmp r3, #0 800301a: d008 beq.n 800302e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 800301c: 4b19 ldr r3, [pc, #100] @ (8003084 ) 800301e: 689b ldr r3, [r3, #8] 8003020: f423 52e0 bic.w r2, r3, #7168 @ 0x1c00 8003024: 687b ldr r3, [r7, #4] 8003026: 68db ldr r3, [r3, #12] 8003028: 4916 ldr r1, [pc, #88] @ (8003084 ) 800302a: 4313 orrs r3, r2 800302c: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 800302e: 687b ldr r3, [r7, #4] 8003030: 681b ldr r3, [r3, #0] 8003032: f003 0308 and.w r3, r3, #8 8003036: 2b00 cmp r3, #0 8003038: d009 beq.n 800304e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3U)); 800303a: 4b12 ldr r3, [pc, #72] @ (8003084 ) 800303c: 689b ldr r3, [r3, #8] 800303e: f423 4260 bic.w r2, r3, #57344 @ 0xe000 8003042: 687b ldr r3, [r7, #4] 8003044: 691b ldr r3, [r3, #16] 8003046: 00db lsls r3, r3, #3 8003048: 490e ldr r1, [pc, #56] @ (8003084 ) 800304a: 4313 orrs r3, r2 800304c: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 800304e: f000 fb7f bl 8003750 8003052: 4602 mov r2, r0 8003054: 4b0b ldr r3, [pc, #44] @ (8003084 ) 8003056: 689b ldr r3, [r3, #8] 8003058: 091b lsrs r3, r3, #4 800305a: f003 030f and.w r3, r3, #15 800305e: 490a ldr r1, [pc, #40] @ (8003088 ) 8003060: 5ccb ldrb r3, [r1, r3] 8003062: fa22 f303 lsr.w r3, r2, r3 8003066: 4a09 ldr r2, [pc, #36] @ (800308c ) 8003068: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings */ HAL_InitTick(uwTickPrio); 800306a: 4b09 ldr r3, [pc, #36] @ (8003090 ) 800306c: 681b ldr r3, [r3, #0] 800306e: 4618 mov r0, r3 8003070: f7fe f82c bl 80010cc return HAL_OK; 8003074: 2300 movs r3, #0 } 8003076: 4618 mov r0, r3 8003078: 3710 adds r7, #16 800307a: 46bd mov sp, r7 800307c: bd80 pop {r7, pc} 800307e: bf00 nop 8003080: 40023c00 .word 0x40023c00 8003084: 40023800 .word 0x40023800 8003088: 08008a58 .word 0x08008a58 800308c: 20000000 .word 0x20000000 8003090: 20000004 .word 0x20000004 08003094 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 8003094: b480 push {r7} 8003096: af00 add r7, sp, #0 return SystemCoreClock; 8003098: 4b03 ldr r3, [pc, #12] @ (80030a8 ) 800309a: 681b ldr r3, [r3, #0] } 800309c: 4618 mov r0, r3 800309e: 46bd mov sp, r7 80030a0: f85d 7b04 ldr.w r7, [sp], #4 80030a4: 4770 bx lr 80030a6: bf00 nop 80030a8: 20000000 .word 0x20000000 080030ac : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 80030ac: b580 push {r7, lr} 80030ae: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 80030b0: f7ff fff0 bl 8003094 80030b4: 4602 mov r2, r0 80030b6: 4b05 ldr r3, [pc, #20] @ (80030cc ) 80030b8: 689b ldr r3, [r3, #8] 80030ba: 0a9b lsrs r3, r3, #10 80030bc: f003 0307 and.w r3, r3, #7 80030c0: 4903 ldr r1, [pc, #12] @ (80030d0 ) 80030c2: 5ccb ldrb r3, [r1, r3] 80030c4: fa22 f303 lsr.w r3, r2, r3 } 80030c8: 4618 mov r0, r3 80030ca: bd80 pop {r7, pc} 80030cc: 40023800 .word 0x40023800 80030d0: 08008a68 .word 0x08008a68 080030d4 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 80030d4: b580 push {r7, lr} 80030d6: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 80030d8: f7ff ffdc bl 8003094 80030dc: 4602 mov r2, r0 80030de: 4b05 ldr r3, [pc, #20] @ (80030f4 ) 80030e0: 689b ldr r3, [r3, #8] 80030e2: 0b5b lsrs r3, r3, #13 80030e4: f003 0307 and.w r3, r3, #7 80030e8: 4903 ldr r1, [pc, #12] @ (80030f8 ) 80030ea: 5ccb ldrb r3, [r1, r3] 80030ec: fa22 f303 lsr.w r3, r2, r3 } 80030f0: 4618 mov r0, r3 80030f2: bd80 pop {r7, pc} 80030f4: 40023800 .word 0x40023800 80030f8: 08008a68 .word 0x08008a68 080030fc : * the backup registers) and RCC_BDCR register are set to their reset values. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 80030fc: b580 push {r7, lr} 80030fe: b08c sub sp, #48 @ 0x30 8003100: af00 add r7, sp, #0 8003102: 6078 str r0, [r7, #4] uint32_t tickstart = 0U; 8003104: 2300 movs r3, #0 8003106: 627b str r3, [r7, #36] @ 0x24 uint32_t tmpreg1 = 0U; 8003108: 2300 movs r3, #0 800310a: 623b str r3, [r7, #32] uint32_t plli2sp = 0U; 800310c: 2300 movs r3, #0 800310e: 61fb str r3, [r7, #28] uint32_t plli2sq = 0U; 8003110: 2300 movs r3, #0 8003112: 61bb str r3, [r7, #24] uint32_t plli2sr = 0U; 8003114: 2300 movs r3, #0 8003116: 617b str r3, [r7, #20] uint32_t pllsaip = 0U; 8003118: 2300 movs r3, #0 800311a: 613b str r3, [r7, #16] uint32_t pllsaiq = 0U; 800311c: 2300 movs r3, #0 800311e: 60fb str r3, [r7, #12] uint32_t plli2sused = 0U; 8003120: 2300 movs r3, #0 8003122: 62fb str r3, [r7, #44] @ 0x2c uint32_t pllsaiused = 0U; 8003124: 2300 movs r3, #0 8003126: 62bb str r3, [r7, #40] @ 0x28 /* Check the peripheral clock selection parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------ I2S APB1 configuration --------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == (RCC_PERIPHCLK_I2S_APB1)) 8003128: 687b ldr r3, [r7, #4] 800312a: 681b ldr r3, [r3, #0] 800312c: f003 0301 and.w r3, r3, #1 8003130: 2b00 cmp r3, #0 8003132: d010 beq.n 8003156 { /* Check the parameters */ assert_param(IS_RCC_I2SAPB1CLKSOURCE(PeriphClkInit->I2sApb1ClockSelection)); /* Configure I2S Clock source */ __HAL_RCC_I2S_APB1_CONFIG(PeriphClkInit->I2sApb1ClockSelection); 8003134: 4b6f ldr r3, [pc, #444] @ (80032f4 ) 8003136: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 800313a: f023 62c0 bic.w r2, r3, #100663296 @ 0x6000000 800313e: 687b ldr r3, [r7, #4] 8003140: 6b9b ldr r3, [r3, #56] @ 0x38 8003142: 496c ldr r1, [pc, #432] @ (80032f4 ) 8003144: 4313 orrs r3, r2 8003146: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for I2S */ if (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S) 800314a: 687b ldr r3, [r7, #4] 800314c: 6b9b ldr r3, [r3, #56] @ 0x38 800314e: 2b00 cmp r3, #0 8003150: d101 bne.n 8003156 { plli2sused = 1U; 8003152: 2301 movs r3, #1 8003154: 62fb str r3, [r7, #44] @ 0x2c } } /*--------------------------------------------------------------------------*/ /*---------------------------- I2S APB2 configuration ----------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == (RCC_PERIPHCLK_I2S_APB2)) 8003156: 687b ldr r3, [r7, #4] 8003158: 681b ldr r3, [r3, #0] 800315a: f003 0302 and.w r3, r3, #2 800315e: 2b00 cmp r3, #0 8003160: d010 beq.n 8003184 { /* Check the parameters */ assert_param(IS_RCC_I2SAPB2CLKSOURCE(PeriphClkInit->I2sApb2ClockSelection)); /* Configure I2S Clock source */ __HAL_RCC_I2S_APB2_CONFIG(PeriphClkInit->I2sApb2ClockSelection); 8003162: 4b64 ldr r3, [pc, #400] @ (80032f4 ) 8003164: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8003168: f023 52c0 bic.w r2, r3, #402653184 @ 0x18000000 800316c: 687b ldr r3, [r7, #4] 800316e: 6bdb ldr r3, [r3, #60] @ 0x3c 8003170: 4960 ldr r1, [pc, #384] @ (80032f4 ) 8003172: 4313 orrs r3, r2 8003174: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for I2S */ if (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S) 8003178: 687b ldr r3, [r7, #4] 800317a: 6bdb ldr r3, [r3, #60] @ 0x3c 800317c: 2b00 cmp r3, #0 800317e: d101 bne.n 8003184 { plli2sused = 1U; 8003180: 2301 movs r3, #1 8003182: 62fb str r3, [r7, #44] @ 0x2c } } /*--------------------------------------------------------------------------*/ /*--------------------------- SAI1 configuration ---------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1)) 8003184: 687b ldr r3, [r7, #4] 8003186: 681b ldr r3, [r3, #0] 8003188: f003 0304 and.w r3, r3, #4 800318c: 2b00 cmp r3, #0 800318e: d017 beq.n 80031c0 { /* Check the parameters */ assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection)); /* Configure SAI1 Clock source */ __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); 8003190: 4b58 ldr r3, [pc, #352] @ (80032f4 ) 8003192: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8003196: f423 1240 bic.w r2, r3, #3145728 @ 0x300000 800319a: 687b ldr r3, [r7, #4] 800319c: 6b1b ldr r3, [r3, #48] @ 0x30 800319e: 4955 ldr r1, [pc, #340] @ (80032f4 ) 80031a0: 4313 orrs r3, r2 80031a2: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for SAI */ if (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S) 80031a6: 687b ldr r3, [r7, #4] 80031a8: 6b1b ldr r3, [r3, #48] @ 0x30 80031aa: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 80031ae: d101 bne.n 80031b4 { plli2sused = 1U; 80031b0: 2301 movs r3, #1 80031b2: 62fb str r3, [r7, #44] @ 0x2c } /* Enable the PLLSAI when it's used as clock source for SAI */ if (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI) 80031b4: 687b ldr r3, [r7, #4] 80031b6: 6b1b ldr r3, [r3, #48] @ 0x30 80031b8: 2b00 cmp r3, #0 80031ba: d101 bne.n 80031c0 { pllsaiused = 1U; 80031bc: 2301 movs r3, #1 80031be: 62bb str r3, [r7, #40] @ 0x28 } } /*--------------------------------------------------------------------------*/ /*-------------------------- SAI2 configuration ----------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2)) 80031c0: 687b ldr r3, [r7, #4] 80031c2: 681b ldr r3, [r3, #0] 80031c4: f003 0308 and.w r3, r3, #8 80031c8: 2b00 cmp r3, #0 80031ca: d017 beq.n 80031fc { /* Check the parameters */ assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection)); /* Configure SAI2 Clock source */ __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection); 80031cc: 4b49 ldr r3, [pc, #292] @ (80032f4 ) 80031ce: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 80031d2: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000 80031d6: 687b ldr r3, [r7, #4] 80031d8: 6b5b ldr r3, [r3, #52] @ 0x34 80031da: 4946 ldr r1, [pc, #280] @ (80032f4 ) 80031dc: 4313 orrs r3, r2 80031de: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for SAI */ if (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S) 80031e2: 687b ldr r3, [r7, #4] 80031e4: 6b5b ldr r3, [r3, #52] @ 0x34 80031e6: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 80031ea: d101 bne.n 80031f0 { plli2sused = 1U; 80031ec: 2301 movs r3, #1 80031ee: 62fb str r3, [r7, #44] @ 0x2c } /* Enable the PLLSAI when it's used as clock source for SAI */ if (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI) 80031f0: 687b ldr r3, [r7, #4] 80031f2: 6b5b ldr r3, [r3, #52] @ 0x34 80031f4: 2b00 cmp r3, #0 80031f6: d101 bne.n 80031fc { pllsaiused = 1U; 80031f8: 2301 movs r3, #1 80031fa: 62bb str r3, [r7, #40] @ 0x28 } } /*--------------------------------------------------------------------------*/ /*----------------------------- RTC configuration --------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) 80031fc: 687b ldr r3, [r7, #4] 80031fe: 681b ldr r3, [r3, #0] 8003200: f003 0320 and.w r3, r3, #32 8003204: 2b00 cmp r3, #0 8003206: f000 808a beq.w 800331e { /* Check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* Enable Power Clock*/ __HAL_RCC_PWR_CLK_ENABLE(); 800320a: 2300 movs r3, #0 800320c: 60bb str r3, [r7, #8] 800320e: 4b39 ldr r3, [pc, #228] @ (80032f4 ) 8003210: 6c1b ldr r3, [r3, #64] @ 0x40 8003212: 4a38 ldr r2, [pc, #224] @ (80032f4 ) 8003214: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8003218: 6413 str r3, [r2, #64] @ 0x40 800321a: 4b36 ldr r3, [pc, #216] @ (80032f4 ) 800321c: 6c1b ldr r3, [r3, #64] @ 0x40 800321e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003222: 60bb str r3, [r7, #8] 8003224: 68bb ldr r3, [r7, #8] /* Enable write access to Backup domain */ PWR->CR |= PWR_CR_DBP; 8003226: 4b34 ldr r3, [pc, #208] @ (80032f8 ) 8003228: 681b ldr r3, [r3, #0] 800322a: 4a33 ldr r2, [pc, #204] @ (80032f8 ) 800322c: f443 7380 orr.w r3, r3, #256 @ 0x100 8003230: 6013 str r3, [r2, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003232: f7fd ff8f bl 8001154 8003236: 6278 str r0, [r7, #36] @ 0x24 while ((PWR->CR & PWR_CR_DBP) == RESET) 8003238: e008 b.n 800324c { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 800323a: f7fd ff8b bl 8001154 800323e: 4602 mov r2, r0 8003240: 6a7b ldr r3, [r7, #36] @ 0x24 8003242: 1ad3 subs r3, r2, r3 8003244: 2b02 cmp r3, #2 8003246: d901 bls.n 800324c { return HAL_TIMEOUT; 8003248: 2303 movs r3, #3 800324a: e278 b.n 800373e while ((PWR->CR & PWR_CR_DBP) == RESET) 800324c: 4b2a ldr r3, [pc, #168] @ (80032f8 ) 800324e: 681b ldr r3, [r3, #0] 8003250: f403 7380 and.w r3, r3, #256 @ 0x100 8003254: 2b00 cmp r3, #0 8003256: d0f0 beq.n 800323a } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL); 8003258: 4b26 ldr r3, [pc, #152] @ (80032f4 ) 800325a: 6f1b ldr r3, [r3, #112] @ 0x70 800325c: f403 7340 and.w r3, r3, #768 @ 0x300 8003260: 623b str r3, [r7, #32] if ((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8003262: 6a3b ldr r3, [r7, #32] 8003264: 2b00 cmp r3, #0 8003266: d02f beq.n 80032c8 8003268: 687b ldr r3, [r7, #4] 800326a: 6c1b ldr r3, [r3, #64] @ 0x40 800326c: f403 7340 and.w r3, r3, #768 @ 0x300 8003270: 6a3a ldr r2, [r7, #32] 8003272: 429a cmp r2, r3 8003274: d028 beq.n 80032c8 { /* Store the content of BDCR register before the reset of Backup Domain */ tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8003276: 4b1f ldr r3, [pc, #124] @ (80032f4 ) 8003278: 6f1b ldr r3, [r3, #112] @ 0x70 800327a: f423 7340 bic.w r3, r3, #768 @ 0x300 800327e: 623b str r3, [r7, #32] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8003280: 4b1e ldr r3, [pc, #120] @ (80032fc ) 8003282: 2201 movs r2, #1 8003284: 601a str r2, [r3, #0] __HAL_RCC_BACKUPRESET_RELEASE(); 8003286: 4b1d ldr r3, [pc, #116] @ (80032fc ) 8003288: 2200 movs r2, #0 800328a: 601a str r2, [r3, #0] /* Restore the Content of BDCR register */ RCC->BDCR = tmpreg1; 800328c: 4a19 ldr r2, [pc, #100] @ (80032f4 ) 800328e: 6a3b ldr r3, [r7, #32] 8003290: 6713 str r3, [r2, #112] @ 0x70 /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON)) 8003292: 4b18 ldr r3, [pc, #96] @ (80032f4 ) 8003294: 6f1b ldr r3, [r3, #112] @ 0x70 8003296: f003 0301 and.w r3, r3, #1 800329a: 2b01 cmp r3, #1 800329c: d114 bne.n 80032c8 { /* Get tick */ tickstart = HAL_GetTick(); 800329e: f7fd ff59 bl 8001154 80032a2: 6278 str r0, [r7, #36] @ 0x24 /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80032a4: e00a b.n 80032bc { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80032a6: f7fd ff55 bl 8001154 80032aa: 4602 mov r2, r0 80032ac: 6a7b ldr r3, [r7, #36] @ 0x24 80032ae: 1ad3 subs r3, r2, r3 80032b0: f241 3288 movw r2, #5000 @ 0x1388 80032b4: 4293 cmp r3, r2 80032b6: d901 bls.n 80032bc { return HAL_TIMEOUT; 80032b8: 2303 movs r3, #3 80032ba: e240 b.n 800373e while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80032bc: 4b0d ldr r3, [pc, #52] @ (80032f4 ) 80032be: 6f1b ldr r3, [r3, #112] @ 0x70 80032c0: f003 0302 and.w r3, r3, #2 80032c4: 2b00 cmp r3, #0 80032c6: d0ee beq.n 80032a6 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 80032c8: 687b ldr r3, [r7, #4] 80032ca: 6c1b ldr r3, [r3, #64] @ 0x40 80032cc: f403 7340 and.w r3, r3, #768 @ 0x300 80032d0: f5b3 7f40 cmp.w r3, #768 @ 0x300 80032d4: d114 bne.n 8003300 80032d6: 4b07 ldr r3, [pc, #28] @ (80032f4 ) 80032d8: 689b ldr r3, [r3, #8] 80032da: f423 12f8 bic.w r2, r3, #2031616 @ 0x1f0000 80032de: 687b ldr r3, [r7, #4] 80032e0: 6c1b ldr r3, [r3, #64] @ 0x40 80032e2: f023 4370 bic.w r3, r3, #4026531840 @ 0xf0000000 80032e6: f423 7340 bic.w r3, r3, #768 @ 0x300 80032ea: 4902 ldr r1, [pc, #8] @ (80032f4 ) 80032ec: 4313 orrs r3, r2 80032ee: 608b str r3, [r1, #8] 80032f0: e00c b.n 800330c 80032f2: bf00 nop 80032f4: 40023800 .word 0x40023800 80032f8: 40007000 .word 0x40007000 80032fc: 42470e40 .word 0x42470e40 8003300: 4b4a ldr r3, [pc, #296] @ (800342c ) 8003302: 689b ldr r3, [r3, #8] 8003304: 4a49 ldr r2, [pc, #292] @ (800342c ) 8003306: f423 13f8 bic.w r3, r3, #2031616 @ 0x1f0000 800330a: 6093 str r3, [r2, #8] 800330c: 4b47 ldr r3, [pc, #284] @ (800342c ) 800330e: 6f1a ldr r2, [r3, #112] @ 0x70 8003310: 687b ldr r3, [r7, #4] 8003312: 6c1b ldr r3, [r3, #64] @ 0x40 8003314: f3c3 030b ubfx r3, r3, #0, #12 8003318: 4944 ldr r1, [pc, #272] @ (800342c ) 800331a: 4313 orrs r3, r2 800331c: 670b str r3, [r1, #112] @ 0x70 } /*--------------------------------------------------------------------------*/ /*---------------------------- TIM configuration ---------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM)) 800331e: 687b ldr r3, [r7, #4] 8003320: 681b ldr r3, [r3, #0] 8003322: f003 0310 and.w r3, r3, #16 8003326: 2b00 cmp r3, #0 8003328: d004 beq.n 8003334 { /* Configure Timer Prescaler */ __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection); 800332a: 687b ldr r3, [r7, #4] 800332c: f893 2058 ldrb.w r2, [r3, #88] @ 0x58 8003330: 4b3f ldr r3, [pc, #252] @ (8003430 ) 8003332: 601a str r2, [r3, #0] } /*--------------------------------------------------------------------------*/ /*---------------------------- FMPI2C1 Configuration -----------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_FMPI2C1) == RCC_PERIPHCLK_FMPI2C1) 8003334: 687b ldr r3, [r7, #4] 8003336: 681b ldr r3, [r3, #0] 8003338: f003 0380 and.w r3, r3, #128 @ 0x80 800333c: 2b00 cmp r3, #0 800333e: d00a beq.n 8003356 { /* Check the parameters */ assert_param(IS_RCC_FMPI2C1CLKSOURCE(PeriphClkInit->Fmpi2c1ClockSelection)); /* Configure the FMPI2C1 clock source */ __HAL_RCC_FMPI2C1_CONFIG(PeriphClkInit->Fmpi2c1ClockSelection); 8003340: 4b3a ldr r3, [pc, #232] @ (800342c ) 8003342: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8003346: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000 800334a: 687b ldr r3, [r7, #4] 800334c: 6cdb ldr r3, [r3, #76] @ 0x4c 800334e: 4937 ldr r1, [pc, #220] @ (800342c ) 8003350: 4313 orrs r3, r2 8003352: f8c1 3094 str.w r3, [r1, #148] @ 0x94 } /*--------------------------------------------------------------------------*/ /*------------------------------ CEC Configuration -------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) 8003356: 687b ldr r3, [r7, #4] 8003358: 681b ldr r3, [r3, #0] 800335a: f003 0340 and.w r3, r3, #64 @ 0x40 800335e: 2b00 cmp r3, #0 8003360: d00a beq.n 8003378 { /* Check the parameters */ assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); /* Configure the CEC clock source */ __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); 8003362: 4b32 ldr r3, [pc, #200] @ (800342c ) 8003364: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 8003368: f023 6280 bic.w r2, r3, #67108864 @ 0x4000000 800336c: 687b ldr r3, [r7, #4] 800336e: 6c9b ldr r3, [r3, #72] @ 0x48 8003370: 492e ldr r1, [pc, #184] @ (800342c ) 8003372: 4313 orrs r3, r2 8003374: f8c1 3094 str.w r3, [r1, #148] @ 0x94 } /*--------------------------------------------------------------------------*/ /*----------------------------- CLK48 Configuration ------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) 8003378: 687b ldr r3, [r7, #4] 800337a: 681b ldr r3, [r3, #0] 800337c: f403 7380 and.w r3, r3, #256 @ 0x100 8003380: 2b00 cmp r3, #0 8003382: d011 beq.n 80033a8 { /* Check the parameters */ assert_param(IS_RCC_CLK48CLKSOURCE(PeriphClkInit->Clk48ClockSelection)); /* Configure the CLK48 clock source */ __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection); 8003384: 4b29 ldr r3, [pc, #164] @ (800342c ) 8003386: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 800338a: f023 6200 bic.w r2, r3, #134217728 @ 0x8000000 800338e: 687b ldr r3, [r7, #4] 8003390: 6d5b ldr r3, [r3, #84] @ 0x54 8003392: 4926 ldr r1, [pc, #152] @ (800342c ) 8003394: 4313 orrs r3, r2 8003396: f8c1 3094 str.w r3, [r1, #148] @ 0x94 /* Enable the PLLSAI when it's used as clock source for CLK48 */ if (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP) 800339a: 687b ldr r3, [r7, #4] 800339c: 6d5b ldr r3, [r3, #84] @ 0x54 800339e: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 80033a2: d101 bne.n 80033a8 { pllsaiused = 1U; 80033a4: 2301 movs r3, #1 80033a6: 62bb str r3, [r7, #40] @ 0x28 } } /*--------------------------------------------------------------------------*/ /*----------------------------- SDIO Configuration -------------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDIO) == RCC_PERIPHCLK_SDIO) 80033a8: 687b ldr r3, [r7, #4] 80033aa: 681b ldr r3, [r3, #0] 80033ac: f403 7300 and.w r3, r3, #512 @ 0x200 80033b0: 2b00 cmp r3, #0 80033b2: d00a beq.n 80033ca { /* Check the parameters */ assert_param(IS_RCC_SDIOCLKSOURCE(PeriphClkInit->SdioClockSelection)); /* Configure the SDIO clock source */ __HAL_RCC_SDIO_CONFIG(PeriphClkInit->SdioClockSelection); 80033b4: 4b1d ldr r3, [pc, #116] @ (800342c ) 80033b6: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 80033ba: f023 5280 bic.w r2, r3, #268435456 @ 0x10000000 80033be: 687b ldr r3, [r7, #4] 80033c0: 6c5b ldr r3, [r3, #68] @ 0x44 80033c2: 491a ldr r1, [pc, #104] @ (800342c ) 80033c4: 4313 orrs r3, r2 80033c6: f8c1 3094 str.w r3, [r1, #148] @ 0x94 } /*--------------------------------------------------------------------------*/ /*------------------------------ SPDIFRX Configuration ---------------------*/ if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) 80033ca: 687b ldr r3, [r7, #4] 80033cc: 681b ldr r3, [r3, #0] 80033ce: f403 6380 and.w r3, r3, #1024 @ 0x400 80033d2: 2b00 cmp r3, #0 80033d4: d011 beq.n 80033fa { /* Check the parameters */ assert_param(IS_RCC_SPDIFRXCLKSOURCE(PeriphClkInit->SpdifClockSelection)); /* Configure the SPDIFRX clock source */ __HAL_RCC_SPDIFRX_CONFIG(PeriphClkInit->SpdifClockSelection); 80033d6: 4b15 ldr r3, [pc, #84] @ (800342c ) 80033d8: f8d3 3094 ldr.w r3, [r3, #148] @ 0x94 80033dc: f023 5200 bic.w r2, r3, #536870912 @ 0x20000000 80033e0: 687b ldr r3, [r7, #4] 80033e2: 6d1b ldr r3, [r3, #80] @ 0x50 80033e4: 4911 ldr r1, [pc, #68] @ (800342c ) 80033e6: 4313 orrs r3, r2 80033e8: f8c1 3094 str.w r3, [r1, #148] @ 0x94 /* Enable the PLLI2S when it's used as clock source for SPDIFRX */ if (PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP) 80033ec: 687b ldr r3, [r7, #4] 80033ee: 6d1b ldr r3, [r3, #80] @ 0x50 80033f0: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 80033f4: d101 bne.n 80033fa { plli2sused = 1U; 80033f6: 2301 movs r3, #1 80033f8: 62fb str r3, [r7, #44] @ 0x2c /*--------------------------------------------------------------------------*/ /*---------------------------- PLLI2S Configuration ------------------------*/ /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2, I2S on APB1, I2S on APB2 or SPDIFRX */ if ((plli2sused == 1U) || (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S)) 80033fa: 6afb ldr r3, [r7, #44] @ 0x2c 80033fc: 2b01 cmp r3, #1 80033fe: d005 beq.n 800340c 8003400: 687b ldr r3, [r7, #4] 8003402: 681b ldr r3, [r3, #0] 8003404: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8003408: f040 80ff bne.w 800360a { /* Disable the PLLI2S */ __HAL_RCC_PLLI2S_DISABLE(); 800340c: 4b09 ldr r3, [pc, #36] @ (8003434 ) 800340e: 2200 movs r2, #0 8003410: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003412: f7fd fe9f bl 8001154 8003416: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLI2S is disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) 8003418: e00e b.n 8003438 { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 800341a: f7fd fe9b bl 8001154 800341e: 4602 mov r2, r0 8003420: 6a7b ldr r3, [r7, #36] @ 0x24 8003422: 1ad3 subs r3, r2, r3 8003424: 2b02 cmp r3, #2 8003426: d907 bls.n 8003438 { /* return in case of Timeout detected */ return HAL_TIMEOUT; 8003428: 2303 movs r3, #3 800342a: e188 b.n 800373e 800342c: 40023800 .word 0x40023800 8003430: 424711e0 .word 0x424711e0 8003434: 42470068 .word 0x42470068 while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) 8003438: 4b7e ldr r3, [pc, #504] @ (8003634 ) 800343a: 681b ldr r3, [r3, #0] 800343c: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8003440: 2b00 cmp r3, #0 8003442: d1ea bne.n 800341a /* check for common PLLI2S Parameters */ assert_param(IS_RCC_PLLI2SM_VALUE(PeriphClkInit->PLLI2S.PLLI2SM)); assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN)); /*------ In Case of PLLI2S is selected as source clock for I2S -----------*/ if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB1) == RCC_PERIPHCLK_I2S_APB1) 8003444: 687b ldr r3, [r7, #4] 8003446: 681b ldr r3, [r3, #0] 8003448: f003 0301 and.w r3, r3, #1 800344c: 2b00 cmp r3, #0 800344e: d003 beq.n 8003458 && (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) || 8003450: 687b ldr r3, [r7, #4] 8003452: 6b9b ldr r3, [r3, #56] @ 0x38 8003454: 2b00 cmp r3, #0 8003456: d009 beq.n 800346c ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S))) 8003458: 687b ldr r3, [r7, #4] 800345a: 681b ldr r3, [r3, #0] 800345c: f003 0302 and.w r3, r3, #2 && (PeriphClkInit->I2sApb1ClockSelection == RCC_I2SAPB1CLKSOURCE_PLLI2S)) || 8003460: 2b00 cmp r3, #0 8003462: d028 beq.n 80034b6 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S_APB2) == RCC_PERIPHCLK_I2S_APB2) && (PeriphClkInit->I2sApb2ClockSelection == RCC_I2SAPB2CLKSOURCE_PLLI2S))) 8003464: 687b ldr r3, [r7, #4] 8003466: 6bdb ldr r3, [r3, #60] @ 0x3c 8003468: 2b00 cmp r3, #0 800346a: d124 bne.n 80034b6 { /* check for Parameters */ assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); /* Read PLLI2SP/PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */ plli2sp = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U); 800346c: 4b71 ldr r3, [pc, #452] @ (8003634 ) 800346e: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8003472: 0c1b lsrs r3, r3, #16 8003474: f003 0303 and.w r3, r3, #3 8003478: 3301 adds r3, #1 800347a: 005b lsls r3, r3, #1 800347c: 61fb str r3, [r7, #28] plli2sq = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos); 800347e: 4b6d ldr r3, [pc, #436] @ (8003634 ) 8003480: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8003484: 0e1b lsrs r3, r3, #24 8003486: f003 030f and.w r3, r3, #15 800348a: 61bb str r3, [r7, #24] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */ /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, plli2sp, plli2sq, 800348c: 687b ldr r3, [r7, #4] 800348e: 685a ldr r2, [r3, #4] 8003490: 687b ldr r3, [r7, #4] 8003492: 689b ldr r3, [r3, #8] 8003494: 019b lsls r3, r3, #6 8003496: 431a orrs r2, r3 8003498: 69fb ldr r3, [r7, #28] 800349a: 085b lsrs r3, r3, #1 800349c: 3b01 subs r3, #1 800349e: 041b lsls r3, r3, #16 80034a0: 431a orrs r2, r3 80034a2: 69bb ldr r3, [r7, #24] 80034a4: 061b lsls r3, r3, #24 80034a6: 431a orrs r2, r3 80034a8: 687b ldr r3, [r7, #4] 80034aa: 695b ldr r3, [r3, #20] 80034ac: 071b lsls r3, r3, #28 80034ae: 4961 ldr r1, [pc, #388] @ (8003634 ) 80034b0: 4313 orrs r3, r2 80034b2: f8c1 3084 str.w r3, [r1, #132] @ 0x84 PeriphClkInit->PLLI2S.PLLI2SR); } /*------- In Case of PLLI2S is selected as source clock for SAI ----------*/ if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) 80034b6: 687b ldr r3, [r7, #4] 80034b8: 681b ldr r3, [r3, #0] 80034ba: f003 0304 and.w r3, r3, #4 80034be: 2b00 cmp r3, #0 80034c0: d004 beq.n 80034cc && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || 80034c2: 687b ldr r3, [r7, #4] 80034c4: 6b1b ldr r3, [r3, #48] @ 0x30 80034c6: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 80034ca: d00a beq.n 80034e2 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) 80034cc: 687b ldr r3, [r7, #4] 80034ce: 681b ldr r3, [r3, #0] 80034d0: f003 0308 and.w r3, r3, #8 && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || 80034d4: 2b00 cmp r3, #0 80034d6: d035 beq.n 8003544 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) 80034d8: 687b ldr r3, [r7, #4] 80034da: 6b5b ldr r3, [r3, #52] @ 0x34 80034dc: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 80034e0: d130 bne.n 8003544 assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); /* Check for PLLI2S/DIVQ parameters */ assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ)); /* Read PLLI2SP/PLLI2SR value from PLLI2SCFGR register (this value is not needed for SAI configuration) */ plli2sp = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U); 80034e2: 4b54 ldr r3, [pc, #336] @ (8003634 ) 80034e4: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 80034e8: 0c1b lsrs r3, r3, #16 80034ea: f003 0303 and.w r3, r3, #3 80034ee: 3301 adds r3, #1 80034f0: 005b lsls r3, r3, #1 80034f2: 61fb str r3, [r7, #28] plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); 80034f4: 4b4f ldr r3, [pc, #316] @ (8003634 ) 80034f6: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 80034fa: 0f1b lsrs r3, r3, #28 80034fc: f003 0307 and.w r3, r3, #7 8003500: 617b str r3, [r7, #20] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO Input = PLL_SOURCE/PLLI2SM */ /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */ /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, plli2sp, 8003502: 687b ldr r3, [r7, #4] 8003504: 685a ldr r2, [r3, #4] 8003506: 687b ldr r3, [r7, #4] 8003508: 689b ldr r3, [r3, #8] 800350a: 019b lsls r3, r3, #6 800350c: 431a orrs r2, r3 800350e: 69fb ldr r3, [r7, #28] 8003510: 085b lsrs r3, r3, #1 8003512: 3b01 subs r3, #1 8003514: 041b lsls r3, r3, #16 8003516: 431a orrs r2, r3 8003518: 687b ldr r3, [r7, #4] 800351a: 691b ldr r3, [r3, #16] 800351c: 061b lsls r3, r3, #24 800351e: 431a orrs r2, r3 8003520: 697b ldr r3, [r7, #20] 8003522: 071b lsls r3, r3, #28 8003524: 4943 ldr r1, [pc, #268] @ (8003634 ) 8003526: 4313 orrs r3, r2 8003528: f8c1 3084 str.w r3, [r1, #132] @ 0x84 PeriphClkInit->PLLI2S.PLLI2SQ, plli2sr); /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */ __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ); 800352c: 4b41 ldr r3, [pc, #260] @ (8003634 ) 800352e: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8003532: f023 021f bic.w r2, r3, #31 8003536: 687b ldr r3, [r7, #4] 8003538: 6a9b ldr r3, [r3, #40] @ 0x28 800353a: 3b01 subs r3, #1 800353c: 493d ldr r1, [pc, #244] @ (8003634 ) 800353e: 4313 orrs r3, r2 8003540: f8c1 308c str.w r3, [r1, #140] @ 0x8c } /*------ In Case of PLLI2S is selected as source clock for SPDIFRX -------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SPDIFRX) == RCC_PERIPHCLK_SPDIFRX) 8003544: 687b ldr r3, [r7, #4] 8003546: 681b ldr r3, [r3, #0] 8003548: f403 6380 and.w r3, r3, #1024 @ 0x400 800354c: 2b00 cmp r3, #0 800354e: d029 beq.n 80035a4 && (PeriphClkInit->SpdifClockSelection == RCC_SPDIFRXCLKSOURCE_PLLI2SP)) 8003550: 687b ldr r3, [r7, #4] 8003552: 6d1b ldr r3, [r3, #80] @ 0x50 8003554: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 8003558: d124 bne.n 80035a4 { /* check for Parameters */ assert_param(IS_RCC_PLLI2SP_VALUE(PeriphClkInit->PLLI2S.PLLI2SP)); /* Read PLLI2SR value from PLLI2SCFGR register (this value is not need for SAI configuration) */ plli2sq = ((((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SP) >> RCC_PLLI2SCFGR_PLLI2SP_Pos) + 1U) << 1U); 800355a: 4b36 ldr r3, [pc, #216] @ (8003634 ) 800355c: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8003560: 0c1b lsrs r3, r3, #16 8003562: f003 0303 and.w r3, r3, #3 8003566: 3301 adds r3, #1 8003568: 005b lsls r3, r3, #1 800356a: 61bb str r3, [r7, #24] plli2sr = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); 800356c: 4b31 ldr r3, [pc, #196] @ (8003634 ) 800356e: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8003572: 0f1b lsrs r3, r3, #28 8003574: f003 0307 and.w r3, r3, #7 8003578: 617b str r3, [r7, #20] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */ /* SPDIFRXCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SP */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SP, 800357a: 687b ldr r3, [r7, #4] 800357c: 685a ldr r2, [r3, #4] 800357e: 687b ldr r3, [r7, #4] 8003580: 689b ldr r3, [r3, #8] 8003582: 019b lsls r3, r3, #6 8003584: 431a orrs r2, r3 8003586: 687b ldr r3, [r7, #4] 8003588: 68db ldr r3, [r3, #12] 800358a: 085b lsrs r3, r3, #1 800358c: 3b01 subs r3, #1 800358e: 041b lsls r3, r3, #16 8003590: 431a orrs r2, r3 8003592: 69bb ldr r3, [r7, #24] 8003594: 061b lsls r3, r3, #24 8003596: 431a orrs r2, r3 8003598: 697b ldr r3, [r7, #20] 800359a: 071b lsls r3, r3, #28 800359c: 4925 ldr r1, [pc, #148] @ (8003634 ) 800359e: 4313 orrs r3, r2 80035a0: f8c1 3084 str.w r3, [r1, #132] @ 0x84 plli2sq, plli2sr); } /*----------------- In Case of PLLI2S is just selected -----------------*/ if ((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S) 80035a4: 687b ldr r3, [r7, #4] 80035a6: 681b ldr r3, [r3, #0] 80035a8: f403 6300 and.w r3, r3, #2048 @ 0x800 80035ac: 2b00 cmp r3, #0 80035ae: d016 beq.n 80035de assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLI2SM) */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SM, PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SP, 80035b0: 687b ldr r3, [r7, #4] 80035b2: 685a ldr r2, [r3, #4] 80035b4: 687b ldr r3, [r7, #4] 80035b6: 689b ldr r3, [r3, #8] 80035b8: 019b lsls r3, r3, #6 80035ba: 431a orrs r2, r3 80035bc: 687b ldr r3, [r7, #4] 80035be: 68db ldr r3, [r3, #12] 80035c0: 085b lsrs r3, r3, #1 80035c2: 3b01 subs r3, #1 80035c4: 041b lsls r3, r3, #16 80035c6: 431a orrs r2, r3 80035c8: 687b ldr r3, [r7, #4] 80035ca: 691b ldr r3, [r3, #16] 80035cc: 061b lsls r3, r3, #24 80035ce: 431a orrs r2, r3 80035d0: 687b ldr r3, [r7, #4] 80035d2: 695b ldr r3, [r3, #20] 80035d4: 071b lsls r3, r3, #28 80035d6: 4917 ldr r1, [pc, #92] @ (8003634 ) 80035d8: 4313 orrs r3, r2 80035da: f8c1 3084 str.w r3, [r1, #132] @ 0x84 PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR); } /* Enable the PLLI2S */ __HAL_RCC_PLLI2S_ENABLE(); 80035de: 4b16 ldr r3, [pc, #88] @ (8003638 ) 80035e0: 2201 movs r2, #1 80035e2: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 80035e4: f7fd fdb6 bl 8001154 80035e8: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLI2S is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 80035ea: e008 b.n 80035fe { if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 80035ec: f7fd fdb2 bl 8001154 80035f0: 4602 mov r2, r0 80035f2: 6a7b ldr r3, [r7, #36] @ 0x24 80035f4: 1ad3 subs r3, r2, r3 80035f6: 2b02 cmp r3, #2 80035f8: d901 bls.n 80035fe { /* return in case of Timeout detected */ return HAL_TIMEOUT; 80035fa: 2303 movs r3, #3 80035fc: e09f b.n 800373e while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 80035fe: 4b0d ldr r3, [pc, #52] @ (8003634 ) 8003600: 681b ldr r3, [r3, #0] 8003602: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8003606: 2b00 cmp r3, #0 8003608: d0f0 beq.n 80035ec } /*--------------------------------------------------------------------------*/ /*----------------------------- PLLSAI Configuration -----------------------*/ /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, CLK48 or SDIO */ if (pllsaiused == 1U) 800360a: 6abb ldr r3, [r7, #40] @ 0x28 800360c: 2b01 cmp r3, #1 800360e: f040 8095 bne.w 800373c { /* Disable PLLSAI Clock */ __HAL_RCC_PLLSAI_DISABLE(); 8003612: 4b0a ldr r3, [pc, #40] @ (800363c ) 8003614: 2200 movs r2, #0 8003616: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003618: f7fd fd9c bl 8001154 800361c: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLSAI is disabled */ while (__HAL_RCC_PLLSAI_GET_FLAG() != RESET) 800361e: e00f b.n 8003640 { if ((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE) 8003620: f7fd fd98 bl 8001154 8003624: 4602 mov r2, r0 8003626: 6a7b ldr r3, [r7, #36] @ 0x24 8003628: 1ad3 subs r3, r2, r3 800362a: 2b02 cmp r3, #2 800362c: d908 bls.n 8003640 { /* return in case of Timeout detected */ return HAL_TIMEOUT; 800362e: 2303 movs r3, #3 8003630: e085 b.n 800373e 8003632: bf00 nop 8003634: 40023800 .word 0x40023800 8003638: 42470068 .word 0x42470068 800363c: 42470070 .word 0x42470070 while (__HAL_RCC_PLLSAI_GET_FLAG() != RESET) 8003640: 4b41 ldr r3, [pc, #260] @ (8003748 ) 8003642: 681b ldr r3, [r3, #0] 8003644: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8003648: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 800364c: d0e8 beq.n 8003620 /* Check the PLLSAI division factors */ assert_param(IS_RCC_PLLSAIM_VALUE(PeriphClkInit->PLLSAI.PLLSAIM)); assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN)); /*------ In Case of PLLSAI is selected as source clock for SAI -----------*/ if (((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) 800364e: 687b ldr r3, [r7, #4] 8003650: 681b ldr r3, [r3, #0] 8003652: f003 0304 and.w r3, r3, #4 8003656: 2b00 cmp r3, #0 8003658: d003 beq.n 8003662 && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) || 800365a: 687b ldr r3, [r7, #4] 800365c: 6b1b ldr r3, [r3, #48] @ 0x30 800365e: 2b00 cmp r3, #0 8003660: d009 beq.n 8003676 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) 8003662: 687b ldr r3, [r7, #4] 8003664: 681b ldr r3, [r3, #0] 8003666: f003 0308 and.w r3, r3, #8 && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) || 800366a: 2b00 cmp r3, #0 800366c: d02b beq.n 80036c6 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) 800366e: 687b ldr r3, [r7, #4] 8003670: 6b5b ldr r3, [r3, #52] @ 0x34 8003672: 2b00 cmp r3, #0 8003674: d127 bne.n 80036c6 assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ)); /* check for PLLSAI/DIVQ Parameter */ assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ)); /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */ pllsaip = ((((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U) << 1U); 8003676: 4b34 ldr r3, [pc, #208] @ (8003748 ) 8003678: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 800367c: 0c1b lsrs r3, r3, #16 800367e: f003 0303 and.w r3, r3, #3 8003682: 3301 adds r3, #1 8003684: 005b lsls r3, r3, #1 8003686: 613b str r3, [r7, #16] /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */ /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */ /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN, pllsaip, 8003688: 687b ldr r3, [r7, #4] 800368a: 699a ldr r2, [r3, #24] 800368c: 687b ldr r3, [r7, #4] 800368e: 69db ldr r3, [r3, #28] 8003690: 019b lsls r3, r3, #6 8003692: 431a orrs r2, r3 8003694: 693b ldr r3, [r7, #16] 8003696: 085b lsrs r3, r3, #1 8003698: 3b01 subs r3, #1 800369a: 041b lsls r3, r3, #16 800369c: 431a orrs r2, r3 800369e: 687b ldr r3, [r7, #4] 80036a0: 6a5b ldr r3, [r3, #36] @ 0x24 80036a2: 061b lsls r3, r3, #24 80036a4: 4928 ldr r1, [pc, #160] @ (8003748 ) 80036a6: 4313 orrs r3, r2 80036a8: f8c1 3088 str.w r3, [r1, #136] @ 0x88 PeriphClkInit->PLLSAI.PLLSAIQ, 0U); /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */ __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ); 80036ac: 4b26 ldr r3, [pc, #152] @ (8003748 ) 80036ae: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 80036b2: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 80036b6: 687b ldr r3, [r7, #4] 80036b8: 6adb ldr r3, [r3, #44] @ 0x2c 80036ba: 3b01 subs r3, #1 80036bc: 021b lsls r3, r3, #8 80036be: 4922 ldr r1, [pc, #136] @ (8003748 ) 80036c0: 4313 orrs r3, r2 80036c2: f8c1 308c str.w r3, [r1, #140] @ 0x8c } /*------ In Case of PLLSAI is selected as source clock for CLK48 ---------*/ /* In Case of PLLI2S is selected as source clock for CLK48 */ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) 80036c6: 687b ldr r3, [r7, #4] 80036c8: 681b ldr r3, [r3, #0] 80036ca: f403 7380 and.w r3, r3, #256 @ 0x100 80036ce: 2b00 cmp r3, #0 80036d0: d01d beq.n 800370e && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48CLKSOURCE_PLLSAIP)) 80036d2: 687b ldr r3, [r7, #4] 80036d4: 6d5b ldr r3, [r3, #84] @ 0x54 80036d6: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 80036da: d118 bne.n 800370e { /* check for Parameters */ assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP)); /* Read PLLSAIQ value from PLLI2SCFGR register (this value is not need for SAI configuration) */ pllsaiq = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos); 80036dc: 4b1a ldr r3, [pc, #104] @ (8003748 ) 80036de: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80036e2: 0e1b lsrs r3, r3, #24 80036e4: f003 030f and.w r3, r3, #15 80036e8: 60fb str r3, [r7, #12] /* Configure the PLLSAI division factors */ /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) * (PLLI2SN/PLLSAIM) */ /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIM, PeriphClkInit->PLLSAI.PLLSAIN, PeriphClkInit->PLLSAI.PLLSAIP, 80036ea: 687b ldr r3, [r7, #4] 80036ec: 699a ldr r2, [r3, #24] 80036ee: 687b ldr r3, [r7, #4] 80036f0: 69db ldr r3, [r3, #28] 80036f2: 019b lsls r3, r3, #6 80036f4: 431a orrs r2, r3 80036f6: 687b ldr r3, [r7, #4] 80036f8: 6a1b ldr r3, [r3, #32] 80036fa: 085b lsrs r3, r3, #1 80036fc: 3b01 subs r3, #1 80036fe: 041b lsls r3, r3, #16 8003700: 431a orrs r2, r3 8003702: 68fb ldr r3, [r7, #12] 8003704: 061b lsls r3, r3, #24 8003706: 4910 ldr r1, [pc, #64] @ (8003748 ) 8003708: 4313 orrs r3, r2 800370a: f8c1 3088 str.w r3, [r1, #136] @ 0x88 pllsaiq, 0U); } /* Enable PLLSAI Clock */ __HAL_RCC_PLLSAI_ENABLE(); 800370e: 4b0f ldr r3, [pc, #60] @ (800374c ) 8003710: 2201 movs r2, #1 8003712: 601a str r2, [r3, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003714: f7fd fd1e bl 8001154 8003718: 6278 str r0, [r7, #36] @ 0x24 /* Wait till PLLSAI is ready */ while (__HAL_RCC_PLLSAI_GET_FLAG() == RESET) 800371a: e008 b.n 800372e { if ((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE) 800371c: f7fd fd1a bl 8001154 8003720: 4602 mov r2, r0 8003722: 6a7b ldr r3, [r7, #36] @ 0x24 8003724: 1ad3 subs r3, r2, r3 8003726: 2b02 cmp r3, #2 8003728: d901 bls.n 800372e { /* return in case of Timeout detected */ return HAL_TIMEOUT; 800372a: 2303 movs r3, #3 800372c: e007 b.n 800373e while (__HAL_RCC_PLLSAI_GET_FLAG() == RESET) 800372e: 4b06 ldr r3, [pc, #24] @ (8003748 ) 8003730: 681b ldr r3, [r3, #0] 8003732: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8003736: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 800373a: d1ef bne.n 800371c } } } return HAL_OK; 800373c: 2300 movs r3, #0 } 800373e: 4618 mov r0, r3 8003740: 3730 adds r7, #48 @ 0x30 8003742: 46bd mov sp, r7 8003744: bd80 pop {r7, pc} 8003746: bf00 nop 8003748: 40023800 .word 0x40023800 800374c: 42470070 .word 0x42470070 08003750 : * * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 8003750: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 8003754: b0ae sub sp, #184 @ 0xb8 8003756: af00 add r7, sp, #0 uint32_t pllm = 0U; 8003758: 2300 movs r3, #0 800375a: f8c7 30ac str.w r3, [r7, #172] @ 0xac uint32_t pllvco = 0U; 800375e: 2300 movs r3, #0 8003760: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 uint32_t pllp = 0U; 8003764: 2300 movs r3, #0 8003766: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 uint32_t pllr = 0U; 800376a: 2300 movs r3, #0 800376c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 uint32_t sysclockfreq = 0U; 8003770: 2300 movs r3, #0 8003772: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) 8003776: 4bcb ldr r3, [pc, #812] @ (8003aa4 ) 8003778: 689b ldr r3, [r3, #8] 800377a: f003 030c and.w r3, r3, #12 800377e: 2b0c cmp r3, #12 8003780: f200 8206 bhi.w 8003b90 8003784: a201 add r2, pc, #4 @ (adr r2, 800378c ) 8003786: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800378a: bf00 nop 800378c: 080037c1 .word 0x080037c1 8003790: 08003b91 .word 0x08003b91 8003794: 08003b91 .word 0x08003b91 8003798: 08003b91 .word 0x08003b91 800379c: 080037c9 .word 0x080037c9 80037a0: 08003b91 .word 0x08003b91 80037a4: 08003b91 .word 0x08003b91 80037a8: 08003b91 .word 0x08003b91 80037ac: 080037d1 .word 0x080037d1 80037b0: 08003b91 .word 0x08003b91 80037b4: 08003b91 .word 0x08003b91 80037b8: 08003b91 .word 0x08003b91 80037bc: 080039c1 .word 0x080039c1 { case RCC_CFGR_SWS_HSI: /* HSI used as system clock source */ { sysclockfreq = HSI_VALUE; 80037c0: 4bb9 ldr r3, [pc, #740] @ (8003aa8 ) 80037c2: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 break; 80037c6: e1e7 b.n 8003b98 } case RCC_CFGR_SWS_HSE: /* HSE used as system clock source */ { sysclockfreq = HSE_VALUE; 80037c8: 4bb8 ldr r3, [pc, #736] @ (8003aac ) 80037ca: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 break; 80037ce: e1e3 b.n 8003b98 } case RCC_CFGR_SWS_PLL: /* PLL/PLLP used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLP */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 80037d0: 4bb4 ldr r3, [pc, #720] @ (8003aa4 ) 80037d2: 685b ldr r3, [r3, #4] 80037d4: f003 033f and.w r3, r3, #63 @ 0x3f 80037d8: f8c7 30ac str.w r3, [r7, #172] @ 0xac if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) 80037dc: 4bb1 ldr r3, [pc, #708] @ (8003aa4 ) 80037de: 685b ldr r3, [r3, #4] 80037e0: f403 0380 and.w r3, r3, #4194304 @ 0x400000 80037e4: 2b00 cmp r3, #0 80037e6: d071 beq.n 80038cc { /* HSE used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 80037e8: 4bae ldr r3, [pc, #696] @ (8003aa4 ) 80037ea: 685b ldr r3, [r3, #4] 80037ec: 099b lsrs r3, r3, #6 80037ee: 2200 movs r2, #0 80037f0: f8c7 3098 str.w r3, [r7, #152] @ 0x98 80037f4: f8c7 209c str.w r2, [r7, #156] @ 0x9c 80037f8: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98 80037fc: f3c3 0308 ubfx r3, r3, #0, #9 8003800: f8c7 3090 str.w r3, [r7, #144] @ 0x90 8003804: 2300 movs r3, #0 8003806: f8c7 3094 str.w r3, [r7, #148] @ 0x94 800380a: e9d7 4524 ldrd r4, r5, [r7, #144] @ 0x90 800380e: 4622 mov r2, r4 8003810: 462b mov r3, r5 8003812: f04f 0000 mov.w r0, #0 8003816: f04f 0100 mov.w r1, #0 800381a: 0159 lsls r1, r3, #5 800381c: ea41 61d2 orr.w r1, r1, r2, lsr #27 8003820: 0150 lsls r0, r2, #5 8003822: 4602 mov r2, r0 8003824: 460b mov r3, r1 8003826: 4621 mov r1, r4 8003828: 1a51 subs r1, r2, r1 800382a: 6439 str r1, [r7, #64] @ 0x40 800382c: 4629 mov r1, r5 800382e: eb63 0301 sbc.w r3, r3, r1 8003832: 647b str r3, [r7, #68] @ 0x44 8003834: f04f 0200 mov.w r2, #0 8003838: f04f 0300 mov.w r3, #0 800383c: e9d7 8910 ldrd r8, r9, [r7, #64] @ 0x40 8003840: 4649 mov r1, r9 8003842: 018b lsls r3, r1, #6 8003844: 4641 mov r1, r8 8003846: ea43 6391 orr.w r3, r3, r1, lsr #26 800384a: 4641 mov r1, r8 800384c: 018a lsls r2, r1, #6 800384e: 4641 mov r1, r8 8003850: 1a51 subs r1, r2, r1 8003852: 63b9 str r1, [r7, #56] @ 0x38 8003854: 4649 mov r1, r9 8003856: eb63 0301 sbc.w r3, r3, r1 800385a: 63fb str r3, [r7, #60] @ 0x3c 800385c: f04f 0200 mov.w r2, #0 8003860: f04f 0300 mov.w r3, #0 8003864: e9d7 890e ldrd r8, r9, [r7, #56] @ 0x38 8003868: 4649 mov r1, r9 800386a: 00cb lsls r3, r1, #3 800386c: 4641 mov r1, r8 800386e: ea43 7351 orr.w r3, r3, r1, lsr #29 8003872: 4641 mov r1, r8 8003874: 00ca lsls r2, r1, #3 8003876: 4610 mov r0, r2 8003878: 4619 mov r1, r3 800387a: 4603 mov r3, r0 800387c: 4622 mov r2, r4 800387e: 189b adds r3, r3, r2 8003880: 633b str r3, [r7, #48] @ 0x30 8003882: 462b mov r3, r5 8003884: 460a mov r2, r1 8003886: eb42 0303 adc.w r3, r2, r3 800388a: 637b str r3, [r7, #52] @ 0x34 800388c: f04f 0200 mov.w r2, #0 8003890: f04f 0300 mov.w r3, #0 8003894: e9d7 450c ldrd r4, r5, [r7, #48] @ 0x30 8003898: 4629 mov r1, r5 800389a: 024b lsls r3, r1, #9 800389c: 4621 mov r1, r4 800389e: ea43 53d1 orr.w r3, r3, r1, lsr #23 80038a2: 4621 mov r1, r4 80038a4: 024a lsls r2, r1, #9 80038a6: 4610 mov r0, r2 80038a8: 4619 mov r1, r3 80038aa: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 80038ae: 2200 movs r2, #0 80038b0: f8c7 3088 str.w r3, [r7, #136] @ 0x88 80038b4: f8c7 208c str.w r2, [r7, #140] @ 0x8c 80038b8: e9d7 2322 ldrd r2, r3, [r7, #136] @ 0x88 80038bc: f7fc fca2 bl 8000204 <__aeabi_uldivmod> 80038c0: 4602 mov r2, r0 80038c2: 460b mov r3, r1 80038c4: 4613 mov r3, r2 80038c6: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 80038ca: e067 b.n 800399c } else { /* HSI used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 80038cc: 4b75 ldr r3, [pc, #468] @ (8003aa4 ) 80038ce: 685b ldr r3, [r3, #4] 80038d0: 099b lsrs r3, r3, #6 80038d2: 2200 movs r2, #0 80038d4: f8c7 3080 str.w r3, [r7, #128] @ 0x80 80038d8: f8c7 2084 str.w r2, [r7, #132] @ 0x84 80038dc: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80 80038e0: f3c3 0308 ubfx r3, r3, #0, #9 80038e4: 67bb str r3, [r7, #120] @ 0x78 80038e6: 2300 movs r3, #0 80038e8: 67fb str r3, [r7, #124] @ 0x7c 80038ea: e9d7 451e ldrd r4, r5, [r7, #120] @ 0x78 80038ee: 4622 mov r2, r4 80038f0: 462b mov r3, r5 80038f2: f04f 0000 mov.w r0, #0 80038f6: f04f 0100 mov.w r1, #0 80038fa: 0159 lsls r1, r3, #5 80038fc: ea41 61d2 orr.w r1, r1, r2, lsr #27 8003900: 0150 lsls r0, r2, #5 8003902: 4602 mov r2, r0 8003904: 460b mov r3, r1 8003906: 4621 mov r1, r4 8003908: 1a51 subs r1, r2, r1 800390a: 62b9 str r1, [r7, #40] @ 0x28 800390c: 4629 mov r1, r5 800390e: eb63 0301 sbc.w r3, r3, r1 8003912: 62fb str r3, [r7, #44] @ 0x2c 8003914: f04f 0200 mov.w r2, #0 8003918: f04f 0300 mov.w r3, #0 800391c: e9d7 890a ldrd r8, r9, [r7, #40] @ 0x28 8003920: 4649 mov r1, r9 8003922: 018b lsls r3, r1, #6 8003924: 4641 mov r1, r8 8003926: ea43 6391 orr.w r3, r3, r1, lsr #26 800392a: 4641 mov r1, r8 800392c: 018a lsls r2, r1, #6 800392e: 4641 mov r1, r8 8003930: ebb2 0a01 subs.w sl, r2, r1 8003934: 4649 mov r1, r9 8003936: eb63 0b01 sbc.w fp, r3, r1 800393a: f04f 0200 mov.w r2, #0 800393e: f04f 0300 mov.w r3, #0 8003942: ea4f 03cb mov.w r3, fp, lsl #3 8003946: ea43 735a orr.w r3, r3, sl, lsr #29 800394a: ea4f 02ca mov.w r2, sl, lsl #3 800394e: 4692 mov sl, r2 8003950: 469b mov fp, r3 8003952: 4623 mov r3, r4 8003954: eb1a 0303 adds.w r3, sl, r3 8003958: 623b str r3, [r7, #32] 800395a: 462b mov r3, r5 800395c: eb4b 0303 adc.w r3, fp, r3 8003960: 627b str r3, [r7, #36] @ 0x24 8003962: f04f 0200 mov.w r2, #0 8003966: f04f 0300 mov.w r3, #0 800396a: e9d7 4508 ldrd r4, r5, [r7, #32] 800396e: 4629 mov r1, r5 8003970: 028b lsls r3, r1, #10 8003972: 4621 mov r1, r4 8003974: ea43 5391 orr.w r3, r3, r1, lsr #22 8003978: 4621 mov r1, r4 800397a: 028a lsls r2, r1, #10 800397c: 4610 mov r0, r2 800397e: 4619 mov r1, r3 8003980: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 8003984: 2200 movs r2, #0 8003986: 673b str r3, [r7, #112] @ 0x70 8003988: 677a str r2, [r7, #116] @ 0x74 800398a: e9d7 231c ldrd r2, r3, [r7, #112] @ 0x70 800398e: f7fc fc39 bl 8000204 <__aeabi_uldivmod> 8003992: 4602 mov r2, r0 8003994: 460b mov r3, r1 8003996: 4613 mov r3, r2 8003998: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 } pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1U) * 2U); 800399c: 4b41 ldr r3, [pc, #260] @ (8003aa4 ) 800399e: 685b ldr r3, [r3, #4] 80039a0: 0c1b lsrs r3, r3, #16 80039a2: f003 0303 and.w r3, r3, #3 80039a6: 3301 adds r3, #1 80039a8: 005b lsls r3, r3, #1 80039aa: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 sysclockfreq = pllvco / pllp; 80039ae: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 80039b2: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8 80039b6: fbb2 f3f3 udiv r3, r2, r3 80039ba: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 break; 80039be: e0eb b.n 8003b98 } case RCC_CFGR_SWS_PLLR: /* PLL/PLLR used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLR */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 80039c0: 4b38 ldr r3, [pc, #224] @ (8003aa4 ) 80039c2: 685b ldr r3, [r3, #4] 80039c4: f003 033f and.w r3, r3, #63 @ 0x3f 80039c8: f8c7 30ac str.w r3, [r7, #172] @ 0xac if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) 80039cc: 4b35 ldr r3, [pc, #212] @ (8003aa4 ) 80039ce: 685b ldr r3, [r3, #4] 80039d0: f403 0380 and.w r3, r3, #4194304 @ 0x400000 80039d4: 2b00 cmp r3, #0 80039d6: d06b beq.n 8003ab0 { /* HSE used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 80039d8: 4b32 ldr r3, [pc, #200] @ (8003aa4 ) 80039da: 685b ldr r3, [r3, #4] 80039dc: 099b lsrs r3, r3, #6 80039de: 2200 movs r2, #0 80039e0: 66bb str r3, [r7, #104] @ 0x68 80039e2: 66fa str r2, [r7, #108] @ 0x6c 80039e4: 6ebb ldr r3, [r7, #104] @ 0x68 80039e6: f3c3 0308 ubfx r3, r3, #0, #9 80039ea: 663b str r3, [r7, #96] @ 0x60 80039ec: 2300 movs r3, #0 80039ee: 667b str r3, [r7, #100] @ 0x64 80039f0: e9d7 4518 ldrd r4, r5, [r7, #96] @ 0x60 80039f4: 4622 mov r2, r4 80039f6: 462b mov r3, r5 80039f8: f04f 0000 mov.w r0, #0 80039fc: f04f 0100 mov.w r1, #0 8003a00: 0159 lsls r1, r3, #5 8003a02: ea41 61d2 orr.w r1, r1, r2, lsr #27 8003a06: 0150 lsls r0, r2, #5 8003a08: 4602 mov r2, r0 8003a0a: 460b mov r3, r1 8003a0c: 4621 mov r1, r4 8003a0e: 1a51 subs r1, r2, r1 8003a10: 61b9 str r1, [r7, #24] 8003a12: 4629 mov r1, r5 8003a14: eb63 0301 sbc.w r3, r3, r1 8003a18: 61fb str r3, [r7, #28] 8003a1a: f04f 0200 mov.w r2, #0 8003a1e: f04f 0300 mov.w r3, #0 8003a22: e9d7 ab06 ldrd sl, fp, [r7, #24] 8003a26: 4659 mov r1, fp 8003a28: 018b lsls r3, r1, #6 8003a2a: 4651 mov r1, sl 8003a2c: ea43 6391 orr.w r3, r3, r1, lsr #26 8003a30: 4651 mov r1, sl 8003a32: 018a lsls r2, r1, #6 8003a34: 4651 mov r1, sl 8003a36: ebb2 0801 subs.w r8, r2, r1 8003a3a: 4659 mov r1, fp 8003a3c: eb63 0901 sbc.w r9, r3, r1 8003a40: f04f 0200 mov.w r2, #0 8003a44: f04f 0300 mov.w r3, #0 8003a48: ea4f 03c9 mov.w r3, r9, lsl #3 8003a4c: ea43 7358 orr.w r3, r3, r8, lsr #29 8003a50: ea4f 02c8 mov.w r2, r8, lsl #3 8003a54: 4690 mov r8, r2 8003a56: 4699 mov r9, r3 8003a58: 4623 mov r3, r4 8003a5a: eb18 0303 adds.w r3, r8, r3 8003a5e: 613b str r3, [r7, #16] 8003a60: 462b mov r3, r5 8003a62: eb49 0303 adc.w r3, r9, r3 8003a66: 617b str r3, [r7, #20] 8003a68: f04f 0200 mov.w r2, #0 8003a6c: f04f 0300 mov.w r3, #0 8003a70: e9d7 4504 ldrd r4, r5, [r7, #16] 8003a74: 4629 mov r1, r5 8003a76: 024b lsls r3, r1, #9 8003a78: 4621 mov r1, r4 8003a7a: ea43 53d1 orr.w r3, r3, r1, lsr #23 8003a7e: 4621 mov r1, r4 8003a80: 024a lsls r2, r1, #9 8003a82: 4610 mov r0, r2 8003a84: 4619 mov r1, r3 8003a86: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 8003a8a: 2200 movs r2, #0 8003a8c: 65bb str r3, [r7, #88] @ 0x58 8003a8e: 65fa str r2, [r7, #92] @ 0x5c 8003a90: e9d7 2316 ldrd r2, r3, [r7, #88] @ 0x58 8003a94: f7fc fbb6 bl 8000204 <__aeabi_uldivmod> 8003a98: 4602 mov r2, r0 8003a9a: 460b mov r3, r1 8003a9c: 4613 mov r3, r2 8003a9e: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8003aa2: e065 b.n 8003b70 8003aa4: 40023800 .word 0x40023800 8003aa8: 00f42400 .word 0x00f42400 8003aac: 007a1200 .word 0x007a1200 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 8003ab0: 4b3d ldr r3, [pc, #244] @ (8003ba8 ) 8003ab2: 685b ldr r3, [r3, #4] 8003ab4: 099b lsrs r3, r3, #6 8003ab6: 2200 movs r2, #0 8003ab8: 4618 mov r0, r3 8003aba: 4611 mov r1, r2 8003abc: f3c0 0308 ubfx r3, r0, #0, #9 8003ac0: 653b str r3, [r7, #80] @ 0x50 8003ac2: 2300 movs r3, #0 8003ac4: 657b str r3, [r7, #84] @ 0x54 8003ac6: e9d7 8914 ldrd r8, r9, [r7, #80] @ 0x50 8003aca: 4642 mov r2, r8 8003acc: 464b mov r3, r9 8003ace: f04f 0000 mov.w r0, #0 8003ad2: f04f 0100 mov.w r1, #0 8003ad6: 0159 lsls r1, r3, #5 8003ad8: ea41 61d2 orr.w r1, r1, r2, lsr #27 8003adc: 0150 lsls r0, r2, #5 8003ade: 4602 mov r2, r0 8003ae0: 460b mov r3, r1 8003ae2: 4641 mov r1, r8 8003ae4: 1a51 subs r1, r2, r1 8003ae6: 60b9 str r1, [r7, #8] 8003ae8: 4649 mov r1, r9 8003aea: eb63 0301 sbc.w r3, r3, r1 8003aee: 60fb str r3, [r7, #12] 8003af0: f04f 0200 mov.w r2, #0 8003af4: f04f 0300 mov.w r3, #0 8003af8: e9d7 ab02 ldrd sl, fp, [r7, #8] 8003afc: 4659 mov r1, fp 8003afe: 018b lsls r3, r1, #6 8003b00: 4651 mov r1, sl 8003b02: ea43 6391 orr.w r3, r3, r1, lsr #26 8003b06: 4651 mov r1, sl 8003b08: 018a lsls r2, r1, #6 8003b0a: 4651 mov r1, sl 8003b0c: 1a54 subs r4, r2, r1 8003b0e: 4659 mov r1, fp 8003b10: eb63 0501 sbc.w r5, r3, r1 8003b14: f04f 0200 mov.w r2, #0 8003b18: f04f 0300 mov.w r3, #0 8003b1c: 00eb lsls r3, r5, #3 8003b1e: ea43 7354 orr.w r3, r3, r4, lsr #29 8003b22: 00e2 lsls r2, r4, #3 8003b24: 4614 mov r4, r2 8003b26: 461d mov r5, r3 8003b28: 4643 mov r3, r8 8003b2a: 18e3 adds r3, r4, r3 8003b2c: 603b str r3, [r7, #0] 8003b2e: 464b mov r3, r9 8003b30: eb45 0303 adc.w r3, r5, r3 8003b34: 607b str r3, [r7, #4] 8003b36: f04f 0200 mov.w r2, #0 8003b3a: f04f 0300 mov.w r3, #0 8003b3e: e9d7 4500 ldrd r4, r5, [r7] 8003b42: 4629 mov r1, r5 8003b44: 028b lsls r3, r1, #10 8003b46: 4621 mov r1, r4 8003b48: ea43 5391 orr.w r3, r3, r1, lsr #22 8003b4c: 4621 mov r1, r4 8003b4e: 028a lsls r2, r1, #10 8003b50: 4610 mov r0, r2 8003b52: 4619 mov r1, r3 8003b54: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac 8003b58: 2200 movs r2, #0 8003b5a: 64bb str r3, [r7, #72] @ 0x48 8003b5c: 64fa str r2, [r7, #76] @ 0x4c 8003b5e: e9d7 2312 ldrd r2, r3, [r7, #72] @ 0x48 8003b62: f7fc fb4f bl 8000204 <__aeabi_uldivmod> 8003b66: 4602 mov r2, r0 8003b68: 460b mov r3, r1 8003b6a: 4613 mov r3, r2 8003b6c: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 } pllr = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> RCC_PLLCFGR_PLLR_Pos); 8003b70: 4b0d ldr r3, [pc, #52] @ (8003ba8 ) 8003b72: 685b ldr r3, [r3, #4] 8003b74: 0f1b lsrs r3, r3, #28 8003b76: f003 0307 and.w r3, r3, #7 8003b7a: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 sysclockfreq = pllvco / pllr; 8003b7e: f8d7 20b4 ldr.w r2, [r7, #180] @ 0xb4 8003b82: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4 8003b86: fbb2 f3f3 udiv r3, r2, r3 8003b8a: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 break; 8003b8e: e003 b.n 8003b98 } default: { sysclockfreq = HSI_VALUE; 8003b90: 4b06 ldr r3, [pc, #24] @ (8003bac ) 8003b92: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 break; 8003b96: bf00 nop } } return sysclockfreq; 8003b98: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0 } 8003b9c: 4618 mov r0, r3 8003b9e: 37b8 adds r7, #184 @ 0xb8 8003ba0: 46bd mov sp, r7 8003ba2: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 8003ba6: bf00 nop 8003ba8: 40023800 .word 0x40023800 8003bac: 00f42400 .word 0x00f42400 08003bb0 : * @note This function add the PLL/PLLR factor management during PLL configuration this feature * is only available in STM32F410xx/STM32F446xx/STM32F469xx/STM32F479xx/STM32F412Zx/STM32F412Vx/STM32F412Rx/STM32F412Cx devices * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) { 8003bb0: b580 push {r7, lr} 8003bb2: b086 sub sp, #24 8003bb4: af00 add r7, sp, #0 8003bb6: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8003bb8: 687b ldr r3, [r7, #4] 8003bba: 2b00 cmp r3, #0 8003bbc: d101 bne.n 8003bc2 { return HAL_ERROR; 8003bbe: 2301 movs r3, #1 8003bc0: e28d b.n 80040de } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 8003bc2: 687b ldr r3, [r7, #4] 8003bc4: 681b ldr r3, [r3, #0] 8003bc6: f003 0301 and.w r3, r3, #1 8003bca: 2b00 cmp r3, #0 8003bcc: f000 8083 beq.w 8003cd6 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases HSE will not disabled */ #if defined(STM32F446xx) if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) 8003bd0: 4b94 ldr r3, [pc, #592] @ (8003e24 ) 8003bd2: 689b ldr r3, [r3, #8] 8003bd4: f003 030c and.w r3, r3, #12 8003bd8: 2b04 cmp r3, #4 8003bda: d019 beq.n 8003c10 || \ ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) || \ 8003bdc: 4b91 ldr r3, [pc, #580] @ (8003e24 ) 8003bde: 689b ldr r3, [r3, #8] 8003be0: f003 030c and.w r3, r3, #12 || \ 8003be4: 2b08 cmp r3, #8 8003be6: d106 bne.n 8003bf6 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) || \ 8003be8: 4b8e ldr r3, [pc, #568] @ (8003e24 ) 8003bea: 685b ldr r3, [r3, #4] 8003bec: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8003bf0: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8003bf4: d00c beq.n 8003c10 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) 8003bf6: 4b8b ldr r3, [pc, #556] @ (8003e24 ) 8003bf8: 689b ldr r3, [r3, #8] 8003bfa: f003 030c and.w r3, r3, #12 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE)) || \ 8003bfe: 2b0c cmp r3, #12 8003c00: d112 bne.n 8003c28 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) 8003c02: 4b88 ldr r3, [pc, #544] @ (8003e24 ) 8003c04: 685b ldr r3, [r3, #4] 8003c06: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8003c0a: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8003c0e: d10b bne.n 8003c28 if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSE) || \ ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) #endif /* STM32F446xx */ { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8003c10: 4b84 ldr r3, [pc, #528] @ (8003e24 ) 8003c12: 681b ldr r3, [r3, #0] 8003c14: f403 3300 and.w r3, r3, #131072 @ 0x20000 8003c18: 2b00 cmp r3, #0 8003c1a: d05b beq.n 8003cd4 8003c1c: 687b ldr r3, [r7, #4] 8003c1e: 685b ldr r3, [r3, #4] 8003c20: 2b00 cmp r3, #0 8003c22: d157 bne.n 8003cd4 { return HAL_ERROR; 8003c24: 2301 movs r3, #1 8003c26: e25a b.n 80040de } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 8003c28: 687b ldr r3, [r7, #4] 8003c2a: 685b ldr r3, [r3, #4] 8003c2c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8003c30: d106 bne.n 8003c40 8003c32: 4b7c ldr r3, [pc, #496] @ (8003e24 ) 8003c34: 681b ldr r3, [r3, #0] 8003c36: 4a7b ldr r2, [pc, #492] @ (8003e24 ) 8003c38: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8003c3c: 6013 str r3, [r2, #0] 8003c3e: e01d b.n 8003c7c 8003c40: 687b ldr r3, [r7, #4] 8003c42: 685b ldr r3, [r3, #4] 8003c44: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 8003c48: d10c bne.n 8003c64 8003c4a: 4b76 ldr r3, [pc, #472] @ (8003e24 ) 8003c4c: 681b ldr r3, [r3, #0] 8003c4e: 4a75 ldr r2, [pc, #468] @ (8003e24 ) 8003c50: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8003c54: 6013 str r3, [r2, #0] 8003c56: 4b73 ldr r3, [pc, #460] @ (8003e24 ) 8003c58: 681b ldr r3, [r3, #0] 8003c5a: 4a72 ldr r2, [pc, #456] @ (8003e24 ) 8003c5c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8003c60: 6013 str r3, [r2, #0] 8003c62: e00b b.n 8003c7c 8003c64: 4b6f ldr r3, [pc, #444] @ (8003e24 ) 8003c66: 681b ldr r3, [r3, #0] 8003c68: 4a6e ldr r2, [pc, #440] @ (8003e24 ) 8003c6a: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8003c6e: 6013 str r3, [r2, #0] 8003c70: 4b6c ldr r3, [pc, #432] @ (8003e24 ) 8003c72: 681b ldr r3, [r3, #0] 8003c74: 4a6b ldr r2, [pc, #428] @ (8003e24 ) 8003c76: f423 2380 bic.w r3, r3, #262144 @ 0x40000 8003c7a: 6013 str r3, [r2, #0] /* Check the HSE State */ if ((RCC_OscInitStruct->HSEState) != RCC_HSE_OFF) 8003c7c: 687b ldr r3, [r7, #4] 8003c7e: 685b ldr r3, [r3, #4] 8003c80: 2b00 cmp r3, #0 8003c82: d013 beq.n 8003cac { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003c84: f7fd fa66 bl 8001154 8003c88: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8003c8a: e008 b.n 8003c9e { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8003c8c: f7fd fa62 bl 8001154 8003c90: 4602 mov r2, r0 8003c92: 693b ldr r3, [r7, #16] 8003c94: 1ad3 subs r3, r2, r3 8003c96: 2b64 cmp r3, #100 @ 0x64 8003c98: d901 bls.n 8003c9e { return HAL_TIMEOUT; 8003c9a: 2303 movs r3, #3 8003c9c: e21f b.n 80040de while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8003c9e: 4b61 ldr r3, [pc, #388] @ (8003e24 ) 8003ca0: 681b ldr r3, [r3, #0] 8003ca2: f403 3300 and.w r3, r3, #131072 @ 0x20000 8003ca6: 2b00 cmp r3, #0 8003ca8: d0f0 beq.n 8003c8c 8003caa: e014 b.n 8003cd6 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003cac: f7fd fa52 bl 8001154 8003cb0: 6138 str r0, [r7, #16] /* Wait till HSE is bypassed or disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8003cb2: e008 b.n 8003cc6 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8003cb4: f7fd fa4e bl 8001154 8003cb8: 4602 mov r2, r0 8003cba: 693b ldr r3, [r7, #16] 8003cbc: 1ad3 subs r3, r2, r3 8003cbe: 2b64 cmp r3, #100 @ 0x64 8003cc0: d901 bls.n 8003cc6 { return HAL_TIMEOUT; 8003cc2: 2303 movs r3, #3 8003cc4: e20b b.n 80040de while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8003cc6: 4b57 ldr r3, [pc, #348] @ (8003e24 ) 8003cc8: 681b ldr r3, [r3, #0] 8003cca: f403 3300 and.w r3, r3, #131072 @ 0x20000 8003cce: 2b00 cmp r3, #0 8003cd0: d1f0 bne.n 8003cb4 8003cd2: e000 b.n 8003cd6 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 8003cd4: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 8003cd6: 687b ldr r3, [r7, #4] 8003cd8: 681b ldr r3, [r3, #0] 8003cda: f003 0302 and.w r3, r3, #2 8003cde: 2b00 cmp r3, #0 8003ce0: d06f beq.n 8003dc2 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ #if defined(STM32F446xx) if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_HSI) 8003ce2: 4b50 ldr r3, [pc, #320] @ (8003e24 ) 8003ce4: 689b ldr r3, [r3, #8] 8003ce6: f003 030c and.w r3, r3, #12 8003cea: 2b00 cmp r3, #0 8003cec: d017 beq.n 8003d1e || \ ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) || \ 8003cee: 4b4d ldr r3, [pc, #308] @ (8003e24 ) 8003cf0: 689b ldr r3, [r3, #8] 8003cf2: f003 030c and.w r3, r3, #12 || \ 8003cf6: 2b08 cmp r3, #8 8003cf8: d105 bne.n 8003d06 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) || \ 8003cfa: 4b4a ldr r3, [pc, #296] @ (8003e24 ) 8003cfc: 685b ldr r3, [r3, #4] 8003cfe: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8003d02: 2b00 cmp r3, #0 8003d04: d00b beq.n 8003d1e ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) 8003d06: 4b47 ldr r3, [pc, #284] @ (8003e24 ) 8003d08: 689b ldr r3, [r3, #8] 8003d0a: f003 030c and.w r3, r3, #12 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI)) || \ 8003d0e: 2b0c cmp r3, #12 8003d10: d11c bne.n 8003d4c ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLLR) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) 8003d12: 4b44 ldr r3, [pc, #272] @ (8003e24 ) 8003d14: 685b ldr r3, [r3, #4] 8003d16: f403 0380 and.w r3, r3, #4194304 @ 0x400000 8003d1a: 2b00 cmp r3, #0 8003d1c: d116 bne.n 8003d4c || \ ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_CFGR_SWS_PLL) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) #endif /* STM32F446xx */ { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8003d1e: 4b41 ldr r3, [pc, #260] @ (8003e24 ) 8003d20: 681b ldr r3, [r3, #0] 8003d22: f003 0302 and.w r3, r3, #2 8003d26: 2b00 cmp r3, #0 8003d28: d005 beq.n 8003d36 8003d2a: 687b ldr r3, [r7, #4] 8003d2c: 68db ldr r3, [r3, #12] 8003d2e: 2b01 cmp r3, #1 8003d30: d001 beq.n 8003d36 { return HAL_ERROR; 8003d32: 2301 movs r3, #1 8003d34: e1d3 b.n 80040de } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8003d36: 4b3b ldr r3, [pc, #236] @ (8003e24 ) 8003d38: 681b ldr r3, [r3, #0] 8003d3a: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8003d3e: 687b ldr r3, [r7, #4] 8003d40: 691b ldr r3, [r3, #16] 8003d42: 00db lsls r3, r3, #3 8003d44: 4937 ldr r1, [pc, #220] @ (8003e24 ) 8003d46: 4313 orrs r3, r2 8003d48: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8003d4a: e03a b.n 8003dc2 } } else { /* Check the HSI State */ if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF) 8003d4c: 687b ldr r3, [r7, #4] 8003d4e: 68db ldr r3, [r3, #12] 8003d50: 2b00 cmp r3, #0 8003d52: d020 beq.n 8003d96 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 8003d54: 4b34 ldr r3, [pc, #208] @ (8003e28 ) 8003d56: 2201 movs r2, #1 8003d58: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003d5a: f7fd f9fb bl 8001154 8003d5e: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8003d60: e008 b.n 8003d74 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8003d62: f7fd f9f7 bl 8001154 8003d66: 4602 mov r2, r0 8003d68: 693b ldr r3, [r7, #16] 8003d6a: 1ad3 subs r3, r2, r3 8003d6c: 2b02 cmp r3, #2 8003d6e: d901 bls.n 8003d74 { return HAL_TIMEOUT; 8003d70: 2303 movs r3, #3 8003d72: e1b4 b.n 80040de while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8003d74: 4b2b ldr r3, [pc, #172] @ (8003e24 ) 8003d76: 681b ldr r3, [r3, #0] 8003d78: f003 0302 and.w r3, r3, #2 8003d7c: 2b00 cmp r3, #0 8003d7e: d0f0 beq.n 8003d62 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 8003d80: 4b28 ldr r3, [pc, #160] @ (8003e24 ) 8003d82: 681b ldr r3, [r3, #0] 8003d84: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8003d88: 687b ldr r3, [r7, #4] 8003d8a: 691b ldr r3, [r3, #16] 8003d8c: 00db lsls r3, r3, #3 8003d8e: 4925 ldr r1, [pc, #148] @ (8003e24 ) 8003d90: 4313 orrs r3, r2 8003d92: 600b str r3, [r1, #0] 8003d94: e015 b.n 8003dc2 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 8003d96: 4b24 ldr r3, [pc, #144] @ (8003e28 ) 8003d98: 2200 movs r2, #0 8003d9a: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003d9c: f7fd f9da bl 8001154 8003da0: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8003da2: e008 b.n 8003db6 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8003da4: f7fd f9d6 bl 8001154 8003da8: 4602 mov r2, r0 8003daa: 693b ldr r3, [r7, #16] 8003dac: 1ad3 subs r3, r2, r3 8003dae: 2b02 cmp r3, #2 8003db0: d901 bls.n 8003db6 { return HAL_TIMEOUT; 8003db2: 2303 movs r3, #3 8003db4: e193 b.n 80040de while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8003db6: 4b1b ldr r3, [pc, #108] @ (8003e24 ) 8003db8: 681b ldr r3, [r3, #0] 8003dba: f003 0302 and.w r3, r3, #2 8003dbe: 2b00 cmp r3, #0 8003dc0: d1f0 bne.n 8003da4 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8003dc2: 687b ldr r3, [r7, #4] 8003dc4: 681b ldr r3, [r3, #0] 8003dc6: f003 0308 and.w r3, r3, #8 8003dca: 2b00 cmp r3, #0 8003dcc: d036 beq.n 8003e3c { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF) 8003dce: 687b ldr r3, [r7, #4] 8003dd0: 695b ldr r3, [r3, #20] 8003dd2: 2b00 cmp r3, #0 8003dd4: d016 beq.n 8003e04 { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 8003dd6: 4b15 ldr r3, [pc, #84] @ (8003e2c ) 8003dd8: 2201 movs r2, #1 8003dda: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003ddc: f7fd f9ba bl 8001154 8003de0: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8003de2: e008 b.n 8003df6 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8003de4: f7fd f9b6 bl 8001154 8003de8: 4602 mov r2, r0 8003dea: 693b ldr r3, [r7, #16] 8003dec: 1ad3 subs r3, r2, r3 8003dee: 2b02 cmp r3, #2 8003df0: d901 bls.n 8003df6 { return HAL_TIMEOUT; 8003df2: 2303 movs r3, #3 8003df4: e173 b.n 80040de while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 8003df6: 4b0b ldr r3, [pc, #44] @ (8003e24 ) 8003df8: 6f5b ldr r3, [r3, #116] @ 0x74 8003dfa: f003 0302 and.w r3, r3, #2 8003dfe: 2b00 cmp r3, #0 8003e00: d0f0 beq.n 8003de4 8003e02: e01b b.n 8003e3c } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 8003e04: 4b09 ldr r3, [pc, #36] @ (8003e2c ) 8003e06: 2200 movs r2, #0 8003e08: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003e0a: f7fd f9a3 bl 8001154 8003e0e: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8003e10: e00e b.n 8003e30 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 8003e12: f7fd f99f bl 8001154 8003e16: 4602 mov r2, r0 8003e18: 693b ldr r3, [r7, #16] 8003e1a: 1ad3 subs r3, r2, r3 8003e1c: 2b02 cmp r3, #2 8003e1e: d907 bls.n 8003e30 { return HAL_TIMEOUT; 8003e20: 2303 movs r3, #3 8003e22: e15c b.n 80040de 8003e24: 40023800 .word 0x40023800 8003e28: 42470000 .word 0x42470000 8003e2c: 42470e80 .word 0x42470e80 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 8003e30: 4b8a ldr r3, [pc, #552] @ (800405c ) 8003e32: 6f5b ldr r3, [r3, #116] @ 0x74 8003e34: f003 0302 and.w r3, r3, #2 8003e38: 2b00 cmp r3, #0 8003e3a: d1ea bne.n 8003e12 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8003e3c: 687b ldr r3, [r7, #4] 8003e3e: 681b ldr r3, [r3, #0] 8003e40: f003 0304 and.w r3, r3, #4 8003e44: 2b00 cmp r3, #0 8003e46: f000 8097 beq.w 8003f78 { FlagStatus pwrclkchanged = RESET; 8003e4a: 2300 movs r3, #0 8003e4c: 75fb strb r3, [r7, #23] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8003e4e: 4b83 ldr r3, [pc, #524] @ (800405c ) 8003e50: 6c1b ldr r3, [r3, #64] @ 0x40 8003e52: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003e56: 2b00 cmp r3, #0 8003e58: d10f bne.n 8003e7a { __HAL_RCC_PWR_CLK_ENABLE(); 8003e5a: 2300 movs r3, #0 8003e5c: 60bb str r3, [r7, #8] 8003e5e: 4b7f ldr r3, [pc, #508] @ (800405c ) 8003e60: 6c1b ldr r3, [r3, #64] @ 0x40 8003e62: 4a7e ldr r2, [pc, #504] @ (800405c ) 8003e64: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8003e68: 6413 str r3, [r2, #64] @ 0x40 8003e6a: 4b7c ldr r3, [pc, #496] @ (800405c ) 8003e6c: 6c1b ldr r3, [r3, #64] @ 0x40 8003e6e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003e72: 60bb str r3, [r7, #8] 8003e74: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8003e76: 2301 movs r3, #1 8003e78: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8003e7a: 4b79 ldr r3, [pc, #484] @ (8004060 ) 8003e7c: 681b ldr r3, [r3, #0] 8003e7e: f403 7380 and.w r3, r3, #256 @ 0x100 8003e82: 2b00 cmp r3, #0 8003e84: d118 bne.n 8003eb8 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); 8003e86: 4b76 ldr r3, [pc, #472] @ (8004060 ) 8003e88: 681b ldr r3, [r3, #0] 8003e8a: 4a75 ldr r2, [pc, #468] @ (8004060 ) 8003e8c: f443 7380 orr.w r3, r3, #256 @ 0x100 8003e90: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8003e92: f7fd f95f bl 8001154 8003e96: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8003e98: e008 b.n 8003eac { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8003e9a: f7fd f95b bl 8001154 8003e9e: 4602 mov r2, r0 8003ea0: 693b ldr r3, [r7, #16] 8003ea2: 1ad3 subs r3, r2, r3 8003ea4: 2b02 cmp r3, #2 8003ea6: d901 bls.n 8003eac { return HAL_TIMEOUT; 8003ea8: 2303 movs r3, #3 8003eaa: e118 b.n 80040de while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) 8003eac: 4b6c ldr r3, [pc, #432] @ (8004060 ) 8003eae: 681b ldr r3, [r3, #0] 8003eb0: f403 7380 and.w r3, r3, #256 @ 0x100 8003eb4: 2b00 cmp r3, #0 8003eb6: d0f0 beq.n 8003e9a } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8003eb8: 687b ldr r3, [r7, #4] 8003eba: 689b ldr r3, [r3, #8] 8003ebc: 2b01 cmp r3, #1 8003ebe: d106 bne.n 8003ece 8003ec0: 4b66 ldr r3, [pc, #408] @ (800405c ) 8003ec2: 6f1b ldr r3, [r3, #112] @ 0x70 8003ec4: 4a65 ldr r2, [pc, #404] @ (800405c ) 8003ec6: f043 0301 orr.w r3, r3, #1 8003eca: 6713 str r3, [r2, #112] @ 0x70 8003ecc: e01c b.n 8003f08 8003ece: 687b ldr r3, [r7, #4] 8003ed0: 689b ldr r3, [r3, #8] 8003ed2: 2b05 cmp r3, #5 8003ed4: d10c bne.n 8003ef0 8003ed6: 4b61 ldr r3, [pc, #388] @ (800405c ) 8003ed8: 6f1b ldr r3, [r3, #112] @ 0x70 8003eda: 4a60 ldr r2, [pc, #384] @ (800405c ) 8003edc: f043 0304 orr.w r3, r3, #4 8003ee0: 6713 str r3, [r2, #112] @ 0x70 8003ee2: 4b5e ldr r3, [pc, #376] @ (800405c ) 8003ee4: 6f1b ldr r3, [r3, #112] @ 0x70 8003ee6: 4a5d ldr r2, [pc, #372] @ (800405c ) 8003ee8: f043 0301 orr.w r3, r3, #1 8003eec: 6713 str r3, [r2, #112] @ 0x70 8003eee: e00b b.n 8003f08 8003ef0: 4b5a ldr r3, [pc, #360] @ (800405c ) 8003ef2: 6f1b ldr r3, [r3, #112] @ 0x70 8003ef4: 4a59 ldr r2, [pc, #356] @ (800405c ) 8003ef6: f023 0301 bic.w r3, r3, #1 8003efa: 6713 str r3, [r2, #112] @ 0x70 8003efc: 4b57 ldr r3, [pc, #348] @ (800405c ) 8003efe: 6f1b ldr r3, [r3, #112] @ 0x70 8003f00: 4a56 ldr r2, [pc, #344] @ (800405c ) 8003f02: f023 0304 bic.w r3, r3, #4 8003f06: 6713 str r3, [r2, #112] @ 0x70 /* Check the LSE State */ if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) 8003f08: 687b ldr r3, [r7, #4] 8003f0a: 689b ldr r3, [r3, #8] 8003f0c: 2b00 cmp r3, #0 8003f0e: d015 beq.n 8003f3c { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003f10: f7fd f920 bl 8001154 8003f14: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8003f16: e00a b.n 8003f2e { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8003f18: f7fd f91c bl 8001154 8003f1c: 4602 mov r2, r0 8003f1e: 693b ldr r3, [r7, #16] 8003f20: 1ad3 subs r3, r2, r3 8003f22: f241 3288 movw r2, #5000 @ 0x1388 8003f26: 4293 cmp r3, r2 8003f28: d901 bls.n 8003f2e { return HAL_TIMEOUT; 8003f2a: 2303 movs r3, #3 8003f2c: e0d7 b.n 80040de while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8003f2e: 4b4b ldr r3, [pc, #300] @ (800405c ) 8003f30: 6f1b ldr r3, [r3, #112] @ 0x70 8003f32: f003 0302 and.w r3, r3, #2 8003f36: 2b00 cmp r3, #0 8003f38: d0ee beq.n 8003f18 8003f3a: e014 b.n 8003f66 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003f3c: f7fd f90a bl 8001154 8003f40: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8003f42: e00a b.n 8003f5a { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8003f44: f7fd f906 bl 8001154 8003f48: 4602 mov r2, r0 8003f4a: 693b ldr r3, [r7, #16] 8003f4c: 1ad3 subs r3, r2, r3 8003f4e: f241 3288 movw r2, #5000 @ 0x1388 8003f52: 4293 cmp r3, r2 8003f54: d901 bls.n 8003f5a { return HAL_TIMEOUT; 8003f56: 2303 movs r3, #3 8003f58: e0c1 b.n 80040de while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8003f5a: 4b40 ldr r3, [pc, #256] @ (800405c ) 8003f5c: 6f1b ldr r3, [r3, #112] @ 0x70 8003f5e: f003 0302 and.w r3, r3, #2 8003f62: 2b00 cmp r3, #0 8003f64: d1ee bne.n 8003f44 } } } /* Restore clock configuration if changed */ if (pwrclkchanged == SET) 8003f66: 7dfb ldrb r3, [r7, #23] 8003f68: 2b01 cmp r3, #1 8003f6a: d105 bne.n 8003f78 { __HAL_RCC_PWR_CLK_DISABLE(); 8003f6c: 4b3b ldr r3, [pc, #236] @ (800405c ) 8003f6e: 6c1b ldr r3, [r3, #64] @ 0x40 8003f70: 4a3a ldr r2, [pc, #232] @ (800405c ) 8003f72: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8003f76: 6413 str r3, [r2, #64] @ 0x40 } } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 8003f78: 687b ldr r3, [r7, #4] 8003f7a: 699b ldr r3, [r3, #24] 8003f7c: 2b00 cmp r3, #0 8003f7e: f000 80ad beq.w 80040dc { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) 8003f82: 4b36 ldr r3, [pc, #216] @ (800405c ) 8003f84: 689b ldr r3, [r3, #8] 8003f86: f003 030c and.w r3, r3, #12 8003f8a: 2b08 cmp r3, #8 8003f8c: d060 beq.n 8004050 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8003f8e: 687b ldr r3, [r7, #4] 8003f90: 699b ldr r3, [r3, #24] 8003f92: 2b02 cmp r3, #2 8003f94: d145 bne.n 8004022 assert_param(IS_RCC_PLLP_VALUE(RCC_OscInitStruct->PLL.PLLP)); assert_param(IS_RCC_PLLQ_VALUE(RCC_OscInitStruct->PLL.PLLQ)); assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8003f96: 4b33 ldr r3, [pc, #204] @ (8004064 ) 8003f98: 2200 movs r2, #0 8003f9a: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003f9c: f7fd f8da bl 8001154 8003fa0: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003fa2: e008 b.n 8003fb6 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8003fa4: f7fd f8d6 bl 8001154 8003fa8: 4602 mov r2, r0 8003faa: 693b ldr r3, [r7, #16] 8003fac: 1ad3 subs r3, r2, r3 8003fae: 2b02 cmp r3, #2 8003fb0: d901 bls.n 8003fb6 { return HAL_TIMEOUT; 8003fb2: 2303 movs r3, #3 8003fb4: e093 b.n 80040de while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003fb6: 4b29 ldr r3, [pc, #164] @ (800405c ) 8003fb8: 681b ldr r3, [r3, #0] 8003fba: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8003fbe: 2b00 cmp r3, #0 8003fc0: d1f0 bne.n 8003fa4 } } /* Configure the main PLL clock source, multiplication and division factors. */ WRITE_REG(RCC->PLLCFGR, (RCC_OscInitStruct->PLL.PLLSource | \ 8003fc2: 687b ldr r3, [r7, #4] 8003fc4: 69da ldr r2, [r3, #28] 8003fc6: 687b ldr r3, [r7, #4] 8003fc8: 6a1b ldr r3, [r3, #32] 8003fca: 431a orrs r2, r3 8003fcc: 687b ldr r3, [r7, #4] 8003fce: 6a5b ldr r3, [r3, #36] @ 0x24 8003fd0: 019b lsls r3, r3, #6 8003fd2: 431a orrs r2, r3 8003fd4: 687b ldr r3, [r7, #4] 8003fd6: 6a9b ldr r3, [r3, #40] @ 0x28 8003fd8: 085b lsrs r3, r3, #1 8003fda: 3b01 subs r3, #1 8003fdc: 041b lsls r3, r3, #16 8003fde: 431a orrs r2, r3 8003fe0: 687b ldr r3, [r7, #4] 8003fe2: 6adb ldr r3, [r3, #44] @ 0x2c 8003fe4: 061b lsls r3, r3, #24 8003fe6: 431a orrs r2, r3 8003fe8: 687b ldr r3, [r7, #4] 8003fea: 6b1b ldr r3, [r3, #48] @ 0x30 8003fec: 071b lsls r3, r3, #28 8003fee: 491b ldr r1, [pc, #108] @ (800405c ) 8003ff0: 4313 orrs r3, r2 8003ff2: 604b str r3, [r1, #4] (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos) | \ (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos) | \ (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos) | \ (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 8003ff4: 4b1b ldr r3, [pc, #108] @ (8004064 ) 8003ff6: 2201 movs r2, #1 8003ff8: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003ffa: f7fd f8ab bl 8001154 8003ffe: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004000: e008 b.n 8004014 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8004002: f7fd f8a7 bl 8001154 8004006: 4602 mov r2, r0 8004008: 693b ldr r3, [r7, #16] 800400a: 1ad3 subs r3, r2, r3 800400c: 2b02 cmp r3, #2 800400e: d901 bls.n 8004014 { return HAL_TIMEOUT; 8004010: 2303 movs r3, #3 8004012: e064 b.n 80040de while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 8004014: 4b11 ldr r3, [pc, #68] @ (800405c ) 8004016: 681b ldr r3, [r3, #0] 8004018: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800401c: 2b00 cmp r3, #0 800401e: d0f0 beq.n 8004002 8004020: e05c b.n 80040dc } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8004022: 4b10 ldr r3, [pc, #64] @ (8004064 ) 8004024: 2200 movs r2, #0 8004026: 601a str r2, [r3, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8004028: f7fd f894 bl 8001154 800402c: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800402e: e008 b.n 8004042 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8004030: f7fd f890 bl 8001154 8004034: 4602 mov r2, r0 8004036: 693b ldr r3, [r7, #16] 8004038: 1ad3 subs r3, r2, r3 800403a: 2b02 cmp r3, #2 800403c: d901 bls.n 8004042 { return HAL_TIMEOUT; 800403e: 2303 movs r3, #3 8004040: e04d b.n 80040de while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8004042: 4b06 ldr r3, [pc, #24] @ (800405c ) 8004044: 681b ldr r3, [r3, #0] 8004046: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800404a: 2b00 cmp r3, #0 800404c: d1f0 bne.n 8004030 800404e: e045 b.n 80040dc } } else { /* Check if there is a request to disable the PLL used as System clock source */ if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) 8004050: 687b ldr r3, [r7, #4] 8004052: 699b ldr r3, [r3, #24] 8004054: 2b01 cmp r3, #1 8004056: d107 bne.n 8004068 { return HAL_ERROR; 8004058: 2301 movs r3, #1 800405a: e040 b.n 80040de 800405c: 40023800 .word 0x40023800 8004060: 40007000 .word 0x40007000 8004064: 42470060 .word 0x42470060 } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->PLLCFGR; 8004068: 4b1f ldr r3, [pc, #124] @ (80040e8 ) 800406a: 685b ldr r3, [r3, #4] 800406c: 60fb str r3, [r7, #12] #if defined (RCC_PLLCFGR_PLLR) if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || 800406e: 687b ldr r3, [r7, #4] 8004070: 699b ldr r3, [r3, #24] 8004072: 2b01 cmp r3, #1 8004074: d030 beq.n 80040d8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8004076: 68fb ldr r3, [r7, #12] 8004078: f403 0280 and.w r2, r3, #4194304 @ 0x400000 800407c: 687b ldr r3, [r7, #4] 800407e: 69db ldr r3, [r3, #28] if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || 8004080: 429a cmp r2, r3 8004082: d129 bne.n 80040d8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || 8004084: 68fb ldr r3, [r7, #12] 8004086: f003 023f and.w r2, r3, #63 @ 0x3f 800408a: 687b ldr r3, [r7, #4] 800408c: 6a1b ldr r3, [r3, #32] (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 800408e: 429a cmp r2, r3 8004090: d122 bne.n 80040d8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || 8004092: 68fa ldr r2, [r7, #12] 8004094: f647 73c0 movw r3, #32704 @ 0x7fc0 8004098: 4013 ands r3, r2 800409a: 687a ldr r2, [r7, #4] 800409c: 6a52 ldr r2, [r2, #36] @ 0x24 800409e: 0192 lsls r2, r2, #6 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != (RCC_OscInitStruct->PLL.PLLM) << RCC_PLLCFGR_PLLM_Pos) || 80040a0: 4293 cmp r3, r2 80040a2: d119 bne.n 80040d8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || 80040a4: 68fb ldr r3, [r7, #12] 80040a6: f403 3240 and.w r2, r3, #196608 @ 0x30000 80040aa: 687b ldr r3, [r7, #4] 80040ac: 6a9b ldr r3, [r3, #40] @ 0x28 80040ae: 085b lsrs r3, r3, #1 80040b0: 3b01 subs r3, #1 80040b2: 041b lsls r3, r3, #16 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || 80040b4: 429a cmp r2, r3 80040b6: d10f bne.n 80040d8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || 80040b8: 68fb ldr r3, [r7, #12] 80040ba: f003 6270 and.w r2, r3, #251658240 @ 0xf000000 80040be: 687b ldr r3, [r7, #4] 80040c0: 6adb ldr r3, [r3, #44] @ 0x2c 80040c2: 061b lsls r3, r3, #24 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || 80040c4: 429a cmp r2, r3 80040c6: d107 bne.n 80040d8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))) 80040c8: 68fb ldr r3, [r7, #12] 80040ca: f003 42e0 and.w r2, r3, #1879048192 @ 0x70000000 80040ce: 687b ldr r3, [r7, #4] 80040d0: 6b1b ldr r3, [r3, #48] @ 0x30 80040d2: 071b lsls r3, r3, #28 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || 80040d4: 429a cmp r2, r3 80040d6: d001 beq.n 80040dc (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN) << RCC_PLLCFGR_PLLN_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != (((RCC_OscInitStruct->PLL.PLLP >> 1U) - 1U)) << RCC_PLLCFGR_PLLP_Pos) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))) #endif /* RCC_PLLCFGR_PLLR */ { return HAL_ERROR; 80040d8: 2301 movs r3, #1 80040da: e000 b.n 80040de } } } } return HAL_OK; 80040dc: 2300 movs r3, #0 } 80040de: 4618 mov r0, r3 80040e0: 3718 adds r7, #24 80040e2: 46bd mov sp, r7 80040e4: bd80 pop {r7, pc} 80040e6: bf00 nop 80040e8: 40023800 .word 0x40023800 080040ec : * Ex: call @ref HAL_TIM_OC_DeInit() before HAL_TIM_OC_Init() * @param htim TIM Output Compare handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim) { 80040ec: b580 push {r7, lr} 80040ee: b082 sub sp, #8 80040f0: af00 add r7, sp, #0 80040f2: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 80040f4: 687b ldr r3, [r7, #4] 80040f6: 2b00 cmp r3, #0 80040f8: d101 bne.n 80040fe { return HAL_ERROR; 80040fa: 2301 movs r3, #1 80040fc: e041 b.n 8004182 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 80040fe: 687b ldr r3, [r7, #4] 8004100: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8004104: b2db uxtb r3, r3 8004106: 2b00 cmp r3, #0 8004108: d106 bne.n 8004118 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 800410a: 687b ldr r3, [r7, #4] 800410c: 2200 movs r2, #0 800410e: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->OC_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_OC_MspInit(htim); 8004112: 6878 ldr r0, [r7, #4] 8004114: f7fc fd66 bl 8000be4 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 8004118: 687b ldr r3, [r7, #4] 800411a: 2202 movs r2, #2 800411c: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Init the base time for the Output Compare */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8004120: 687b ldr r3, [r7, #4] 8004122: 681a ldr r2, [r3, #0] 8004124: 687b ldr r3, [r7, #4] 8004126: 3304 adds r3, #4 8004128: 4619 mov r1, r3 800412a: 4610 mov r0, r2 800412c: f000 f930 bl 8004390 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8004130: 687b ldr r3, [r7, #4] 8004132: 2201 movs r2, #1 8004134: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8004138: 687b ldr r3, [r7, #4] 800413a: 2201 movs r2, #1 800413c: f883 203e strb.w r2, [r3, #62] @ 0x3e 8004140: 687b ldr r3, [r7, #4] 8004142: 2201 movs r2, #1 8004144: f883 203f strb.w r2, [r3, #63] @ 0x3f 8004148: 687b ldr r3, [r7, #4] 800414a: 2201 movs r2, #1 800414c: f883 2040 strb.w r2, [r3, #64] @ 0x40 8004150: 687b ldr r3, [r7, #4] 8004152: 2201 movs r2, #1 8004154: f883 2041 strb.w r2, [r3, #65] @ 0x41 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 8004158: 687b ldr r3, [r7, #4] 800415a: 2201 movs r2, #1 800415c: f883 2042 strb.w r2, [r3, #66] @ 0x42 8004160: 687b ldr r3, [r7, #4] 8004162: 2201 movs r2, #1 8004164: f883 2043 strb.w r2, [r3, #67] @ 0x43 8004168: 687b ldr r3, [r7, #4] 800416a: 2201 movs r2, #1 800416c: f883 2044 strb.w r2, [r3, #68] @ 0x44 8004170: 687b ldr r3, [r7, #4] 8004172: 2201 movs r2, #1 8004174: f883 2045 strb.w r2, [r3, #69] @ 0x45 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 8004178: 687b ldr r3, [r7, #4] 800417a: 2201 movs r2, #1 800417c: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 8004180: 2300 movs r3, #0 } 8004182: 4618 mov r0, r3 8004184: 3708 adds r7, #8 8004186: 46bd mov sp, r7 8004188: bd80 pop {r7, pc} 0800418a : * @param htim TIM Encoder Interface handle * @param sConfig TIM Encoder Interface configuration structure * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, const TIM_Encoder_InitTypeDef *sConfig) { 800418a: b580 push {r7, lr} 800418c: b086 sub sp, #24 800418e: af00 add r7, sp, #0 8004190: 6078 str r0, [r7, #4] 8004192: 6039 str r1, [r7, #0] uint32_t tmpsmcr; uint32_t tmpccmr1; uint32_t tmpccer; /* Check the TIM handle allocation */ if (htim == NULL) 8004194: 687b ldr r3, [r7, #4] 8004196: 2b00 cmp r3, #0 8004198: d101 bne.n 800419e { return HAL_ERROR; 800419a: 2301 movs r3, #1 800419c: e097 b.n 80042ce assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); if (htim->State == HAL_TIM_STATE_RESET) 800419e: 687b ldr r3, [r7, #4] 80041a0: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 80041a4: b2db uxtb r3, r3 80041a6: 2b00 cmp r3, #0 80041a8: d106 bne.n 80041b8 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 80041aa: 687b ldr r3, [r7, #4] 80041ac: 2200 movs r2, #0 80041ae: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Encoder_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ HAL_TIM_Encoder_MspInit(htim); 80041b2: 6878 ldr r0, [r7, #4] 80041b4: f7fc fd36 bl 8000c24 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 80041b8: 687b ldr r3, [r7, #4] 80041ba: 2202 movs r2, #2 80041bc: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Reset the SMS and ECE bits */ htim->Instance->SMCR &= ~(TIM_SMCR_SMS | TIM_SMCR_ECE); 80041c0: 687b ldr r3, [r7, #4] 80041c2: 681b ldr r3, [r3, #0] 80041c4: 689b ldr r3, [r3, #8] 80041c6: 687a ldr r2, [r7, #4] 80041c8: 6812 ldr r2, [r2, #0] 80041ca: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80041ce: f023 0307 bic.w r3, r3, #7 80041d2: 6093 str r3, [r2, #8] /* Configure the Time base in the Encoder Mode */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 80041d4: 687b ldr r3, [r7, #4] 80041d6: 681a ldr r2, [r3, #0] 80041d8: 687b ldr r3, [r7, #4] 80041da: 3304 adds r3, #4 80041dc: 4619 mov r1, r3 80041de: 4610 mov r0, r2 80041e0: f000 f8d6 bl 8004390 /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 80041e4: 687b ldr r3, [r7, #4] 80041e6: 681b ldr r3, [r3, #0] 80041e8: 689b ldr r3, [r3, #8] 80041ea: 617b str r3, [r7, #20] /* Get the TIMx CCMR1 register value */ tmpccmr1 = htim->Instance->CCMR1; 80041ec: 687b ldr r3, [r7, #4] 80041ee: 681b ldr r3, [r3, #0] 80041f0: 699b ldr r3, [r3, #24] 80041f2: 613b str r3, [r7, #16] /* Get the TIMx CCER register value */ tmpccer = htim->Instance->CCER; 80041f4: 687b ldr r3, [r7, #4] 80041f6: 681b ldr r3, [r3, #0] 80041f8: 6a1b ldr r3, [r3, #32] 80041fa: 60fb str r3, [r7, #12] /* Set the encoder Mode */ tmpsmcr |= sConfig->EncoderMode; 80041fc: 683b ldr r3, [r7, #0] 80041fe: 681b ldr r3, [r3, #0] 8004200: 697a ldr r2, [r7, #20] 8004202: 4313 orrs r3, r2 8004204: 617b str r3, [r7, #20] /* Select the Capture Compare 1 and the Capture Compare 2 as input */ tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); 8004206: 693b ldr r3, [r7, #16] 8004208: f423 7340 bic.w r3, r3, #768 @ 0x300 800420c: f023 0303 bic.w r3, r3, #3 8004210: 613b str r3, [r7, #16] tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8U)); 8004212: 683b ldr r3, [r7, #0] 8004214: 689a ldr r2, [r3, #8] 8004216: 683b ldr r3, [r7, #0] 8004218: 699b ldr r3, [r3, #24] 800421a: 021b lsls r3, r3, #8 800421c: 4313 orrs r3, r2 800421e: 693a ldr r2, [r7, #16] 8004220: 4313 orrs r3, r2 8004222: 613b str r3, [r7, #16] /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); 8004224: 693b ldr r3, [r7, #16] 8004226: f423 6340 bic.w r3, r3, #3072 @ 0xc00 800422a: f023 030c bic.w r3, r3, #12 800422e: 613b str r3, [r7, #16] tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); 8004230: 693b ldr r3, [r7, #16] 8004232: f423 4370 bic.w r3, r3, #61440 @ 0xf000 8004236: f023 03f0 bic.w r3, r3, #240 @ 0xf0 800423a: 613b str r3, [r7, #16] tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U); 800423c: 683b ldr r3, [r7, #0] 800423e: 68da ldr r2, [r3, #12] 8004240: 683b ldr r3, [r7, #0] 8004242: 69db ldr r3, [r3, #28] 8004244: 021b lsls r3, r3, #8 8004246: 4313 orrs r3, r2 8004248: 693a ldr r2, [r7, #16] 800424a: 4313 orrs r3, r2 800424c: 613b str r3, [r7, #16] tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U); 800424e: 683b ldr r3, [r7, #0] 8004250: 691b ldr r3, [r3, #16] 8004252: 011a lsls r2, r3, #4 8004254: 683b ldr r3, [r7, #0] 8004256: 6a1b ldr r3, [r3, #32] 8004258: 031b lsls r3, r3, #12 800425a: 4313 orrs r3, r2 800425c: 693a ldr r2, [r7, #16] 800425e: 4313 orrs r3, r2 8004260: 613b str r3, [r7, #16] /* Set the TI1 and the TI2 Polarities */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); 8004262: 68fb ldr r3, [r7, #12] 8004264: f023 0322 bic.w r3, r3, #34 @ 0x22 8004268: 60fb str r3, [r7, #12] tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); 800426a: 68fb ldr r3, [r7, #12] 800426c: f023 0388 bic.w r3, r3, #136 @ 0x88 8004270: 60fb str r3, [r7, #12] tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U); 8004272: 683b ldr r3, [r7, #0] 8004274: 685a ldr r2, [r3, #4] 8004276: 683b ldr r3, [r7, #0] 8004278: 695b ldr r3, [r3, #20] 800427a: 011b lsls r3, r3, #4 800427c: 4313 orrs r3, r2 800427e: 68fa ldr r2, [r7, #12] 8004280: 4313 orrs r3, r2 8004282: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 8004284: 687b ldr r3, [r7, #4] 8004286: 681b ldr r3, [r3, #0] 8004288: 697a ldr r2, [r7, #20] 800428a: 609a str r2, [r3, #8] /* Write to TIMx CCMR1 */ htim->Instance->CCMR1 = tmpccmr1; 800428c: 687b ldr r3, [r7, #4] 800428e: 681b ldr r3, [r3, #0] 8004290: 693a ldr r2, [r7, #16] 8004292: 619a str r2, [r3, #24] /* Write to TIMx CCER */ htim->Instance->CCER = tmpccer; 8004294: 687b ldr r3, [r7, #4] 8004296: 681b ldr r3, [r3, #0] 8004298: 68fa ldr r2, [r7, #12] 800429a: 621a str r2, [r3, #32] /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 800429c: 687b ldr r3, [r7, #4] 800429e: 2201 movs r2, #1 80042a0: f883 2046 strb.w r2, [r3, #70] @ 0x46 /* Set the TIM channels state */ TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 80042a4: 687b ldr r3, [r7, #4] 80042a6: 2201 movs r2, #1 80042a8: f883 203e strb.w r2, [r3, #62] @ 0x3e TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 80042ac: 687b ldr r3, [r7, #4] 80042ae: 2201 movs r2, #1 80042b0: f883 203f strb.w r2, [r3, #63] @ 0x3f TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY); 80042b4: 687b ldr r3, [r7, #4] 80042b6: 2201 movs r2, #1 80042b8: f883 2042 strb.w r2, [r3, #66] @ 0x42 TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY); 80042bc: 687b ldr r3, [r7, #4] 80042be: 2201 movs r2, #1 80042c0: f883 2043 strb.w r2, [r3, #67] @ 0x43 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 80042c4: 687b ldr r3, [r7, #4] 80042c6: 2201 movs r2, #1 80042c8: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 80042cc: 2300 movs r3, #0 } 80042ce: 4618 mov r0, r3 80042d0: 3718 adds r7, #24 80042d2: 46bd mov sp, r7 80042d4: bd80 pop {r7, pc} ... 080042d8 : * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, const TIM_OC_InitTypeDef *sConfig, uint32_t Channel) { 80042d8: b580 push {r7, lr} 80042da: b086 sub sp, #24 80042dc: af00 add r7, sp, #0 80042de: 60f8 str r0, [r7, #12] 80042e0: 60b9 str r1, [r7, #8] 80042e2: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 80042e4: 2300 movs r3, #0 80042e6: 75fb strb r3, [r7, #23] assert_param(IS_TIM_CHANNELS(Channel)); assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); /* Process Locked */ __HAL_LOCK(htim); 80042e8: 68fb ldr r3, [r7, #12] 80042ea: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 80042ee: 2b01 cmp r3, #1 80042f0: d101 bne.n 80042f6 80042f2: 2302 movs r3, #2 80042f4: e048 b.n 8004388 80042f6: 68fb ldr r3, [r7, #12] 80042f8: 2201 movs r2, #1 80042fa: f883 203c strb.w r2, [r3, #60] @ 0x3c switch (Channel) 80042fe: 687b ldr r3, [r7, #4] 8004300: 2b0c cmp r3, #12 8004302: d839 bhi.n 8004378 8004304: a201 add r2, pc, #4 @ (adr r2, 800430c ) 8004306: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800430a: bf00 nop 800430c: 08004341 .word 0x08004341 8004310: 08004379 .word 0x08004379 8004314: 08004379 .word 0x08004379 8004318: 08004379 .word 0x08004379 800431c: 0800434f .word 0x0800434f 8004320: 08004379 .word 0x08004379 8004324: 08004379 .word 0x08004379 8004328: 08004379 .word 0x08004379 800432c: 0800435d .word 0x0800435d 8004330: 08004379 .word 0x08004379 8004334: 08004379 .word 0x08004379 8004338: 08004379 .word 0x08004379 800433c: 0800436b .word 0x0800436b { /* Check the parameters */ assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); /* Configure the TIM Channel 1 in Output Compare */ TIM_OC1_SetConfig(htim->Instance, sConfig); 8004340: 68fb ldr r3, [r7, #12] 8004342: 681b ldr r3, [r3, #0] 8004344: 68b9 ldr r1, [r7, #8] 8004346: 4618 mov r0, r3 8004348: f000 f8c8 bl 80044dc break; 800434c: e017 b.n 800437e { /* Check the parameters */ assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); /* Configure the TIM Channel 2 in Output Compare */ TIM_OC2_SetConfig(htim->Instance, sConfig); 800434e: 68fb ldr r3, [r7, #12] 8004350: 681b ldr r3, [r3, #0] 8004352: 68b9 ldr r1, [r7, #8] 8004354: 4618 mov r0, r3 8004356: f000 f931 bl 80045bc break; 800435a: e010 b.n 800437e { /* Check the parameters */ assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); /* Configure the TIM Channel 3 in Output Compare */ TIM_OC3_SetConfig(htim->Instance, sConfig); 800435c: 68fb ldr r3, [r7, #12] 800435e: 681b ldr r3, [r3, #0] 8004360: 68b9 ldr r1, [r7, #8] 8004362: 4618 mov r0, r3 8004364: f000 f9a0 bl 80046a8 break; 8004368: e009 b.n 800437e { /* Check the parameters */ assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); /* Configure the TIM Channel 4 in Output Compare */ TIM_OC4_SetConfig(htim->Instance, sConfig); 800436a: 68fb ldr r3, [r7, #12] 800436c: 681b ldr r3, [r3, #0] 800436e: 68b9 ldr r1, [r7, #8] 8004370: 4618 mov r0, r3 8004372: f000 fa0d bl 8004790 break; 8004376: e002 b.n 800437e } default: status = HAL_ERROR; 8004378: 2301 movs r3, #1 800437a: 75fb strb r3, [r7, #23] break; 800437c: bf00 nop } __HAL_UNLOCK(htim); 800437e: 68fb ldr r3, [r7, #12] 8004380: 2200 movs r2, #0 8004382: f883 203c strb.w r2, [r3, #60] @ 0x3c return status; 8004386: 7dfb ldrb r3, [r7, #23] } 8004388: 4618 mov r0, r3 800438a: 3718 adds r7, #24 800438c: 46bd mov sp, r7 800438e: bd80 pop {r7, pc} 08004390 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 8004390: b480 push {r7} 8004392: b085 sub sp, #20 8004394: af00 add r7, sp, #0 8004396: 6078 str r0, [r7, #4] 8004398: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 800439a: 687b ldr r3, [r7, #4] 800439c: 681b ldr r3, [r3, #0] 800439e: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 80043a0: 687b ldr r3, [r7, #4] 80043a2: 4a43 ldr r2, [pc, #268] @ (80044b0 ) 80043a4: 4293 cmp r3, r2 80043a6: d013 beq.n 80043d0 80043a8: 687b ldr r3, [r7, #4] 80043aa: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80043ae: d00f beq.n 80043d0 80043b0: 687b ldr r3, [r7, #4] 80043b2: 4a40 ldr r2, [pc, #256] @ (80044b4 ) 80043b4: 4293 cmp r3, r2 80043b6: d00b beq.n 80043d0 80043b8: 687b ldr r3, [r7, #4] 80043ba: 4a3f ldr r2, [pc, #252] @ (80044b8 ) 80043bc: 4293 cmp r3, r2 80043be: d007 beq.n 80043d0 80043c0: 687b ldr r3, [r7, #4] 80043c2: 4a3e ldr r2, [pc, #248] @ (80044bc ) 80043c4: 4293 cmp r3, r2 80043c6: d003 beq.n 80043d0 80043c8: 687b ldr r3, [r7, #4] 80043ca: 4a3d ldr r2, [pc, #244] @ (80044c0 ) 80043cc: 4293 cmp r3, r2 80043ce: d108 bne.n 80043e2 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 80043d0: 68fb ldr r3, [r7, #12] 80043d2: f023 0370 bic.w r3, r3, #112 @ 0x70 80043d6: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 80043d8: 683b ldr r3, [r7, #0] 80043da: 685b ldr r3, [r3, #4] 80043dc: 68fa ldr r2, [r7, #12] 80043de: 4313 orrs r3, r2 80043e0: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 80043e2: 687b ldr r3, [r7, #4] 80043e4: 4a32 ldr r2, [pc, #200] @ (80044b0 ) 80043e6: 4293 cmp r3, r2 80043e8: d02b beq.n 8004442 80043ea: 687b ldr r3, [r7, #4] 80043ec: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80043f0: d027 beq.n 8004442 80043f2: 687b ldr r3, [r7, #4] 80043f4: 4a2f ldr r2, [pc, #188] @ (80044b4 ) 80043f6: 4293 cmp r3, r2 80043f8: d023 beq.n 8004442 80043fa: 687b ldr r3, [r7, #4] 80043fc: 4a2e ldr r2, [pc, #184] @ (80044b8 ) 80043fe: 4293 cmp r3, r2 8004400: d01f beq.n 8004442 8004402: 687b ldr r3, [r7, #4] 8004404: 4a2d ldr r2, [pc, #180] @ (80044bc ) 8004406: 4293 cmp r3, r2 8004408: d01b beq.n 8004442 800440a: 687b ldr r3, [r7, #4] 800440c: 4a2c ldr r2, [pc, #176] @ (80044c0 ) 800440e: 4293 cmp r3, r2 8004410: d017 beq.n 8004442 8004412: 687b ldr r3, [r7, #4] 8004414: 4a2b ldr r2, [pc, #172] @ (80044c4 ) 8004416: 4293 cmp r3, r2 8004418: d013 beq.n 8004442 800441a: 687b ldr r3, [r7, #4] 800441c: 4a2a ldr r2, [pc, #168] @ (80044c8 ) 800441e: 4293 cmp r3, r2 8004420: d00f beq.n 8004442 8004422: 687b ldr r3, [r7, #4] 8004424: 4a29 ldr r2, [pc, #164] @ (80044cc ) 8004426: 4293 cmp r3, r2 8004428: d00b beq.n 8004442 800442a: 687b ldr r3, [r7, #4] 800442c: 4a28 ldr r2, [pc, #160] @ (80044d0 ) 800442e: 4293 cmp r3, r2 8004430: d007 beq.n 8004442 8004432: 687b ldr r3, [r7, #4] 8004434: 4a27 ldr r2, [pc, #156] @ (80044d4 ) 8004436: 4293 cmp r3, r2 8004438: d003 beq.n 8004442 800443a: 687b ldr r3, [r7, #4] 800443c: 4a26 ldr r2, [pc, #152] @ (80044d8 ) 800443e: 4293 cmp r3, r2 8004440: d108 bne.n 8004454 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 8004442: 68fb ldr r3, [r7, #12] 8004444: f423 7340 bic.w r3, r3, #768 @ 0x300 8004448: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 800444a: 683b ldr r3, [r7, #0] 800444c: 68db ldr r3, [r3, #12] 800444e: 68fa ldr r2, [r7, #12] 8004450: 4313 orrs r3, r2 8004452: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 8004454: 68fb ldr r3, [r7, #12] 8004456: f023 0280 bic.w r2, r3, #128 @ 0x80 800445a: 683b ldr r3, [r7, #0] 800445c: 695b ldr r3, [r3, #20] 800445e: 4313 orrs r3, r2 8004460: 60fb str r3, [r7, #12] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 8004462: 683b ldr r3, [r7, #0] 8004464: 689a ldr r2, [r3, #8] 8004466: 687b ldr r3, [r7, #4] 8004468: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 800446a: 683b ldr r3, [r7, #0] 800446c: 681a ldr r2, [r3, #0] 800446e: 687b ldr r3, [r7, #4] 8004470: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8004472: 687b ldr r3, [r7, #4] 8004474: 4a0e ldr r2, [pc, #56] @ (80044b0 ) 8004476: 4293 cmp r3, r2 8004478: d003 beq.n 8004482 800447a: 687b ldr r3, [r7, #4] 800447c: 4a10 ldr r2, [pc, #64] @ (80044c0 ) 800447e: 4293 cmp r3, r2 8004480: d103 bne.n 800448a { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8004482: 683b ldr r3, [r7, #0] 8004484: 691a ldr r2, [r3, #16] 8004486: 687b ldr r3, [r7, #4] 8004488: 631a str r2, [r3, #48] @ 0x30 } /* Disable Update Event (UEV) with Update Generation (UG) by changing Update Request Source (URS) to avoid Update flag (UIF) */ SET_BIT(TIMx->CR1, TIM_CR1_URS); 800448a: 687b ldr r3, [r7, #4] 800448c: 681b ldr r3, [r3, #0] 800448e: f043 0204 orr.w r2, r3, #4 8004492: 687b ldr r3, [r7, #4] 8004494: 601a str r2, [r3, #0] /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 8004496: 687b ldr r3, [r7, #4] 8004498: 2201 movs r2, #1 800449a: 615a str r2, [r3, #20] TIMx->CR1 = tmpcr1; 800449c: 687b ldr r3, [r7, #4] 800449e: 68fa ldr r2, [r7, #12] 80044a0: 601a str r2, [r3, #0] } 80044a2: bf00 nop 80044a4: 3714 adds r7, #20 80044a6: 46bd mov sp, r7 80044a8: f85d 7b04 ldr.w r7, [sp], #4 80044ac: 4770 bx lr 80044ae: bf00 nop 80044b0: 40010000 .word 0x40010000 80044b4: 40000400 .word 0x40000400 80044b8: 40000800 .word 0x40000800 80044bc: 40000c00 .word 0x40000c00 80044c0: 40010400 .word 0x40010400 80044c4: 40014000 .word 0x40014000 80044c8: 40014400 .word 0x40014400 80044cc: 40014800 .word 0x40014800 80044d0: 40001800 .word 0x40001800 80044d4: 40001c00 .word 0x40001c00 80044d8: 40002000 .word 0x40002000 080044dc : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80044dc: b480 push {r7} 80044de: b087 sub sp, #28 80044e0: af00 add r7, sp, #0 80044e2: 6078 str r0, [r7, #4] 80044e4: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80044e6: 687b ldr r3, [r7, #4] 80044e8: 6a1b ldr r3, [r3, #32] 80044ea: 617b str r3, [r7, #20] /* Disable the Channel 1: Reset the CC1E Bit */ TIMx->CCER &= ~TIM_CCER_CC1E; 80044ec: 687b ldr r3, [r7, #4] 80044ee: 6a1b ldr r3, [r3, #32] 80044f0: f023 0201 bic.w r2, r3, #1 80044f4: 687b ldr r3, [r7, #4] 80044f6: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80044f8: 687b ldr r3, [r7, #4] 80044fa: 685b ldr r3, [r3, #4] 80044fc: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 80044fe: 687b ldr r3, [r7, #4] 8004500: 699b ldr r3, [r3, #24] 8004502: 60fb str r3, [r7, #12] /* Reset the Output Compare Mode Bits */ tmpccmrx &= ~TIM_CCMR1_OC1M; 8004504: 68fb ldr r3, [r7, #12] 8004506: f023 0370 bic.w r3, r3, #112 @ 0x70 800450a: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC1S; 800450c: 68fb ldr r3, [r7, #12] 800450e: f023 0303 bic.w r3, r3, #3 8004512: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 8004514: 683b ldr r3, [r7, #0] 8004516: 681b ldr r3, [r3, #0] 8004518: 68fa ldr r2, [r7, #12] 800451a: 4313 orrs r3, r2 800451c: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC1P; 800451e: 697b ldr r3, [r7, #20] 8004520: f023 0302 bic.w r3, r3, #2 8004524: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= OC_Config->OCPolarity; 8004526: 683b ldr r3, [r7, #0] 8004528: 689b ldr r3, [r3, #8] 800452a: 697a ldr r2, [r7, #20] 800452c: 4313 orrs r3, r2 800452e: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) 8004530: 687b ldr r3, [r7, #4] 8004532: 4a20 ldr r2, [pc, #128] @ (80045b4 ) 8004534: 4293 cmp r3, r2 8004536: d003 beq.n 8004540 8004538: 687b ldr r3, [r7, #4] 800453a: 4a1f ldr r2, [pc, #124] @ (80045b8 ) 800453c: 4293 cmp r3, r2 800453e: d10c bne.n 800455a { /* Check parameters */ assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC1NP; 8004540: 697b ldr r3, [r7, #20] 8004542: f023 0308 bic.w r3, r3, #8 8004546: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= OC_Config->OCNPolarity; 8004548: 683b ldr r3, [r7, #0] 800454a: 68db ldr r3, [r3, #12] 800454c: 697a ldr r2, [r7, #20] 800454e: 4313 orrs r3, r2 8004550: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC1NE; 8004552: 697b ldr r3, [r7, #20] 8004554: f023 0304 bic.w r3, r3, #4 8004558: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 800455a: 687b ldr r3, [r7, #4] 800455c: 4a15 ldr r2, [pc, #84] @ (80045b4 ) 800455e: 4293 cmp r3, r2 8004560: d003 beq.n 800456a 8004562: 687b ldr r3, [r7, #4] 8004564: 4a14 ldr r2, [pc, #80] @ (80045b8 ) 8004566: 4293 cmp r3, r2 8004568: d111 bne.n 800458e /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS1; 800456a: 693b ldr r3, [r7, #16] 800456c: f423 7380 bic.w r3, r3, #256 @ 0x100 8004570: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS1N; 8004572: 693b ldr r3, [r7, #16] 8004574: f423 7300 bic.w r3, r3, #512 @ 0x200 8004578: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= OC_Config->OCIdleState; 800457a: 683b ldr r3, [r7, #0] 800457c: 695b ldr r3, [r3, #20] 800457e: 693a ldr r2, [r7, #16] 8004580: 4313 orrs r3, r2 8004582: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= OC_Config->OCNIdleState; 8004584: 683b ldr r3, [r7, #0] 8004586: 699b ldr r3, [r3, #24] 8004588: 693a ldr r2, [r7, #16] 800458a: 4313 orrs r3, r2 800458c: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 800458e: 687b ldr r3, [r7, #4] 8004590: 693a ldr r2, [r7, #16] 8004592: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 8004594: 687b ldr r3, [r7, #4] 8004596: 68fa ldr r2, [r7, #12] 8004598: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR1 = OC_Config->Pulse; 800459a: 683b ldr r3, [r7, #0] 800459c: 685a ldr r2, [r3, #4] 800459e: 687b ldr r3, [r7, #4] 80045a0: 635a str r2, [r3, #52] @ 0x34 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 80045a2: 687b ldr r3, [r7, #4] 80045a4: 697a ldr r2, [r7, #20] 80045a6: 621a str r2, [r3, #32] } 80045a8: bf00 nop 80045aa: 371c adds r7, #28 80045ac: 46bd mov sp, r7 80045ae: f85d 7b04 ldr.w r7, [sp], #4 80045b2: 4770 bx lr 80045b4: 40010000 .word 0x40010000 80045b8: 40010400 .word 0x40010400 080045bc : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80045bc: b480 push {r7} 80045be: b087 sub sp, #28 80045c0: af00 add r7, sp, #0 80045c2: 6078 str r0, [r7, #4] 80045c4: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80045c6: 687b ldr r3, [r7, #4] 80045c8: 6a1b ldr r3, [r3, #32] 80045ca: 617b str r3, [r7, #20] /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; 80045cc: 687b ldr r3, [r7, #4] 80045ce: 6a1b ldr r3, [r3, #32] 80045d0: f023 0210 bic.w r2, r3, #16 80045d4: 687b ldr r3, [r7, #4] 80045d6: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80045d8: 687b ldr r3, [r7, #4] 80045da: 685b ldr r3, [r3, #4] 80045dc: 613b str r3, [r7, #16] /* Get the TIMx CCMR1 register value */ tmpccmrx = TIMx->CCMR1; 80045de: 687b ldr r3, [r7, #4] 80045e0: 699b ldr r3, [r3, #24] 80045e2: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR1_OC2M; 80045e4: 68fb ldr r3, [r7, #12] 80045e6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80045ea: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR1_CC2S; 80045ec: 68fb ldr r3, [r7, #12] 80045ee: f423 7340 bic.w r3, r3, #768 @ 0x300 80045f2: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 80045f4: 683b ldr r3, [r7, #0] 80045f6: 681b ldr r3, [r3, #0] 80045f8: 021b lsls r3, r3, #8 80045fa: 68fa ldr r2, [r7, #12] 80045fc: 4313 orrs r3, r2 80045fe: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC2P; 8004600: 697b ldr r3, [r7, #20] 8004602: f023 0320 bic.w r3, r3, #32 8004606: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 4U); 8004608: 683b ldr r3, [r7, #0] 800460a: 689b ldr r3, [r3, #8] 800460c: 011b lsls r3, r3, #4 800460e: 697a ldr r2, [r7, #20] 8004610: 4313 orrs r3, r2 8004612: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) 8004614: 687b ldr r3, [r7, #4] 8004616: 4a22 ldr r2, [pc, #136] @ (80046a0 ) 8004618: 4293 cmp r3, r2 800461a: d003 beq.n 8004624 800461c: 687b ldr r3, [r7, #4] 800461e: 4a21 ldr r2, [pc, #132] @ (80046a4 ) 8004620: 4293 cmp r3, r2 8004622: d10d bne.n 8004640 { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC2NP; 8004624: 697b ldr r3, [r7, #20] 8004626: f023 0380 bic.w r3, r3, #128 @ 0x80 800462a: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 4U); 800462c: 683b ldr r3, [r7, #0] 800462e: 68db ldr r3, [r3, #12] 8004630: 011b lsls r3, r3, #4 8004632: 697a ldr r2, [r7, #20] 8004634: 4313 orrs r3, r2 8004636: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC2NE; 8004638: 697b ldr r3, [r7, #20] 800463a: f023 0340 bic.w r3, r3, #64 @ 0x40 800463e: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 8004640: 687b ldr r3, [r7, #4] 8004642: 4a17 ldr r2, [pc, #92] @ (80046a0 ) 8004644: 4293 cmp r3, r2 8004646: d003 beq.n 8004650 8004648: 687b ldr r3, [r7, #4] 800464a: 4a16 ldr r2, [pc, #88] @ (80046a4 ) 800464c: 4293 cmp r3, r2 800464e: d113 bne.n 8004678 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS2; 8004650: 693b ldr r3, [r7, #16] 8004652: f423 6380 bic.w r3, r3, #1024 @ 0x400 8004656: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS2N; 8004658: 693b ldr r3, [r7, #16] 800465a: f423 6300 bic.w r3, r3, #2048 @ 0x800 800465e: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 2U); 8004660: 683b ldr r3, [r7, #0] 8004662: 695b ldr r3, [r3, #20] 8004664: 009b lsls r3, r3, #2 8004666: 693a ldr r2, [r7, #16] 8004668: 4313 orrs r3, r2 800466a: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 2U); 800466c: 683b ldr r3, [r7, #0] 800466e: 699b ldr r3, [r3, #24] 8004670: 009b lsls r3, r3, #2 8004672: 693a ldr r2, [r7, #16] 8004674: 4313 orrs r3, r2 8004676: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8004678: 687b ldr r3, [r7, #4] 800467a: 693a ldr r2, [r7, #16] 800467c: 605a str r2, [r3, #4] /* Write to TIMx CCMR1 */ TIMx->CCMR1 = tmpccmrx; 800467e: 687b ldr r3, [r7, #4] 8004680: 68fa ldr r2, [r7, #12] 8004682: 619a str r2, [r3, #24] /* Set the Capture Compare Register value */ TIMx->CCR2 = OC_Config->Pulse; 8004684: 683b ldr r3, [r7, #0] 8004686: 685a ldr r2, [r3, #4] 8004688: 687b ldr r3, [r7, #4] 800468a: 639a str r2, [r3, #56] @ 0x38 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 800468c: 687b ldr r3, [r7, #4] 800468e: 697a ldr r2, [r7, #20] 8004690: 621a str r2, [r3, #32] } 8004692: bf00 nop 8004694: 371c adds r7, #28 8004696: 46bd mov sp, r7 8004698: f85d 7b04 ldr.w r7, [sp], #4 800469c: 4770 bx lr 800469e: bf00 nop 80046a0: 40010000 .word 0x40010000 80046a4: 40010400 .word 0x40010400 080046a8 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 80046a8: b480 push {r7} 80046aa: b087 sub sp, #28 80046ac: af00 add r7, sp, #0 80046ae: 6078 str r0, [r7, #4] 80046b0: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 80046b2: 687b ldr r3, [r7, #4] 80046b4: 6a1b ldr r3, [r3, #32] 80046b6: 617b str r3, [r7, #20] /* Disable the Channel 3: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC3E; 80046b8: 687b ldr r3, [r7, #4] 80046ba: 6a1b ldr r3, [r3, #32] 80046bc: f423 7280 bic.w r2, r3, #256 @ 0x100 80046c0: 687b ldr r3, [r7, #4] 80046c2: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80046c4: 687b ldr r3, [r7, #4] 80046c6: 685b ldr r3, [r3, #4] 80046c8: 613b str r3, [r7, #16] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 80046ca: 687b ldr r3, [r7, #4] 80046cc: 69db ldr r3, [r3, #28] 80046ce: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC3M; 80046d0: 68fb ldr r3, [r7, #12] 80046d2: f023 0370 bic.w r3, r3, #112 @ 0x70 80046d6: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC3S; 80046d8: 68fb ldr r3, [r7, #12] 80046da: f023 0303 bic.w r3, r3, #3 80046de: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= OC_Config->OCMode; 80046e0: 683b ldr r3, [r7, #0] 80046e2: 681b ldr r3, [r3, #0] 80046e4: 68fa ldr r2, [r7, #12] 80046e6: 4313 orrs r3, r2 80046e8: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC3P; 80046ea: 697b ldr r3, [r7, #20] 80046ec: f423 7300 bic.w r3, r3, #512 @ 0x200 80046f0: 617b str r3, [r7, #20] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 8U); 80046f2: 683b ldr r3, [r7, #0] 80046f4: 689b ldr r3, [r3, #8] 80046f6: 021b lsls r3, r3, #8 80046f8: 697a ldr r2, [r7, #20] 80046fa: 4313 orrs r3, r2 80046fc: 617b str r3, [r7, #20] if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) 80046fe: 687b ldr r3, [r7, #4] 8004700: 4a21 ldr r2, [pc, #132] @ (8004788 ) 8004702: 4293 cmp r3, r2 8004704: d003 beq.n 800470e 8004706: 687b ldr r3, [r7, #4] 8004708: 4a20 ldr r2, [pc, #128] @ (800478c ) 800470a: 4293 cmp r3, r2 800470c: d10d bne.n 800472a { assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); /* Reset the Output N Polarity level */ tmpccer &= ~TIM_CCER_CC3NP; 800470e: 697b ldr r3, [r7, #20] 8004710: f423 6300 bic.w r3, r3, #2048 @ 0x800 8004714: 617b str r3, [r7, #20] /* Set the Output N Polarity */ tmpccer |= (OC_Config->OCNPolarity << 8U); 8004716: 683b ldr r3, [r7, #0] 8004718: 68db ldr r3, [r3, #12] 800471a: 021b lsls r3, r3, #8 800471c: 697a ldr r2, [r7, #20] 800471e: 4313 orrs r3, r2 8004720: 617b str r3, [r7, #20] /* Reset the Output N State */ tmpccer &= ~TIM_CCER_CC3NE; 8004722: 697b ldr r3, [r7, #20] 8004724: f423 6380 bic.w r3, r3, #1024 @ 0x400 8004728: 617b str r3, [r7, #20] } if (IS_TIM_BREAK_INSTANCE(TIMx)) 800472a: 687b ldr r3, [r7, #4] 800472c: 4a16 ldr r2, [pc, #88] @ (8004788 ) 800472e: 4293 cmp r3, r2 8004730: d003 beq.n 800473a 8004732: 687b ldr r3, [r7, #4] 8004734: 4a15 ldr r2, [pc, #84] @ (800478c ) 8004736: 4293 cmp r3, r2 8004738: d113 bne.n 8004762 /* Check parameters */ assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare and Output Compare N IDLE State */ tmpcr2 &= ~TIM_CR2_OIS3; 800473a: 693b ldr r3, [r7, #16] 800473c: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8004740: 613b str r3, [r7, #16] tmpcr2 &= ~TIM_CR2_OIS3N; 8004742: 693b ldr r3, [r7, #16] 8004744: f423 5300 bic.w r3, r3, #8192 @ 0x2000 8004748: 613b str r3, [r7, #16] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 4U); 800474a: 683b ldr r3, [r7, #0] 800474c: 695b ldr r3, [r3, #20] 800474e: 011b lsls r3, r3, #4 8004750: 693a ldr r2, [r7, #16] 8004752: 4313 orrs r3, r2 8004754: 613b str r3, [r7, #16] /* Set the Output N Idle state */ tmpcr2 |= (OC_Config->OCNIdleState << 4U); 8004756: 683b ldr r3, [r7, #0] 8004758: 699b ldr r3, [r3, #24] 800475a: 011b lsls r3, r3, #4 800475c: 693a ldr r2, [r7, #16] 800475e: 4313 orrs r3, r2 8004760: 613b str r3, [r7, #16] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 8004762: 687b ldr r3, [r7, #4] 8004764: 693a ldr r2, [r7, #16] 8004766: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8004768: 687b ldr r3, [r7, #4] 800476a: 68fa ldr r2, [r7, #12] 800476c: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR3 = OC_Config->Pulse; 800476e: 683b ldr r3, [r7, #0] 8004770: 685a ldr r2, [r3, #4] 8004772: 687b ldr r3, [r7, #4] 8004774: 63da str r2, [r3, #60] @ 0x3c /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8004776: 687b ldr r3, [r7, #4] 8004778: 697a ldr r2, [r7, #20] 800477a: 621a str r2, [r3, #32] } 800477c: bf00 nop 800477e: 371c adds r7, #28 8004780: 46bd mov sp, r7 8004782: f85d 7b04 ldr.w r7, [sp], #4 8004786: 4770 bx lr 8004788: 40010000 .word 0x40010000 800478c: 40010400 .word 0x40010400 08004790 : * @param TIMx to select the TIM peripheral * @param OC_Config The output configuration structure * @retval None */ static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config) { 8004790: b480 push {r7} 8004792: b087 sub sp, #28 8004794: af00 add r7, sp, #0 8004796: 6078 str r0, [r7, #4] 8004798: 6039 str r1, [r7, #0] uint32_t tmpccmrx; uint32_t tmpccer; uint32_t tmpcr2; /* Get the TIMx CCER register value */ tmpccer = TIMx->CCER; 800479a: 687b ldr r3, [r7, #4] 800479c: 6a1b ldr r3, [r3, #32] 800479e: 613b str r3, [r7, #16] /* Disable the Channel 4: Reset the CC4E Bit */ TIMx->CCER &= ~TIM_CCER_CC4E; 80047a0: 687b ldr r3, [r7, #4] 80047a2: 6a1b ldr r3, [r3, #32] 80047a4: f423 5280 bic.w r2, r3, #4096 @ 0x1000 80047a8: 687b ldr r3, [r7, #4] 80047aa: 621a str r2, [r3, #32] /* Get the TIMx CR2 register value */ tmpcr2 = TIMx->CR2; 80047ac: 687b ldr r3, [r7, #4] 80047ae: 685b ldr r3, [r3, #4] 80047b0: 617b str r3, [r7, #20] /* Get the TIMx CCMR2 register value */ tmpccmrx = TIMx->CCMR2; 80047b2: 687b ldr r3, [r7, #4] 80047b4: 69db ldr r3, [r3, #28] 80047b6: 60fb str r3, [r7, #12] /* Reset the Output Compare mode and Capture/Compare selection Bits */ tmpccmrx &= ~TIM_CCMR2_OC4M; 80047b8: 68fb ldr r3, [r7, #12] 80047ba: f423 43e0 bic.w r3, r3, #28672 @ 0x7000 80047be: 60fb str r3, [r7, #12] tmpccmrx &= ~TIM_CCMR2_CC4S; 80047c0: 68fb ldr r3, [r7, #12] 80047c2: f423 7340 bic.w r3, r3, #768 @ 0x300 80047c6: 60fb str r3, [r7, #12] /* Select the Output Compare Mode */ tmpccmrx |= (OC_Config->OCMode << 8U); 80047c8: 683b ldr r3, [r7, #0] 80047ca: 681b ldr r3, [r3, #0] 80047cc: 021b lsls r3, r3, #8 80047ce: 68fa ldr r2, [r7, #12] 80047d0: 4313 orrs r3, r2 80047d2: 60fb str r3, [r7, #12] /* Reset the Output Polarity level */ tmpccer &= ~TIM_CCER_CC4P; 80047d4: 693b ldr r3, [r7, #16] 80047d6: f423 5300 bic.w r3, r3, #8192 @ 0x2000 80047da: 613b str r3, [r7, #16] /* Set the Output Compare Polarity */ tmpccer |= (OC_Config->OCPolarity << 12U); 80047dc: 683b ldr r3, [r7, #0] 80047de: 689b ldr r3, [r3, #8] 80047e0: 031b lsls r3, r3, #12 80047e2: 693a ldr r2, [r7, #16] 80047e4: 4313 orrs r3, r2 80047e6: 613b str r3, [r7, #16] if (IS_TIM_BREAK_INSTANCE(TIMx)) 80047e8: 687b ldr r3, [r7, #4] 80047ea: 4a12 ldr r2, [pc, #72] @ (8004834 ) 80047ec: 4293 cmp r3, r2 80047ee: d003 beq.n 80047f8 80047f0: 687b ldr r3, [r7, #4] 80047f2: 4a11 ldr r2, [pc, #68] @ (8004838 ) 80047f4: 4293 cmp r3, r2 80047f6: d109 bne.n 800480c { /* Check parameters */ assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); /* Reset the Output Compare IDLE State */ tmpcr2 &= ~TIM_CR2_OIS4; 80047f8: 697b ldr r3, [r7, #20] 80047fa: f423 4380 bic.w r3, r3, #16384 @ 0x4000 80047fe: 617b str r3, [r7, #20] /* Set the Output Idle state */ tmpcr2 |= (OC_Config->OCIdleState << 6U); 8004800: 683b ldr r3, [r7, #0] 8004802: 695b ldr r3, [r3, #20] 8004804: 019b lsls r3, r3, #6 8004806: 697a ldr r2, [r7, #20] 8004808: 4313 orrs r3, r2 800480a: 617b str r3, [r7, #20] } /* Write to TIMx CR2 */ TIMx->CR2 = tmpcr2; 800480c: 687b ldr r3, [r7, #4] 800480e: 697a ldr r2, [r7, #20] 8004810: 605a str r2, [r3, #4] /* Write to TIMx CCMR2 */ TIMx->CCMR2 = tmpccmrx; 8004812: 687b ldr r3, [r7, #4] 8004814: 68fa ldr r2, [r7, #12] 8004816: 61da str r2, [r3, #28] /* Set the Capture Compare Register value */ TIMx->CCR4 = OC_Config->Pulse; 8004818: 683b ldr r3, [r7, #0] 800481a: 685a ldr r2, [r3, #4] 800481c: 687b ldr r3, [r7, #4] 800481e: 641a str r2, [r3, #64] @ 0x40 /* Write to TIMx CCER */ TIMx->CCER = tmpccer; 8004820: 687b ldr r3, [r7, #4] 8004822: 693a ldr r2, [r7, #16] 8004824: 621a str r2, [r3, #32] } 8004826: bf00 nop 8004828: 371c adds r7, #28 800482a: 46bd mov sp, r7 800482c: f85d 7b04 ldr.w r7, [sp], #4 8004830: 4770 bx lr 8004832: bf00 nop 8004834: 40010000 .word 0x40010000 8004838: 40010400 .word 0x40010400 0800483c : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { 800483c: b480 push {r7} 800483e: b085 sub sp, #20 8004840: af00 add r7, sp, #0 8004842: 6078 str r0, [r7, #4] 8004844: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); 8004846: 687b ldr r3, [r7, #4] 8004848: f893 303c ldrb.w r3, [r3, #60] @ 0x3c 800484c: 2b01 cmp r3, #1 800484e: d101 bne.n 8004854 8004850: 2302 movs r3, #2 8004852: e05a b.n 800490a 8004854: 687b ldr r3, [r7, #4] 8004856: 2201 movs r2, #1 8004858: f883 203c strb.w r2, [r3, #60] @ 0x3c /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; 800485c: 687b ldr r3, [r7, #4] 800485e: 2202 movs r2, #2 8004860: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; 8004864: 687b ldr r3, [r7, #4] 8004866: 681b ldr r3, [r3, #0] 8004868: 685b ldr r3, [r3, #4] 800486a: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; 800486c: 687b ldr r3, [r7, #4] 800486e: 681b ldr r3, [r3, #0] 8004870: 689b ldr r3, [r3, #8] 8004872: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; 8004874: 68fb ldr r3, [r7, #12] 8004876: f023 0370 bic.w r3, r3, #112 @ 0x70 800487a: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; 800487c: 683b ldr r3, [r7, #0] 800487e: 681b ldr r3, [r3, #0] 8004880: 68fa ldr r2, [r7, #12] 8004882: 4313 orrs r3, r2 8004884: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; 8004886: 687b ldr r3, [r7, #4] 8004888: 681b ldr r3, [r3, #0] 800488a: 68fa ldr r2, [r7, #12] 800488c: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 800488e: 687b ldr r3, [r7, #4] 8004890: 681b ldr r3, [r3, #0] 8004892: 4a21 ldr r2, [pc, #132] @ (8004918 ) 8004894: 4293 cmp r3, r2 8004896: d022 beq.n 80048de 8004898: 687b ldr r3, [r7, #4] 800489a: 681b ldr r3, [r3, #0] 800489c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 80048a0: d01d beq.n 80048de 80048a2: 687b ldr r3, [r7, #4] 80048a4: 681b ldr r3, [r3, #0] 80048a6: 4a1d ldr r2, [pc, #116] @ (800491c ) 80048a8: 4293 cmp r3, r2 80048aa: d018 beq.n 80048de 80048ac: 687b ldr r3, [r7, #4] 80048ae: 681b ldr r3, [r3, #0] 80048b0: 4a1b ldr r2, [pc, #108] @ (8004920 ) 80048b2: 4293 cmp r3, r2 80048b4: d013 beq.n 80048de 80048b6: 687b ldr r3, [r7, #4] 80048b8: 681b ldr r3, [r3, #0] 80048ba: 4a1a ldr r2, [pc, #104] @ (8004924 ) 80048bc: 4293 cmp r3, r2 80048be: d00e beq.n 80048de 80048c0: 687b ldr r3, [r7, #4] 80048c2: 681b ldr r3, [r3, #0] 80048c4: 4a18 ldr r2, [pc, #96] @ (8004928 ) 80048c6: 4293 cmp r3, r2 80048c8: d009 beq.n 80048de 80048ca: 687b ldr r3, [r7, #4] 80048cc: 681b ldr r3, [r3, #0] 80048ce: 4a17 ldr r2, [pc, #92] @ (800492c ) 80048d0: 4293 cmp r3, r2 80048d2: d004 beq.n 80048de 80048d4: 687b ldr r3, [r7, #4] 80048d6: 681b ldr r3, [r3, #0] 80048d8: 4a15 ldr r2, [pc, #84] @ (8004930 ) 80048da: 4293 cmp r3, r2 80048dc: d10c bne.n 80048f8 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; 80048de: 68bb ldr r3, [r7, #8] 80048e0: f023 0380 bic.w r3, r3, #128 @ 0x80 80048e4: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; 80048e6: 683b ldr r3, [r7, #0] 80048e8: 685b ldr r3, [r3, #4] 80048ea: 68ba ldr r2, [r7, #8] 80048ec: 4313 orrs r3, r2 80048ee: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; 80048f0: 687b ldr r3, [r7, #4] 80048f2: 681b ldr r3, [r3, #0] 80048f4: 68ba ldr r2, [r7, #8] 80048f6: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; 80048f8: 687b ldr r3, [r7, #4] 80048fa: 2201 movs r2, #1 80048fc: f883 203d strb.w r2, [r3, #61] @ 0x3d __HAL_UNLOCK(htim); 8004900: 687b ldr r3, [r7, #4] 8004902: 2200 movs r2, #0 8004904: f883 203c strb.w r2, [r3, #60] @ 0x3c return HAL_OK; 8004908: 2300 movs r3, #0 } 800490a: 4618 mov r0, r3 800490c: 3714 adds r7, #20 800490e: 46bd mov sp, r7 8004910: f85d 7b04 ldr.w r7, [sp], #4 8004914: 4770 bx lr 8004916: bf00 nop 8004918: 40010000 .word 0x40010000 800491c: 40000400 .word 0x40000400 8004920: 40000800 .word 0x40000800 8004924: 40000c00 .word 0x40000c00 8004928: 40010400 .word 0x40010400 800492c: 40014000 .word 0x40014000 8004930: 40001800 .word 0x40001800 08004934 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 8004934: b580 push {r7, lr} 8004936: b082 sub sp, #8 8004938: af00 add r7, sp, #0 800493a: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 800493c: 687b ldr r3, [r7, #4] 800493e: 2b00 cmp r3, #0 8004940: d101 bne.n 8004946 { return HAL_ERROR; 8004942: 2301 movs r3, #1 8004944: e042 b.n 80049cc assert_param(IS_UART_INSTANCE(huart->Instance)); } assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength)); assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling)); if (huart->gState == HAL_UART_STATE_RESET) 8004946: 687b ldr r3, [r7, #4] 8004948: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800494c: b2db uxtb r3, r3 800494e: 2b00 cmp r3, #0 8004950: d106 bne.n 8004960 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 8004952: 687b ldr r3, [r7, #4] 8004954: 2200 movs r2, #0 8004956: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 800495a: 6878 ldr r0, [r7, #4] 800495c: f7fc f9e2 bl 8000d24 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 8004960: 687b ldr r3, [r7, #4] 8004962: 2224 movs r2, #36 @ 0x24 8004964: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the peripheral */ __HAL_UART_DISABLE(huart); 8004968: 687b ldr r3, [r7, #4] 800496a: 681b ldr r3, [r3, #0] 800496c: 68da ldr r2, [r3, #12] 800496e: 687b ldr r3, [r7, #4] 8004970: 681b ldr r3, [r3, #0] 8004972: f422 5200 bic.w r2, r2, #8192 @ 0x2000 8004976: 60da str r2, [r3, #12] /* Set the UART Communication parameters */ UART_SetConfig(huart); 8004978: 6878 ldr r0, [r7, #4] 800497a: f000 f82b bl 80049d4 /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 800497e: 687b ldr r3, [r7, #4] 8004980: 681b ldr r3, [r3, #0] 8004982: 691a ldr r2, [r3, #16] 8004984: 687b ldr r3, [r7, #4] 8004986: 681b ldr r3, [r3, #0] 8004988: f422 4290 bic.w r2, r2, #18432 @ 0x4800 800498c: 611a str r2, [r3, #16] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 800498e: 687b ldr r3, [r7, #4] 8004990: 681b ldr r3, [r3, #0] 8004992: 695a ldr r2, [r3, #20] 8004994: 687b ldr r3, [r7, #4] 8004996: 681b ldr r3, [r3, #0] 8004998: f022 022a bic.w r2, r2, #42 @ 0x2a 800499c: 615a str r2, [r3, #20] /* Enable the peripheral */ __HAL_UART_ENABLE(huart); 800499e: 687b ldr r3, [r7, #4] 80049a0: 681b ldr r3, [r3, #0] 80049a2: 68da ldr r2, [r3, #12] 80049a4: 687b ldr r3, [r7, #4] 80049a6: 681b ldr r3, [r3, #0] 80049a8: f442 5200 orr.w r2, r2, #8192 @ 0x2000 80049ac: 60da str r2, [r3, #12] /* Initialize the UART state */ huart->ErrorCode = HAL_UART_ERROR_NONE; 80049ae: 687b ldr r3, [r7, #4] 80049b0: 2200 movs r2, #0 80049b2: 645a str r2, [r3, #68] @ 0x44 huart->gState = HAL_UART_STATE_READY; 80049b4: 687b ldr r3, [r7, #4] 80049b6: 2220 movs r2, #32 80049b8: f883 2041 strb.w r2, [r3, #65] @ 0x41 huart->RxState = HAL_UART_STATE_READY; 80049bc: 687b ldr r3, [r7, #4] 80049be: 2220 movs r2, #32 80049c0: f883 2042 strb.w r2, [r3, #66] @ 0x42 huart->RxEventType = HAL_UART_RXEVENT_TC; 80049c4: 687b ldr r3, [r7, #4] 80049c6: 2200 movs r2, #0 80049c8: 635a str r2, [r3, #52] @ 0x34 return HAL_OK; 80049ca: 2300 movs r3, #0 } 80049cc: 4618 mov r0, r3 80049ce: 3708 adds r7, #8 80049d0: 46bd mov sp, r7 80049d2: bd80 pop {r7, pc} 080049d4 : * @param huart Pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_SetConfig(UART_HandleTypeDef *huart) { 80049d4: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 80049d8: b0c0 sub sp, #256 @ 0x100 80049da: af00 add r7, sp, #0 80049dc: f8c7 00f4 str.w r0, [r7, #244] @ 0xf4 assert_param(IS_UART_MODE(huart->Init.Mode)); /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 80049e0: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 80049e4: 681b ldr r3, [r3, #0] 80049e6: 691b ldr r3, [r3, #16] 80049e8: f423 5040 bic.w r0, r3, #12288 @ 0x3000 80049ec: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 80049f0: 68d9 ldr r1, [r3, #12] 80049f2: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 80049f6: 681a ldr r2, [r3, #0] 80049f8: ea40 0301 orr.w r3, r0, r1 80049fc: 6113 str r3, [r2, #16] Set the M bits according to huart->Init.WordLength value Set PCE and PS bits according to huart->Init.Parity value Set TE and RE bits according to huart->Init.Mode value Set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling; 80049fe: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a02: 689a ldr r2, [r3, #8] 8004a04: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a08: 691b ldr r3, [r3, #16] 8004a0a: 431a orrs r2, r3 8004a0c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a10: 695b ldr r3, [r3, #20] 8004a12: 431a orrs r2, r3 8004a14: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a18: 69db ldr r3, [r3, #28] 8004a1a: 4313 orrs r3, r2 8004a1c: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8 MODIFY_REG(huart->Instance->CR1, 8004a20: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a24: 681b ldr r3, [r3, #0] 8004a26: 68db ldr r3, [r3, #12] 8004a28: f423 4116 bic.w r1, r3, #38400 @ 0x9600 8004a2c: f021 010c bic.w r1, r1, #12 8004a30: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a34: 681a ldr r2, [r3, #0] 8004a36: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8 8004a3a: 430b orrs r3, r1 8004a3c: 60d3 str r3, [r2, #12] (uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8), tmpreg); /*-------------------------- USART CR3 Configuration -----------------------*/ /* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */ MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl); 8004a3e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a42: 681b ldr r3, [r3, #0] 8004a44: 695b ldr r3, [r3, #20] 8004a46: f423 7040 bic.w r0, r3, #768 @ 0x300 8004a4a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a4e: 6999 ldr r1, [r3, #24] 8004a50: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a54: 681a ldr r2, [r3, #0] 8004a56: ea40 0301 orr.w r3, r0, r1 8004a5a: 6153 str r3, [r2, #20] if ((huart->Instance == USART1) || (huart->Instance == USART6) || (huart->Instance == UART9) || (huart->Instance == UART10)) { pclk = HAL_RCC_GetPCLK2Freq(); } #elif defined(USART6) if ((huart->Instance == USART1) || (huart->Instance == USART6)) 8004a5c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a60: 681a ldr r2, [r3, #0] 8004a62: 4b8f ldr r3, [pc, #572] @ (8004ca0 ) 8004a64: 429a cmp r2, r3 8004a66: d005 beq.n 8004a74 8004a68: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a6c: 681a ldr r2, [r3, #0] 8004a6e: 4b8d ldr r3, [pc, #564] @ (8004ca4 ) 8004a70: 429a cmp r2, r3 8004a72: d104 bne.n 8004a7e { pclk = HAL_RCC_GetPCLK2Freq(); 8004a74: f7fe fb2e bl 80030d4 8004a78: f8c7 00fc str.w r0, [r7, #252] @ 0xfc 8004a7c: e003 b.n 8004a86 pclk = HAL_RCC_GetPCLK2Freq(); } #endif /* USART6 */ else { pclk = HAL_RCC_GetPCLK1Freq(); 8004a7e: f7fe fb15 bl 80030ac 8004a82: f8c7 00fc str.w r0, [r7, #252] @ 0xfc } /*-------------------------- USART BRR Configuration ---------------------*/ if (huart->Init.OverSampling == UART_OVERSAMPLING_8) 8004a86: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004a8a: 69db ldr r3, [r3, #28] 8004a8c: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 8004a90: f040 810c bne.w 8004cac { huart->Instance->BRR = UART_BRR_SAMPLING8(pclk, huart->Init.BaudRate); 8004a94: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8004a98: 2200 movs r2, #0 8004a9a: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8 8004a9e: f8c7 20ec str.w r2, [r7, #236] @ 0xec 8004aa2: e9d7 453a ldrd r4, r5, [r7, #232] @ 0xe8 8004aa6: 4622 mov r2, r4 8004aa8: 462b mov r3, r5 8004aaa: 1891 adds r1, r2, r2 8004aac: 65b9 str r1, [r7, #88] @ 0x58 8004aae: 415b adcs r3, r3 8004ab0: 65fb str r3, [r7, #92] @ 0x5c 8004ab2: e9d7 2316 ldrd r2, r3, [r7, #88] @ 0x58 8004ab6: 4621 mov r1, r4 8004ab8: eb12 0801 adds.w r8, r2, r1 8004abc: 4629 mov r1, r5 8004abe: eb43 0901 adc.w r9, r3, r1 8004ac2: f04f 0200 mov.w r2, #0 8004ac6: f04f 0300 mov.w r3, #0 8004aca: ea4f 03c9 mov.w r3, r9, lsl #3 8004ace: ea43 7358 orr.w r3, r3, r8, lsr #29 8004ad2: ea4f 02c8 mov.w r2, r8, lsl #3 8004ad6: 4690 mov r8, r2 8004ad8: 4699 mov r9, r3 8004ada: 4623 mov r3, r4 8004adc: eb18 0303 adds.w r3, r8, r3 8004ae0: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0 8004ae4: 462b mov r3, r5 8004ae6: eb49 0303 adc.w r3, r9, r3 8004aea: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4 8004aee: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004af2: 685b ldr r3, [r3, #4] 8004af4: 2200 movs r2, #0 8004af6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8 8004afa: f8c7 20dc str.w r2, [r7, #220] @ 0xdc 8004afe: e9d7 1236 ldrd r1, r2, [r7, #216] @ 0xd8 8004b02: 460b mov r3, r1 8004b04: 18db adds r3, r3, r3 8004b06: 653b str r3, [r7, #80] @ 0x50 8004b08: 4613 mov r3, r2 8004b0a: eb42 0303 adc.w r3, r2, r3 8004b0e: 657b str r3, [r7, #84] @ 0x54 8004b10: e9d7 2314 ldrd r2, r3, [r7, #80] @ 0x50 8004b14: e9d7 0138 ldrd r0, r1, [r7, #224] @ 0xe0 8004b18: f7fb fb74 bl 8000204 <__aeabi_uldivmod> 8004b1c: 4602 mov r2, r0 8004b1e: 460b mov r3, r1 8004b20: 4b61 ldr r3, [pc, #388] @ (8004ca8 ) 8004b22: fba3 2302 umull r2, r3, r3, r2 8004b26: 095b lsrs r3, r3, #5 8004b28: 011c lsls r4, r3, #4 8004b2a: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8004b2e: 2200 movs r2, #0 8004b30: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0 8004b34: f8c7 20d4 str.w r2, [r7, #212] @ 0xd4 8004b38: e9d7 8934 ldrd r8, r9, [r7, #208] @ 0xd0 8004b3c: 4642 mov r2, r8 8004b3e: 464b mov r3, r9 8004b40: 1891 adds r1, r2, r2 8004b42: 64b9 str r1, [r7, #72] @ 0x48 8004b44: 415b adcs r3, r3 8004b46: 64fb str r3, [r7, #76] @ 0x4c 8004b48: e9d7 2312 ldrd r2, r3, [r7, #72] @ 0x48 8004b4c: 4641 mov r1, r8 8004b4e: eb12 0a01 adds.w sl, r2, r1 8004b52: 4649 mov r1, r9 8004b54: eb43 0b01 adc.w fp, r3, r1 8004b58: f04f 0200 mov.w r2, #0 8004b5c: f04f 0300 mov.w r3, #0 8004b60: ea4f 03cb mov.w r3, fp, lsl #3 8004b64: ea43 735a orr.w r3, r3, sl, lsr #29 8004b68: ea4f 02ca mov.w r2, sl, lsl #3 8004b6c: 4692 mov sl, r2 8004b6e: 469b mov fp, r3 8004b70: 4643 mov r3, r8 8004b72: eb1a 0303 adds.w r3, sl, r3 8004b76: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8 8004b7a: 464b mov r3, r9 8004b7c: eb4b 0303 adc.w r3, fp, r3 8004b80: f8c7 30cc str.w r3, [r7, #204] @ 0xcc 8004b84: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004b88: 685b ldr r3, [r3, #4] 8004b8a: 2200 movs r2, #0 8004b8c: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0 8004b90: f8c7 20c4 str.w r2, [r7, #196] @ 0xc4 8004b94: e9d7 1230 ldrd r1, r2, [r7, #192] @ 0xc0 8004b98: 460b mov r3, r1 8004b9a: 18db adds r3, r3, r3 8004b9c: 643b str r3, [r7, #64] @ 0x40 8004b9e: 4613 mov r3, r2 8004ba0: eb42 0303 adc.w r3, r2, r3 8004ba4: 647b str r3, [r7, #68] @ 0x44 8004ba6: e9d7 2310 ldrd r2, r3, [r7, #64] @ 0x40 8004baa: e9d7 0132 ldrd r0, r1, [r7, #200] @ 0xc8 8004bae: f7fb fb29 bl 8000204 <__aeabi_uldivmod> 8004bb2: 4602 mov r2, r0 8004bb4: 460b mov r3, r1 8004bb6: 4611 mov r1, r2 8004bb8: 4b3b ldr r3, [pc, #236] @ (8004ca8 ) 8004bba: fba3 2301 umull r2, r3, r3, r1 8004bbe: 095b lsrs r3, r3, #5 8004bc0: 2264 movs r2, #100 @ 0x64 8004bc2: fb02 f303 mul.w r3, r2, r3 8004bc6: 1acb subs r3, r1, r3 8004bc8: 00db lsls r3, r3, #3 8004bca: f103 0232 add.w r2, r3, #50 @ 0x32 8004bce: 4b36 ldr r3, [pc, #216] @ (8004ca8 ) 8004bd0: fba3 2302 umull r2, r3, r3, r2 8004bd4: 095b lsrs r3, r3, #5 8004bd6: 005b lsls r3, r3, #1 8004bd8: f403 73f8 and.w r3, r3, #496 @ 0x1f0 8004bdc: 441c add r4, r3 8004bde: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8004be2: 2200 movs r2, #0 8004be4: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8 8004be8: f8c7 20bc str.w r2, [r7, #188] @ 0xbc 8004bec: e9d7 892e ldrd r8, r9, [r7, #184] @ 0xb8 8004bf0: 4642 mov r2, r8 8004bf2: 464b mov r3, r9 8004bf4: 1891 adds r1, r2, r2 8004bf6: 63b9 str r1, [r7, #56] @ 0x38 8004bf8: 415b adcs r3, r3 8004bfa: 63fb str r3, [r7, #60] @ 0x3c 8004bfc: e9d7 230e ldrd r2, r3, [r7, #56] @ 0x38 8004c00: 4641 mov r1, r8 8004c02: 1851 adds r1, r2, r1 8004c04: 6339 str r1, [r7, #48] @ 0x30 8004c06: 4649 mov r1, r9 8004c08: 414b adcs r3, r1 8004c0a: 637b str r3, [r7, #52] @ 0x34 8004c0c: f04f 0200 mov.w r2, #0 8004c10: f04f 0300 mov.w r3, #0 8004c14: e9d7 ab0c ldrd sl, fp, [r7, #48] @ 0x30 8004c18: 4659 mov r1, fp 8004c1a: 00cb lsls r3, r1, #3 8004c1c: 4651 mov r1, sl 8004c1e: ea43 7351 orr.w r3, r3, r1, lsr #29 8004c22: 4651 mov r1, sl 8004c24: 00ca lsls r2, r1, #3 8004c26: 4610 mov r0, r2 8004c28: 4619 mov r1, r3 8004c2a: 4603 mov r3, r0 8004c2c: 4642 mov r2, r8 8004c2e: 189b adds r3, r3, r2 8004c30: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0 8004c34: 464b mov r3, r9 8004c36: 460a mov r2, r1 8004c38: eb42 0303 adc.w r3, r2, r3 8004c3c: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4 8004c40: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004c44: 685b ldr r3, [r3, #4] 8004c46: 2200 movs r2, #0 8004c48: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8 8004c4c: f8c7 20ac str.w r2, [r7, #172] @ 0xac 8004c50: e9d7 122a ldrd r1, r2, [r7, #168] @ 0xa8 8004c54: 460b mov r3, r1 8004c56: 18db adds r3, r3, r3 8004c58: 62bb str r3, [r7, #40] @ 0x28 8004c5a: 4613 mov r3, r2 8004c5c: eb42 0303 adc.w r3, r2, r3 8004c60: 62fb str r3, [r7, #44] @ 0x2c 8004c62: e9d7 230a ldrd r2, r3, [r7, #40] @ 0x28 8004c66: e9d7 012c ldrd r0, r1, [r7, #176] @ 0xb0 8004c6a: f7fb facb bl 8000204 <__aeabi_uldivmod> 8004c6e: 4602 mov r2, r0 8004c70: 460b mov r3, r1 8004c72: 4b0d ldr r3, [pc, #52] @ (8004ca8 ) 8004c74: fba3 1302 umull r1, r3, r3, r2 8004c78: 095b lsrs r3, r3, #5 8004c7a: 2164 movs r1, #100 @ 0x64 8004c7c: fb01 f303 mul.w r3, r1, r3 8004c80: 1ad3 subs r3, r2, r3 8004c82: 00db lsls r3, r3, #3 8004c84: 3332 adds r3, #50 @ 0x32 8004c86: 4a08 ldr r2, [pc, #32] @ (8004ca8 ) 8004c88: fba2 2303 umull r2, r3, r2, r3 8004c8c: 095b lsrs r3, r3, #5 8004c8e: f003 0207 and.w r2, r3, #7 8004c92: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004c96: 681b ldr r3, [r3, #0] 8004c98: 4422 add r2, r4 8004c9a: 609a str r2, [r3, #8] } else { huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); } } 8004c9c: e106 b.n 8004eac 8004c9e: bf00 nop 8004ca0: 40011000 .word 0x40011000 8004ca4: 40011400 .word 0x40011400 8004ca8: 51eb851f .word 0x51eb851f huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate); 8004cac: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8004cb0: 2200 movs r2, #0 8004cb2: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 8004cb6: f8c7 20a4 str.w r2, [r7, #164] @ 0xa4 8004cba: e9d7 8928 ldrd r8, r9, [r7, #160] @ 0xa0 8004cbe: 4642 mov r2, r8 8004cc0: 464b mov r3, r9 8004cc2: 1891 adds r1, r2, r2 8004cc4: 6239 str r1, [r7, #32] 8004cc6: 415b adcs r3, r3 8004cc8: 627b str r3, [r7, #36] @ 0x24 8004cca: e9d7 2308 ldrd r2, r3, [r7, #32] 8004cce: 4641 mov r1, r8 8004cd0: 1854 adds r4, r2, r1 8004cd2: 4649 mov r1, r9 8004cd4: eb43 0501 adc.w r5, r3, r1 8004cd8: f04f 0200 mov.w r2, #0 8004cdc: f04f 0300 mov.w r3, #0 8004ce0: 00eb lsls r3, r5, #3 8004ce2: ea43 7354 orr.w r3, r3, r4, lsr #29 8004ce6: 00e2 lsls r2, r4, #3 8004ce8: 4614 mov r4, r2 8004cea: 461d mov r5, r3 8004cec: 4643 mov r3, r8 8004cee: 18e3 adds r3, r4, r3 8004cf0: f8c7 3098 str.w r3, [r7, #152] @ 0x98 8004cf4: 464b mov r3, r9 8004cf6: eb45 0303 adc.w r3, r5, r3 8004cfa: f8c7 309c str.w r3, [r7, #156] @ 0x9c 8004cfe: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004d02: 685b ldr r3, [r3, #4] 8004d04: 2200 movs r2, #0 8004d06: f8c7 3090 str.w r3, [r7, #144] @ 0x90 8004d0a: f8c7 2094 str.w r2, [r7, #148] @ 0x94 8004d0e: f04f 0200 mov.w r2, #0 8004d12: f04f 0300 mov.w r3, #0 8004d16: e9d7 4524 ldrd r4, r5, [r7, #144] @ 0x90 8004d1a: 4629 mov r1, r5 8004d1c: 008b lsls r3, r1, #2 8004d1e: 4621 mov r1, r4 8004d20: ea43 7391 orr.w r3, r3, r1, lsr #30 8004d24: 4621 mov r1, r4 8004d26: 008a lsls r2, r1, #2 8004d28: e9d7 0126 ldrd r0, r1, [r7, #152] @ 0x98 8004d2c: f7fb fa6a bl 8000204 <__aeabi_uldivmod> 8004d30: 4602 mov r2, r0 8004d32: 460b mov r3, r1 8004d34: 4b60 ldr r3, [pc, #384] @ (8004eb8 ) 8004d36: fba3 2302 umull r2, r3, r3, r2 8004d3a: 095b lsrs r3, r3, #5 8004d3c: 011c lsls r4, r3, #4 8004d3e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8004d42: 2200 movs r2, #0 8004d44: f8c7 3088 str.w r3, [r7, #136] @ 0x88 8004d48: f8c7 208c str.w r2, [r7, #140] @ 0x8c 8004d4c: e9d7 8922 ldrd r8, r9, [r7, #136] @ 0x88 8004d50: 4642 mov r2, r8 8004d52: 464b mov r3, r9 8004d54: 1891 adds r1, r2, r2 8004d56: 61b9 str r1, [r7, #24] 8004d58: 415b adcs r3, r3 8004d5a: 61fb str r3, [r7, #28] 8004d5c: e9d7 2306 ldrd r2, r3, [r7, #24] 8004d60: 4641 mov r1, r8 8004d62: 1851 adds r1, r2, r1 8004d64: 6139 str r1, [r7, #16] 8004d66: 4649 mov r1, r9 8004d68: 414b adcs r3, r1 8004d6a: 617b str r3, [r7, #20] 8004d6c: f04f 0200 mov.w r2, #0 8004d70: f04f 0300 mov.w r3, #0 8004d74: e9d7 ab04 ldrd sl, fp, [r7, #16] 8004d78: 4659 mov r1, fp 8004d7a: 00cb lsls r3, r1, #3 8004d7c: 4651 mov r1, sl 8004d7e: ea43 7351 orr.w r3, r3, r1, lsr #29 8004d82: 4651 mov r1, sl 8004d84: 00ca lsls r2, r1, #3 8004d86: 4610 mov r0, r2 8004d88: 4619 mov r1, r3 8004d8a: 4603 mov r3, r0 8004d8c: 4642 mov r2, r8 8004d8e: 189b adds r3, r3, r2 8004d90: f8c7 3080 str.w r3, [r7, #128] @ 0x80 8004d94: 464b mov r3, r9 8004d96: 460a mov r2, r1 8004d98: eb42 0303 adc.w r3, r2, r3 8004d9c: f8c7 3084 str.w r3, [r7, #132] @ 0x84 8004da0: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004da4: 685b ldr r3, [r3, #4] 8004da6: 2200 movs r2, #0 8004da8: 67bb str r3, [r7, #120] @ 0x78 8004daa: 67fa str r2, [r7, #124] @ 0x7c 8004dac: f04f 0200 mov.w r2, #0 8004db0: f04f 0300 mov.w r3, #0 8004db4: e9d7 891e ldrd r8, r9, [r7, #120] @ 0x78 8004db8: 4649 mov r1, r9 8004dba: 008b lsls r3, r1, #2 8004dbc: 4641 mov r1, r8 8004dbe: ea43 7391 orr.w r3, r3, r1, lsr #30 8004dc2: 4641 mov r1, r8 8004dc4: 008a lsls r2, r1, #2 8004dc6: e9d7 0120 ldrd r0, r1, [r7, #128] @ 0x80 8004dca: f7fb fa1b bl 8000204 <__aeabi_uldivmod> 8004dce: 4602 mov r2, r0 8004dd0: 460b mov r3, r1 8004dd2: 4611 mov r1, r2 8004dd4: 4b38 ldr r3, [pc, #224] @ (8004eb8 ) 8004dd6: fba3 2301 umull r2, r3, r3, r1 8004dda: 095b lsrs r3, r3, #5 8004ddc: 2264 movs r2, #100 @ 0x64 8004dde: fb02 f303 mul.w r3, r2, r3 8004de2: 1acb subs r3, r1, r3 8004de4: 011b lsls r3, r3, #4 8004de6: 3332 adds r3, #50 @ 0x32 8004de8: 4a33 ldr r2, [pc, #204] @ (8004eb8 ) 8004dea: fba2 2303 umull r2, r3, r2, r3 8004dee: 095b lsrs r3, r3, #5 8004df0: f003 03f0 and.w r3, r3, #240 @ 0xf0 8004df4: 441c add r4, r3 8004df6: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc 8004dfa: 2200 movs r2, #0 8004dfc: 673b str r3, [r7, #112] @ 0x70 8004dfe: 677a str r2, [r7, #116] @ 0x74 8004e00: e9d7 891c ldrd r8, r9, [r7, #112] @ 0x70 8004e04: 4642 mov r2, r8 8004e06: 464b mov r3, r9 8004e08: 1891 adds r1, r2, r2 8004e0a: 60b9 str r1, [r7, #8] 8004e0c: 415b adcs r3, r3 8004e0e: 60fb str r3, [r7, #12] 8004e10: e9d7 2302 ldrd r2, r3, [r7, #8] 8004e14: 4641 mov r1, r8 8004e16: 1851 adds r1, r2, r1 8004e18: 6039 str r1, [r7, #0] 8004e1a: 4649 mov r1, r9 8004e1c: 414b adcs r3, r1 8004e1e: 607b str r3, [r7, #4] 8004e20: f04f 0200 mov.w r2, #0 8004e24: f04f 0300 mov.w r3, #0 8004e28: e9d7 ab00 ldrd sl, fp, [r7] 8004e2c: 4659 mov r1, fp 8004e2e: 00cb lsls r3, r1, #3 8004e30: 4651 mov r1, sl 8004e32: ea43 7351 orr.w r3, r3, r1, lsr #29 8004e36: 4651 mov r1, sl 8004e38: 00ca lsls r2, r1, #3 8004e3a: 4610 mov r0, r2 8004e3c: 4619 mov r1, r3 8004e3e: 4603 mov r3, r0 8004e40: 4642 mov r2, r8 8004e42: 189b adds r3, r3, r2 8004e44: 66bb str r3, [r7, #104] @ 0x68 8004e46: 464b mov r3, r9 8004e48: 460a mov r2, r1 8004e4a: eb42 0303 adc.w r3, r2, r3 8004e4e: 66fb str r3, [r7, #108] @ 0x6c 8004e50: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004e54: 685b ldr r3, [r3, #4] 8004e56: 2200 movs r2, #0 8004e58: 663b str r3, [r7, #96] @ 0x60 8004e5a: 667a str r2, [r7, #100] @ 0x64 8004e5c: f04f 0200 mov.w r2, #0 8004e60: f04f 0300 mov.w r3, #0 8004e64: e9d7 8918 ldrd r8, r9, [r7, #96] @ 0x60 8004e68: 4649 mov r1, r9 8004e6a: 008b lsls r3, r1, #2 8004e6c: 4641 mov r1, r8 8004e6e: ea43 7391 orr.w r3, r3, r1, lsr #30 8004e72: 4641 mov r1, r8 8004e74: 008a lsls r2, r1, #2 8004e76: e9d7 011a ldrd r0, r1, [r7, #104] @ 0x68 8004e7a: f7fb f9c3 bl 8000204 <__aeabi_uldivmod> 8004e7e: 4602 mov r2, r0 8004e80: 460b mov r3, r1 8004e82: 4b0d ldr r3, [pc, #52] @ (8004eb8 ) 8004e84: fba3 1302 umull r1, r3, r3, r2 8004e88: 095b lsrs r3, r3, #5 8004e8a: 2164 movs r1, #100 @ 0x64 8004e8c: fb01 f303 mul.w r3, r1, r3 8004e90: 1ad3 subs r3, r2, r3 8004e92: 011b lsls r3, r3, #4 8004e94: 3332 adds r3, #50 @ 0x32 8004e96: 4a08 ldr r2, [pc, #32] @ (8004eb8 ) 8004e98: fba2 2303 umull r2, r3, r2, r3 8004e9c: 095b lsrs r3, r3, #5 8004e9e: f003 020f and.w r2, r3, #15 8004ea2: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4 8004ea6: 681b ldr r3, [r3, #0] 8004ea8: 4422 add r2, r4 8004eaa: 609a str r2, [r3, #8] } 8004eac: bf00 nop 8004eae: f507 7780 add.w r7, r7, #256 @ 0x100 8004eb2: 46bd mov sp, r7 8004eb4: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 8004eb8: 51eb851f .word 0x51eb851f 08004ebc : * @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) { 8004ebc: b084 sub sp, #16 8004ebe: b580 push {r7, lr} 8004ec0: b084 sub sp, #16 8004ec2: af00 add r7, sp, #0 8004ec4: 6078 str r0, [r7, #4] 8004ec6: f107 001c add.w r0, r7, #28 8004eca: e880 000e stmia.w r0, {r1, r2, r3} HAL_StatusTypeDef ret; if (cfg.phy_itface == USB_OTG_ULPI_PHY) 8004ece: f897 3021 ldrb.w r3, [r7, #33] @ 0x21 8004ed2: 2b01 cmp r3, #1 8004ed4: d123 bne.n 8004f1e { USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN); 8004ed6: 687b ldr r3, [r7, #4] 8004ed8: 6b9b ldr r3, [r3, #56] @ 0x38 8004eda: f423 3280 bic.w r2, r3, #65536 @ 0x10000 8004ede: 687b ldr r3, [r7, #4] 8004ee0: 639a str r2, [r3, #56] @ 0x38 /* Init The ULPI Interface */ USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_TSDPS | USB_OTG_GUSBCFG_ULPIFSLS | USB_OTG_GUSBCFG_PHYSEL); 8004ee2: 687b ldr r3, [r7, #4] 8004ee4: 68db ldr r3, [r3, #12] 8004ee6: f423 0384 bic.w r3, r3, #4325376 @ 0x420000 8004eea: f023 0340 bic.w r3, r3, #64 @ 0x40 8004eee: 687a ldr r2, [r7, #4] 8004ef0: 60d3 str r3, [r2, #12] /* Select vbus source */ USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_ULPIEVBUSD | USB_OTG_GUSBCFG_ULPIEVBUSI); 8004ef2: 687b ldr r3, [r7, #4] 8004ef4: 68db ldr r3, [r3, #12] 8004ef6: f423 1240 bic.w r2, r3, #3145728 @ 0x300000 8004efa: 687b ldr r3, [r7, #4] 8004efc: 60da str r2, [r3, #12] if (cfg.use_external_vbus == 1U) 8004efe: f897 3028 ldrb.w r3, [r7, #40] @ 0x28 8004f02: 2b01 cmp r3, #1 8004f04: d105 bne.n 8004f12 { USBx->GUSBCFG |= USB_OTG_GUSBCFG_ULPIEVBUSD; 8004f06: 687b ldr r3, [r7, #4] 8004f08: 68db ldr r3, [r3, #12] 8004f0a: f443 1280 orr.w r2, r3, #1048576 @ 0x100000 8004f0e: 687b ldr r3, [r7, #4] 8004f10: 60da str r2, [r3, #12] } /* Reset after a PHY select */ ret = USB_CoreReset(USBx); 8004f12: 6878 ldr r0, [r7, #4] 8004f14: f001 fae2 bl 80064dc 8004f18: 4603 mov r3, r0 8004f1a: 73fb strb r3, [r7, #15] 8004f1c: e01b b.n 8004f56 } else /* FS interface (embedded Phy) */ { /* Select FS Embedded PHY */ USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL; 8004f1e: 687b ldr r3, [r7, #4] 8004f20: 68db ldr r3, [r3, #12] 8004f22: f043 0240 orr.w r2, r3, #64 @ 0x40 8004f26: 687b ldr r3, [r7, #4] 8004f28: 60da str r2, [r3, #12] /* Reset after a PHY select */ ret = USB_CoreReset(USBx); 8004f2a: 6878 ldr r0, [r7, #4] 8004f2c: f001 fad6 bl 80064dc 8004f30: 4603 mov r3, r0 8004f32: 73fb strb r3, [r7, #15] if (cfg.battery_charging_enable == 0U) 8004f34: f897 3025 ldrb.w r3, [r7, #37] @ 0x25 8004f38: 2b00 cmp r3, #0 8004f3a: d106 bne.n 8004f4a { /* Activate the USB Transceiver */ USBx->GCCFG |= USB_OTG_GCCFG_PWRDWN; 8004f3c: 687b ldr r3, [r7, #4] 8004f3e: 6b9b ldr r3, [r3, #56] @ 0x38 8004f40: f443 3280 orr.w r2, r3, #65536 @ 0x10000 8004f44: 687b ldr r3, [r7, #4] 8004f46: 639a str r2, [r3, #56] @ 0x38 8004f48: e005 b.n 8004f56 } else { /* Deactivate the USB Transceiver */ USBx->GCCFG &= ~(USB_OTG_GCCFG_PWRDWN); 8004f4a: 687b ldr r3, [r7, #4] 8004f4c: 6b9b ldr r3, [r3, #56] @ 0x38 8004f4e: f423 3280 bic.w r2, r3, #65536 @ 0x10000 8004f52: 687b ldr r3, [r7, #4] 8004f54: 639a str r2, [r3, #56] @ 0x38 } } if (cfg.dma_enable == 1U) 8004f56: 7fbb ldrb r3, [r7, #30] 8004f58: 2b01 cmp r3, #1 8004f5a: d10b bne.n 8004f74 { USBx->GAHBCFG |= USB_OTG_GAHBCFG_HBSTLEN_2; 8004f5c: 687b ldr r3, [r7, #4] 8004f5e: 689b ldr r3, [r3, #8] 8004f60: f043 0206 orr.w r2, r3, #6 8004f64: 687b ldr r3, [r7, #4] 8004f66: 609a str r2, [r3, #8] USBx->GAHBCFG |= USB_OTG_GAHBCFG_DMAEN; 8004f68: 687b ldr r3, [r7, #4] 8004f6a: 689b ldr r3, [r3, #8] 8004f6c: f043 0220 orr.w r2, r3, #32 8004f70: 687b ldr r3, [r7, #4] 8004f72: 609a str r2, [r3, #8] } return ret; 8004f74: 7bfb ldrb r3, [r7, #15] } 8004f76: 4618 mov r0, r3 8004f78: 3710 adds r7, #16 8004f7a: 46bd mov sp, r7 8004f7c: e8bd 4080 ldmia.w sp!, {r7, lr} 8004f80: b004 add sp, #16 8004f82: 4770 bx lr 08004f84 : * @param hclk: AHB clock frequency * @retval USB turnaround time In PHY Clocks number */ HAL_StatusTypeDef USB_SetTurnaroundTime(USB_OTG_GlobalTypeDef *USBx, uint32_t hclk, uint8_t speed) { 8004f84: b480 push {r7} 8004f86: b087 sub sp, #28 8004f88: af00 add r7, sp, #0 8004f8a: 60f8 str r0, [r7, #12] 8004f8c: 60b9 str r1, [r7, #8] 8004f8e: 4613 mov r3, r2 8004f90: 71fb strb r3, [r7, #7] /* The USBTRD is configured according to the tables below, depending on AHB frequency used by application. In the low AHB frequency range it is used to stretch enough the USB response time to IN tokens, the USB turnaround time, so to compensate for the longer AHB read access latency to the Data FIFO */ if (speed == USBD_FS_SPEED) 8004f92: 79fb ldrb r3, [r7, #7] 8004f94: 2b02 cmp r3, #2 8004f96: d165 bne.n 8005064 { if ((hclk >= 14200000U) && (hclk < 15000000U)) 8004f98: 68bb ldr r3, [r7, #8] 8004f9a: 4a41 ldr r2, [pc, #260] @ (80050a0 ) 8004f9c: 4293 cmp r3, r2 8004f9e: d906 bls.n 8004fae 8004fa0: 68bb ldr r3, [r7, #8] 8004fa2: 4a40 ldr r2, [pc, #256] @ (80050a4 ) 8004fa4: 4293 cmp r3, r2 8004fa6: d202 bcs.n 8004fae { /* hclk Clock Range between 14.2-15 MHz */ UsbTrd = 0xFU; 8004fa8: 230f movs r3, #15 8004faa: 617b str r3, [r7, #20] 8004fac: e062 b.n 8005074 } else if ((hclk >= 15000000U) && (hclk < 16000000U)) 8004fae: 68bb ldr r3, [r7, #8] 8004fb0: 4a3c ldr r2, [pc, #240] @ (80050a4 ) 8004fb2: 4293 cmp r3, r2 8004fb4: d306 bcc.n 8004fc4 8004fb6: 68bb ldr r3, [r7, #8] 8004fb8: 4a3b ldr r2, [pc, #236] @ (80050a8 ) 8004fba: 4293 cmp r3, r2 8004fbc: d202 bcs.n 8004fc4 { /* hclk Clock Range between 15-16 MHz */ UsbTrd = 0xEU; 8004fbe: 230e movs r3, #14 8004fc0: 617b str r3, [r7, #20] 8004fc2: e057 b.n 8005074 } else if ((hclk >= 16000000U) && (hclk < 17200000U)) 8004fc4: 68bb ldr r3, [r7, #8] 8004fc6: 4a38 ldr r2, [pc, #224] @ (80050a8 ) 8004fc8: 4293 cmp r3, r2 8004fca: d306 bcc.n 8004fda 8004fcc: 68bb ldr r3, [r7, #8] 8004fce: 4a37 ldr r2, [pc, #220] @ (80050ac ) 8004fd0: 4293 cmp r3, r2 8004fd2: d202 bcs.n 8004fda { /* hclk Clock Range between 16-17.2 MHz */ UsbTrd = 0xDU; 8004fd4: 230d movs r3, #13 8004fd6: 617b str r3, [r7, #20] 8004fd8: e04c b.n 8005074 } else if ((hclk >= 17200000U) && (hclk < 18500000U)) 8004fda: 68bb ldr r3, [r7, #8] 8004fdc: 4a33 ldr r2, [pc, #204] @ (80050ac ) 8004fde: 4293 cmp r3, r2 8004fe0: d306 bcc.n 8004ff0 8004fe2: 68bb ldr r3, [r7, #8] 8004fe4: 4a32 ldr r2, [pc, #200] @ (80050b0 ) 8004fe6: 4293 cmp r3, r2 8004fe8: d802 bhi.n 8004ff0 { /* hclk Clock Range between 17.2-18.5 MHz */ UsbTrd = 0xCU; 8004fea: 230c movs r3, #12 8004fec: 617b str r3, [r7, #20] 8004fee: e041 b.n 8005074 } else if ((hclk >= 18500000U) && (hclk < 20000000U)) 8004ff0: 68bb ldr r3, [r7, #8] 8004ff2: 4a2f ldr r2, [pc, #188] @ (80050b0 ) 8004ff4: 4293 cmp r3, r2 8004ff6: d906 bls.n 8005006 8004ff8: 68bb ldr r3, [r7, #8] 8004ffa: 4a2e ldr r2, [pc, #184] @ (80050b4 ) 8004ffc: 4293 cmp r3, r2 8004ffe: d802 bhi.n 8005006 { /* hclk Clock Range between 18.5-20 MHz */ UsbTrd = 0xBU; 8005000: 230b movs r3, #11 8005002: 617b str r3, [r7, #20] 8005004: e036 b.n 8005074 } else if ((hclk >= 20000000U) && (hclk < 21800000U)) 8005006: 68bb ldr r3, [r7, #8] 8005008: 4a2a ldr r2, [pc, #168] @ (80050b4 ) 800500a: 4293 cmp r3, r2 800500c: d906 bls.n 800501c 800500e: 68bb ldr r3, [r7, #8] 8005010: 4a29 ldr r2, [pc, #164] @ (80050b8 ) 8005012: 4293 cmp r3, r2 8005014: d802 bhi.n 800501c { /* hclk Clock Range between 20-21.8 MHz */ UsbTrd = 0xAU; 8005016: 230a movs r3, #10 8005018: 617b str r3, [r7, #20] 800501a: e02b b.n 8005074 } else if ((hclk >= 21800000U) && (hclk < 24000000U)) 800501c: 68bb ldr r3, [r7, #8] 800501e: 4a26 ldr r2, [pc, #152] @ (80050b8 ) 8005020: 4293 cmp r3, r2 8005022: d906 bls.n 8005032 8005024: 68bb ldr r3, [r7, #8] 8005026: 4a25 ldr r2, [pc, #148] @ (80050bc ) 8005028: 4293 cmp r3, r2 800502a: d202 bcs.n 8005032 { /* hclk Clock Range between 21.8-24 MHz */ UsbTrd = 0x9U; 800502c: 2309 movs r3, #9 800502e: 617b str r3, [r7, #20] 8005030: e020 b.n 8005074 } else if ((hclk >= 24000000U) && (hclk < 27700000U)) 8005032: 68bb ldr r3, [r7, #8] 8005034: 4a21 ldr r2, [pc, #132] @ (80050bc ) 8005036: 4293 cmp r3, r2 8005038: d306 bcc.n 8005048 800503a: 68bb ldr r3, [r7, #8] 800503c: 4a20 ldr r2, [pc, #128] @ (80050c0 ) 800503e: 4293 cmp r3, r2 8005040: d802 bhi.n 8005048 { /* hclk Clock Range between 24-27.7 MHz */ UsbTrd = 0x8U; 8005042: 2308 movs r3, #8 8005044: 617b str r3, [r7, #20] 8005046: e015 b.n 8005074 } else if ((hclk >= 27700000U) && (hclk < 32000000U)) 8005048: 68bb ldr r3, [r7, #8] 800504a: 4a1d ldr r2, [pc, #116] @ (80050c0 ) 800504c: 4293 cmp r3, r2 800504e: d906 bls.n 800505e 8005050: 68bb ldr r3, [r7, #8] 8005052: 4a1c ldr r2, [pc, #112] @ (80050c4 ) 8005054: 4293 cmp r3, r2 8005056: d202 bcs.n 800505e { /* hclk Clock Range between 27.7-32 MHz */ UsbTrd = 0x7U; 8005058: 2307 movs r3, #7 800505a: 617b str r3, [r7, #20] 800505c: e00a b.n 8005074 } else /* if(hclk >= 32000000) */ { /* hclk Clock Range between 32-200 MHz */ UsbTrd = 0x6U; 800505e: 2306 movs r3, #6 8005060: 617b str r3, [r7, #20] 8005062: e007 b.n 8005074 } } else if (speed == USBD_HS_SPEED) 8005064: 79fb ldrb r3, [r7, #7] 8005066: 2b00 cmp r3, #0 8005068: d102 bne.n 8005070 { UsbTrd = USBD_HS_TRDT_VALUE; 800506a: 2309 movs r3, #9 800506c: 617b str r3, [r7, #20] 800506e: e001 b.n 8005074 } else { UsbTrd = USBD_DEFAULT_TRDT_VALUE; 8005070: 2309 movs r3, #9 8005072: 617b str r3, [r7, #20] } USBx->GUSBCFG &= ~USB_OTG_GUSBCFG_TRDT; 8005074: 68fb ldr r3, [r7, #12] 8005076: 68db ldr r3, [r3, #12] 8005078: f423 5270 bic.w r2, r3, #15360 @ 0x3c00 800507c: 68fb ldr r3, [r7, #12] 800507e: 60da str r2, [r3, #12] USBx->GUSBCFG |= (uint32_t)((UsbTrd << 10) & USB_OTG_GUSBCFG_TRDT); 8005080: 68fb ldr r3, [r7, #12] 8005082: 68da ldr r2, [r3, #12] 8005084: 697b ldr r3, [r7, #20] 8005086: 029b lsls r3, r3, #10 8005088: f403 5370 and.w r3, r3, #15360 @ 0x3c00 800508c: 431a orrs r2, r3 800508e: 68fb ldr r3, [r7, #12] 8005090: 60da str r2, [r3, #12] return HAL_OK; 8005092: 2300 movs r3, #0 } 8005094: 4618 mov r0, r3 8005096: 371c adds r7, #28 8005098: 46bd mov sp, r7 800509a: f85d 7b04 ldr.w r7, [sp], #4 800509e: 4770 bx lr 80050a0: 00d8acbf .word 0x00d8acbf 80050a4: 00e4e1c0 .word 0x00e4e1c0 80050a8: 00f42400 .word 0x00f42400 80050ac: 01067380 .word 0x01067380 80050b0: 011a499f .word 0x011a499f 80050b4: 01312cff .word 0x01312cff 80050b8: 014ca43f .word 0x014ca43f 80050bc: 016e3600 .word 0x016e3600 80050c0: 01a6ab1f .word 0x01a6ab1f 80050c4: 01e84800 .word 0x01e84800 080050c8 : * Enables the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx) { 80050c8: b480 push {r7} 80050ca: b083 sub sp, #12 80050cc: af00 add r7, sp, #0 80050ce: 6078 str r0, [r7, #4] USBx->GAHBCFG |= USB_OTG_GAHBCFG_GINT; 80050d0: 687b ldr r3, [r7, #4] 80050d2: 689b ldr r3, [r3, #8] 80050d4: f043 0201 orr.w r2, r3, #1 80050d8: 687b ldr r3, [r7, #4] 80050da: 609a str r2, [r3, #8] return HAL_OK; 80050dc: 2300 movs r3, #0 } 80050de: 4618 mov r0, r3 80050e0: 370c adds r7, #12 80050e2: 46bd mov sp, r7 80050e4: f85d 7b04 ldr.w r7, [sp], #4 80050e8: 4770 bx lr 080050ea : * Disable the controller's Global Int in the AHB Config reg * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx) { 80050ea: b480 push {r7} 80050ec: b083 sub sp, #12 80050ee: af00 add r7, sp, #0 80050f0: 6078 str r0, [r7, #4] USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT; 80050f2: 687b ldr r3, [r7, #4] 80050f4: 689b ldr r3, [r3, #8] 80050f6: f023 0201 bic.w r2, r3, #1 80050fa: 687b ldr r3, [r7, #4] 80050fc: 609a str r2, [r3, #8] return HAL_OK; 80050fe: 2300 movs r3, #0 } 8005100: 4618 mov r0, r3 8005102: 370c adds r7, #12 8005104: 46bd mov sp, r7 8005106: f85d 7b04 ldr.w r7, [sp], #4 800510a: 4770 bx lr 0800510c : * @arg USB_DEVICE_MODE Peripheral mode * @arg USB_HOST_MODE Host mode * @retval HAL status */ HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode) { 800510c: b580 push {r7, lr} 800510e: b084 sub sp, #16 8005110: af00 add r7, sp, #0 8005112: 6078 str r0, [r7, #4] 8005114: 460b mov r3, r1 8005116: 70fb strb r3, [r7, #3] uint32_t ms = 0U; 8005118: 2300 movs r3, #0 800511a: 60fb str r3, [r7, #12] USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD | USB_OTG_GUSBCFG_FDMOD); 800511c: 687b ldr r3, [r7, #4] 800511e: 68db ldr r3, [r3, #12] 8005120: f023 42c0 bic.w r2, r3, #1610612736 @ 0x60000000 8005124: 687b ldr r3, [r7, #4] 8005126: 60da str r2, [r3, #12] if (mode == USB_HOST_MODE) 8005128: 78fb ldrb r3, [r7, #3] 800512a: 2b01 cmp r3, #1 800512c: d115 bne.n 800515a { USBx->GUSBCFG |= USB_OTG_GUSBCFG_FHMOD; 800512e: 687b ldr r3, [r7, #4] 8005130: 68db ldr r3, [r3, #12] 8005132: f043 5200 orr.w r2, r3, #536870912 @ 0x20000000 8005136: 687b ldr r3, [r7, #4] 8005138: 60da str r2, [r3, #12] do { HAL_Delay(10U); 800513a: 200a movs r0, #10 800513c: f7fc f816 bl 800116c ms += 10U; 8005140: 68fb ldr r3, [r7, #12] 8005142: 330a adds r3, #10 8005144: 60fb str r3, [r7, #12] } while ((USB_GetMode(USBx) != (uint32_t)USB_HOST_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS)); 8005146: 6878 ldr r0, [r7, #4] 8005148: f001 f939 bl 80063be 800514c: 4603 mov r3, r0 800514e: 2b01 cmp r3, #1 8005150: d01e beq.n 8005190 8005152: 68fb ldr r3, [r7, #12] 8005154: 2bc7 cmp r3, #199 @ 0xc7 8005156: d9f0 bls.n 800513a 8005158: e01a b.n 8005190 } else if (mode == USB_DEVICE_MODE) 800515a: 78fb ldrb r3, [r7, #3] 800515c: 2b00 cmp r3, #0 800515e: d115 bne.n 800518c { USBx->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD; 8005160: 687b ldr r3, [r7, #4] 8005162: 68db ldr r3, [r3, #12] 8005164: f043 4280 orr.w r2, r3, #1073741824 @ 0x40000000 8005168: 687b ldr r3, [r7, #4] 800516a: 60da str r2, [r3, #12] do { HAL_Delay(10U); 800516c: 200a movs r0, #10 800516e: f7fb fffd bl 800116c ms += 10U; 8005172: 68fb ldr r3, [r7, #12] 8005174: 330a adds r3, #10 8005176: 60fb str r3, [r7, #12] } while ((USB_GetMode(USBx) != (uint32_t)USB_DEVICE_MODE) && (ms < HAL_USB_CURRENT_MODE_MAX_DELAY_MS)); 8005178: 6878 ldr r0, [r7, #4] 800517a: f001 f920 bl 80063be 800517e: 4603 mov r3, r0 8005180: 2b00 cmp r3, #0 8005182: d005 beq.n 8005190 8005184: 68fb ldr r3, [r7, #12] 8005186: 2bc7 cmp r3, #199 @ 0xc7 8005188: d9f0 bls.n 800516c 800518a: e001 b.n 8005190 } else { return HAL_ERROR; 800518c: 2301 movs r3, #1 800518e: e005 b.n 800519c } if (ms == HAL_USB_CURRENT_MODE_MAX_DELAY_MS) 8005190: 68fb ldr r3, [r7, #12] 8005192: 2bc8 cmp r3, #200 @ 0xc8 8005194: d101 bne.n 800519a { return HAL_ERROR; 8005196: 2301 movs r3, #1 8005198: e000 b.n 800519c } return HAL_OK; 800519a: 2300 movs r3, #0 } 800519c: 4618 mov r0, r3 800519e: 3710 adds r7, #16 80051a0: 46bd mov sp, r7 80051a2: bd80 pop {r7, pc} 080051a4 : * @param cfg pointer to a USB_OTG_CfgTypeDef structure that contains * the configuration information for the specified USBx peripheral. * @retval HAL status */ HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg) { 80051a4: b084 sub sp, #16 80051a6: b580 push {r7, lr} 80051a8: b086 sub sp, #24 80051aa: af00 add r7, sp, #0 80051ac: 6078 str r0, [r7, #4] 80051ae: f107 0024 add.w r0, r7, #36 @ 0x24 80051b2: e880 000e stmia.w r0, {r1, r2, r3} HAL_StatusTypeDef ret = HAL_OK; 80051b6: 2300 movs r3, #0 80051b8: 75fb strb r3, [r7, #23] uint32_t USBx_BASE = (uint32_t)USBx; 80051ba: 687b ldr r3, [r7, #4] 80051bc: 60fb str r3, [r7, #12] uint32_t i; for (i = 0U; i < 15U; i++) 80051be: 2300 movs r3, #0 80051c0: 613b str r3, [r7, #16] 80051c2: e009 b.n 80051d8 { USBx->DIEPTXF[i] = 0U; 80051c4: 687a ldr r2, [r7, #4] 80051c6: 693b ldr r3, [r7, #16] 80051c8: 3340 adds r3, #64 @ 0x40 80051ca: 009b lsls r3, r3, #2 80051cc: 4413 add r3, r2 80051ce: 2200 movs r2, #0 80051d0: 605a str r2, [r3, #4] for (i = 0U; i < 15U; i++) 80051d2: 693b ldr r3, [r7, #16] 80051d4: 3301 adds r3, #1 80051d6: 613b str r3, [r7, #16] 80051d8: 693b ldr r3, [r7, #16] 80051da: 2b0e cmp r3, #14 80051dc: d9f2 bls.n 80051c4 #if defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) \ || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) \ || defined(STM32F423xx) /* VBUS Sensing setup */ if (cfg.vbus_sensing_enable == 0U) 80051de: f897 302e ldrb.w r3, [r7, #46] @ 0x2e 80051e2: 2b00 cmp r3, #0 80051e4: d11c bne.n 8005220 { USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS; 80051e6: 68fb ldr r3, [r7, #12] 80051e8: f503 6300 add.w r3, r3, #2048 @ 0x800 80051ec: 685b ldr r3, [r3, #4] 80051ee: 68fa ldr r2, [r7, #12] 80051f0: f502 6200 add.w r2, r2, #2048 @ 0x800 80051f4: f043 0302 orr.w r3, r3, #2 80051f8: 6053 str r3, [r2, #4] /* Deactivate VBUS Sensing B */ USBx->GCCFG &= ~USB_OTG_GCCFG_VBDEN; 80051fa: 687b ldr r3, [r7, #4] 80051fc: 6b9b ldr r3, [r3, #56] @ 0x38 80051fe: f423 1200 bic.w r2, r3, #2097152 @ 0x200000 8005202: 687b ldr r3, [r7, #4] 8005204: 639a str r2, [r3, #56] @ 0x38 /* B-peripheral session valid override enable */ USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN; 8005206: 687b ldr r3, [r7, #4] 8005208: 681b ldr r3, [r3, #0] 800520a: f043 0240 orr.w r2, r3, #64 @ 0x40 800520e: 687b ldr r3, [r7, #4] 8005210: 601a str r2, [r3, #0] USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL; 8005212: 687b ldr r3, [r7, #4] 8005214: 681b ldr r3, [r3, #0] 8005216: f043 0280 orr.w r2, r3, #128 @ 0x80 800521a: 687b ldr r3, [r7, #4] 800521c: 601a str r2, [r3, #0] 800521e: e005 b.n 800522c } else { /* Enable HW VBUS sensing */ USBx->GCCFG |= USB_OTG_GCCFG_VBDEN; 8005220: 687b ldr r3, [r7, #4] 8005222: 6b9b ldr r3, [r3, #56] @ 0x38 8005224: f443 1200 orr.w r2, r3, #2097152 @ 0x200000 8005228: 687b ldr r3, [r7, #4] 800522a: 639a str r2, [r3, #56] @ 0x38 #endif /* defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) */ /* Restart the Phy Clock */ USBx_PCGCCTL = 0U; 800522c: 68fb ldr r3, [r7, #12] 800522e: f503 6360 add.w r3, r3, #3584 @ 0xe00 8005232: 461a mov r2, r3 8005234: 2300 movs r3, #0 8005236: 6013 str r3, [r2, #0] if (cfg.phy_itface == USB_OTG_ULPI_PHY) 8005238: f897 3029 ldrb.w r3, [r7, #41] @ 0x29 800523c: 2b01 cmp r3, #1 800523e: d10d bne.n 800525c { if (cfg.speed == USBD_HS_SPEED) 8005240: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8005244: 2b00 cmp r3, #0 8005246: d104 bne.n 8005252 { /* Set Core speed to High speed mode */ (void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_HIGH); 8005248: 2100 movs r1, #0 800524a: 6878 ldr r0, [r7, #4] 800524c: f000 f968 bl 8005520 8005250: e008 b.n 8005264 } else { /* Set Core speed to Full speed mode */ (void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_HIGH_IN_FULL); 8005252: 2101 movs r1, #1 8005254: 6878 ldr r0, [r7, #4] 8005256: f000 f963 bl 8005520 800525a: e003 b.n 8005264 } } else { /* Set Core speed to Full speed mode */ (void)USB_SetDevSpeed(USBx, USB_OTG_SPEED_FULL); 800525c: 2103 movs r1, #3 800525e: 6878 ldr r0, [r7, #4] 8005260: f000 f95e bl 8005520 } /* Flush the FIFOs */ if (USB_FlushTxFifo(USBx, 0x10U) != HAL_OK) /* all Tx FIFOs */ 8005264: 2110 movs r1, #16 8005266: 6878 ldr r0, [r7, #4] 8005268: f000 f8fa bl 8005460 800526c: 4603 mov r3, r0 800526e: 2b00 cmp r3, #0 8005270: d001 beq.n 8005276 { ret = HAL_ERROR; 8005272: 2301 movs r3, #1 8005274: 75fb strb r3, [r7, #23] } if (USB_FlushRxFifo(USBx) != HAL_OK) 8005276: 6878 ldr r0, [r7, #4] 8005278: f000 f924 bl 80054c4 800527c: 4603 mov r3, r0 800527e: 2b00 cmp r3, #0 8005280: d001 beq.n 8005286 { ret = HAL_ERROR; 8005282: 2301 movs r3, #1 8005284: 75fb strb r3, [r7, #23] } /* Clear all pending Device Interrupts */ USBx_DEVICE->DIEPMSK = 0U; 8005286: 68fb ldr r3, [r7, #12] 8005288: f503 6300 add.w r3, r3, #2048 @ 0x800 800528c: 461a mov r2, r3 800528e: 2300 movs r3, #0 8005290: 6113 str r3, [r2, #16] USBx_DEVICE->DOEPMSK = 0U; 8005292: 68fb ldr r3, [r7, #12] 8005294: f503 6300 add.w r3, r3, #2048 @ 0x800 8005298: 461a mov r2, r3 800529a: 2300 movs r3, #0 800529c: 6153 str r3, [r2, #20] USBx_DEVICE->DAINTMSK = 0U; 800529e: 68fb ldr r3, [r7, #12] 80052a0: f503 6300 add.w r3, r3, #2048 @ 0x800 80052a4: 461a mov r2, r3 80052a6: 2300 movs r3, #0 80052a8: 61d3 str r3, [r2, #28] for (i = 0U; i < cfg.dev_endpoints; i++) 80052aa: 2300 movs r3, #0 80052ac: 613b str r3, [r7, #16] 80052ae: e043 b.n 8005338 { if ((USBx_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) 80052b0: 693b ldr r3, [r7, #16] 80052b2: 015a lsls r2, r3, #5 80052b4: 68fb ldr r3, [r7, #12] 80052b6: 4413 add r3, r2 80052b8: f503 6310 add.w r3, r3, #2304 @ 0x900 80052bc: 681b ldr r3, [r3, #0] 80052be: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 80052c2: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 80052c6: d118 bne.n 80052fa { if (i == 0U) 80052c8: 693b ldr r3, [r7, #16] 80052ca: 2b00 cmp r3, #0 80052cc: d10a bne.n 80052e4 { USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_SNAK; 80052ce: 693b ldr r3, [r7, #16] 80052d0: 015a lsls r2, r3, #5 80052d2: 68fb ldr r3, [r7, #12] 80052d4: 4413 add r3, r2 80052d6: f503 6310 add.w r3, r3, #2304 @ 0x900 80052da: 461a mov r2, r3 80052dc: f04f 6300 mov.w r3, #134217728 @ 0x8000000 80052e0: 6013 str r3, [r2, #0] 80052e2: e013 b.n 800530c } else { USBx_INEP(i)->DIEPCTL = USB_OTG_DIEPCTL_EPDIS | USB_OTG_DIEPCTL_SNAK; 80052e4: 693b ldr r3, [r7, #16] 80052e6: 015a lsls r2, r3, #5 80052e8: 68fb ldr r3, [r7, #12] 80052ea: 4413 add r3, r2 80052ec: f503 6310 add.w r3, r3, #2304 @ 0x900 80052f0: 461a mov r2, r3 80052f2: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 80052f6: 6013 str r3, [r2, #0] 80052f8: e008 b.n 800530c } } else { USBx_INEP(i)->DIEPCTL = 0U; 80052fa: 693b ldr r3, [r7, #16] 80052fc: 015a lsls r2, r3, #5 80052fe: 68fb ldr r3, [r7, #12] 8005300: 4413 add r3, r2 8005302: f503 6310 add.w r3, r3, #2304 @ 0x900 8005306: 461a mov r2, r3 8005308: 2300 movs r3, #0 800530a: 6013 str r3, [r2, #0] } USBx_INEP(i)->DIEPTSIZ = 0U; 800530c: 693b ldr r3, [r7, #16] 800530e: 015a lsls r2, r3, #5 8005310: 68fb ldr r3, [r7, #12] 8005312: 4413 add r3, r2 8005314: f503 6310 add.w r3, r3, #2304 @ 0x900 8005318: 461a mov r2, r3 800531a: 2300 movs r3, #0 800531c: 6113 str r3, [r2, #16] USBx_INEP(i)->DIEPINT = 0xFB7FU; 800531e: 693b ldr r3, [r7, #16] 8005320: 015a lsls r2, r3, #5 8005322: 68fb ldr r3, [r7, #12] 8005324: 4413 add r3, r2 8005326: f503 6310 add.w r3, r3, #2304 @ 0x900 800532a: 461a mov r2, r3 800532c: f64f 337f movw r3, #64383 @ 0xfb7f 8005330: 6093 str r3, [r2, #8] for (i = 0U; i < cfg.dev_endpoints; i++) 8005332: 693b ldr r3, [r7, #16] 8005334: 3301 adds r3, #1 8005336: 613b str r3, [r7, #16] 8005338: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 800533c: 461a mov r2, r3 800533e: 693b ldr r3, [r7, #16] 8005340: 4293 cmp r3, r2 8005342: d3b5 bcc.n 80052b0 } for (i = 0U; i < cfg.dev_endpoints; i++) 8005344: 2300 movs r3, #0 8005346: 613b str r3, [r7, #16] 8005348: e043 b.n 80053d2 { if ((USBx_OUTEP(i)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) 800534a: 693b ldr r3, [r7, #16] 800534c: 015a lsls r2, r3, #5 800534e: 68fb ldr r3, [r7, #12] 8005350: 4413 add r3, r2 8005352: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005356: 681b ldr r3, [r3, #0] 8005358: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 800535c: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8005360: d118 bne.n 8005394 { if (i == 0U) 8005362: 693b ldr r3, [r7, #16] 8005364: 2b00 cmp r3, #0 8005366: d10a bne.n 800537e { USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_SNAK; 8005368: 693b ldr r3, [r7, #16] 800536a: 015a lsls r2, r3, #5 800536c: 68fb ldr r3, [r7, #12] 800536e: 4413 add r3, r2 8005370: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005374: 461a mov r2, r3 8005376: f04f 6300 mov.w r3, #134217728 @ 0x8000000 800537a: 6013 str r3, [r2, #0] 800537c: e013 b.n 80053a6 } else { USBx_OUTEP(i)->DOEPCTL = USB_OTG_DOEPCTL_EPDIS | USB_OTG_DOEPCTL_SNAK; 800537e: 693b ldr r3, [r7, #16] 8005380: 015a lsls r2, r3, #5 8005382: 68fb ldr r3, [r7, #12] 8005384: 4413 add r3, r2 8005386: f503 6330 add.w r3, r3, #2816 @ 0xb00 800538a: 461a mov r2, r3 800538c: f04f 4390 mov.w r3, #1207959552 @ 0x48000000 8005390: 6013 str r3, [r2, #0] 8005392: e008 b.n 80053a6 } } else { USBx_OUTEP(i)->DOEPCTL = 0U; 8005394: 693b ldr r3, [r7, #16] 8005396: 015a lsls r2, r3, #5 8005398: 68fb ldr r3, [r7, #12] 800539a: 4413 add r3, r2 800539c: f503 6330 add.w r3, r3, #2816 @ 0xb00 80053a0: 461a mov r2, r3 80053a2: 2300 movs r3, #0 80053a4: 6013 str r3, [r2, #0] } USBx_OUTEP(i)->DOEPTSIZ = 0U; 80053a6: 693b ldr r3, [r7, #16] 80053a8: 015a lsls r2, r3, #5 80053aa: 68fb ldr r3, [r7, #12] 80053ac: 4413 add r3, r2 80053ae: f503 6330 add.w r3, r3, #2816 @ 0xb00 80053b2: 461a mov r2, r3 80053b4: 2300 movs r3, #0 80053b6: 6113 str r3, [r2, #16] USBx_OUTEP(i)->DOEPINT = 0xFB7FU; 80053b8: 693b ldr r3, [r7, #16] 80053ba: 015a lsls r2, r3, #5 80053bc: 68fb ldr r3, [r7, #12] 80053be: 4413 add r3, r2 80053c0: f503 6330 add.w r3, r3, #2816 @ 0xb00 80053c4: 461a mov r2, r3 80053c6: f64f 337f movw r3, #64383 @ 0xfb7f 80053ca: 6093 str r3, [r2, #8] for (i = 0U; i < cfg.dev_endpoints; i++) 80053cc: 693b ldr r3, [r7, #16] 80053ce: 3301 adds r3, #1 80053d0: 613b str r3, [r7, #16] 80053d2: f897 3024 ldrb.w r3, [r7, #36] @ 0x24 80053d6: 461a mov r2, r3 80053d8: 693b ldr r3, [r7, #16] 80053da: 4293 cmp r3, r2 80053dc: d3b5 bcc.n 800534a } USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM); 80053de: 68fb ldr r3, [r7, #12] 80053e0: f503 6300 add.w r3, r3, #2048 @ 0x800 80053e4: 691b ldr r3, [r3, #16] 80053e6: 68fa ldr r2, [r7, #12] 80053e8: f502 6200 add.w r2, r2, #2048 @ 0x800 80053ec: f423 7380 bic.w r3, r3, #256 @ 0x100 80053f0: 6113 str r3, [r2, #16] /* Disable all interrupts. */ USBx->GINTMSK = 0U; 80053f2: 687b ldr r3, [r7, #4] 80053f4: 2200 movs r2, #0 80053f6: 619a str r2, [r3, #24] /* Clear any pending interrupts */ USBx->GINTSTS = 0xBFFFFFFFU; 80053f8: 687b ldr r3, [r7, #4] 80053fa: f06f 4280 mvn.w r2, #1073741824 @ 0x40000000 80053fe: 615a str r2, [r3, #20] /* Enable the common interrupts */ if (cfg.dma_enable == 0U) 8005400: f897 3026 ldrb.w r3, [r7, #38] @ 0x26 8005404: 2b00 cmp r3, #0 8005406: d105 bne.n 8005414 { USBx->GINTMSK |= USB_OTG_GINTMSK_RXFLVLM; 8005408: 687b ldr r3, [r7, #4] 800540a: 699b ldr r3, [r3, #24] 800540c: f043 0210 orr.w r2, r3, #16 8005410: 687b ldr r3, [r7, #4] 8005412: 619a str r2, [r3, #24] } /* Enable interrupts matching to the Device mode ONLY */ USBx->GINTMSK |= USB_OTG_GINTMSK_USBSUSPM | USB_OTG_GINTMSK_USBRST | 8005414: 687b ldr r3, [r7, #4] 8005416: 699a ldr r2, [r3, #24] 8005418: 4b10 ldr r3, [pc, #64] @ (800545c ) 800541a: 4313 orrs r3, r2 800541c: 687a ldr r2, [r7, #4] 800541e: 6193 str r3, [r2, #24] USB_OTG_GINTMSK_ENUMDNEM | USB_OTG_GINTMSK_IEPINT | USB_OTG_GINTMSK_OEPINT | USB_OTG_GINTMSK_IISOIXFRM | USB_OTG_GINTMSK_PXFRM_IISOOXFRM | USB_OTG_GINTMSK_WUIM; if (cfg.Sof_enable != 0U) 8005420: f897 302a ldrb.w r3, [r7, #42] @ 0x2a 8005424: 2b00 cmp r3, #0 8005426: d005 beq.n 8005434 { USBx->GINTMSK |= USB_OTG_GINTMSK_SOFM; 8005428: 687b ldr r3, [r7, #4] 800542a: 699b ldr r3, [r3, #24] 800542c: f043 0208 orr.w r2, r3, #8 8005430: 687b ldr r3, [r7, #4] 8005432: 619a str r2, [r3, #24] } if (cfg.vbus_sensing_enable == 1U) 8005434: f897 302e ldrb.w r3, [r7, #46] @ 0x2e 8005438: 2b01 cmp r3, #1 800543a: d107 bne.n 800544c { USBx->GINTMSK |= (USB_OTG_GINTMSK_SRQIM | USB_OTG_GINTMSK_OTGINT); 800543c: 687b ldr r3, [r7, #4] 800543e: 699b ldr r3, [r3, #24] 8005440: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 8005444: f043 0304 orr.w r3, r3, #4 8005448: 687a ldr r2, [r7, #4] 800544a: 6193 str r3, [r2, #24] } return ret; 800544c: 7dfb ldrb r3, [r7, #23] } 800544e: 4618 mov r0, r3 8005450: 3718 adds r7, #24 8005452: 46bd mov sp, r7 8005454: e8bd 4080 ldmia.w sp!, {r7, lr} 8005458: b004 add sp, #16 800545a: 4770 bx lr 800545c: 803c3800 .word 0x803c3800 08005460 : * This parameter can be a value from 1 to 15 15 means Flush all Tx FIFOs * @retval HAL status */ HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num) { 8005460: b480 push {r7} 8005462: b085 sub sp, #20 8005464: af00 add r7, sp, #0 8005466: 6078 str r0, [r7, #4] 8005468: 6039 str r1, [r7, #0] __IO uint32_t count = 0U; 800546a: 2300 movs r3, #0 800546c: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; 800546e: 68fb ldr r3, [r7, #12] 8005470: 3301 adds r3, #1 8005472: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 8005474: 68fb ldr r3, [r7, #12] 8005476: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 800547a: d901 bls.n 8005480 { return HAL_TIMEOUT; 800547c: 2303 movs r3, #3 800547e: e01b b.n 80054b8 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); 8005480: 687b ldr r3, [r7, #4] 8005482: 691b ldr r3, [r3, #16] 8005484: 2b00 cmp r3, #0 8005486: daf2 bge.n 800546e /* Flush TX Fifo */ count = 0U; 8005488: 2300 movs r3, #0 800548a: 60fb str r3, [r7, #12] USBx->GRSTCTL = (USB_OTG_GRSTCTL_TXFFLSH | (num << 6)); 800548c: 683b ldr r3, [r7, #0] 800548e: 019b lsls r3, r3, #6 8005490: f043 0220 orr.w r2, r3, #32 8005494: 687b ldr r3, [r7, #4] 8005496: 611a str r2, [r3, #16] do { count++; 8005498: 68fb ldr r3, [r7, #12] 800549a: 3301 adds r3, #1 800549c: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 800549e: 68fb ldr r3, [r7, #12] 80054a0: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 80054a4: d901 bls.n 80054aa { return HAL_TIMEOUT; 80054a6: 2303 movs r3, #3 80054a8: e006 b.n 80054b8 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH); 80054aa: 687b ldr r3, [r7, #4] 80054ac: 691b ldr r3, [r3, #16] 80054ae: f003 0320 and.w r3, r3, #32 80054b2: 2b20 cmp r3, #32 80054b4: d0f0 beq.n 8005498 return HAL_OK; 80054b6: 2300 movs r3, #0 } 80054b8: 4618 mov r0, r3 80054ba: 3714 adds r7, #20 80054bc: 46bd mov sp, r7 80054be: f85d 7b04 ldr.w r7, [sp], #4 80054c2: 4770 bx lr 080054c4 : * @brief USB_FlushRxFifo Flush Rx FIFO * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx) { 80054c4: b480 push {r7} 80054c6: b085 sub sp, #20 80054c8: af00 add r7, sp, #0 80054ca: 6078 str r0, [r7, #4] __IO uint32_t count = 0U; 80054cc: 2300 movs r3, #0 80054ce: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; 80054d0: 68fb ldr r3, [r7, #12] 80054d2: 3301 adds r3, #1 80054d4: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 80054d6: 68fb ldr r3, [r7, #12] 80054d8: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 80054dc: d901 bls.n 80054e2 { return HAL_TIMEOUT; 80054de: 2303 movs r3, #3 80054e0: e018 b.n 8005514 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); 80054e2: 687b ldr r3, [r7, #4] 80054e4: 691b ldr r3, [r3, #16] 80054e6: 2b00 cmp r3, #0 80054e8: daf2 bge.n 80054d0 /* Flush RX Fifo */ count = 0U; 80054ea: 2300 movs r3, #0 80054ec: 60fb str r3, [r7, #12] USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH; 80054ee: 687b ldr r3, [r7, #4] 80054f0: 2210 movs r2, #16 80054f2: 611a str r2, [r3, #16] do { count++; 80054f4: 68fb ldr r3, [r7, #12] 80054f6: 3301 adds r3, #1 80054f8: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 80054fa: 68fb ldr r3, [r7, #12] 80054fc: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 8005500: d901 bls.n 8005506 { return HAL_TIMEOUT; 8005502: 2303 movs r3, #3 8005504: e006 b.n 8005514 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH); 8005506: 687b ldr r3, [r7, #4] 8005508: 691b ldr r3, [r3, #16] 800550a: f003 0310 and.w r3, r3, #16 800550e: 2b10 cmp r3, #16 8005510: d0f0 beq.n 80054f4 return HAL_OK; 8005512: 2300 movs r3, #0 } 8005514: 4618 mov r0, r3 8005516: 3714 adds r7, #20 8005518: 46bd mov sp, r7 800551a: f85d 7b04 ldr.w r7, [sp], #4 800551e: 4770 bx lr 08005520 : * @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode * @arg USB_OTG_SPEED_FULL: Full speed mode * @retval Hal status */ HAL_StatusTypeDef USB_SetDevSpeed(const USB_OTG_GlobalTypeDef *USBx, uint8_t speed) { 8005520: b480 push {r7} 8005522: b085 sub sp, #20 8005524: af00 add r7, sp, #0 8005526: 6078 str r0, [r7, #4] 8005528: 460b mov r3, r1 800552a: 70fb strb r3, [r7, #3] uint32_t USBx_BASE = (uint32_t)USBx; 800552c: 687b ldr r3, [r7, #4] 800552e: 60fb str r3, [r7, #12] USBx_DEVICE->DCFG |= speed; 8005530: 68fb ldr r3, [r7, #12] 8005532: f503 6300 add.w r3, r3, #2048 @ 0x800 8005536: 681a ldr r2, [r3, #0] 8005538: 78fb ldrb r3, [r7, #3] 800553a: 68f9 ldr r1, [r7, #12] 800553c: f501 6100 add.w r1, r1, #2048 @ 0x800 8005540: 4313 orrs r3, r2 8005542: 600b str r3, [r1, #0] return HAL_OK; 8005544: 2300 movs r3, #0 } 8005546: 4618 mov r0, r3 8005548: 3714 adds r7, #20 800554a: 46bd mov sp, r7 800554c: f85d 7b04 ldr.w r7, [sp], #4 8005550: 4770 bx lr 08005552 : * This parameter can be one of these values: * @arg USBD_HS_SPEED: High speed mode * @arg USBD_FS_SPEED: Full speed mode */ uint8_t USB_GetDevSpeed(const USB_OTG_GlobalTypeDef *USBx) { 8005552: b480 push {r7} 8005554: b087 sub sp, #28 8005556: af00 add r7, sp, #0 8005558: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 800555a: 687b ldr r3, [r7, #4] 800555c: 613b str r3, [r7, #16] uint8_t speed; uint32_t DevEnumSpeed = USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD; 800555e: 693b ldr r3, [r7, #16] 8005560: f503 6300 add.w r3, r3, #2048 @ 0x800 8005564: 689b ldr r3, [r3, #8] 8005566: f003 0306 and.w r3, r3, #6 800556a: 60fb str r3, [r7, #12] if (DevEnumSpeed == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ) 800556c: 68fb ldr r3, [r7, #12] 800556e: 2b00 cmp r3, #0 8005570: d102 bne.n 8005578 { speed = USBD_HS_SPEED; 8005572: 2300 movs r3, #0 8005574: 75fb strb r3, [r7, #23] 8005576: e00a b.n 800558e } else if ((DevEnumSpeed == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ) || 8005578: 68fb ldr r3, [r7, #12] 800557a: 2b02 cmp r3, #2 800557c: d002 beq.n 8005584 800557e: 68fb ldr r3, [r7, #12] 8005580: 2b06 cmp r3, #6 8005582: d102 bne.n 800558a (DevEnumSpeed == DSTS_ENUMSPD_FS_PHY_48MHZ)) { speed = USBD_FS_SPEED; 8005584: 2302 movs r3, #2 8005586: 75fb strb r3, [r7, #23] 8005588: e001 b.n 800558e } else { speed = 0xFU; 800558a: 230f movs r3, #15 800558c: 75fb strb r3, [r7, #23] } return speed; 800558e: 7dfb ldrb r3, [r7, #23] } 8005590: 4618 mov r0, r3 8005592: 371c adds r7, #28 8005594: 46bd mov sp, r7 8005596: f85d 7b04 ldr.w r7, [sp], #4 800559a: 4770 bx lr 0800559c : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_ActivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep) { 800559c: b480 push {r7} 800559e: b085 sub sp, #20 80055a0: af00 add r7, sp, #0 80055a2: 6078 str r0, [r7, #4] 80055a4: 6039 str r1, [r7, #0] uint32_t USBx_BASE = (uint32_t)USBx; 80055a6: 687b ldr r3, [r7, #4] 80055a8: 60fb str r3, [r7, #12] uint32_t epnum = (uint32_t)ep->num; 80055aa: 683b ldr r3, [r7, #0] 80055ac: 781b ldrb r3, [r3, #0] 80055ae: 60bb str r3, [r7, #8] if (ep->is_in == 1U) 80055b0: 683b ldr r3, [r7, #0] 80055b2: 785b ldrb r3, [r3, #1] 80055b4: 2b01 cmp r3, #1 80055b6: d13a bne.n 800562e { USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK)); 80055b8: 68fb ldr r3, [r7, #12] 80055ba: f503 6300 add.w r3, r3, #2048 @ 0x800 80055be: 69da ldr r2, [r3, #28] 80055c0: 683b ldr r3, [r7, #0] 80055c2: 781b ldrb r3, [r3, #0] 80055c4: f003 030f and.w r3, r3, #15 80055c8: 2101 movs r1, #1 80055ca: fa01 f303 lsl.w r3, r1, r3 80055ce: b29b uxth r3, r3 80055d0: 68f9 ldr r1, [r7, #12] 80055d2: f501 6100 add.w r1, r1, #2048 @ 0x800 80055d6: 4313 orrs r3, r2 80055d8: 61cb str r3, [r1, #28] if ((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_USBAEP) == 0U) 80055da: 68bb ldr r3, [r7, #8] 80055dc: 015a lsls r2, r3, #5 80055de: 68fb ldr r3, [r7, #12] 80055e0: 4413 add r3, r2 80055e2: f503 6310 add.w r3, r3, #2304 @ 0x900 80055e6: 681b ldr r3, [r3, #0] 80055e8: f403 4300 and.w r3, r3, #32768 @ 0x8000 80055ec: 2b00 cmp r3, #0 80055ee: d155 bne.n 800569c { USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) | 80055f0: 68bb ldr r3, [r7, #8] 80055f2: 015a lsls r2, r3, #5 80055f4: 68fb ldr r3, [r7, #12] 80055f6: 4413 add r3, r2 80055f8: f503 6310 add.w r3, r3, #2304 @ 0x900 80055fc: 681a ldr r2, [r3, #0] 80055fe: 683b ldr r3, [r7, #0] 8005600: 689b ldr r3, [r3, #8] 8005602: f3c3 010a ubfx r1, r3, #0, #11 ((uint32_t)ep->type << 18) | (epnum << 22) | 8005606: 683b ldr r3, [r7, #0] 8005608: 791b ldrb r3, [r3, #4] 800560a: 049b lsls r3, r3, #18 USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) | 800560c: 4319 orrs r1, r3 ((uint32_t)ep->type << 18) | (epnum << 22) | 800560e: 68bb ldr r3, [r7, #8] 8005610: 059b lsls r3, r3, #22 8005612: 430b orrs r3, r1 USBx_INEP(epnum)->DIEPCTL |= (ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ) | 8005614: 4313 orrs r3, r2 8005616: 68ba ldr r2, [r7, #8] 8005618: 0151 lsls r1, r2, #5 800561a: 68fa ldr r2, [r7, #12] 800561c: 440a add r2, r1 800561e: f502 6210 add.w r2, r2, #2304 @ 0x900 8005622: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8005626: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800562a: 6013 str r3, [r2, #0] 800562c: e036 b.n 800569c USB_OTG_DIEPCTL_USBAEP; } } else { USBx_DEVICE->DAINTMSK |= USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16); 800562e: 68fb ldr r3, [r7, #12] 8005630: f503 6300 add.w r3, r3, #2048 @ 0x800 8005634: 69da ldr r2, [r3, #28] 8005636: 683b ldr r3, [r7, #0] 8005638: 781b ldrb r3, [r3, #0] 800563a: f003 030f and.w r3, r3, #15 800563e: 2101 movs r1, #1 8005640: fa01 f303 lsl.w r3, r1, r3 8005644: 041b lsls r3, r3, #16 8005646: 68f9 ldr r1, [r7, #12] 8005648: f501 6100 add.w r1, r1, #2048 @ 0x800 800564c: 4313 orrs r3, r2 800564e: 61cb str r3, [r1, #28] if (((USBx_OUTEP(epnum)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0U) 8005650: 68bb ldr r3, [r7, #8] 8005652: 015a lsls r2, r3, #5 8005654: 68fb ldr r3, [r7, #12] 8005656: 4413 add r3, r2 8005658: f503 6330 add.w r3, r3, #2816 @ 0xb00 800565c: 681b ldr r3, [r3, #0] 800565e: f403 4300 and.w r3, r3, #32768 @ 0x8000 8005662: 2b00 cmp r3, #0 8005664: d11a bne.n 800569c { USBx_OUTEP(epnum)->DOEPCTL |= (ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ) | 8005666: 68bb ldr r3, [r7, #8] 8005668: 015a lsls r2, r3, #5 800566a: 68fb ldr r3, [r7, #12] 800566c: 4413 add r3, r2 800566e: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005672: 681a ldr r2, [r3, #0] 8005674: 683b ldr r3, [r7, #0] 8005676: 689b ldr r3, [r3, #8] 8005678: f3c3 010a ubfx r1, r3, #0, #11 ((uint32_t)ep->type << 18) | 800567c: 683b ldr r3, [r7, #0] 800567e: 791b ldrb r3, [r3, #4] 8005680: 049b lsls r3, r3, #18 USBx_OUTEP(epnum)->DOEPCTL |= (ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ) | 8005682: 430b orrs r3, r1 8005684: 4313 orrs r3, r2 8005686: 68ba ldr r2, [r7, #8] 8005688: 0151 lsls r1, r2, #5 800568a: 68fa ldr r2, [r7, #12] 800568c: 440a add r2, r1 800568e: f502 6230 add.w r2, r2, #2816 @ 0xb00 8005692: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8005696: f443 4300 orr.w r3, r3, #32768 @ 0x8000 800569a: 6013 str r3, [r2, #0] USB_OTG_DIEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_USBAEP; } } return HAL_OK; 800569c: 2300 movs r3, #0 } 800569e: 4618 mov r0, r3 80056a0: 3714 adds r7, #20 80056a2: 46bd mov sp, r7 80056a4: f85d 7b04 ldr.w r7, [sp], #4 80056a8: 4770 bx lr ... 080056ac : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_DeactivateEndpoint(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep) { 80056ac: b480 push {r7} 80056ae: b085 sub sp, #20 80056b0: af00 add r7, sp, #0 80056b2: 6078 str r0, [r7, #4] 80056b4: 6039 str r1, [r7, #0] uint32_t USBx_BASE = (uint32_t)USBx; 80056b6: 687b ldr r3, [r7, #4] 80056b8: 60fb str r3, [r7, #12] uint32_t epnum = (uint32_t)ep->num; 80056ba: 683b ldr r3, [r7, #0] 80056bc: 781b ldrb r3, [r3, #0] 80056be: 60bb str r3, [r7, #8] /* Read DEPCTLn register */ if (ep->is_in == 1U) 80056c0: 683b ldr r3, [r7, #0] 80056c2: 785b ldrb r3, [r3, #1] 80056c4: 2b01 cmp r3, #1 80056c6: d161 bne.n 800578c { if ((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) 80056c8: 68bb ldr r3, [r7, #8] 80056ca: 015a lsls r2, r3, #5 80056cc: 68fb ldr r3, [r7, #12] 80056ce: 4413 add r3, r2 80056d0: f503 6310 add.w r3, r3, #2304 @ 0x900 80056d4: 681b ldr r3, [r3, #0] 80056d6: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 80056da: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 80056de: d11f bne.n 8005720 { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SNAK; 80056e0: 68bb ldr r3, [r7, #8] 80056e2: 015a lsls r2, r3, #5 80056e4: 68fb ldr r3, [r7, #12] 80056e6: 4413 add r3, r2 80056e8: f503 6310 add.w r3, r3, #2304 @ 0x900 80056ec: 681b ldr r3, [r3, #0] 80056ee: 68ba ldr r2, [r7, #8] 80056f0: 0151 lsls r1, r2, #5 80056f2: 68fa ldr r2, [r7, #12] 80056f4: 440a add r2, r1 80056f6: f502 6210 add.w r2, r2, #2304 @ 0x900 80056fa: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 80056fe: 6013 str r3, [r2, #0] USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_EPDIS; 8005700: 68bb ldr r3, [r7, #8] 8005702: 015a lsls r2, r3, #5 8005704: 68fb ldr r3, [r7, #12] 8005706: 4413 add r3, r2 8005708: f503 6310 add.w r3, r3, #2304 @ 0x900 800570c: 681b ldr r3, [r3, #0] 800570e: 68ba ldr r2, [r7, #8] 8005710: 0151 lsls r1, r2, #5 8005712: 68fa ldr r2, [r7, #12] 8005714: 440a add r2, r1 8005716: f502 6210 add.w r2, r2, #2304 @ 0x900 800571a: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 800571e: 6013 str r3, [r2, #0] } USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK))); 8005720: 68fb ldr r3, [r7, #12] 8005722: f503 6300 add.w r3, r3, #2048 @ 0x800 8005726: 6bda ldr r2, [r3, #60] @ 0x3c 8005728: 683b ldr r3, [r7, #0] 800572a: 781b ldrb r3, [r3, #0] 800572c: f003 030f and.w r3, r3, #15 8005730: 2101 movs r1, #1 8005732: fa01 f303 lsl.w r3, r1, r3 8005736: b29b uxth r3, r3 8005738: 43db mvns r3, r3 800573a: 68f9 ldr r1, [r7, #12] 800573c: f501 6100 add.w r1, r1, #2048 @ 0x800 8005740: 4013 ands r3, r2 8005742: 63cb str r3, [r1, #60] @ 0x3c USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & (uint32_t)(1UL << (ep->num & EP_ADDR_MSK))); 8005744: 68fb ldr r3, [r7, #12] 8005746: f503 6300 add.w r3, r3, #2048 @ 0x800 800574a: 69da ldr r2, [r3, #28] 800574c: 683b ldr r3, [r7, #0] 800574e: 781b ldrb r3, [r3, #0] 8005750: f003 030f and.w r3, r3, #15 8005754: 2101 movs r1, #1 8005756: fa01 f303 lsl.w r3, r1, r3 800575a: b29b uxth r3, r3 800575c: 43db mvns r3, r3 800575e: 68f9 ldr r1, [r7, #12] 8005760: f501 6100 add.w r1, r1, #2048 @ 0x800 8005764: 4013 ands r3, r2 8005766: 61cb str r3, [r1, #28] USBx_INEP(epnum)->DIEPCTL &= ~(USB_OTG_DIEPCTL_USBAEP | 8005768: 68bb ldr r3, [r7, #8] 800576a: 015a lsls r2, r3, #5 800576c: 68fb ldr r3, [r7, #12] 800576e: 4413 add r3, r2 8005770: f503 6310 add.w r3, r3, #2304 @ 0x900 8005774: 681a ldr r2, [r3, #0] 8005776: 68bb ldr r3, [r7, #8] 8005778: 0159 lsls r1, r3, #5 800577a: 68fb ldr r3, [r7, #12] 800577c: 440b add r3, r1 800577e: f503 6310 add.w r3, r3, #2304 @ 0x900 8005782: 4619 mov r1, r3 8005784: 4b35 ldr r3, [pc, #212] @ (800585c ) 8005786: 4013 ands r3, r2 8005788: 600b str r3, [r1, #0] 800578a: e060 b.n 800584e USB_OTG_DIEPCTL_SD0PID_SEVNFRM | USB_OTG_DIEPCTL_EPTYP); } else { if ((USBx_OUTEP(epnum)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) 800578c: 68bb ldr r3, [r7, #8] 800578e: 015a lsls r2, r3, #5 8005790: 68fb ldr r3, [r7, #12] 8005792: 4413 add r3, r2 8005794: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005798: 681b ldr r3, [r3, #0] 800579a: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 800579e: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 80057a2: d11f bne.n 80057e4 { USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SNAK; 80057a4: 68bb ldr r3, [r7, #8] 80057a6: 015a lsls r2, r3, #5 80057a8: 68fb ldr r3, [r7, #12] 80057aa: 4413 add r3, r2 80057ac: f503 6330 add.w r3, r3, #2816 @ 0xb00 80057b0: 681b ldr r3, [r3, #0] 80057b2: 68ba ldr r2, [r7, #8] 80057b4: 0151 lsls r1, r2, #5 80057b6: 68fa ldr r2, [r7, #12] 80057b8: 440a add r2, r1 80057ba: f502 6230 add.w r2, r2, #2816 @ 0xb00 80057be: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 80057c2: 6013 str r3, [r2, #0] USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_EPDIS; 80057c4: 68bb ldr r3, [r7, #8] 80057c6: 015a lsls r2, r3, #5 80057c8: 68fb ldr r3, [r7, #12] 80057ca: 4413 add r3, r2 80057cc: f503 6330 add.w r3, r3, #2816 @ 0xb00 80057d0: 681b ldr r3, [r3, #0] 80057d2: 68ba ldr r2, [r7, #8] 80057d4: 0151 lsls r1, r2, #5 80057d6: 68fa ldr r2, [r7, #12] 80057d8: 440a add r2, r1 80057da: f502 6230 add.w r2, r2, #2816 @ 0xb00 80057de: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 80057e2: 6013 str r3, [r2, #0] } USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16)); 80057e4: 68fb ldr r3, [r7, #12] 80057e6: f503 6300 add.w r3, r3, #2048 @ 0x800 80057ea: 6bda ldr r2, [r3, #60] @ 0x3c 80057ec: 683b ldr r3, [r7, #0] 80057ee: 781b ldrb r3, [r3, #0] 80057f0: f003 030f and.w r3, r3, #15 80057f4: 2101 movs r1, #1 80057f6: fa01 f303 lsl.w r3, r1, r3 80057fa: 041b lsls r3, r3, #16 80057fc: 43db mvns r3, r3 80057fe: 68f9 ldr r1, [r7, #12] 8005800: f501 6100 add.w r1, r1, #2048 @ 0x800 8005804: 4013 ands r3, r2 8005806: 63cb str r3, [r1, #60] @ 0x3c USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((uint32_t)(1UL << (ep->num & EP_ADDR_MSK)) << 16)); 8005808: 68fb ldr r3, [r7, #12] 800580a: f503 6300 add.w r3, r3, #2048 @ 0x800 800580e: 69da ldr r2, [r3, #28] 8005810: 683b ldr r3, [r7, #0] 8005812: 781b ldrb r3, [r3, #0] 8005814: f003 030f and.w r3, r3, #15 8005818: 2101 movs r1, #1 800581a: fa01 f303 lsl.w r3, r1, r3 800581e: 041b lsls r3, r3, #16 8005820: 43db mvns r3, r3 8005822: 68f9 ldr r1, [r7, #12] 8005824: f501 6100 add.w r1, r1, #2048 @ 0x800 8005828: 4013 ands r3, r2 800582a: 61cb str r3, [r1, #28] USBx_OUTEP(epnum)->DOEPCTL &= ~(USB_OTG_DOEPCTL_USBAEP | 800582c: 68bb ldr r3, [r7, #8] 800582e: 015a lsls r2, r3, #5 8005830: 68fb ldr r3, [r7, #12] 8005832: 4413 add r3, r2 8005834: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005838: 681a ldr r2, [r3, #0] 800583a: 68bb ldr r3, [r7, #8] 800583c: 0159 lsls r1, r3, #5 800583e: 68fb ldr r3, [r7, #12] 8005840: 440b add r3, r1 8005842: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005846: 4619 mov r1, r3 8005848: 4b05 ldr r3, [pc, #20] @ (8005860 ) 800584a: 4013 ands r3, r2 800584c: 600b str r3, [r1, #0] USB_OTG_DOEPCTL_MPSIZ | USB_OTG_DOEPCTL_SD0PID_SEVNFRM | USB_OTG_DOEPCTL_EPTYP); } return HAL_OK; 800584e: 2300 movs r3, #0 } 8005850: 4618 mov r0, r3 8005852: 3714 adds r7, #20 8005854: 46bd mov sp, r7 8005856: f85d 7b04 ldr.w r7, [sp], #4 800585a: 4770 bx lr 800585c: ec337800 .word 0xec337800 8005860: eff37800 .word 0xeff37800 08005864 : * 0 : DMA feature not used * 1 : DMA feature used * @retval HAL status */ HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma) { 8005864: b580 push {r7, lr} 8005866: b08a sub sp, #40 @ 0x28 8005868: af02 add r7, sp, #8 800586a: 60f8 str r0, [r7, #12] 800586c: 60b9 str r1, [r7, #8] 800586e: 4613 mov r3, r2 8005870: 71fb strb r3, [r7, #7] uint32_t USBx_BASE = (uint32_t)USBx; 8005872: 68fb ldr r3, [r7, #12] 8005874: 61fb str r3, [r7, #28] uint32_t epnum = (uint32_t)ep->num; 8005876: 68bb ldr r3, [r7, #8] 8005878: 781b ldrb r3, [r3, #0] 800587a: 61bb str r3, [r7, #24] uint16_t pktcnt; /* IN endpoint */ if (ep->is_in == 1U) 800587c: 68bb ldr r3, [r7, #8] 800587e: 785b ldrb r3, [r3, #1] 8005880: 2b01 cmp r3, #1 8005882: f040 817f bne.w 8005b84 { /* Zero Length Packet? */ if (ep->xfer_len == 0U) 8005886: 68bb ldr r3, [r7, #8] 8005888: 691b ldr r3, [r3, #16] 800588a: 2b00 cmp r3, #0 800588c: d132 bne.n 80058f4 { USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); 800588e: 69bb ldr r3, [r7, #24] 8005890: 015a lsls r2, r3, #5 8005892: 69fb ldr r3, [r7, #28] 8005894: 4413 add r3, r2 8005896: f503 6310 add.w r3, r3, #2304 @ 0x900 800589a: 691b ldr r3, [r3, #16] 800589c: 69ba ldr r2, [r7, #24] 800589e: 0151 lsls r1, r2, #5 80058a0: 69fa ldr r2, [r7, #28] 80058a2: 440a add r2, r1 80058a4: f502 6210 add.w r2, r2, #2304 @ 0x900 80058a8: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000 80058ac: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000 80058b0: 6113 str r3, [r2, #16] USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19)); 80058b2: 69bb ldr r3, [r7, #24] 80058b4: 015a lsls r2, r3, #5 80058b6: 69fb ldr r3, [r7, #28] 80058b8: 4413 add r3, r2 80058ba: f503 6310 add.w r3, r3, #2304 @ 0x900 80058be: 691b ldr r3, [r3, #16] 80058c0: 69ba ldr r2, [r7, #24] 80058c2: 0151 lsls r1, r2, #5 80058c4: 69fa ldr r2, [r7, #28] 80058c6: 440a add r2, r1 80058c8: f502 6210 add.w r2, r2, #2304 @ 0x900 80058cc: f443 2300 orr.w r3, r3, #524288 @ 0x80000 80058d0: 6113 str r3, [r2, #16] USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); 80058d2: 69bb ldr r3, [r7, #24] 80058d4: 015a lsls r2, r3, #5 80058d6: 69fb ldr r3, [r7, #28] 80058d8: 4413 add r3, r2 80058da: f503 6310 add.w r3, r3, #2304 @ 0x900 80058de: 691b ldr r3, [r3, #16] 80058e0: 69ba ldr r2, [r7, #24] 80058e2: 0151 lsls r1, r2, #5 80058e4: 69fa ldr r2, [r7, #28] 80058e6: 440a add r2, r1 80058e8: f502 6210 add.w r2, r2, #2304 @ 0x900 80058ec: 0cdb lsrs r3, r3, #19 80058ee: 04db lsls r3, r3, #19 80058f0: 6113 str r3, [r2, #16] 80058f2: e097 b.n 8005a24 /* Program the transfer size and packet count * as follows: xfersize = N * maxpacket + * short_packet pktcnt = N + (short_packet * exist ? 1 : 0) */ USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ); 80058f4: 69bb ldr r3, [r7, #24] 80058f6: 015a lsls r2, r3, #5 80058f8: 69fb ldr r3, [r7, #28] 80058fa: 4413 add r3, r2 80058fc: f503 6310 add.w r3, r3, #2304 @ 0x900 8005900: 691b ldr r3, [r3, #16] 8005902: 69ba ldr r2, [r7, #24] 8005904: 0151 lsls r1, r2, #5 8005906: 69fa ldr r2, [r7, #28] 8005908: 440a add r2, r1 800590a: f502 6210 add.w r2, r2, #2304 @ 0x900 800590e: 0cdb lsrs r3, r3, #19 8005910: 04db lsls r3, r3, #19 8005912: 6113 str r3, [r2, #16] USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT); 8005914: 69bb ldr r3, [r7, #24] 8005916: 015a lsls r2, r3, #5 8005918: 69fb ldr r3, [r7, #28] 800591a: 4413 add r3, r2 800591c: f503 6310 add.w r3, r3, #2304 @ 0x900 8005920: 691b ldr r3, [r3, #16] 8005922: 69ba ldr r2, [r7, #24] 8005924: 0151 lsls r1, r2, #5 8005926: 69fa ldr r2, [r7, #28] 8005928: 440a add r2, r1 800592a: f502 6210 add.w r2, r2, #2304 @ 0x900 800592e: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000 8005932: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000 8005936: 6113 str r3, [r2, #16] if (epnum == 0U) 8005938: 69bb ldr r3, [r7, #24] 800593a: 2b00 cmp r3, #0 800593c: d11a bne.n 8005974 { if (ep->xfer_len > ep->maxpacket) 800593e: 68bb ldr r3, [r7, #8] 8005940: 691a ldr r2, [r3, #16] 8005942: 68bb ldr r3, [r7, #8] 8005944: 689b ldr r3, [r3, #8] 8005946: 429a cmp r2, r3 8005948: d903 bls.n 8005952 { ep->xfer_len = ep->maxpacket; 800594a: 68bb ldr r3, [r7, #8] 800594c: 689a ldr r2, [r3, #8] 800594e: 68bb ldr r3, [r7, #8] 8005950: 611a str r2, [r3, #16] } USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & (1U << 19)); 8005952: 69bb ldr r3, [r7, #24] 8005954: 015a lsls r2, r3, #5 8005956: 69fb ldr r3, [r7, #28] 8005958: 4413 add r3, r2 800595a: f503 6310 add.w r3, r3, #2304 @ 0x900 800595e: 691b ldr r3, [r3, #16] 8005960: 69ba ldr r2, [r7, #24] 8005962: 0151 lsls r1, r2, #5 8005964: 69fa ldr r2, [r7, #28] 8005966: 440a add r2, r1 8005968: f502 6210 add.w r2, r2, #2304 @ 0x900 800596c: f443 2300 orr.w r3, r3, #524288 @ 0x80000 8005970: 6113 str r3, [r2, #16] 8005972: e044 b.n 80059fe } else { pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket); 8005974: 68bb ldr r3, [r7, #8] 8005976: 691a ldr r2, [r3, #16] 8005978: 68bb ldr r3, [r7, #8] 800597a: 689b ldr r3, [r3, #8] 800597c: 4413 add r3, r2 800597e: 1e5a subs r2, r3, #1 8005980: 68bb ldr r3, [r7, #8] 8005982: 689b ldr r3, [r3, #8] 8005984: fbb2 f3f3 udiv r3, r2, r3 8005988: 82fb strh r3, [r7, #22] USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19)); 800598a: 69bb ldr r3, [r7, #24] 800598c: 015a lsls r2, r3, #5 800598e: 69fb ldr r3, [r7, #28] 8005990: 4413 add r3, r2 8005992: f503 6310 add.w r3, r3, #2304 @ 0x900 8005996: 691a ldr r2, [r3, #16] 8005998: 8afb ldrh r3, [r7, #22] 800599a: 04d9 lsls r1, r3, #19 800599c: 4ba4 ldr r3, [pc, #656] @ (8005c30 ) 800599e: 400b ands r3, r1 80059a0: 69b9 ldr r1, [r7, #24] 80059a2: 0148 lsls r0, r1, #5 80059a4: 69f9 ldr r1, [r7, #28] 80059a6: 4401 add r1, r0 80059a8: f501 6110 add.w r1, r1, #2304 @ 0x900 80059ac: 4313 orrs r3, r2 80059ae: 610b str r3, [r1, #16] if (ep->type == EP_TYPE_ISOC) 80059b0: 68bb ldr r3, [r7, #8] 80059b2: 791b ldrb r3, [r3, #4] 80059b4: 2b01 cmp r3, #1 80059b6: d122 bne.n 80059fe { USBx_INEP(epnum)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT); 80059b8: 69bb ldr r3, [r7, #24] 80059ba: 015a lsls r2, r3, #5 80059bc: 69fb ldr r3, [r7, #28] 80059be: 4413 add r3, r2 80059c0: f503 6310 add.w r3, r3, #2304 @ 0x900 80059c4: 691b ldr r3, [r3, #16] 80059c6: 69ba ldr r2, [r7, #24] 80059c8: 0151 lsls r1, r2, #5 80059ca: 69fa ldr r2, [r7, #28] 80059cc: 440a add r2, r1 80059ce: f502 6210 add.w r2, r2, #2304 @ 0x900 80059d2: f023 43c0 bic.w r3, r3, #1610612736 @ 0x60000000 80059d6: 6113 str r3, [r2, #16] USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_MULCNT & ((uint32_t)pktcnt << 29)); 80059d8: 69bb ldr r3, [r7, #24] 80059da: 015a lsls r2, r3, #5 80059dc: 69fb ldr r3, [r7, #28] 80059de: 4413 add r3, r2 80059e0: f503 6310 add.w r3, r3, #2304 @ 0x900 80059e4: 691a ldr r2, [r3, #16] 80059e6: 8afb ldrh r3, [r7, #22] 80059e8: 075b lsls r3, r3, #29 80059ea: f003 43c0 and.w r3, r3, #1610612736 @ 0x60000000 80059ee: 69b9 ldr r1, [r7, #24] 80059f0: 0148 lsls r0, r1, #5 80059f2: 69f9 ldr r1, [r7, #28] 80059f4: 4401 add r1, r0 80059f6: f501 6110 add.w r1, r1, #2304 @ 0x900 80059fa: 4313 orrs r3, r2 80059fc: 610b str r3, [r1, #16] } } USBx_INEP(epnum)->DIEPTSIZ |= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len); 80059fe: 69bb ldr r3, [r7, #24] 8005a00: 015a lsls r2, r3, #5 8005a02: 69fb ldr r3, [r7, #28] 8005a04: 4413 add r3, r2 8005a06: f503 6310 add.w r3, r3, #2304 @ 0x900 8005a0a: 691a ldr r2, [r3, #16] 8005a0c: 68bb ldr r3, [r7, #8] 8005a0e: 691b ldr r3, [r3, #16] 8005a10: f3c3 0312 ubfx r3, r3, #0, #19 8005a14: 69b9 ldr r1, [r7, #24] 8005a16: 0148 lsls r0, r1, #5 8005a18: 69f9 ldr r1, [r7, #28] 8005a1a: 4401 add r1, r0 8005a1c: f501 6110 add.w r1, r1, #2304 @ 0x900 8005a20: 4313 orrs r3, r2 8005a22: 610b str r3, [r1, #16] } if (dma == 1U) 8005a24: 79fb ldrb r3, [r7, #7] 8005a26: 2b01 cmp r3, #1 8005a28: d14b bne.n 8005ac2 { if ((uint32_t)ep->dma_addr != 0U) 8005a2a: 68bb ldr r3, [r7, #8] 8005a2c: 69db ldr r3, [r3, #28] 8005a2e: 2b00 cmp r3, #0 8005a30: d009 beq.n 8005a46 { USBx_INEP(epnum)->DIEPDMA = (uint32_t)(ep->dma_addr); 8005a32: 69bb ldr r3, [r7, #24] 8005a34: 015a lsls r2, r3, #5 8005a36: 69fb ldr r3, [r7, #28] 8005a38: 4413 add r3, r2 8005a3a: f503 6310 add.w r3, r3, #2304 @ 0x900 8005a3e: 461a mov r2, r3 8005a40: 68bb ldr r3, [r7, #8] 8005a42: 69db ldr r3, [r3, #28] 8005a44: 6153 str r3, [r2, #20] } if (ep->type == EP_TYPE_ISOC) 8005a46: 68bb ldr r3, [r7, #8] 8005a48: 791b ldrb r3, [r3, #4] 8005a4a: 2b01 cmp r3, #1 8005a4c: d128 bne.n 8005aa0 { if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U) 8005a4e: 69fb ldr r3, [r7, #28] 8005a50: f503 6300 add.w r3, r3, #2048 @ 0x800 8005a54: 689b ldr r3, [r3, #8] 8005a56: f403 7380 and.w r3, r3, #256 @ 0x100 8005a5a: 2b00 cmp r3, #0 8005a5c: d110 bne.n 8005a80 { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM; 8005a5e: 69bb ldr r3, [r7, #24] 8005a60: 015a lsls r2, r3, #5 8005a62: 69fb ldr r3, [r7, #28] 8005a64: 4413 add r3, r2 8005a66: f503 6310 add.w r3, r3, #2304 @ 0x900 8005a6a: 681b ldr r3, [r3, #0] 8005a6c: 69ba ldr r2, [r7, #24] 8005a6e: 0151 lsls r1, r2, #5 8005a70: 69fa ldr r2, [r7, #28] 8005a72: 440a add r2, r1 8005a74: f502 6210 add.w r2, r2, #2304 @ 0x900 8005a78: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000 8005a7c: 6013 str r3, [r2, #0] 8005a7e: e00f b.n 8005aa0 } else { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; 8005a80: 69bb ldr r3, [r7, #24] 8005a82: 015a lsls r2, r3, #5 8005a84: 69fb ldr r3, [r7, #28] 8005a86: 4413 add r3, r2 8005a88: f503 6310 add.w r3, r3, #2304 @ 0x900 8005a8c: 681b ldr r3, [r3, #0] 8005a8e: 69ba ldr r2, [r7, #24] 8005a90: 0151 lsls r1, r2, #5 8005a92: 69fa ldr r2, [r7, #28] 8005a94: 440a add r2, r1 8005a96: f502 6210 add.w r2, r2, #2304 @ 0x900 8005a9a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8005a9e: 6013 str r3, [r2, #0] } } /* EP enable, IN data in FIFO */ USBx_INEP(epnum)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA); 8005aa0: 69bb ldr r3, [r7, #24] 8005aa2: 015a lsls r2, r3, #5 8005aa4: 69fb ldr r3, [r7, #28] 8005aa6: 4413 add r3, r2 8005aa8: f503 6310 add.w r3, r3, #2304 @ 0x900 8005aac: 681b ldr r3, [r3, #0] 8005aae: 69ba ldr r2, [r7, #24] 8005ab0: 0151 lsls r1, r2, #5 8005ab2: 69fa ldr r2, [r7, #28] 8005ab4: 440a add r2, r1 8005ab6: f502 6210 add.w r2, r2, #2304 @ 0x900 8005aba: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000 8005abe: 6013 str r3, [r2, #0] 8005ac0: e166 b.n 8005d90 } else { /* EP enable, IN data in FIFO */ USBx_INEP(epnum)->DIEPCTL |= (USB_OTG_DIEPCTL_CNAK | USB_OTG_DIEPCTL_EPENA); 8005ac2: 69bb ldr r3, [r7, #24] 8005ac4: 015a lsls r2, r3, #5 8005ac6: 69fb ldr r3, [r7, #28] 8005ac8: 4413 add r3, r2 8005aca: f503 6310 add.w r3, r3, #2304 @ 0x900 8005ace: 681b ldr r3, [r3, #0] 8005ad0: 69ba ldr r2, [r7, #24] 8005ad2: 0151 lsls r1, r2, #5 8005ad4: 69fa ldr r2, [r7, #28] 8005ad6: 440a add r2, r1 8005ad8: f502 6210 add.w r2, r2, #2304 @ 0x900 8005adc: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000 8005ae0: 6013 str r3, [r2, #0] if (ep->type != EP_TYPE_ISOC) 8005ae2: 68bb ldr r3, [r7, #8] 8005ae4: 791b ldrb r3, [r3, #4] 8005ae6: 2b01 cmp r3, #1 8005ae8: d015 beq.n 8005b16 { /* Enable the Tx FIFO Empty Interrupt for this EP */ if (ep->xfer_len > 0U) 8005aea: 68bb ldr r3, [r7, #8] 8005aec: 691b ldr r3, [r3, #16] 8005aee: 2b00 cmp r3, #0 8005af0: f000 814e beq.w 8005d90 { USBx_DEVICE->DIEPEMPMSK |= 1UL << (ep->num & EP_ADDR_MSK); 8005af4: 69fb ldr r3, [r7, #28] 8005af6: f503 6300 add.w r3, r3, #2048 @ 0x800 8005afa: 6b5a ldr r2, [r3, #52] @ 0x34 8005afc: 68bb ldr r3, [r7, #8] 8005afe: 781b ldrb r3, [r3, #0] 8005b00: f003 030f and.w r3, r3, #15 8005b04: 2101 movs r1, #1 8005b06: fa01 f303 lsl.w r3, r1, r3 8005b0a: 69f9 ldr r1, [r7, #28] 8005b0c: f501 6100 add.w r1, r1, #2048 @ 0x800 8005b10: 4313 orrs r3, r2 8005b12: 634b str r3, [r1, #52] @ 0x34 8005b14: e13c b.n 8005d90 } } else { if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U) 8005b16: 69fb ldr r3, [r7, #28] 8005b18: f503 6300 add.w r3, r3, #2048 @ 0x800 8005b1c: 689b ldr r3, [r3, #8] 8005b1e: f403 7380 and.w r3, r3, #256 @ 0x100 8005b22: 2b00 cmp r3, #0 8005b24: d110 bne.n 8005b48 { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SODDFRM; 8005b26: 69bb ldr r3, [r7, #24] 8005b28: 015a lsls r2, r3, #5 8005b2a: 69fb ldr r3, [r7, #28] 8005b2c: 4413 add r3, r2 8005b2e: f503 6310 add.w r3, r3, #2304 @ 0x900 8005b32: 681b ldr r3, [r3, #0] 8005b34: 69ba ldr r2, [r7, #24] 8005b36: 0151 lsls r1, r2, #5 8005b38: 69fa ldr r2, [r7, #28] 8005b3a: 440a add r2, r1 8005b3c: f502 6210 add.w r2, r2, #2304 @ 0x900 8005b40: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000 8005b44: 6013 str r3, [r2, #0] 8005b46: e00f b.n 8005b68 } else { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; 8005b48: 69bb ldr r3, [r7, #24] 8005b4a: 015a lsls r2, r3, #5 8005b4c: 69fb ldr r3, [r7, #28] 8005b4e: 4413 add r3, r2 8005b50: f503 6310 add.w r3, r3, #2304 @ 0x900 8005b54: 681b ldr r3, [r3, #0] 8005b56: 69ba ldr r2, [r7, #24] 8005b58: 0151 lsls r1, r2, #5 8005b5a: 69fa ldr r2, [r7, #28] 8005b5c: 440a add r2, r1 8005b5e: f502 6210 add.w r2, r2, #2304 @ 0x900 8005b62: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8005b66: 6013 str r3, [r2, #0] } (void)USB_WritePacket(USBx, ep->xfer_buff, ep->num, (uint16_t)ep->xfer_len, dma); 8005b68: 68bb ldr r3, [r7, #8] 8005b6a: 68d9 ldr r1, [r3, #12] 8005b6c: 68bb ldr r3, [r7, #8] 8005b6e: 781a ldrb r2, [r3, #0] 8005b70: 68bb ldr r3, [r7, #8] 8005b72: 691b ldr r3, [r3, #16] 8005b74: b298 uxth r0, r3 8005b76: 79fb ldrb r3, [r7, #7] 8005b78: 9300 str r3, [sp, #0] 8005b7a: 4603 mov r3, r0 8005b7c: 68f8 ldr r0, [r7, #12] 8005b7e: f000 f9b9 bl 8005ef4 8005b82: e105 b.n 8005d90 { /* Program the transfer size and packet count as follows: * pktcnt = N * xfersize = N * maxpacket */ USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ); 8005b84: 69bb ldr r3, [r7, #24] 8005b86: 015a lsls r2, r3, #5 8005b88: 69fb ldr r3, [r7, #28] 8005b8a: 4413 add r3, r2 8005b8c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005b90: 691b ldr r3, [r3, #16] 8005b92: 69ba ldr r2, [r7, #24] 8005b94: 0151 lsls r1, r2, #5 8005b96: 69fa ldr r2, [r7, #28] 8005b98: 440a add r2, r1 8005b9a: f502 6230 add.w r2, r2, #2816 @ 0xb00 8005b9e: 0cdb lsrs r3, r3, #19 8005ba0: 04db lsls r3, r3, #19 8005ba2: 6113 str r3, [r2, #16] USBx_OUTEP(epnum)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT); 8005ba4: 69bb ldr r3, [r7, #24] 8005ba6: 015a lsls r2, r3, #5 8005ba8: 69fb ldr r3, [r7, #28] 8005baa: 4413 add r3, r2 8005bac: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005bb0: 691b ldr r3, [r3, #16] 8005bb2: 69ba ldr r2, [r7, #24] 8005bb4: 0151 lsls r1, r2, #5 8005bb6: 69fa ldr r2, [r7, #28] 8005bb8: 440a add r2, r1 8005bba: f502 6230 add.w r2, r2, #2816 @ 0xb00 8005bbe: f023 53ff bic.w r3, r3, #534773760 @ 0x1fe00000 8005bc2: f423 13c0 bic.w r3, r3, #1572864 @ 0x180000 8005bc6: 6113 str r3, [r2, #16] if (epnum == 0U) 8005bc8: 69bb ldr r3, [r7, #24] 8005bca: 2b00 cmp r3, #0 8005bcc: d132 bne.n 8005c34 { if (ep->xfer_len > 0U) 8005bce: 68bb ldr r3, [r7, #8] 8005bd0: 691b ldr r3, [r3, #16] 8005bd2: 2b00 cmp r3, #0 8005bd4: d003 beq.n 8005bde { ep->xfer_len = ep->maxpacket; 8005bd6: 68bb ldr r3, [r7, #8] 8005bd8: 689a ldr r2, [r3, #8] 8005bda: 68bb ldr r3, [r7, #8] 8005bdc: 611a str r2, [r3, #16] } /* Store transfer size, for EP0 this is equal to endpoint max packet size */ ep->xfer_size = ep->maxpacket; 8005bde: 68bb ldr r3, [r7, #8] 8005be0: 689a ldr r2, [r3, #8] 8005be2: 68bb ldr r3, [r7, #8] 8005be4: 621a str r2, [r3, #32] USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size); 8005be6: 69bb ldr r3, [r7, #24] 8005be8: 015a lsls r2, r3, #5 8005bea: 69fb ldr r3, [r7, #28] 8005bec: 4413 add r3, r2 8005bee: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005bf2: 691a ldr r2, [r3, #16] 8005bf4: 68bb ldr r3, [r7, #8] 8005bf6: 6a1b ldr r3, [r3, #32] 8005bf8: f3c3 0312 ubfx r3, r3, #0, #19 8005bfc: 69b9 ldr r1, [r7, #24] 8005bfe: 0148 lsls r0, r1, #5 8005c00: 69f9 ldr r1, [r7, #28] 8005c02: 4401 add r1, r0 8005c04: f501 6130 add.w r1, r1, #2816 @ 0xb00 8005c08: 4313 orrs r3, r2 8005c0a: 610b str r3, [r1, #16] USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19)); 8005c0c: 69bb ldr r3, [r7, #24] 8005c0e: 015a lsls r2, r3, #5 8005c10: 69fb ldr r3, [r7, #28] 8005c12: 4413 add r3, r2 8005c14: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005c18: 691b ldr r3, [r3, #16] 8005c1a: 69ba ldr r2, [r7, #24] 8005c1c: 0151 lsls r1, r2, #5 8005c1e: 69fa ldr r2, [r7, #28] 8005c20: 440a add r2, r1 8005c22: f502 6230 add.w r2, r2, #2816 @ 0xb00 8005c26: f443 2300 orr.w r3, r3, #524288 @ 0x80000 8005c2a: 6113 str r3, [r2, #16] 8005c2c: e062 b.n 8005cf4 8005c2e: bf00 nop 8005c30: 1ff80000 .word 0x1ff80000 } else { if (ep->xfer_len == 0U) 8005c34: 68bb ldr r3, [r7, #8] 8005c36: 691b ldr r3, [r3, #16] 8005c38: 2b00 cmp r3, #0 8005c3a: d123 bne.n 8005c84 { USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket); 8005c3c: 69bb ldr r3, [r7, #24] 8005c3e: 015a lsls r2, r3, #5 8005c40: 69fb ldr r3, [r7, #28] 8005c42: 4413 add r3, r2 8005c44: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005c48: 691a ldr r2, [r3, #16] 8005c4a: 68bb ldr r3, [r7, #8] 8005c4c: 689b ldr r3, [r3, #8] 8005c4e: f3c3 0312 ubfx r3, r3, #0, #19 8005c52: 69b9 ldr r1, [r7, #24] 8005c54: 0148 lsls r0, r1, #5 8005c56: 69f9 ldr r1, [r7, #28] 8005c58: 4401 add r1, r0 8005c5a: f501 6130 add.w r1, r1, #2816 @ 0xb00 8005c5e: 4313 orrs r3, r2 8005c60: 610b str r3, [r1, #16] USBx_OUTEP(epnum)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19)); 8005c62: 69bb ldr r3, [r7, #24] 8005c64: 015a lsls r2, r3, #5 8005c66: 69fb ldr r3, [r7, #28] 8005c68: 4413 add r3, r2 8005c6a: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005c6e: 691b ldr r3, [r3, #16] 8005c70: 69ba ldr r2, [r7, #24] 8005c72: 0151 lsls r1, r2, #5 8005c74: 69fa ldr r2, [r7, #28] 8005c76: 440a add r2, r1 8005c78: f502 6230 add.w r2, r2, #2816 @ 0xb00 8005c7c: f443 2300 orr.w r3, r3, #524288 @ 0x80000 8005c80: 6113 str r3, [r2, #16] 8005c82: e037 b.n 8005cf4 } else { pktcnt = (uint16_t)((ep->xfer_len + ep->maxpacket - 1U) / ep->maxpacket); 8005c84: 68bb ldr r3, [r7, #8] 8005c86: 691a ldr r2, [r3, #16] 8005c88: 68bb ldr r3, [r7, #8] 8005c8a: 689b ldr r3, [r3, #8] 8005c8c: 4413 add r3, r2 8005c8e: 1e5a subs r2, r3, #1 8005c90: 68bb ldr r3, [r7, #8] 8005c92: 689b ldr r3, [r3, #8] 8005c94: fbb2 f3f3 udiv r3, r2, r3 8005c98: 82fb strh r3, [r7, #22] ep->xfer_size = ep->maxpacket * pktcnt; 8005c9a: 68bb ldr r3, [r7, #8] 8005c9c: 689b ldr r3, [r3, #8] 8005c9e: 8afa ldrh r2, [r7, #22] 8005ca0: fb03 f202 mul.w r2, r3, r2 8005ca4: 68bb ldr r3, [r7, #8] 8005ca6: 621a str r2, [r3, #32] USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_PKTCNT & ((uint32_t)pktcnt << 19); 8005ca8: 69bb ldr r3, [r7, #24] 8005caa: 015a lsls r2, r3, #5 8005cac: 69fb ldr r3, [r7, #28] 8005cae: 4413 add r3, r2 8005cb0: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005cb4: 691a ldr r2, [r3, #16] 8005cb6: 8afb ldrh r3, [r7, #22] 8005cb8: 04d9 lsls r1, r3, #19 8005cba: 4b38 ldr r3, [pc, #224] @ (8005d9c ) 8005cbc: 400b ands r3, r1 8005cbe: 69b9 ldr r1, [r7, #24] 8005cc0: 0148 lsls r0, r1, #5 8005cc2: 69f9 ldr r1, [r7, #28] 8005cc4: 4401 add r1, r0 8005cc6: f501 6130 add.w r1, r1, #2816 @ 0xb00 8005cca: 4313 orrs r3, r2 8005ccc: 610b str r3, [r1, #16] USBx_OUTEP(epnum)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_XFRSIZ & ep->xfer_size; 8005cce: 69bb ldr r3, [r7, #24] 8005cd0: 015a lsls r2, r3, #5 8005cd2: 69fb ldr r3, [r7, #28] 8005cd4: 4413 add r3, r2 8005cd6: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005cda: 691a ldr r2, [r3, #16] 8005cdc: 68bb ldr r3, [r7, #8] 8005cde: 6a1b ldr r3, [r3, #32] 8005ce0: f3c3 0312 ubfx r3, r3, #0, #19 8005ce4: 69b9 ldr r1, [r7, #24] 8005ce6: 0148 lsls r0, r1, #5 8005ce8: 69f9 ldr r1, [r7, #28] 8005cea: 4401 add r1, r0 8005cec: f501 6130 add.w r1, r1, #2816 @ 0xb00 8005cf0: 4313 orrs r3, r2 8005cf2: 610b str r3, [r1, #16] } } if (dma == 1U) 8005cf4: 79fb ldrb r3, [r7, #7] 8005cf6: 2b01 cmp r3, #1 8005cf8: d10d bne.n 8005d16 { if ((uint32_t)ep->xfer_buff != 0U) 8005cfa: 68bb ldr r3, [r7, #8] 8005cfc: 68db ldr r3, [r3, #12] 8005cfe: 2b00 cmp r3, #0 8005d00: d009 beq.n 8005d16 { USBx_OUTEP(epnum)->DOEPDMA = (uint32_t)(ep->xfer_buff); 8005d02: 68bb ldr r3, [r7, #8] 8005d04: 68d9 ldr r1, [r3, #12] 8005d06: 69bb ldr r3, [r7, #24] 8005d08: 015a lsls r2, r3, #5 8005d0a: 69fb ldr r3, [r7, #28] 8005d0c: 4413 add r3, r2 8005d0e: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005d12: 460a mov r2, r1 8005d14: 615a str r2, [r3, #20] } } if (ep->type == EP_TYPE_ISOC) 8005d16: 68bb ldr r3, [r7, #8] 8005d18: 791b ldrb r3, [r3, #4] 8005d1a: 2b01 cmp r3, #1 8005d1c: d128 bne.n 8005d70 { if ((USBx_DEVICE->DSTS & (1U << 8)) == 0U) 8005d1e: 69fb ldr r3, [r7, #28] 8005d20: f503 6300 add.w r3, r3, #2048 @ 0x800 8005d24: 689b ldr r3, [r3, #8] 8005d26: f403 7380 and.w r3, r3, #256 @ 0x100 8005d2a: 2b00 cmp r3, #0 8005d2c: d110 bne.n 8005d50 { USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SODDFRM; 8005d2e: 69bb ldr r3, [r7, #24] 8005d30: 015a lsls r2, r3, #5 8005d32: 69fb ldr r3, [r7, #28] 8005d34: 4413 add r3, r2 8005d36: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005d3a: 681b ldr r3, [r3, #0] 8005d3c: 69ba ldr r2, [r7, #24] 8005d3e: 0151 lsls r1, r2, #5 8005d40: 69fa ldr r2, [r7, #28] 8005d42: 440a add r2, r1 8005d44: f502 6230 add.w r2, r2, #2816 @ 0xb00 8005d48: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000 8005d4c: 6013 str r3, [r2, #0] 8005d4e: e00f b.n 8005d70 } else { USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; 8005d50: 69bb ldr r3, [r7, #24] 8005d52: 015a lsls r2, r3, #5 8005d54: 69fb ldr r3, [r7, #28] 8005d56: 4413 add r3, r2 8005d58: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005d5c: 681b ldr r3, [r3, #0] 8005d5e: 69ba ldr r2, [r7, #24] 8005d60: 0151 lsls r1, r2, #5 8005d62: 69fa ldr r2, [r7, #28] 8005d64: 440a add r2, r1 8005d66: f502 6230 add.w r2, r2, #2816 @ 0xb00 8005d6a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8005d6e: 6013 str r3, [r2, #0] } } /* EP enable */ USBx_OUTEP(epnum)->DOEPCTL |= (USB_OTG_DOEPCTL_CNAK | USB_OTG_DOEPCTL_EPENA); 8005d70: 69bb ldr r3, [r7, #24] 8005d72: 015a lsls r2, r3, #5 8005d74: 69fb ldr r3, [r7, #28] 8005d76: 4413 add r3, r2 8005d78: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005d7c: 681b ldr r3, [r3, #0] 8005d7e: 69ba ldr r2, [r7, #24] 8005d80: 0151 lsls r1, r2, #5 8005d82: 69fa ldr r2, [r7, #28] 8005d84: 440a add r2, r1 8005d86: f502 6230 add.w r2, r2, #2816 @ 0xb00 8005d8a: f043 4304 orr.w r3, r3, #2214592512 @ 0x84000000 8005d8e: 6013 str r3, [r2, #0] } return HAL_OK; 8005d90: 2300 movs r3, #0 } 8005d92: 4618 mov r0, r3 8005d94: 3720 adds r7, #32 8005d96: 46bd mov sp, r7 8005d98: bd80 pop {r7, pc} 8005d9a: bf00 nop 8005d9c: 1ff80000 .word 0x1ff80000 08005da0 : * @param USBx usb device instance * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPStopXfer(const USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep) { 8005da0: b480 push {r7} 8005da2: b087 sub sp, #28 8005da4: af00 add r7, sp, #0 8005da6: 6078 str r0, [r7, #4] 8005da8: 6039 str r1, [r7, #0] __IO uint32_t count = 0U; 8005daa: 2300 movs r3, #0 8005dac: 60fb str r3, [r7, #12] HAL_StatusTypeDef ret = HAL_OK; 8005dae: 2300 movs r3, #0 8005db0: 75fb strb r3, [r7, #23] uint32_t USBx_BASE = (uint32_t)USBx; 8005db2: 687b ldr r3, [r7, #4] 8005db4: 613b str r3, [r7, #16] /* IN endpoint */ if (ep->is_in == 1U) 8005db6: 683b ldr r3, [r7, #0] 8005db8: 785b ldrb r3, [r3, #1] 8005dba: 2b01 cmp r3, #1 8005dbc: d14a bne.n 8005e54 { /* EP enable, IN data in FIFO */ if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA) 8005dbe: 683b ldr r3, [r7, #0] 8005dc0: 781b ldrb r3, [r3, #0] 8005dc2: 015a lsls r2, r3, #5 8005dc4: 693b ldr r3, [r7, #16] 8005dc6: 4413 add r3, r2 8005dc8: f503 6310 add.w r3, r3, #2304 @ 0x900 8005dcc: 681b ldr r3, [r3, #0] 8005dce: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 8005dd2: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8005dd6: f040 8086 bne.w 8005ee6 { USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_SNAK); 8005dda: 683b ldr r3, [r7, #0] 8005ddc: 781b ldrb r3, [r3, #0] 8005dde: 015a lsls r2, r3, #5 8005de0: 693b ldr r3, [r7, #16] 8005de2: 4413 add r3, r2 8005de4: f503 6310 add.w r3, r3, #2304 @ 0x900 8005de8: 681b ldr r3, [r3, #0] 8005dea: 683a ldr r2, [r7, #0] 8005dec: 7812 ldrb r2, [r2, #0] 8005dee: 0151 lsls r1, r2, #5 8005df0: 693a ldr r2, [r7, #16] 8005df2: 440a add r2, r1 8005df4: f502 6210 add.w r2, r2, #2304 @ 0x900 8005df8: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 8005dfc: 6013 str r3, [r2, #0] USBx_INEP(ep->num)->DIEPCTL |= (USB_OTG_DIEPCTL_EPDIS); 8005dfe: 683b ldr r3, [r7, #0] 8005e00: 781b ldrb r3, [r3, #0] 8005e02: 015a lsls r2, r3, #5 8005e04: 693b ldr r3, [r7, #16] 8005e06: 4413 add r3, r2 8005e08: f503 6310 add.w r3, r3, #2304 @ 0x900 8005e0c: 681b ldr r3, [r3, #0] 8005e0e: 683a ldr r2, [r7, #0] 8005e10: 7812 ldrb r2, [r2, #0] 8005e12: 0151 lsls r1, r2, #5 8005e14: 693a ldr r2, [r7, #16] 8005e16: 440a add r2, r1 8005e18: f502 6210 add.w r2, r2, #2304 @ 0x900 8005e1c: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 8005e20: 6013 str r3, [r2, #0] do { count++; 8005e22: 68fb ldr r3, [r7, #12] 8005e24: 3301 adds r3, #1 8005e26: 60fb str r3, [r7, #12] if (count > 10000U) 8005e28: 68fb ldr r3, [r7, #12] 8005e2a: f242 7210 movw r2, #10000 @ 0x2710 8005e2e: 4293 cmp r3, r2 8005e30: d902 bls.n 8005e38 { ret = HAL_ERROR; 8005e32: 2301 movs r3, #1 8005e34: 75fb strb r3, [r7, #23] break; 8005e36: e056 b.n 8005ee6 } } while (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA); 8005e38: 683b ldr r3, [r7, #0] 8005e3a: 781b ldrb r3, [r3, #0] 8005e3c: 015a lsls r2, r3, #5 8005e3e: 693b ldr r3, [r7, #16] 8005e40: 4413 add r3, r2 8005e42: f503 6310 add.w r3, r3, #2304 @ 0x900 8005e46: 681b ldr r3, [r3, #0] 8005e48: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 8005e4c: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8005e50: d0e7 beq.n 8005e22 8005e52: e048 b.n 8005ee6 } } else /* OUT endpoint */ { if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) 8005e54: 683b ldr r3, [r7, #0] 8005e56: 781b ldrb r3, [r3, #0] 8005e58: 015a lsls r2, r3, #5 8005e5a: 693b ldr r3, [r7, #16] 8005e5c: 4413 add r3, r2 8005e5e: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005e62: 681b ldr r3, [r3, #0] 8005e64: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 8005e68: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8005e6c: d13b bne.n 8005ee6 { USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_SNAK); 8005e6e: 683b ldr r3, [r7, #0] 8005e70: 781b ldrb r3, [r3, #0] 8005e72: 015a lsls r2, r3, #5 8005e74: 693b ldr r3, [r7, #16] 8005e76: 4413 add r3, r2 8005e78: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005e7c: 681b ldr r3, [r3, #0] 8005e7e: 683a ldr r2, [r7, #0] 8005e80: 7812 ldrb r2, [r2, #0] 8005e82: 0151 lsls r1, r2, #5 8005e84: 693a ldr r2, [r7, #16] 8005e86: 440a add r2, r1 8005e88: f502 6230 add.w r2, r2, #2816 @ 0xb00 8005e8c: f043 6300 orr.w r3, r3, #134217728 @ 0x8000000 8005e90: 6013 str r3, [r2, #0] USBx_OUTEP(ep->num)->DOEPCTL |= (USB_OTG_DOEPCTL_EPDIS); 8005e92: 683b ldr r3, [r7, #0] 8005e94: 781b ldrb r3, [r3, #0] 8005e96: 015a lsls r2, r3, #5 8005e98: 693b ldr r3, [r7, #16] 8005e9a: 4413 add r3, r2 8005e9c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005ea0: 681b ldr r3, [r3, #0] 8005ea2: 683a ldr r2, [r7, #0] 8005ea4: 7812 ldrb r2, [r2, #0] 8005ea6: 0151 lsls r1, r2, #5 8005ea8: 693a ldr r2, [r7, #16] 8005eaa: 440a add r2, r1 8005eac: f502 6230 add.w r2, r2, #2816 @ 0xb00 8005eb0: f043 4380 orr.w r3, r3, #1073741824 @ 0x40000000 8005eb4: 6013 str r3, [r2, #0] do { count++; 8005eb6: 68fb ldr r3, [r7, #12] 8005eb8: 3301 adds r3, #1 8005eba: 60fb str r3, [r7, #12] if (count > 10000U) 8005ebc: 68fb ldr r3, [r7, #12] 8005ebe: f242 7210 movw r2, #10000 @ 0x2710 8005ec2: 4293 cmp r3, r2 8005ec4: d902 bls.n 8005ecc { ret = HAL_ERROR; 8005ec6: 2301 movs r3, #1 8005ec8: 75fb strb r3, [r7, #23] break; 8005eca: e00c b.n 8005ee6 } } while (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA); 8005ecc: 683b ldr r3, [r7, #0] 8005ece: 781b ldrb r3, [r3, #0] 8005ed0: 015a lsls r2, r3, #5 8005ed2: 693b ldr r3, [r7, #16] 8005ed4: 4413 add r3, r2 8005ed6: f503 6330 add.w r3, r3, #2816 @ 0xb00 8005eda: 681b ldr r3, [r3, #0] 8005edc: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 8005ee0: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8005ee4: d0e7 beq.n 8005eb6 } } return ret; 8005ee6: 7dfb ldrb r3, [r7, #23] } 8005ee8: 4618 mov r0, r3 8005eea: 371c adds r7, #28 8005eec: 46bd mov sp, r7 8005eee: f85d 7b04 ldr.w r7, [sp], #4 8005ef2: 4770 bx lr 08005ef4 : * 1 : DMA feature used * @retval HAL status */ HAL_StatusTypeDef USB_WritePacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma) { 8005ef4: b480 push {r7} 8005ef6: b089 sub sp, #36 @ 0x24 8005ef8: af00 add r7, sp, #0 8005efa: 60f8 str r0, [r7, #12] 8005efc: 60b9 str r1, [r7, #8] 8005efe: 4611 mov r1, r2 8005f00: 461a mov r2, r3 8005f02: 460b mov r3, r1 8005f04: 71fb strb r3, [r7, #7] 8005f06: 4613 mov r3, r2 8005f08: 80bb strh r3, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 8005f0a: 68fb ldr r3, [r7, #12] 8005f0c: 617b str r3, [r7, #20] uint8_t *pSrc = src; 8005f0e: 68bb ldr r3, [r7, #8] 8005f10: 61fb str r3, [r7, #28] uint32_t count32b; uint32_t i; if (dma == 0U) 8005f12: f897 3028 ldrb.w r3, [r7, #40] @ 0x28 8005f16: 2b00 cmp r3, #0 8005f18: d123 bne.n 8005f62 { count32b = ((uint32_t)len + 3U) / 4U; 8005f1a: 88bb ldrh r3, [r7, #4] 8005f1c: 3303 adds r3, #3 8005f1e: 089b lsrs r3, r3, #2 8005f20: 613b str r3, [r7, #16] for (i = 0U; i < count32b; i++) 8005f22: 2300 movs r3, #0 8005f24: 61bb str r3, [r7, #24] 8005f26: e018 b.n 8005f5a { USBx_DFIFO((uint32_t)ch_ep_num) = __UNALIGNED_UINT32_READ(pSrc); 8005f28: 79fb ldrb r3, [r7, #7] 8005f2a: 031a lsls r2, r3, #12 8005f2c: 697b ldr r3, [r7, #20] 8005f2e: 4413 add r3, r2 8005f30: f503 5380 add.w r3, r3, #4096 @ 0x1000 8005f34: 461a mov r2, r3 8005f36: 69fb ldr r3, [r7, #28] 8005f38: 681b ldr r3, [r3, #0] 8005f3a: 6013 str r3, [r2, #0] pSrc++; 8005f3c: 69fb ldr r3, [r7, #28] 8005f3e: 3301 adds r3, #1 8005f40: 61fb str r3, [r7, #28] pSrc++; 8005f42: 69fb ldr r3, [r7, #28] 8005f44: 3301 adds r3, #1 8005f46: 61fb str r3, [r7, #28] pSrc++; 8005f48: 69fb ldr r3, [r7, #28] 8005f4a: 3301 adds r3, #1 8005f4c: 61fb str r3, [r7, #28] pSrc++; 8005f4e: 69fb ldr r3, [r7, #28] 8005f50: 3301 adds r3, #1 8005f52: 61fb str r3, [r7, #28] for (i = 0U; i < count32b; i++) 8005f54: 69bb ldr r3, [r7, #24] 8005f56: 3301 adds r3, #1 8005f58: 61bb str r3, [r7, #24] 8005f5a: 69ba ldr r2, [r7, #24] 8005f5c: 693b ldr r3, [r7, #16] 8005f5e: 429a cmp r2, r3 8005f60: d3e2 bcc.n 8005f28 } } return HAL_OK; 8005f62: 2300 movs r3, #0 } 8005f64: 4618 mov r0, r3 8005f66: 3724 adds r7, #36 @ 0x24 8005f68: 46bd mov sp, r7 8005f6a: f85d 7b04 ldr.w r7, [sp], #4 8005f6e: 4770 bx lr 08005f70 : * @param dest source pointer * @param len Number of bytes to read * @retval pointer to destination buffer */ void *USB_ReadPacket(const USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len) { 8005f70: b480 push {r7} 8005f72: b08b sub sp, #44 @ 0x2c 8005f74: af00 add r7, sp, #0 8005f76: 60f8 str r0, [r7, #12] 8005f78: 60b9 str r1, [r7, #8] 8005f7a: 4613 mov r3, r2 8005f7c: 80fb strh r3, [r7, #6] uint32_t USBx_BASE = (uint32_t)USBx; 8005f7e: 68fb ldr r3, [r7, #12] 8005f80: 61bb str r3, [r7, #24] uint8_t *pDest = dest; 8005f82: 68bb ldr r3, [r7, #8] 8005f84: 627b str r3, [r7, #36] @ 0x24 uint32_t pData; uint32_t i; uint32_t count32b = (uint32_t)len >> 2U; 8005f86: 88fb ldrh r3, [r7, #6] 8005f88: 089b lsrs r3, r3, #2 8005f8a: b29b uxth r3, r3 8005f8c: 617b str r3, [r7, #20] uint16_t remaining_bytes = len % 4U; 8005f8e: 88fb ldrh r3, [r7, #6] 8005f90: f003 0303 and.w r3, r3, #3 8005f94: 83fb strh r3, [r7, #30] for (i = 0U; i < count32b; i++) 8005f96: 2300 movs r3, #0 8005f98: 623b str r3, [r7, #32] 8005f9a: e014 b.n 8005fc6 { __UNALIGNED_UINT32_WRITE(pDest, USBx_DFIFO(0U)); 8005f9c: 69bb ldr r3, [r7, #24] 8005f9e: f503 5380 add.w r3, r3, #4096 @ 0x1000 8005fa2: 681a ldr r2, [r3, #0] 8005fa4: 6a7b ldr r3, [r7, #36] @ 0x24 8005fa6: 601a str r2, [r3, #0] pDest++; 8005fa8: 6a7b ldr r3, [r7, #36] @ 0x24 8005faa: 3301 adds r3, #1 8005fac: 627b str r3, [r7, #36] @ 0x24 pDest++; 8005fae: 6a7b ldr r3, [r7, #36] @ 0x24 8005fb0: 3301 adds r3, #1 8005fb2: 627b str r3, [r7, #36] @ 0x24 pDest++; 8005fb4: 6a7b ldr r3, [r7, #36] @ 0x24 8005fb6: 3301 adds r3, #1 8005fb8: 627b str r3, [r7, #36] @ 0x24 pDest++; 8005fba: 6a7b ldr r3, [r7, #36] @ 0x24 8005fbc: 3301 adds r3, #1 8005fbe: 627b str r3, [r7, #36] @ 0x24 for (i = 0U; i < count32b; i++) 8005fc0: 6a3b ldr r3, [r7, #32] 8005fc2: 3301 adds r3, #1 8005fc4: 623b str r3, [r7, #32] 8005fc6: 6a3a ldr r2, [r7, #32] 8005fc8: 697b ldr r3, [r7, #20] 8005fca: 429a cmp r2, r3 8005fcc: d3e6 bcc.n 8005f9c } /* When Number of data is not word aligned, read the remaining byte */ if (remaining_bytes != 0U) 8005fce: 8bfb ldrh r3, [r7, #30] 8005fd0: 2b00 cmp r3, #0 8005fd2: d01e beq.n 8006012 { i = 0U; 8005fd4: 2300 movs r3, #0 8005fd6: 623b str r3, [r7, #32] __UNALIGNED_UINT32_WRITE(&pData, USBx_DFIFO(0U)); 8005fd8: 69bb ldr r3, [r7, #24] 8005fda: f503 5380 add.w r3, r3, #4096 @ 0x1000 8005fde: 461a mov r2, r3 8005fe0: f107 0310 add.w r3, r7, #16 8005fe4: 6812 ldr r2, [r2, #0] 8005fe6: 601a str r2, [r3, #0] do { *(uint8_t *)pDest = (uint8_t)(pData >> (8U * (uint8_t)(i))); 8005fe8: 693a ldr r2, [r7, #16] 8005fea: 6a3b ldr r3, [r7, #32] 8005fec: b2db uxtb r3, r3 8005fee: 00db lsls r3, r3, #3 8005ff0: fa22 f303 lsr.w r3, r2, r3 8005ff4: b2da uxtb r2, r3 8005ff6: 6a7b ldr r3, [r7, #36] @ 0x24 8005ff8: 701a strb r2, [r3, #0] i++; 8005ffa: 6a3b ldr r3, [r7, #32] 8005ffc: 3301 adds r3, #1 8005ffe: 623b str r3, [r7, #32] pDest++; 8006000: 6a7b ldr r3, [r7, #36] @ 0x24 8006002: 3301 adds r3, #1 8006004: 627b str r3, [r7, #36] @ 0x24 remaining_bytes--; 8006006: 8bfb ldrh r3, [r7, #30] 8006008: 3b01 subs r3, #1 800600a: 83fb strh r3, [r7, #30] } while (remaining_bytes != 0U); 800600c: 8bfb ldrh r3, [r7, #30] 800600e: 2b00 cmp r3, #0 8006010: d1ea bne.n 8005fe8 } return ((void *)pDest); 8006012: 6a7b ldr r3, [r7, #36] @ 0x24 } 8006014: 4618 mov r0, r3 8006016: 372c adds r7, #44 @ 0x2c 8006018: 46bd mov sp, r7 800601a: f85d 7b04 ldr.w r7, [sp], #4 800601e: 4770 bx lr 08006020 : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPSetStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep) { 8006020: b480 push {r7} 8006022: b085 sub sp, #20 8006024: af00 add r7, sp, #0 8006026: 6078 str r0, [r7, #4] 8006028: 6039 str r1, [r7, #0] uint32_t USBx_BASE = (uint32_t)USBx; 800602a: 687b ldr r3, [r7, #4] 800602c: 60fb str r3, [r7, #12] uint32_t epnum = (uint32_t)ep->num; 800602e: 683b ldr r3, [r7, #0] 8006030: 781b ldrb r3, [r3, #0] 8006032: 60bb str r3, [r7, #8] if (ep->is_in == 1U) 8006034: 683b ldr r3, [r7, #0] 8006036: 785b ldrb r3, [r3, #1] 8006038: 2b01 cmp r3, #1 800603a: d12c bne.n 8006096 { if (((USBx_INEP(epnum)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == 0U) && (epnum != 0U)) 800603c: 68bb ldr r3, [r7, #8] 800603e: 015a lsls r2, r3, #5 8006040: 68fb ldr r3, [r7, #12] 8006042: 4413 add r3, r2 8006044: f503 6310 add.w r3, r3, #2304 @ 0x900 8006048: 681b ldr r3, [r3, #0] 800604a: 2b00 cmp r3, #0 800604c: db12 blt.n 8006074 800604e: 68bb ldr r3, [r7, #8] 8006050: 2b00 cmp r3, #0 8006052: d00f beq.n 8006074 { USBx_INEP(epnum)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS); 8006054: 68bb ldr r3, [r7, #8] 8006056: 015a lsls r2, r3, #5 8006058: 68fb ldr r3, [r7, #12] 800605a: 4413 add r3, r2 800605c: f503 6310 add.w r3, r3, #2304 @ 0x900 8006060: 681b ldr r3, [r3, #0] 8006062: 68ba ldr r2, [r7, #8] 8006064: 0151 lsls r1, r2, #5 8006066: 68fa ldr r2, [r7, #12] 8006068: 440a add r2, r1 800606a: f502 6210 add.w r2, r2, #2304 @ 0x900 800606e: f023 4380 bic.w r3, r3, #1073741824 @ 0x40000000 8006072: 6013 str r3, [r2, #0] } USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_STALL; 8006074: 68bb ldr r3, [r7, #8] 8006076: 015a lsls r2, r3, #5 8006078: 68fb ldr r3, [r7, #12] 800607a: 4413 add r3, r2 800607c: f503 6310 add.w r3, r3, #2304 @ 0x900 8006080: 681b ldr r3, [r3, #0] 8006082: 68ba ldr r2, [r7, #8] 8006084: 0151 lsls r1, r2, #5 8006086: 68fa ldr r2, [r7, #12] 8006088: 440a add r2, r1 800608a: f502 6210 add.w r2, r2, #2304 @ 0x900 800608e: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 8006092: 6013 str r3, [r2, #0] 8006094: e02b b.n 80060ee } else { if (((USBx_OUTEP(epnum)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == 0U) && (epnum != 0U)) 8006096: 68bb ldr r3, [r7, #8] 8006098: 015a lsls r2, r3, #5 800609a: 68fb ldr r3, [r7, #12] 800609c: 4413 add r3, r2 800609e: f503 6330 add.w r3, r3, #2816 @ 0xb00 80060a2: 681b ldr r3, [r3, #0] 80060a4: 2b00 cmp r3, #0 80060a6: db12 blt.n 80060ce 80060a8: 68bb ldr r3, [r7, #8] 80060aa: 2b00 cmp r3, #0 80060ac: d00f beq.n 80060ce { USBx_OUTEP(epnum)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS); 80060ae: 68bb ldr r3, [r7, #8] 80060b0: 015a lsls r2, r3, #5 80060b2: 68fb ldr r3, [r7, #12] 80060b4: 4413 add r3, r2 80060b6: f503 6330 add.w r3, r3, #2816 @ 0xb00 80060ba: 681b ldr r3, [r3, #0] 80060bc: 68ba ldr r2, [r7, #8] 80060be: 0151 lsls r1, r2, #5 80060c0: 68fa ldr r2, [r7, #12] 80060c2: 440a add r2, r1 80060c4: f502 6230 add.w r2, r2, #2816 @ 0xb00 80060c8: f023 4380 bic.w r3, r3, #1073741824 @ 0x40000000 80060cc: 6013 str r3, [r2, #0] } USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_STALL; 80060ce: 68bb ldr r3, [r7, #8] 80060d0: 015a lsls r2, r3, #5 80060d2: 68fb ldr r3, [r7, #12] 80060d4: 4413 add r3, r2 80060d6: f503 6330 add.w r3, r3, #2816 @ 0xb00 80060da: 681b ldr r3, [r3, #0] 80060dc: 68ba ldr r2, [r7, #8] 80060de: 0151 lsls r1, r2, #5 80060e0: 68fa ldr r2, [r7, #12] 80060e2: 440a add r2, r1 80060e4: f502 6230 add.w r2, r2, #2816 @ 0xb00 80060e8: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 80060ec: 6013 str r3, [r2, #0] } return HAL_OK; 80060ee: 2300 movs r3, #0 } 80060f0: 4618 mov r0, r3 80060f2: 3714 adds r7, #20 80060f4: 46bd mov sp, r7 80060f6: f85d 7b04 ldr.w r7, [sp], #4 80060fa: 4770 bx lr 080060fc : * @param USBx Selected device * @param ep pointer to endpoint structure * @retval HAL status */ HAL_StatusTypeDef USB_EPClearStall(const USB_OTG_GlobalTypeDef *USBx, const USB_OTG_EPTypeDef *ep) { 80060fc: b480 push {r7} 80060fe: b085 sub sp, #20 8006100: af00 add r7, sp, #0 8006102: 6078 str r0, [r7, #4] 8006104: 6039 str r1, [r7, #0] uint32_t USBx_BASE = (uint32_t)USBx; 8006106: 687b ldr r3, [r7, #4] 8006108: 60fb str r3, [r7, #12] uint32_t epnum = (uint32_t)ep->num; 800610a: 683b ldr r3, [r7, #0] 800610c: 781b ldrb r3, [r3, #0] 800610e: 60bb str r3, [r7, #8] if (ep->is_in == 1U) 8006110: 683b ldr r3, [r7, #0] 8006112: 785b ldrb r3, [r3, #1] 8006114: 2b01 cmp r3, #1 8006116: d128 bne.n 800616a { USBx_INEP(epnum)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL; 8006118: 68bb ldr r3, [r7, #8] 800611a: 015a lsls r2, r3, #5 800611c: 68fb ldr r3, [r7, #12] 800611e: 4413 add r3, r2 8006120: f503 6310 add.w r3, r3, #2304 @ 0x900 8006124: 681b ldr r3, [r3, #0] 8006126: 68ba ldr r2, [r7, #8] 8006128: 0151 lsls r1, r2, #5 800612a: 68fa ldr r2, [r7, #12] 800612c: 440a add r2, r1 800612e: f502 6210 add.w r2, r2, #2304 @ 0x900 8006132: f423 1300 bic.w r3, r3, #2097152 @ 0x200000 8006136: 6013 str r3, [r2, #0] if ((ep->type == EP_TYPE_INTR) || (ep->type == EP_TYPE_BULK)) 8006138: 683b ldr r3, [r7, #0] 800613a: 791b ldrb r3, [r3, #4] 800613c: 2b03 cmp r3, #3 800613e: d003 beq.n 8006148 8006140: 683b ldr r3, [r7, #0] 8006142: 791b ldrb r3, [r3, #4] 8006144: 2b02 cmp r3, #2 8006146: d138 bne.n 80061ba { USBx_INEP(epnum)->DIEPCTL |= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */ 8006148: 68bb ldr r3, [r7, #8] 800614a: 015a lsls r2, r3, #5 800614c: 68fb ldr r3, [r7, #12] 800614e: 4413 add r3, r2 8006150: f503 6310 add.w r3, r3, #2304 @ 0x900 8006154: 681b ldr r3, [r3, #0] 8006156: 68ba ldr r2, [r7, #8] 8006158: 0151 lsls r1, r2, #5 800615a: 68fa ldr r2, [r7, #12] 800615c: 440a add r2, r1 800615e: f502 6210 add.w r2, r2, #2304 @ 0x900 8006162: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8006166: 6013 str r3, [r2, #0] 8006168: e027 b.n 80061ba } } else { USBx_OUTEP(epnum)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL; 800616a: 68bb ldr r3, [r7, #8] 800616c: 015a lsls r2, r3, #5 800616e: 68fb ldr r3, [r7, #12] 8006170: 4413 add r3, r2 8006172: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006176: 681b ldr r3, [r3, #0] 8006178: 68ba ldr r2, [r7, #8] 800617a: 0151 lsls r1, r2, #5 800617c: 68fa ldr r2, [r7, #12] 800617e: 440a add r2, r1 8006180: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006184: f423 1300 bic.w r3, r3, #2097152 @ 0x200000 8006188: 6013 str r3, [r2, #0] if ((ep->type == EP_TYPE_INTR) || (ep->type == EP_TYPE_BULK)) 800618a: 683b ldr r3, [r7, #0] 800618c: 791b ldrb r3, [r3, #4] 800618e: 2b03 cmp r3, #3 8006190: d003 beq.n 800619a 8006192: 683b ldr r3, [r7, #0] 8006194: 791b ldrb r3, [r3, #4] 8006196: 2b02 cmp r3, #2 8006198: d10f bne.n 80061ba { USBx_OUTEP(epnum)->DOEPCTL |= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */ 800619a: 68bb ldr r3, [r7, #8] 800619c: 015a lsls r2, r3, #5 800619e: 68fb ldr r3, [r7, #12] 80061a0: 4413 add r3, r2 80061a2: f503 6330 add.w r3, r3, #2816 @ 0xb00 80061a6: 681b ldr r3, [r3, #0] 80061a8: 68ba ldr r2, [r7, #8] 80061aa: 0151 lsls r1, r2, #5 80061ac: 68fa ldr r2, [r7, #12] 80061ae: 440a add r2, r1 80061b0: f502 6230 add.w r2, r2, #2816 @ 0xb00 80061b4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80061b8: 6013 str r3, [r2, #0] } } return HAL_OK; 80061ba: 2300 movs r3, #0 } 80061bc: 4618 mov r0, r3 80061be: 3714 adds r7, #20 80061c0: 46bd mov sp, r7 80061c2: f85d 7b04 ldr.w r7, [sp], #4 80061c6: 4770 bx lr 080061c8 : * @param address new device address to be assigned * This parameter can be a value from 0 to 255 * @retval HAL status */ HAL_StatusTypeDef USB_SetDevAddress(const USB_OTG_GlobalTypeDef *USBx, uint8_t address) { 80061c8: b480 push {r7} 80061ca: b085 sub sp, #20 80061cc: af00 add r7, sp, #0 80061ce: 6078 str r0, [r7, #4] 80061d0: 460b mov r3, r1 80061d2: 70fb strb r3, [r7, #3] uint32_t USBx_BASE = (uint32_t)USBx; 80061d4: 687b ldr r3, [r7, #4] 80061d6: 60fb str r3, [r7, #12] USBx_DEVICE->DCFG &= ~(USB_OTG_DCFG_DAD); 80061d8: 68fb ldr r3, [r7, #12] 80061da: f503 6300 add.w r3, r3, #2048 @ 0x800 80061de: 681b ldr r3, [r3, #0] 80061e0: 68fa ldr r2, [r7, #12] 80061e2: f502 6200 add.w r2, r2, #2048 @ 0x800 80061e6: f423 63fe bic.w r3, r3, #2032 @ 0x7f0 80061ea: 6013 str r3, [r2, #0] USBx_DEVICE->DCFG |= ((uint32_t)address << 4) & USB_OTG_DCFG_DAD; 80061ec: 68fb ldr r3, [r7, #12] 80061ee: f503 6300 add.w r3, r3, #2048 @ 0x800 80061f2: 681a ldr r2, [r3, #0] 80061f4: 78fb ldrb r3, [r7, #3] 80061f6: 011b lsls r3, r3, #4 80061f8: f403 63fe and.w r3, r3, #2032 @ 0x7f0 80061fc: 68f9 ldr r1, [r7, #12] 80061fe: f501 6100 add.w r1, r1, #2048 @ 0x800 8006202: 4313 orrs r3, r2 8006204: 600b str r3, [r1, #0] return HAL_OK; 8006206: 2300 movs r3, #0 } 8006208: 4618 mov r0, r3 800620a: 3714 adds r7, #20 800620c: 46bd mov sp, r7 800620e: f85d 7b04 ldr.w r7, [sp], #4 8006212: 4770 bx lr 08006214 : * @brief USB_DevConnect : Connect the USB device by enabling Rpu * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevConnect(const USB_OTG_GlobalTypeDef *USBx) { 8006214: b480 push {r7} 8006216: b085 sub sp, #20 8006218: af00 add r7, sp, #0 800621a: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 800621c: 687b ldr r3, [r7, #4] 800621e: 60fb str r3, [r7, #12] /* In case phy is stopped, ensure to ungate and restore the phy CLK */ USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK); 8006220: 68fb ldr r3, [r7, #12] 8006222: f503 6360 add.w r3, r3, #3584 @ 0xe00 8006226: 681b ldr r3, [r3, #0] 8006228: 68fa ldr r2, [r7, #12] 800622a: f502 6260 add.w r2, r2, #3584 @ 0xe00 800622e: f023 0303 bic.w r3, r3, #3 8006232: 6013 str r3, [r2, #0] USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS; 8006234: 68fb ldr r3, [r7, #12] 8006236: f503 6300 add.w r3, r3, #2048 @ 0x800 800623a: 685b ldr r3, [r3, #4] 800623c: 68fa ldr r2, [r7, #12] 800623e: f502 6200 add.w r2, r2, #2048 @ 0x800 8006242: f023 0302 bic.w r3, r3, #2 8006246: 6053 str r3, [r2, #4] return HAL_OK; 8006248: 2300 movs r3, #0 } 800624a: 4618 mov r0, r3 800624c: 3714 adds r7, #20 800624e: 46bd mov sp, r7 8006250: f85d 7b04 ldr.w r7, [sp], #4 8006254: 4770 bx lr 08006256 : * @brief USB_DevDisconnect : Disconnect the USB device by disabling Rpu * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_DevDisconnect(const USB_OTG_GlobalTypeDef *USBx) { 8006256: b480 push {r7} 8006258: b085 sub sp, #20 800625a: af00 add r7, sp, #0 800625c: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 800625e: 687b ldr r3, [r7, #4] 8006260: 60fb str r3, [r7, #12] /* In case phy is stopped, ensure to ungate and restore the phy CLK */ USBx_PCGCCTL &= ~(USB_OTG_PCGCCTL_STOPCLK | USB_OTG_PCGCCTL_GATECLK); 8006262: 68fb ldr r3, [r7, #12] 8006264: f503 6360 add.w r3, r3, #3584 @ 0xe00 8006268: 681b ldr r3, [r3, #0] 800626a: 68fa ldr r2, [r7, #12] 800626c: f502 6260 add.w r2, r2, #3584 @ 0xe00 8006270: f023 0303 bic.w r3, r3, #3 8006274: 6013 str r3, [r2, #0] USBx_DEVICE->DCTL |= USB_OTG_DCTL_SDIS; 8006276: 68fb ldr r3, [r7, #12] 8006278: f503 6300 add.w r3, r3, #2048 @ 0x800 800627c: 685b ldr r3, [r3, #4] 800627e: 68fa ldr r2, [r7, #12] 8006280: f502 6200 add.w r2, r2, #2048 @ 0x800 8006284: f043 0302 orr.w r3, r3, #2 8006288: 6053 str r3, [r2, #4] return HAL_OK; 800628a: 2300 movs r3, #0 } 800628c: 4618 mov r0, r3 800628e: 3714 adds r7, #20 8006290: 46bd mov sp, r7 8006292: f85d 7b04 ldr.w r7, [sp], #4 8006296: 4770 bx lr 08006298 : * @brief USB_ReadInterrupts: return the global USB interrupt status * @param USBx Selected device * @retval USB Global Interrupt status */ uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef const *USBx) { 8006298: b480 push {r7} 800629a: b085 sub sp, #20 800629c: af00 add r7, sp, #0 800629e: 6078 str r0, [r7, #4] uint32_t tmpreg; tmpreg = USBx->GINTSTS; 80062a0: 687b ldr r3, [r7, #4] 80062a2: 695b ldr r3, [r3, #20] 80062a4: 60fb str r3, [r7, #12] tmpreg &= USBx->GINTMSK; 80062a6: 687b ldr r3, [r7, #4] 80062a8: 699b ldr r3, [r3, #24] 80062aa: 68fa ldr r2, [r7, #12] 80062ac: 4013 ands r3, r2 80062ae: 60fb str r3, [r7, #12] return tmpreg; 80062b0: 68fb ldr r3, [r7, #12] } 80062b2: 4618 mov r0, r3 80062b4: 3714 adds r7, #20 80062b6: 46bd mov sp, r7 80062b8: f85d 7b04 ldr.w r7, [sp], #4 80062bc: 4770 bx lr 080062be : * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status * @param USBx Selected device * @retval USB Device OUT EP interrupt status */ uint32_t USB_ReadDevAllOutEpInterrupt(const USB_OTG_GlobalTypeDef *USBx) { 80062be: b480 push {r7} 80062c0: b085 sub sp, #20 80062c2: af00 add r7, sp, #0 80062c4: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 80062c6: 687b ldr r3, [r7, #4] 80062c8: 60fb str r3, [r7, #12] uint32_t tmpreg; tmpreg = USBx_DEVICE->DAINT; 80062ca: 68fb ldr r3, [r7, #12] 80062cc: f503 6300 add.w r3, r3, #2048 @ 0x800 80062d0: 699b ldr r3, [r3, #24] 80062d2: 60bb str r3, [r7, #8] tmpreg &= USBx_DEVICE->DAINTMSK; 80062d4: 68fb ldr r3, [r7, #12] 80062d6: f503 6300 add.w r3, r3, #2048 @ 0x800 80062da: 69db ldr r3, [r3, #28] 80062dc: 68ba ldr r2, [r7, #8] 80062de: 4013 ands r3, r2 80062e0: 60bb str r3, [r7, #8] return ((tmpreg & 0xffff0000U) >> 16); 80062e2: 68bb ldr r3, [r7, #8] 80062e4: 0c1b lsrs r3, r3, #16 } 80062e6: 4618 mov r0, r3 80062e8: 3714 adds r7, #20 80062ea: 46bd mov sp, r7 80062ec: f85d 7b04 ldr.w r7, [sp], #4 80062f0: 4770 bx lr 080062f2 : * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status * @param USBx Selected device * @retval USB Device IN EP interrupt status */ uint32_t USB_ReadDevAllInEpInterrupt(const USB_OTG_GlobalTypeDef *USBx) { 80062f2: b480 push {r7} 80062f4: b085 sub sp, #20 80062f6: af00 add r7, sp, #0 80062f8: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 80062fa: 687b ldr r3, [r7, #4] 80062fc: 60fb str r3, [r7, #12] uint32_t tmpreg; tmpreg = USBx_DEVICE->DAINT; 80062fe: 68fb ldr r3, [r7, #12] 8006300: f503 6300 add.w r3, r3, #2048 @ 0x800 8006304: 699b ldr r3, [r3, #24] 8006306: 60bb str r3, [r7, #8] tmpreg &= USBx_DEVICE->DAINTMSK; 8006308: 68fb ldr r3, [r7, #12] 800630a: f503 6300 add.w r3, r3, #2048 @ 0x800 800630e: 69db ldr r3, [r3, #28] 8006310: 68ba ldr r2, [r7, #8] 8006312: 4013 ands r3, r2 8006314: 60bb str r3, [r7, #8] return ((tmpreg & 0xFFFFU)); 8006316: 68bb ldr r3, [r7, #8] 8006318: b29b uxth r3, r3 } 800631a: 4618 mov r0, r3 800631c: 3714 adds r7, #20 800631e: 46bd mov sp, r7 8006320: f85d 7b04 ldr.w r7, [sp], #4 8006324: 4770 bx lr 08006326 : * @param epnum endpoint number * This parameter can be a value from 0 to 15 * @retval Device OUT EP Interrupt register */ uint32_t USB_ReadDevOutEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum) { 8006326: b480 push {r7} 8006328: b085 sub sp, #20 800632a: af00 add r7, sp, #0 800632c: 6078 str r0, [r7, #4] 800632e: 460b mov r3, r1 8006330: 70fb strb r3, [r7, #3] uint32_t USBx_BASE = (uint32_t)USBx; 8006332: 687b ldr r3, [r7, #4] 8006334: 60fb str r3, [r7, #12] uint32_t tmpreg; tmpreg = USBx_OUTEP((uint32_t)epnum)->DOEPINT; 8006336: 78fb ldrb r3, [r7, #3] 8006338: 015a lsls r2, r3, #5 800633a: 68fb ldr r3, [r7, #12] 800633c: 4413 add r3, r2 800633e: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006342: 689b ldr r3, [r3, #8] 8006344: 60bb str r3, [r7, #8] tmpreg &= USBx_DEVICE->DOEPMSK; 8006346: 68fb ldr r3, [r7, #12] 8006348: f503 6300 add.w r3, r3, #2048 @ 0x800 800634c: 695b ldr r3, [r3, #20] 800634e: 68ba ldr r2, [r7, #8] 8006350: 4013 ands r3, r2 8006352: 60bb str r3, [r7, #8] return tmpreg; 8006354: 68bb ldr r3, [r7, #8] } 8006356: 4618 mov r0, r3 8006358: 3714 adds r7, #20 800635a: 46bd mov sp, r7 800635c: f85d 7b04 ldr.w r7, [sp], #4 8006360: 4770 bx lr 08006362 : * @param epnum endpoint number * This parameter can be a value from 0 to 15 * @retval Device IN EP Interrupt register */ uint32_t USB_ReadDevInEPInterrupt(const USB_OTG_GlobalTypeDef *USBx, uint8_t epnum) { 8006362: b480 push {r7} 8006364: b087 sub sp, #28 8006366: af00 add r7, sp, #0 8006368: 6078 str r0, [r7, #4] 800636a: 460b mov r3, r1 800636c: 70fb strb r3, [r7, #3] uint32_t USBx_BASE = (uint32_t)USBx; 800636e: 687b ldr r3, [r7, #4] 8006370: 617b str r3, [r7, #20] uint32_t tmpreg; uint32_t msk; uint32_t emp; msk = USBx_DEVICE->DIEPMSK; 8006372: 697b ldr r3, [r7, #20] 8006374: f503 6300 add.w r3, r3, #2048 @ 0x800 8006378: 691b ldr r3, [r3, #16] 800637a: 613b str r3, [r7, #16] emp = USBx_DEVICE->DIEPEMPMSK; 800637c: 697b ldr r3, [r7, #20] 800637e: f503 6300 add.w r3, r3, #2048 @ 0x800 8006382: 6b5b ldr r3, [r3, #52] @ 0x34 8006384: 60fb str r3, [r7, #12] msk |= ((emp >> (epnum & EP_ADDR_MSK)) & 0x1U) << 7; 8006386: 78fb ldrb r3, [r7, #3] 8006388: f003 030f and.w r3, r3, #15 800638c: 68fa ldr r2, [r7, #12] 800638e: fa22 f303 lsr.w r3, r2, r3 8006392: 01db lsls r3, r3, #7 8006394: b2db uxtb r3, r3 8006396: 693a ldr r2, [r7, #16] 8006398: 4313 orrs r3, r2 800639a: 613b str r3, [r7, #16] tmpreg = USBx_INEP((uint32_t)epnum)->DIEPINT & msk; 800639c: 78fb ldrb r3, [r7, #3] 800639e: 015a lsls r2, r3, #5 80063a0: 697b ldr r3, [r7, #20] 80063a2: 4413 add r3, r2 80063a4: f503 6310 add.w r3, r3, #2304 @ 0x900 80063a8: 689b ldr r3, [r3, #8] 80063aa: 693a ldr r2, [r7, #16] 80063ac: 4013 ands r3, r2 80063ae: 60bb str r3, [r7, #8] return tmpreg; 80063b0: 68bb ldr r3, [r7, #8] } 80063b2: 4618 mov r0, r3 80063b4: 371c adds r7, #28 80063b6: 46bd mov sp, r7 80063b8: f85d 7b04 ldr.w r7, [sp], #4 80063bc: 4770 bx lr 080063be : * This parameter can be one of these values: * 1 : Host * 0 : Device */ uint32_t USB_GetMode(const USB_OTG_GlobalTypeDef *USBx) { 80063be: b480 push {r7} 80063c0: b083 sub sp, #12 80063c2: af00 add r7, sp, #0 80063c4: 6078 str r0, [r7, #4] return ((USBx->GINTSTS) & 0x1U); 80063c6: 687b ldr r3, [r7, #4] 80063c8: 695b ldr r3, [r3, #20] 80063ca: f003 0301 and.w r3, r3, #1 } 80063ce: 4618 mov r0, r3 80063d0: 370c adds r7, #12 80063d2: 46bd mov sp, r7 80063d4: f85d 7b04 ldr.w r7, [sp], #4 80063d8: 4770 bx lr 080063da : * @brief Activate EP0 for Setup transactions * @param USBx Selected device * @retval HAL status */ HAL_StatusTypeDef USB_ActivateSetup(const USB_OTG_GlobalTypeDef *USBx) { 80063da: b480 push {r7} 80063dc: b085 sub sp, #20 80063de: af00 add r7, sp, #0 80063e0: 6078 str r0, [r7, #4] uint32_t USBx_BASE = (uint32_t)USBx; 80063e2: 687b ldr r3, [r7, #4] 80063e4: 60fb str r3, [r7, #12] /* Set the MPS of the IN EP0 to 64 bytes */ USBx_INEP(0U)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ; 80063e6: 68fb ldr r3, [r7, #12] 80063e8: f503 6310 add.w r3, r3, #2304 @ 0x900 80063ec: 681b ldr r3, [r3, #0] 80063ee: 68fa ldr r2, [r7, #12] 80063f0: f502 6210 add.w r2, r2, #2304 @ 0x900 80063f4: f423 63ff bic.w r3, r3, #2040 @ 0x7f8 80063f8: f023 0307 bic.w r3, r3, #7 80063fc: 6013 str r3, [r2, #0] USBx_DEVICE->DCTL |= USB_OTG_DCTL_CGINAK; 80063fe: 68fb ldr r3, [r7, #12] 8006400: f503 6300 add.w r3, r3, #2048 @ 0x800 8006404: 685b ldr r3, [r3, #4] 8006406: 68fa ldr r2, [r7, #12] 8006408: f502 6200 add.w r2, r2, #2048 @ 0x800 800640c: f443 7380 orr.w r3, r3, #256 @ 0x100 8006410: 6053 str r3, [r2, #4] return HAL_OK; 8006412: 2300 movs r3, #0 } 8006414: 4618 mov r0, r3 8006416: 3714 adds r7, #20 8006418: 46bd mov sp, r7 800641a: f85d 7b04 ldr.w r7, [sp], #4 800641e: 4770 bx lr 08006420 : * 1 : DMA feature used * @param psetup pointer to setup packet * @retval HAL status */ HAL_StatusTypeDef USB_EP0_OutStart(const USB_OTG_GlobalTypeDef *USBx, uint8_t dma, const uint8_t *psetup) { 8006420: b480 push {r7} 8006422: b087 sub sp, #28 8006424: af00 add r7, sp, #0 8006426: 60f8 str r0, [r7, #12] 8006428: 460b mov r3, r1 800642a: 607a str r2, [r7, #4] 800642c: 72fb strb r3, [r7, #11] uint32_t USBx_BASE = (uint32_t)USBx; 800642e: 68fb ldr r3, [r7, #12] 8006430: 617b str r3, [r7, #20] uint32_t gSNPSiD = *(__IO const uint32_t *)(&USBx->CID + 0x1U); 8006432: 68fb ldr r3, [r7, #12] 8006434: 333c adds r3, #60 @ 0x3c 8006436: 3304 adds r3, #4 8006438: 681b ldr r3, [r3, #0] 800643a: 613b str r3, [r7, #16] if (gSNPSiD > USB_OTG_CORE_ID_300A) 800643c: 693b ldr r3, [r7, #16] 800643e: 4a26 ldr r2, [pc, #152] @ (80064d8 ) 8006440: 4293 cmp r3, r2 8006442: d90a bls.n 800645a { if ((USBx_OUTEP(0U)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA) 8006444: 697b ldr r3, [r7, #20] 8006446: f503 6330 add.w r3, r3, #2816 @ 0xb00 800644a: 681b ldr r3, [r3, #0] 800644c: f003 4300 and.w r3, r3, #2147483648 @ 0x80000000 8006450: f1b3 4f00 cmp.w r3, #2147483648 @ 0x80000000 8006454: d101 bne.n 800645a { return HAL_OK; 8006456: 2300 movs r3, #0 8006458: e037 b.n 80064ca } } USBx_OUTEP(0U)->DOEPTSIZ = 0U; 800645a: 697b ldr r3, [r7, #20] 800645c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006460: 461a mov r2, r3 8006462: 2300 movs r3, #0 8006464: 6113 str r3, [r2, #16] USBx_OUTEP(0U)->DOEPTSIZ |= (USB_OTG_DOEPTSIZ_PKTCNT & (1U << 19)); 8006466: 697b ldr r3, [r7, #20] 8006468: f503 6330 add.w r3, r3, #2816 @ 0xb00 800646c: 691b ldr r3, [r3, #16] 800646e: 697a ldr r2, [r7, #20] 8006470: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006474: f443 2300 orr.w r3, r3, #524288 @ 0x80000 8006478: 6113 str r3, [r2, #16] USBx_OUTEP(0U)->DOEPTSIZ |= (3U * 8U); 800647a: 697b ldr r3, [r7, #20] 800647c: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006480: 691b ldr r3, [r3, #16] 8006482: 697a ldr r2, [r7, #20] 8006484: f502 6230 add.w r2, r2, #2816 @ 0xb00 8006488: f043 0318 orr.w r3, r3, #24 800648c: 6113 str r3, [r2, #16] USBx_OUTEP(0U)->DOEPTSIZ |= USB_OTG_DOEPTSIZ_STUPCNT; 800648e: 697b ldr r3, [r7, #20] 8006490: f503 6330 add.w r3, r3, #2816 @ 0xb00 8006494: 691b ldr r3, [r3, #16] 8006496: 697a ldr r2, [r7, #20] 8006498: f502 6230 add.w r2, r2, #2816 @ 0xb00 800649c: f043 43c0 orr.w r3, r3, #1610612736 @ 0x60000000 80064a0: 6113 str r3, [r2, #16] if (dma == 1U) 80064a2: 7afb ldrb r3, [r7, #11] 80064a4: 2b01 cmp r3, #1 80064a6: d10f bne.n 80064c8 { USBx_OUTEP(0U)->DOEPDMA = (uint32_t)psetup; 80064a8: 697b ldr r3, [r7, #20] 80064aa: f503 6330 add.w r3, r3, #2816 @ 0xb00 80064ae: 461a mov r2, r3 80064b0: 687b ldr r3, [r7, #4] 80064b2: 6153 str r3, [r2, #20] /* EP enable */ USBx_OUTEP(0U)->DOEPCTL |= USB_OTG_DOEPCTL_EPENA | USB_OTG_DOEPCTL_USBAEP; 80064b4: 697b ldr r3, [r7, #20] 80064b6: f503 6330 add.w r3, r3, #2816 @ 0xb00 80064ba: 681b ldr r3, [r3, #0] 80064bc: 697a ldr r2, [r7, #20] 80064be: f502 6230 add.w r2, r2, #2816 @ 0xb00 80064c2: f043 2380 orr.w r3, r3, #2147516416 @ 0x80008000 80064c6: 6013 str r3, [r2, #0] } return HAL_OK; 80064c8: 2300 movs r3, #0 } 80064ca: 4618 mov r0, r3 80064cc: 371c adds r7, #28 80064ce: 46bd mov sp, r7 80064d0: f85d 7b04 ldr.w r7, [sp], #4 80064d4: 4770 bx lr 80064d6: bf00 nop 80064d8: 4f54300a .word 0x4f54300a 080064dc : * @brief Reset the USB Core (needed after USB clock settings change) * @param USBx Selected device * @retval HAL status */ static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx) { 80064dc: b480 push {r7} 80064de: b085 sub sp, #20 80064e0: af00 add r7, sp, #0 80064e2: 6078 str r0, [r7, #4] __IO uint32_t count = 0U; 80064e4: 2300 movs r3, #0 80064e6: 60fb str r3, [r7, #12] /* Wait for AHB master IDLE state. */ do { count++; 80064e8: 68fb ldr r3, [r7, #12] 80064ea: 3301 adds r3, #1 80064ec: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 80064ee: 68fb ldr r3, [r7, #12] 80064f0: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 80064f4: d901 bls.n 80064fa { return HAL_TIMEOUT; 80064f6: 2303 movs r3, #3 80064f8: e022 b.n 8006540 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0U); 80064fa: 687b ldr r3, [r7, #4] 80064fc: 691b ldr r3, [r3, #16] 80064fe: 2b00 cmp r3, #0 8006500: daf2 bge.n 80064e8 count = 10U; 8006502: 230a movs r3, #10 8006504: 60fb str r3, [r7, #12] /* few cycles before setting core reset */ while (count > 0U) 8006506: e002 b.n 800650e { count--; 8006508: 68fb ldr r3, [r7, #12] 800650a: 3b01 subs r3, #1 800650c: 60fb str r3, [r7, #12] while (count > 0U) 800650e: 68fb ldr r3, [r7, #12] 8006510: 2b00 cmp r3, #0 8006512: d1f9 bne.n 8006508 } /* Core Soft Reset */ USBx->GRSTCTL |= USB_OTG_GRSTCTL_CSRST; 8006514: 687b ldr r3, [r7, #4] 8006516: 691b ldr r3, [r3, #16] 8006518: f043 0201 orr.w r2, r3, #1 800651c: 687b ldr r3, [r7, #4] 800651e: 611a str r2, [r3, #16] do { count++; 8006520: 68fb ldr r3, [r7, #12] 8006522: 3301 adds r3, #1 8006524: 60fb str r3, [r7, #12] if (count > HAL_USB_TIMEOUT) 8006526: 68fb ldr r3, [r7, #12] 8006528: f1b3 6f70 cmp.w r3, #251658240 @ 0xf000000 800652c: d901 bls.n 8006532 { return HAL_TIMEOUT; 800652e: 2303 movs r3, #3 8006530: e006 b.n 8006540 } } while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST); 8006532: 687b ldr r3, [r7, #4] 8006534: 691b ldr r3, [r3, #16] 8006536: f003 0301 and.w r3, r3, #1 800653a: 2b01 cmp r3, #1 800653c: d0f0 beq.n 8006520 return HAL_OK; 800653e: 2300 movs r3, #0 } 8006540: 4618 mov r0, r3 8006542: 3714 adds r7, #20 8006544: 46bd mov sp, r7 8006546: f85d 7b04 ldr.w r7, [sp], #4 800654a: 4770 bx lr 0800654c : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_HID_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 800654c: b580 push {r7, lr} 800654e: b084 sub sp, #16 8006550: af00 add r7, sp, #0 8006552: 6078 str r0, [r7, #4] 8006554: 460b mov r3, r1 8006556: 70fb strb r3, [r7, #3] UNUSED(cfgidx); USBD_HID_HandleTypeDef *hhid; hhid = (USBD_HID_HandleTypeDef *)USBD_malloc(sizeof(USBD_HID_HandleTypeDef)); 8006558: 2010 movs r0, #16 800655a: f002 f9e3 bl 8008924 800655e: 60f8 str r0, [r7, #12] if (hhid == NULL) 8006560: 68fb ldr r3, [r7, #12] 8006562: 2b00 cmp r3, #0 8006564: d109 bne.n 800657a { pdev->pClassDataCmsit[pdev->classId] = NULL; 8006566: 687b ldr r3, [r7, #4] 8006568: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800656c: 687b ldr r3, [r7, #4] 800656e: 32b0 adds r2, #176 @ 0xb0 8006570: 2100 movs r1, #0 8006572: f843 1022 str.w r1, [r3, r2, lsl #2] return (uint8_t)USBD_EMEM; 8006576: 2302 movs r3, #2 8006578: e048 b.n 800660c } pdev->pClassDataCmsit[pdev->classId] = (void *)hhid; 800657a: 687b ldr r3, [r7, #4] 800657c: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8006580: 687b ldr r3, [r7, #4] 8006582: 32b0 adds r2, #176 @ 0xb0 8006584: 68f9 ldr r1, [r7, #12] 8006586: f843 1022 str.w r1, [r3, r2, lsl #2] pdev->pClassData = pdev->pClassDataCmsit[pdev->classId]; 800658a: 687b ldr r3, [r7, #4] 800658c: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8006590: 687b ldr r3, [r7, #4] 8006592: 32b0 adds r2, #176 @ 0xb0 8006594: f853 2022 ldr.w r2, [r3, r2, lsl #2] 8006598: 687b ldr r3, [r7, #4] 800659a: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc #ifdef USE_USBD_COMPOSITE /* Get the Endpoints addresses allocated for this class instance */ HIDInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_INTR, (uint8_t)pdev->classId); #endif /* USE_USBD_COMPOSITE */ if (pdev->dev_speed == USBD_SPEED_HIGH) 800659e: 687b ldr r3, [r7, #4] 80065a0: 7c1b ldrb r3, [r3, #16] 80065a2: 2b00 cmp r3, #0 80065a4: d10d bne.n 80065c2 { pdev->ep_in[HIDInEpAdd & 0xFU].bInterval = HID_HS_BINTERVAL; 80065a6: 4b1b ldr r3, [pc, #108] @ (8006614 ) 80065a8: 781b ldrb r3, [r3, #0] 80065aa: f003 020f and.w r2, r3, #15 80065ae: 6879 ldr r1, [r7, #4] 80065b0: 4613 mov r3, r2 80065b2: 009b lsls r3, r3, #2 80065b4: 4413 add r3, r2 80065b6: 009b lsls r3, r3, #2 80065b8: 440b add r3, r1 80065ba: 331c adds r3, #28 80065bc: 2207 movs r2, #7 80065be: 601a str r2, [r3, #0] 80065c0: e00c b.n 80065dc } else /* LOW and FULL-speed endpoints */ { pdev->ep_in[HIDInEpAdd & 0xFU].bInterval = HID_FS_BINTERVAL; 80065c2: 4b14 ldr r3, [pc, #80] @ (8006614 ) 80065c4: 781b ldrb r3, [r3, #0] 80065c6: f003 020f and.w r2, r3, #15 80065ca: 6879 ldr r1, [r7, #4] 80065cc: 4613 mov r3, r2 80065ce: 009b lsls r3, r3, #2 80065d0: 4413 add r3, r2 80065d2: 009b lsls r3, r3, #2 80065d4: 440b add r3, r1 80065d6: 331c adds r3, #28 80065d8: 220a movs r2, #10 80065da: 601a str r2, [r3, #0] } /* Open EP IN */ (void)USBD_LL_OpenEP(pdev, HIDInEpAdd, USBD_EP_TYPE_INTR, HID_EPIN_SIZE); 80065dc: 4b0d ldr r3, [pc, #52] @ (8006614 ) 80065de: 7819 ldrb r1, [r3, #0] 80065e0: 2304 movs r3, #4 80065e2: 2203 movs r2, #3 80065e4: 6878 ldr r0, [r7, #4] 80065e6: f002 f83e bl 8008666 pdev->ep_in[HIDInEpAdd & 0xFU].is_used = 1U; 80065ea: 4b0a ldr r3, [pc, #40] @ (8006614 ) 80065ec: 781b ldrb r3, [r3, #0] 80065ee: f003 020f and.w r2, r3, #15 80065f2: 6879 ldr r1, [r7, #4] 80065f4: 4613 mov r3, r2 80065f6: 009b lsls r3, r3, #2 80065f8: 4413 add r3, r2 80065fa: 009b lsls r3, r3, #2 80065fc: 440b add r3, r1 80065fe: 3323 adds r3, #35 @ 0x23 8006600: 2201 movs r2, #1 8006602: 701a strb r2, [r3, #0] hhid->state = USBD_HID_IDLE; 8006604: 68fb ldr r3, [r7, #12] 8006606: 2200 movs r2, #0 8006608: 731a strb r2, [r3, #12] return (uint8_t)USBD_OK; 800660a: 2300 movs r3, #0 } 800660c: 4618 mov r0, r3 800660e: 3710 adds r7, #16 8006610: 46bd mov sp, r7 8006612: bd80 pop {r7, pc} 8006614: 200000bf .word 0x200000bf 08006618 : * @param pdev: device instance * @param cfgidx: Configuration index * @retval status */ static uint8_t USBD_HID_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8006618: b580 push {r7, lr} 800661a: b082 sub sp, #8 800661c: af00 add r7, sp, #0 800661e: 6078 str r0, [r7, #4] 8006620: 460b mov r3, r1 8006622: 70fb strb r3, [r7, #3] /* Get the Endpoints addresses allocated for this class instance */ HIDInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_INTR, (uint8_t)pdev->classId); #endif /* USE_USBD_COMPOSITE */ /* Close HID EPs */ (void)USBD_LL_CloseEP(pdev, HIDInEpAdd); 8006624: 4b1f ldr r3, [pc, #124] @ (80066a4 ) 8006626: 781b ldrb r3, [r3, #0] 8006628: 4619 mov r1, r3 800662a: 6878 ldr r0, [r7, #4] 800662c: f002 f841 bl 80086b2 pdev->ep_in[HIDInEpAdd & 0xFU].is_used = 0U; 8006630: 4b1c ldr r3, [pc, #112] @ (80066a4 ) 8006632: 781b ldrb r3, [r3, #0] 8006634: f003 020f and.w r2, r3, #15 8006638: 6879 ldr r1, [r7, #4] 800663a: 4613 mov r3, r2 800663c: 009b lsls r3, r3, #2 800663e: 4413 add r3, r2 8006640: 009b lsls r3, r3, #2 8006642: 440b add r3, r1 8006644: 3323 adds r3, #35 @ 0x23 8006646: 2200 movs r2, #0 8006648: 701a strb r2, [r3, #0] pdev->ep_in[HIDInEpAdd & 0xFU].bInterval = 0U; 800664a: 4b16 ldr r3, [pc, #88] @ (80066a4 ) 800664c: 781b ldrb r3, [r3, #0] 800664e: f003 020f and.w r2, r3, #15 8006652: 6879 ldr r1, [r7, #4] 8006654: 4613 mov r3, r2 8006656: 009b lsls r3, r3, #2 8006658: 4413 add r3, r2 800665a: 009b lsls r3, r3, #2 800665c: 440b add r3, r1 800665e: 331c adds r3, #28 8006660: 2200 movs r2, #0 8006662: 601a str r2, [r3, #0] /* Free allocated memory */ if (pdev->pClassDataCmsit[pdev->classId] != NULL) 8006664: 687b ldr r3, [r7, #4] 8006666: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800666a: 687b ldr r3, [r7, #4] 800666c: 32b0 adds r2, #176 @ 0xb0 800666e: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8006672: 2b00 cmp r3, #0 8006674: d011 beq.n 800669a { (void)USBD_free(pdev->pClassDataCmsit[pdev->classId]); 8006676: 687b ldr r3, [r7, #4] 8006678: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800667c: 687b ldr r3, [r7, #4] 800667e: 32b0 adds r2, #176 @ 0xb0 8006680: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8006684: 4618 mov r0, r3 8006686: f002 f95b bl 8008940 pdev->pClassDataCmsit[pdev->classId] = NULL; 800668a: 687b ldr r3, [r7, #4] 800668c: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8006690: 687b ldr r3, [r7, #4] 8006692: 32b0 adds r2, #176 @ 0xb0 8006694: 2100 movs r1, #0 8006696: f843 1022 str.w r1, [r3, r2, lsl #2] } return (uint8_t)USBD_OK; 800669a: 2300 movs r3, #0 } 800669c: 4618 mov r0, r3 800669e: 3708 adds r7, #8 80066a0: 46bd mov sp, r7 80066a2: bd80 pop {r7, pc} 80066a4: 200000bf .word 0x200000bf 080066a8 : * @param pdev: instance * @param req: usb requests * @retval status */ static uint8_t USBD_HID_Setup(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 80066a8: b580 push {r7, lr} 80066aa: b086 sub sp, #24 80066ac: af00 add r7, sp, #0 80066ae: 6078 str r0, [r7, #4] 80066b0: 6039 str r1, [r7, #0] USBD_HID_HandleTypeDef *hhid = (USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId]; 80066b2: 687b ldr r3, [r7, #4] 80066b4: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80066b8: 687b ldr r3, [r7, #4] 80066ba: 32b0 adds r2, #176 @ 0xb0 80066bc: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80066c0: 60fb str r3, [r7, #12] USBD_StatusTypeDef ret = USBD_OK; 80066c2: 2300 movs r3, #0 80066c4: 75fb strb r3, [r7, #23] uint16_t len; uint8_t *pbuf; uint16_t status_info = 0U; 80066c6: 2300 movs r3, #0 80066c8: 817b strh r3, [r7, #10] if (hhid == NULL) 80066ca: 68fb ldr r3, [r7, #12] 80066cc: 2b00 cmp r3, #0 80066ce: d101 bne.n 80066d4 { return (uint8_t)USBD_FAIL; 80066d0: 2303 movs r3, #3 80066d2: e0e8 b.n 80068a6 } switch (req->bmRequest & USB_REQ_TYPE_MASK) 80066d4: 683b ldr r3, [r7, #0] 80066d6: 781b ldrb r3, [r3, #0] 80066d8: f003 0360 and.w r3, r3, #96 @ 0x60 80066dc: 2b00 cmp r3, #0 80066de: d046 beq.n 800676e 80066e0: 2b20 cmp r3, #32 80066e2: f040 80d8 bne.w 8006896 { case USB_REQ_TYPE_CLASS : switch (req->bRequest) 80066e6: 683b ldr r3, [r7, #0] 80066e8: 785b ldrb r3, [r3, #1] 80066ea: 3b02 subs r3, #2 80066ec: 2b09 cmp r3, #9 80066ee: d836 bhi.n 800675e 80066f0: a201 add r2, pc, #4 @ (adr r2, 80066f8 ) 80066f2: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80066f6: bf00 nop 80066f8: 0800674f .word 0x0800674f 80066fc: 0800672f .word 0x0800672f 8006700: 0800675f .word 0x0800675f 8006704: 0800675f .word 0x0800675f 8006708: 0800675f .word 0x0800675f 800670c: 0800675f .word 0x0800675f 8006710: 0800675f .word 0x0800675f 8006714: 0800675f .word 0x0800675f 8006718: 0800673d .word 0x0800673d 800671c: 08006721 .word 0x08006721 { case USBD_HID_REQ_SET_PROTOCOL: hhid->Protocol = (uint8_t)(req->wValue); 8006720: 683b ldr r3, [r7, #0] 8006722: 885b ldrh r3, [r3, #2] 8006724: b2db uxtb r3, r3 8006726: 461a mov r2, r3 8006728: 68fb ldr r3, [r7, #12] 800672a: 601a str r2, [r3, #0] break; 800672c: e01e b.n 800676c case USBD_HID_REQ_GET_PROTOCOL: (void)USBD_CtlSendData(pdev, (uint8_t *)&hhid->Protocol, 1U); 800672e: 68fb ldr r3, [r7, #12] 8006730: 2201 movs r2, #1 8006732: 4619 mov r1, r3 8006734: 6878 ldr r0, [r7, #4] 8006736: f001 fc25 bl 8007f84 break; 800673a: e017 b.n 800676c case USBD_HID_REQ_SET_IDLE: hhid->IdleState = (uint8_t)(req->wValue >> 8); 800673c: 683b ldr r3, [r7, #0] 800673e: 885b ldrh r3, [r3, #2] 8006740: 0a1b lsrs r3, r3, #8 8006742: b29b uxth r3, r3 8006744: b2db uxtb r3, r3 8006746: 461a mov r2, r3 8006748: 68fb ldr r3, [r7, #12] 800674a: 605a str r2, [r3, #4] break; 800674c: e00e b.n 800676c case USBD_HID_REQ_GET_IDLE: (void)USBD_CtlSendData(pdev, (uint8_t *)&hhid->IdleState, 1U); 800674e: 68fb ldr r3, [r7, #12] 8006750: 3304 adds r3, #4 8006752: 2201 movs r2, #1 8006754: 4619 mov r1, r3 8006756: 6878 ldr r0, [r7, #4] 8006758: f001 fc14 bl 8007f84 break; 800675c: e006 b.n 800676c default: USBD_CtlError(pdev, req); 800675e: 6839 ldr r1, [r7, #0] 8006760: 6878 ldr r0, [r7, #4] 8006762: f001 fb92 bl 8007e8a ret = USBD_FAIL; 8006766: 2303 movs r3, #3 8006768: 75fb strb r3, [r7, #23] break; 800676a: bf00 nop } break; 800676c: e09a b.n 80068a4 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 800676e: 683b ldr r3, [r7, #0] 8006770: 785b ldrb r3, [r3, #1] 8006772: 2b0b cmp r3, #11 8006774: f200 8086 bhi.w 8006884 8006778: a201 add r2, pc, #4 @ (adr r2, 8006780 ) 800677a: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800677e: bf00 nop 8006780: 080067b1 .word 0x080067b1 8006784: 08006893 .word 0x08006893 8006788: 08006885 .word 0x08006885 800678c: 08006885 .word 0x08006885 8006790: 08006885 .word 0x08006885 8006794: 08006885 .word 0x08006885 8006798: 080067db .word 0x080067db 800679c: 08006885 .word 0x08006885 80067a0: 08006885 .word 0x08006885 80067a4: 08006885 .word 0x08006885 80067a8: 08006833 .word 0x08006833 80067ac: 0800685d .word 0x0800685d { case USB_REQ_GET_STATUS: if (pdev->dev_state == USBD_STATE_CONFIGURED) 80067b0: 687b ldr r3, [r7, #4] 80067b2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80067b6: b2db uxtb r3, r3 80067b8: 2b03 cmp r3, #3 80067ba: d107 bne.n 80067cc { (void)USBD_CtlSendData(pdev, (uint8_t *)&status_info, 2U); 80067bc: f107 030a add.w r3, r7, #10 80067c0: 2202 movs r2, #2 80067c2: 4619 mov r1, r3 80067c4: 6878 ldr r0, [r7, #4] 80067c6: f001 fbdd bl 8007f84 else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 80067ca: e063 b.n 8006894 USBD_CtlError(pdev, req); 80067cc: 6839 ldr r1, [r7, #0] 80067ce: 6878 ldr r0, [r7, #4] 80067d0: f001 fb5b bl 8007e8a ret = USBD_FAIL; 80067d4: 2303 movs r3, #3 80067d6: 75fb strb r3, [r7, #23] break; 80067d8: e05c b.n 8006894 case USB_REQ_GET_DESCRIPTOR: if ((req->wValue >> 8) == HID_REPORT_DESC) 80067da: 683b ldr r3, [r7, #0] 80067dc: 885b ldrh r3, [r3, #2] 80067de: 0a1b lsrs r3, r3, #8 80067e0: b29b uxth r3, r3 80067e2: 2b22 cmp r3, #34 @ 0x22 80067e4: d108 bne.n 80067f8 { len = MIN(HID_MOUSE_REPORT_DESC_SIZE, req->wLength); 80067e6: 683b ldr r3, [r7, #0] 80067e8: 88db ldrh r3, [r3, #6] 80067ea: 2b3f cmp r3, #63 @ 0x3f 80067ec: bf28 it cs 80067ee: 233f movcs r3, #63 @ 0x3f 80067f0: 82bb strh r3, [r7, #20] pbuf = HID_MOUSE_ReportDesc; 80067f2: 4b2f ldr r3, [pc, #188] @ (80068b0 ) 80067f4: 613b str r3, [r7, #16] 80067f6: e015 b.n 8006824 } else if ((req->wValue >> 8) == HID_DESCRIPTOR_TYPE) 80067f8: 683b ldr r3, [r7, #0] 80067fa: 885b ldrh r3, [r3, #2] 80067fc: 0a1b lsrs r3, r3, #8 80067fe: b29b uxth r3, r3 8006800: 2b21 cmp r3, #33 @ 0x21 8006802: d108 bne.n 8006816 { pbuf = USBD_HID_Desc; 8006804: 4b2b ldr r3, [pc, #172] @ (80068b4 ) 8006806: 613b str r3, [r7, #16] len = MIN(USB_HID_DESC_SIZ, req->wLength); 8006808: 683b ldr r3, [r7, #0] 800680a: 88db ldrh r3, [r3, #6] 800680c: 2b09 cmp r3, #9 800680e: bf28 it cs 8006810: 2309 movcs r3, #9 8006812: 82bb strh r3, [r7, #20] 8006814: e006 b.n 8006824 } else { USBD_CtlError(pdev, req); 8006816: 6839 ldr r1, [r7, #0] 8006818: 6878 ldr r0, [r7, #4] 800681a: f001 fb36 bl 8007e8a ret = USBD_FAIL; 800681e: 2303 movs r3, #3 8006820: 75fb strb r3, [r7, #23] break; 8006822: e037 b.n 8006894 } (void)USBD_CtlSendData(pdev, pbuf, len); 8006824: 8abb ldrh r3, [r7, #20] 8006826: 461a mov r2, r3 8006828: 6939 ldr r1, [r7, #16] 800682a: 6878 ldr r0, [r7, #4] 800682c: f001 fbaa bl 8007f84 break; 8006830: e030 b.n 8006894 case USB_REQ_GET_INTERFACE : if (pdev->dev_state == USBD_STATE_CONFIGURED) 8006832: 687b ldr r3, [r7, #4] 8006834: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8006838: b2db uxtb r3, r3 800683a: 2b03 cmp r3, #3 800683c: d107 bne.n 800684e { (void)USBD_CtlSendData(pdev, (uint8_t *)&hhid->AltSetting, 1U); 800683e: 68fb ldr r3, [r7, #12] 8006840: 3308 adds r3, #8 8006842: 2201 movs r2, #1 8006844: 4619 mov r1, r3 8006846: 6878 ldr r0, [r7, #4] 8006848: f001 fb9c bl 8007f84 else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 800684c: e022 b.n 8006894 USBD_CtlError(pdev, req); 800684e: 6839 ldr r1, [r7, #0] 8006850: 6878 ldr r0, [r7, #4] 8006852: f001 fb1a bl 8007e8a ret = USBD_FAIL; 8006856: 2303 movs r3, #3 8006858: 75fb strb r3, [r7, #23] break; 800685a: e01b b.n 8006894 case USB_REQ_SET_INTERFACE: if (pdev->dev_state == USBD_STATE_CONFIGURED) 800685c: 687b ldr r3, [r7, #4] 800685e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8006862: b2db uxtb r3, r3 8006864: 2b03 cmp r3, #3 8006866: d106 bne.n 8006876 { hhid->AltSetting = (uint8_t)(req->wValue); 8006868: 683b ldr r3, [r7, #0] 800686a: 885b ldrh r3, [r3, #2] 800686c: b2db uxtb r3, r3 800686e: 461a mov r2, r3 8006870: 68fb ldr r3, [r7, #12] 8006872: 609a str r2, [r3, #8] else { USBD_CtlError(pdev, req); ret = USBD_FAIL; } break; 8006874: e00e b.n 8006894 USBD_CtlError(pdev, req); 8006876: 6839 ldr r1, [r7, #0] 8006878: 6878 ldr r0, [r7, #4] 800687a: f001 fb06 bl 8007e8a ret = USBD_FAIL; 800687e: 2303 movs r3, #3 8006880: 75fb strb r3, [r7, #23] break; 8006882: e007 b.n 8006894 case USB_REQ_CLEAR_FEATURE: break; default: USBD_CtlError(pdev, req); 8006884: 6839 ldr r1, [r7, #0] 8006886: 6878 ldr r0, [r7, #4] 8006888: f001 faff bl 8007e8a ret = USBD_FAIL; 800688c: 2303 movs r3, #3 800688e: 75fb strb r3, [r7, #23] break; 8006890: e000 b.n 8006894 break; 8006892: bf00 nop } break; 8006894: e006 b.n 80068a4 default: USBD_CtlError(pdev, req); 8006896: 6839 ldr r1, [r7, #0] 8006898: 6878 ldr r0, [r7, #4] 800689a: f001 faf6 bl 8007e8a ret = USBD_FAIL; 800689e: 2303 movs r3, #3 80068a0: 75fb strb r3, [r7, #23] break; 80068a2: bf00 nop } return (uint8_t)ret; 80068a4: 7dfb ldrb r3, [r7, #23] } 80068a6: 4618 mov r0, r3 80068a8: 3718 adds r7, #24 80068aa: 46bd mov sp, r7 80068ac: bd80 pop {r7, pc} 80068ae: bf00 nop 80068b0: 20000080 .word 0x20000080 80068b4: 20000068 .word 0x20000068 080068b8 : uint8_t USBD_HID_SendReport(USBD_HandleTypeDef *pdev, uint8_t *report, uint16_t len, uint8_t ClassId) { USBD_HID_HandleTypeDef *hhid = (USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[ClassId]; #else uint8_t USBD_HID_SendReport(USBD_HandleTypeDef *pdev, uint8_t *report, uint16_t len) { 80068b8: b580 push {r7, lr} 80068ba: b086 sub sp, #24 80068bc: af00 add r7, sp, #0 80068be: 60f8 str r0, [r7, #12] 80068c0: 60b9 str r1, [r7, #8] 80068c2: 4613 mov r3, r2 80068c4: 80fb strh r3, [r7, #6] USBD_HID_HandleTypeDef *hhid = (USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId]; 80068c6: 68fb ldr r3, [r7, #12] 80068c8: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80068cc: 68fb ldr r3, [r7, #12] 80068ce: 32b0 adds r2, #176 @ 0xb0 80068d0: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80068d4: 617b str r3, [r7, #20] #endif /* USE_USBD_COMPOSITE */ if (hhid == NULL) 80068d6: 697b ldr r3, [r7, #20] 80068d8: 2b00 cmp r3, #0 80068da: d101 bne.n 80068e0 { return (uint8_t)USBD_FAIL; 80068dc: 2303 movs r3, #3 80068de: e014 b.n 800690a #ifdef USE_USBD_COMPOSITE /* Get the Endpoints addresses allocated for this class instance */ HIDInEpAdd = USBD_CoreGetEPAdd(pdev, USBD_EP_IN, USBD_EP_TYPE_INTR, ClassId); #endif /* USE_USBD_COMPOSITE */ if (pdev->dev_state == USBD_STATE_CONFIGURED) 80068e0: 68fb ldr r3, [r7, #12] 80068e2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80068e6: b2db uxtb r3, r3 80068e8: 2b03 cmp r3, #3 80068ea: d10d bne.n 8006908 { if (hhid->state == USBD_HID_IDLE) 80068ec: 697b ldr r3, [r7, #20] 80068ee: 7b1b ldrb r3, [r3, #12] 80068f0: 2b00 cmp r3, #0 80068f2: d109 bne.n 8006908 { hhid->state = USBD_HID_BUSY; 80068f4: 697b ldr r3, [r7, #20] 80068f6: 2201 movs r2, #1 80068f8: 731a strb r2, [r3, #12] (void)USBD_LL_Transmit(pdev, HIDInEpAdd, report, len); 80068fa: 4b06 ldr r3, [pc, #24] @ (8006914 ) 80068fc: 7819 ldrb r1, [r3, #0] 80068fe: 88fb ldrh r3, [r7, #6] 8006900: 68ba ldr r2, [r7, #8] 8006902: 68f8 ldr r0, [r7, #12] 8006904: f001 ff7d bl 8008802 } } return (uint8_t)USBD_OK; 8006908: 2300 movs r3, #0 } 800690a: 4618 mov r0, r3 800690c: 3718 adds r7, #24 800690e: 46bd mov sp, r7 8006910: bd80 pop {r7, pc} 8006912: bf00 nop 8006914: 200000bf .word 0x200000bf 08006918 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_HID_GetFSCfgDesc(uint16_t *length) { 8006918: b580 push {r7, lr} 800691a: b084 sub sp, #16 800691c: af00 add r7, sp, #0 800691e: 6078 str r0, [r7, #4] USBD_EpDescTypeDef *pEpDesc = USBD_GetEpDesc(USBD_HID_CfgDesc, HID_EPIN_ADDR); 8006920: 2181 movs r1, #129 @ 0x81 8006922: 4809 ldr r0, [pc, #36] @ (8006948 ) 8006924: f000 fc4e bl 80071c4 8006928: 60f8 str r0, [r7, #12] if (pEpDesc != NULL) 800692a: 68fb ldr r3, [r7, #12] 800692c: 2b00 cmp r3, #0 800692e: d002 beq.n 8006936 { pEpDesc->bInterval = HID_FS_BINTERVAL; 8006930: 68fb ldr r3, [r7, #12] 8006932: 220a movs r2, #10 8006934: 719a strb r2, [r3, #6] } *length = (uint16_t)sizeof(USBD_HID_CfgDesc); 8006936: 687b ldr r3, [r7, #4] 8006938: 2222 movs r2, #34 @ 0x22 800693a: 801a strh r2, [r3, #0] return USBD_HID_CfgDesc; 800693c: 4b02 ldr r3, [pc, #8] @ (8006948 ) } 800693e: 4618 mov r0, r3 8006940: 3710 adds r7, #16 8006942: 46bd mov sp, r7 8006944: bd80 pop {r7, pc} 8006946: bf00 nop 8006948: 20000044 .word 0x20000044 0800694c : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_HID_GetHSCfgDesc(uint16_t *length) { 800694c: b580 push {r7, lr} 800694e: b084 sub sp, #16 8006950: af00 add r7, sp, #0 8006952: 6078 str r0, [r7, #4] USBD_EpDescTypeDef *pEpDesc = USBD_GetEpDesc(USBD_HID_CfgDesc, HID_EPIN_ADDR); 8006954: 2181 movs r1, #129 @ 0x81 8006956: 4809 ldr r0, [pc, #36] @ (800697c ) 8006958: f000 fc34 bl 80071c4 800695c: 60f8 str r0, [r7, #12] if (pEpDesc != NULL) 800695e: 68fb ldr r3, [r7, #12] 8006960: 2b00 cmp r3, #0 8006962: d002 beq.n 800696a { pEpDesc->bInterval = HID_HS_BINTERVAL; 8006964: 68fb ldr r3, [r7, #12] 8006966: 2207 movs r2, #7 8006968: 719a strb r2, [r3, #6] } *length = (uint16_t)sizeof(USBD_HID_CfgDesc); 800696a: 687b ldr r3, [r7, #4] 800696c: 2222 movs r2, #34 @ 0x22 800696e: 801a strh r2, [r3, #0] return USBD_HID_CfgDesc; 8006970: 4b02 ldr r3, [pc, #8] @ (800697c ) } 8006972: 4618 mov r0, r3 8006974: 3710 adds r7, #16 8006976: 46bd mov sp, r7 8006978: bd80 pop {r7, pc} 800697a: bf00 nop 800697c: 20000044 .word 0x20000044 08006980 : * @param speed : current device speed * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_HID_GetOtherSpeedCfgDesc(uint16_t *length) { 8006980: b580 push {r7, lr} 8006982: b084 sub sp, #16 8006984: af00 add r7, sp, #0 8006986: 6078 str r0, [r7, #4] USBD_EpDescTypeDef *pEpDesc = USBD_GetEpDesc(USBD_HID_CfgDesc, HID_EPIN_ADDR); 8006988: 2181 movs r1, #129 @ 0x81 800698a: 4809 ldr r0, [pc, #36] @ (80069b0 ) 800698c: f000 fc1a bl 80071c4 8006990: 60f8 str r0, [r7, #12] if (pEpDesc != NULL) 8006992: 68fb ldr r3, [r7, #12] 8006994: 2b00 cmp r3, #0 8006996: d002 beq.n 800699e { pEpDesc->bInterval = HID_FS_BINTERVAL; 8006998: 68fb ldr r3, [r7, #12] 800699a: 220a movs r2, #10 800699c: 719a strb r2, [r3, #6] } *length = (uint16_t)sizeof(USBD_HID_CfgDesc); 800699e: 687b ldr r3, [r7, #4] 80069a0: 2222 movs r2, #34 @ 0x22 80069a2: 801a strh r2, [r3, #0] return USBD_HID_CfgDesc; 80069a4: 4b02 ldr r3, [pc, #8] @ (80069b0 ) } 80069a6: 4618 mov r0, r3 80069a8: 3710 adds r7, #16 80069aa: 46bd mov sp, r7 80069ac: bd80 pop {r7, pc} 80069ae: bf00 nop 80069b0: 20000044 .word 0x20000044 080069b4 : * @param pdev: device instance * @param epnum: endpoint index * @retval status */ static uint8_t USBD_HID_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum) { 80069b4: b480 push {r7} 80069b6: b083 sub sp, #12 80069b8: af00 add r7, sp, #0 80069ba: 6078 str r0, [r7, #4] 80069bc: 460b mov r3, r1 80069be: 70fb strb r3, [r7, #3] UNUSED(epnum); /* Ensure that the FIFO is empty before a new transfer, this condition could be caused by a new transfer before the end of the previous transfer */ ((USBD_HID_HandleTypeDef *)pdev->pClassDataCmsit[pdev->classId])->state = USBD_HID_IDLE; 80069c0: 687b ldr r3, [r7, #4] 80069c2: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80069c6: 687b ldr r3, [r7, #4] 80069c8: 32b0 adds r2, #176 @ 0xb0 80069ca: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80069ce: 2200 movs r2, #0 80069d0: 731a strb r2, [r3, #12] return (uint8_t)USBD_OK; 80069d2: 2300 movs r3, #0 } 80069d4: 4618 mov r0, r3 80069d6: 370c adds r7, #12 80069d8: 46bd mov sp, r7 80069da: f85d 7b04 ldr.w r7, [sp], #4 80069de: 4770 bx lr 080069e0 : * return Device Qualifier descriptor * @param length : pointer data length * @retval pointer to descriptor buffer */ static uint8_t *USBD_HID_GetDeviceQualifierDesc(uint16_t *length) { 80069e0: b480 push {r7} 80069e2: b083 sub sp, #12 80069e4: af00 add r7, sp, #0 80069e6: 6078 str r0, [r7, #4] *length = (uint16_t)sizeof(USBD_HID_DeviceQualifierDesc); 80069e8: 687b ldr r3, [r7, #4] 80069ea: 220a movs r2, #10 80069ec: 801a strh r2, [r3, #0] return USBD_HID_DeviceQualifierDesc; 80069ee: 4b03 ldr r3, [pc, #12] @ (80069fc ) } 80069f0: 4618 mov r0, r3 80069f2: 370c adds r7, #12 80069f4: 46bd mov sp, r7 80069f6: f85d 7b04 ldr.w r7, [sp], #4 80069fa: 4770 bx lr 80069fc: 20000074 .word 0x20000074 08006a00 : * @param id: Low level core index * @retval status: USBD Status */ USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) { 8006a00: b580 push {r7, lr} 8006a02: b086 sub sp, #24 8006a04: af00 add r7, sp, #0 8006a06: 60f8 str r0, [r7, #12] 8006a08: 60b9 str r1, [r7, #8] 8006a0a: 4613 mov r3, r2 8006a0c: 71fb strb r3, [r7, #7] USBD_StatusTypeDef ret; /* Check whether the USB Host handle is valid */ if (pdev == NULL) 8006a0e: 68fb ldr r3, [r7, #12] 8006a10: 2b00 cmp r3, #0 8006a12: d101 bne.n 8006a18 { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Device handle"); #endif /* (USBD_DEBUG_LEVEL > 1U) */ return USBD_FAIL; 8006a14: 2303 movs r3, #3 8006a16: e01f b.n 8006a58 pdev->NumClasses = 0; pdev->classId = 0; } #else /* Unlink previous class*/ pdev->pClass[0] = NULL; 8006a18: 68fb ldr r3, [r7, #12] 8006a1a: 2200 movs r2, #0 8006a1c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 pdev->pUserData[0] = NULL; 8006a20: 68fb ldr r3, [r7, #12] 8006a22: 2200 movs r2, #0 8006a24: f8c3 22c4 str.w r2, [r3, #708] @ 0x2c4 #endif /* USE_USBD_COMPOSITE */ pdev->pConfDesc = NULL; 8006a28: 68fb ldr r3, [r7, #12] 8006a2a: 2200 movs r2, #0 8006a2c: f8c3 22d0 str.w r2, [r3, #720] @ 0x2d0 /* Assign USBD Descriptors */ if (pdesc != NULL) 8006a30: 68bb ldr r3, [r7, #8] 8006a32: 2b00 cmp r3, #0 8006a34: d003 beq.n 8006a3e { pdev->pDesc = pdesc; 8006a36: 68fb ldr r3, [r7, #12] 8006a38: 68ba ldr r2, [r7, #8] 8006a3a: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4 } /* Set Device initial State */ pdev->dev_state = USBD_STATE_DEFAULT; 8006a3e: 68fb ldr r3, [r7, #12] 8006a40: 2201 movs r2, #1 8006a42: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->id = id; 8006a46: 68fb ldr r3, [r7, #12] 8006a48: 79fa ldrb r2, [r7, #7] 8006a4a: 701a strb r2, [r3, #0] /* Initialize low level driver */ ret = USBD_LL_Init(pdev); 8006a4c: 68f8 ldr r0, [r7, #12] 8006a4e: f001 fda3 bl 8008598 8006a52: 4603 mov r3, r0 8006a54: 75fb strb r3, [r7, #23] return ret; 8006a56: 7dfb ldrb r3, [r7, #23] } 8006a58: 4618 mov r0, r3 8006a5a: 3718 adds r7, #24 8006a5c: 46bd mov sp, r7 8006a5e: bd80 pop {r7, pc} 08006a60 : * @param pdev: Device Handle * @param pclass: Class handle * @retval USBD Status */ USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass) { 8006a60: b580 push {r7, lr} 8006a62: b084 sub sp, #16 8006a64: af00 add r7, sp, #0 8006a66: 6078 str r0, [r7, #4] 8006a68: 6039 str r1, [r7, #0] uint16_t len = 0U; 8006a6a: 2300 movs r3, #0 8006a6c: 81fb strh r3, [r7, #14] if (pclass == NULL) 8006a6e: 683b ldr r3, [r7, #0] 8006a70: 2b00 cmp r3, #0 8006a72: d101 bne.n 8006a78 { #if (USBD_DEBUG_LEVEL > 1U) USBD_ErrLog("Invalid Class handle"); #endif /* (USBD_DEBUG_LEVEL > 1U) */ return USBD_FAIL; 8006a74: 2303 movs r3, #3 8006a76: e025 b.n 8006ac4 } /* link the class to the USB Device handle */ pdev->pClass[0] = pclass; 8006a78: 687b ldr r3, [r7, #4] 8006a7a: 683a ldr r2, [r7, #0] 8006a7c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8 if (pdev->pClass[pdev->classId]->GetHSConfigDescriptor != NULL) { pdev->pConfDesc = (void *)pdev->pClass[pdev->classId]->GetHSConfigDescriptor(&len); } #else /* Default USE_USB_FS */ if (pdev->pClass[pdev->classId]->GetFSConfigDescriptor != NULL) 8006a80: 687b ldr r3, [r7, #4] 8006a82: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8006a86: 687b ldr r3, [r7, #4] 8006a88: 32ae adds r2, #174 @ 0xae 8006a8a: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8006a8e: 6adb ldr r3, [r3, #44] @ 0x2c 8006a90: 2b00 cmp r3, #0 8006a92: d00f beq.n 8006ab4 { pdev->pConfDesc = (void *)pdev->pClass[pdev->classId]->GetFSConfigDescriptor(&len); 8006a94: 687b ldr r3, [r7, #4] 8006a96: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8006a9a: 687b ldr r3, [r7, #4] 8006a9c: 32ae adds r2, #174 @ 0xae 8006a9e: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8006aa2: 6adb ldr r3, [r3, #44] @ 0x2c 8006aa4: f107 020e add.w r2, r7, #14 8006aa8: 4610 mov r0, r2 8006aaa: 4798 blx r3 8006aac: 4602 mov r2, r0 8006aae: 687b ldr r3, [r7, #4] 8006ab0: f8c3 22d0 str.w r2, [r3, #720] @ 0x2d0 } #endif /* USE_USB_FS */ /* Increment the NumClasses */ pdev->NumClasses++; 8006ab4: 687b ldr r3, [r7, #4] 8006ab6: f8d3 32d8 ldr.w r3, [r3, #728] @ 0x2d8 8006aba: 1c5a adds r2, r3, #1 8006abc: 687b ldr r3, [r7, #4] 8006abe: f8c3 22d8 str.w r2, [r3, #728] @ 0x2d8 return USBD_OK; 8006ac2: 2300 movs r3, #0 } 8006ac4: 4618 mov r0, r3 8006ac6: 3710 adds r7, #16 8006ac8: 46bd mov sp, r7 8006aca: bd80 pop {r7, pc} 08006acc : * Start the USB Device Core. * @param pdev: Device Handle * @retval USBD Status */ USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev) { 8006acc: b580 push {r7, lr} 8006ace: b082 sub sp, #8 8006ad0: af00 add r7, sp, #0 8006ad2: 6078 str r0, [r7, #4] #ifdef USE_USBD_COMPOSITE pdev->classId = 0U; #endif /* USE_USBD_COMPOSITE */ /* Start the low level driver */ return USBD_LL_Start(pdev); 8006ad4: 6878 ldr r0, [r7, #4] 8006ad6: f001 fdab bl 8008630 8006ada: 4603 mov r3, r0 } 8006adc: 4618 mov r0, r3 8006ade: 3708 adds r7, #8 8006ae0: 46bd mov sp, r7 8006ae2: bd80 pop {r7, pc} 08006ae4 : * Launch test mode process * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev) { 8006ae4: b480 push {r7} 8006ae6: b083 sub sp, #12 8006ae8: af00 add r7, sp, #0 8006aea: 6078 str r0, [r7, #4] return ret; #else /* Prevent unused argument compilation warning */ UNUSED(pdev); return USBD_OK; 8006aec: 2300 movs r3, #0 #endif /* USBD_HS_TESTMODE_ENABLE */ } 8006aee: 4618 mov r0, r3 8006af0: 370c adds r7, #12 8006af2: 46bd mov sp, r7 8006af4: f85d 7b04 ldr.w r7, [sp], #4 8006af8: 4770 bx lr 08006afa : * @param cfgidx: configuration index * @retval status */ USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8006afa: b580 push {r7, lr} 8006afc: b084 sub sp, #16 8006afe: af00 add r7, sp, #0 8006b00: 6078 str r0, [r7, #4] 8006b02: 460b mov r3, r1 8006b04: 70fb strb r3, [r7, #3] USBD_StatusTypeDef ret = USBD_OK; 8006b06: 2300 movs r3, #0 8006b08: 73fb strb r3, [r7, #15] } } } } #else if (pdev->pClass[0] != NULL) 8006b0a: 687b ldr r3, [r7, #4] 8006b0c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8006b10: 2b00 cmp r3, #0 8006b12: d009 beq.n 8006b28 { /* Set configuration and Start the Class */ ret = (USBD_StatusTypeDef)pdev->pClass[0]->Init(pdev, cfgidx); 8006b14: 687b ldr r3, [r7, #4] 8006b16: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8006b1a: 681b ldr r3, [r3, #0] 8006b1c: 78fa ldrb r2, [r7, #3] 8006b1e: 4611 mov r1, r2 8006b20: 6878 ldr r0, [r7, #4] 8006b22: 4798 blx r3 8006b24: 4603 mov r3, r0 8006b26: 73fb strb r3, [r7, #15] } #endif /* USE_USBD_COMPOSITE */ return ret; 8006b28: 7bfb ldrb r3, [r7, #15] } 8006b2a: 4618 mov r0, r3 8006b2c: 3710 adds r7, #16 8006b2e: 46bd mov sp, r7 8006b30: bd80 pop {r7, pc} 08006b32 : * @param pdev: device instance * @param cfgidx: configuration index * @retval status */ USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) { 8006b32: b580 push {r7, lr} 8006b34: b084 sub sp, #16 8006b36: af00 add r7, sp, #0 8006b38: 6078 str r0, [r7, #4] 8006b3a: 460b mov r3, r1 8006b3c: 70fb strb r3, [r7, #3] USBD_StatusTypeDef ret = USBD_OK; 8006b3e: 2300 movs r3, #0 8006b40: 73fb strb r3, [r7, #15] } } } #else /* Clear configuration and De-initialize the Class process */ if (pdev->pClass[0]->DeInit(pdev, cfgidx) != 0U) 8006b42: 687b ldr r3, [r7, #4] 8006b44: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8006b48: 685b ldr r3, [r3, #4] 8006b4a: 78fa ldrb r2, [r7, #3] 8006b4c: 4611 mov r1, r2 8006b4e: 6878 ldr r0, [r7, #4] 8006b50: 4798 blx r3 8006b52: 4603 mov r3, r0 8006b54: 2b00 cmp r3, #0 8006b56: d001 beq.n 8006b5c { ret = USBD_FAIL; 8006b58: 2303 movs r3, #3 8006b5a: 73fb strb r3, [r7, #15] } #endif /* USE_USBD_COMPOSITE */ return ret; 8006b5c: 7bfb ldrb r3, [r7, #15] } 8006b5e: 4618 mov r0, r3 8006b60: 3710 adds r7, #16 8006b62: 46bd mov sp, r7 8006b64: bd80 pop {r7, pc} 08006b66 : * @param pdev: device instance * @param psetup: setup packet buffer pointer * @retval status */ USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) { 8006b66: b580 push {r7, lr} 8006b68: b084 sub sp, #16 8006b6a: af00 add r7, sp, #0 8006b6c: 6078 str r0, [r7, #4] 8006b6e: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret; USBD_ParseSetupRequest(&pdev->request, psetup); 8006b70: 687b ldr r3, [r7, #4] 8006b72: f203 23aa addw r3, r3, #682 @ 0x2aa 8006b76: 6839 ldr r1, [r7, #0] 8006b78: 4618 mov r0, r3 8006b7a: f001 f94c bl 8007e16 pdev->ep0_state = USBD_EP0_SETUP; 8006b7e: 687b ldr r3, [r7, #4] 8006b80: 2201 movs r2, #1 8006b82: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep0_data_len = pdev->request.wLength; 8006b86: 687b ldr r3, [r7, #4] 8006b88: f8b3 32b0 ldrh.w r3, [r3, #688] @ 0x2b0 8006b8c: 461a mov r2, r3 8006b8e: 687b ldr r3, [r7, #4] 8006b90: f8c3 2298 str.w r2, [r3, #664] @ 0x298 switch (pdev->request.bmRequest & 0x1FU) 8006b94: 687b ldr r3, [r7, #4] 8006b96: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa 8006b9a: f003 031f and.w r3, r3, #31 8006b9e: 2b02 cmp r3, #2 8006ba0: d01a beq.n 8006bd8 8006ba2: 2b02 cmp r3, #2 8006ba4: d822 bhi.n 8006bec 8006ba6: 2b00 cmp r3, #0 8006ba8: d002 beq.n 8006bb0 8006baa: 2b01 cmp r3, #1 8006bac: d00a beq.n 8006bc4 8006bae: e01d b.n 8006bec { case USB_REQ_RECIPIENT_DEVICE: ret = USBD_StdDevReq(pdev, &pdev->request); 8006bb0: 687b ldr r3, [r7, #4] 8006bb2: f203 23aa addw r3, r3, #682 @ 0x2aa 8006bb6: 4619 mov r1, r3 8006bb8: 6878 ldr r0, [r7, #4] 8006bba: f000 fb77 bl 80072ac 8006bbe: 4603 mov r3, r0 8006bc0: 73fb strb r3, [r7, #15] break; 8006bc2: e020 b.n 8006c06 case USB_REQ_RECIPIENT_INTERFACE: ret = USBD_StdItfReq(pdev, &pdev->request); 8006bc4: 687b ldr r3, [r7, #4] 8006bc6: f203 23aa addw r3, r3, #682 @ 0x2aa 8006bca: 4619 mov r1, r3 8006bcc: 6878 ldr r0, [r7, #4] 8006bce: f000 fbdf bl 8007390 8006bd2: 4603 mov r3, r0 8006bd4: 73fb strb r3, [r7, #15] break; 8006bd6: e016 b.n 8006c06 case USB_REQ_RECIPIENT_ENDPOINT: ret = USBD_StdEPReq(pdev, &pdev->request); 8006bd8: 687b ldr r3, [r7, #4] 8006bda: f203 23aa addw r3, r3, #682 @ 0x2aa 8006bde: 4619 mov r1, r3 8006be0: 6878 ldr r0, [r7, #4] 8006be2: f000 fc41 bl 8007468 8006be6: 4603 mov r3, r0 8006be8: 73fb strb r3, [r7, #15] break; 8006bea: e00c b.n 8006c06 default: ret = USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U)); 8006bec: 687b ldr r3, [r7, #4] 8006bee: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa 8006bf2: f023 037f bic.w r3, r3, #127 @ 0x7f 8006bf6: b2db uxtb r3, r3 8006bf8: 4619 mov r1, r3 8006bfa: 6878 ldr r0, [r7, #4] 8006bfc: f001 fd78 bl 80086f0 8006c00: 4603 mov r3, r0 8006c02: 73fb strb r3, [r7, #15] break; 8006c04: bf00 nop } return ret; 8006c06: 7bfb ldrb r3, [r7, #15] } 8006c08: 4618 mov r0, r3 8006c0a: 3710 adds r7, #16 8006c0c: 46bd mov sp, r7 8006c0e: bd80 pop {r7, pc} 08006c10 : * @param pdata: data pointer * @retval status */ USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 8006c10: b580 push {r7, lr} 8006c12: b086 sub sp, #24 8006c14: af00 add r7, sp, #0 8006c16: 60f8 str r0, [r7, #12] 8006c18: 460b mov r3, r1 8006c1a: 607a str r2, [r7, #4] 8006c1c: 72fb strb r3, [r7, #11] USBD_EndpointTypeDef *pep; USBD_StatusTypeDef ret = USBD_OK; 8006c1e: 2300 movs r3, #0 8006c20: 75fb strb r3, [r7, #23] uint8_t idx; UNUSED(pdata); if (epnum == 0U) 8006c22: 7afb ldrb r3, [r7, #11] 8006c24: 2b00 cmp r3, #0 8006c26: d177 bne.n 8006d18 { pep = &pdev->ep_out[0]; 8006c28: 68fb ldr r3, [r7, #12] 8006c2a: f503 73aa add.w r3, r3, #340 @ 0x154 8006c2e: 613b str r3, [r7, #16] if (pdev->ep0_state == USBD_EP0_DATA_OUT) 8006c30: 68fb ldr r3, [r7, #12] 8006c32: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 8006c36: 2b03 cmp r3, #3 8006c38: f040 80a1 bne.w 8006d7e { if (pep->rem_length > pep->maxpacket) 8006c3c: 693b ldr r3, [r7, #16] 8006c3e: 685b ldr r3, [r3, #4] 8006c40: 693a ldr r2, [r7, #16] 8006c42: 8992 ldrh r2, [r2, #12] 8006c44: 4293 cmp r3, r2 8006c46: d91c bls.n 8006c82 { pep->rem_length -= pep->maxpacket; 8006c48: 693b ldr r3, [r7, #16] 8006c4a: 685b ldr r3, [r3, #4] 8006c4c: 693a ldr r2, [r7, #16] 8006c4e: 8992 ldrh r2, [r2, #12] 8006c50: 1a9a subs r2, r3, r2 8006c52: 693b ldr r3, [r7, #16] 8006c54: 605a str r2, [r3, #4] pep->pbuffer += pep->maxpacket; 8006c56: 693b ldr r3, [r7, #16] 8006c58: 691b ldr r3, [r3, #16] 8006c5a: 693a ldr r2, [r7, #16] 8006c5c: 8992 ldrh r2, [r2, #12] 8006c5e: 441a add r2, r3 8006c60: 693b ldr r3, [r7, #16] 8006c62: 611a str r2, [r3, #16] (void)USBD_CtlContinueRx(pdev, pep->pbuffer, MAX(pep->rem_length, pep->maxpacket)); 8006c64: 693b ldr r3, [r7, #16] 8006c66: 6919 ldr r1, [r3, #16] 8006c68: 693b ldr r3, [r7, #16] 8006c6a: 899b ldrh r3, [r3, #12] 8006c6c: 461a mov r2, r3 8006c6e: 693b ldr r3, [r7, #16] 8006c70: 685b ldr r3, [r3, #4] 8006c72: 4293 cmp r3, r2 8006c74: bf38 it cc 8006c76: 4613 movcc r3, r2 8006c78: 461a mov r2, r3 8006c7a: 68f8 ldr r0, [r7, #12] 8006c7c: f001 f9b1 bl 8007fe2 8006c80: e07d b.n 8006d7e } else { /* Find the class ID relative to the current request */ switch (pdev->request.bmRequest & 0x1FU) 8006c82: 68fb ldr r3, [r7, #12] 8006c84: f893 32aa ldrb.w r3, [r3, #682] @ 0x2aa 8006c88: f003 031f and.w r3, r3, #31 8006c8c: 2b02 cmp r3, #2 8006c8e: d014 beq.n 8006cba 8006c90: 2b02 cmp r3, #2 8006c92: d81d bhi.n 8006cd0 8006c94: 2b00 cmp r3, #0 8006c96: d002 beq.n 8006c9e 8006c98: 2b01 cmp r3, #1 8006c9a: d003 beq.n 8006ca4 8006c9c: e018 b.n 8006cd0 { case USB_REQ_RECIPIENT_DEVICE: /* Device requests must be managed by the first instantiated class (or duplicated by all classes for simplicity) */ idx = 0U; 8006c9e: 2300 movs r3, #0 8006ca0: 75bb strb r3, [r7, #22] break; 8006ca2: e018 b.n 8006cd6 case USB_REQ_RECIPIENT_INTERFACE: idx = USBD_CoreFindIF(pdev, LOBYTE(pdev->request.wIndex)); 8006ca4: 68fb ldr r3, [r7, #12] 8006ca6: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae 8006caa: b2db uxtb r3, r3 8006cac: 4619 mov r1, r3 8006cae: 68f8 ldr r0, [r7, #12] 8006cb0: f000 fa6e bl 8007190 8006cb4: 4603 mov r3, r0 8006cb6: 75bb strb r3, [r7, #22] break; 8006cb8: e00d b.n 8006cd6 case USB_REQ_RECIPIENT_ENDPOINT: idx = USBD_CoreFindEP(pdev, LOBYTE(pdev->request.wIndex)); 8006cba: 68fb ldr r3, [r7, #12] 8006cbc: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae 8006cc0: b2db uxtb r3, r3 8006cc2: 4619 mov r1, r3 8006cc4: 68f8 ldr r0, [r7, #12] 8006cc6: f000 fa70 bl 80071aa 8006cca: 4603 mov r3, r0 8006ccc: 75bb strb r3, [r7, #22] break; 8006cce: e002 b.n 8006cd6 default: /* Back to the first class in case of doubt */ idx = 0U; 8006cd0: 2300 movs r3, #0 8006cd2: 75bb strb r3, [r7, #22] break; 8006cd4: bf00 nop } if (idx < USBD_MAX_SUPPORTED_CLASS) 8006cd6: 7dbb ldrb r3, [r7, #22] 8006cd8: 2b00 cmp r3, #0 8006cda: d119 bne.n 8006d10 { /* Setup the class ID and route the request to the relative class function */ if (pdev->dev_state == USBD_STATE_CONFIGURED) 8006cdc: 68fb ldr r3, [r7, #12] 8006cde: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8006ce2: b2db uxtb r3, r3 8006ce4: 2b03 cmp r3, #3 8006ce6: d113 bne.n 8006d10 { if (pdev->pClass[idx]->EP0_RxReady != NULL) 8006ce8: 7dba ldrb r2, [r7, #22] 8006cea: 68fb ldr r3, [r7, #12] 8006cec: 32ae adds r2, #174 @ 0xae 8006cee: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8006cf2: 691b ldr r3, [r3, #16] 8006cf4: 2b00 cmp r3, #0 8006cf6: d00b beq.n 8006d10 { pdev->classId = idx; 8006cf8: 7dba ldrb r2, [r7, #22] 8006cfa: 68fb ldr r3, [r7, #12] 8006cfc: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 pdev->pClass[idx]->EP0_RxReady(pdev); 8006d00: 7dba ldrb r2, [r7, #22] 8006d02: 68fb ldr r3, [r7, #12] 8006d04: 32ae adds r2, #174 @ 0xae 8006d06: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8006d0a: 691b ldr r3, [r3, #16] 8006d0c: 68f8 ldr r0, [r7, #12] 8006d0e: 4798 blx r3 } } } (void)USBD_CtlSendStatus(pdev); 8006d10: 68f8 ldr r0, [r7, #12] 8006d12: f001 f977 bl 8008004 8006d16: e032 b.n 8006d7e } } else { /* Get the class index relative to this interface */ idx = USBD_CoreFindEP(pdev, (epnum & 0x7FU)); 8006d18: 7afb ldrb r3, [r7, #11] 8006d1a: f003 037f and.w r3, r3, #127 @ 0x7f 8006d1e: b2db uxtb r3, r3 8006d20: 4619 mov r1, r3 8006d22: 68f8 ldr r0, [r7, #12] 8006d24: f000 fa41 bl 80071aa 8006d28: 4603 mov r3, r0 8006d2a: 75bb strb r3, [r7, #22] if (((uint16_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS)) 8006d2c: 7dbb ldrb r3, [r7, #22] 8006d2e: 2bff cmp r3, #255 @ 0xff 8006d30: d025 beq.n 8006d7e 8006d32: 7dbb ldrb r3, [r7, #22] 8006d34: 2b00 cmp r3, #0 8006d36: d122 bne.n 8006d7e { /* Call the class data out function to manage the request */ if (pdev->dev_state == USBD_STATE_CONFIGURED) 8006d38: 68fb ldr r3, [r7, #12] 8006d3a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8006d3e: b2db uxtb r3, r3 8006d40: 2b03 cmp r3, #3 8006d42: d117 bne.n 8006d74 { if (pdev->pClass[idx]->DataOut != NULL) 8006d44: 7dba ldrb r2, [r7, #22] 8006d46: 68fb ldr r3, [r7, #12] 8006d48: 32ae adds r2, #174 @ 0xae 8006d4a: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8006d4e: 699b ldr r3, [r3, #24] 8006d50: 2b00 cmp r3, #0 8006d52: d00f beq.n 8006d74 { pdev->classId = idx; 8006d54: 7dba ldrb r2, [r7, #22] 8006d56: 68fb ldr r3, [r7, #12] 8006d58: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 ret = (USBD_StatusTypeDef)pdev->pClass[idx]->DataOut(pdev, epnum); 8006d5c: 7dba ldrb r2, [r7, #22] 8006d5e: 68fb ldr r3, [r7, #12] 8006d60: 32ae adds r2, #174 @ 0xae 8006d62: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8006d66: 699b ldr r3, [r3, #24] 8006d68: 7afa ldrb r2, [r7, #11] 8006d6a: 4611 mov r1, r2 8006d6c: 68f8 ldr r0, [r7, #12] 8006d6e: 4798 blx r3 8006d70: 4603 mov r3, r0 8006d72: 75fb strb r3, [r7, #23] } } if (ret != USBD_OK) 8006d74: 7dfb ldrb r3, [r7, #23] 8006d76: 2b00 cmp r3, #0 8006d78: d001 beq.n 8006d7e { return ret; 8006d7a: 7dfb ldrb r3, [r7, #23] 8006d7c: e000 b.n 8006d80 } } } return USBD_OK; 8006d7e: 2300 movs r3, #0 } 8006d80: 4618 mov r0, r3 8006d82: 3718 adds r7, #24 8006d84: 46bd mov sp, r7 8006d86: bd80 pop {r7, pc} 08006d88 : * @param pdata: data pointer * @retval status */ USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev, uint8_t epnum, uint8_t *pdata) { 8006d88: b580 push {r7, lr} 8006d8a: b086 sub sp, #24 8006d8c: af00 add r7, sp, #0 8006d8e: 60f8 str r0, [r7, #12] 8006d90: 460b mov r3, r1 8006d92: 607a str r2, [r7, #4] 8006d94: 72fb strb r3, [r7, #11] USBD_StatusTypeDef ret; uint8_t idx; UNUSED(pdata); if (epnum == 0U) 8006d96: 7afb ldrb r3, [r7, #11] 8006d98: 2b00 cmp r3, #0 8006d9a: d178 bne.n 8006e8e { pep = &pdev->ep_in[0]; 8006d9c: 68fb ldr r3, [r7, #12] 8006d9e: 3314 adds r3, #20 8006da0: 613b str r3, [r7, #16] if (pdev->ep0_state == USBD_EP0_DATA_IN) 8006da2: 68fb ldr r3, [r7, #12] 8006da4: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294 8006da8: 2b02 cmp r3, #2 8006daa: d163 bne.n 8006e74 { if (pep->rem_length > pep->maxpacket) 8006dac: 693b ldr r3, [r7, #16] 8006dae: 685b ldr r3, [r3, #4] 8006db0: 693a ldr r2, [r7, #16] 8006db2: 8992 ldrh r2, [r2, #12] 8006db4: 4293 cmp r3, r2 8006db6: d91c bls.n 8006df2 { pep->rem_length -= pep->maxpacket; 8006db8: 693b ldr r3, [r7, #16] 8006dba: 685b ldr r3, [r3, #4] 8006dbc: 693a ldr r2, [r7, #16] 8006dbe: 8992 ldrh r2, [r2, #12] 8006dc0: 1a9a subs r2, r3, r2 8006dc2: 693b ldr r3, [r7, #16] 8006dc4: 605a str r2, [r3, #4] pep->pbuffer += pep->maxpacket; 8006dc6: 693b ldr r3, [r7, #16] 8006dc8: 691b ldr r3, [r3, #16] 8006dca: 693a ldr r2, [r7, #16] 8006dcc: 8992 ldrh r2, [r2, #12] 8006dce: 441a add r2, r3 8006dd0: 693b ldr r3, [r7, #16] 8006dd2: 611a str r2, [r3, #16] (void)USBD_CtlContinueSendData(pdev, pep->pbuffer, pep->rem_length); 8006dd4: 693b ldr r3, [r7, #16] 8006dd6: 6919 ldr r1, [r3, #16] 8006dd8: 693b ldr r3, [r7, #16] 8006dda: 685b ldr r3, [r3, #4] 8006ddc: 461a mov r2, r3 8006dde: 68f8 ldr r0, [r7, #12] 8006de0: f001 f8ee bl 8007fc0 /* Prepare endpoint for premature end of transfer */ (void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 8006de4: 2300 movs r3, #0 8006de6: 2200 movs r2, #0 8006de8: 2100 movs r1, #0 8006dea: 68f8 ldr r0, [r7, #12] 8006dec: f001 fd2a bl 8008844 8006df0: e040 b.n 8006e74 } else { /* last packet is MPS multiple, so send ZLP packet */ if ((pep->maxpacket == pep->rem_length) && 8006df2: 693b ldr r3, [r7, #16] 8006df4: 899b ldrh r3, [r3, #12] 8006df6: 461a mov r2, r3 8006df8: 693b ldr r3, [r7, #16] 8006dfa: 685b ldr r3, [r3, #4] 8006dfc: 429a cmp r2, r3 8006dfe: d11c bne.n 8006e3a (pep->total_length >= pep->maxpacket) && 8006e00: 693b ldr r3, [r7, #16] 8006e02: 681b ldr r3, [r3, #0] 8006e04: 693a ldr r2, [r7, #16] 8006e06: 8992 ldrh r2, [r2, #12] if ((pep->maxpacket == pep->rem_length) && 8006e08: 4293 cmp r3, r2 8006e0a: d316 bcc.n 8006e3a (pep->total_length < pdev->ep0_data_len)) 8006e0c: 693b ldr r3, [r7, #16] 8006e0e: 681a ldr r2, [r3, #0] 8006e10: 68fb ldr r3, [r7, #12] 8006e12: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298 (pep->total_length >= pep->maxpacket) && 8006e16: 429a cmp r2, r3 8006e18: d20f bcs.n 8006e3a { (void)USBD_CtlContinueSendData(pdev, NULL, 0U); 8006e1a: 2200 movs r2, #0 8006e1c: 2100 movs r1, #0 8006e1e: 68f8 ldr r0, [r7, #12] 8006e20: f001 f8ce bl 8007fc0 pdev->ep0_data_len = 0U; 8006e24: 68fb ldr r3, [r7, #12] 8006e26: 2200 movs r2, #0 8006e28: f8c3 2298 str.w r2, [r3, #664] @ 0x298 /* Prepare endpoint for premature end of transfer */ (void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 8006e2c: 2300 movs r3, #0 8006e2e: 2200 movs r2, #0 8006e30: 2100 movs r1, #0 8006e32: 68f8 ldr r0, [r7, #12] 8006e34: f001 fd06 bl 8008844 8006e38: e01c b.n 8006e74 } else { if (pdev->dev_state == USBD_STATE_CONFIGURED) 8006e3a: 68fb ldr r3, [r7, #12] 8006e3c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8006e40: b2db uxtb r3, r3 8006e42: 2b03 cmp r3, #3 8006e44: d10f bne.n 8006e66 { if (pdev->pClass[0]->EP0_TxSent != NULL) 8006e46: 68fb ldr r3, [r7, #12] 8006e48: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8006e4c: 68db ldr r3, [r3, #12] 8006e4e: 2b00 cmp r3, #0 8006e50: d009 beq.n 8006e66 { pdev->classId = 0U; 8006e52: 68fb ldr r3, [r7, #12] 8006e54: 2200 movs r2, #0 8006e56: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 pdev->pClass[0]->EP0_TxSent(pdev); 8006e5a: 68fb ldr r3, [r7, #12] 8006e5c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8006e60: 68db ldr r3, [r3, #12] 8006e62: 68f8 ldr r0, [r7, #12] 8006e64: 4798 blx r3 } } (void)USBD_LL_StallEP(pdev, 0x80U); 8006e66: 2180 movs r1, #128 @ 0x80 8006e68: 68f8 ldr r0, [r7, #12] 8006e6a: f001 fc41 bl 80086f0 (void)USBD_CtlReceiveStatus(pdev); 8006e6e: 68f8 ldr r0, [r7, #12] 8006e70: f001 f8db bl 800802a } } } if (pdev->dev_test_mode != 0U) 8006e74: 68fb ldr r3, [r7, #12] 8006e76: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0 8006e7a: 2b00 cmp r3, #0 8006e7c: d03a beq.n 8006ef4 { (void)USBD_RunTestMode(pdev); 8006e7e: 68f8 ldr r0, [r7, #12] 8006e80: f7ff fe30 bl 8006ae4 pdev->dev_test_mode = 0U; 8006e84: 68fb ldr r3, [r7, #12] 8006e86: 2200 movs r2, #0 8006e88: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 8006e8c: e032 b.n 8006ef4 } } else { /* Get the class index relative to this interface */ idx = USBD_CoreFindEP(pdev, ((uint8_t)epnum | 0x80U)); 8006e8e: 7afb ldrb r3, [r7, #11] 8006e90: f063 037f orn r3, r3, #127 @ 0x7f 8006e94: b2db uxtb r3, r3 8006e96: 4619 mov r1, r3 8006e98: 68f8 ldr r0, [r7, #12] 8006e9a: f000 f986 bl 80071aa 8006e9e: 4603 mov r3, r0 8006ea0: 75fb strb r3, [r7, #23] if (((uint16_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS)) 8006ea2: 7dfb ldrb r3, [r7, #23] 8006ea4: 2bff cmp r3, #255 @ 0xff 8006ea6: d025 beq.n 8006ef4 8006ea8: 7dfb ldrb r3, [r7, #23] 8006eaa: 2b00 cmp r3, #0 8006eac: d122 bne.n 8006ef4 { /* Call the class data out function to manage the request */ if (pdev->dev_state == USBD_STATE_CONFIGURED) 8006eae: 68fb ldr r3, [r7, #12] 8006eb0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8006eb4: b2db uxtb r3, r3 8006eb6: 2b03 cmp r3, #3 8006eb8: d11c bne.n 8006ef4 { if (pdev->pClass[idx]->DataIn != NULL) 8006eba: 7dfa ldrb r2, [r7, #23] 8006ebc: 68fb ldr r3, [r7, #12] 8006ebe: 32ae adds r2, #174 @ 0xae 8006ec0: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8006ec4: 695b ldr r3, [r3, #20] 8006ec6: 2b00 cmp r3, #0 8006ec8: d014 beq.n 8006ef4 { pdev->classId = idx; 8006eca: 7dfa ldrb r2, [r7, #23] 8006ecc: 68fb ldr r3, [r7, #12] 8006ece: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 ret = (USBD_StatusTypeDef)pdev->pClass[idx]->DataIn(pdev, epnum); 8006ed2: 7dfa ldrb r2, [r7, #23] 8006ed4: 68fb ldr r3, [r7, #12] 8006ed6: 32ae adds r2, #174 @ 0xae 8006ed8: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8006edc: 695b ldr r3, [r3, #20] 8006ede: 7afa ldrb r2, [r7, #11] 8006ee0: 4611 mov r1, r2 8006ee2: 68f8 ldr r0, [r7, #12] 8006ee4: 4798 blx r3 8006ee6: 4603 mov r3, r0 8006ee8: 75bb strb r3, [r7, #22] if (ret != USBD_OK) 8006eea: 7dbb ldrb r3, [r7, #22] 8006eec: 2b00 cmp r3, #0 8006eee: d001 beq.n 8006ef4 { return ret; 8006ef0: 7dbb ldrb r3, [r7, #22] 8006ef2: e000 b.n 8006ef6 } } } } return USBD_OK; 8006ef4: 2300 movs r3, #0 } 8006ef6: 4618 mov r0, r3 8006ef8: 3718 adds r7, #24 8006efa: 46bd mov sp, r7 8006efc: bd80 pop {r7, pc} 08006efe : * Handle Reset event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) { 8006efe: b580 push {r7, lr} 8006f00: b084 sub sp, #16 8006f02: af00 add r7, sp, #0 8006f04: 6078 str r0, [r7, #4] USBD_StatusTypeDef ret = USBD_OK; 8006f06: 2300 movs r3, #0 8006f08: 73fb strb r3, [r7, #15] /* Upon Reset call user call back */ pdev->dev_state = USBD_STATE_DEFAULT; 8006f0a: 687b ldr r3, [r7, #4] 8006f0c: 2201 movs r2, #1 8006f0e: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->ep0_state = USBD_EP0_IDLE; 8006f12: 687b ldr r3, [r7, #4] 8006f14: 2200 movs r2, #0 8006f16: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->dev_config = 0U; 8006f1a: 687b ldr r3, [r7, #4] 8006f1c: 2200 movs r2, #0 8006f1e: 605a str r2, [r3, #4] pdev->dev_remote_wakeup = 0U; 8006f20: 687b ldr r3, [r7, #4] 8006f22: 2200 movs r2, #0 8006f24: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 pdev->dev_test_mode = 0U; 8006f28: 687b ldr r3, [r7, #4] 8006f2a: 2200 movs r2, #0 8006f2c: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 } } } #else if (pdev->pClass[0] != NULL) 8006f30: 687b ldr r3, [r7, #4] 8006f32: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8006f36: 2b00 cmp r3, #0 8006f38: d014 beq.n 8006f64 { if (pdev->pClass[0]->DeInit != NULL) 8006f3a: 687b ldr r3, [r7, #4] 8006f3c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8006f40: 685b ldr r3, [r3, #4] 8006f42: 2b00 cmp r3, #0 8006f44: d00e beq.n 8006f64 { if (pdev->pClass[0]->DeInit(pdev, (uint8_t)pdev->dev_config) != USBD_OK) 8006f46: 687b ldr r3, [r7, #4] 8006f48: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8006f4c: 685b ldr r3, [r3, #4] 8006f4e: 687a ldr r2, [r7, #4] 8006f50: 6852 ldr r2, [r2, #4] 8006f52: b2d2 uxtb r2, r2 8006f54: 4611 mov r1, r2 8006f56: 6878 ldr r0, [r7, #4] 8006f58: 4798 blx r3 8006f5a: 4603 mov r3, r0 8006f5c: 2b00 cmp r3, #0 8006f5e: d001 beq.n 8006f64 { ret = USBD_FAIL; 8006f60: 2303 movs r3, #3 8006f62: 73fb strb r3, [r7, #15] } } #endif /* USE_USBD_COMPOSITE */ /* Open EP0 OUT */ (void)USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 8006f64: 2340 movs r3, #64 @ 0x40 8006f66: 2200 movs r2, #0 8006f68: 2100 movs r1, #0 8006f6a: 6878 ldr r0, [r7, #4] 8006f6c: f001 fb7b bl 8008666 pdev->ep_out[0x00U & 0xFU].is_used = 1U; 8006f70: 687b ldr r3, [r7, #4] 8006f72: 2201 movs r2, #1 8006f74: f883 2163 strb.w r2, [r3, #355] @ 0x163 pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; 8006f78: 687b ldr r3, [r7, #4] 8006f7a: 2240 movs r2, #64 @ 0x40 8006f7c: f8a3 2160 strh.w r2, [r3, #352] @ 0x160 /* Open EP0 IN */ (void)USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); 8006f80: 2340 movs r3, #64 @ 0x40 8006f82: 2200 movs r2, #0 8006f84: 2180 movs r1, #128 @ 0x80 8006f86: 6878 ldr r0, [r7, #4] 8006f88: f001 fb6d bl 8008666 pdev->ep_in[0x80U & 0xFU].is_used = 1U; 8006f8c: 687b ldr r3, [r7, #4] 8006f8e: 2201 movs r2, #1 8006f90: f883 2023 strb.w r2, [r3, #35] @ 0x23 pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; 8006f94: 687b ldr r3, [r7, #4] 8006f96: 2240 movs r2, #64 @ 0x40 8006f98: 841a strh r2, [r3, #32] return ret; 8006f9a: 7bfb ldrb r3, [r7, #15] } 8006f9c: 4618 mov r0, r3 8006f9e: 3710 adds r7, #16 8006fa0: 46bd mov sp, r7 8006fa2: bd80 pop {r7, pc} 08006fa4 : * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) { 8006fa4: b480 push {r7} 8006fa6: b083 sub sp, #12 8006fa8: af00 add r7, sp, #0 8006faa: 6078 str r0, [r7, #4] 8006fac: 460b mov r3, r1 8006fae: 70fb strb r3, [r7, #3] pdev->dev_speed = speed; 8006fb0: 687b ldr r3, [r7, #4] 8006fb2: 78fa ldrb r2, [r7, #3] 8006fb4: 741a strb r2, [r3, #16] return USBD_OK; 8006fb6: 2300 movs r3, #0 } 8006fb8: 4618 mov r0, r3 8006fba: 370c adds r7, #12 8006fbc: 46bd mov sp, r7 8006fbe: f85d 7b04 ldr.w r7, [sp], #4 8006fc2: 4770 bx lr 08006fc4 : * Handle Suspend event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) { 8006fc4: b480 push {r7} 8006fc6: b083 sub sp, #12 8006fc8: af00 add r7, sp, #0 8006fca: 6078 str r0, [r7, #4] if (pdev->dev_state != USBD_STATE_SUSPENDED) 8006fcc: 687b ldr r3, [r7, #4] 8006fce: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8006fd2: b2db uxtb r3, r3 8006fd4: 2b04 cmp r3, #4 8006fd6: d006 beq.n 8006fe6 { pdev->dev_old_state = pdev->dev_state; 8006fd8: 687b ldr r3, [r7, #4] 8006fda: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8006fde: b2da uxtb r2, r3 8006fe0: 687b ldr r3, [r7, #4] 8006fe2: f883 229d strb.w r2, [r3, #669] @ 0x29d } pdev->dev_state = USBD_STATE_SUSPENDED; 8006fe6: 687b ldr r3, [r7, #4] 8006fe8: 2204 movs r2, #4 8006fea: f883 229c strb.w r2, [r3, #668] @ 0x29c return USBD_OK; 8006fee: 2300 movs r3, #0 } 8006ff0: 4618 mov r0, r3 8006ff2: 370c adds r7, #12 8006ff4: 46bd mov sp, r7 8006ff6: f85d 7b04 ldr.w r7, [sp], #4 8006ffa: 4770 bx lr 08006ffc : * Handle Resume event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) { 8006ffc: b480 push {r7} 8006ffe: b083 sub sp, #12 8007000: af00 add r7, sp, #0 8007002: 6078 str r0, [r7, #4] if (pdev->dev_state == USBD_STATE_SUSPENDED) 8007004: 687b ldr r3, [r7, #4] 8007006: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800700a: b2db uxtb r3, r3 800700c: 2b04 cmp r3, #4 800700e: d106 bne.n 800701e { pdev->dev_state = pdev->dev_old_state; 8007010: 687b ldr r3, [r7, #4] 8007012: f893 329d ldrb.w r3, [r3, #669] @ 0x29d 8007016: b2da uxtb r2, r3 8007018: 687b ldr r3, [r7, #4] 800701a: f883 229c strb.w r2, [r3, #668] @ 0x29c } return USBD_OK; 800701e: 2300 movs r3, #0 } 8007020: 4618 mov r0, r3 8007022: 370c adds r7, #12 8007024: 46bd mov sp, r7 8007026: f85d 7b04 ldr.w r7, [sp], #4 800702a: 4770 bx lr 0800702c : * Handle SOF event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) { 800702c: b580 push {r7, lr} 800702e: b082 sub sp, #8 8007030: af00 add r7, sp, #0 8007032: 6078 str r0, [r7, #4] /* The SOF event can be distributed for all classes that support it */ if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007034: 687b ldr r3, [r7, #4] 8007036: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 800703a: b2db uxtb r3, r3 800703c: 2b03 cmp r3, #3 800703e: d110 bne.n 8007062 } } } } #else if (pdev->pClass[0] != NULL) 8007040: 687b ldr r3, [r7, #4] 8007042: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007046: 2b00 cmp r3, #0 8007048: d00b beq.n 8007062 { if (pdev->pClass[0]->SOF != NULL) 800704a: 687b ldr r3, [r7, #4] 800704c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007050: 69db ldr r3, [r3, #28] 8007052: 2b00 cmp r3, #0 8007054: d005 beq.n 8007062 { (void)pdev->pClass[0]->SOF(pdev); 8007056: 687b ldr r3, [r7, #4] 8007058: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800705c: 69db ldr r3, [r3, #28] 800705e: 6878 ldr r0, [r7, #4] 8007060: 4798 blx r3 } } #endif /* USE_USBD_COMPOSITE */ } return USBD_OK; 8007062: 2300 movs r3, #0 } 8007064: 4618 mov r0, r3 8007066: 3708 adds r7, #8 8007068: 46bd mov sp, r7 800706a: bd80 pop {r7, pc} 0800706c : * @param epnum: Endpoint number * @retval status */ USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) { 800706c: b580 push {r7, lr} 800706e: b082 sub sp, #8 8007070: af00 add r7, sp, #0 8007072: 6078 str r0, [r7, #4] 8007074: 460b mov r3, r1 8007076: 70fb strb r3, [r7, #3] if (pdev->pClass[pdev->classId] == NULL) 8007078: 687b ldr r3, [r7, #4] 800707a: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 800707e: 687b ldr r3, [r7, #4] 8007080: 32ae adds r2, #174 @ 0xae 8007082: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007086: 2b00 cmp r3, #0 8007088: d101 bne.n 800708e { return USBD_FAIL; 800708a: 2303 movs r3, #3 800708c: e01c b.n 80070c8 } if (pdev->dev_state == USBD_STATE_CONFIGURED) 800708e: 687b ldr r3, [r7, #4] 8007090: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007094: b2db uxtb r3, r3 8007096: 2b03 cmp r3, #3 8007098: d115 bne.n 80070c6 { if (pdev->pClass[pdev->classId]->IsoINIncomplete != NULL) 800709a: 687b ldr r3, [r7, #4] 800709c: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80070a0: 687b ldr r3, [r7, #4] 80070a2: 32ae adds r2, #174 @ 0xae 80070a4: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80070a8: 6a1b ldr r3, [r3, #32] 80070aa: 2b00 cmp r3, #0 80070ac: d00b beq.n 80070c6 { (void)pdev->pClass[pdev->classId]->IsoINIncomplete(pdev, epnum); 80070ae: 687b ldr r3, [r7, #4] 80070b0: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80070b4: 687b ldr r3, [r7, #4] 80070b6: 32ae adds r2, #174 @ 0xae 80070b8: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80070bc: 6a1b ldr r3, [r3, #32] 80070be: 78fa ldrb r2, [r7, #3] 80070c0: 4611 mov r1, r2 80070c2: 6878 ldr r0, [r7, #4] 80070c4: 4798 blx r3 } } return USBD_OK; 80070c6: 2300 movs r3, #0 } 80070c8: 4618 mov r0, r3 80070ca: 3708 adds r7, #8 80070cc: 46bd mov sp, r7 80070ce: bd80 pop {r7, pc} 080070d0 : * @param epnum: Endpoint number * @retval status */ USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) { 80070d0: b580 push {r7, lr} 80070d2: b082 sub sp, #8 80070d4: af00 add r7, sp, #0 80070d6: 6078 str r0, [r7, #4] 80070d8: 460b mov r3, r1 80070da: 70fb strb r3, [r7, #3] if (pdev->pClass[pdev->classId] == NULL) 80070dc: 687b ldr r3, [r7, #4] 80070de: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80070e2: 687b ldr r3, [r7, #4] 80070e4: 32ae adds r2, #174 @ 0xae 80070e6: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80070ea: 2b00 cmp r3, #0 80070ec: d101 bne.n 80070f2 { return USBD_FAIL; 80070ee: 2303 movs r3, #3 80070f0: e01c b.n 800712c } if (pdev->dev_state == USBD_STATE_CONFIGURED) 80070f2: 687b ldr r3, [r7, #4] 80070f4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80070f8: b2db uxtb r3, r3 80070fa: 2b03 cmp r3, #3 80070fc: d115 bne.n 800712a { if (pdev->pClass[pdev->classId]->IsoOUTIncomplete != NULL) 80070fe: 687b ldr r3, [r7, #4] 8007100: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8007104: 687b ldr r3, [r7, #4] 8007106: 32ae adds r2, #174 @ 0xae 8007108: f853 3022 ldr.w r3, [r3, r2, lsl #2] 800710c: 6a5b ldr r3, [r3, #36] @ 0x24 800710e: 2b00 cmp r3, #0 8007110: d00b beq.n 800712a { (void)pdev->pClass[pdev->classId]->IsoOUTIncomplete(pdev, epnum); 8007112: 687b ldr r3, [r7, #4] 8007114: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 8007118: 687b ldr r3, [r7, #4] 800711a: 32ae adds r2, #174 @ 0xae 800711c: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007120: 6a5b ldr r3, [r3, #36] @ 0x24 8007122: 78fa ldrb r2, [r7, #3] 8007124: 4611 mov r1, r2 8007126: 6878 ldr r0, [r7, #4] 8007128: 4798 blx r3 } } return USBD_OK; 800712a: 2300 movs r3, #0 } 800712c: 4618 mov r0, r3 800712e: 3708 adds r7, #8 8007130: 46bd mov sp, r7 8007132: bd80 pop {r7, pc} 08007134 : * Handle device connection event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev) { 8007134: b480 push {r7} 8007136: b083 sub sp, #12 8007138: af00 add r7, sp, #0 800713a: 6078 str r0, [r7, #4] /* Prevent unused argument compilation warning */ UNUSED(pdev); return USBD_OK; 800713c: 2300 movs r3, #0 } 800713e: 4618 mov r0, r3 8007140: 370c adds r7, #12 8007142: 46bd mov sp, r7 8007144: f85d 7b04 ldr.w r7, [sp], #4 8007148: 4770 bx lr 0800714a : * Handle device disconnection event * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev) { 800714a: b580 push {r7, lr} 800714c: b084 sub sp, #16 800714e: af00 add r7, sp, #0 8007150: 6078 str r0, [r7, #4] USBD_StatusTypeDef ret = USBD_OK; 8007152: 2300 movs r3, #0 8007154: 73fb strb r3, [r7, #15] /* Free Class Resources */ pdev->dev_state = USBD_STATE_DEFAULT; 8007156: 687b ldr r3, [r7, #4] 8007158: 2201 movs r2, #1 800715a: f883 229c strb.w r2, [r3, #668] @ 0x29c } } } } #else if (pdev->pClass[0] != NULL) 800715e: 687b ldr r3, [r7, #4] 8007160: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007164: 2b00 cmp r3, #0 8007166: d00e beq.n 8007186 { if (pdev->pClass[0]->DeInit(pdev, (uint8_t)pdev->dev_config) != 0U) 8007168: 687b ldr r3, [r7, #4] 800716a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800716e: 685b ldr r3, [r3, #4] 8007170: 687a ldr r2, [r7, #4] 8007172: 6852 ldr r2, [r2, #4] 8007174: b2d2 uxtb r2, r2 8007176: 4611 mov r1, r2 8007178: 6878 ldr r0, [r7, #4] 800717a: 4798 blx r3 800717c: 4603 mov r3, r0 800717e: 2b00 cmp r3, #0 8007180: d001 beq.n 8007186 { ret = USBD_FAIL; 8007182: 2303 movs r3, #3 8007184: 73fb strb r3, [r7, #15] } } #endif /* USE_USBD_COMPOSITE */ return ret; 8007186: 7bfb ldrb r3, [r7, #15] } 8007188: 4618 mov r0, r3 800718a: 3710 adds r7, #16 800718c: 46bd mov sp, r7 800718e: bd80 pop {r7, pc} 08007190 : * @param pdev: device instance * @param index : selected interface number * @retval index of the class using the selected interface number. OxFF if no class found. */ uint8_t USBD_CoreFindIF(USBD_HandleTypeDef *pdev, uint8_t index) { 8007190: b480 push {r7} 8007192: b083 sub sp, #12 8007194: af00 add r7, sp, #0 8007196: 6078 str r0, [r7, #4] 8007198: 460b mov r3, r1 800719a: 70fb strb r3, [r7, #3] return 0xFFU; #else UNUSED(pdev); UNUSED(index); return 0x00U; 800719c: 2300 movs r3, #0 #endif /* USE_USBD_COMPOSITE */ } 800719e: 4618 mov r0, r3 80071a0: 370c adds r7, #12 80071a2: 46bd mov sp, r7 80071a4: f85d 7b04 ldr.w r7, [sp], #4 80071a8: 4770 bx lr 080071aa : * @param pdev: device instance * @param index : selected endpoint number * @retval index of the class using the selected endpoint number. 0xFF if no class found. */ uint8_t USBD_CoreFindEP(USBD_HandleTypeDef *pdev, uint8_t index) { 80071aa: b480 push {r7} 80071ac: b083 sub sp, #12 80071ae: af00 add r7, sp, #0 80071b0: 6078 str r0, [r7, #4] 80071b2: 460b mov r3, r1 80071b4: 70fb strb r3, [r7, #3] return 0xFFU; #else UNUSED(pdev); UNUSED(index); return 0x00U; 80071b6: 2300 movs r3, #0 #endif /* USE_USBD_COMPOSITE */ } 80071b8: 4618 mov r0, r3 80071ba: 370c adds r7, #12 80071bc: 46bd mov sp, r7 80071be: f85d 7b04 ldr.w r7, [sp], #4 80071c2: 4770 bx lr 080071c4 : * @param pConfDesc: pointer to Bos descriptor * @param EpAddr: endpoint address * @retval pointer to video endpoint descriptor */ void *USBD_GetEpDesc(uint8_t *pConfDesc, uint8_t EpAddr) { 80071c4: b580 push {r7, lr} 80071c6: b086 sub sp, #24 80071c8: af00 add r7, sp, #0 80071ca: 6078 str r0, [r7, #4] 80071cc: 460b mov r3, r1 80071ce: 70fb strb r3, [r7, #3] USBD_DescHeaderTypeDef *pdesc = (USBD_DescHeaderTypeDef *)(void *)pConfDesc; 80071d0: 687b ldr r3, [r7, #4] 80071d2: 617b str r3, [r7, #20] USBD_ConfigDescTypeDef *desc = (USBD_ConfigDescTypeDef *)(void *)pConfDesc; 80071d4: 687b ldr r3, [r7, #4] 80071d6: 60fb str r3, [r7, #12] USBD_EpDescTypeDef *pEpDesc = NULL; 80071d8: 2300 movs r3, #0 80071da: 613b str r3, [r7, #16] uint16_t ptr; if (desc->wTotalLength > desc->bLength) 80071dc: 68fb ldr r3, [r7, #12] 80071de: 885b ldrh r3, [r3, #2] 80071e0: b29b uxth r3, r3 80071e2: 68fa ldr r2, [r7, #12] 80071e4: 7812 ldrb r2, [r2, #0] 80071e6: 4293 cmp r3, r2 80071e8: d91f bls.n 800722a { ptr = desc->bLength; 80071ea: 68fb ldr r3, [r7, #12] 80071ec: 781b ldrb r3, [r3, #0] 80071ee: 817b strh r3, [r7, #10] while (ptr < desc->wTotalLength) 80071f0: e013 b.n 800721a { pdesc = USBD_GetNextDesc((uint8_t *)pdesc, &ptr); 80071f2: f107 030a add.w r3, r7, #10 80071f6: 4619 mov r1, r3 80071f8: 6978 ldr r0, [r7, #20] 80071fa: f000 f81b bl 8007234 80071fe: 6178 str r0, [r7, #20] if (pdesc->bDescriptorType == USB_DESC_TYPE_ENDPOINT) 8007200: 697b ldr r3, [r7, #20] 8007202: 785b ldrb r3, [r3, #1] 8007204: 2b05 cmp r3, #5 8007206: d108 bne.n 800721a { pEpDesc = (USBD_EpDescTypeDef *)(void *)pdesc; 8007208: 697b ldr r3, [r7, #20] 800720a: 613b str r3, [r7, #16] if (pEpDesc->bEndpointAddress == EpAddr) 800720c: 693b ldr r3, [r7, #16] 800720e: 789b ldrb r3, [r3, #2] 8007210: 78fa ldrb r2, [r7, #3] 8007212: 429a cmp r2, r3 8007214: d008 beq.n 8007228 { break; } else { pEpDesc = NULL; 8007216: 2300 movs r3, #0 8007218: 613b str r3, [r7, #16] while (ptr < desc->wTotalLength) 800721a: 68fb ldr r3, [r7, #12] 800721c: 885b ldrh r3, [r3, #2] 800721e: b29a uxth r2, r3 8007220: 897b ldrh r3, [r7, #10] 8007222: 429a cmp r2, r3 8007224: d8e5 bhi.n 80071f2 8007226: e000 b.n 800722a break; 8007228: bf00 nop } } } } return (void *)pEpDesc; 800722a: 693b ldr r3, [r7, #16] } 800722c: 4618 mov r0, r3 800722e: 3718 adds r7, #24 8007230: 46bd mov sp, r7 8007232: bd80 pop {r7, pc} 08007234 : * @param buf: Buffer where the descriptor is available * @param ptr: data pointer inside the descriptor * @retval next header */ USBD_DescHeaderTypeDef *USBD_GetNextDesc(uint8_t *pbuf, uint16_t *ptr) { 8007234: b480 push {r7} 8007236: b085 sub sp, #20 8007238: af00 add r7, sp, #0 800723a: 6078 str r0, [r7, #4] 800723c: 6039 str r1, [r7, #0] USBD_DescHeaderTypeDef *pnext = (USBD_DescHeaderTypeDef *)(void *)pbuf; 800723e: 687b ldr r3, [r7, #4] 8007240: 60fb str r3, [r7, #12] *ptr += pnext->bLength; 8007242: 683b ldr r3, [r7, #0] 8007244: 881b ldrh r3, [r3, #0] 8007246: 68fa ldr r2, [r7, #12] 8007248: 7812 ldrb r2, [r2, #0] 800724a: 4413 add r3, r2 800724c: b29a uxth r2, r3 800724e: 683b ldr r3, [r7, #0] 8007250: 801a strh r2, [r3, #0] pnext = (USBD_DescHeaderTypeDef *)(void *)(pbuf + pnext->bLength); 8007252: 68fb ldr r3, [r7, #12] 8007254: 781b ldrb r3, [r3, #0] 8007256: 461a mov r2, r3 8007258: 687b ldr r3, [r7, #4] 800725a: 4413 add r3, r2 800725c: 60fb str r3, [r7, #12] return (pnext); 800725e: 68fb ldr r3, [r7, #12] } 8007260: 4618 mov r0, r3 8007262: 3714 adds r7, #20 8007264: 46bd mov sp, r7 8007266: f85d 7b04 ldr.w r7, [sp], #4 800726a: 4770 bx lr 0800726c : /** @defgroup USBD_DEF_Exported_Macros * @{ */ __STATIC_INLINE uint16_t SWAPBYTE(uint8_t *addr) { 800726c: b480 push {r7} 800726e: b087 sub sp, #28 8007270: af00 add r7, sp, #0 8007272: 6078 str r0, [r7, #4] uint16_t _SwapVal; uint16_t _Byte1; uint16_t _Byte2; uint8_t *_pbuff = addr; 8007274: 687b ldr r3, [r7, #4] 8007276: 617b str r3, [r7, #20] _Byte1 = *(uint8_t *)_pbuff; 8007278: 697b ldr r3, [r7, #20] 800727a: 781b ldrb r3, [r3, #0] 800727c: 827b strh r3, [r7, #18] _pbuff++; 800727e: 697b ldr r3, [r7, #20] 8007280: 3301 adds r3, #1 8007282: 617b str r3, [r7, #20] _Byte2 = *(uint8_t *)_pbuff; 8007284: 697b ldr r3, [r7, #20] 8007286: 781b ldrb r3, [r3, #0] 8007288: 823b strh r3, [r7, #16] _SwapVal = (_Byte2 << 8) | _Byte1; 800728a: f9b7 3010 ldrsh.w r3, [r7, #16] 800728e: 021b lsls r3, r3, #8 8007290: b21a sxth r2, r3 8007292: f9b7 3012 ldrsh.w r3, [r7, #18] 8007296: 4313 orrs r3, r2 8007298: b21b sxth r3, r3 800729a: 81fb strh r3, [r7, #14] return _SwapVal; 800729c: 89fb ldrh r3, [r7, #14] } 800729e: 4618 mov r0, r3 80072a0: 371c adds r7, #28 80072a2: 46bd mov sp, r7 80072a4: f85d 7b04 ldr.w r7, [sp], #4 80072a8: 4770 bx lr ... 080072ac : * @param pdev: device instance * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 80072ac: b580 push {r7, lr} 80072ae: b084 sub sp, #16 80072b0: af00 add r7, sp, #0 80072b2: 6078 str r0, [r7, #4] 80072b4: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 80072b6: 2300 movs r3, #0 80072b8: 73fb strb r3, [r7, #15] switch (req->bmRequest & USB_REQ_TYPE_MASK) 80072ba: 683b ldr r3, [r7, #0] 80072bc: 781b ldrb r3, [r3, #0] 80072be: f003 0360 and.w r3, r3, #96 @ 0x60 80072c2: 2b40 cmp r3, #64 @ 0x40 80072c4: d005 beq.n 80072d2 80072c6: 2b40 cmp r3, #64 @ 0x40 80072c8: d857 bhi.n 800737a 80072ca: 2b00 cmp r3, #0 80072cc: d00f beq.n 80072ee 80072ce: 2b20 cmp r3, #32 80072d0: d153 bne.n 800737a { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: ret = (USBD_StatusTypeDef)pdev->pClass[pdev->classId]->Setup(pdev, req); 80072d2: 687b ldr r3, [r7, #4] 80072d4: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4 80072d8: 687b ldr r3, [r7, #4] 80072da: 32ae adds r2, #174 @ 0xae 80072dc: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80072e0: 689b ldr r3, [r3, #8] 80072e2: 6839 ldr r1, [r7, #0] 80072e4: 6878 ldr r0, [r7, #4] 80072e6: 4798 blx r3 80072e8: 4603 mov r3, r0 80072ea: 73fb strb r3, [r7, #15] break; 80072ec: e04a b.n 8007384 case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 80072ee: 683b ldr r3, [r7, #0] 80072f0: 785b ldrb r3, [r3, #1] 80072f2: 2b09 cmp r3, #9 80072f4: d83b bhi.n 800736e 80072f6: a201 add r2, pc, #4 @ (adr r2, 80072fc ) 80072f8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80072fc: 08007351 .word 0x08007351 8007300: 08007365 .word 0x08007365 8007304: 0800736f .word 0x0800736f 8007308: 0800735b .word 0x0800735b 800730c: 0800736f .word 0x0800736f 8007310: 0800732f .word 0x0800732f 8007314: 08007325 .word 0x08007325 8007318: 0800736f .word 0x0800736f 800731c: 08007347 .word 0x08007347 8007320: 08007339 .word 0x08007339 { case USB_REQ_GET_DESCRIPTOR: USBD_GetDescriptor(pdev, req); 8007324: 6839 ldr r1, [r7, #0] 8007326: 6878 ldr r0, [r7, #4] 8007328: f000 fa3e bl 80077a8 break; 800732c: e024 b.n 8007378 case USB_REQ_SET_ADDRESS: USBD_SetAddress(pdev, req); 800732e: 6839 ldr r1, [r7, #0] 8007330: 6878 ldr r0, [r7, #4] 8007332: f000 fbcd bl 8007ad0 break; 8007336: e01f b.n 8007378 case USB_REQ_SET_CONFIGURATION: ret = USBD_SetConfig(pdev, req); 8007338: 6839 ldr r1, [r7, #0] 800733a: 6878 ldr r0, [r7, #4] 800733c: f000 fc0c bl 8007b58 8007340: 4603 mov r3, r0 8007342: 73fb strb r3, [r7, #15] break; 8007344: e018 b.n 8007378 case USB_REQ_GET_CONFIGURATION: USBD_GetConfig(pdev, req); 8007346: 6839 ldr r1, [r7, #0] 8007348: 6878 ldr r0, [r7, #4] 800734a: f000 fcaf bl 8007cac break; 800734e: e013 b.n 8007378 case USB_REQ_GET_STATUS: USBD_GetStatus(pdev, req); 8007350: 6839 ldr r1, [r7, #0] 8007352: 6878 ldr r0, [r7, #4] 8007354: f000 fce0 bl 8007d18 break; 8007358: e00e b.n 8007378 case USB_REQ_SET_FEATURE: USBD_SetFeature(pdev, req); 800735a: 6839 ldr r1, [r7, #0] 800735c: 6878 ldr r0, [r7, #4] 800735e: f000 fd0f bl 8007d80 break; 8007362: e009 b.n 8007378 case USB_REQ_CLEAR_FEATURE: USBD_ClrFeature(pdev, req); 8007364: 6839 ldr r1, [r7, #0] 8007366: 6878 ldr r0, [r7, #4] 8007368: f000 fd33 bl 8007dd2 break; 800736c: e004 b.n 8007378 default: USBD_CtlError(pdev, req); 800736e: 6839 ldr r1, [r7, #0] 8007370: 6878 ldr r0, [r7, #4] 8007372: f000 fd8a bl 8007e8a break; 8007376: bf00 nop } break; 8007378: e004 b.n 8007384 default: USBD_CtlError(pdev, req); 800737a: 6839 ldr r1, [r7, #0] 800737c: 6878 ldr r0, [r7, #4] 800737e: f000 fd84 bl 8007e8a break; 8007382: bf00 nop } return ret; 8007384: 7bfb ldrb r3, [r7, #15] } 8007386: 4618 mov r0, r3 8007388: 3710 adds r7, #16 800738a: 46bd mov sp, r7 800738c: bd80 pop {r7, pc} 800738e: bf00 nop 08007390 : * @param pdev: device instance * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007390: b580 push {r7, lr} 8007392: b084 sub sp, #16 8007394: af00 add r7, sp, #0 8007396: 6078 str r0, [r7, #4] 8007398: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 800739a: 2300 movs r3, #0 800739c: 73fb strb r3, [r7, #15] uint8_t idx; switch (req->bmRequest & USB_REQ_TYPE_MASK) 800739e: 683b ldr r3, [r7, #0] 80073a0: 781b ldrb r3, [r3, #0] 80073a2: f003 0360 and.w r3, r3, #96 @ 0x60 80073a6: 2b40 cmp r3, #64 @ 0x40 80073a8: d005 beq.n 80073b6 80073aa: 2b40 cmp r3, #64 @ 0x40 80073ac: d852 bhi.n 8007454 80073ae: 2b00 cmp r3, #0 80073b0: d001 beq.n 80073b6 80073b2: 2b20 cmp r3, #32 80073b4: d14e bne.n 8007454 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: case USB_REQ_TYPE_STANDARD: switch (pdev->dev_state) 80073b6: 687b ldr r3, [r7, #4] 80073b8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 80073bc: b2db uxtb r3, r3 80073be: 3b01 subs r3, #1 80073c0: 2b02 cmp r3, #2 80073c2: d840 bhi.n 8007446 { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) 80073c4: 683b ldr r3, [r7, #0] 80073c6: 889b ldrh r3, [r3, #4] 80073c8: b2db uxtb r3, r3 80073ca: 2b01 cmp r3, #1 80073cc: d836 bhi.n 800743c { /* Get the class index relative to this interface */ idx = USBD_CoreFindIF(pdev, LOBYTE(req->wIndex)); 80073ce: 683b ldr r3, [r7, #0] 80073d0: 889b ldrh r3, [r3, #4] 80073d2: b2db uxtb r3, r3 80073d4: 4619 mov r1, r3 80073d6: 6878 ldr r0, [r7, #4] 80073d8: f7ff feda bl 8007190 80073dc: 4603 mov r3, r0 80073de: 73bb strb r3, [r7, #14] if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS)) 80073e0: 7bbb ldrb r3, [r7, #14] 80073e2: 2bff cmp r3, #255 @ 0xff 80073e4: d01d beq.n 8007422 80073e6: 7bbb ldrb r3, [r7, #14] 80073e8: 2b00 cmp r3, #0 80073ea: d11a bne.n 8007422 { /* Call the class data out function to manage the request */ if (pdev->pClass[idx]->Setup != NULL) 80073ec: 7bba ldrb r2, [r7, #14] 80073ee: 687b ldr r3, [r7, #4] 80073f0: 32ae adds r2, #174 @ 0xae 80073f2: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80073f6: 689b ldr r3, [r3, #8] 80073f8: 2b00 cmp r3, #0 80073fa: d00f beq.n 800741c { pdev->classId = idx; 80073fc: 7bba ldrb r2, [r7, #14] 80073fe: 687b ldr r3, [r7, #4] 8007400: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 ret = (USBD_StatusTypeDef)(pdev->pClass[idx]->Setup(pdev, req)); 8007404: 7bba ldrb r2, [r7, #14] 8007406: 687b ldr r3, [r7, #4] 8007408: 32ae adds r2, #174 @ 0xae 800740a: f853 3022 ldr.w r3, [r3, r2, lsl #2] 800740e: 689b ldr r3, [r3, #8] 8007410: 6839 ldr r1, [r7, #0] 8007412: 6878 ldr r0, [r7, #4] 8007414: 4798 blx r3 8007416: 4603 mov r3, r0 8007418: 73fb strb r3, [r7, #15] if (pdev->pClass[idx]->Setup != NULL) 800741a: e004 b.n 8007426 } else { /* should never reach this condition */ ret = USBD_FAIL; 800741c: 2303 movs r3, #3 800741e: 73fb strb r3, [r7, #15] if (pdev->pClass[idx]->Setup != NULL) 8007420: e001 b.n 8007426 } } else { /* No relative interface found */ ret = USBD_FAIL; 8007422: 2303 movs r3, #3 8007424: 73fb strb r3, [r7, #15] } if ((req->wLength == 0U) && (ret == USBD_OK)) 8007426: 683b ldr r3, [r7, #0] 8007428: 88db ldrh r3, [r3, #6] 800742a: 2b00 cmp r3, #0 800742c: d110 bne.n 8007450 800742e: 7bfb ldrb r3, [r7, #15] 8007430: 2b00 cmp r3, #0 8007432: d10d bne.n 8007450 { (void)USBD_CtlSendStatus(pdev); 8007434: 6878 ldr r0, [r7, #4] 8007436: f000 fde5 bl 8008004 } else { USBD_CtlError(pdev, req); } break; 800743a: e009 b.n 8007450 USBD_CtlError(pdev, req); 800743c: 6839 ldr r1, [r7, #0] 800743e: 6878 ldr r0, [r7, #4] 8007440: f000 fd23 bl 8007e8a break; 8007444: e004 b.n 8007450 default: USBD_CtlError(pdev, req); 8007446: 6839 ldr r1, [r7, #0] 8007448: 6878 ldr r0, [r7, #4] 800744a: f000 fd1e bl 8007e8a break; 800744e: e000 b.n 8007452 break; 8007450: bf00 nop } break; 8007452: e004 b.n 800745e default: USBD_CtlError(pdev, req); 8007454: 6839 ldr r1, [r7, #0] 8007456: 6878 ldr r0, [r7, #4] 8007458: f000 fd17 bl 8007e8a break; 800745c: bf00 nop } return ret; 800745e: 7bfb ldrb r3, [r7, #15] } 8007460: 4618 mov r0, r3 8007462: 3710 adds r7, #16 8007464: 46bd mov sp, r7 8007466: bd80 pop {r7, pc} 08007468 : * @param pdev: device instance * @param req: usb request * @retval status */ USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007468: b580 push {r7, lr} 800746a: b084 sub sp, #16 800746c: af00 add r7, sp, #0 800746e: 6078 str r0, [r7, #4] 8007470: 6039 str r1, [r7, #0] USBD_EndpointTypeDef *pep; uint8_t ep_addr; uint8_t idx; USBD_StatusTypeDef ret = USBD_OK; 8007472: 2300 movs r3, #0 8007474: 73fb strb r3, [r7, #15] ep_addr = LOBYTE(req->wIndex); 8007476: 683b ldr r3, [r7, #0] 8007478: 889b ldrh r3, [r3, #4] 800747a: 73bb strb r3, [r7, #14] switch (req->bmRequest & USB_REQ_TYPE_MASK) 800747c: 683b ldr r3, [r7, #0] 800747e: 781b ldrb r3, [r3, #0] 8007480: f003 0360 and.w r3, r3, #96 @ 0x60 8007484: 2b40 cmp r3, #64 @ 0x40 8007486: d007 beq.n 8007498 8007488: 2b40 cmp r3, #64 @ 0x40 800748a: f200 8181 bhi.w 8007790 800748e: 2b00 cmp r3, #0 8007490: d02a beq.n 80074e8 8007492: 2b20 cmp r3, #32 8007494: f040 817c bne.w 8007790 { case USB_REQ_TYPE_CLASS: case USB_REQ_TYPE_VENDOR: /* Get the class index relative to this endpoint */ idx = USBD_CoreFindEP(pdev, ep_addr); 8007498: 7bbb ldrb r3, [r7, #14] 800749a: 4619 mov r1, r3 800749c: 6878 ldr r0, [r7, #4] 800749e: f7ff fe84 bl 80071aa 80074a2: 4603 mov r3, r0 80074a4: 737b strb r3, [r7, #13] if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS)) 80074a6: 7b7b ldrb r3, [r7, #13] 80074a8: 2bff cmp r3, #255 @ 0xff 80074aa: f000 8176 beq.w 800779a 80074ae: 7b7b ldrb r3, [r7, #13] 80074b0: 2b00 cmp r3, #0 80074b2: f040 8172 bne.w 800779a { pdev->classId = idx; 80074b6: 7b7a ldrb r2, [r7, #13] 80074b8: 687b ldr r3, [r7, #4] 80074ba: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 /* Call the class data out function to manage the request */ if (pdev->pClass[idx]->Setup != NULL) 80074be: 7b7a ldrb r2, [r7, #13] 80074c0: 687b ldr r3, [r7, #4] 80074c2: 32ae adds r2, #174 @ 0xae 80074c4: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80074c8: 689b ldr r3, [r3, #8] 80074ca: 2b00 cmp r3, #0 80074cc: f000 8165 beq.w 800779a { ret = (USBD_StatusTypeDef)pdev->pClass[idx]->Setup(pdev, req); 80074d0: 7b7a ldrb r2, [r7, #13] 80074d2: 687b ldr r3, [r7, #4] 80074d4: 32ae adds r2, #174 @ 0xae 80074d6: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80074da: 689b ldr r3, [r3, #8] 80074dc: 6839 ldr r1, [r7, #0] 80074de: 6878 ldr r0, [r7, #4] 80074e0: 4798 blx r3 80074e2: 4603 mov r3, r0 80074e4: 73fb strb r3, [r7, #15] } } break; 80074e6: e158 b.n 800779a case USB_REQ_TYPE_STANDARD: switch (req->bRequest) 80074e8: 683b ldr r3, [r7, #0] 80074ea: 785b ldrb r3, [r3, #1] 80074ec: 2b03 cmp r3, #3 80074ee: d008 beq.n 8007502 80074f0: 2b03 cmp r3, #3 80074f2: f300 8147 bgt.w 8007784 80074f6: 2b00 cmp r3, #0 80074f8: f000 809b beq.w 8007632 80074fc: 2b01 cmp r3, #1 80074fe: d03c beq.n 800757a 8007500: e140 b.n 8007784 { case USB_REQ_SET_FEATURE: switch (pdev->dev_state) 8007502: 687b ldr r3, [r7, #4] 8007504: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007508: b2db uxtb r3, r3 800750a: 2b02 cmp r3, #2 800750c: d002 beq.n 8007514 800750e: 2b03 cmp r3, #3 8007510: d016 beq.n 8007540 8007512: e02c b.n 800756e { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 8007514: 7bbb ldrb r3, [r7, #14] 8007516: 2b00 cmp r3, #0 8007518: d00d beq.n 8007536 800751a: 7bbb ldrb r3, [r7, #14] 800751c: 2b80 cmp r3, #128 @ 0x80 800751e: d00a beq.n 8007536 { (void)USBD_LL_StallEP(pdev, ep_addr); 8007520: 7bbb ldrb r3, [r7, #14] 8007522: 4619 mov r1, r3 8007524: 6878 ldr r0, [r7, #4] 8007526: f001 f8e3 bl 80086f0 (void)USBD_LL_StallEP(pdev, 0x80U); 800752a: 2180 movs r1, #128 @ 0x80 800752c: 6878 ldr r0, [r7, #4] 800752e: f001 f8df bl 80086f0 8007532: bf00 nop } else { USBD_CtlError(pdev, req); } break; 8007534: e020 b.n 8007578 USBD_CtlError(pdev, req); 8007536: 6839 ldr r1, [r7, #0] 8007538: 6878 ldr r0, [r7, #4] 800753a: f000 fca6 bl 8007e8a break; 800753e: e01b b.n 8007578 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 8007540: 683b ldr r3, [r7, #0] 8007542: 885b ldrh r3, [r3, #2] 8007544: 2b00 cmp r3, #0 8007546: d10e bne.n 8007566 { if ((ep_addr != 0x00U) && (ep_addr != 0x80U) && (req->wLength == 0x00U)) 8007548: 7bbb ldrb r3, [r7, #14] 800754a: 2b00 cmp r3, #0 800754c: d00b beq.n 8007566 800754e: 7bbb ldrb r3, [r7, #14] 8007550: 2b80 cmp r3, #128 @ 0x80 8007552: d008 beq.n 8007566 8007554: 683b ldr r3, [r7, #0] 8007556: 88db ldrh r3, [r3, #6] 8007558: 2b00 cmp r3, #0 800755a: d104 bne.n 8007566 { (void)USBD_LL_StallEP(pdev, ep_addr); 800755c: 7bbb ldrb r3, [r7, #14] 800755e: 4619 mov r1, r3 8007560: 6878 ldr r0, [r7, #4] 8007562: f001 f8c5 bl 80086f0 } } (void)USBD_CtlSendStatus(pdev); 8007566: 6878 ldr r0, [r7, #4] 8007568: f000 fd4c bl 8008004 break; 800756c: e004 b.n 8007578 default: USBD_CtlError(pdev, req); 800756e: 6839 ldr r1, [r7, #0] 8007570: 6878 ldr r0, [r7, #4] 8007572: f000 fc8a bl 8007e8a break; 8007576: bf00 nop } break; 8007578: e109 b.n 800778e case USB_REQ_CLEAR_FEATURE: switch (pdev->dev_state) 800757a: 687b ldr r3, [r7, #4] 800757c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007580: b2db uxtb r3, r3 8007582: 2b02 cmp r3, #2 8007584: d002 beq.n 800758c 8007586: 2b03 cmp r3, #3 8007588: d016 beq.n 80075b8 800758a: e04b b.n 8007624 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 800758c: 7bbb ldrb r3, [r7, #14] 800758e: 2b00 cmp r3, #0 8007590: d00d beq.n 80075ae 8007592: 7bbb ldrb r3, [r7, #14] 8007594: 2b80 cmp r3, #128 @ 0x80 8007596: d00a beq.n 80075ae { (void)USBD_LL_StallEP(pdev, ep_addr); 8007598: 7bbb ldrb r3, [r7, #14] 800759a: 4619 mov r1, r3 800759c: 6878 ldr r0, [r7, #4] 800759e: f001 f8a7 bl 80086f0 (void)USBD_LL_StallEP(pdev, 0x80U); 80075a2: 2180 movs r1, #128 @ 0x80 80075a4: 6878 ldr r0, [r7, #4] 80075a6: f001 f8a3 bl 80086f0 80075aa: bf00 nop } else { USBD_CtlError(pdev, req); } break; 80075ac: e040 b.n 8007630 USBD_CtlError(pdev, req); 80075ae: 6839 ldr r1, [r7, #0] 80075b0: 6878 ldr r0, [r7, #4] 80075b2: f000 fc6a bl 8007e8a break; 80075b6: e03b b.n 8007630 case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_EP_HALT) 80075b8: 683b ldr r3, [r7, #0] 80075ba: 885b ldrh r3, [r3, #2] 80075bc: 2b00 cmp r3, #0 80075be: d136 bne.n 800762e { if ((ep_addr & 0x7FU) != 0x00U) 80075c0: 7bbb ldrb r3, [r7, #14] 80075c2: f003 037f and.w r3, r3, #127 @ 0x7f 80075c6: 2b00 cmp r3, #0 80075c8: d004 beq.n 80075d4 { (void)USBD_LL_ClearStallEP(pdev, ep_addr); 80075ca: 7bbb ldrb r3, [r7, #14] 80075cc: 4619 mov r1, r3 80075ce: 6878 ldr r0, [r7, #4] 80075d0: f001 f8ad bl 800872e } (void)USBD_CtlSendStatus(pdev); 80075d4: 6878 ldr r0, [r7, #4] 80075d6: f000 fd15 bl 8008004 /* Get the class index relative to this interface */ idx = USBD_CoreFindEP(pdev, ep_addr); 80075da: 7bbb ldrb r3, [r7, #14] 80075dc: 4619 mov r1, r3 80075de: 6878 ldr r0, [r7, #4] 80075e0: f7ff fde3 bl 80071aa 80075e4: 4603 mov r3, r0 80075e6: 737b strb r3, [r7, #13] if (((uint8_t)idx != 0xFFU) && (idx < USBD_MAX_SUPPORTED_CLASS)) 80075e8: 7b7b ldrb r3, [r7, #13] 80075ea: 2bff cmp r3, #255 @ 0xff 80075ec: d01f beq.n 800762e 80075ee: 7b7b ldrb r3, [r7, #13] 80075f0: 2b00 cmp r3, #0 80075f2: d11c bne.n 800762e { pdev->classId = idx; 80075f4: 7b7a ldrb r2, [r7, #13] 80075f6: 687b ldr r3, [r7, #4] 80075f8: f8c3 22d4 str.w r2, [r3, #724] @ 0x2d4 /* Call the class data out function to manage the request */ if (pdev->pClass[idx]->Setup != NULL) 80075fc: 7b7a ldrb r2, [r7, #13] 80075fe: 687b ldr r3, [r7, #4] 8007600: 32ae adds r2, #174 @ 0xae 8007602: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007606: 689b ldr r3, [r3, #8] 8007608: 2b00 cmp r3, #0 800760a: d010 beq.n 800762e { ret = (USBD_StatusTypeDef)(pdev->pClass[idx]->Setup(pdev, req)); 800760c: 7b7a ldrb r2, [r7, #13] 800760e: 687b ldr r3, [r7, #4] 8007610: 32ae adds r2, #174 @ 0xae 8007612: f853 3022 ldr.w r3, [r3, r2, lsl #2] 8007616: 689b ldr r3, [r3, #8] 8007618: 6839 ldr r1, [r7, #0] 800761a: 6878 ldr r0, [r7, #4] 800761c: 4798 blx r3 800761e: 4603 mov r3, r0 8007620: 73fb strb r3, [r7, #15] } } } break; 8007622: e004 b.n 800762e default: USBD_CtlError(pdev, req); 8007624: 6839 ldr r1, [r7, #0] 8007626: 6878 ldr r0, [r7, #4] 8007628: f000 fc2f bl 8007e8a break; 800762c: e000 b.n 8007630 break; 800762e: bf00 nop } break; 8007630: e0ad b.n 800778e case USB_REQ_GET_STATUS: switch (pdev->dev_state) 8007632: 687b ldr r3, [r7, #4] 8007634: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007638: b2db uxtb r3, r3 800763a: 2b02 cmp r3, #2 800763c: d002 beq.n 8007644 800763e: 2b03 cmp r3, #3 8007640: d033 beq.n 80076aa 8007642: e099 b.n 8007778 { case USBD_STATE_ADDRESSED: if ((ep_addr != 0x00U) && (ep_addr != 0x80U)) 8007644: 7bbb ldrb r3, [r7, #14] 8007646: 2b00 cmp r3, #0 8007648: d007 beq.n 800765a 800764a: 7bbb ldrb r3, [r7, #14] 800764c: 2b80 cmp r3, #128 @ 0x80 800764e: d004 beq.n 800765a { USBD_CtlError(pdev, req); 8007650: 6839 ldr r1, [r7, #0] 8007652: 6878 ldr r0, [r7, #4] 8007654: f000 fc19 bl 8007e8a break; 8007658: e093 b.n 8007782 } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 800765a: f997 300e ldrsb.w r3, [r7, #14] 800765e: 2b00 cmp r3, #0 8007660: da0b bge.n 800767a 8007662: 7bbb ldrb r3, [r7, #14] 8007664: f003 027f and.w r2, r3, #127 @ 0x7f 8007668: 4613 mov r3, r2 800766a: 009b lsls r3, r3, #2 800766c: 4413 add r3, r2 800766e: 009b lsls r3, r3, #2 8007670: 3310 adds r3, #16 8007672: 687a ldr r2, [r7, #4] 8007674: 4413 add r3, r2 8007676: 3304 adds r3, #4 8007678: e00b b.n 8007692 &pdev->ep_out[ep_addr & 0x7FU]; 800767a: 7bbb ldrb r3, [r7, #14] 800767c: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 8007680: 4613 mov r3, r2 8007682: 009b lsls r3, r3, #2 8007684: 4413 add r3, r2 8007686: 009b lsls r3, r3, #2 8007688: f503 73a8 add.w r3, r3, #336 @ 0x150 800768c: 687a ldr r2, [r7, #4] 800768e: 4413 add r3, r2 8007690: 3304 adds r3, #4 8007692: 60bb str r3, [r7, #8] pep->status = 0x0000U; 8007694: 68bb ldr r3, [r7, #8] 8007696: 2200 movs r2, #0 8007698: 739a strb r2, [r3, #14] (void)USBD_CtlSendData(pdev, (uint8_t *)&pep->status, 2U); 800769a: 68bb ldr r3, [r7, #8] 800769c: 330e adds r3, #14 800769e: 2202 movs r2, #2 80076a0: 4619 mov r1, r3 80076a2: 6878 ldr r0, [r7, #4] 80076a4: f000 fc6e bl 8007f84 break; 80076a8: e06b b.n 8007782 case USBD_STATE_CONFIGURED: if ((ep_addr & 0x80U) == 0x80U) 80076aa: f997 300e ldrsb.w r3, [r7, #14] 80076ae: 2b00 cmp r3, #0 80076b0: da11 bge.n 80076d6 { if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U) 80076b2: 7bbb ldrb r3, [r7, #14] 80076b4: f003 020f and.w r2, r3, #15 80076b8: 6879 ldr r1, [r7, #4] 80076ba: 4613 mov r3, r2 80076bc: 009b lsls r3, r3, #2 80076be: 4413 add r3, r2 80076c0: 009b lsls r3, r3, #2 80076c2: 440b add r3, r1 80076c4: 3323 adds r3, #35 @ 0x23 80076c6: 781b ldrb r3, [r3, #0] 80076c8: 2b00 cmp r3, #0 80076ca: d117 bne.n 80076fc { USBD_CtlError(pdev, req); 80076cc: 6839 ldr r1, [r7, #0] 80076ce: 6878 ldr r0, [r7, #4] 80076d0: f000 fbdb bl 8007e8a break; 80076d4: e055 b.n 8007782 } } else { if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U) 80076d6: 7bbb ldrb r3, [r7, #14] 80076d8: f003 020f and.w r2, r3, #15 80076dc: 6879 ldr r1, [r7, #4] 80076de: 4613 mov r3, r2 80076e0: 009b lsls r3, r3, #2 80076e2: 4413 add r3, r2 80076e4: 009b lsls r3, r3, #2 80076e6: 440b add r3, r1 80076e8: f203 1363 addw r3, r3, #355 @ 0x163 80076ec: 781b ldrb r3, [r3, #0] 80076ee: 2b00 cmp r3, #0 80076f0: d104 bne.n 80076fc { USBD_CtlError(pdev, req); 80076f2: 6839 ldr r1, [r7, #0] 80076f4: 6878 ldr r0, [r7, #4] 80076f6: f000 fbc8 bl 8007e8a break; 80076fa: e042 b.n 8007782 } } pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 80076fc: f997 300e ldrsb.w r3, [r7, #14] 8007700: 2b00 cmp r3, #0 8007702: da0b bge.n 800771c 8007704: 7bbb ldrb r3, [r7, #14] 8007706: f003 027f and.w r2, r3, #127 @ 0x7f 800770a: 4613 mov r3, r2 800770c: 009b lsls r3, r3, #2 800770e: 4413 add r3, r2 8007710: 009b lsls r3, r3, #2 8007712: 3310 adds r3, #16 8007714: 687a ldr r2, [r7, #4] 8007716: 4413 add r3, r2 8007718: 3304 adds r3, #4 800771a: e00b b.n 8007734 &pdev->ep_out[ep_addr & 0x7FU]; 800771c: 7bbb ldrb r3, [r7, #14] 800771e: f003 027f and.w r2, r3, #127 @ 0x7f pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \ 8007722: 4613 mov r3, r2 8007724: 009b lsls r3, r3, #2 8007726: 4413 add r3, r2 8007728: 009b lsls r3, r3, #2 800772a: f503 73a8 add.w r3, r3, #336 @ 0x150 800772e: 687a ldr r2, [r7, #4] 8007730: 4413 add r3, r2 8007732: 3304 adds r3, #4 8007734: 60bb str r3, [r7, #8] if ((ep_addr == 0x00U) || (ep_addr == 0x80U)) 8007736: 7bbb ldrb r3, [r7, #14] 8007738: 2b00 cmp r3, #0 800773a: d002 beq.n 8007742 800773c: 7bbb ldrb r3, [r7, #14] 800773e: 2b80 cmp r3, #128 @ 0x80 8007740: d103 bne.n 800774a { pep->status = 0x0000U; 8007742: 68bb ldr r3, [r7, #8] 8007744: 2200 movs r2, #0 8007746: 739a strb r2, [r3, #14] 8007748: e00e b.n 8007768 } else if (USBD_LL_IsStallEP(pdev, ep_addr) != 0U) 800774a: 7bbb ldrb r3, [r7, #14] 800774c: 4619 mov r1, r3 800774e: 6878 ldr r0, [r7, #4] 8007750: f001 f80c bl 800876c 8007754: 4603 mov r3, r0 8007756: 2b00 cmp r3, #0 8007758: d003 beq.n 8007762 { pep->status = 0x0001U; 800775a: 68bb ldr r3, [r7, #8] 800775c: 2201 movs r2, #1 800775e: 739a strb r2, [r3, #14] 8007760: e002 b.n 8007768 } else { pep->status = 0x0000U; 8007762: 68bb ldr r3, [r7, #8] 8007764: 2200 movs r2, #0 8007766: 739a strb r2, [r3, #14] } (void)USBD_CtlSendData(pdev, (uint8_t *)&pep->status, 2U); 8007768: 68bb ldr r3, [r7, #8] 800776a: 330e adds r3, #14 800776c: 2202 movs r2, #2 800776e: 4619 mov r1, r3 8007770: 6878 ldr r0, [r7, #4] 8007772: f000 fc07 bl 8007f84 break; 8007776: e004 b.n 8007782 default: USBD_CtlError(pdev, req); 8007778: 6839 ldr r1, [r7, #0] 800777a: 6878 ldr r0, [r7, #4] 800777c: f000 fb85 bl 8007e8a break; 8007780: bf00 nop } break; 8007782: e004 b.n 800778e default: USBD_CtlError(pdev, req); 8007784: 6839 ldr r1, [r7, #0] 8007786: 6878 ldr r0, [r7, #4] 8007788: f000 fb7f bl 8007e8a break; 800778c: bf00 nop } break; 800778e: e005 b.n 800779c default: USBD_CtlError(pdev, req); 8007790: 6839 ldr r1, [r7, #0] 8007792: 6878 ldr r0, [r7, #4] 8007794: f000 fb79 bl 8007e8a break; 8007798: e000 b.n 800779c break; 800779a: bf00 nop } return ret; 800779c: 7bfb ldrb r3, [r7, #15] } 800779e: 4618 mov r0, r3 80077a0: 3710 adds r7, #16 80077a2: 46bd mov sp, r7 80077a4: bd80 pop {r7, pc} ... 080077a8 : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 80077a8: b580 push {r7, lr} 80077aa: b084 sub sp, #16 80077ac: af00 add r7, sp, #0 80077ae: 6078 str r0, [r7, #4] 80077b0: 6039 str r1, [r7, #0] uint16_t len = 0U; 80077b2: 2300 movs r3, #0 80077b4: 813b strh r3, [r7, #8] uint8_t *pbuf = NULL; 80077b6: 2300 movs r3, #0 80077b8: 60fb str r3, [r7, #12] uint8_t err = 0U; 80077ba: 2300 movs r3, #0 80077bc: 72fb strb r3, [r7, #11] switch (req->wValue >> 8) 80077be: 683b ldr r3, [r7, #0] 80077c0: 885b ldrh r3, [r3, #2] 80077c2: 0a1b lsrs r3, r3, #8 80077c4: b29b uxth r3, r3 80077c6: 3b01 subs r3, #1 80077c8: 2b0e cmp r3, #14 80077ca: f200 8152 bhi.w 8007a72 80077ce: a201 add r2, pc, #4 @ (adr r2, 80077d4 ) 80077d0: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80077d4: 08007845 .word 0x08007845 80077d8: 0800785d .word 0x0800785d 80077dc: 0800789d .word 0x0800789d 80077e0: 08007a73 .word 0x08007a73 80077e4: 08007a73 .word 0x08007a73 80077e8: 08007a13 .word 0x08007a13 80077ec: 08007a3f .word 0x08007a3f 80077f0: 08007a73 .word 0x08007a73 80077f4: 08007a73 .word 0x08007a73 80077f8: 08007a73 .word 0x08007a73 80077fc: 08007a73 .word 0x08007a73 8007800: 08007a73 .word 0x08007a73 8007804: 08007a73 .word 0x08007a73 8007808: 08007a73 .word 0x08007a73 800780c: 08007811 .word 0x08007811 { #if ((USBD_LPM_ENABLED == 1U) || (USBD_CLASS_BOS_ENABLED == 1U)) case USB_DESC_TYPE_BOS: if (pdev->pDesc->GetBOSDescriptor != NULL) 8007810: 687b ldr r3, [r7, #4] 8007812: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8007816: 69db ldr r3, [r3, #28] 8007818: 2b00 cmp r3, #0 800781a: d00b beq.n 8007834 { pbuf = pdev->pDesc->GetBOSDescriptor(pdev->dev_speed, &len); 800781c: 687b ldr r3, [r7, #4] 800781e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8007822: 69db ldr r3, [r3, #28] 8007824: 687a ldr r2, [r7, #4] 8007826: 7c12 ldrb r2, [r2, #16] 8007828: f107 0108 add.w r1, r7, #8 800782c: 4610 mov r0, r2 800782e: 4798 blx r3 8007830: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 8007832: e126 b.n 8007a82 USBD_CtlError(pdev, req); 8007834: 6839 ldr r1, [r7, #0] 8007836: 6878 ldr r0, [r7, #4] 8007838: f000 fb27 bl 8007e8a err++; 800783c: 7afb ldrb r3, [r7, #11] 800783e: 3301 adds r3, #1 8007840: 72fb strb r3, [r7, #11] break; 8007842: e11e b.n 8007a82 #endif /* (USBD_LPM_ENABLED == 1U) || (USBD_CLASS_BOS_ENABLED == 1U) */ case USB_DESC_TYPE_DEVICE: pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); 8007844: 687b ldr r3, [r7, #4] 8007846: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800784a: 681b ldr r3, [r3, #0] 800784c: 687a ldr r2, [r7, #4] 800784e: 7c12 ldrb r2, [r2, #16] 8007850: f107 0108 add.w r1, r7, #8 8007854: 4610 mov r0, r2 8007856: 4798 blx r3 8007858: 60f8 str r0, [r7, #12] break; 800785a: e112 b.n 8007a82 case USB_DESC_TYPE_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 800785c: 687b ldr r3, [r7, #4] 800785e: 7c1b ldrb r3, [r3, #16] 8007860: 2b00 cmp r3, #0 8007862: d10d bne.n 8007880 pbuf = (uint8_t *)USBD_CMPSIT.GetHSConfigDescriptor(&len); } else #endif /* USE_USBD_COMPOSITE */ { pbuf = (uint8_t *)pdev->pClass[0]->GetHSConfigDescriptor(&len); 8007864: 687b ldr r3, [r7, #4] 8007866: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 800786a: 6a9b ldr r3, [r3, #40] @ 0x28 800786c: f107 0208 add.w r2, r7, #8 8007870: 4610 mov r0, r2 8007872: 4798 blx r3 8007874: 60f8 str r0, [r7, #12] } pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 8007876: 68fb ldr r3, [r7, #12] 8007878: 3301 adds r3, #1 800787a: 2202 movs r2, #2 800787c: 701a strb r2, [r3, #0] { pbuf = (uint8_t *)pdev->pClass[0]->GetFSConfigDescriptor(&len); } pbuf[1] = USB_DESC_TYPE_CONFIGURATION; } break; 800787e: e100 b.n 8007a82 pbuf = (uint8_t *)pdev->pClass[0]->GetFSConfigDescriptor(&len); 8007880: 687b ldr r3, [r7, #4] 8007882: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007886: 6adb ldr r3, [r3, #44] @ 0x2c 8007888: f107 0208 add.w r2, r7, #8 800788c: 4610 mov r0, r2 800788e: 4798 blx r3 8007890: 60f8 str r0, [r7, #12] pbuf[1] = USB_DESC_TYPE_CONFIGURATION; 8007892: 68fb ldr r3, [r7, #12] 8007894: 3301 adds r3, #1 8007896: 2202 movs r2, #2 8007898: 701a strb r2, [r3, #0] break; 800789a: e0f2 b.n 8007a82 case USB_DESC_TYPE_STRING: switch ((uint8_t)(req->wValue)) 800789c: 683b ldr r3, [r7, #0] 800789e: 885b ldrh r3, [r3, #2] 80078a0: b2db uxtb r3, r3 80078a2: 2b05 cmp r3, #5 80078a4: f200 80ac bhi.w 8007a00 80078a8: a201 add r2, pc, #4 @ (adr r2, 80078b0 ) 80078aa: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80078ae: bf00 nop 80078b0: 080078c9 .word 0x080078c9 80078b4: 080078fd .word 0x080078fd 80078b8: 08007931 .word 0x08007931 80078bc: 08007965 .word 0x08007965 80078c0: 08007999 .word 0x08007999 80078c4: 080079cd .word 0x080079cd { case USBD_IDX_LANGID_STR: if (pdev->pDesc->GetLangIDStrDescriptor != NULL) 80078c8: 687b ldr r3, [r7, #4] 80078ca: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80078ce: 685b ldr r3, [r3, #4] 80078d0: 2b00 cmp r3, #0 80078d2: d00b beq.n 80078ec { pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); 80078d4: 687b ldr r3, [r7, #4] 80078d6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80078da: 685b ldr r3, [r3, #4] 80078dc: 687a ldr r2, [r7, #4] 80078de: 7c12 ldrb r2, [r2, #16] 80078e0: f107 0108 add.w r1, r7, #8 80078e4: 4610 mov r0, r2 80078e6: 4798 blx r3 80078e8: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 80078ea: e091 b.n 8007a10 USBD_CtlError(pdev, req); 80078ec: 6839 ldr r1, [r7, #0] 80078ee: 6878 ldr r0, [r7, #4] 80078f0: f000 facb bl 8007e8a err++; 80078f4: 7afb ldrb r3, [r7, #11] 80078f6: 3301 adds r3, #1 80078f8: 72fb strb r3, [r7, #11] break; 80078fa: e089 b.n 8007a10 case USBD_IDX_MFC_STR: if (pdev->pDesc->GetManufacturerStrDescriptor != NULL) 80078fc: 687b ldr r3, [r7, #4] 80078fe: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8007902: 689b ldr r3, [r3, #8] 8007904: 2b00 cmp r3, #0 8007906: d00b beq.n 8007920 { pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); 8007908: 687b ldr r3, [r7, #4] 800790a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800790e: 689b ldr r3, [r3, #8] 8007910: 687a ldr r2, [r7, #4] 8007912: 7c12 ldrb r2, [r2, #16] 8007914: f107 0108 add.w r1, r7, #8 8007918: 4610 mov r0, r2 800791a: 4798 blx r3 800791c: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 800791e: e077 b.n 8007a10 USBD_CtlError(pdev, req); 8007920: 6839 ldr r1, [r7, #0] 8007922: 6878 ldr r0, [r7, #4] 8007924: f000 fab1 bl 8007e8a err++; 8007928: 7afb ldrb r3, [r7, #11] 800792a: 3301 adds r3, #1 800792c: 72fb strb r3, [r7, #11] break; 800792e: e06f b.n 8007a10 case USBD_IDX_PRODUCT_STR: if (pdev->pDesc->GetProductStrDescriptor != NULL) 8007930: 687b ldr r3, [r7, #4] 8007932: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8007936: 68db ldr r3, [r3, #12] 8007938: 2b00 cmp r3, #0 800793a: d00b beq.n 8007954 { pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); 800793c: 687b ldr r3, [r7, #4] 800793e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8007942: 68db ldr r3, [r3, #12] 8007944: 687a ldr r2, [r7, #4] 8007946: 7c12 ldrb r2, [r2, #16] 8007948: f107 0108 add.w r1, r7, #8 800794c: 4610 mov r0, r2 800794e: 4798 blx r3 8007950: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 8007952: e05d b.n 8007a10 USBD_CtlError(pdev, req); 8007954: 6839 ldr r1, [r7, #0] 8007956: 6878 ldr r0, [r7, #4] 8007958: f000 fa97 bl 8007e8a err++; 800795c: 7afb ldrb r3, [r7, #11] 800795e: 3301 adds r3, #1 8007960: 72fb strb r3, [r7, #11] break; 8007962: e055 b.n 8007a10 case USBD_IDX_SERIAL_STR: if (pdev->pDesc->GetSerialStrDescriptor != NULL) 8007964: 687b ldr r3, [r7, #4] 8007966: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800796a: 691b ldr r3, [r3, #16] 800796c: 2b00 cmp r3, #0 800796e: d00b beq.n 8007988 { pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); 8007970: 687b ldr r3, [r7, #4] 8007972: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 8007976: 691b ldr r3, [r3, #16] 8007978: 687a ldr r2, [r7, #4] 800797a: 7c12 ldrb r2, [r2, #16] 800797c: f107 0108 add.w r1, r7, #8 8007980: 4610 mov r0, r2 8007982: 4798 blx r3 8007984: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 8007986: e043 b.n 8007a10 USBD_CtlError(pdev, req); 8007988: 6839 ldr r1, [r7, #0] 800798a: 6878 ldr r0, [r7, #4] 800798c: f000 fa7d bl 8007e8a err++; 8007990: 7afb ldrb r3, [r7, #11] 8007992: 3301 adds r3, #1 8007994: 72fb strb r3, [r7, #11] break; 8007996: e03b b.n 8007a10 case USBD_IDX_CONFIG_STR: if (pdev->pDesc->GetConfigurationStrDescriptor != NULL) 8007998: 687b ldr r3, [r7, #4] 800799a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 800799e: 695b ldr r3, [r3, #20] 80079a0: 2b00 cmp r3, #0 80079a2: d00b beq.n 80079bc { pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); 80079a4: 687b ldr r3, [r7, #4] 80079a6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80079aa: 695b ldr r3, [r3, #20] 80079ac: 687a ldr r2, [r7, #4] 80079ae: 7c12 ldrb r2, [r2, #16] 80079b0: f107 0108 add.w r1, r7, #8 80079b4: 4610 mov r0, r2 80079b6: 4798 blx r3 80079b8: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 80079ba: e029 b.n 8007a10 USBD_CtlError(pdev, req); 80079bc: 6839 ldr r1, [r7, #0] 80079be: 6878 ldr r0, [r7, #4] 80079c0: f000 fa63 bl 8007e8a err++; 80079c4: 7afb ldrb r3, [r7, #11] 80079c6: 3301 adds r3, #1 80079c8: 72fb strb r3, [r7, #11] break; 80079ca: e021 b.n 8007a10 case USBD_IDX_INTERFACE_STR: if (pdev->pDesc->GetInterfaceStrDescriptor != NULL) 80079cc: 687b ldr r3, [r7, #4] 80079ce: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80079d2: 699b ldr r3, [r3, #24] 80079d4: 2b00 cmp r3, #0 80079d6: d00b beq.n 80079f0 { pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); 80079d8: 687b ldr r3, [r7, #4] 80079da: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4 80079de: 699b ldr r3, [r3, #24] 80079e0: 687a ldr r2, [r7, #4] 80079e2: 7c12 ldrb r2, [r2, #16] 80079e4: f107 0108 add.w r1, r7, #8 80079e8: 4610 mov r0, r2 80079ea: 4798 blx r3 80079ec: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 80079ee: e00f b.n 8007a10 USBD_CtlError(pdev, req); 80079f0: 6839 ldr r1, [r7, #0] 80079f2: 6878 ldr r0, [r7, #4] 80079f4: f000 fa49 bl 8007e8a err++; 80079f8: 7afb ldrb r3, [r7, #11] 80079fa: 3301 adds r3, #1 80079fc: 72fb strb r3, [r7, #11] break; 80079fe: e007 b.n 8007a10 err++; } #endif /* USBD_SUPPORT_USER_STRING_DESC */ #if ((USBD_CLASS_USER_STRING_DESC == 0U) && (USBD_SUPPORT_USER_STRING_DESC == 0U)) USBD_CtlError(pdev, req); 8007a00: 6839 ldr r1, [r7, #0] 8007a02: 6878 ldr r0, [r7, #4] 8007a04: f000 fa41 bl 8007e8a err++; 8007a08: 7afb ldrb r3, [r7, #11] 8007a0a: 3301 adds r3, #1 8007a0c: 72fb strb r3, [r7, #11] #endif /* (USBD_CLASS_USER_STRING_DESC == 0U) && (USBD_SUPPORT_USER_STRING_DESC == 0U) */ break; 8007a0e: bf00 nop } break; 8007a10: e037 b.n 8007a82 case USB_DESC_TYPE_DEVICE_QUALIFIER: if (pdev->dev_speed == USBD_SPEED_HIGH) 8007a12: 687b ldr r3, [r7, #4] 8007a14: 7c1b ldrb r3, [r3, #16] 8007a16: 2b00 cmp r3, #0 8007a18: d109 bne.n 8007a2e pbuf = (uint8_t *)USBD_CMPSIT.GetDeviceQualifierDescriptor(&len); } else #endif /* USE_USBD_COMPOSITE */ { pbuf = (uint8_t *)pdev->pClass[0]->GetDeviceQualifierDescriptor(&len); 8007a1a: 687b ldr r3, [r7, #4] 8007a1c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007a20: 6b5b ldr r3, [r3, #52] @ 0x34 8007a22: f107 0208 add.w r2, r7, #8 8007a26: 4610 mov r0, r2 8007a28: 4798 blx r3 8007a2a: 60f8 str r0, [r7, #12] else { USBD_CtlError(pdev, req); err++; } break; 8007a2c: e029 b.n 8007a82 USBD_CtlError(pdev, req); 8007a2e: 6839 ldr r1, [r7, #0] 8007a30: 6878 ldr r0, [r7, #4] 8007a32: f000 fa2a bl 8007e8a err++; 8007a36: 7afb ldrb r3, [r7, #11] 8007a38: 3301 adds r3, #1 8007a3a: 72fb strb r3, [r7, #11] break; 8007a3c: e021 b.n 8007a82 case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: if (pdev->dev_speed == USBD_SPEED_HIGH) 8007a3e: 687b ldr r3, [r7, #4] 8007a40: 7c1b ldrb r3, [r3, #16] 8007a42: 2b00 cmp r3, #0 8007a44: d10d bne.n 8007a62 pbuf = (uint8_t *)USBD_CMPSIT.GetOtherSpeedConfigDescriptor(&len); } else #endif /* USE_USBD_COMPOSITE */ { pbuf = (uint8_t *)pdev->pClass[0]->GetOtherSpeedConfigDescriptor(&len); 8007a46: 687b ldr r3, [r7, #4] 8007a48: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8 8007a4c: 6b1b ldr r3, [r3, #48] @ 0x30 8007a4e: f107 0208 add.w r2, r7, #8 8007a52: 4610 mov r0, r2 8007a54: 4798 blx r3 8007a56: 60f8 str r0, [r7, #12] } pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; 8007a58: 68fb ldr r3, [r7, #12] 8007a5a: 3301 adds r3, #1 8007a5c: 2207 movs r2, #7 8007a5e: 701a strb r2, [r3, #0] else { USBD_CtlError(pdev, req); err++; } break; 8007a60: e00f b.n 8007a82 USBD_CtlError(pdev, req); 8007a62: 6839 ldr r1, [r7, #0] 8007a64: 6878 ldr r0, [r7, #4] 8007a66: f000 fa10 bl 8007e8a err++; 8007a6a: 7afb ldrb r3, [r7, #11] 8007a6c: 3301 adds r3, #1 8007a6e: 72fb strb r3, [r7, #11] break; 8007a70: e007 b.n 8007a82 default: USBD_CtlError(pdev, req); 8007a72: 6839 ldr r1, [r7, #0] 8007a74: 6878 ldr r0, [r7, #4] 8007a76: f000 fa08 bl 8007e8a err++; 8007a7a: 7afb ldrb r3, [r7, #11] 8007a7c: 3301 adds r3, #1 8007a7e: 72fb strb r3, [r7, #11] break; 8007a80: bf00 nop } if (err != 0U) 8007a82: 7afb ldrb r3, [r7, #11] 8007a84: 2b00 cmp r3, #0 8007a86: d11e bne.n 8007ac6 { return; } if (req->wLength != 0U) 8007a88: 683b ldr r3, [r7, #0] 8007a8a: 88db ldrh r3, [r3, #6] 8007a8c: 2b00 cmp r3, #0 8007a8e: d016 beq.n 8007abe { if (len != 0U) 8007a90: 893b ldrh r3, [r7, #8] 8007a92: 2b00 cmp r3, #0 8007a94: d00e beq.n 8007ab4 { len = MIN(len, req->wLength); 8007a96: 683b ldr r3, [r7, #0] 8007a98: 88da ldrh r2, [r3, #6] 8007a9a: 893b ldrh r3, [r7, #8] 8007a9c: 4293 cmp r3, r2 8007a9e: bf28 it cs 8007aa0: 4613 movcs r3, r2 8007aa2: b29b uxth r3, r3 8007aa4: 813b strh r3, [r7, #8] (void)USBD_CtlSendData(pdev, pbuf, len); 8007aa6: 893b ldrh r3, [r7, #8] 8007aa8: 461a mov r2, r3 8007aaa: 68f9 ldr r1, [r7, #12] 8007aac: 6878 ldr r0, [r7, #4] 8007aae: f000 fa69 bl 8007f84 8007ab2: e009 b.n 8007ac8 } else { USBD_CtlError(pdev, req); 8007ab4: 6839 ldr r1, [r7, #0] 8007ab6: 6878 ldr r0, [r7, #4] 8007ab8: f000 f9e7 bl 8007e8a 8007abc: e004 b.n 8007ac8 } } else { (void)USBD_CtlSendStatus(pdev); 8007abe: 6878 ldr r0, [r7, #4] 8007ac0: f000 faa0 bl 8008004 8007ac4: e000 b.n 8007ac8 return; 8007ac6: bf00 nop } } 8007ac8: 3710 adds r7, #16 8007aca: 46bd mov sp, r7 8007acc: bd80 pop {r7, pc} 8007ace: bf00 nop 08007ad0 : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_SetAddress(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007ad0: b580 push {r7, lr} 8007ad2: b084 sub sp, #16 8007ad4: af00 add r7, sp, #0 8007ad6: 6078 str r0, [r7, #4] 8007ad8: 6039 str r1, [r7, #0] uint8_t dev_addr; if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U)) 8007ada: 683b ldr r3, [r7, #0] 8007adc: 889b ldrh r3, [r3, #4] 8007ade: 2b00 cmp r3, #0 8007ae0: d131 bne.n 8007b46 8007ae2: 683b ldr r3, [r7, #0] 8007ae4: 88db ldrh r3, [r3, #6] 8007ae6: 2b00 cmp r3, #0 8007ae8: d12d bne.n 8007b46 8007aea: 683b ldr r3, [r7, #0] 8007aec: 885b ldrh r3, [r3, #2] 8007aee: 2b7f cmp r3, #127 @ 0x7f 8007af0: d829 bhi.n 8007b46 { dev_addr = (uint8_t)(req->wValue) & 0x7FU; 8007af2: 683b ldr r3, [r7, #0] 8007af4: 885b ldrh r3, [r3, #2] 8007af6: b2db uxtb r3, r3 8007af8: f003 037f and.w r3, r3, #127 @ 0x7f 8007afc: 73fb strb r3, [r7, #15] if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007afe: 687b ldr r3, [r7, #4] 8007b00: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007b04: b2db uxtb r3, r3 8007b06: 2b03 cmp r3, #3 8007b08: d104 bne.n 8007b14 { USBD_CtlError(pdev, req); 8007b0a: 6839 ldr r1, [r7, #0] 8007b0c: 6878 ldr r0, [r7, #4] 8007b0e: f000 f9bc bl 8007e8a if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007b12: e01d b.n 8007b50 } else { pdev->dev_address = dev_addr; 8007b14: 687b ldr r3, [r7, #4] 8007b16: 7bfa ldrb r2, [r7, #15] 8007b18: f883 229e strb.w r2, [r3, #670] @ 0x29e (void)USBD_LL_SetUSBAddress(pdev, dev_addr); 8007b1c: 7bfb ldrb r3, [r7, #15] 8007b1e: 4619 mov r1, r3 8007b20: 6878 ldr r0, [r7, #4] 8007b22: f000 fe4f bl 80087c4 (void)USBD_CtlSendStatus(pdev); 8007b26: 6878 ldr r0, [r7, #4] 8007b28: f000 fa6c bl 8008004 if (dev_addr != 0U) 8007b2c: 7bfb ldrb r3, [r7, #15] 8007b2e: 2b00 cmp r3, #0 8007b30: d004 beq.n 8007b3c { pdev->dev_state = USBD_STATE_ADDRESSED; 8007b32: 687b ldr r3, [r7, #4] 8007b34: 2202 movs r2, #2 8007b36: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007b3a: e009 b.n 8007b50 } else { pdev->dev_state = USBD_STATE_DEFAULT; 8007b3c: 687b ldr r3, [r7, #4] 8007b3e: 2201 movs r2, #1 8007b40: f883 229c strb.w r2, [r3, #668] @ 0x29c if (pdev->dev_state == USBD_STATE_CONFIGURED) 8007b44: e004 b.n 8007b50 } } } else { USBD_CtlError(pdev, req); 8007b46: 6839 ldr r1, [r7, #0] 8007b48: 6878 ldr r0, [r7, #4] 8007b4a: f000 f99e bl 8007e8a } } 8007b4e: bf00 nop 8007b50: bf00 nop 8007b52: 3710 adds r7, #16 8007b54: 46bd mov sp, r7 8007b56: bd80 pop {r7, pc} 08007b58 : * @param pdev: device instance * @param req: usb request * @retval status */ static USBD_StatusTypeDef USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007b58: b580 push {r7, lr} 8007b5a: b084 sub sp, #16 8007b5c: af00 add r7, sp, #0 8007b5e: 6078 str r0, [r7, #4] 8007b60: 6039 str r1, [r7, #0] USBD_StatusTypeDef ret = USBD_OK; 8007b62: 2300 movs r3, #0 8007b64: 73fb strb r3, [r7, #15] static uint8_t cfgidx; cfgidx = (uint8_t)(req->wValue); 8007b66: 683b ldr r3, [r7, #0] 8007b68: 885b ldrh r3, [r3, #2] 8007b6a: b2da uxtb r2, r3 8007b6c: 4b4e ldr r3, [pc, #312] @ (8007ca8 ) 8007b6e: 701a strb r2, [r3, #0] if (cfgidx > USBD_MAX_NUM_CONFIGURATION) 8007b70: 4b4d ldr r3, [pc, #308] @ (8007ca8 ) 8007b72: 781b ldrb r3, [r3, #0] 8007b74: 2b01 cmp r3, #1 8007b76: d905 bls.n 8007b84 { USBD_CtlError(pdev, req); 8007b78: 6839 ldr r1, [r7, #0] 8007b7a: 6878 ldr r0, [r7, #4] 8007b7c: f000 f985 bl 8007e8a return USBD_FAIL; 8007b80: 2303 movs r3, #3 8007b82: e08c b.n 8007c9e } switch (pdev->dev_state) 8007b84: 687b ldr r3, [r7, #4] 8007b86: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007b8a: b2db uxtb r3, r3 8007b8c: 2b02 cmp r3, #2 8007b8e: d002 beq.n 8007b96 8007b90: 2b03 cmp r3, #3 8007b92: d029 beq.n 8007be8 8007b94: e075 b.n 8007c82 { case USBD_STATE_ADDRESSED: if (cfgidx != 0U) 8007b96: 4b44 ldr r3, [pc, #272] @ (8007ca8 ) 8007b98: 781b ldrb r3, [r3, #0] 8007b9a: 2b00 cmp r3, #0 8007b9c: d020 beq.n 8007be0 { pdev->dev_config = cfgidx; 8007b9e: 4b42 ldr r3, [pc, #264] @ (8007ca8 ) 8007ba0: 781b ldrb r3, [r3, #0] 8007ba2: 461a mov r2, r3 8007ba4: 687b ldr r3, [r7, #4] 8007ba6: 605a str r2, [r3, #4] ret = USBD_SetClassConfig(pdev, cfgidx); 8007ba8: 4b3f ldr r3, [pc, #252] @ (8007ca8 ) 8007baa: 781b ldrb r3, [r3, #0] 8007bac: 4619 mov r1, r3 8007bae: 6878 ldr r0, [r7, #4] 8007bb0: f7fe ffa3 bl 8006afa 8007bb4: 4603 mov r3, r0 8007bb6: 73fb strb r3, [r7, #15] if (ret != USBD_OK) 8007bb8: 7bfb ldrb r3, [r7, #15] 8007bba: 2b00 cmp r3, #0 8007bbc: d008 beq.n 8007bd0 { USBD_CtlError(pdev, req); 8007bbe: 6839 ldr r1, [r7, #0] 8007bc0: 6878 ldr r0, [r7, #4] 8007bc2: f000 f962 bl 8007e8a pdev->dev_state = USBD_STATE_ADDRESSED; 8007bc6: 687b ldr r3, [r7, #4] 8007bc8: 2202 movs r2, #2 8007bca: f883 229c strb.w r2, [r3, #668] @ 0x29c } else { (void)USBD_CtlSendStatus(pdev); } break; 8007bce: e065 b.n 8007c9c (void)USBD_CtlSendStatus(pdev); 8007bd0: 6878 ldr r0, [r7, #4] 8007bd2: f000 fa17 bl 8008004 pdev->dev_state = USBD_STATE_CONFIGURED; 8007bd6: 687b ldr r3, [r7, #4] 8007bd8: 2203 movs r2, #3 8007bda: f883 229c strb.w r2, [r3, #668] @ 0x29c break; 8007bde: e05d b.n 8007c9c (void)USBD_CtlSendStatus(pdev); 8007be0: 6878 ldr r0, [r7, #4] 8007be2: f000 fa0f bl 8008004 break; 8007be6: e059 b.n 8007c9c case USBD_STATE_CONFIGURED: if (cfgidx == 0U) 8007be8: 4b2f ldr r3, [pc, #188] @ (8007ca8 ) 8007bea: 781b ldrb r3, [r3, #0] 8007bec: 2b00 cmp r3, #0 8007bee: d112 bne.n 8007c16 { pdev->dev_state = USBD_STATE_ADDRESSED; 8007bf0: 687b ldr r3, [r7, #4] 8007bf2: 2202 movs r2, #2 8007bf4: f883 229c strb.w r2, [r3, #668] @ 0x29c pdev->dev_config = cfgidx; 8007bf8: 4b2b ldr r3, [pc, #172] @ (8007ca8 ) 8007bfa: 781b ldrb r3, [r3, #0] 8007bfc: 461a mov r2, r3 8007bfe: 687b ldr r3, [r7, #4] 8007c00: 605a str r2, [r3, #4] (void)USBD_ClrClassConfig(pdev, cfgidx); 8007c02: 4b29 ldr r3, [pc, #164] @ (8007ca8 ) 8007c04: 781b ldrb r3, [r3, #0] 8007c06: 4619 mov r1, r3 8007c08: 6878 ldr r0, [r7, #4] 8007c0a: f7fe ff92 bl 8006b32 (void)USBD_CtlSendStatus(pdev); 8007c0e: 6878 ldr r0, [r7, #4] 8007c10: f000 f9f8 bl 8008004 } else { (void)USBD_CtlSendStatus(pdev); } break; 8007c14: e042 b.n 8007c9c else if (cfgidx != pdev->dev_config) 8007c16: 4b24 ldr r3, [pc, #144] @ (8007ca8 ) 8007c18: 781b ldrb r3, [r3, #0] 8007c1a: 461a mov r2, r3 8007c1c: 687b ldr r3, [r7, #4] 8007c1e: 685b ldr r3, [r3, #4] 8007c20: 429a cmp r2, r3 8007c22: d02a beq.n 8007c7a (void)USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config); 8007c24: 687b ldr r3, [r7, #4] 8007c26: 685b ldr r3, [r3, #4] 8007c28: b2db uxtb r3, r3 8007c2a: 4619 mov r1, r3 8007c2c: 6878 ldr r0, [r7, #4] 8007c2e: f7fe ff80 bl 8006b32 pdev->dev_config = cfgidx; 8007c32: 4b1d ldr r3, [pc, #116] @ (8007ca8 ) 8007c34: 781b ldrb r3, [r3, #0] 8007c36: 461a mov r2, r3 8007c38: 687b ldr r3, [r7, #4] 8007c3a: 605a str r2, [r3, #4] ret = USBD_SetClassConfig(pdev, cfgidx); 8007c3c: 4b1a ldr r3, [pc, #104] @ (8007ca8 ) 8007c3e: 781b ldrb r3, [r3, #0] 8007c40: 4619 mov r1, r3 8007c42: 6878 ldr r0, [r7, #4] 8007c44: f7fe ff59 bl 8006afa 8007c48: 4603 mov r3, r0 8007c4a: 73fb strb r3, [r7, #15] if (ret != USBD_OK) 8007c4c: 7bfb ldrb r3, [r7, #15] 8007c4e: 2b00 cmp r3, #0 8007c50: d00f beq.n 8007c72 USBD_CtlError(pdev, req); 8007c52: 6839 ldr r1, [r7, #0] 8007c54: 6878 ldr r0, [r7, #4] 8007c56: f000 f918 bl 8007e8a (void)USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config); 8007c5a: 687b ldr r3, [r7, #4] 8007c5c: 685b ldr r3, [r3, #4] 8007c5e: b2db uxtb r3, r3 8007c60: 4619 mov r1, r3 8007c62: 6878 ldr r0, [r7, #4] 8007c64: f7fe ff65 bl 8006b32 pdev->dev_state = USBD_STATE_ADDRESSED; 8007c68: 687b ldr r3, [r7, #4] 8007c6a: 2202 movs r2, #2 8007c6c: f883 229c strb.w r2, [r3, #668] @ 0x29c break; 8007c70: e014 b.n 8007c9c (void)USBD_CtlSendStatus(pdev); 8007c72: 6878 ldr r0, [r7, #4] 8007c74: f000 f9c6 bl 8008004 break; 8007c78: e010 b.n 8007c9c (void)USBD_CtlSendStatus(pdev); 8007c7a: 6878 ldr r0, [r7, #4] 8007c7c: f000 f9c2 bl 8008004 break; 8007c80: e00c b.n 8007c9c default: USBD_CtlError(pdev, req); 8007c82: 6839 ldr r1, [r7, #0] 8007c84: 6878 ldr r0, [r7, #4] 8007c86: f000 f900 bl 8007e8a (void)USBD_ClrClassConfig(pdev, cfgidx); 8007c8a: 4b07 ldr r3, [pc, #28] @ (8007ca8 ) 8007c8c: 781b ldrb r3, [r3, #0] 8007c8e: 4619 mov r1, r3 8007c90: 6878 ldr r0, [r7, #4] 8007c92: f7fe ff4e bl 8006b32 ret = USBD_FAIL; 8007c96: 2303 movs r3, #3 8007c98: 73fb strb r3, [r7, #15] break; 8007c9a: bf00 nop } return ret; 8007c9c: 7bfb ldrb r3, [r7, #15] } 8007c9e: 4618 mov r0, r3 8007ca0: 3710 adds r7, #16 8007ca2: 46bd mov sp, r7 8007ca4: bd80 pop {r7, pc} 8007ca6: bf00 nop 8007ca8: 20000394 .word 0x20000394 08007cac : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007cac: b580 push {r7, lr} 8007cae: b082 sub sp, #8 8007cb0: af00 add r7, sp, #0 8007cb2: 6078 str r0, [r7, #4] 8007cb4: 6039 str r1, [r7, #0] if (req->wLength != 1U) 8007cb6: 683b ldr r3, [r7, #0] 8007cb8: 88db ldrh r3, [r3, #6] 8007cba: 2b01 cmp r3, #1 8007cbc: d004 beq.n 8007cc8 { USBD_CtlError(pdev, req); 8007cbe: 6839 ldr r1, [r7, #0] 8007cc0: 6878 ldr r0, [r7, #4] 8007cc2: f000 f8e2 bl 8007e8a default: USBD_CtlError(pdev, req); break; } } } 8007cc6: e023 b.n 8007d10 switch (pdev->dev_state) 8007cc8: 687b ldr r3, [r7, #4] 8007cca: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007cce: b2db uxtb r3, r3 8007cd0: 2b02 cmp r3, #2 8007cd2: dc02 bgt.n 8007cda 8007cd4: 2b00 cmp r3, #0 8007cd6: dc03 bgt.n 8007ce0 8007cd8: e015 b.n 8007d06 8007cda: 2b03 cmp r3, #3 8007cdc: d00b beq.n 8007cf6 8007cde: e012 b.n 8007d06 pdev->dev_default_config = 0U; 8007ce0: 687b ldr r3, [r7, #4] 8007ce2: 2200 movs r2, #0 8007ce4: 609a str r2, [r3, #8] (void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_default_config, 1U); 8007ce6: 687b ldr r3, [r7, #4] 8007ce8: 3308 adds r3, #8 8007cea: 2201 movs r2, #1 8007cec: 4619 mov r1, r3 8007cee: 6878 ldr r0, [r7, #4] 8007cf0: f000 f948 bl 8007f84 break; 8007cf4: e00c b.n 8007d10 (void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_config, 1U); 8007cf6: 687b ldr r3, [r7, #4] 8007cf8: 3304 adds r3, #4 8007cfa: 2201 movs r2, #1 8007cfc: 4619 mov r1, r3 8007cfe: 6878 ldr r0, [r7, #4] 8007d00: f000 f940 bl 8007f84 break; 8007d04: e004 b.n 8007d10 USBD_CtlError(pdev, req); 8007d06: 6839 ldr r1, [r7, #0] 8007d08: 6878 ldr r0, [r7, #4] 8007d0a: f000 f8be bl 8007e8a break; 8007d0e: bf00 nop } 8007d10: bf00 nop 8007d12: 3708 adds r7, #8 8007d14: 46bd mov sp, r7 8007d16: bd80 pop {r7, pc} 08007d18 : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007d18: b580 push {r7, lr} 8007d1a: b082 sub sp, #8 8007d1c: af00 add r7, sp, #0 8007d1e: 6078 str r0, [r7, #4] 8007d20: 6039 str r1, [r7, #0] switch (pdev->dev_state) 8007d22: 687b ldr r3, [r7, #4] 8007d24: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007d28: b2db uxtb r3, r3 8007d2a: 3b01 subs r3, #1 8007d2c: 2b02 cmp r3, #2 8007d2e: d81e bhi.n 8007d6e { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wLength != 0x2U) 8007d30: 683b ldr r3, [r7, #0] 8007d32: 88db ldrh r3, [r3, #6] 8007d34: 2b02 cmp r3, #2 8007d36: d004 beq.n 8007d42 { USBD_CtlError(pdev, req); 8007d38: 6839 ldr r1, [r7, #0] 8007d3a: 6878 ldr r0, [r7, #4] 8007d3c: f000 f8a5 bl 8007e8a break; 8007d40: e01a b.n 8007d78 } #if (USBD_SELF_POWERED == 1U) pdev->dev_config_status = USB_CONFIG_SELF_POWERED; 8007d42: 687b ldr r3, [r7, #4] 8007d44: 2201 movs r2, #1 8007d46: 60da str r2, [r3, #12] #else pdev->dev_config_status = 0U; #endif /* USBD_SELF_POWERED */ if (pdev->dev_remote_wakeup != 0U) 8007d48: 687b ldr r3, [r7, #4] 8007d4a: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4 8007d4e: 2b00 cmp r3, #0 8007d50: d005 beq.n 8007d5e { pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; 8007d52: 687b ldr r3, [r7, #4] 8007d54: 68db ldr r3, [r3, #12] 8007d56: f043 0202 orr.w r2, r3, #2 8007d5a: 687b ldr r3, [r7, #4] 8007d5c: 60da str r2, [r3, #12] } (void)USBD_CtlSendData(pdev, (uint8_t *)&pdev->dev_config_status, 2U); 8007d5e: 687b ldr r3, [r7, #4] 8007d60: 330c adds r3, #12 8007d62: 2202 movs r2, #2 8007d64: 4619 mov r1, r3 8007d66: 6878 ldr r0, [r7, #4] 8007d68: f000 f90c bl 8007f84 break; 8007d6c: e004 b.n 8007d78 default: USBD_CtlError(pdev, req); 8007d6e: 6839 ldr r1, [r7, #0] 8007d70: 6878 ldr r0, [r7, #4] 8007d72: f000 f88a bl 8007e8a break; 8007d76: bf00 nop } } 8007d78: bf00 nop 8007d7a: 3708 adds r7, #8 8007d7c: 46bd mov sp, r7 8007d7e: bd80 pop {r7, pc} 08007d80 : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_SetFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007d80: b580 push {r7, lr} 8007d82: b082 sub sp, #8 8007d84: af00 add r7, sp, #0 8007d86: 6078 str r0, [r7, #4] 8007d88: 6039 str r1, [r7, #0] if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 8007d8a: 683b ldr r3, [r7, #0] 8007d8c: 885b ldrh r3, [r3, #2] 8007d8e: 2b01 cmp r3, #1 8007d90: d107 bne.n 8007da2 { pdev->dev_remote_wakeup = 1U; 8007d92: 687b ldr r3, [r7, #4] 8007d94: 2201 movs r2, #1 8007d96: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 (void)USBD_CtlSendStatus(pdev); 8007d9a: 6878 ldr r0, [r7, #4] 8007d9c: f000 f932 bl 8008004 } else { USBD_CtlError(pdev, req); } } 8007da0: e013 b.n 8007dca else if (req->wValue == USB_FEATURE_TEST_MODE) 8007da2: 683b ldr r3, [r7, #0] 8007da4: 885b ldrh r3, [r3, #2] 8007da6: 2b02 cmp r3, #2 8007da8: d10b bne.n 8007dc2 pdev->dev_test_mode = (uint8_t)(req->wIndex >> 8); 8007daa: 683b ldr r3, [r7, #0] 8007dac: 889b ldrh r3, [r3, #4] 8007dae: 0a1b lsrs r3, r3, #8 8007db0: b29b uxth r3, r3 8007db2: b2da uxtb r2, r3 8007db4: 687b ldr r3, [r7, #4] 8007db6: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0 (void)USBD_CtlSendStatus(pdev); 8007dba: 6878 ldr r0, [r7, #4] 8007dbc: f000 f922 bl 8008004 } 8007dc0: e003 b.n 8007dca USBD_CtlError(pdev, req); 8007dc2: 6839 ldr r1, [r7, #0] 8007dc4: 6878 ldr r0, [r7, #4] 8007dc6: f000 f860 bl 8007e8a } 8007dca: bf00 nop 8007dcc: 3708 adds r7, #8 8007dce: 46bd mov sp, r7 8007dd0: bd80 pop {r7, pc} 08007dd2 : * @param pdev: device instance * @param req: usb request * @retval None */ static void USBD_ClrFeature(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007dd2: b580 push {r7, lr} 8007dd4: b082 sub sp, #8 8007dd6: af00 add r7, sp, #0 8007dd8: 6078 str r0, [r7, #4] 8007dda: 6039 str r1, [r7, #0] switch (pdev->dev_state) 8007ddc: 687b ldr r3, [r7, #4] 8007dde: f893 329c ldrb.w r3, [r3, #668] @ 0x29c 8007de2: b2db uxtb r3, r3 8007de4: 3b01 subs r3, #1 8007de6: 2b02 cmp r3, #2 8007de8: d80b bhi.n 8007e02 { case USBD_STATE_DEFAULT: case USBD_STATE_ADDRESSED: case USBD_STATE_CONFIGURED: if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) 8007dea: 683b ldr r3, [r7, #0] 8007dec: 885b ldrh r3, [r3, #2] 8007dee: 2b01 cmp r3, #1 8007df0: d10c bne.n 8007e0c { pdev->dev_remote_wakeup = 0U; 8007df2: 687b ldr r3, [r7, #4] 8007df4: 2200 movs r2, #0 8007df6: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4 (void)USBD_CtlSendStatus(pdev); 8007dfa: 6878 ldr r0, [r7, #4] 8007dfc: f000 f902 bl 8008004 } break; 8007e00: e004 b.n 8007e0c default: USBD_CtlError(pdev, req); 8007e02: 6839 ldr r1, [r7, #0] 8007e04: 6878 ldr r0, [r7, #4] 8007e06: f000 f840 bl 8007e8a break; 8007e0a: e000 b.n 8007e0e break; 8007e0c: bf00 nop } } 8007e0e: bf00 nop 8007e10: 3708 adds r7, #8 8007e12: 46bd mov sp, r7 8007e14: bd80 pop {r7, pc} 08007e16 : * @param req: usb request * @param pdata: setup data pointer * @retval None */ void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) { 8007e16: b580 push {r7, lr} 8007e18: b084 sub sp, #16 8007e1a: af00 add r7, sp, #0 8007e1c: 6078 str r0, [r7, #4] 8007e1e: 6039 str r1, [r7, #0] uint8_t *pbuff = pdata; 8007e20: 683b ldr r3, [r7, #0] 8007e22: 60fb str r3, [r7, #12] req->bmRequest = *(uint8_t *)(pbuff); 8007e24: 68fb ldr r3, [r7, #12] 8007e26: 781a ldrb r2, [r3, #0] 8007e28: 687b ldr r3, [r7, #4] 8007e2a: 701a strb r2, [r3, #0] pbuff++; 8007e2c: 68fb ldr r3, [r7, #12] 8007e2e: 3301 adds r3, #1 8007e30: 60fb str r3, [r7, #12] req->bRequest = *(uint8_t *)(pbuff); 8007e32: 68fb ldr r3, [r7, #12] 8007e34: 781a ldrb r2, [r3, #0] 8007e36: 687b ldr r3, [r7, #4] 8007e38: 705a strb r2, [r3, #1] pbuff++; 8007e3a: 68fb ldr r3, [r7, #12] 8007e3c: 3301 adds r3, #1 8007e3e: 60fb str r3, [r7, #12] req->wValue = SWAPBYTE(pbuff); 8007e40: 68f8 ldr r0, [r7, #12] 8007e42: f7ff fa13 bl 800726c 8007e46: 4603 mov r3, r0 8007e48: 461a mov r2, r3 8007e4a: 687b ldr r3, [r7, #4] 8007e4c: 805a strh r2, [r3, #2] pbuff++; 8007e4e: 68fb ldr r3, [r7, #12] 8007e50: 3301 adds r3, #1 8007e52: 60fb str r3, [r7, #12] pbuff++; 8007e54: 68fb ldr r3, [r7, #12] 8007e56: 3301 adds r3, #1 8007e58: 60fb str r3, [r7, #12] req->wIndex = SWAPBYTE(pbuff); 8007e5a: 68f8 ldr r0, [r7, #12] 8007e5c: f7ff fa06 bl 800726c 8007e60: 4603 mov r3, r0 8007e62: 461a mov r2, r3 8007e64: 687b ldr r3, [r7, #4] 8007e66: 809a strh r2, [r3, #4] pbuff++; 8007e68: 68fb ldr r3, [r7, #12] 8007e6a: 3301 adds r3, #1 8007e6c: 60fb str r3, [r7, #12] pbuff++; 8007e6e: 68fb ldr r3, [r7, #12] 8007e70: 3301 adds r3, #1 8007e72: 60fb str r3, [r7, #12] req->wLength = SWAPBYTE(pbuff); 8007e74: 68f8 ldr r0, [r7, #12] 8007e76: f7ff f9f9 bl 800726c 8007e7a: 4603 mov r3, r0 8007e7c: 461a mov r2, r3 8007e7e: 687b ldr r3, [r7, #4] 8007e80: 80da strh r2, [r3, #6] } 8007e82: bf00 nop 8007e84: 3710 adds r7, #16 8007e86: 46bd mov sp, r7 8007e88: bd80 pop {r7, pc} 08007e8a : * @param pdev: device instance * @param req: usb request * @retval None */ void USBD_CtlError(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req) { 8007e8a: b580 push {r7, lr} 8007e8c: b082 sub sp, #8 8007e8e: af00 add r7, sp, #0 8007e90: 6078 str r0, [r7, #4] 8007e92: 6039 str r1, [r7, #0] UNUSED(req); (void)USBD_LL_StallEP(pdev, 0x80U); 8007e94: 2180 movs r1, #128 @ 0x80 8007e96: 6878 ldr r0, [r7, #4] 8007e98: f000 fc2a bl 80086f0 (void)USBD_LL_StallEP(pdev, 0U); 8007e9c: 2100 movs r1, #0 8007e9e: 6878 ldr r0, [r7, #4] 8007ea0: f000 fc26 bl 80086f0 } 8007ea4: bf00 nop 8007ea6: 3708 adds r7, #8 8007ea8: 46bd mov sp, r7 8007eaa: bd80 pop {r7, pc} 08007eac : * @param unicode : Formatted string buffer (unicode) * @param len : descriptor length * @retval None */ void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) { 8007eac: b580 push {r7, lr} 8007eae: b086 sub sp, #24 8007eb0: af00 add r7, sp, #0 8007eb2: 60f8 str r0, [r7, #12] 8007eb4: 60b9 str r1, [r7, #8] 8007eb6: 607a str r2, [r7, #4] uint8_t idx = 0U; 8007eb8: 2300 movs r3, #0 8007eba: 75fb strb r3, [r7, #23] uint8_t *pdesc; if (desc == NULL) 8007ebc: 68fb ldr r3, [r7, #12] 8007ebe: 2b00 cmp r3, #0 8007ec0: d042 beq.n 8007f48 { return; } pdesc = desc; 8007ec2: 68fb ldr r3, [r7, #12] 8007ec4: 613b str r3, [r7, #16] *len = MIN(USBD_MAX_STR_DESC_SIZ, ((uint16_t)USBD_GetLen(pdesc) * 2U) + 2U); 8007ec6: 6938 ldr r0, [r7, #16] 8007ec8: f000 f842 bl 8007f50 8007ecc: 4603 mov r3, r0 8007ece: 3301 adds r3, #1 8007ed0: 005b lsls r3, r3, #1 8007ed2: f5b3 7f00 cmp.w r3, #512 @ 0x200 8007ed6: d808 bhi.n 8007eea 8007ed8: 6938 ldr r0, [r7, #16] 8007eda: f000 f839 bl 8007f50 8007ede: 4603 mov r3, r0 8007ee0: 3301 adds r3, #1 8007ee2: b29b uxth r3, r3 8007ee4: 005b lsls r3, r3, #1 8007ee6: b29a uxth r2, r3 8007ee8: e001 b.n 8007eee 8007eea: f44f 7200 mov.w r2, #512 @ 0x200 8007eee: 687b ldr r3, [r7, #4] 8007ef0: 801a strh r2, [r3, #0] unicode[idx] = *(uint8_t *)len; 8007ef2: 7dfb ldrb r3, [r7, #23] 8007ef4: 68ba ldr r2, [r7, #8] 8007ef6: 4413 add r3, r2 8007ef8: 687a ldr r2, [r7, #4] 8007efa: 7812 ldrb r2, [r2, #0] 8007efc: 701a strb r2, [r3, #0] idx++; 8007efe: 7dfb ldrb r3, [r7, #23] 8007f00: 3301 adds r3, #1 8007f02: 75fb strb r3, [r7, #23] unicode[idx] = USB_DESC_TYPE_STRING; 8007f04: 7dfb ldrb r3, [r7, #23] 8007f06: 68ba ldr r2, [r7, #8] 8007f08: 4413 add r3, r2 8007f0a: 2203 movs r2, #3 8007f0c: 701a strb r2, [r3, #0] idx++; 8007f0e: 7dfb ldrb r3, [r7, #23] 8007f10: 3301 adds r3, #1 8007f12: 75fb strb r3, [r7, #23] while (*pdesc != (uint8_t)'\0') 8007f14: e013 b.n 8007f3e { unicode[idx] = *pdesc; 8007f16: 7dfb ldrb r3, [r7, #23] 8007f18: 68ba ldr r2, [r7, #8] 8007f1a: 4413 add r3, r2 8007f1c: 693a ldr r2, [r7, #16] 8007f1e: 7812 ldrb r2, [r2, #0] 8007f20: 701a strb r2, [r3, #0] pdesc++; 8007f22: 693b ldr r3, [r7, #16] 8007f24: 3301 adds r3, #1 8007f26: 613b str r3, [r7, #16] idx++; 8007f28: 7dfb ldrb r3, [r7, #23] 8007f2a: 3301 adds r3, #1 8007f2c: 75fb strb r3, [r7, #23] unicode[idx] = 0U; 8007f2e: 7dfb ldrb r3, [r7, #23] 8007f30: 68ba ldr r2, [r7, #8] 8007f32: 4413 add r3, r2 8007f34: 2200 movs r2, #0 8007f36: 701a strb r2, [r3, #0] idx++; 8007f38: 7dfb ldrb r3, [r7, #23] 8007f3a: 3301 adds r3, #1 8007f3c: 75fb strb r3, [r7, #23] while (*pdesc != (uint8_t)'\0') 8007f3e: 693b ldr r3, [r7, #16] 8007f40: 781b ldrb r3, [r3, #0] 8007f42: 2b00 cmp r3, #0 8007f44: d1e7 bne.n 8007f16 8007f46: e000 b.n 8007f4a return; 8007f48: bf00 nop } } 8007f4a: 3718 adds r7, #24 8007f4c: 46bd mov sp, r7 8007f4e: bd80 pop {r7, pc} 08007f50 : * return the string length * @param buf : pointer to the ascii string buffer * @retval string length */ static uint8_t USBD_GetLen(uint8_t *buf) { 8007f50: b480 push {r7} 8007f52: b085 sub sp, #20 8007f54: af00 add r7, sp, #0 8007f56: 6078 str r0, [r7, #4] uint8_t len = 0U; 8007f58: 2300 movs r3, #0 8007f5a: 73fb strb r3, [r7, #15] uint8_t *pbuff = buf; 8007f5c: 687b ldr r3, [r7, #4] 8007f5e: 60bb str r3, [r7, #8] while (*pbuff != (uint8_t)'\0') 8007f60: e005 b.n 8007f6e { len++; 8007f62: 7bfb ldrb r3, [r7, #15] 8007f64: 3301 adds r3, #1 8007f66: 73fb strb r3, [r7, #15] pbuff++; 8007f68: 68bb ldr r3, [r7, #8] 8007f6a: 3301 adds r3, #1 8007f6c: 60bb str r3, [r7, #8] while (*pbuff != (uint8_t)'\0') 8007f6e: 68bb ldr r3, [r7, #8] 8007f70: 781b ldrb r3, [r3, #0] 8007f72: 2b00 cmp r3, #0 8007f74: d1f5 bne.n 8007f62 } return len; 8007f76: 7bfb ldrb r3, [r7, #15] } 8007f78: 4618 mov r0, r3 8007f7a: 3714 adds r7, #20 8007f7c: 46bd mov sp, r7 8007f7e: f85d 7b04 ldr.w r7, [sp], #4 8007f82: 4770 bx lr 08007f84 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint32_t len) { 8007f84: b580 push {r7, lr} 8007f86: b084 sub sp, #16 8007f88: af00 add r7, sp, #0 8007f8a: 60f8 str r0, [r7, #12] 8007f8c: 60b9 str r1, [r7, #8] 8007f8e: 607a str r2, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_DATA_IN; 8007f90: 68fb ldr r3, [r7, #12] 8007f92: 2202 movs r2, #2 8007f94: f8c3 2294 str.w r2, [r3, #660] @ 0x294 pdev->ep_in[0].total_length = len; 8007f98: 68fb ldr r3, [r7, #12] 8007f9a: 687a ldr r2, [r7, #4] 8007f9c: 615a str r2, [r3, #20] pdev->ep_in[0].pbuffer = pbuf; 8007f9e: 68fb ldr r3, [r7, #12] 8007fa0: 68ba ldr r2, [r7, #8] 8007fa2: 625a str r2, [r3, #36] @ 0x24 #ifdef USBD_AVOID_PACKET_SPLIT_MPS pdev->ep_in[0].rem_length = 0U; #else pdev->ep_in[0].rem_length = len; 8007fa4: 68fb ldr r3, [r7, #12] 8007fa6: 687a ldr r2, [r7, #4] 8007fa8: 619a str r2, [r3, #24] #endif /* USBD_AVOID_PACKET_SPLIT_MPS */ /* Start the transfer */ (void)USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 8007faa: 687b ldr r3, [r7, #4] 8007fac: 68ba ldr r2, [r7, #8] 8007fae: 2100 movs r1, #0 8007fb0: 68f8 ldr r0, [r7, #12] 8007fb2: f000 fc26 bl 8008802 return USBD_OK; 8007fb6: 2300 movs r3, #0 } 8007fb8: 4618 mov r0, r3 8007fba: 3710 adds r7, #16 8007fbc: 46bd mov sp, r7 8007fbe: bd80 pop {r7, pc} 08007fc0 : * @param len: length of data to be sent * @retval status */ USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint32_t len) { 8007fc0: b580 push {r7, lr} 8007fc2: b084 sub sp, #16 8007fc4: af00 add r7, sp, #0 8007fc6: 60f8 str r0, [r7, #12] 8007fc8: 60b9 str r1, [r7, #8] 8007fca: 607a str r2, [r7, #4] /* Start the next transfer */ (void)USBD_LL_Transmit(pdev, 0x00U, pbuf, len); 8007fcc: 687b ldr r3, [r7, #4] 8007fce: 68ba ldr r2, [r7, #8] 8007fd0: 2100 movs r1, #0 8007fd2: 68f8 ldr r0, [r7, #12] 8007fd4: f000 fc15 bl 8008802 return USBD_OK; 8007fd8: 2300 movs r3, #0 } 8007fda: 4618 mov r0, r3 8007fdc: 3710 adds r7, #16 8007fde: 46bd mov sp, r7 8007fe0: bd80 pop {r7, pc} 08007fe2 : * @param len: length of data to be received * @retval status */ USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev, uint8_t *pbuf, uint32_t len) { 8007fe2: b580 push {r7, lr} 8007fe4: b084 sub sp, #16 8007fe6: af00 add r7, sp, #0 8007fe8: 60f8 str r0, [r7, #12] 8007fea: 60b9 str r1, [r7, #8] 8007fec: 607a str r2, [r7, #4] (void)USBD_LL_PrepareReceive(pdev, 0U, pbuf, len); 8007fee: 687b ldr r3, [r7, #4] 8007ff0: 68ba ldr r2, [r7, #8] 8007ff2: 2100 movs r1, #0 8007ff4: 68f8 ldr r0, [r7, #12] 8007ff6: f000 fc25 bl 8008844 return USBD_OK; 8007ffa: 2300 movs r3, #0 } 8007ffc: 4618 mov r0, r3 8007ffe: 3710 adds r7, #16 8008000: 46bd mov sp, r7 8008002: bd80 pop {r7, pc} 08008004 : * send zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev) { 8008004: b580 push {r7, lr} 8008006: b082 sub sp, #8 8008008: af00 add r7, sp, #0 800800a: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_IN; 800800c: 687b ldr r3, [r7, #4] 800800e: 2204 movs r2, #4 8008010: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ (void)USBD_LL_Transmit(pdev, 0x00U, NULL, 0U); 8008014: 2300 movs r3, #0 8008016: 2200 movs r2, #0 8008018: 2100 movs r1, #0 800801a: 6878 ldr r0, [r7, #4] 800801c: f000 fbf1 bl 8008802 return USBD_OK; 8008020: 2300 movs r3, #0 } 8008022: 4618 mov r0, r3 8008024: 3708 adds r7, #8 8008026: 46bd mov sp, r7 8008028: bd80 pop {r7, pc} 0800802a : * receive zero lzngth packet on the ctl pipe * @param pdev: device instance * @retval status */ USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev) { 800802a: b580 push {r7, lr} 800802c: b082 sub sp, #8 800802e: af00 add r7, sp, #0 8008030: 6078 str r0, [r7, #4] /* Set EP0 State */ pdev->ep0_state = USBD_EP0_STATUS_OUT; 8008032: 687b ldr r3, [r7, #4] 8008034: 2205 movs r2, #5 8008036: f8c3 2294 str.w r2, [r3, #660] @ 0x294 /* Start the transfer */ (void)USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U); 800803a: 2300 movs r3, #0 800803c: 2200 movs r2, #0 800803e: 2100 movs r1, #0 8008040: 6878 ldr r0, [r7, #4] 8008042: f000 fbff bl 8008844 return USBD_OK; 8008046: 2300 movs r3, #0 } 8008048: 4618 mov r0, r3 800804a: 3708 adds r7, #8 800804c: 46bd mov sp, r7 800804e: bd80 pop {r7, pc} 08008050 : /** * Init USB device Library, add supported class and start the library * @retval None */ void MX_USB_DEVICE_Init(void) { 8008050: b580 push {r7, lr} 8008052: af00 add r7, sp, #0 /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ /* USER CODE END USB_DEVICE_Init_PreTreatment */ /* Init Device Library, add supported class and start the library. */ if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK) 8008054: 2200 movs r2, #0 8008056: 490e ldr r1, [pc, #56] @ (8008090 ) 8008058: 480e ldr r0, [pc, #56] @ (8008094 ) 800805a: f7fe fcd1 bl 8006a00 800805e: 4603 mov r3, r0 8008060: 2b00 cmp r3, #0 8008062: d001 beq.n 8008068 { Error_Handler(); 8008064: f7f8 fd48 bl 8000af8 } if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_HID) != USBD_OK) 8008068: 490b ldr r1, [pc, #44] @ (8008098 ) 800806a: 480a ldr r0, [pc, #40] @ (8008094 ) 800806c: f7fe fcf8 bl 8006a60 8008070: 4603 mov r3, r0 8008072: 2b00 cmp r3, #0 8008074: d001 beq.n 800807a { Error_Handler(); 8008076: f7f8 fd3f bl 8000af8 } if (USBD_Start(&hUsbDeviceFS) != USBD_OK) 800807a: 4806 ldr r0, [pc, #24] @ (8008094 ) 800807c: f7fe fd26 bl 8006acc 8008080: 4603 mov r3, r0 8008082: 2b00 cmp r3, #0 8008084: d001 beq.n 800808a { Error_Handler(); 8008086: f7f8 fd37 bl 8000af8 } /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ /* USER CODE END USB_DEVICE_Init_PostTreatment */ } 800808a: bf00 nop 800808c: bd80 pop {r7, pc} 800808e: bf00 nop 8008090: 200000c0 .word 0x200000c0 8008094: 20000398 .word 0x20000398 8008098: 2000000c .word 0x2000000c 0800809c : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800809c: b480 push {r7} 800809e: b083 sub sp, #12 80080a0: af00 add r7, sp, #0 80080a2: 4603 mov r3, r0 80080a4: 6039 str r1, [r7, #0] 80080a6: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_FS_DeviceDesc); 80080a8: 683b ldr r3, [r7, #0] 80080aa: 2212 movs r2, #18 80080ac: 801a strh r2, [r3, #0] return USBD_FS_DeviceDesc; 80080ae: 4b03 ldr r3, [pc, #12] @ (80080bc ) } 80080b0: 4618 mov r0, r3 80080b2: 370c adds r7, #12 80080b4: 46bd mov sp, r7 80080b6: f85d 7b04 ldr.w r7, [sp], #4 80080ba: 4770 bx lr 80080bc: 200000e0 .word 0x200000e0 080080c0 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 80080c0: b480 push {r7} 80080c2: b083 sub sp, #12 80080c4: af00 add r7, sp, #0 80080c6: 4603 mov r3, r0 80080c8: 6039 str r1, [r7, #0] 80080ca: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_LangIDDesc); 80080cc: 683b ldr r3, [r7, #0] 80080ce: 2204 movs r2, #4 80080d0: 801a strh r2, [r3, #0] return USBD_LangIDDesc; 80080d2: 4b03 ldr r3, [pc, #12] @ (80080e0 ) } 80080d4: 4618 mov r0, r3 80080d6: 370c adds r7, #12 80080d8: 46bd mov sp, r7 80080da: f85d 7b04 ldr.w r7, [sp], #4 80080de: 4770 bx lr 80080e0: 20000100 .word 0x20000100 080080e4 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 80080e4: b580 push {r7, lr} 80080e6: b082 sub sp, #8 80080e8: af00 add r7, sp, #0 80080ea: 4603 mov r3, r0 80080ec: 6039 str r1, [r7, #0] 80080ee: 71fb strb r3, [r7, #7] if(speed == 0) 80080f0: 79fb ldrb r3, [r7, #7] 80080f2: 2b00 cmp r3, #0 80080f4: d105 bne.n 8008102 { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 80080f6: 683a ldr r2, [r7, #0] 80080f8: 4907 ldr r1, [pc, #28] @ (8008118 ) 80080fa: 4808 ldr r0, [pc, #32] @ (800811c ) 80080fc: f7ff fed6 bl 8007eac 8008100: e004 b.n 800810c } else { USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); 8008102: 683a ldr r2, [r7, #0] 8008104: 4904 ldr r1, [pc, #16] @ (8008118 ) 8008106: 4805 ldr r0, [pc, #20] @ (800811c ) 8008108: f7ff fed0 bl 8007eac } return USBD_StrDesc; 800810c: 4b02 ldr r3, [pc, #8] @ (8008118 ) } 800810e: 4618 mov r0, r3 8008110: 3708 adds r7, #8 8008112: 46bd mov sp, r7 8008114: bd80 pop {r7, pc} 8008116: bf00 nop 8008118: 20000674 .word 0x20000674 800811c: 08008a1c .word 0x08008a1c 08008120 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 8008120: b580 push {r7, lr} 8008122: b082 sub sp, #8 8008124: af00 add r7, sp, #0 8008126: 4603 mov r3, r0 8008128: 6039 str r1, [r7, #0] 800812a: 71fb strb r3, [r7, #7] UNUSED(speed); USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); 800812c: 683a ldr r2, [r7, #0] 800812e: 4904 ldr r1, [pc, #16] @ (8008140 ) 8008130: 4804 ldr r0, [pc, #16] @ (8008144 ) 8008132: f7ff febb bl 8007eac return USBD_StrDesc; 8008136: 4b02 ldr r3, [pc, #8] @ (8008140 ) } 8008138: 4618 mov r0, r3 800813a: 3708 adds r7, #8 800813c: 46bd mov sp, r7 800813e: bd80 pop {r7, pc} 8008140: 20000674 .word 0x20000674 8008144: 08008a30 .word 0x08008a30 08008148 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 8008148: b580 push {r7, lr} 800814a: b082 sub sp, #8 800814c: af00 add r7, sp, #0 800814e: 4603 mov r3, r0 8008150: 6039 str r1, [r7, #0] 8008152: 71fb strb r3, [r7, #7] UNUSED(speed); *length = USB_SIZ_STRING_SERIAL; 8008154: 683b ldr r3, [r7, #0] 8008156: 221a movs r2, #26 8008158: 801a strh r2, [r3, #0] /* Update the serial number string descriptor with the data from the unique * ID */ Get_SerialNum(); 800815a: f000 f855 bl 8008208 /* USER CODE BEGIN USBD_FS_SerialStrDescriptor */ /* USER CODE END USBD_FS_SerialStrDescriptor */ return (uint8_t *) USBD_StringSerial; 800815e: 4b02 ldr r3, [pc, #8] @ (8008168 ) } 8008160: 4618 mov r0, r3 8008162: 3708 adds r7, #8 8008164: 46bd mov sp, r7 8008166: bd80 pop {r7, pc} 8008168: 20000104 .word 0x20000104 0800816c : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 800816c: b580 push {r7, lr} 800816e: b082 sub sp, #8 8008170: af00 add r7, sp, #0 8008172: 4603 mov r3, r0 8008174: 6039 str r1, [r7, #0] 8008176: 71fb strb r3, [r7, #7] if(speed == USBD_SPEED_HIGH) 8008178: 79fb ldrb r3, [r7, #7] 800817a: 2b00 cmp r3, #0 800817c: d105 bne.n 800818a { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800817e: 683a ldr r2, [r7, #0] 8008180: 4907 ldr r1, [pc, #28] @ (80081a0 ) 8008182: 4808 ldr r0, [pc, #32] @ (80081a4 ) 8008184: f7ff fe92 bl 8007eac 8008188: e004 b.n 8008194 } else { USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); 800818a: 683a ldr r2, [r7, #0] 800818c: 4904 ldr r1, [pc, #16] @ (80081a0 ) 800818e: 4805 ldr r0, [pc, #20] @ (80081a4 ) 8008190: f7ff fe8c bl 8007eac } return USBD_StrDesc; 8008194: 4b02 ldr r3, [pc, #8] @ (80081a0 ) } 8008196: 4618 mov r0, r3 8008198: 3708 adds r7, #8 800819a: 46bd mov sp, r7 800819c: bd80 pop {r7, pc} 800819e: bf00 nop 80081a0: 20000674 .word 0x20000674 80081a4: 08008a3c .word 0x08008a3c 080081a8 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 80081a8: b580 push {r7, lr} 80081aa: b082 sub sp, #8 80081ac: af00 add r7, sp, #0 80081ae: 4603 mov r3, r0 80081b0: 6039 str r1, [r7, #0] 80081b2: 71fb strb r3, [r7, #7] if(speed == 0) 80081b4: 79fb ldrb r3, [r7, #7] 80081b6: 2b00 cmp r3, #0 80081b8: d105 bne.n 80081c6 { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 80081ba: 683a ldr r2, [r7, #0] 80081bc: 4907 ldr r1, [pc, #28] @ (80081dc ) 80081be: 4808 ldr r0, [pc, #32] @ (80081e0 ) 80081c0: f7ff fe74 bl 8007eac 80081c4: e004 b.n 80081d0 } else { USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); 80081c6: 683a ldr r2, [r7, #0] 80081c8: 4904 ldr r1, [pc, #16] @ (80081dc ) 80081ca: 4805 ldr r0, [pc, #20] @ (80081e0 ) 80081cc: f7ff fe6e bl 8007eac } return USBD_StrDesc; 80081d0: 4b02 ldr r3, [pc, #8] @ (80081dc ) } 80081d2: 4618 mov r0, r3 80081d4: 3708 adds r7, #8 80081d6: 46bd mov sp, r7 80081d8: bd80 pop {r7, pc} 80081da: bf00 nop 80081dc: 20000674 .word 0x20000674 80081e0: 08008a48 .word 0x08008a48 080081e4 : * @param speed : Current device speed * @param length : Pointer to data length variable * @retval Pointer to descriptor buffer */ uint8_t * USBD_FS_USR_BOSDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) { 80081e4: b480 push {r7} 80081e6: b083 sub sp, #12 80081e8: af00 add r7, sp, #0 80081ea: 4603 mov r3, r0 80081ec: 6039 str r1, [r7, #0] 80081ee: 71fb strb r3, [r7, #7] UNUSED(speed); *length = sizeof(USBD_FS_BOSDesc); 80081f0: 683b ldr r3, [r7, #0] 80081f2: 220c movs r2, #12 80081f4: 801a strh r2, [r3, #0] return (uint8_t*)USBD_FS_BOSDesc; 80081f6: 4b03 ldr r3, [pc, #12] @ (8008204 ) } 80081f8: 4618 mov r0, r3 80081fa: 370c adds r7, #12 80081fc: 46bd mov sp, r7 80081fe: f85d 7b04 ldr.w r7, [sp], #4 8008202: 4770 bx lr 8008204: 200000f4 .word 0x200000f4 08008208 : * @brief Create the serial number string descriptor * @param None * @retval None */ static void Get_SerialNum(void) { 8008208: b580 push {r7, lr} 800820a: b084 sub sp, #16 800820c: af00 add r7, sp, #0 uint32_t deviceserial0; uint32_t deviceserial1; uint32_t deviceserial2; deviceserial0 = *(uint32_t *) DEVICE_ID1; 800820e: 4b0f ldr r3, [pc, #60] @ (800824c ) 8008210: 681b ldr r3, [r3, #0] 8008212: 60fb str r3, [r7, #12] deviceserial1 = *(uint32_t *) DEVICE_ID2; 8008214: 4b0e ldr r3, [pc, #56] @ (8008250 ) 8008216: 681b ldr r3, [r3, #0] 8008218: 60bb str r3, [r7, #8] deviceserial2 = *(uint32_t *) DEVICE_ID3; 800821a: 4b0e ldr r3, [pc, #56] @ (8008254 ) 800821c: 681b ldr r3, [r3, #0] 800821e: 607b str r3, [r7, #4] deviceserial0 += deviceserial2; 8008220: 68fa ldr r2, [r7, #12] 8008222: 687b ldr r3, [r7, #4] 8008224: 4413 add r3, r2 8008226: 60fb str r3, [r7, #12] if (deviceserial0 != 0) 8008228: 68fb ldr r3, [r7, #12] 800822a: 2b00 cmp r3, #0 800822c: d009 beq.n 8008242 { IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8); 800822e: 2208 movs r2, #8 8008230: 4909 ldr r1, [pc, #36] @ (8008258 ) 8008232: 68f8 ldr r0, [r7, #12] 8008234: f000 f814 bl 8008260 IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4); 8008238: 2204 movs r2, #4 800823a: 4908 ldr r1, [pc, #32] @ (800825c ) 800823c: 68b8 ldr r0, [r7, #8] 800823e: f000 f80f bl 8008260 } } 8008242: bf00 nop 8008244: 3710 adds r7, #16 8008246: 46bd mov sp, r7 8008248: bd80 pop {r7, pc} 800824a: bf00 nop 800824c: 1fff7a10 .word 0x1fff7a10 8008250: 1fff7a14 .word 0x1fff7a14 8008254: 1fff7a18 .word 0x1fff7a18 8008258: 20000106 .word 0x20000106 800825c: 20000116 .word 0x20000116 08008260 : * @param pbuf: pointer to the buffer * @param len: buffer length * @retval None */ static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len) { 8008260: b480 push {r7} 8008262: b087 sub sp, #28 8008264: af00 add r7, sp, #0 8008266: 60f8 str r0, [r7, #12] 8008268: 60b9 str r1, [r7, #8] 800826a: 4613 mov r3, r2 800826c: 71fb strb r3, [r7, #7] uint8_t idx = 0; 800826e: 2300 movs r3, #0 8008270: 75fb strb r3, [r7, #23] for (idx = 0; idx < len; idx++) 8008272: 2300 movs r3, #0 8008274: 75fb strb r3, [r7, #23] 8008276: e027 b.n 80082c8 { if (((value >> 28)) < 0xA) 8008278: 68fb ldr r3, [r7, #12] 800827a: 0f1b lsrs r3, r3, #28 800827c: 2b09 cmp r3, #9 800827e: d80b bhi.n 8008298 { pbuf[2 * idx] = (value >> 28) + '0'; 8008280: 68fb ldr r3, [r7, #12] 8008282: 0f1b lsrs r3, r3, #28 8008284: b2da uxtb r2, r3 8008286: 7dfb ldrb r3, [r7, #23] 8008288: 005b lsls r3, r3, #1 800828a: 4619 mov r1, r3 800828c: 68bb ldr r3, [r7, #8] 800828e: 440b add r3, r1 8008290: 3230 adds r2, #48 @ 0x30 8008292: b2d2 uxtb r2, r2 8008294: 701a strb r2, [r3, #0] 8008296: e00a b.n 80082ae } else { pbuf[2 * idx] = (value >> 28) + 'A' - 10; 8008298: 68fb ldr r3, [r7, #12] 800829a: 0f1b lsrs r3, r3, #28 800829c: b2da uxtb r2, r3 800829e: 7dfb ldrb r3, [r7, #23] 80082a0: 005b lsls r3, r3, #1 80082a2: 4619 mov r1, r3 80082a4: 68bb ldr r3, [r7, #8] 80082a6: 440b add r3, r1 80082a8: 3237 adds r2, #55 @ 0x37 80082aa: b2d2 uxtb r2, r2 80082ac: 701a strb r2, [r3, #0] } value = value << 4; 80082ae: 68fb ldr r3, [r7, #12] 80082b0: 011b lsls r3, r3, #4 80082b2: 60fb str r3, [r7, #12] pbuf[2 * idx + 1] = 0; 80082b4: 7dfb ldrb r3, [r7, #23] 80082b6: 005b lsls r3, r3, #1 80082b8: 3301 adds r3, #1 80082ba: 68ba ldr r2, [r7, #8] 80082bc: 4413 add r3, r2 80082be: 2200 movs r2, #0 80082c0: 701a strb r2, [r3, #0] for (idx = 0; idx < len; idx++) 80082c2: 7dfb ldrb r3, [r7, #23] 80082c4: 3301 adds r3, #1 80082c6: 75fb strb r3, [r7, #23] 80082c8: 7dfa ldrb r2, [r7, #23] 80082ca: 79fb ldrb r3, [r7, #7] 80082cc: 429a cmp r2, r3 80082ce: d3d3 bcc.n 8008278 } } 80082d0: bf00 nop 80082d2: bf00 nop 80082d4: 371c adds r7, #28 80082d6: 46bd mov sp, r7 80082d8: f85d 7b04 ldr.w r7, [sp], #4 80082dc: 4770 bx lr ... 080082e0 : LL Driver Callbacks (PCD -> USB Device Library) *******************************************************************************/ /* MSP Init */ void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) { 80082e0: b580 push {r7, lr} 80082e2: b0a0 sub sp, #128 @ 0x80 80082e4: af00 add r7, sp, #0 80082e6: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 80082e8: f107 036c add.w r3, r7, #108 @ 0x6c 80082ec: 2200 movs r2, #0 80082ee: 601a str r2, [r3, #0] 80082f0: 605a str r2, [r3, #4] 80082f2: 609a str r2, [r3, #8] 80082f4: 60da str r2, [r3, #12] 80082f6: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 80082f8: f107 0310 add.w r3, r7, #16 80082fc: 225c movs r2, #92 @ 0x5c 80082fe: 2100 movs r1, #0 8008300: 4618 mov r0, r3 8008302: f000 fb53 bl 80089ac if(pcdHandle->Instance==USB_OTG_FS) 8008306: 687b ldr r3, [r7, #4] 8008308: 681b ldr r3, [r3, #0] 800830a: f1b3 4fa0 cmp.w r3, #1342177280 @ 0x50000000 800830e: d149 bne.n 80083a4 /* USER CODE END USB_OTG_FS_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48; 8008310: f44f 7380 mov.w r3, #256 @ 0x100 8008314: 613b str r3, [r7, #16] PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48CLKSOURCE_PLLQ; 8008316: 2300 movs r3, #0 8008318: 667b str r3, [r7, #100] @ 0x64 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 800831a: f107 0310 add.w r3, r7, #16 800831e: 4618 mov r0, r3 8008320: f7fa feec bl 80030fc 8008324: 4603 mov r3, r0 8008326: 2b00 cmp r3, #0 8008328: d001 beq.n 800832e { Error_Handler(); 800832a: f7f8 fbe5 bl 8000af8 } __HAL_RCC_GPIOA_CLK_ENABLE(); 800832e: 2300 movs r3, #0 8008330: 60fb str r3, [r7, #12] 8008332: 4b1e ldr r3, [pc, #120] @ (80083ac ) 8008334: 6b1b ldr r3, [r3, #48] @ 0x30 8008336: 4a1d ldr r2, [pc, #116] @ (80083ac ) 8008338: f043 0301 orr.w r3, r3, #1 800833c: 6313 str r3, [r2, #48] @ 0x30 800833e: 4b1b ldr r3, [pc, #108] @ (80083ac ) 8008340: 6b1b ldr r3, [r3, #48] @ 0x30 8008342: f003 0301 and.w r3, r3, #1 8008346: 60fb str r3, [r7, #12] 8008348: 68fb ldr r3, [r7, #12] /**USB_OTG_FS GPIO Configuration PA11 ------> USB_OTG_FS_DM PA12 ------> USB_OTG_FS_DP */ GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; 800834a: f44f 53c0 mov.w r3, #6144 @ 0x1800 800834e: 66fb str r3, [r7, #108] @ 0x6c GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8008350: 2302 movs r3, #2 8008352: 673b str r3, [r7, #112] @ 0x70 GPIO_InitStruct.Pull = GPIO_NOPULL; 8008354: 2300 movs r3, #0 8008356: 677b str r3, [r7, #116] @ 0x74 GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8008358: 2303 movs r3, #3 800835a: 67bb str r3, [r7, #120] @ 0x78 GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; 800835c: 230a movs r3, #10 800835e: 67fb str r3, [r7, #124] @ 0x7c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8008360: f107 036c add.w r3, r7, #108 @ 0x6c 8008364: 4619 mov r1, r3 8008366: 4812 ldr r0, [pc, #72] @ (80083b0 ) 8008368: f7f9 f836 bl 80013d8 /* Peripheral clock enable */ __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); 800836c: 4b0f ldr r3, [pc, #60] @ (80083ac ) 800836e: 6b5b ldr r3, [r3, #52] @ 0x34 8008370: 4a0e ldr r2, [pc, #56] @ (80083ac ) 8008372: f043 0380 orr.w r3, r3, #128 @ 0x80 8008376: 6353 str r3, [r2, #52] @ 0x34 8008378: 2300 movs r3, #0 800837a: 60bb str r3, [r7, #8] 800837c: 4b0b ldr r3, [pc, #44] @ (80083ac ) 800837e: 6c5b ldr r3, [r3, #68] @ 0x44 8008380: 4a0a ldr r2, [pc, #40] @ (80083ac ) 8008382: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8008386: 6453 str r3, [r2, #68] @ 0x44 8008388: 4b08 ldr r3, [pc, #32] @ (80083ac ) 800838a: 6c5b ldr r3, [r3, #68] @ 0x44 800838c: f403 4380 and.w r3, r3, #16384 @ 0x4000 8008390: 60bb str r3, [r7, #8] 8008392: 68bb ldr r3, [r7, #8] /* Peripheral interrupt init */ HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0); 8008394: 2200 movs r2, #0 8008396: 2100 movs r1, #0 8008398: 2043 movs r0, #67 @ 0x43 800839a: f7f8 ffe6 bl 800136a HAL_NVIC_EnableIRQ(OTG_FS_IRQn); 800839e: 2043 movs r0, #67 @ 0x43 80083a0: f7f8 ffff bl 80013a2 /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */ /* USER CODE END USB_OTG_FS_MspInit 1 */ } } 80083a4: bf00 nop 80083a6: 3780 adds r7, #128 @ 0x80 80083a8: 46bd mov sp, r7 80083aa: bd80 pop {r7, pc} 80083ac: 40023800 .word 0x40023800 80083b0: 40020000 .word 0x40020000 080083b4 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 80083b4: b580 push {r7, lr} 80083b6: b082 sub sp, #8 80083b8: af00 add r7, sp, #0 80083ba: 6078 str r0, [r7, #4] USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); 80083bc: 687b ldr r3, [r7, #4] 80083be: f8d3 24e0 ldr.w r2, [r3, #1248] @ 0x4e0 80083c2: 687b ldr r3, [r7, #4] 80083c4: f203 439c addw r3, r3, #1180 @ 0x49c 80083c8: 4619 mov r1, r3 80083ca: 4610 mov r0, r2 80083cc: f7fe fbcb bl 8006b66 } 80083d0: bf00 nop 80083d2: 3708 adds r7, #8 80083d4: 46bd mov sp, r7 80083d6: bd80 pop {r7, pc} 080083d8 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 80083d8: b580 push {r7, lr} 80083da: b082 sub sp, #8 80083dc: af00 add r7, sp, #0 80083de: 6078 str r0, [r7, #4] 80083e0: 460b mov r3, r1 80083e2: 70fb strb r3, [r7, #3] USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); 80083e4: 687b ldr r3, [r7, #4] 80083e6: f8d3 04e0 ldr.w r0, [r3, #1248] @ 0x4e0 80083ea: 78fa ldrb r2, [r7, #3] 80083ec: 6879 ldr r1, [r7, #4] 80083ee: 4613 mov r3, r2 80083f0: 00db lsls r3, r3, #3 80083f2: 4413 add r3, r2 80083f4: 009b lsls r3, r3, #2 80083f6: 440b add r3, r1 80083f8: f503 7318 add.w r3, r3, #608 @ 0x260 80083fc: 681a ldr r2, [r3, #0] 80083fe: 78fb ldrb r3, [r7, #3] 8008400: 4619 mov r1, r3 8008402: f7fe fc05 bl 8006c10 } 8008406: bf00 nop 8008408: 3708 adds r7, #8 800840a: 46bd mov sp, r7 800840c: bd80 pop {r7, pc} 0800840e : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800840e: b580 push {r7, lr} 8008410: b082 sub sp, #8 8008412: af00 add r7, sp, #0 8008414: 6078 str r0, [r7, #4] 8008416: 460b mov r3, r1 8008418: 70fb strb r3, [r7, #3] USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); 800841a: 687b ldr r3, [r7, #4] 800841c: f8d3 04e0 ldr.w r0, [r3, #1248] @ 0x4e0 8008420: 78fa ldrb r2, [r7, #3] 8008422: 6879 ldr r1, [r7, #4] 8008424: 4613 mov r3, r2 8008426: 00db lsls r3, r3, #3 8008428: 4413 add r3, r2 800842a: 009b lsls r3, r3, #2 800842c: 440b add r3, r1 800842e: 3320 adds r3, #32 8008430: 681a ldr r2, [r3, #0] 8008432: 78fb ldrb r3, [r7, #3] 8008434: 4619 mov r1, r3 8008436: f7fe fca7 bl 8006d88 } 800843a: bf00 nop 800843c: 3708 adds r7, #8 800843e: 46bd mov sp, r7 8008440: bd80 pop {r7, pc} 08008442 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8008442: b580 push {r7, lr} 8008444: b082 sub sp, #8 8008446: af00 add r7, sp, #0 8008448: 6078 str r0, [r7, #4] USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); 800844a: 687b ldr r3, [r7, #4] 800844c: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 8008450: 4618 mov r0, r3 8008452: f7fe fdeb bl 800702c } 8008456: bf00 nop 8008458: 3708 adds r7, #8 800845a: 46bd mov sp, r7 800845c: bd80 pop {r7, pc} 0800845e : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800845e: b580 push {r7, lr} 8008460: b084 sub sp, #16 8008462: af00 add r7, sp, #0 8008464: 6078 str r0, [r7, #4] USBD_SpeedTypeDef speed = USBD_SPEED_FULL; 8008466: 2301 movs r3, #1 8008468: 73fb strb r3, [r7, #15] if ( hpcd->Init.speed == PCD_SPEED_HIGH) 800846a: 687b ldr r3, [r7, #4] 800846c: 79db ldrb r3, [r3, #7] 800846e: 2b00 cmp r3, #0 8008470: d102 bne.n 8008478 { speed = USBD_SPEED_HIGH; 8008472: 2300 movs r3, #0 8008474: 73fb strb r3, [r7, #15] 8008476: e008 b.n 800848a } else if ( hpcd->Init.speed == PCD_SPEED_FULL) 8008478: 687b ldr r3, [r7, #4] 800847a: 79db ldrb r3, [r3, #7] 800847c: 2b02 cmp r3, #2 800847e: d102 bne.n 8008486 { speed = USBD_SPEED_FULL; 8008480: 2301 movs r3, #1 8008482: 73fb strb r3, [r7, #15] 8008484: e001 b.n 800848a } else { Error_Handler(); 8008486: f7f8 fb37 bl 8000af8 } /* Set Speed. */ USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); 800848a: 687b ldr r3, [r7, #4] 800848c: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 8008490: 7bfa ldrb r2, [r7, #15] 8008492: 4611 mov r1, r2 8008494: 4618 mov r0, r3 8008496: f7fe fd85 bl 8006fa4 /* Reset Device. */ USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); 800849a: 687b ldr r3, [r7, #4] 800849c: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 80084a0: 4618 mov r0, r3 80084a2: f7fe fd2c bl 8006efe } 80084a6: bf00 nop 80084a8: 3710 adds r7, #16 80084aa: 46bd mov sp, r7 80084ac: bd80 pop {r7, pc} ... 080084b0 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 80084b0: b580 push {r7, lr} 80084b2: b082 sub sp, #8 80084b4: af00 add r7, sp, #0 80084b6: 6078 str r0, [r7, #4] /* Inform USB library that core enters in suspend Mode. */ USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); 80084b8: 687b ldr r3, [r7, #4] 80084ba: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 80084be: 4618 mov r0, r3 80084c0: f7fe fd80 bl 8006fc4 __HAL_PCD_GATE_PHYCLOCK(hpcd); 80084c4: 687b ldr r3, [r7, #4] 80084c6: 681b ldr r3, [r3, #0] 80084c8: f503 6360 add.w r3, r3, #3584 @ 0xe00 80084cc: 681b ldr r3, [r3, #0] 80084ce: 687a ldr r2, [r7, #4] 80084d0: 6812 ldr r2, [r2, #0] 80084d2: f502 6260 add.w r2, r2, #3584 @ 0xe00 80084d6: f043 0301 orr.w r3, r3, #1 80084da: 6013 str r3, [r2, #0] /* Enter in STOP mode. */ /* USER CODE BEGIN 2 */ if (hpcd->Init.low_power_enable) 80084dc: 687b ldr r3, [r7, #4] 80084de: 7adb ldrb r3, [r3, #11] 80084e0: 2b00 cmp r3, #0 80084e2: d005 beq.n 80084f0 { /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 80084e4: 4b04 ldr r3, [pc, #16] @ (80084f8 ) 80084e6: 691b ldr r3, [r3, #16] 80084e8: 4a03 ldr r2, [pc, #12] @ (80084f8 ) 80084ea: f043 0306 orr.w r3, r3, #6 80084ee: 6113 str r3, [r2, #16] } /* USER CODE END 2 */ } 80084f0: bf00 nop 80084f2: 3708 adds r7, #8 80084f4: 46bd mov sp, r7 80084f6: bd80 pop {r7, pc} 80084f8: e000ed00 .word 0xe000ed00 080084fc : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 80084fc: b580 push {r7, lr} 80084fe: b082 sub sp, #8 8008500: af00 add r7, sp, #0 8008502: 6078 str r0, [r7, #4] /* USER CODE BEGIN 3 */ /* USER CODE END 3 */ USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); 8008504: 687b ldr r3, [r7, #4] 8008506: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 800850a: 4618 mov r0, r3 800850c: f7fe fd76 bl 8006ffc } 8008510: bf00 nop 8008512: 3708 adds r7, #8 8008514: 46bd mov sp, r7 8008516: bd80 pop {r7, pc} 08008518 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8008518: b580 push {r7, lr} 800851a: b082 sub sp, #8 800851c: af00 add r7, sp, #0 800851e: 6078 str r0, [r7, #4] 8008520: 460b mov r3, r1 8008522: 70fb strb r3, [r7, #3] USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); 8008524: 687b ldr r3, [r7, #4] 8008526: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 800852a: 78fa ldrb r2, [r7, #3] 800852c: 4611 mov r1, r2 800852e: 4618 mov r0, r3 8008530: f7fe fdce bl 80070d0 } 8008534: bf00 nop 8008536: 3708 adds r7, #8 8008538: 46bd mov sp, r7 800853a: bd80 pop {r7, pc} 0800853c : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #else void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800853c: b580 push {r7, lr} 800853e: b082 sub sp, #8 8008540: af00 add r7, sp, #0 8008542: 6078 str r0, [r7, #4] 8008544: 460b mov r3, r1 8008546: 70fb strb r3, [r7, #3] USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); 8008548: 687b ldr r3, [r7, #4] 800854a: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 800854e: 78fa ldrb r2, [r7, #3] 8008550: 4611 mov r1, r2 8008552: 4618 mov r0, r3 8008554: f7fe fd8a bl 800706c } 8008558: bf00 nop 800855a: 3708 adds r7, #8 800855c: 46bd mov sp, r7 800855e: bd80 pop {r7, pc} 08008560 : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 8008560: b580 push {r7, lr} 8008562: b082 sub sp, #8 8008564: af00 add r7, sp, #0 8008566: 6078 str r0, [r7, #4] USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData); 8008568: 687b ldr r3, [r7, #4] 800856a: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 800856e: 4618 mov r0, r3 8008570: f7fe fde0 bl 8007134 } 8008574: bf00 nop 8008576: 3708 adds r7, #8 8008578: 46bd mov sp, r7 800857a: bd80 pop {r7, pc} 0800857c : #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) static void PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) #else void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ { 800857c: b580 push {r7, lr} 800857e: b082 sub sp, #8 8008580: af00 add r7, sp, #0 8008582: 6078 str r0, [r7, #4] USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData); 8008584: 687b ldr r3, [r7, #4] 8008586: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 800858a: 4618 mov r0, r3 800858c: f7fe fddd bl 800714a } 8008590: bf00 nop 8008592: 3708 adds r7, #8 8008594: 46bd mov sp, r7 8008596: bd80 pop {r7, pc} 08008598 : * @brief Initializes the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) { 8008598: b580 push {r7, lr} 800859a: b082 sub sp, #8 800859c: af00 add r7, sp, #0 800859e: 6078 str r0, [r7, #4] /* Init USB Ip. */ if (pdev->id == DEVICE_FS) { 80085a0: 687b ldr r3, [r7, #4] 80085a2: 781b ldrb r3, [r3, #0] 80085a4: 2b00 cmp r3, #0 80085a6: d13c bne.n 8008622 /* Link the driver to the stack. */ hpcd_USB_OTG_FS.pData = pdev; 80085a8: 4a20 ldr r2, [pc, #128] @ (800862c ) 80085aa: 687b ldr r3, [r7, #4] 80085ac: f8c2 34e0 str.w r3, [r2, #1248] @ 0x4e0 pdev->pData = &hpcd_USB_OTG_FS; 80085b0: 687b ldr r3, [r7, #4] 80085b2: 4a1e ldr r2, [pc, #120] @ (800862c ) 80085b4: f8c3 22c8 str.w r2, [r3, #712] @ 0x2c8 hpcd_USB_OTG_FS.Instance = USB_OTG_FS; 80085b8: 4b1c ldr r3, [pc, #112] @ (800862c ) 80085ba: f04f 42a0 mov.w r2, #1342177280 @ 0x50000000 80085be: 601a str r2, [r3, #0] hpcd_USB_OTG_FS.Init.dev_endpoints = 6; 80085c0: 4b1a ldr r3, [pc, #104] @ (800862c ) 80085c2: 2206 movs r2, #6 80085c4: 711a strb r2, [r3, #4] hpcd_USB_OTG_FS.Init.speed = PCD_SPEED_FULL; 80085c6: 4b19 ldr r3, [pc, #100] @ (800862c ) 80085c8: 2202 movs r2, #2 80085ca: 71da strb r2, [r3, #7] hpcd_USB_OTG_FS.Init.dma_enable = DISABLE; 80085cc: 4b17 ldr r3, [pc, #92] @ (800862c ) 80085ce: 2200 movs r2, #0 80085d0: 719a strb r2, [r3, #6] hpcd_USB_OTG_FS.Init.phy_itface = PCD_PHY_EMBEDDED; 80085d2: 4b16 ldr r3, [pc, #88] @ (800862c ) 80085d4: 2202 movs r2, #2 80085d6: 725a strb r2, [r3, #9] hpcd_USB_OTG_FS.Init.Sof_enable = DISABLE; 80085d8: 4b14 ldr r3, [pc, #80] @ (800862c ) 80085da: 2200 movs r2, #0 80085dc: 729a strb r2, [r3, #10] hpcd_USB_OTG_FS.Init.low_power_enable = DISABLE; 80085de: 4b13 ldr r3, [pc, #76] @ (800862c ) 80085e0: 2200 movs r2, #0 80085e2: 72da strb r2, [r3, #11] hpcd_USB_OTG_FS.Init.lpm_enable = DISABLE; 80085e4: 4b11 ldr r3, [pc, #68] @ (800862c ) 80085e6: 2200 movs r2, #0 80085e8: 731a strb r2, [r3, #12] hpcd_USB_OTG_FS.Init.vbus_sensing_enable = DISABLE; 80085ea: 4b10 ldr r3, [pc, #64] @ (800862c ) 80085ec: 2200 movs r2, #0 80085ee: 739a strb r2, [r3, #14] hpcd_USB_OTG_FS.Init.use_dedicated_ep1 = DISABLE; 80085f0: 4b0e ldr r3, [pc, #56] @ (800862c ) 80085f2: 2200 movs r2, #0 80085f4: 73da strb r2, [r3, #15] if (HAL_PCD_Init(&hpcd_USB_OTG_FS) != HAL_OK) 80085f6: 480d ldr r0, [pc, #52] @ (800862c ) 80085f8: f7f9 f9e0 bl 80019bc 80085fc: 4603 mov r3, r0 80085fe: 2b00 cmp r3, #0 8008600: d001 beq.n 8008606 { Error_Handler( ); 8008602: f7f8 fa79 bl 8000af8 HAL_PCD_RegisterDataOutStageCallback(&hpcd_USB_OTG_FS, PCD_DataOutStageCallback); HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_OTG_FS, PCD_DataInStageCallback); HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOOUTIncompleteCallback); HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_OTG_FS, PCD_ISOINIncompleteCallback); #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ HAL_PCDEx_SetRxFiFo(&hpcd_USB_OTG_FS, 0x80); 8008606: 2180 movs r1, #128 @ 0x80 8008608: 4808 ldr r0, [pc, #32] @ (800862c ) 800860a: f7fa fc28 bl 8002e5e HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 0, 0x40); 800860e: 2240 movs r2, #64 @ 0x40 8008610: 2100 movs r1, #0 8008612: 4806 ldr r0, [pc, #24] @ (800862c ) 8008614: f7fa fbdc bl 8002dd0 HAL_PCDEx_SetTxFiFo(&hpcd_USB_OTG_FS, 1, 0x80); 8008618: 2280 movs r2, #128 @ 0x80 800861a: 2101 movs r1, #1 800861c: 4803 ldr r0, [pc, #12] @ (800862c ) 800861e: f7fa fbd7 bl 8002dd0 } return USBD_OK; 8008622: 2300 movs r3, #0 } 8008624: 4618 mov r0, r3 8008626: 3708 adds r7, #8 8008628: 46bd mov sp, r7 800862a: bd80 pop {r7, pc} 800862c: 20000874 .word 0x20000874 08008630 : * @brief Starts the low level portion of the device driver. * @param pdev: Device handle * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) { 8008630: b580 push {r7, lr} 8008632: b084 sub sp, #16 8008634: af00 add r7, sp, #0 8008636: 6078 str r0, [r7, #4] HAL_StatusTypeDef hal_status = HAL_OK; 8008638: 2300 movs r3, #0 800863a: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800863c: 2300 movs r3, #0 800863e: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_Start(pdev->pData); 8008640: 687b ldr r3, [r7, #4] 8008642: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 8008646: 4618 mov r0, r3 8008648: f7f9 face bl 8001be8 800864c: 4603 mov r3, r0 800864e: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 8008650: 7bfb ldrb r3, [r7, #15] 8008652: 4618 mov r0, r3 8008654: f000 f97e bl 8008954 8008658: 4603 mov r3, r0 800865a: 73bb strb r3, [r7, #14] return usb_status; 800865c: 7bbb ldrb r3, [r7, #14] } 800865e: 4618 mov r0, r3 8008660: 3710 adds r7, #16 8008662: 46bd mov sp, r7 8008664: bd80 pop {r7, pc} 08008666 : * @param ep_type: Endpoint type * @param ep_mps: Endpoint max packet size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps) { 8008666: b580 push {r7, lr} 8008668: b084 sub sp, #16 800866a: af00 add r7, sp, #0 800866c: 6078 str r0, [r7, #4] 800866e: 4608 mov r0, r1 8008670: 4611 mov r1, r2 8008672: 461a mov r2, r3 8008674: 4603 mov r3, r0 8008676: 70fb strb r3, [r7, #3] 8008678: 460b mov r3, r1 800867a: 70bb strb r3, [r7, #2] 800867c: 4613 mov r3, r2 800867e: 803b strh r3, [r7, #0] HAL_StatusTypeDef hal_status = HAL_OK; 8008680: 2300 movs r3, #0 8008682: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 8008684: 2300 movs r3, #0 8008686: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); 8008688: 687b ldr r3, [r7, #4] 800868a: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8 800868e: 78bb ldrb r3, [r7, #2] 8008690: 883a ldrh r2, [r7, #0] 8008692: 78f9 ldrb r1, [r7, #3] 8008694: f7f9 ffcf bl 8002636 8008698: 4603 mov r3, r0 800869a: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 800869c: 7bfb ldrb r3, [r7, #15] 800869e: 4618 mov r0, r3 80086a0: f000 f958 bl 8008954 80086a4: 4603 mov r3, r0 80086a6: 73bb strb r3, [r7, #14] return usb_status; 80086a8: 7bbb ldrb r3, [r7, #14] } 80086aa: 4618 mov r0, r3 80086ac: 3710 adds r7, #16 80086ae: 46bd mov sp, r7 80086b0: bd80 pop {r7, pc} 080086b2 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 80086b2: b580 push {r7, lr} 80086b4: b084 sub sp, #16 80086b6: af00 add r7, sp, #0 80086b8: 6078 str r0, [r7, #4] 80086ba: 460b mov r3, r1 80086bc: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 80086be: 2300 movs r3, #0 80086c0: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 80086c2: 2300 movs r3, #0 80086c4: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); 80086c6: 687b ldr r3, [r7, #4] 80086c8: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 80086cc: 78fa ldrb r2, [r7, #3] 80086ce: 4611 mov r1, r2 80086d0: 4618 mov r0, r3 80086d2: f7fa f81a bl 800270a 80086d6: 4603 mov r3, r0 80086d8: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 80086da: 7bfb ldrb r3, [r7, #15] 80086dc: 4618 mov r0, r3 80086de: f000 f939 bl 8008954 80086e2: 4603 mov r3, r0 80086e4: 73bb strb r3, [r7, #14] return usb_status; 80086e6: 7bbb ldrb r3, [r7, #14] } 80086e8: 4618 mov r0, r3 80086ea: 3710 adds r7, #16 80086ec: 46bd mov sp, r7 80086ee: bd80 pop {r7, pc} 080086f0 : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 80086f0: b580 push {r7, lr} 80086f2: b084 sub sp, #16 80086f4: af00 add r7, sp, #0 80086f6: 6078 str r0, [r7, #4] 80086f8: 460b mov r3, r1 80086fa: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 80086fc: 2300 movs r3, #0 80086fe: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 8008700: 2300 movs r3, #0 8008702: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); 8008704: 687b ldr r3, [r7, #4] 8008706: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 800870a: 78fa ldrb r2, [r7, #3] 800870c: 4611 mov r1, r2 800870e: 4618 mov r0, r3 8008710: f7fa f8ba bl 8002888 8008714: 4603 mov r3, r0 8008716: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 8008718: 7bfb ldrb r3, [r7, #15] 800871a: 4618 mov r0, r3 800871c: f000 f91a bl 8008954 8008720: 4603 mov r3, r0 8008722: 73bb strb r3, [r7, #14] return usb_status; 8008724: 7bbb ldrb r3, [r7, #14] } 8008726: 4618 mov r0, r3 8008728: 3710 adds r7, #16 800872a: 46bd mov sp, r7 800872c: bd80 pop {r7, pc} 0800872e : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval USBD status */ USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800872e: b580 push {r7, lr} 8008730: b084 sub sp, #16 8008732: af00 add r7, sp, #0 8008734: 6078 str r0, [r7, #4] 8008736: 460b mov r3, r1 8008738: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 800873a: 2300 movs r3, #0 800873c: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 800873e: 2300 movs r3, #0 8008740: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); 8008742: 687b ldr r3, [r7, #4] 8008744: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 8008748: 78fa ldrb r2, [r7, #3] 800874a: 4611 mov r1, r2 800874c: 4618 mov r0, r3 800874e: f7fa f8fe bl 800294e 8008752: 4603 mov r3, r0 8008754: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 8008756: 7bfb ldrb r3, [r7, #15] 8008758: 4618 mov r0, r3 800875a: f000 f8fb bl 8008954 800875e: 4603 mov r3, r0 8008760: 73bb strb r3, [r7, #14] return usb_status; 8008762: 7bbb ldrb r3, [r7, #14] } 8008764: 4618 mov r0, r3 8008766: 3710 adds r7, #16 8008768: 46bd mov sp, r7 800876a: bd80 pop {r7, pc} 0800876c : * @param pdev: Device handle * @param ep_addr: Endpoint number * @retval Stall (1: Yes, 0: No) */ uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) { 800876c: b480 push {r7} 800876e: b085 sub sp, #20 8008770: af00 add r7, sp, #0 8008772: 6078 str r0, [r7, #4] 8008774: 460b mov r3, r1 8008776: 70fb strb r3, [r7, #3] PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; 8008778: 687b ldr r3, [r7, #4] 800877a: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 800877e: 60fb str r3, [r7, #12] if((ep_addr & 0x80) == 0x80) 8008780: f997 3003 ldrsb.w r3, [r7, #3] 8008784: 2b00 cmp r3, #0 8008786: da0b bge.n 80087a0 { return hpcd->IN_ep[ep_addr & 0x7F].is_stall; 8008788: 78fb ldrb r3, [r7, #3] 800878a: f003 027f and.w r2, r3, #127 @ 0x7f 800878e: 68f9 ldr r1, [r7, #12] 8008790: 4613 mov r3, r2 8008792: 00db lsls r3, r3, #3 8008794: 4413 add r3, r2 8008796: 009b lsls r3, r3, #2 8008798: 440b add r3, r1 800879a: 3316 adds r3, #22 800879c: 781b ldrb r3, [r3, #0] 800879e: e00b b.n 80087b8 } else { return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; 80087a0: 78fb ldrb r3, [r7, #3] 80087a2: f003 027f and.w r2, r3, #127 @ 0x7f 80087a6: 68f9 ldr r1, [r7, #12] 80087a8: 4613 mov r3, r2 80087aa: 00db lsls r3, r3, #3 80087ac: 4413 add r3, r2 80087ae: 009b lsls r3, r3, #2 80087b0: 440b add r3, r1 80087b2: f203 2356 addw r3, r3, #598 @ 0x256 80087b6: 781b ldrb r3, [r3, #0] } } 80087b8: 4618 mov r0, r3 80087ba: 3714 adds r7, #20 80087bc: 46bd mov sp, r7 80087be: f85d 7b04 ldr.w r7, [sp], #4 80087c2: 4770 bx lr 080087c4 : * @param pdev: Device handle * @param dev_addr: Device address * @retval USBD status */ USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) { 80087c4: b580 push {r7, lr} 80087c6: b084 sub sp, #16 80087c8: af00 add r7, sp, #0 80087ca: 6078 str r0, [r7, #4] 80087cc: 460b mov r3, r1 80087ce: 70fb strb r3, [r7, #3] HAL_StatusTypeDef hal_status = HAL_OK; 80087d0: 2300 movs r3, #0 80087d2: 73fb strb r3, [r7, #15] USBD_StatusTypeDef usb_status = USBD_OK; 80087d4: 2300 movs r3, #0 80087d6: 73bb strb r3, [r7, #14] hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); 80087d8: 687b ldr r3, [r7, #4] 80087da: f8d3 32c8 ldr.w r3, [r3, #712] @ 0x2c8 80087de: 78fa ldrb r2, [r7, #3] 80087e0: 4611 mov r1, r2 80087e2: 4618 mov r0, r3 80087e4: f7f9 ff03 bl 80025ee 80087e8: 4603 mov r3, r0 80087ea: 73fb strb r3, [r7, #15] usb_status = USBD_Get_USB_Status(hal_status); 80087ec: 7bfb ldrb r3, [r7, #15] 80087ee: 4618 mov r0, r3 80087f0: f000 f8b0 bl 8008954 80087f4: 4603 mov r3, r0 80087f6: 73bb strb r3, [r7, #14] return usb_status; 80087f8: 7bbb ldrb r3, [r7, #14] } 80087fa: 4618 mov r0, r3 80087fc: 3710 adds r7, #16 80087fe: 46bd mov sp, r7 8008800: bd80 pop {r7, pc} 08008802 : * @param pbuf: Pointer to data to be sent * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size) { 8008802: b580 push {r7, lr} 8008804: b086 sub sp, #24 8008806: af00 add r7, sp, #0 8008808: 60f8 str r0, [r7, #12] 800880a: 607a str r2, [r7, #4] 800880c: 603b str r3, [r7, #0] 800880e: 460b mov r3, r1 8008810: 72fb strb r3, [r7, #11] HAL_StatusTypeDef hal_status = HAL_OK; 8008812: 2300 movs r3, #0 8008814: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 8008816: 2300 movs r3, #0 8008818: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); 800881a: 68fb ldr r3, [r7, #12] 800881c: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8 8008820: 7af9 ldrb r1, [r7, #11] 8008822: 683b ldr r3, [r7, #0] 8008824: 687a ldr r2, [r7, #4] 8008826: f7f9 fff5 bl 8002814 800882a: 4603 mov r3, r0 800882c: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 800882e: 7dfb ldrb r3, [r7, #23] 8008830: 4618 mov r0, r3 8008832: f000 f88f bl 8008954 8008836: 4603 mov r3, r0 8008838: 75bb strb r3, [r7, #22] return usb_status; 800883a: 7dbb ldrb r3, [r7, #22] } 800883c: 4618 mov r0, r3 800883e: 3718 adds r7, #24 8008840: 46bd mov sp, r7 8008842: bd80 pop {r7, pc} 08008844 : * @param pbuf: Pointer to data to be received * @param size: Data size * @retval USBD status */ USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint32_t size) { 8008844: b580 push {r7, lr} 8008846: b086 sub sp, #24 8008848: af00 add r7, sp, #0 800884a: 60f8 str r0, [r7, #12] 800884c: 607a str r2, [r7, #4] 800884e: 603b str r3, [r7, #0] 8008850: 460b mov r3, r1 8008852: 72fb strb r3, [r7, #11] HAL_StatusTypeDef hal_status = HAL_OK; 8008854: 2300 movs r3, #0 8008856: 75fb strb r3, [r7, #23] USBD_StatusTypeDef usb_status = USBD_OK; 8008858: 2300 movs r3, #0 800885a: 75bb strb r3, [r7, #22] hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); 800885c: 68fb ldr r3, [r7, #12] 800885e: f8d3 02c8 ldr.w r0, [r3, #712] @ 0x2c8 8008862: 7af9 ldrb r1, [r7, #11] 8008864: 683b ldr r3, [r7, #0] 8008866: 687a ldr r2, [r7, #4] 8008868: f7f9 ff99 bl 800279e 800886c: 4603 mov r3, r0 800886e: 75fb strb r3, [r7, #23] usb_status = USBD_Get_USB_Status(hal_status); 8008870: 7dfb ldrb r3, [r7, #23] 8008872: 4618 mov r0, r3 8008874: f000 f86e bl 8008954 8008878: 4603 mov r3, r0 800887a: 75bb strb r3, [r7, #22] return usb_status; 800887c: 7dbb ldrb r3, [r7, #22] } 800887e: 4618 mov r0, r3 8008880: 3718 adds r7, #24 8008882: 46bd mov sp, r7 8008884: bd80 pop {r7, pc} ... 08008888 : * @param hpcd: PCD handle * @param msg: LPM message * @retval None */ void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) { 8008888: b580 push {r7, lr} 800888a: b082 sub sp, #8 800888c: af00 add r7, sp, #0 800888e: 6078 str r0, [r7, #4] 8008890: 460b mov r3, r1 8008892: 70fb strb r3, [r7, #3] switch (msg) 8008894: 78fb ldrb r3, [r7, #3] 8008896: 2b00 cmp r3, #0 8008898: d002 beq.n 80088a0 800889a: 2b01 cmp r3, #1 800889c: d01f beq.n 80088de /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); } break; } } 800889e: e03b b.n 8008918 if (hpcd->Init.low_power_enable) 80088a0: 687b ldr r3, [r7, #4] 80088a2: 7adb ldrb r3, [r3, #11] 80088a4: 2b00 cmp r3, #0 80088a6: d007 beq.n 80088b8 SystemClock_Config(); 80088a8: f7f7 fe6e bl 8000588 SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 80088ac: 4b1c ldr r3, [pc, #112] @ (8008920 ) 80088ae: 691b ldr r3, [r3, #16] 80088b0: 4a1b ldr r2, [pc, #108] @ (8008920 ) 80088b2: f023 0306 bic.w r3, r3, #6 80088b6: 6113 str r3, [r2, #16] __HAL_PCD_UNGATE_PHYCLOCK(hpcd); 80088b8: 687b ldr r3, [r7, #4] 80088ba: 681b ldr r3, [r3, #0] 80088bc: f503 6360 add.w r3, r3, #3584 @ 0xe00 80088c0: 681b ldr r3, [r3, #0] 80088c2: 687a ldr r2, [r7, #4] 80088c4: 6812 ldr r2, [r2, #0] 80088c6: f502 6260 add.w r2, r2, #3584 @ 0xe00 80088ca: f023 0301 bic.w r3, r3, #1 80088ce: 6013 str r3, [r2, #0] USBD_LL_Resume(hpcd->pData); 80088d0: 687b ldr r3, [r7, #4] 80088d2: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 80088d6: 4618 mov r0, r3 80088d8: f7fe fb90 bl 8006ffc break; 80088dc: e01c b.n 8008918 __HAL_PCD_GATE_PHYCLOCK(hpcd); 80088de: 687b ldr r3, [r7, #4] 80088e0: 681b ldr r3, [r3, #0] 80088e2: f503 6360 add.w r3, r3, #3584 @ 0xe00 80088e6: 681b ldr r3, [r3, #0] 80088e8: 687a ldr r2, [r7, #4] 80088ea: 6812 ldr r2, [r2, #0] 80088ec: f502 6260 add.w r2, r2, #3584 @ 0xe00 80088f0: f043 0301 orr.w r3, r3, #1 80088f4: 6013 str r3, [r2, #0] USBD_LL_Suspend(hpcd->pData); 80088f6: 687b ldr r3, [r7, #4] 80088f8: f8d3 34e0 ldr.w r3, [r3, #1248] @ 0x4e0 80088fc: 4618 mov r0, r3 80088fe: f7fe fb61 bl 8006fc4 if (hpcd->Init.low_power_enable) 8008902: 687b ldr r3, [r7, #4] 8008904: 7adb ldrb r3, [r3, #11] 8008906: 2b00 cmp r3, #0 8008908: d005 beq.n 8008916 SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); 800890a: 4b05 ldr r3, [pc, #20] @ (8008920 ) 800890c: 691b ldr r3, [r3, #16] 800890e: 4a04 ldr r2, [pc, #16] @ (8008920 ) 8008910: f043 0306 orr.w r3, r3, #6 8008914: 6113 str r3, [r2, #16] break; 8008916: bf00 nop } 8008918: bf00 nop 800891a: 3708 adds r7, #8 800891c: 46bd mov sp, r7 800891e: bd80 pop {r7, pc} 8008920: e000ed00 .word 0xe000ed00 08008924 : * @brief Static single allocation. * @param size: Size of allocated memory * @retval None */ void *USBD_static_malloc(uint32_t size) { 8008924: b480 push {r7} 8008926: b083 sub sp, #12 8008928: af00 add r7, sp, #0 800892a: 6078 str r0, [r7, #4] static uint32_t mem[(sizeof(USBD_HID_HandleTypeDef)/4)+1];/* On 32-bit boundary */ return mem; 800892c: 4b03 ldr r3, [pc, #12] @ (800893c ) } 800892e: 4618 mov r0, r3 8008930: 370c adds r7, #12 8008932: 46bd mov sp, r7 8008934: f85d 7b04 ldr.w r7, [sp], #4 8008938: 4770 bx lr 800893a: bf00 nop 800893c: 20000d58 .word 0x20000d58 08008940 : * @brief Dummy memory free * @param p: Pointer to allocated memory address * @retval None */ void USBD_static_free(void *p) { 8008940: b480 push {r7} 8008942: b083 sub sp, #12 8008944: af00 add r7, sp, #0 8008946: 6078 str r0, [r7, #4] } 8008948: bf00 nop 800894a: 370c adds r7, #12 800894c: 46bd mov sp, r7 800894e: f85d 7b04 ldr.w r7, [sp], #4 8008952: 4770 bx lr 08008954 : * @brief Returns the USB status depending on the HAL status: * @param hal_status: HAL status * @retval USB status */ USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status) { 8008954: b480 push {r7} 8008956: b085 sub sp, #20 8008958: af00 add r7, sp, #0 800895a: 4603 mov r3, r0 800895c: 71fb strb r3, [r7, #7] USBD_StatusTypeDef usb_status = USBD_OK; 800895e: 2300 movs r3, #0 8008960: 73fb strb r3, [r7, #15] switch (hal_status) 8008962: 79fb ldrb r3, [r7, #7] 8008964: 2b03 cmp r3, #3 8008966: d817 bhi.n 8008998 8008968: a201 add r2, pc, #4 @ (adr r2, 8008970 ) 800896a: f852 f023 ldr.w pc, [r2, r3, lsl #2] 800896e: bf00 nop 8008970: 08008981 .word 0x08008981 8008974: 08008987 .word 0x08008987 8008978: 0800898d .word 0x0800898d 800897c: 08008993 .word 0x08008993 { case HAL_OK : usb_status = USBD_OK; 8008980: 2300 movs r3, #0 8008982: 73fb strb r3, [r7, #15] break; 8008984: e00b b.n 800899e case HAL_ERROR : usb_status = USBD_FAIL; 8008986: 2303 movs r3, #3 8008988: 73fb strb r3, [r7, #15] break; 800898a: e008 b.n 800899e case HAL_BUSY : usb_status = USBD_BUSY; 800898c: 2301 movs r3, #1 800898e: 73fb strb r3, [r7, #15] break; 8008990: e005 b.n 800899e case HAL_TIMEOUT : usb_status = USBD_FAIL; 8008992: 2303 movs r3, #3 8008994: 73fb strb r3, [r7, #15] break; 8008996: e002 b.n 800899e default : usb_status = USBD_FAIL; 8008998: 2303 movs r3, #3 800899a: 73fb strb r3, [r7, #15] break; 800899c: bf00 nop } return usb_status; 800899e: 7bfb ldrb r3, [r7, #15] } 80089a0: 4618 mov r0, r3 80089a2: 3714 adds r7, #20 80089a4: 46bd mov sp, r7 80089a6: f85d 7b04 ldr.w r7, [sp], #4 80089aa: 4770 bx lr 080089ac : 80089ac: 4402 add r2, r0 80089ae: 4603 mov r3, r0 80089b0: 4293 cmp r3, r2 80089b2: d100 bne.n 80089b6 80089b4: 4770 bx lr 80089b6: f803 1b01 strb.w r1, [r3], #1 80089ba: e7f9 b.n 80089b0 080089bc <__libc_init_array>: 80089bc: b570 push {r4, r5, r6, lr} 80089be: 4d0d ldr r5, [pc, #52] @ (80089f4 <__libc_init_array+0x38>) 80089c0: 4c0d ldr r4, [pc, #52] @ (80089f8 <__libc_init_array+0x3c>) 80089c2: 1b64 subs r4, r4, r5 80089c4: 10a4 asrs r4, r4, #2 80089c6: 2600 movs r6, #0 80089c8: 42a6 cmp r6, r4 80089ca: d109 bne.n 80089e0 <__libc_init_array+0x24> 80089cc: 4d0b ldr r5, [pc, #44] @ (80089fc <__libc_init_array+0x40>) 80089ce: 4c0c ldr r4, [pc, #48] @ (8008a00 <__libc_init_array+0x44>) 80089d0: f000 f818 bl 8008a04 <_init> 80089d4: 1b64 subs r4, r4, r5 80089d6: 10a4 asrs r4, r4, #2 80089d8: 2600 movs r6, #0 80089da: 42a6 cmp r6, r4 80089dc: d105 bne.n 80089ea <__libc_init_array+0x2e> 80089de: bd70 pop {r4, r5, r6, pc} 80089e0: f855 3b04 ldr.w r3, [r5], #4 80089e4: 4798 blx r3 80089e6: 3601 adds r6, #1 80089e8: e7ee b.n 80089c8 <__libc_init_array+0xc> 80089ea: f855 3b04 ldr.w r3, [r5], #4 80089ee: 4798 blx r3 80089f0: 3601 adds r6, #1 80089f2: e7f2 b.n 80089da <__libc_init_array+0x1e> 80089f4: 08008a78 .word 0x08008a78 80089f8: 08008a78 .word 0x08008a78 80089fc: 08008a78 .word 0x08008a78 8008a00: 08008a7c .word 0x08008a7c 08008a04 <_init>: 8008a04: b5f8 push {r3, r4, r5, r6, r7, lr} 8008a06: bf00 nop 8008a08: bcf8 pop {r3, r4, r5, r6, r7} 8008a0a: bc08 pop {r3} 8008a0c: 469e mov lr, r3 8008a0e: 4770 bx lr 08008a10 <_fini>: 8008a10: b5f8 push {r3, r4, r5, r6, r7, lr} 8008a12: bf00 nop 8008a14: bcf8 pop {r3, r4, r5, r6, r7} 8008a16: bc08 pop {r3} 8008a18: 469e mov lr, r3 8008a1a: 4770 bx lr