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Some work on the GPIO, enabled DMA for TX as well

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This commit is contained in:
Oliver "Kim" Avecilla Cabral
2025-08-25 17:56:49 -07:00
parent 70ad2130fe
commit 826ddbcb1d
10 changed files with 1018 additions and 644 deletions
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0
firmware/core/Core/Inc/keys.h Normal file
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194
firmware/core/Core/Inc/numpad.h Normal file
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@@ -0,0 +1,194 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __NUMPAD_H
#define __NUMPAD_H
#ifdef __cplusplus
extern "C" {
#endif
#define ROWS 6
#define COLS 4
// Modifier Keys
#define KEY_LEFT_CTRL 0xE0
#define KEY_LEFT_SHIFT 0xE1
#define KEY_LEFT_ALT 0xE2
#define KEY_LEFT_GUI 0xE3
#define KEY_RIGHT_CTRL 0xE4
#define KEY_RIGHT_SHIFT 0xE5
#define KEY_RIGHT_ALT 0xE6
#define KEY_RIGHT_GUI 0xE7
// Regular Keys (Usage ID 0x04–0x73)
#define KEY_A 0x04
#define KEY_B 0x05
#define KEY_C 0x06
#define KEY_D 0x07
#define KEY_E 0x08
#define KEY_F 0x09
#define KEY_G 0x0A
#define KEY_H 0x0B
#define KEY_I 0x0C
#define KEY_J 0x0D
#define KEY_K 0x0E
#define KEY_L 0x0F
#define KEY_M 0x10
#define KEY_N 0x11
#define KEY_O 0x12
#define KEY_P 0x13
#define KEY_Q 0x14
#define KEY_R 0x15
#define KEY_S 0x16
#define KEY_T 0x17
#define KEY_U 0x18
#define KEY_V 0x19
#define KEY_W 0x1A
#define KEY_X 0x1B
#define KEY_Y 0x1C
#define KEY_Z 0x1D
#define KEY_1 0x1E
#define KEY_2 0x1F
#define KEY_3 0x20
#define KEY_4 0x21
#define KEY_5 0x22
#define KEY_6 0x23
#define KEY_7 0x24
#define KEY_8 0x25
#define KEY_9 0x26
#define KEY_0 0x27
#define KEY_ENTER 0x28
#define KEY_ESC 0x29
#define KEY_BACKSPACE 0x2A
#define KEY_TAB 0x2B
#define KEY_SPACE 0x2C
#define KEY_MINUS 0x2D
#define KEY_EQUAL 0x2E
#define KEY_LEFT_BRACKET 0x2F
#define KEY_RIGHT_BRACKET 0x30
#define KEY_BACKSLASH 0x31
#define KEY_NON_US_HASH 0x32
#define KEY_SEMICOLON 0x33
#define KEY_APOSTROPHE 0x34
#define KEY_GRAVE 0x35
#define KEY_COMMA 0x36
#define KEY_PERIOD 0x37
#define KEY_SLASH 0x38
#define KEY_CAPS_LOCK 0x39
// Function Keys
#define KEY_F1 0x3A
#define KEY_F2 0x3B
#define KEY_F3 0x3C
#define KEY_F4 0x3D
#define KEY_F5 0x3E
#define KEY_F6 0x3F
#define KEY_F7 0x40
#define KEY_F8 0x41
#define KEY_F9 0x42
#define KEY_F10 0x43
#define KEY_F11 0x44
#define KEY_F12 0x45
#define KEY_PRINT_SCREEN 0x46
#define KEY_SCROLL_LOCK 0x47
#define KEY_PAUSE 0x48
// Navigation Keys
#define KEY_INSERT 0x49
#define KEY_HOME 0x4A
#define KEY_PAGE_UP 0x4B
#define KEY_DELETE 0x4C
#define KEY_END 0x4D
#define KEY_PAGE_DOWN 0x4E
#define KEY_RIGHT_ARROW 0x4F
#define KEY_LEFT_ARROW 0x50
#define KEY_DOWN_ARROW 0x51
#define KEY_UP_ARROW 0x52
// Keypad
#define KEY_NUM_LOCK 0x53
#define KEYPAD_SLASH 0x54
#define KEYPAD_ASTERISK 0x55
#define KEYPAD_MINUS 0x56
#define KEYPAD_PLUS 0x57
#define KEYPAD_ENTER 0x58
#define KEYPAD_1 0x59
#define KEYPAD_2 0x5A
#define KEYPAD_3 0x5B
#define KEYPAD_4 0x5C
#define KEYPAD_5 0x5D
#define KEYPAD_6 0x5E
#define KEYPAD_7 0x5F
#define KEYPAD_8 0x60
#define KEYPAD_9 0x61
#define KEYPAD_0 0x62
#define KEYPAD_DOT 0x63
// Misc/Non-US
#define KEY_NON_US_BACKSLASH 0x64
#define KEY_APPLICATION 0x65
#define KEY_POWER 0x66
#define KEYPAD_EQUAL 0x67
#define KEY_F13 0x68
#define KEY_F14 0x69
#define KEY_F15 0x6A
#define KEY_F16 0x6B
#define KEY_F17 0x6C
#define KEY_F18 0x6D
#define KEY_F19 0x6E
#define KEY_F20 0x6F
#define KEY_F21 0x70
#define KEY_F22 0x71
#define KEY_F23 0x72
#define KEY_F24 0x73
typedef struct{
GPIO_TypeDef* PORT;
uint16_t PIN;
} KbdPins;
KbdPins row_pins[ROWS] = {
{GPIOC, GPIO_PIN_6},
{GPIOB, GPIO_PIN_15}
};
KbdPins col_pins[COLS] = {
{GPIOB, GPIO_PIN_14},
{GPIOB, GPIO_PIN_13}
};
uint8_t matrix[ROWS][COLS] = {
{KEY_0, KEY_1, KEY_2, KEY_3},
{KEY_0, KEY_1, KEY_2, KEY_3},
{KEY_0, KEY_1, KEY_2, KEY_3},
{KEY_0, KEY_1, KEY_2, KEY_3},
{KEY_0, KEY_1, KEY_2, KEY_3},
{KEY_0, KEY_1, KEY_2, KEY_3},
};
#ifdef __cplusplus
}
#endif
#endif /* __NUMPAD_H */

125
firmware/core/Core/Src/main.c
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@@ -1,5 +1,7 @@
#include "main.h" #include "main.h"
#include "numpad.h"
#include "usb_device.h" #include "usb_device.h"
#include "usbd_hid.h"
#include <stdbool.h> #include <stdbool.h>
#define MODE_INACTIVE 0 #define MODE_INACTIVE 0
@@ -9,6 +11,8 @@
#define MODULE_HANDSHAKE_REQUEST 0x000F0000 #define MODULE_HANDSHAKE_REQUEST 0x000F0000
extern USBD_HandleTypeDef hUsbDeviceFS;
typedef struct{ typedef struct{
uint8_t data[4]; uint8_t data[4];
} Packet; } Packet;
@@ -19,17 +23,28 @@ typedef struct {
volatile uint16_t tail; volatile uint16_t tail;
} DMA_QUEUE; } DMA_QUEUE;
typedef struct{
uint8_t MODIFIER;
uint8_t RESERVED;
uint8_t KEYPRESS[12];
} HIDReportNKRO;
DMA_QUEUE RxQueue; DMA_QUEUE RxQueue;
uint8_t DMA_RX_BUFFER[4]; uint8_t DMA_RX_BUFFER_N[4];
uint8_t DMA_RX_BUFFER_E[4];
uint8_t DMA_RX_BUFFER_S[4];
uint8_t DMA_RX_BUFFER_W[4];
I2C_HandleTypeDef hi2c1; I2C_HandleTypeDef hi2c1;
TIM_HandleTypeDef htim3; TIM_HandleTypeDef htim3;
UART_HandleTypeDef huart4; HIDReportNKRO USB_REPORT;
UART_HandleTypeDef huart5;
UART_HandleTypeDef huart1; UART_HandleTypeDef huart4; //West
UART_HandleTypeDef huart2; UART_HandleTypeDef huart5; //North
UART_HandleTypeDef* UART_PORTS[] = { &huart4, &huart5, &huart1, &huart2 }; UART_HandleTypeDef huart1; //East
UART_HandleTypeDef huart2; //South
UART_HandleTypeDef* UART_PORTS[] = { &huart5, &huart1, &huart2, &huart4 };
UART_HandleTypeDef* PARENT; UART_HandleTypeDef* PARENT;
DMA_HandleTypeDef hdma_uart4_rx; DMA_HandleTypeDef hdma_uart4_rx;
DMA_HandleTypeDef hdma_uart5_rx; DMA_HandleTypeDef hdma_uart5_rx;
@@ -48,7 +63,7 @@ static void MX_UART5_Init(void);
static void MX_USART1_UART_Init(void); static void MX_USART1_UART_Init(void);
static void MX_USART2_UART_Init(void); static void MX_USART2_UART_Init(void);
void DMA_Queue_Init(DMA_QUEUE* q); void DMA_Queue_Init(DMA_QUEUE* q);
void addHIDReport(uint8_t usageID, uint8_t isPressed);
int main(void) int main(void)
{ {
@@ -76,14 +91,32 @@ int main(void)
switch(CURRENT_MODE){ switch(CURRENT_MODE){
case MODE_INACTIVE: case MODE_INACTIVE:
//TODO: Check if connected VIA USB, If so switch to master mode
if (hUsbDeviceFS.dev_state == USBD_STATE_CONFIGURED) {
CURRENT_MODE = MODE_MASTER;
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET);
break;
}
uint8_t candidates_depth[] = {0xFF, 0xFF, 0xFF, 0xFF}; uint8_t candidates_depth[] = {0xFF, 0xFF, 0xFF, 0xFF};
//Poll all UART Ports //Poll all UART Ports
for(uint8_t i = 0; i<4; i++){ for(uint8_t i = 0; i<4; i++){
uint8_t rxBuffer[4] = {0}; uint8_t rxBuffer[4] = {0};
uint8_t msg[4] = {0x00, 0x0F, 0x00, 0x00}; uint8_t msg[4] = {0x00, 0x0F, 0x00, 0x00};
//Send request
HAL_UART_Transmit(UART_PORTS[i], msg, 4, HAL_MAX_DELAY); HAL_UART_Transmit(UART_PORTS[i], msg, 4, HAL_MAX_DELAY);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET);
//Await Response
if (HAL_UART_Receive(UART_PORTS[i], rxBuffer, 4, 500) == HAL_OK) { if (HAL_UART_Receive(UART_PORTS[i], rxBuffer, 4, 500) == HAL_OK) {
//Is a type of confirmation message //Is a type of confirmation message
if(rxBuffer[1] == 0xFF){ if(rxBuffer[1] == 0xFF){
@@ -95,6 +128,10 @@ int main(void)
// Timeout or error // Timeout or error
candidates_depth[i] = 0xFF; candidates_depth[i] = 0xFF;
} }
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_RESET);
} }
// Arbitration: 0xFF means invalid // Arbitration: 0xFF means invalid
@@ -107,10 +144,30 @@ int main(void)
best_parent = i; best_parent = i;
} }
} }
if(best_parent != 0xFF){ // found a valid parent if(best_parent != 0xFF){ // found a valid parent
PARENT = UART_PORTS[best_parent]; // assign UART handle pointer PARENT = UART_PORTS[best_parent]; // assign UART handle pointer
CURRENT_MODE = MODE_MODULE; CURRENT_MODE = MODE_MODULE;
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_RESET);
switch(best_parent){
case 0:
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_7, GPIO_PIN_SET);
break;
case 1:
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_SET);
break;
case 2:
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_5, GPIO_PIN_SET);
break;
case 3:
HAL_GPIO_WritePin(GPIOB, GPIO_PIN_4, GPIO_PIN_SET);
break;
} }
}
break; break;
case MODE_MODULE: case MODE_MODULE:
@@ -120,23 +177,59 @@ int main(void)
case MODE_MASTER: case MODE_MASTER:
DMA_Queue_Init(&RxQueue); DMA_Queue_Init(&RxQueue);
//TODO: Sending to USB and key keyscanning
for(int col = 0; col < COLS; col++){
HAL_GPIO_WritePin(col_pins[col].PORT, col_pins[col].PIN, GPIO_PIN_SET);
HAL_Delay(1);
for(int row = 0; row < ROWS; row++){
if(HAL_GPIO_ReadPin(row_pins[row].PORT, row_pins[row].PIN)){
addHIDReport(matrix[row][col], 1);
}
}
HAL_GPIO_WritePin(col_pins[col].PORT, col_pins[col].PIN, GPIO_PIN_RESET);
}
//Send USB Report
USBD_HID_SendReport(&hUsbDeviceFS, (uint8_t*)&USB_REPORT, sizeof(USB_REPORT));
HAL_Delay(20);
break; break;
} }
} }
} }
void addHIDReport(uint8_t usageID, uint8_t isPressed){
if(usageID < 0x04 || usageID > 0x73) return; //Usage ID is out of bounds
uint16_t bit_index = usageID - 0x04; //Offset, UsageID starts with 0x04. Gives us the actual value of the bit
uint8_t byte_index = bit_index/8; //Calculates which byte in the REPORT array
uint8_t bit_offset = bit_index%8; //Calculates which bits in the REPORT[byte_index] should be set/unset
if(isPressed){
USB_REPORT.KEYPRESS[byte_index] |= (1 << bit_offset);
}else{
USB_REPORT.KEYPRESS[byte_index] &= ~(1 << bit_offset);
}
}
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) { void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) {
//TODO: Handle recieved message here //TODO: Handle recieved message here
switch(CURRENT_MODE){
case MODE_MODULE:
break;
case MODE_MASTER:
//Handle master message and add to USB_REPORT
break;
}
} }
void DMA_Queue_Init(DMA_QUEUE* q){ void DMA_Queue_Init(DMA_QUEUE* q){
q->head = 0; q->head = 0;
q->tail = 0; q->tail = 0;
//Activate DMA to all ports //Activate DMA to all ports
for(uint8_t i = 0; i<4; i++){ HAL_UART_Receive_DMA(&huart5, DMA_RX_BUFFER_N, 4);
HAL_UART_Receive_DMA(UART_PORTS[i], DMA_RX_BUFFER, 4); HAL_UART_Receive_DMA(&huart1, DMA_RX_BUFFER_E, 4);
} HAL_UART_Receive_DMA(&huart2, DMA_RX_BUFFER_S, 4);
HAL_UART_Receive_DMA(&huart4, DMA_RX_BUFFER_W, 4);
} }
bool DMA_Queue_IsFull(DMA_QUEUE* q){ bool DMA_Queue_IsFull(DMA_QUEUE* q){
@@ -406,15 +499,23 @@ static void MX_DMA_Init(void)
/* DMA1_Stream0_IRQn interrupt configuration */ /* DMA1_Stream0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0); HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn); HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn);
/* DMA1_Stream2_IRQn interrupt configuration */ /* DMA1_Stream2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0); HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn); HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
/* DMA1_Stream5_IRQn interrupt configuration */ /* DMA1_Stream5_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0); HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn); HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
HAL_NVIC_SetPriority(DMA1_Stream6_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream6_IRQn);
/* DMA2_Stream2_IRQn interrupt configuration */ /* DMA2_Stream2_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
} }

0
firmware/core/build/Debug/.cmake/api/v1/reply/index-2025-08-25T20-02-26-0662.json → firmware/core/build/Debug/.cmake/api/v1/reply/index-2025-08-26T00-55-52-0186.json
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firmware/core/build/Debug/.ninja_log
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@@ -1,37 +1,37 @@
# ninja log v5 # ninja log v5
263 489 1756075615361261736 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c.obj 4642ce9ed3d82ec4 1 164 1756165287206432230 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c.obj 4642ce9ed3d82ec4
295 718 1756075615590434033 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c.obj 7e72a5f1282d8dd4 2 311 1756165287354625390 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c.obj 7e72a5f1282d8dd4
10 454 1756075615323066353 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c.obj 3f81ae684fc61263 3 321 1756165176883896870 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c.obj 3f81ae684fc61263
335 577 1756075615447703918 cmake/stm32cubemx/CMakeFiles/USB_Device_Library.dir/__/__/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c.obj a4cc0fdb515ad6bf 2 194 1756166381364492122 cmake/stm32cubemx/CMakeFiles/USB_Device_Library.dir/__/__/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c.obj a4cc0fdb515ad6bf
103 390 1756075615258737287 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c.obj aaf2ae978201821f 54 298 1756165176862316129 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c.obj aaf2ae978201821f
6 307 1756075615179331097 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Core/Src/system_stm32f4xx.c.obj 97644d51df3090f0 2 246 1756165176808898327 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Core/Src/system_stm32f4xx.c.obj 97644d51df3090f0
258 481 1756075615352215461 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c.obj 1a0236394c1509ff 1 163 1756165287206432230 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c.obj 1a0236394c1509ff
151 411 1756075615281786854 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c.obj bdbd6598695546ae 82 330 1756165176895387528 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c.obj bdbd6598695546ae
308 631 1756075615499971284 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c.obj ced7e19aeb2f5cc9 2 227 1756165287268752210 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c.obj ced7e19aeb2f5cc9
3 340 1756075615207475063 CMakeFiles/core.dir/Core/Src/stm32f4xx_it.c.obj f9b423df71363d1c 2 149 1756166381320037054 CMakeFiles/core.dir/Core/Src/stm32f4xx_it.c.obj f9b423df71363d1c
322 573 1756075615443683351 cmake/stm32cubemx/CMakeFiles/USB_Device_Library.dir/__/__/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c.obj 4e1d9e35eaef39f8 2 196 1756166381366492099 cmake/stm32cubemx/CMakeFiles/USB_Device_Library.dir/__/__/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c.obj 4e1d9e35eaef39f8
4 295 1756075615166973579 CMakeFiles/core.dir/Core/Src/stm32f4xx_hal_msp.c.obj f6485b1ec03e1db9 2 164 1756166381335630543 CMakeFiles/core.dir/Core/Src/stm32f4xx_hal_msp.c.obj f6485b1ec03e1db9
295 546 1756075615418554810 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c.obj f93aa37ce29daf31 2 164 1756165287205999246 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c.obj f93aa37ce29daf31
267 519 1756075615389642237 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c.obj 91f4151497ea87ee 1 172 1756165287213753279 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c.obj 91f4151497ea87ee
12 258 1756075615128068872 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c.obj 9984760fba525afa 6 243 1756165176807491761 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c.obj 9984760fba525afa
272 540 1756075615412523960 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c.obj eb24b13c626e9be1 1 169 1756165287210753336 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c.obj eb24b13c626e9be1
11 272 1756075615142140856 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c.obj 81fe522a3d030d30 3 296 1756165176858897355 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c.obj 81fe522a3d030d30
7 285 1756075615156212839 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c.obj 5c50b44e08689482 2 277 1756165176840897706 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd.c.obj 5c50b44e08689482
5 103 1756075614975270658 CMakeFiles/core.dir/Core/Src/sysmem.c.obj 1bea4127f50c3fda 2 54 1756165176618552094 CMakeFiles/core.dir/Core/Src/sysmem.c.obj 1bea4127f50c3fda
8 334 1756075615200439071 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c.obj b98f3f688125e870 3 230 1756165176792902734 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pcd_ex.c.obj b98f3f688125e870
13 266 1756075615138120289 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c.obj 40ca293c34955b23 7 234 1756165176795178887 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c.obj 40ca293c34955b23
3 262 1756075615134099722 CMakeFiles/core.dir/USB_DEVICE/App/usb_device.c.obj c659c1fe9a79370 1 166 1756166381337038436 CMakeFiles/core.dir/USB_DEVICE/App/usb_device.c.obj c659c1fe9a79370
70 389 1756075615251701296 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c.obj 581a4c3cc3fd4658 29 305 1756165176867897181 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c.obj 581a4c3cc3fd4658
6 149 1756075615021523857 CMakeFiles/core.dir/Core/Src/syscalls.c.obj 70d8fad01d4c7c7b 2 82 1756165176646659904 CMakeFiles/core.dir/Core/Src/syscalls.c.obj 70d8fad01d4c7c7b
303 583 1756075615453734768 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c.obj 78a83f472cf48732 2 219 1756165287261752346 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c.obj 78a83f472cf48732
3 293 1756075615164253972 CMakeFiles/core.dir/USB_DEVICE/App/usbd_desc.c.obj c04d8582764f479d 1 169 1756166381340492407 CMakeFiles/core.dir/USB_DEVICE/App/usbd_desc.c.obj c04d8582764f479d
6 63 1756075614928355803 CMakeFiles/core.dir/startup_stm32f446xx.s.obj 382da930996a4cc2 2 29 1756165176591589390 CMakeFiles/core.dir/startup_stm32f446xx.s.obj 382da930996a4cc2
286 531 1756075615402472544 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c.obj 489e696b647ded46 2 170 1756165287211753317 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_exti.c.obj 489e696b647ded46
341 585 1756075615456750193 cmake/stm32cubemx/CMakeFiles/USB_Device_Library.dir/__/__/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c.obj 73e6de5304f3589 2 177 1756166381348825043 cmake/stm32cubemx/CMakeFiles/USB_Device_Library.dir/__/__/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c.obj 73e6de5304f3589
11 362 1756075615230593321 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c.obj a04d7f696e9c0d8c 3 250 1756165176812898249 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c.obj a04d7f696e9c0d8c
10 303 1756075615174305389 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c.obj c2600fd856ec13ab 3 266 1756165176829897919 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c.obj c2600fd856ec13ab
108 192 1756093401944347283 core.elf 65fc94ad55c43ddb 122 215 1756166589848663609 core.elf 65fc94ad55c43ddb
362 579 1756075615450719343 cmake/stm32cubemx/CMakeFiles/USB_Device_Library.dir/__/__/Middlewares/ST/STM32_USB_Device_Library/Class/HID/Src/usbd_hid.c.obj 4c1ef8c3b45ecf3e 2 177 1756166381348175102 cmake/stm32cubemx/CMakeFiles/USB_Device_Library.dir/__/__/Middlewares/ST/STM32_USB_Device_Library/Class/HID/Src/usbd_hid.c.obj 4c1ef8c3b45ecf3e
1 108 1756093401865954540 CMakeFiles/core.dir/Core/Src/main.c.obj 612a7a44e98bda92 1 122 1756166589759688782 CMakeFiles/core.dir/Core/Src/main.c.obj 612a7a44e98bda92
301 688 1756075615559274642 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c.obj 31a0df46be8b277d 2 317 1756165287360387079 cmake/stm32cubemx/CMakeFiles/STM32_Drivers.dir/__/__/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c.obj 31a0df46be8b277d
2 321 1756075615190387655 CMakeFiles/core.dir/USB_DEVICE/Target/usbd_conf.c.obj 950d6fa9d73ae6e0 1 192 1756166381362492146 CMakeFiles/core.dir/USB_DEVICE/Target/usbd_conf.c.obj 950d6fa9d73ae6e0

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@@ -6,7 +6,11 @@ Dma.Request0=UART4_RX
Dma.Request1=UART5_RX Dma.Request1=UART5_RX
Dma.Request2=USART1_RX Dma.Request2=USART1_RX
Dma.Request3=USART2_RX Dma.Request3=USART2_RX
Dma.RequestsNb=4 Dma.Request4=UART4_TX
Dma.Request5=UART5_TX
Dma.Request6=USART1_TX
Dma.Request7=USART2_TX
Dma.RequestsNb=8
Dma.UART4_RX.0.Direction=DMA_PERIPH_TO_MEMORY Dma.UART4_RX.0.Direction=DMA_PERIPH_TO_MEMORY
Dma.UART4_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE Dma.UART4_RX.0.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART4_RX.0.Instance=DMA1_Stream2 Dma.UART4_RX.0.Instance=DMA1_Stream2
@@ -17,6 +21,16 @@ Dma.UART4_RX.0.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART4_RX.0.PeriphInc=DMA_PINC_DISABLE Dma.UART4_RX.0.PeriphInc=DMA_PINC_DISABLE
Dma.UART4_RX.0.Priority=DMA_PRIORITY_LOW Dma.UART4_RX.0.Priority=DMA_PRIORITY_LOW
Dma.UART4_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode Dma.UART4_RX.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.UART4_TX.4.Direction=DMA_MEMORY_TO_PERIPH
Dma.UART4_TX.4.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART4_TX.4.Instance=DMA1_Stream4
Dma.UART4_TX.4.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART4_TX.4.MemInc=DMA_MINC_ENABLE
Dma.UART4_TX.4.Mode=DMA_NORMAL
Dma.UART4_TX.4.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART4_TX.4.PeriphInc=DMA_PINC_DISABLE
Dma.UART4_TX.4.Priority=DMA_PRIORITY_LOW
Dma.UART4_TX.4.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.UART5_RX.1.Direction=DMA_PERIPH_TO_MEMORY Dma.UART5_RX.1.Direction=DMA_PERIPH_TO_MEMORY
Dma.UART5_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE Dma.UART5_RX.1.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART5_RX.1.Instance=DMA1_Stream0 Dma.UART5_RX.1.Instance=DMA1_Stream0
@@ -27,6 +41,16 @@ Dma.UART5_RX.1.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART5_RX.1.PeriphInc=DMA_PINC_DISABLE Dma.UART5_RX.1.PeriphInc=DMA_PINC_DISABLE
Dma.UART5_RX.1.Priority=DMA_PRIORITY_LOW Dma.UART5_RX.1.Priority=DMA_PRIORITY_LOW
Dma.UART5_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode Dma.UART5_RX.1.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.UART5_TX.5.Direction=DMA_MEMORY_TO_PERIPH
Dma.UART5_TX.5.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.UART5_TX.5.Instance=DMA1_Stream7
Dma.UART5_TX.5.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.UART5_TX.5.MemInc=DMA_MINC_ENABLE
Dma.UART5_TX.5.Mode=DMA_NORMAL
Dma.UART5_TX.5.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.UART5_TX.5.PeriphInc=DMA_PINC_DISABLE
Dma.UART5_TX.5.Priority=DMA_PRIORITY_LOW
Dma.UART5_TX.5.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART1_RX.2.Direction=DMA_PERIPH_TO_MEMORY Dma.USART1_RX.2.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART1_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE Dma.USART1_RX.2.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART1_RX.2.Instance=DMA2_Stream2 Dma.USART1_RX.2.Instance=DMA2_Stream2
@@ -37,6 +61,16 @@ Dma.USART1_RX.2.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART1_RX.2.PeriphInc=DMA_PINC_DISABLE Dma.USART1_RX.2.PeriphInc=DMA_PINC_DISABLE
Dma.USART1_RX.2.Priority=DMA_PRIORITY_LOW Dma.USART1_RX.2.Priority=DMA_PRIORITY_LOW
Dma.USART1_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode Dma.USART1_RX.2.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART1_TX.6.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART1_TX.6.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART1_TX.6.Instance=DMA2_Stream7
Dma.USART1_TX.6.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART1_TX.6.MemInc=DMA_MINC_ENABLE
Dma.USART1_TX.6.Mode=DMA_NORMAL
Dma.USART1_TX.6.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART1_TX.6.PeriphInc=DMA_PINC_DISABLE
Dma.USART1_TX.6.Priority=DMA_PRIORITY_LOW
Dma.USART1_TX.6.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART2_RX.3.Direction=DMA_PERIPH_TO_MEMORY Dma.USART2_RX.3.Direction=DMA_PERIPH_TO_MEMORY
Dma.USART2_RX.3.FIFOMode=DMA_FIFOMODE_DISABLE Dma.USART2_RX.3.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART2_RX.3.Instance=DMA1_Stream5 Dma.USART2_RX.3.Instance=DMA1_Stream5
@@ -47,6 +81,16 @@ Dma.USART2_RX.3.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_RX.3.PeriphInc=DMA_PINC_DISABLE Dma.USART2_RX.3.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_RX.3.Priority=DMA_PRIORITY_LOW Dma.USART2_RX.3.Priority=DMA_PRIORITY_LOW
Dma.USART2_RX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode Dma.USART2_RX.3.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
Dma.USART2_TX.7.Direction=DMA_MEMORY_TO_PERIPH
Dma.USART2_TX.7.FIFOMode=DMA_FIFOMODE_DISABLE
Dma.USART2_TX.7.Instance=DMA1_Stream6
Dma.USART2_TX.7.MemDataAlignment=DMA_MDATAALIGN_BYTE
Dma.USART2_TX.7.MemInc=DMA_MINC_ENABLE
Dma.USART2_TX.7.Mode=DMA_NORMAL
Dma.USART2_TX.7.PeriphDataAlignment=DMA_PDATAALIGN_BYTE
Dma.USART2_TX.7.PeriphInc=DMA_PINC_DISABLE
Dma.USART2_TX.7.Priority=DMA_PRIORITY_LOW
Dma.USART2_TX.7.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
File.Version=6 File.Version=6
GPIO.groupedBy=Group By Peripherals GPIO.groupedBy=Group By Peripherals
KeepUserPlacement=false KeepUserPlacement=false
@@ -110,8 +154,12 @@ MxDb.Version=DB.6.0.150
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.DMA1_Stream0_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true NVIC.DMA1_Stream0_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA1_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true NVIC.DMA1_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA1_Stream4_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA1_Stream5_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true NVIC.DMA1_Stream5_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA1_Stream6_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA1_Stream7_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA2_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true NVIC.DMA2_Stream2_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DMA2_Stream7_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.ForceEnableDMAVector=true NVIC.ForceEnableDMAVector=true
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false