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numpad configuration

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This commit is contained in:
Oliver "Kim" Avecilla Cabral
2025-09-23 14:46:22 -07:00
parent c97a0956e2
commit 59729453a5
18 changed files with 16612 additions and 15901 deletions
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36
firmware/modularkbd/Debug/Core/Src/main.cyclo
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../Core/Src/main.c:150:5:main 5
../Core/Src/main.c:245:6:SystemClock_Config 3
../Core/Src/main.c:292:13:MX_I2C1_Init 2
../Core/Src/main.c:326:13:MX_TIM2_Init 4
../Core/Src/main.c:375:13:MX_TIM3_Init 3
../Core/Src/main.c:424:13:MX_UART4_Init 2
../Core/Src/main.c:457:13:MX_UART5_Init 2
../Core/Src/main.c:490:13:MX_USART1_UART_Init 2
../Core/Src/main.c:523:13:MX_USART2_UART_Init 2
../Core/Src/main.c:556:13:MX_USART3_UART_Init 2
../Core/Src/main.c:583:13:MX_DMA_Init 1
../Core/Src/main.c:623:13:MX_GPIO_Init 1
../Core/Src/main.c:676:6:HAL_UART_RxCpltCallback 2
../Core/Src/main.c:683:6:handleUARTMessages 5
../Core/Src/main.c:710:6:addUSBReport 3
../Core/Src/main.c:718:6:matrixScan 4
../Core/Src/main.c:731:6:resetReport 1
../Core/Src/main.c:742:6:Error_Handler 1
../Core/Src/main.c:170:5:main 5
../Core/Src/main.c:265:6:SystemClock_Config 3
../Core/Src/main.c:312:13:MX_I2C1_Init 2
../Core/Src/main.c:346:13:MX_TIM2_Init 4
../Core/Src/main.c:395:13:MX_TIM3_Init 3
../Core/Src/main.c:444:13:MX_UART4_Init 2
../Core/Src/main.c:477:13:MX_UART5_Init 2
../Core/Src/main.c:510:13:MX_USART1_UART_Init 2
../Core/Src/main.c:543:13:MX_USART2_UART_Init 2
../Core/Src/main.c:576:13:MX_USART3_UART_Init 2
../Core/Src/main.c:603:13:MX_DMA_Init 1
../Core/Src/main.c:643:13:MX_GPIO_Init 1
../Core/Src/main.c:696:6:HAL_UART_RxCpltCallback 2
../Core/Src/main.c:703:6:handleUARTMessages 5
../Core/Src/main.c:730:6:addUSBReport 3
../Core/Src/main.c:738:6:matrixScan 4
../Core/Src/main.c:751:6:resetReport 1
../Core/Src/main.c:762:6:Error_Handler 1

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firmware/modularkbd/Debug/Core/Src/main.o
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36
firmware/modularkbd/Debug/Core/Src/main.su
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@@ -1,18 +1,18 @@
../Core/Src/main.c:150:5:main 24 static
../Core/Src/main.c:245:6:SystemClock_Config 88 static
../Core/Src/main.c:292:13:MX_I2C1_Init 8 static
../Core/Src/main.c:326:13:MX_TIM2_Init 48 static
../Core/Src/main.c:375:13:MX_TIM3_Init 56 static
../Core/Src/main.c:424:13:MX_UART4_Init 8 static
../Core/Src/main.c:457:13:MX_UART5_Init 8 static
../Core/Src/main.c:490:13:MX_USART1_UART_Init 8 static
../Core/Src/main.c:523:13:MX_USART2_UART_Init 8 static
../Core/Src/main.c:556:13:MX_USART3_UART_Init 8 static
../Core/Src/main.c:583:13:MX_DMA_Init 16 static
../Core/Src/main.c:623:13:MX_GPIO_Init 48 static
../Core/Src/main.c:676:6:HAL_UART_RxCpltCallback 16 static
../Core/Src/main.c:683:6:handleUARTMessages 56 static
../Core/Src/main.c:710:6:addUSBReport 24 static
../Core/Src/main.c:718:6:matrixScan 16 static
../Core/Src/main.c:731:6:resetReport 8 static
../Core/Src/main.c:742:6:Error_Handler 4 static,ignoring_inline_asm
../Core/Src/main.c:170:5:main 24 static
../Core/Src/main.c:265:6:SystemClock_Config 88 static
../Core/Src/main.c:312:13:MX_I2C1_Init 8 static
../Core/Src/main.c:346:13:MX_TIM2_Init 48 static
../Core/Src/main.c:395:13:MX_TIM3_Init 56 static
../Core/Src/main.c:444:13:MX_UART4_Init 8 static
../Core/Src/main.c:477:13:MX_UART5_Init 8 static
../Core/Src/main.c:510:13:MX_USART1_UART_Init 8 static
../Core/Src/main.c:543:13:MX_USART2_UART_Init 8 static
../Core/Src/main.c:576:13:MX_USART3_UART_Init 8 static
../Core/Src/main.c:603:13:MX_DMA_Init 16 static
../Core/Src/main.c:643:13:MX_GPIO_Init 48 static
../Core/Src/main.c:696:6:HAL_UART_RxCpltCallback 16 static
../Core/Src/main.c:703:6:handleUARTMessages 56 static
../Core/Src/main.c:730:6:addUSBReport 24 static
../Core/Src/main.c:738:6:matrixScan 16 static
../Core/Src/main.c:751:6:resetReport 8 static
../Core/Src/main.c:762:6:Error_Handler 4 static,ignoring_inline_asm

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firmware/modularkbd/Debug/Core/Src/stm32f4xx_hal_msp.o
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firmware/modularkbd/Debug/Core/Src/stm32f4xx_it.o
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