diff --git a/firmware/67percent/.settings/language.settings.xml b/firmware/67percent/.settings/language.settings.xml
index 500b64f7..7b0f19e8 100644
--- a/firmware/67percent/.settings/language.settings.xml
+++ b/firmware/67percent/.settings/language.settings.xml
@@ -5,7 +5,7 @@
-
+
@@ -16,7 +16,7 @@
-
+
diff --git a/firmware/67percent/.settings/stm32cubeide.project.prefs b/firmware/67percent/.settings/stm32cubeide.project.prefs
index 312ed386..58b5fd06 100644
--- a/firmware/67percent/.settings/stm32cubeide.project.prefs
+++ b/firmware/67percent/.settings/stm32cubeide.project.prefs
@@ -1,5 +1,5 @@
635E684B79701B039C64EA45C3F84D30=995AAB8BA274295E2F8F7F317CB52865
66BE74F758C12D739921AEA421D593D3=0
-8DF89ED150041C4CBC7CB9A9CAA90856=CFE0804C550E33C5B9DAB17F678FB68D
-DC22A860405A8BF2F2C095E5B6529F12=CFE0804C550E33C5B9DAB17F678FB68D
+8DF89ED150041C4CBC7CB9A9CAA90856=7FDA956CB788B83CC8F90FE0AF50270E
+DC22A860405A8BF2F2C095E5B6529F12=B4658D56AC47B13414DF7CA59C5A0171
eclipse.preferences.version=1
diff --git a/firmware/67percent/67 Debug.launch b/firmware/67percent/67 Debug.launch
new file mode 100644
index 00000000..79084a51
--- /dev/null
+++ b/firmware/67percent/67 Debug.launch
@@ -0,0 +1,85 @@
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
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+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/firmware/67percent/Core/Src/gpio.c b/firmware/67percent/Core/Src/gpio.c
index 1ac25202..172e1c28 100644
--- a/firmware/67percent/Core/Src/gpio.c
+++ b/firmware/67percent/Core/Src/gpio.c
@@ -76,6 +76,12 @@ void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
/*Configure GPIO pin : PA8 */
GPIO_InitStruct.Pin = GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
diff --git a/firmware/67percent/Core/Src/main.c b/firmware/67percent/Core/Src/main.c
index d186da46..5382d26d 100644
--- a/firmware/67percent/Core/Src/main.c
+++ b/firmware/67percent/Core/Src/main.c
@@ -128,7 +128,7 @@ SwitchPins ROW_PINS[ROW] = {
{GPIOB, GPIO_PIN_10},
{GPIOB, GPIO_PIN_2},
{GPIOB, GPIO_PIN_1},
- {GPIOB, GPIO_PIN_O},
+ {GPIOB, GPIO_PIN_0},
{GPIOC, GPIO_PIN_5},
};
@@ -143,7 +143,6 @@ SwitchPins COLUMN_PINS[COL] = {
{GPIOA, GPIO_PIN_8}
};
-
// Initialize keycodes array
uint8_t KEYCODES[ROW][COL] = {
{ KEY_ESC, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6, KEY_7, KEY_8, KEY_9, KEY_0, KEY_MINUS, KEY_EQUAL, KEY_BACKSPACE, KEY_HOME },
diff --git a/firmware/67percent/Debug/67.elf b/firmware/67percent/Debug/67.elf
new file mode 100644
index 00000000..ae856592
Binary files /dev/null and b/firmware/67percent/Debug/67.elf differ
diff --git a/firmware/67percent/Debug/67.list b/firmware/67percent/Debug/67.list
new file mode 100644
index 00000000..5eebe8a5
--- /dev/null
+++ b/firmware/67percent/Debug/67.list
@@ -0,0 +1,29980 @@
+
+67.elf: file format elf32-littlearm
+
+Sections:
+Idx Name Size VMA LMA File off Algn
+ 0 .isr_vector 000001c4 08000000 08000000 00001000 2**0
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 1 .text 0000b238 080001c4 080001c4 000011c4 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, CODE
+ 2 .rodata 0000005c 0800b3fc 0800b3fc 0000c3fc 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 3 .ARM.extab 00000000 0800b458 0800b458 0000d214 2**0
+ CONTENTS, READONLY
+ 4 .ARM 00000008 0800b458 0800b458 0000c458 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 5 .preinit_array 00000000 0800b460 0800b460 0000d214 2**0
+ CONTENTS, ALLOC, LOAD, DATA
+ 6 .init_array 00000004 0800b460 0800b460 0000c460 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 7 .fini_array 00000004 0800b464 0800b464 0000c464 2**2
+ CONTENTS, ALLOC, LOAD, READONLY, DATA
+ 8 .data 00000214 20000000 0800b468 0000d000 2**2
+ CONTENTS, ALLOC, LOAD, DATA
+ 9 .bss 000015e8 20000214 0800b67c 0000d214 2**2
+ ALLOC
+ 10 ._user_heap_stack 00000604 200017fc 0800b67c 0000d7fc 2**0
+ ALLOC
+ 11 .ARM.attributes 00000030 00000000 00000000 0000d214 2**0
+ CONTENTS, READONLY
+ 12 .debug_info 0001be15 00000000 00000000 0000d244 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 13 .debug_abbrev 00004285 00000000 00000000 00029059 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 14 .debug_aranges 000017f0 00000000 00000000 0002d2e0 2**3
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 15 .debug_rnglists 00001291 00000000 00000000 0002ead0 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 16 .debug_macro 000262b3 00000000 00000000 0002fd61 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 17 .debug_line 000203fa 00000000 00000000 00056014 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 18 .debug_str 000d8080 00000000 00000000 0007640e 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 19 .comment 00000043 00000000 00000000 0014e48e 2**0
+ CONTENTS, READONLY
+ 20 .debug_frame 0000645c 00000000 00000000 0014e4d4 2**2
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+ 21 .debug_line_str 00000076 00000000 00000000 00154930 2**0
+ CONTENTS, READONLY, DEBUGGING, OCTETS
+
+Disassembly of section .text:
+
+080001c4 <__do_global_dtors_aux>:
+ 80001c4: b510 push {r4, lr}
+ 80001c6: 4c05 ldr r4, [pc, #20] @ (80001dc <__do_global_dtors_aux+0x18>)
+ 80001c8: 7823 ldrb r3, [r4, #0]
+ 80001ca: b933 cbnz r3, 80001da <__do_global_dtors_aux+0x16>
+ 80001cc: 4b04 ldr r3, [pc, #16] @ (80001e0 <__do_global_dtors_aux+0x1c>)
+ 80001ce: b113 cbz r3, 80001d6 <__do_global_dtors_aux+0x12>
+ 80001d0: 4804 ldr r0, [pc, #16] @ (80001e4 <__do_global_dtors_aux+0x20>)
+ 80001d2: f3af 8000 nop.w
+ 80001d6: 2301 movs r3, #1
+ 80001d8: 7023 strb r3, [r4, #0]
+ 80001da: bd10 pop {r4, pc}
+ 80001dc: 20000214 .word 0x20000214
+ 80001e0: 00000000 .word 0x00000000
+ 80001e4: 0800b3e4 .word 0x0800b3e4
+
+080001e8 :
+ 80001e8: b508 push {r3, lr}
+ 80001ea: 4b03 ldr r3, [pc, #12] @ (80001f8 )
+ 80001ec: b11b cbz r3, 80001f6
+ 80001ee: 4903 ldr r1, [pc, #12] @ (80001fc )
+ 80001f0: 4803 ldr r0, [pc, #12] @ (8000200 )
+ 80001f2: f3af 8000 nop.w
+ 80001f6: bd08 pop {r3, pc}
+ 80001f8: 00000000 .word 0x00000000
+ 80001fc: 20000218 .word 0x20000218
+ 8000200: 0800b3e4 .word 0x0800b3e4
+
+08000204 <__aeabi_uldivmod>:
+ 8000204: b953 cbnz r3, 800021c <__aeabi_uldivmod+0x18>
+ 8000206: b94a cbnz r2, 800021c <__aeabi_uldivmod+0x18>
+ 8000208: 2900 cmp r1, #0
+ 800020a: bf08 it eq
+ 800020c: 2800 cmpeq r0, #0
+ 800020e: bf1c itt ne
+ 8000210: f04f 31ff movne.w r1, #4294967295
+ 8000214: f04f 30ff movne.w r0, #4294967295
+ 8000218: f000 b988 b.w 800052c <__aeabi_idiv0>
+ 800021c: f1ad 0c08 sub.w ip, sp, #8
+ 8000220: e96d ce04 strd ip, lr, [sp, #-16]!
+ 8000224: f000 f806 bl 8000234 <__udivmoddi4>
+ 8000228: f8dd e004 ldr.w lr, [sp, #4]
+ 800022c: e9dd 2302 ldrd r2, r3, [sp, #8]
+ 8000230: b004 add sp, #16
+ 8000232: 4770 bx lr
+
+08000234 <__udivmoddi4>:
+ 8000234: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
+ 8000238: 9d08 ldr r5, [sp, #32]
+ 800023a: 468e mov lr, r1
+ 800023c: 4604 mov r4, r0
+ 800023e: 4688 mov r8, r1
+ 8000240: 2b00 cmp r3, #0
+ 8000242: d14a bne.n 80002da <__udivmoddi4+0xa6>
+ 8000244: 428a cmp r2, r1
+ 8000246: 4617 mov r7, r2
+ 8000248: d962 bls.n 8000310 <__udivmoddi4+0xdc>
+ 800024a: fab2 f682 clz r6, r2
+ 800024e: b14e cbz r6, 8000264 <__udivmoddi4+0x30>
+ 8000250: f1c6 0320 rsb r3, r6, #32
+ 8000254: fa01 f806 lsl.w r8, r1, r6
+ 8000258: fa20 f303 lsr.w r3, r0, r3
+ 800025c: 40b7 lsls r7, r6
+ 800025e: ea43 0808 orr.w r8, r3, r8
+ 8000262: 40b4 lsls r4, r6
+ 8000264: ea4f 4e17 mov.w lr, r7, lsr #16
+ 8000268: fa1f fc87 uxth.w ip, r7
+ 800026c: fbb8 f1fe udiv r1, r8, lr
+ 8000270: 0c23 lsrs r3, r4, #16
+ 8000272: fb0e 8811 mls r8, lr, r1, r8
+ 8000276: ea43 4308 orr.w r3, r3, r8, lsl #16
+ 800027a: fb01 f20c mul.w r2, r1, ip
+ 800027e: 429a cmp r2, r3
+ 8000280: d909 bls.n 8000296 <__udivmoddi4+0x62>
+ 8000282: 18fb adds r3, r7, r3
+ 8000284: f101 30ff add.w r0, r1, #4294967295
+ 8000288: f080 80ea bcs.w 8000460 <__udivmoddi4+0x22c>
+ 800028c: 429a cmp r2, r3
+ 800028e: f240 80e7 bls.w 8000460 <__udivmoddi4+0x22c>
+ 8000292: 3902 subs r1, #2
+ 8000294: 443b add r3, r7
+ 8000296: 1a9a subs r2, r3, r2
+ 8000298: b2a3 uxth r3, r4
+ 800029a: fbb2 f0fe udiv r0, r2, lr
+ 800029e: fb0e 2210 mls r2, lr, r0, r2
+ 80002a2: ea43 4302 orr.w r3, r3, r2, lsl #16
+ 80002a6: fb00 fc0c mul.w ip, r0, ip
+ 80002aa: 459c cmp ip, r3
+ 80002ac: d909 bls.n 80002c2 <__udivmoddi4+0x8e>
+ 80002ae: 18fb adds r3, r7, r3
+ 80002b0: f100 32ff add.w r2, r0, #4294967295
+ 80002b4: f080 80d6 bcs.w 8000464 <__udivmoddi4+0x230>
+ 80002b8: 459c cmp ip, r3
+ 80002ba: f240 80d3 bls.w 8000464 <__udivmoddi4+0x230>
+ 80002be: 443b add r3, r7
+ 80002c0: 3802 subs r0, #2
+ 80002c2: ea40 4001 orr.w r0, r0, r1, lsl #16
+ 80002c6: eba3 030c sub.w r3, r3, ip
+ 80002ca: 2100 movs r1, #0
+ 80002cc: b11d cbz r5, 80002d6 <__udivmoddi4+0xa2>
+ 80002ce: 40f3 lsrs r3, r6
+ 80002d0: 2200 movs r2, #0
+ 80002d2: e9c5 3200 strd r3, r2, [r5]
+ 80002d6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
+ 80002da: 428b cmp r3, r1
+ 80002dc: d905 bls.n 80002ea <__udivmoddi4+0xb6>
+ 80002de: b10d cbz r5, 80002e4 <__udivmoddi4+0xb0>
+ 80002e0: e9c5 0100 strd r0, r1, [r5]
+ 80002e4: 2100 movs r1, #0
+ 80002e6: 4608 mov r0, r1
+ 80002e8: e7f5 b.n 80002d6 <__udivmoddi4+0xa2>
+ 80002ea: fab3 f183 clz r1, r3
+ 80002ee: 2900 cmp r1, #0
+ 80002f0: d146 bne.n 8000380 <__udivmoddi4+0x14c>
+ 80002f2: 4573 cmp r3, lr
+ 80002f4: d302 bcc.n 80002fc <__udivmoddi4+0xc8>
+ 80002f6: 4282 cmp r2, r0
+ 80002f8: f200 8105 bhi.w 8000506 <__udivmoddi4+0x2d2>
+ 80002fc: 1a84 subs r4, r0, r2
+ 80002fe: eb6e 0203 sbc.w r2, lr, r3
+ 8000302: 2001 movs r0, #1
+ 8000304: 4690 mov r8, r2
+ 8000306: 2d00 cmp r5, #0
+ 8000308: d0e5 beq.n 80002d6 <__udivmoddi4+0xa2>
+ 800030a: e9c5 4800 strd r4, r8, [r5]
+ 800030e: e7e2 b.n 80002d6 <__udivmoddi4+0xa2>
+ 8000310: 2a00 cmp r2, #0
+ 8000312: f000 8090 beq.w 8000436 <__udivmoddi4+0x202>
+ 8000316: fab2 f682 clz r6, r2
+ 800031a: 2e00 cmp r6, #0
+ 800031c: f040 80a4 bne.w 8000468 <__udivmoddi4+0x234>
+ 8000320: 1a8a subs r2, r1, r2
+ 8000322: 0c03 lsrs r3, r0, #16
+ 8000324: ea4f 4e17 mov.w lr, r7, lsr #16
+ 8000328: b280 uxth r0, r0
+ 800032a: b2bc uxth r4, r7
+ 800032c: 2101 movs r1, #1
+ 800032e: fbb2 fcfe udiv ip, r2, lr
+ 8000332: fb0e 221c mls r2, lr, ip, r2
+ 8000336: ea43 4302 orr.w r3, r3, r2, lsl #16
+ 800033a: fb04 f20c mul.w r2, r4, ip
+ 800033e: 429a cmp r2, r3
+ 8000340: d907 bls.n 8000352 <__udivmoddi4+0x11e>
+ 8000342: 18fb adds r3, r7, r3
+ 8000344: f10c 38ff add.w r8, ip, #4294967295
+ 8000348: d202 bcs.n 8000350 <__udivmoddi4+0x11c>
+ 800034a: 429a cmp r2, r3
+ 800034c: f200 80e0 bhi.w 8000510 <__udivmoddi4+0x2dc>
+ 8000350: 46c4 mov ip, r8
+ 8000352: 1a9b subs r3, r3, r2
+ 8000354: fbb3 f2fe udiv r2, r3, lr
+ 8000358: fb0e 3312 mls r3, lr, r2, r3
+ 800035c: ea40 4303 orr.w r3, r0, r3, lsl #16
+ 8000360: fb02 f404 mul.w r4, r2, r4
+ 8000364: 429c cmp r4, r3
+ 8000366: d907 bls.n 8000378 <__udivmoddi4+0x144>
+ 8000368: 18fb adds r3, r7, r3
+ 800036a: f102 30ff add.w r0, r2, #4294967295
+ 800036e: d202 bcs.n 8000376 <__udivmoddi4+0x142>
+ 8000370: 429c cmp r4, r3
+ 8000372: f200 80ca bhi.w 800050a <__udivmoddi4+0x2d6>
+ 8000376: 4602 mov r2, r0
+ 8000378: 1b1b subs r3, r3, r4
+ 800037a: ea42 400c orr.w r0, r2, ip, lsl #16
+ 800037e: e7a5 b.n 80002cc <__udivmoddi4+0x98>
+ 8000380: f1c1 0620 rsb r6, r1, #32
+ 8000384: 408b lsls r3, r1
+ 8000386: fa22 f706 lsr.w r7, r2, r6
+ 800038a: 431f orrs r7, r3
+ 800038c: fa0e f401 lsl.w r4, lr, r1
+ 8000390: fa20 f306 lsr.w r3, r0, r6
+ 8000394: fa2e fe06 lsr.w lr, lr, r6
+ 8000398: ea4f 4917 mov.w r9, r7, lsr #16
+ 800039c: 4323 orrs r3, r4
+ 800039e: fa00 f801 lsl.w r8, r0, r1
+ 80003a2: fa1f fc87 uxth.w ip, r7
+ 80003a6: fbbe f0f9 udiv r0, lr, r9
+ 80003aa: 0c1c lsrs r4, r3, #16
+ 80003ac: fb09 ee10 mls lr, r9, r0, lr
+ 80003b0: ea44 440e orr.w r4, r4, lr, lsl #16
+ 80003b4: fb00 fe0c mul.w lr, r0, ip
+ 80003b8: 45a6 cmp lr, r4
+ 80003ba: fa02 f201 lsl.w r2, r2, r1
+ 80003be: d909 bls.n 80003d4 <__udivmoddi4+0x1a0>
+ 80003c0: 193c adds r4, r7, r4
+ 80003c2: f100 3aff add.w sl, r0, #4294967295
+ 80003c6: f080 809c bcs.w 8000502 <__udivmoddi4+0x2ce>
+ 80003ca: 45a6 cmp lr, r4
+ 80003cc: f240 8099 bls.w 8000502 <__udivmoddi4+0x2ce>
+ 80003d0: 3802 subs r0, #2
+ 80003d2: 443c add r4, r7
+ 80003d4: eba4 040e sub.w r4, r4, lr
+ 80003d8: fa1f fe83 uxth.w lr, r3
+ 80003dc: fbb4 f3f9 udiv r3, r4, r9
+ 80003e0: fb09 4413 mls r4, r9, r3, r4
+ 80003e4: ea4e 4404 orr.w r4, lr, r4, lsl #16
+ 80003e8: fb03 fc0c mul.w ip, r3, ip
+ 80003ec: 45a4 cmp ip, r4
+ 80003ee: d908 bls.n 8000402 <__udivmoddi4+0x1ce>
+ 80003f0: 193c adds r4, r7, r4
+ 80003f2: f103 3eff add.w lr, r3, #4294967295
+ 80003f6: f080 8082 bcs.w 80004fe <__udivmoddi4+0x2ca>
+ 80003fa: 45a4 cmp ip, r4
+ 80003fc: d97f bls.n 80004fe <__udivmoddi4+0x2ca>
+ 80003fe: 3b02 subs r3, #2
+ 8000400: 443c add r4, r7
+ 8000402: ea43 4000 orr.w r0, r3, r0, lsl #16
+ 8000406: eba4 040c sub.w r4, r4, ip
+ 800040a: fba0 ec02 umull lr, ip, r0, r2
+ 800040e: 4564 cmp r4, ip
+ 8000410: 4673 mov r3, lr
+ 8000412: 46e1 mov r9, ip
+ 8000414: d362 bcc.n 80004dc <__udivmoddi4+0x2a8>
+ 8000416: d05f beq.n 80004d8 <__udivmoddi4+0x2a4>
+ 8000418: b15d cbz r5, 8000432 <__udivmoddi4+0x1fe>
+ 800041a: ebb8 0203 subs.w r2, r8, r3
+ 800041e: eb64 0409 sbc.w r4, r4, r9
+ 8000422: fa04 f606 lsl.w r6, r4, r6
+ 8000426: fa22 f301 lsr.w r3, r2, r1
+ 800042a: 431e orrs r6, r3
+ 800042c: 40cc lsrs r4, r1
+ 800042e: e9c5 6400 strd r6, r4, [r5]
+ 8000432: 2100 movs r1, #0
+ 8000434: e74f b.n 80002d6 <__udivmoddi4+0xa2>
+ 8000436: fbb1 fcf2 udiv ip, r1, r2
+ 800043a: 0c01 lsrs r1, r0, #16
+ 800043c: ea41 410e orr.w r1, r1, lr, lsl #16
+ 8000440: b280 uxth r0, r0
+ 8000442: ea40 4201 orr.w r2, r0, r1, lsl #16
+ 8000446: 463b mov r3, r7
+ 8000448: 4638 mov r0, r7
+ 800044a: 463c mov r4, r7
+ 800044c: 46b8 mov r8, r7
+ 800044e: 46be mov lr, r7
+ 8000450: 2620 movs r6, #32
+ 8000452: fbb1 f1f7 udiv r1, r1, r7
+ 8000456: eba2 0208 sub.w r2, r2, r8
+ 800045a: ea41 410c orr.w r1, r1, ip, lsl #16
+ 800045e: e766 b.n 800032e <__udivmoddi4+0xfa>
+ 8000460: 4601 mov r1, r0
+ 8000462: e718 b.n 8000296 <__udivmoddi4+0x62>
+ 8000464: 4610 mov r0, r2
+ 8000466: e72c b.n 80002c2 <__udivmoddi4+0x8e>
+ 8000468: f1c6 0220 rsb r2, r6, #32
+ 800046c: fa2e f302 lsr.w r3, lr, r2
+ 8000470: 40b7 lsls r7, r6
+ 8000472: 40b1 lsls r1, r6
+ 8000474: fa20 f202 lsr.w r2, r0, r2
+ 8000478: ea4f 4e17 mov.w lr, r7, lsr #16
+ 800047c: 430a orrs r2, r1
+ 800047e: fbb3 f8fe udiv r8, r3, lr
+ 8000482: b2bc uxth r4, r7
+ 8000484: fb0e 3318 mls r3, lr, r8, r3
+ 8000488: 0c11 lsrs r1, r2, #16
+ 800048a: ea41 4103 orr.w r1, r1, r3, lsl #16
+ 800048e: fb08 f904 mul.w r9, r8, r4
+ 8000492: 40b0 lsls r0, r6
+ 8000494: 4589 cmp r9, r1
+ 8000496: ea4f 4310 mov.w r3, r0, lsr #16
+ 800049a: b280 uxth r0, r0
+ 800049c: d93e bls.n 800051c <__udivmoddi4+0x2e8>
+ 800049e: 1879 adds r1, r7, r1
+ 80004a0: f108 3cff add.w ip, r8, #4294967295
+ 80004a4: d201 bcs.n 80004aa <__udivmoddi4+0x276>
+ 80004a6: 4589 cmp r9, r1
+ 80004a8: d81f bhi.n 80004ea <__udivmoddi4+0x2b6>
+ 80004aa: eba1 0109 sub.w r1, r1, r9
+ 80004ae: fbb1 f9fe udiv r9, r1, lr
+ 80004b2: fb09 f804 mul.w r8, r9, r4
+ 80004b6: fb0e 1119 mls r1, lr, r9, r1
+ 80004ba: b292 uxth r2, r2
+ 80004bc: ea42 4201 orr.w r2, r2, r1, lsl #16
+ 80004c0: 4542 cmp r2, r8
+ 80004c2: d229 bcs.n 8000518 <__udivmoddi4+0x2e4>
+ 80004c4: 18ba adds r2, r7, r2
+ 80004c6: f109 31ff add.w r1, r9, #4294967295
+ 80004ca: d2c4 bcs.n 8000456 <__udivmoddi4+0x222>
+ 80004cc: 4542 cmp r2, r8
+ 80004ce: d2c2 bcs.n 8000456 <__udivmoddi4+0x222>
+ 80004d0: f1a9 0102 sub.w r1, r9, #2
+ 80004d4: 443a add r2, r7
+ 80004d6: e7be b.n 8000456 <__udivmoddi4+0x222>
+ 80004d8: 45f0 cmp r8, lr
+ 80004da: d29d bcs.n 8000418 <__udivmoddi4+0x1e4>
+ 80004dc: ebbe 0302 subs.w r3, lr, r2
+ 80004e0: eb6c 0c07 sbc.w ip, ip, r7
+ 80004e4: 3801 subs r0, #1
+ 80004e6: 46e1 mov r9, ip
+ 80004e8: e796 b.n 8000418 <__udivmoddi4+0x1e4>
+ 80004ea: eba7 0909 sub.w r9, r7, r9
+ 80004ee: 4449 add r1, r9
+ 80004f0: f1a8 0c02 sub.w ip, r8, #2
+ 80004f4: fbb1 f9fe udiv r9, r1, lr
+ 80004f8: fb09 f804 mul.w r8, r9, r4
+ 80004fc: e7db b.n 80004b6 <__udivmoddi4+0x282>
+ 80004fe: 4673 mov r3, lr
+ 8000500: e77f b.n 8000402 <__udivmoddi4+0x1ce>
+ 8000502: 4650 mov r0, sl
+ 8000504: e766 b.n 80003d4 <__udivmoddi4+0x1a0>
+ 8000506: 4608 mov r0, r1
+ 8000508: e6fd b.n 8000306 <__udivmoddi4+0xd2>
+ 800050a: 443b add r3, r7
+ 800050c: 3a02 subs r2, #2
+ 800050e: e733 b.n 8000378 <__udivmoddi4+0x144>
+ 8000510: f1ac 0c02 sub.w ip, ip, #2
+ 8000514: 443b add r3, r7
+ 8000516: e71c b.n 8000352 <__udivmoddi4+0x11e>
+ 8000518: 4649 mov r1, r9
+ 800051a: e79c b.n 8000456 <__udivmoddi4+0x222>
+ 800051c: eba1 0109 sub.w r1, r1, r9
+ 8000520: 46c4 mov ip, r8
+ 8000522: fbb1 f9fe udiv r9, r1, lr
+ 8000526: fb09 f804 mul.w r8, r9, r4
+ 800052a: e7c4 b.n 80004b6 <__udivmoddi4+0x282>
+
+0800052c <__aeabi_idiv0>:
+ 800052c: 4770 bx lr
+ 800052e: bf00 nop
+
+08000530 :
+
+/**
+ * Enable DMA controller clock
+ */
+void MX_DMA_Init(void)
+{
+ 8000530: b580 push {r7, lr}
+ 8000532: b082 sub sp, #8
+ 8000534: af00 add r7, sp, #0
+
+ /* DMA controller clock enable */
+ __HAL_RCC_DMA1_CLK_ENABLE();
+ 8000536: 2300 movs r3, #0
+ 8000538: 607b str r3, [r7, #4]
+ 800053a: 4b2f ldr r3, [pc, #188] @ (80005f8 )
+ 800053c: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800053e: 4a2e ldr r2, [pc, #184] @ (80005f8 )
+ 8000540: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
+ 8000544: 6313 str r3, [r2, #48] @ 0x30
+ 8000546: 4b2c ldr r3, [pc, #176] @ (80005f8 )
+ 8000548: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800054a: f403 1300 and.w r3, r3, #2097152 @ 0x200000
+ 800054e: 607b str r3, [r7, #4]
+ 8000550: 687b ldr r3, [r7, #4]
+ __HAL_RCC_DMA2_CLK_ENABLE();
+ 8000552: 2300 movs r3, #0
+ 8000554: 603b str r3, [r7, #0]
+ 8000556: 4b28 ldr r3, [pc, #160] @ (80005f8 )
+ 8000558: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800055a: 4a27 ldr r2, [pc, #156] @ (80005f8 )
+ 800055c: f443 0380 orr.w r3, r3, #4194304 @ 0x400000
+ 8000560: 6313 str r3, [r2, #48] @ 0x30
+ 8000562: 4b25 ldr r3, [pc, #148] @ (80005f8 )
+ 8000564: 6b1b ldr r3, [r3, #48] @ 0x30
+ 8000566: f403 0380 and.w r3, r3, #4194304 @ 0x400000
+ 800056a: 603b str r3, [r7, #0]
+ 800056c: 683b ldr r3, [r7, #0]
+
+ /* DMA interrupt init */
+ /* DMA1_Stream0_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
+ 800056e: 2200 movs r2, #0
+ 8000570: 2100 movs r1, #0
+ 8000572: 200b movs r0, #11
+ 8000574: f001 fdf3 bl 800215e
+ HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
+ 8000578: 200b movs r0, #11
+ 800057a: f001 fe0c bl 8002196
+ /* DMA1_Stream2_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Stream2_IRQn, 0, 0);
+ 800057e: 2200 movs r2, #0
+ 8000580: 2100 movs r1, #0
+ 8000582: 200d movs r0, #13
+ 8000584: f001 fdeb bl 800215e
+ HAL_NVIC_EnableIRQ(DMA1_Stream2_IRQn);
+ 8000588: 200d movs r0, #13
+ 800058a: f001 fe04 bl 8002196
+ /* DMA1_Stream4_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Stream4_IRQn, 0, 0);
+ 800058e: 2200 movs r2, #0
+ 8000590: 2100 movs r1, #0
+ 8000592: 200f movs r0, #15
+ 8000594: f001 fde3 bl 800215e
+ HAL_NVIC_EnableIRQ(DMA1_Stream4_IRQn);
+ 8000598: 200f movs r0, #15
+ 800059a: f001 fdfc bl 8002196
+ /* DMA1_Stream5_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Stream5_IRQn, 0, 0);
+ 800059e: 2200 movs r2, #0
+ 80005a0: 2100 movs r1, #0
+ 80005a2: 2010 movs r0, #16
+ 80005a4: f001 fddb bl 800215e
+ HAL_NVIC_EnableIRQ(DMA1_Stream5_IRQn);
+ 80005a8: 2010 movs r0, #16
+ 80005aa: f001 fdf4 bl 8002196
+ /* DMA1_Stream6_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Stream6_IRQn, 0, 0);
+ 80005ae: 2200 movs r2, #0
+ 80005b0: 2100 movs r1, #0
+ 80005b2: 2011 movs r0, #17
+ 80005b4: f001 fdd3 bl 800215e
+ HAL_NVIC_EnableIRQ(DMA1_Stream6_IRQn);
+ 80005b8: 2011 movs r0, #17
+ 80005ba: f001 fdec bl 8002196
+ /* DMA1_Stream7_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA1_Stream7_IRQn, 0, 0);
+ 80005be: 2200 movs r2, #0
+ 80005c0: 2100 movs r1, #0
+ 80005c2: 202f movs r0, #47 @ 0x2f
+ 80005c4: f001 fdcb bl 800215e
+ HAL_NVIC_EnableIRQ(DMA1_Stream7_IRQn);
+ 80005c8: 202f movs r0, #47 @ 0x2f
+ 80005ca: f001 fde4 bl 8002196
+ /* DMA2_Stream2_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0);
+ 80005ce: 2200 movs r2, #0
+ 80005d0: 2100 movs r1, #0
+ 80005d2: 203a movs r0, #58 @ 0x3a
+ 80005d4: f001 fdc3 bl 800215e
+ HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn);
+ 80005d8: 203a movs r0, #58 @ 0x3a
+ 80005da: f001 fddc bl 8002196
+ /* DMA2_Stream7_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0);
+ 80005de: 2200 movs r2, #0
+ 80005e0: 2100 movs r1, #0
+ 80005e2: 2046 movs r0, #70 @ 0x46
+ 80005e4: f001 fdbb bl 800215e
+ HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
+ 80005e8: 2046 movs r0, #70 @ 0x46
+ 80005ea: f001 fdd4 bl 8002196
+
+}
+ 80005ee: bf00 nop
+ 80005f0: 3708 adds r7, #8
+ 80005f2: 46bd mov sp, r7
+ 80005f4: bd80 pop {r7, pc}
+ 80005f6: bf00 nop
+ 80005f8: 40023800 .word 0x40023800
+
+080005fc :
+ * Output
+ * EVENT_OUT
+ * EXTI
+*/
+void MX_GPIO_Init(void)
+{
+ 80005fc: b580 push {r7, lr}
+ 80005fe: b08a sub sp, #40 @ 0x28
+ 8000600: af00 add r7, sp, #0
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 8000602: f107 0314 add.w r3, r7, #20
+ 8000606: 2200 movs r2, #0
+ 8000608: 601a str r2, [r3, #0]
+ 800060a: 605a str r2, [r3, #4]
+ 800060c: 609a str r2, [r3, #8]
+ 800060e: 60da str r2, [r3, #12]
+ 8000610: 611a str r2, [r3, #16]
+
+ /* GPIO Ports Clock Enable */
+ __HAL_RCC_GPIOH_CLK_ENABLE();
+ 8000612: 2300 movs r3, #0
+ 8000614: 613b str r3, [r7, #16]
+ 8000616: 4b4d ldr r3, [pc, #308] @ (800074c )
+ 8000618: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800061a: 4a4c ldr r2, [pc, #304] @ (800074c )
+ 800061c: f043 0380 orr.w r3, r3, #128 @ 0x80
+ 8000620: 6313 str r3, [r2, #48] @ 0x30
+ 8000622: 4b4a ldr r3, [pc, #296] @ (800074c )
+ 8000624: 6b1b ldr r3, [r3, #48] @ 0x30
+ 8000626: f003 0380 and.w r3, r3, #128 @ 0x80
+ 800062a: 613b str r3, [r7, #16]
+ 800062c: 693b ldr r3, [r7, #16]
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+ 800062e: 2300 movs r3, #0
+ 8000630: 60fb str r3, [r7, #12]
+ 8000632: 4b46 ldr r3, [pc, #280] @ (800074c )
+ 8000634: 6b1b ldr r3, [r3, #48] @ 0x30
+ 8000636: 4a45 ldr r2, [pc, #276] @ (800074c )
+ 8000638: f043 0301 orr.w r3, r3, #1
+ 800063c: 6313 str r3, [r2, #48] @ 0x30
+ 800063e: 4b43 ldr r3, [pc, #268] @ (800074c )
+ 8000640: 6b1b ldr r3, [r3, #48] @ 0x30
+ 8000642: f003 0301 and.w r3, r3, #1
+ 8000646: 60fb str r3, [r7, #12]
+ 8000648: 68fb ldr r3, [r7, #12]
+ __HAL_RCC_GPIOC_CLK_ENABLE();
+ 800064a: 2300 movs r3, #0
+ 800064c: 60bb str r3, [r7, #8]
+ 800064e: 4b3f ldr r3, [pc, #252] @ (800074c )
+ 8000650: 6b1b ldr r3, [r3, #48] @ 0x30
+ 8000652: 4a3e ldr r2, [pc, #248] @ (800074c )
+ 8000654: f043 0304 orr.w r3, r3, #4
+ 8000658: 6313 str r3, [r2, #48] @ 0x30
+ 800065a: 4b3c ldr r3, [pc, #240] @ (800074c )
+ 800065c: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800065e: f003 0304 and.w r3, r3, #4
+ 8000662: 60bb str r3, [r7, #8]
+ 8000664: 68bb ldr r3, [r7, #8]
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ 8000666: 2300 movs r3, #0
+ 8000668: 607b str r3, [r7, #4]
+ 800066a: 4b38 ldr r3, [pc, #224] @ (800074c )
+ 800066c: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800066e: 4a37 ldr r2, [pc, #220] @ (800074c )
+ 8000670: f043 0302 orr.w r3, r3, #2
+ 8000674: 6313 str r3, [r2, #48] @ 0x30
+ 8000676: 4b35 ldr r3, [pc, #212] @ (800074c )
+ 8000678: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800067a: f003 0302 and.w r3, r3, #2
+ 800067e: 607b str r3, [r7, #4]
+ 8000680: 687b ldr r3, [r7, #4]
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+ 8000682: 2300 movs r3, #0
+ 8000684: 603b str r3, [r7, #0]
+ 8000686: 4b31 ldr r3, [pc, #196] @ (800074c )
+ 8000688: 6b1b ldr r3, [r3, #48] @ 0x30
+ 800068a: 4a30 ldr r2, [pc, #192] @ (800074c )
+ 800068c: f043 0308 orr.w r3, r3, #8
+ 8000690: 6313 str r3, [r2, #48] @ 0x30
+ 8000692: 4b2e ldr r3, [pc, #184] @ (800074c )
+ 8000694: 6b1b ldr r3, [r3, #48] @ 0x30
+ 8000696: f003 0308 and.w r3, r3, #8
+ 800069a: 603b str r3, [r7, #0]
+ 800069c: 683b ldr r3, [r7, #0]
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOC, GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9, GPIO_PIN_RESET);
+ 800069e: 2200 movs r2, #0
+ 80006a0: f44f 7170 mov.w r1, #960 @ 0x3c0
+ 80006a4: 482a ldr r0, [pc, #168] @ (8000750 )
+ 80006a6: f002 fb3f bl 8002d28
+
+ /*Configure GPIO pin Output Level */
+ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET);
+ 80006aa: 2200 movs r2, #0
+ 80006ac: f44f 7180 mov.w r1, #256 @ 0x100
+ 80006b0: 4828 ldr r0, [pc, #160] @ (8000754 )
+ 80006b2: f002 fb39 bl 8002d28
+
+ /*Configure GPIO pins : PC4 PC5 */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_4|GPIO_PIN_5;
+ 80006b6: 2331 movs r3, #49 @ 0x31
+ 80006b8: 617b str r3, [r7, #20]
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 80006ba: 2300 movs r3, #0
+ 80006bc: 61bb str r3, [r7, #24]
+ GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+ 80006be: 2302 movs r3, #2
+ 80006c0: 61fb str r3, [r7, #28]
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 80006c2: f107 0314 add.w r3, r7, #20
+ 80006c6: 4619 mov r1, r3
+ 80006c8: 4821 ldr r0, [pc, #132] @ (8000750 )
+ 80006ca: f002 f981 bl 80029d0
+
+ /*Configure GPIO pins : PB0 PB1 PB2 PB10 */
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_10;
+ 80006ce: f240 4307 movw r3, #1031 @ 0x407
+ 80006d2: 617b str r3, [r7, #20]
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 80006d4: 2300 movs r3, #0
+ 80006d6: 61bb str r3, [r7, #24]
+ GPIO_InitStruct.Pull = GPIO_PULLDOWN;
+ 80006d8: 2302 movs r3, #2
+ 80006da: 61fb str r3, [r7, #28]
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 80006dc: f107 0314 add.w r3, r7, #20
+ 80006e0: 4619 mov r1, r3
+ 80006e2: 481d ldr r0, [pc, #116] @ (8000758 )
+ 80006e4: f002 f974 bl 80029d0
+
+ /*Configure GPIO pins : PC6 PC7 PC8 PC9 */
+ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
+ 80006e8: f44f 7370 mov.w r3, #960 @ 0x3c0
+ 80006ec: 617b str r3, [r7, #20]
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 80006ee: 2301 movs r3, #1
+ 80006f0: 61bb str r3, [r7, #24]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80006f2: 2300 movs r3, #0
+ 80006f4: 61fb str r3, [r7, #28]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 80006f6: 2300 movs r3, #0
+ 80006f8: 623b str r3, [r7, #32]
+ HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 80006fa: f107 0314 add.w r3, r7, #20
+ 80006fe: 4619 mov r1, r3
+ 8000700: 4813 ldr r0, [pc, #76] @ (8000750 )
+ 8000702: f002 f965 bl 80029d0
+
+ GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14;
+ 8000706: f44f 43c0 mov.w r3, #24576 @ 0x6000
+ 800070a: 617b str r3, [r7, #20]
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 800070c: 2301 movs r3, #1
+ 800070e: 61bb str r3, [r7, #24]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 8000710: 2300 movs r3, #0
+ 8000712: 61fb str r3, [r7, #28]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8000714: 2300 movs r3, #0
+ 8000716: 623b str r3, [r7, #32]
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 8000718: f107 0314 add.w r3, r7, #20
+ 800071c: 4619 mov r1, r3
+ 800071e: 480e ldr r0, [pc, #56] @ (8000758 )
+ 8000720: f002 f956 bl 80029d0
+
+ /*Configure GPIO pin : PA8 */
+ GPIO_InitStruct.Pin = GPIO_PIN_8;
+ 8000724: f44f 7380 mov.w r3, #256 @ 0x100
+ 8000728: 617b str r3, [r7, #20]
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 800072a: 2301 movs r3, #1
+ 800072c: 61bb str r3, [r7, #24]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 800072e: 2300 movs r3, #0
+ 8000730: 61fb str r3, [r7, #28]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 8000732: 2300 movs r3, #0
+ 8000734: 623b str r3, [r7, #32]
+ HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 8000736: f107 0314 add.w r3, r7, #20
+ 800073a: 4619 mov r1, r3
+ 800073c: 4805 ldr r0, [pc, #20] @ (8000754 )
+ 800073e: f002 f947 bl 80029d0
+
+}
+ 8000742: bf00 nop
+ 8000744: 3728 adds r7, #40 @ 0x28
+ 8000746: 46bd mov sp, r7
+ 8000748: bd80 pop {r7, pc}
+ 800074a: bf00 nop
+ 800074c: 40023800 .word 0x40023800
+ 8000750: 40020800 .word 0x40020800
+ 8000754: 40020000 .word 0x40020000
+ 8000758: 40020400 .word 0x40020400
+
+0800075c :
+
+I2C_HandleTypeDef hi2c1;
+
+/* I2C1 init function */
+void MX_I2C1_Init(void)
+{
+ 800075c: b580 push {r7, lr}
+ 800075e: af00 add r7, sp, #0
+ /* USER CODE END I2C1_Init 0 */
+
+ /* USER CODE BEGIN I2C1_Init 1 */
+
+ /* USER CODE END I2C1_Init 1 */
+ hi2c1.Instance = I2C1;
+ 8000760: 4b12 ldr r3, [pc, #72] @ (80007ac )
+ 8000762: 4a13 ldr r2, [pc, #76] @ (80007b0 )
+ 8000764: 601a str r2, [r3, #0]
+ hi2c1.Init.ClockSpeed = 100000;
+ 8000766: 4b11 ldr r3, [pc, #68] @ (80007ac )
+ 8000768: 4a12 ldr r2, [pc, #72] @ (80007b4 )
+ 800076a: 605a str r2, [r3, #4]
+ hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
+ 800076c: 4b0f ldr r3, [pc, #60] @ (80007ac )
+ 800076e: 2200 movs r2, #0
+ 8000770: 609a str r2, [r3, #8]
+ hi2c1.Init.OwnAddress1 = 0;
+ 8000772: 4b0e ldr r3, [pc, #56] @ (80007ac )
+ 8000774: 2200 movs r2, #0
+ 8000776: 60da str r2, [r3, #12]
+ hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
+ 8000778: 4b0c ldr r3, [pc, #48] @ (80007ac )
+ 800077a: f44f 4280 mov.w r2, #16384 @ 0x4000
+ 800077e: 611a str r2, [r3, #16]
+ hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
+ 8000780: 4b0a ldr r3, [pc, #40] @ (80007ac )
+ 8000782: 2200 movs r2, #0
+ 8000784: 615a str r2, [r3, #20]
+ hi2c1.Init.OwnAddress2 = 0;
+ 8000786: 4b09 ldr r3, [pc, #36] @ (80007ac )
+ 8000788: 2200 movs r2, #0
+ 800078a: 619a str r2, [r3, #24]
+ hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
+ 800078c: 4b07 ldr r3, [pc, #28] @ (80007ac )
+ 800078e: 2200 movs r2, #0
+ 8000790: 61da str r2, [r3, #28]
+ hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
+ 8000792: 4b06 ldr r3, [pc, #24] @ (80007ac )
+ 8000794: 2200 movs r2, #0
+ 8000796: 621a str r2, [r3, #32]
+ if (HAL_I2C_Init(&hi2c1) != HAL_OK)
+ 8000798: 4804 ldr r0, [pc, #16] @ (80007ac )
+ 800079a: f002 fadf bl 8002d5c
+ 800079e: 4603 mov r3, r0
+ 80007a0: 2b00 cmp r3, #0
+ 80007a2: d001 beq.n 80007a8
+ {
+ Error_Handler();
+ 80007a4: f000 fd60 bl 8001268
+ }
+ /* USER CODE BEGIN I2C1_Init 2 */
+
+ /* USER CODE END I2C1_Init 2 */
+
+}
+ 80007a8: bf00 nop
+ 80007aa: bd80 pop {r7, pc}
+ 80007ac: 20000230 .word 0x20000230
+ 80007b0: 40005400 .word 0x40005400
+ 80007b4: 000186a0 .word 0x000186a0
+
+080007b8 :
+
+void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
+{
+ 80007b8: b580 push {r7, lr}
+ 80007ba: b08a sub sp, #40 @ 0x28
+ 80007bc: af00 add r7, sp, #0
+ 80007be: 6078 str r0, [r7, #4]
+
+ GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 80007c0: f107 0314 add.w r3, r7, #20
+ 80007c4: 2200 movs r2, #0
+ 80007c6: 601a str r2, [r3, #0]
+ 80007c8: 605a str r2, [r3, #4]
+ 80007ca: 609a str r2, [r3, #8]
+ 80007cc: 60da str r2, [r3, #12]
+ 80007ce: 611a str r2, [r3, #16]
+ if(i2cHandle->Instance==I2C1)
+ 80007d0: 687b ldr r3, [r7, #4]
+ 80007d2: 681b ldr r3, [r3, #0]
+ 80007d4: 4a19 ldr r2, [pc, #100] @ (800083c )
+ 80007d6: 4293 cmp r3, r2
+ 80007d8: d12b bne.n 8000832
+ {
+ /* USER CODE BEGIN I2C1_MspInit 0 */
+
+ /* USER CODE END I2C1_MspInit 0 */
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ 80007da: 2300 movs r3, #0
+ 80007dc: 613b str r3, [r7, #16]
+ 80007de: 4b18 ldr r3, [pc, #96] @ (8000840 )
+ 80007e0: 6b1b ldr r3, [r3, #48] @ 0x30
+ 80007e2: 4a17 ldr r2, [pc, #92] @ (8000840 )
+ 80007e4: f043 0302 orr.w r3, r3, #2
+ 80007e8: 6313 str r3, [r2, #48] @ 0x30
+ 80007ea: 4b15 ldr r3, [pc, #84] @ (8000840 )
+ 80007ec: 6b1b ldr r3, [r3, #48] @ 0x30
+ 80007ee: f003 0302 and.w r3, r3, #2
+ 80007f2: 613b str r3, [r7, #16]
+ 80007f4: 693b ldr r3, [r7, #16]
+ /**I2C1 GPIO Configuration
+ PB6 ------> I2C1_SCL
+ PB7 ------> I2C1_SDA
+ */
+ GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
+ 80007f6: 23c0 movs r3, #192 @ 0xc0
+ 80007f8: 617b str r3, [r7, #20]
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+ 80007fa: 2312 movs r3, #18
+ 80007fc: 61bb str r3, [r7, #24]
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 80007fe: 2300 movs r3, #0
+ 8000800: 61fb str r3, [r7, #28]
+ GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 8000802: 2303 movs r3, #3
+ 8000804: 623b str r3, [r7, #32]
+ GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
+ 8000806: 2304 movs r3, #4
+ 8000808: 627b str r3, [r7, #36] @ 0x24
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 800080a: f107 0314 add.w r3, r7, #20
+ 800080e: 4619 mov r1, r3
+ 8000810: 480c ldr r0, [pc, #48] @ (8000844 )
+ 8000812: f002 f8dd bl 80029d0
+
+ /* I2C1 clock enable */
+ __HAL_RCC_I2C1_CLK_ENABLE();
+ 8000816: 2300 movs r3, #0
+ 8000818: 60fb str r3, [r7, #12]
+ 800081a: 4b09 ldr r3, [pc, #36] @ (8000840 )
+ 800081c: 6c1b ldr r3, [r3, #64] @ 0x40
+ 800081e: 4a08 ldr r2, [pc, #32] @ (8000840 )
+ 8000820: f443 1300 orr.w r3, r3, #2097152 @ 0x200000
+ 8000824: 6413 str r3, [r2, #64] @ 0x40
+ 8000826: 4b06 ldr r3, [pc, #24] @ (8000840 )
+ 8000828: 6c1b ldr r3, [r3, #64] @ 0x40
+ 800082a: f403 1300 and.w r3, r3, #2097152 @ 0x200000
+ 800082e: 60fb str r3, [r7, #12]
+ 8000830: 68fb ldr r3, [r7, #12]
+ /* USER CODE BEGIN I2C1_MspInit 1 */
+
+ /* USER CODE END I2C1_MspInit 1 */
+ }
+}
+ 8000832: bf00 nop
+ 8000834: 3728 adds r7, #40 @ 0x28
+ 8000836: 46bd mov sp, r7
+ 8000838: bd80 pop {r7, pc}
+ 800083a: bf00 nop
+ 800083c: 40005400 .word 0x40005400
+ 8000840: 40023800 .word 0x40023800
+ 8000844: 40020400 .word 0x40020400
+
+08000848 :
+ volatile uint8_t tail; // accessed in ISR
+ volatile uint8_t count; // optional, only if needed
+} PacketQueue;
+
+// Initialize
+void pq_init(PacketQueue *q){
+ 8000848: b480 push {r7}
+ 800084a: b083 sub sp, #12
+ 800084c: af00 add r7, sp, #0
+ 800084e: 6078 str r0, [r7, #4]
+ q->head = 0;
+ 8000850: 687b ldr r3, [r7, #4]
+ 8000852: 2200 movs r2, #0
+ 8000854: f883 2180 strb.w r2, [r3, #384] @ 0x180
+ q->tail = 0;
+ 8000858: 687b ldr r3, [r7, #4]
+ 800085a: 2200 movs r2, #0
+ 800085c: f883 2181 strb.w r2, [r3, #385] @ 0x181
+ q->count = 0;
+ 8000860: 687b ldr r3, [r7, #4]
+ 8000862: 2200 movs r2, #0
+ 8000864: f883 2182 strb.w r2, [r3, #386] @ 0x182
+}
+ 8000868: bf00 nop
+ 800086a: 370c adds r7, #12
+ 800086c: 46bd mov sp, r7
+ 800086e: f85d 7b04 ldr.w r7, [sp], #4
+ 8000872: 4770 bx lr
+
+08000874 :
+
+// Called from ISR
+bool pq_push(PacketQueue *q, const uint8_t packet[PACKET_SIZE]){
+ 8000874: b580 push {r7, lr}
+ 8000876: b084 sub sp, #16
+ 8000878: af00 add r7, sp, #0
+ 800087a: 6078 str r0, [r7, #4]
+ 800087c: 6039 str r1, [r7, #0]
+ uint8_t nextTail = (q->tail + 1) % QUEUE_CAPACITY;
+ 800087e: 687b ldr r3, [r7, #4]
+ 8000880: f893 3181 ldrb.w r3, [r3, #385] @ 0x181
+ 8000884: b2db uxtb r3, r3
+ 8000886: 3301 adds r3, #1
+ 8000888: 425a negs r2, r3
+ 800088a: f003 031f and.w r3, r3, #31
+ 800088e: f002 021f and.w r2, r2, #31
+ 8000892: bf58 it pl
+ 8000894: 4253 negpl r3, r2
+ 8000896: 73fb strb r3, [r7, #15]
+ if(nextTail == q->head) return false; // queue full
+ 8000898: 687b ldr r3, [r7, #4]
+ 800089a: f893 3180 ldrb.w r3, [r3, #384] @ 0x180
+ 800089e: b2db uxtb r3, r3
+ 80008a0: 7bfa ldrb r2, [r7, #15]
+ 80008a2: 429a cmp r2, r3
+ 80008a4: d101 bne.n 80008aa
+ 80008a6: 2300 movs r3, #0
+ 80008a8: e014 b.n 80008d4
+
+ memcpy(q->data[q->tail], packet, PACKET_SIZE);
+ 80008aa: 687b ldr r3, [r7, #4]
+ 80008ac: f893 3181 ldrb.w r3, [r3, #385] @ 0x181
+ 80008b0: b2db uxtb r3, r3
+ 80008b2: 461a mov r2, r3
+ 80008b4: 4613 mov r3, r2
+ 80008b6: 005b lsls r3, r3, #1
+ 80008b8: 4413 add r3, r2
+ 80008ba: 009b lsls r3, r3, #2
+ 80008bc: 687a ldr r2, [r7, #4]
+ 80008be: 4413 add r3, r2
+ 80008c0: 220c movs r2, #12
+ 80008c2: 6839 ldr r1, [r7, #0]
+ 80008c4: 4618 mov r0, r3
+ 80008c6: f00a fd7f bl 800b3c8
+ q->tail = nextTail;
+ 80008ca: 687b ldr r3, [r7, #4]
+ 80008cc: 7bfa ldrb r2, [r7, #15]
+ 80008ce: f883 2181 strb.w r2, [r3, #385] @ 0x181
+ return true;
+ 80008d2: 2301 movs r3, #1
+}
+ 80008d4: 4618 mov r0, r3
+ 80008d6: 3710 adds r7, #16
+ 80008d8: 46bd mov sp, r7
+ 80008da: bd80 pop {r7, pc}
+
+080008dc :
+
+// Called from main
+bool pq_pop(PacketQueue *q, uint8_t out_packet[PACKET_SIZE]){
+ 80008dc: b580 push {r7, lr}
+ 80008de: b082 sub sp, #8
+ 80008e0: af00 add r7, sp, #0
+ 80008e2: 6078 str r0, [r7, #4]
+ 80008e4: 6039 str r1, [r7, #0]
+ if(q->head == q->tail) return false; // queue empty
+ 80008e6: 687b ldr r3, [r7, #4]
+ 80008e8: f893 3180 ldrb.w r3, [r3, #384] @ 0x180
+ 80008ec: b2da uxtb r2, r3
+ 80008ee: 687b ldr r3, [r7, #4]
+ 80008f0: f893 3181 ldrb.w r3, [r3, #385] @ 0x181
+ 80008f4: b2db uxtb r3, r3
+ 80008f6: 429a cmp r2, r3
+ 80008f8: d101 bne.n 80008fe
+ 80008fa: 2300 movs r3, #0
+ 80008fc: e020 b.n 8000940
+
+ memcpy(out_packet, q->data[q->head], PACKET_SIZE);
+ 80008fe: 687b ldr r3, [r7, #4]
+ 8000900: f893 3180 ldrb.w r3, [r3, #384] @ 0x180
+ 8000904: b2db uxtb r3, r3
+ 8000906: 461a mov r2, r3
+ 8000908: 4613 mov r3, r2
+ 800090a: 005b lsls r3, r3, #1
+ 800090c: 4413 add r3, r2
+ 800090e: 009b lsls r3, r3, #2
+ 8000910: 687a ldr r2, [r7, #4]
+ 8000912: 4413 add r3, r2
+ 8000914: 220c movs r2, #12
+ 8000916: 4619 mov r1, r3
+ 8000918: 6838 ldr r0, [r7, #0]
+ 800091a: f00a fd55 bl 800b3c8
+ q->head = (q->head + 1) % QUEUE_CAPACITY;
+ 800091e: 687b ldr r3, [r7, #4]
+ 8000920: f893 3180 ldrb.w r3, [r3, #384] @ 0x180
+ 8000924: b2db uxtb r3, r3
+ 8000926: 3301 adds r3, #1
+ 8000928: 425a negs r2, r3
+ 800092a: f003 031f and.w r3, r3, #31
+ 800092e: f002 021f and.w r2, r2, #31
+ 8000932: bf58 it pl
+ 8000934: 4253 negpl r3, r2
+ 8000936: b2da uxtb r2, r3
+ 8000938: 687b ldr r3, [r7, #4]
+ 800093a: f883 2180 strb.w r2, [r3, #384] @ 0x180
+ return true;
+ 800093e: 2301 movs r3, #1
+}
+ 8000940: 4618 mov r0, r3
+ 8000942: 3708 adds r7, #8
+ 8000944: 46bd mov sp, r7
+ 8000946: bd80 pop {r7, pc}
+
+08000948 :
+/**
+ * @brief The application entry point.
+ * @retval int
+ */
+int main(void)
+{
+ 8000948: b580 push {r7, lr}
+ 800094a: b088 sub sp, #32
+ 800094c: af00 add r7, sp, #0
+ /* USER CODE END 1 */
+
+ /* MCU Configuration--------------------------------------------------------*/
+
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ HAL_Init();
+ 800094e: f001 fa95 bl 8001e7c
+ /* USER CODE BEGIN Init */
+
+ /* USER CODE END Init */
+
+ /* Configure the system clock */
+ SystemClock_Config();
+ 8000952: f000 f97b bl 8000c4c
+ /* USER CODE BEGIN SysInit */
+
+ /* USER CODE END SysInit */
+
+ /* Initialize all configured peripherals */
+ MX_GPIO_Init();
+ 8000956: f7ff fe51 bl 80005fc
+ MX_DMA_Init();MX_PWM_Init();
+ 800095a: f7ff fde9 bl 8000530
+ 800095e: f000 fc89 bl 8001274
+ MX_TIM2_Init();
+ 8000962: f000 fdab bl 80014bc
+ MX_TIM3_Init();
+ 8000966: f000 fe01 bl 800156c
+ MX_UART4_Init();
+ 800096a: f000 fef3 bl 8001754
+ MX_UART5_Init();
+ 800096e: f000 ff1b bl 80017a8
+ MX_USART1_UART_Init();
+ 8000972: f000 ff43 bl 80017fc
+ MX_USART2_UART_Init();
+ 8000976: f000 ff6b bl 8001850
+ MX_I2C1_Init();
+ 800097a: f7ff feef bl 800075c
+ MX_USB_DEVICE_Init();
+ 800097e: f00a f849 bl 800aa14
+ MX_PWM_Init();
+ 8000982: f000 fc77 bl 8001274
+ /* USER CODE BEGIN 2 */
+
+ //Enable UART RX DMA for all ports
+ HAL_UART_Receive_DMA(&huart1, (uint8_t*)&RX1Msg, sizeof(UARTMessage));
+ 8000986: 2210 movs r2, #16
+ 8000988: 4958 ldr r1, [pc, #352] @ (8000aec )
+ 800098a: 4859 ldr r0, [pc, #356] @ (8000af0 )
+ 800098c: f005 fe48 bl 8006620
+ HAL_UART_Receive_DMA(&huart2, (uint8_t*)&RX2Msg, sizeof(UARTMessage));
+ 8000990: 2210 movs r2, #16
+ 8000992: 4958 ldr r1, [pc, #352] @ (8000af4 )
+ 8000994: 4858 ldr r0, [pc, #352] @ (8000af8 )
+ 8000996: f005 fe43 bl 8006620
+ HAL_UART_Receive_DMA(&huart4, (uint8_t*)&RX4Msg, sizeof(UARTMessage));
+ 800099a: 2210 movs r2, #16
+ 800099c: 4957 ldr r1, [pc, #348] @ (8000afc )
+ 800099e: 4858 ldr r0, [pc, #352] @ (8000b00 )
+ 80009a0: f005 fe3e bl 8006620
+ HAL_UART_Receive_DMA(&huart5, (uint8_t*)&RX5Msg, sizeof(UARTMessage));
+ 80009a4: 2210 movs r2, #16
+ 80009a6: 4957 ldr r1, [pc, #348] @ (8000b04 )
+ 80009a8: 4857 ldr r0, [pc, #348] @ (8000b08 )
+ 80009aa: f005 fe39 bl 8006620
+
+ // Start TIM3 encoder (PA6/PA7) so we can read encoder delta
+ HAL_TIM_Encoder_Start(&htim3, TIM_CHANNEL_ALL);
+ 80009ae: 213c movs r1, #60 @ 0x3c
+ 80009b0: 4856 ldr r0, [pc, #344] @ (8000b0c )
+ 80009b2: f005 f8c5 bl 8005b40
+ LAST_ENCODER_COUNT = __HAL_TIM_GET_COUNTER(&htim3);
+ 80009b6: 4b55 ldr r3, [pc, #340] @ (8000b0c )
+ 80009b8: 681b ldr r3, [r3, #0]
+ 80009ba: 6a5b ldr r3, [r3, #36] @ 0x24
+ 80009bc: 461a mov r2, r3
+ 80009be: 4b54 ldr r3, [pc, #336] @ (8000b10 )
+ 80009c0: 601a str r2, [r3, #0]
+
+ //Prealloc Kestate matrix
+ memset(KEYSTATE, 0, sizeof(KEYSTATE));
+ 80009c2: 224b movs r2, #75 @ 0x4b
+ 80009c4: 2100 movs r1, #0
+ 80009c6: 4853 ldr r0, [pc, #332] @ (8000b14 )
+ 80009c8: f00a fcd2 bl 800b370
+ pq_init(&huart1q);
+ 80009cc: 4852 ldr r0, [pc, #328] @ (8000b18 )
+ 80009ce: f7ff ff3b bl 8000848
+ pq_init(&huart2q);
+ 80009d2: 4852 ldr r0, [pc, #328] @ (8000b1c )
+ 80009d4: f7ff ff38 bl 8000848
+ pq_init(&huart4q);
+ 80009d8: 4851 ldr r0, [pc, #324] @ (8000b20 )
+ 80009da: f7ff ff35 bl 8000848
+ pq_init(&huart5q);
+ 80009de: 4851 ldr r0, [pc, #324] @ (8000b24 )
+ 80009e0: f7ff ff32 bl 8000848
+
+ PWM_Start();
+ 80009e4: f000 fc74 bl 80012d0
+
+ /* Infinite loop */
+ /* USER CODE BEGIN WHILE */
+ while (1)
+ {
+ __HAL_TIM_SET_COMPARE(&htim2, TIM_CHANNEL_1, 67);
+ 80009e8: 4b4f ldr r3, [pc, #316] @ (8000b28 )
+ 80009ea: 681b ldr r3, [r3, #0]
+ 80009ec: 2243 movs r2, #67 @ 0x43
+ 80009ee: 635a str r2, [r3, #52] @ 0x34
+ switch (MODE){
+ 80009f0: 4b4e ldr r3, [pc, #312] @ (8000b2c )
+ 80009f2: 781b ldrb r3, [r3, #0]
+ 80009f4: b2db uxtb r3, r3
+ 80009f6: 2b02 cmp r3, #2
+ 80009f8: d006 beq.n 8000a08
+ 80009fa: 2b02 cmp r3, #2
+ 80009fc: dc6e bgt.n 8000adc
+ 80009fe: 2b00 cmp r3, #0
+ 8000a00: d027 beq.n 8000a52
+ 8000a02: 2b01 cmp r3, #1
+ 8000a04: d05c beq.n 8000ac0
+ encoderProcess();
+ USBD_HID_SendReport(&hUsbDeviceFS, (uint8_t*)&REPORT, sizeof(REPORT));
+ break;
+
+ default:
+ break;
+ 8000a06: e069 b.n 8000adc
+ KEYSTATE_CHANGED_FLAG = 1;
+ 8000a08: 4b49 ldr r3, [pc, #292] @ (8000b30 )
+ 8000a0a: 2201 movs r2, #1
+ 8000a0c: 701a strb r2, [r3, #0]
+ resetReport();
+ 8000a0e: f000 fc1f bl 8001250
+ matrixScan();
+ 8000a12: f000 fb47 bl 80010a4
+ mergeChild();
+ 8000a16: f000 f895 bl 8000b44
+ encoderProcess();
+ 8000a1a: f000 fbbb bl 8001194
+ if(KEYSTATE_CHANGED_FLAG == 1){
+ 8000a1e: 4b44 ldr r3, [pc, #272] @ (8000b30 )
+ 8000a20: 781b ldrb r3, [r3, #0]
+ 8000a22: 2b01 cmp r3, #1
+ 8000a24: d15c bne.n 8000ae0
+ UARTREPORT.DEPTH = DEPTH;
+ 8000a26: 4b43 ldr r3, [pc, #268] @ (8000b34 )
+ 8000a28: 881b ldrh r3, [r3, #0]
+ 8000a2a: 823b strh r3, [r7, #16]
+ UARTREPORT.TYPE = 0xEE;
+ 8000a2c: 23ee movs r3, #238 @ 0xee
+ 8000a2e: 827b strh r3, [r7, #18]
+ memcpy(UARTREPORT.KEYPRESS, REPORT.KEYPRESS, sizeof(UARTREPORT.KEYPRESS));
+ 8000a30: 4a41 ldr r2, [pc, #260] @ (8000b38 )
+ 8000a32: f107 0314 add.w r3, r7, #20
+ 8000a36: 3202 adds r2, #2
+ 8000a38: 6810 ldr r0, [r2, #0]
+ 8000a3a: 6851 ldr r1, [r2, #4]
+ 8000a3c: 6892 ldr r2, [r2, #8]
+ 8000a3e: c307 stmia r3!, {r0, r1, r2}
+ HAL_UART_Transmit_DMA(PARENT, (uint8_t*)&UARTREPORT, sizeof(UARTREPORT));
+ 8000a40: 4b3e ldr r3, [pc, #248] @ (8000b3c )
+ 8000a42: 681b ldr r3, [r3, #0]
+ 8000a44: f107 0110 add.w r1, r7, #16
+ 8000a48: 2210 movs r2, #16
+ 8000a4a: 4618 mov r0, r3
+ 8000a4c: f005 fd6c bl 8006528
+ break;
+ 8000a50: e046 b.n 8000ae0
+ if(hUsbDeviceFS.dev_state == USBD_STATE_CONFIGURED){
+ 8000a52: 4b3b ldr r3, [pc, #236] @ (8000b40 )
+ 8000a54: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
+ 8000a58: b2db uxtb r3, r3
+ 8000a5a: 2b03 cmp r3, #3
+ 8000a5c: d106 bne.n 8000a6c
+ MODE = MODE_MAINBOARD;
+ 8000a5e: 4b33 ldr r3, [pc, #204] @ (8000b2c )
+ 8000a60: 2201 movs r2, #1
+ 8000a62: 701a strb r2, [r3, #0]
+ DEPTH = 0;
+ 8000a64: 4b33 ldr r3, [pc, #204] @ (8000b34 )
+ 8000a66: 2200 movs r2, #0
+ 8000a68: 801a strh r2, [r3, #0]
+ break;
+ 8000a6a: e03a b.n 8000ae2
+ REQ.DEPTH = 0;
+ 8000a6c: 2300 movs r3, #0
+ 8000a6e: 803b strh r3, [r7, #0]
+ REQ.TYPE = 0xFF; //Message code for request is 0xFF
+ 8000a70: 23ff movs r3, #255 @ 0xff
+ 8000a72: 807b strh r3, [r7, #2]
+ memset(REQ.KEYPRESS, 0, sizeof(REQ.KEYPRESS));
+ 8000a74: 463b mov r3, r7
+ 8000a76: 3304 adds r3, #4
+ 8000a78: 220c movs r2, #12
+ 8000a7a: 2100 movs r1, #0
+ 8000a7c: 4618 mov r0, r3
+ 8000a7e: f00a fc77 bl 800b370
+ HAL_UART_Transmit_DMA(&huart1, (uint8_t*)&REQ, sizeof(REQ));
+ 8000a82: 463b mov r3, r7
+ 8000a84: 2210 movs r2, #16
+ 8000a86: 4619 mov r1, r3
+ 8000a88: 4819 ldr r0, [pc, #100] @ (8000af0 )
+ 8000a8a: f005 fd4d bl 8006528
+ HAL_UART_Transmit_DMA(&huart2, (uint8_t*)&REQ, sizeof(REQ));
+ 8000a8e: 463b mov r3, r7
+ 8000a90: 2210 movs r2, #16
+ 8000a92: 4619 mov r1, r3
+ 8000a94: 4818 ldr r0, [pc, #96] @ (8000af8 )
+ 8000a96: f005 fd47 bl 8006528
+ HAL_UART_Transmit_DMA(&huart4, (uint8_t*)&REQ, sizeof(REQ));
+ 8000a9a: 463b mov r3, r7
+ 8000a9c: 2210 movs r2, #16
+ 8000a9e: 4619 mov r1, r3
+ 8000aa0: 4817 ldr r0, [pc, #92] @ (8000b00 )
+ 8000aa2: f005 fd41 bl 8006528
+ HAL_UART_Transmit_DMA(&huart5, (uint8_t*)&REQ, sizeof(REQ));
+ 8000aa6: 463b mov r3, r7
+ 8000aa8: 2210 movs r2, #16
+ 8000aaa: 4619 mov r1, r3
+ 8000aac: 4816 ldr r0, [pc, #88] @ (8000b08 )
+ 8000aae: f005 fd3b bl 8006528
+ HAL_Delay(500);
+ 8000ab2: f44f 70fa mov.w r0, #500 @ 0x1f4
+ 8000ab6: f001 fa53 bl 8001f60
+ findBestParent(); //So true...
+ 8000aba: f000 f9db bl 8000e74
+ break;
+ 8000abe: e010 b.n 8000ae2
+ resetReport();
+ 8000ac0: f000 fbc6 bl 8001250
+ matrixScan();//Something related to this making the key stick. Likely due to race conditions
+ 8000ac4: f000 faee bl 80010a4
+ mergeChild();
+ 8000ac8: f000 f83c bl 8000b44
+ encoderProcess();
+ 8000acc: f000 fb62 bl 8001194
+ USBD_HID_SendReport(&hUsbDeviceFS, (uint8_t*)&REPORT, sizeof(REPORT));
+ 8000ad0: 220e movs r2, #14
+ 8000ad2: 4919 ldr r1, [pc, #100] @ (8000b38 )
+ 8000ad4: 481a ldr r0, [pc, #104] @ (8000b40 )
+ 8000ad6: f008 fbd1 bl 800927c
+ break;
+ 8000ada: e002 b.n 8000ae2
+ break;
+ 8000adc: bf00 nop
+ 8000ade: e000 b.n 8000ae2
+ break;
+ 8000ae0: bf00 nop
+ }
+
+ HAL_Delay(20);
+ 8000ae2: 2014 movs r0, #20
+ 8000ae4: f001 fa3c bl 8001f60
+ __HAL_TIM_SET_COMPARE(&htim2, TIM_CHANNEL_1, 67);
+ 8000ae8: e77e b.n 80009e8
+ 8000aea: bf00 nop
+ 8000aec: 200002a4 .word 0x200002a4
+ 8000af0: 20000a90 .word 0x20000a90
+ 8000af4: 200002b4 .word 0x200002b4
+ 8000af8: 20000ad8 .word 0x20000ad8
+ 8000afc: 200002c4 .word 0x200002c4
+ 8000b00: 20000a00 .word 0x20000a00
+ 8000b04: 20000294 .word 0x20000294
+ 8000b08: 20000a48 .word 0x20000a48
+ 8000b0c: 200009b8 .word 0x200009b8
+ 8000b10: 2000032c .word 0x2000032c
+ 8000b14: 200002e0 .word 0x200002e0
+ 8000b18: 20000360 .word 0x20000360
+ 8000b1c: 200004e4 .word 0x200004e4
+ 8000b20: 20000668 .word 0x20000668
+ 8000b24: 200007ec .word 0x200007ec
+ 8000b28: 20000970 .word 0x20000970
+ 8000b2c: 2000032b .word 0x2000032b
+ 8000b30: 200002dc .word 0x200002dc
+ 8000b34: 200002d4 .word 0x200002d4
+ 8000b38: 20000284 .word 0x20000284
+ 8000b3c: 200002d8 .word 0x200002d8
+ 8000b40: 20000e28 .word 0x20000e28
+
+08000b44 :
+ /* USER CODE BEGIN 3 */
+ }
+ /* USER CODE END 3 */
+}
+
+void mergeChild(){
+ 8000b44: b590 push {r4, r7, lr}
+ 8000b46: b087 sub sp, #28
+ 8000b48: af00 add r7, sp, #0
+ uint8_t packet[12];
+ if (pq_pop(&huart1q, packet)) {
+ 8000b4a: 1d3b adds r3, r7, #4
+ 8000b4c: 4619 mov r1, r3
+ 8000b4e: 4838 ldr r0, [pc, #224] @ (8000c30 )
+ 8000b50: f7ff fec4 bl 80008dc
+ 8000b54: 4603 mov r3, r0
+ 8000b56: 2b00 cmp r3, #0
+ 8000b58: d008 beq.n 8000b6c
+ memcpy(UART_KEYSTATE[1], packet, 12);
+ 8000b5a: 4b36 ldr r3, [pc, #216] @ (8000c34 )
+ 8000b5c: 330c adds r3, #12
+ 8000b5e: 1d3a adds r2, r7, #4
+ 8000b60: ca07 ldmia r2, {r0, r1, r2}
+ 8000b62: e883 0007 stmia.w r3, {r0, r1, r2}
+ KEYSTATE_CHANGED_FLAG = 1;
+ 8000b66: 4b34 ldr r3, [pc, #208] @ (8000c38 )
+ 8000b68: 2201 movs r2, #1
+ 8000b6a: 701a strb r2, [r3, #0]
+ }
+ if (pq_pop(&huart2q, packet)) {
+ 8000b6c: 1d3b adds r3, r7, #4
+ 8000b6e: 4619 mov r1, r3
+ 8000b70: 4832 ldr r0, [pc, #200] @ (8000c3c )
+ 8000b72: f7ff feb3 bl 80008dc
+ 8000b76: 4603 mov r3, r0
+ 8000b78: 2b00 cmp r3, #0
+ 8000b7a: d008 beq.n 8000b8e
+ memcpy(UART_KEYSTATE[2], packet, 12);
+ 8000b7c: 4b2d ldr r3, [pc, #180] @ (8000c34 )
+ 8000b7e: 3318 adds r3, #24
+ 8000b80: 1d3a adds r2, r7, #4
+ 8000b82: ca07 ldmia r2, {r0, r1, r2}
+ 8000b84: e883 0007 stmia.w r3, {r0, r1, r2}
+ KEYSTATE_CHANGED_FLAG = 1;
+ 8000b88: 4b2b ldr r3, [pc, #172] @ (8000c38 )
+ 8000b8a: 2201 movs r2, #1
+ 8000b8c: 701a strb r2, [r3, #0]
+ }
+ if (pq_pop(&huart4q, packet)) {
+ 8000b8e: 1d3b adds r3, r7, #4
+ 8000b90: 4619 mov r1, r3
+ 8000b92: 482b ldr r0, [pc, #172] @ (8000c40 )
+ 8000b94: f7ff fea2 bl 80008dc
+ 8000b98: 4603 mov r3, r0
+ 8000b9a: 2b00 cmp r3, #0
+ 8000b9c: d008 beq.n 8000bb0
+ memcpy(UART_KEYSTATE[3], packet, 12);
+ 8000b9e: 4b25 ldr r3, [pc, #148] @ (8000c34 )
+ 8000ba0: 3324 adds r3, #36 @ 0x24
+ 8000ba2: 1d3a adds r2, r7, #4
+ 8000ba4: ca07 ldmia r2, {r0, r1, r2}
+ 8000ba6: e883 0007 stmia.w r3, {r0, r1, r2}
+ KEYSTATE_CHANGED_FLAG = 1;
+ 8000baa: 4b23 ldr r3, [pc, #140] @ (8000c38 )
+ 8000bac: 2201 movs r2, #1
+ 8000bae: 701a strb r2, [r3, #0]
+ }
+ if (pq_pop(&huart5q, packet)) {
+ 8000bb0: 1d3b adds r3, r7, #4
+ 8000bb2: 4619 mov r1, r3
+ 8000bb4: 4823 ldr r0, [pc, #140] @ (8000c44 )
+ 8000bb6: f7ff fe91 bl 80008dc
+ 8000bba: 4603 mov r3, r0
+ 8000bbc: 2b00 cmp r3, #0
+ 8000bbe: d009 beq.n 8000bd4
+ memcpy(UART_KEYSTATE[0], packet, 12);
+ 8000bc0: 4b1c ldr r3, [pc, #112] @ (8000c34 )
+ 8000bc2: 461c mov r4, r3
+ 8000bc4: 1d3b adds r3, r7, #4
+ 8000bc6: e893 0007 ldmia.w r3, {r0, r1, r2}
+ 8000bca: e884 0007 stmia.w r4, {r0, r1, r2}
+ KEYSTATE_CHANGED_FLAG = 1;
+ 8000bce: 4b1a ldr r3, [pc, #104] @ (8000c38 )
+ 8000bd0: 2201 movs r2, #1
+ 8000bd2: 701a strb r2, [r3, #0]
+ }
+ for(int i = 0; i < 4; i++){
+ 8000bd4: 2300 movs r3, #0
+ 8000bd6: 617b str r3, [r7, #20]
+ 8000bd8: e022 b.n 8000c20
+ for(int j = 0; j < 12; j++){
+ 8000bda: 2300 movs r3, #0
+ 8000bdc: 613b str r3, [r7, #16]
+ 8000bde: e019 b.n 8000c14
+ REPORT.KEYPRESS[j] |= UART_KEYSTATE[i][j];
+ 8000be0: 4a19 ldr r2, [pc, #100] @ (8000c48 )
+ 8000be2: 693b ldr r3, [r7, #16]
+ 8000be4: 4413 add r3, r2
+ 8000be6: 3302 adds r3, #2
+ 8000be8: 7819 ldrb r1, [r3, #0]
+ 8000bea: 4812 ldr r0, [pc, #72] @ (8000c34 )
+ 8000bec: 697a ldr r2, [r7, #20]
+ 8000bee: 4613 mov r3, r2
+ 8000bf0: 005b lsls r3, r3, #1
+ 8000bf2: 4413 add r3, r2
+ 8000bf4: 009b lsls r3, r3, #2
+ 8000bf6: 18c2 adds r2, r0, r3
+ 8000bf8: 693b ldr r3, [r7, #16]
+ 8000bfa: 4413 add r3, r2
+ 8000bfc: 781b ldrb r3, [r3, #0]
+ 8000bfe: 430b orrs r3, r1
+ 8000c00: b2d9 uxtb r1, r3
+ 8000c02: 4a11 ldr r2, [pc, #68] @ (8000c48 )
+ 8000c04: 693b ldr r3, [r7, #16]
+ 8000c06: 4413 add r3, r2
+ 8000c08: 3302 adds r3, #2
+ 8000c0a: 460a mov r2, r1
+ 8000c0c: 701a strb r2, [r3, #0]
+ for(int j = 0; j < 12; j++){
+ 8000c0e: 693b ldr r3, [r7, #16]
+ 8000c10: 3301 adds r3, #1
+ 8000c12: 613b str r3, [r7, #16]
+ 8000c14: 693b ldr r3, [r7, #16]
+ 8000c16: 2b0b cmp r3, #11
+ 8000c18: dde2 ble.n 8000be0
+ for(int i = 0; i < 4; i++){
+ 8000c1a: 697b ldr r3, [r7, #20]
+ 8000c1c: 3301 adds r3, #1
+ 8000c1e: 617b str r3, [r7, #20]
+ 8000c20: 697b ldr r3, [r7, #20]
+ 8000c22: 2b03 cmp r3, #3
+ 8000c24: ddd9 ble.n 8000bda
+ }
+ }
+}
+ 8000c26: bf00 nop
+ 8000c28: bf00 nop
+ 8000c2a: 371c adds r7, #28
+ 8000c2c: 46bd mov sp, r7
+ 8000c2e: bd90 pop {r4, r7, pc}
+ 8000c30: 20000360 .word 0x20000360
+ 8000c34: 20000330 .word 0x20000330
+ 8000c38: 200002dc .word 0x200002dc
+ 8000c3c: 200004e4 .word 0x200004e4
+ 8000c40: 20000668 .word 0x20000668
+ 8000c44: 200007ec .word 0x200007ec
+ 8000c48: 20000284 .word 0x20000284
+
+08000c4c :
+/**
+ * @brief System Clock Configuration
+ * @retval None
+ */
+void SystemClock_Config(void)
+{
+ 8000c4c: b580 push {r7, lr}
+ 8000c4e: b094 sub sp, #80 @ 0x50
+ 8000c50: af00 add r7, sp, #0
+ RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ 8000c52: f107 031c add.w r3, r7, #28
+ 8000c56: 2234 movs r2, #52 @ 0x34
+ 8000c58: 2100 movs r1, #0
+ 8000c5a: 4618 mov r0, r3
+ 8000c5c: f00a fb88 bl 800b370
+ RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 8000c60: f107 0308 add.w r3, r7, #8
+ 8000c64: 2200 movs r2, #0
+ 8000c66: 601a str r2, [r3, #0]
+ 8000c68: 605a str r2, [r3, #4]
+ 8000c6a: 609a str r2, [r3, #8]
+ 8000c6c: 60da str r2, [r3, #12]
+ 8000c6e: 611a str r2, [r3, #16]
+
+ /** Configure the main internal regulator out put voltage
+ */
+ __HAL_RCC_PWR_CLK_ENABLE();
+ 8000c70: 2300 movs r3, #0
+ 8000c72: 607b str r3, [r7, #4]
+ 8000c74: 4b29 ldr r3, [pc, #164] @ (8000d1c )
+ 8000c76: 6c1b ldr r3, [r3, #64] @ 0x40
+ 8000c78: 4a28 ldr r2, [pc, #160] @ (8000d1c )
+ 8000c7a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
+ 8000c7e: 6413 str r3, [r2, #64] @ 0x40
+ 8000c80: 4b26 ldr r3, [pc, #152] @ (8000d1c )
+ 8000c82: 6c1b ldr r3, [r3, #64] @ 0x40
+ 8000c84: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
+ 8000c88: 607b str r3, [r7, #4]
+ 8000c8a: 687b ldr r3, [r7, #4]
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE3);
+ 8000c8c: 2300 movs r3, #0
+ 8000c8e: 603b str r3, [r7, #0]
+ 8000c90: 4b23 ldr r3, [pc, #140] @ (8000d20 )
+ 8000c92: 681b ldr r3, [r3, #0]
+ 8000c94: f423 4340 bic.w r3, r3, #49152 @ 0xc000
+ 8000c98: 4a21 ldr r2, [pc, #132] @ (8000d20 )
+ 8000c9a: f443 4380 orr.w r3, r3, #16384 @ 0x4000
+ 8000c9e: 6013 str r3, [r2, #0]
+ 8000ca0: 4b1f ldr r3, [pc, #124] @ (8000d20 )
+ 8000ca2: 681b ldr r3, [r3, #0]
+ 8000ca4: f403 4340 and.w r3, r3, #49152 @ 0xc000
+ 8000ca8: 603b str r3, [r7, #0]
+ 8000caa: 683b ldr r3, [r7, #0]
+
+ /** Initializes the RCC Oscillators according to the specified parameters
+ * in the RCC_OscInitTypeDef structure.
+ */
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ 8000cac: 2301 movs r3, #1
+ 8000cae: 61fb str r3, [r7, #28]
+ RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ 8000cb0: f44f 3380 mov.w r3, #65536 @ 0x10000
+ 8000cb4: 623b str r3, [r7, #32]
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 8000cb6: 2302 movs r3, #2
+ 8000cb8: 637b str r3, [r7, #52] @ 0x34
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ 8000cba: f44f 0380 mov.w r3, #4194304 @ 0x400000
+ 8000cbe: 63bb str r3, [r7, #56] @ 0x38
+ RCC_OscInitStruct.PLL.PLLM = 4;
+ 8000cc0: 2304 movs r3, #4
+ 8000cc2: 63fb str r3, [r7, #60] @ 0x3c
+ RCC_OscInitStruct.PLL.PLLN = 96;
+ 8000cc4: 2360 movs r3, #96 @ 0x60
+ 8000cc6: 643b str r3, [r7, #64] @ 0x40
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ 8000cc8: 2302 movs r3, #2
+ 8000cca: 647b str r3, [r7, #68] @ 0x44
+ RCC_OscInitStruct.PLL.PLLQ = 4;
+ 8000ccc: 2304 movs r3, #4
+ 8000cce: 64bb str r3, [r7, #72] @ 0x48
+ RCC_OscInitStruct.PLL.PLLR = 2;
+ 8000cd0: 2302 movs r3, #2
+ 8000cd2: 64fb str r3, [r7, #76] @ 0x4c
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 8000cd4: f107 031c add.w r3, r7, #28
+ 8000cd8: 4618 mov r0, r3
+ 8000cda: f004 fa7d bl 80051d8
+ 8000cde: 4603 mov r3, r0
+ 8000ce0: 2b00 cmp r3, #0
+ 8000ce2: d001 beq.n 8000ce8
+ {
+ Error_Handler();
+ 8000ce4: f000 fac0 bl 8001268
+ }
+
+ /** Initializes the CPU, AHB and APB buses clocks
+ */
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ 8000ce8: 230f movs r3, #15
+ 8000cea: 60bb str r3, [r7, #8]
+ |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ 8000cec: 2302 movs r3, #2
+ 8000cee: 60fb str r3, [r7, #12]
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV2;
+ 8000cf0: 2380 movs r3, #128 @ 0x80
+ 8000cf2: 613b str r3, [r7, #16]
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+ 8000cf4: f44f 5380 mov.w r3, #4096 @ 0x1000
+ 8000cf8: 617b str r3, [r7, #20]
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+ 8000cfa: 2300 movs r3, #0
+ 8000cfc: 61bb str r3, [r7, #24]
+
+ if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+ 8000cfe: f107 0308 add.w r3, r7, #8
+ 8000d02: 2101 movs r1, #1
+ 8000d04: 4618 mov r0, r3
+ 8000d06: f003 fbf3 bl 80044f0
+ 8000d0a: 4603 mov r3, r0
+ 8000d0c: 2b00 cmp r3, #0
+ 8000d0e: d001 beq.n 8000d14
+ {
+ Error_Handler();
+ 8000d10: f000 faaa bl 8001268
+ }
+}
+ 8000d14: bf00 nop
+ 8000d16: 3750 adds r7, #80 @ 0x50
+ 8000d18: 46bd mov sp, r7
+ 8000d1a: bd80 pop {r7, pc}
+ 8000d1c: 40023800 .word 0x40023800
+ 8000d20: 40007000 .word 0x40007000
+
+08000d24 :
+
+/* USER CODE BEGIN 4 */
+// UART Message Requests Goes Here
+void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart) {
+ 8000d24: b580 push {r7, lr}
+ 8000d26: b082 sub sp, #8
+ 8000d28: af00 add r7, sp, #0
+ 8000d2a: 6078 str r0, [r7, #4]
+ if (huart->Instance == USART1) {
+ 8000d2c: 687b ldr r3, [r7, #4]
+ 8000d2e: 681b ldr r3, [r3, #0]
+ 8000d30: 4a1e ldr r2, [pc, #120] @ (8000dac )
+ 8000d32: 4293 cmp r3, r2
+ 8000d34: d109 bne.n 8000d4a
+ handleUARTMessages((uint8_t*)&RX1Msg, &huart1);
+ 8000d36: 491e ldr r1, [pc, #120] @ (8000db0 )
+ 8000d38: 481e ldr r0, [pc, #120] @ (8000db4 )
+ 8000d3a: f000 f8dd bl 8000ef8
+ HAL_UART_Receive_DMA(&huart1, (uint8_t*)&RX1Msg, sizeof(UARTMessage));
+ 8000d3e: 2210 movs r2, #16
+ 8000d40: 491c ldr r1, [pc, #112] @ (8000db4 )
+ 8000d42: 481b ldr r0, [pc, #108] @ (8000db0 )
+ 8000d44: f005 fc6c bl 8006620
+ }
+ else if (huart->Instance == UART5) {
+ handleUARTMessages((uint8_t*)&RX5Msg, &huart5);
+ HAL_UART_Receive_DMA(&huart5, (uint8_t*)&RX5Msg, sizeof(UARTMessage));
+ }
+}
+ 8000d48: e02b b.n 8000da2
+ else if (huart->Instance == USART2) {
+ 8000d4a: 687b ldr r3, [r7, #4]
+ 8000d4c: 681b ldr r3, [r3, #0]
+ 8000d4e: 4a1a ldr r2, [pc, #104] @ (8000db8 )
+ 8000d50: 4293 cmp r3, r2
+ 8000d52: d109 bne.n 8000d68
+ handleUARTMessages((uint8_t*)&RX2Msg, &huart2);
+ 8000d54: 4919 ldr r1, [pc, #100] @ (8000dbc )
+ 8000d56: 481a ldr r0, [pc, #104] @ (8000dc0 )
+ 8000d58: f000 f8ce bl 8000ef8
+ HAL_UART_Receive_DMA(&huart2, (uint8_t*)&RX2Msg, sizeof(UARTMessage));
+ 8000d5c: 2210 movs r2, #16
+ 8000d5e: 4918 ldr r1, [pc, #96] @ (8000dc0 )
+ 8000d60: 4816 ldr r0, [pc, #88] @ (8000dbc )
+ 8000d62: f005 fc5d bl 8006620
+}
+ 8000d66: e01c b.n 8000da2
+ else if (huart->Instance == UART4) {
+ 8000d68: 687b ldr r3, [r7, #4]
+ 8000d6a: 681b ldr r3, [r3, #0]
+ 8000d6c: 4a15 ldr r2, [pc, #84] @ (8000dc4 )
+ 8000d6e: 4293 cmp r3, r2
+ 8000d70: d109 bne.n 8000d86
+ handleUARTMessages((uint8_t*)&RX4Msg, &huart4);
+ 8000d72: 4915 ldr r1, [pc, #84] @ (8000dc8 )
+ 8000d74: 4815 ldr r0, [pc, #84] @ (8000dcc )
+ 8000d76: f000 f8bf bl 8000ef8
+ HAL_UART_Receive_DMA(&huart4, (uint8_t*)&RX4Msg, sizeof(UARTMessage));
+ 8000d7a: 2210 movs r2, #16
+ 8000d7c: 4913 ldr r1, [pc, #76] @ (8000dcc )
+ 8000d7e: 4812 ldr r0, [pc, #72] @ (8000dc8 )
+ 8000d80: f005 fc4e bl 8006620